1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 4 * 5 */ 6 #ifndef _MHI_H_ 7 #define _MHI_H_ 8 9 #include <linux/device.h> 10 #include <linux/dma-direction.h> 11 #include <linux/mutex.h> 12 #include <linux/skbuff.h> 13 #include <linux/slab.h> 14 #include <linux/spinlock.h> 15 #include <linux/wait.h> 16 #include <linux/workqueue.h> 17 #include <linux/device-id/mhi.h> 18 19 #define MHI_MAX_OEM_PK_HASH_SEGMENTS 16 20 21 struct mhi_chan; 22 struct mhi_event; 23 struct mhi_ctxt; 24 struct mhi_cmd; 25 struct mhi_buf_info; 26 27 /** 28 * enum mhi_callback - MHI callback 29 * @MHI_CB_IDLE: MHI entered idle state 30 * @MHI_CB_PENDING_DATA: New data available for client to process 31 * @MHI_CB_LPM_ENTER: MHI host entered low power mode 32 * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode 33 * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env 34 * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env 35 * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover) 36 * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state 37 * @MHI_CB_BW_REQ: Received a bandwidth switch request from device 38 */ 39 enum mhi_callback { 40 MHI_CB_IDLE, 41 MHI_CB_PENDING_DATA, 42 MHI_CB_LPM_ENTER, 43 MHI_CB_LPM_EXIT, 44 MHI_CB_EE_RDDM, 45 MHI_CB_EE_MISSION_MODE, 46 MHI_CB_SYS_ERROR, 47 MHI_CB_FATAL_ERROR, 48 MHI_CB_BW_REQ, 49 }; 50 51 /** 52 * enum mhi_flags - Transfer flags 53 * @MHI_EOB: End of buffer for bulk transfer 54 * @MHI_EOT: End of transfer 55 * @MHI_CHAIN: Linked transfer 56 */ 57 enum mhi_flags { 58 MHI_EOB = BIT(0), 59 MHI_EOT = BIT(1), 60 MHI_CHAIN = BIT(2), 61 }; 62 63 /** 64 * enum mhi_device_type - Device types 65 * @MHI_DEVICE_XFER: Handles data transfer 66 * @MHI_DEVICE_CONTROLLER: Control device 67 */ 68 enum mhi_device_type { 69 MHI_DEVICE_XFER, 70 MHI_DEVICE_CONTROLLER, 71 }; 72 73 /** 74 * enum mhi_ch_type - Channel types 75 * @MHI_CH_TYPE_INVALID: Invalid channel type 76 * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device 77 * @MHI_CH_TYPE_INBOUND: Inbound channel from the device 78 * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine 79 * multiple packets and send them as a single 80 * large packet to reduce CPU consumption 81 */ 82 enum mhi_ch_type { 83 MHI_CH_TYPE_INVALID = 0, 84 MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE, 85 MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE, 86 MHI_CH_TYPE_INBOUND_COALESCED = 3, 87 }; 88 89 /** 90 * struct mhi_buf - MHI Buffer description 91 * @buf: Virtual address of the buffer 92 * @name: Buffer label. For offload channel, configurations name must be: 93 * ECA - Event context array data 94 * CCA - Channel context array data 95 * @dma_addr: IOMMU address of the buffer 96 * @len: # of bytes 97 */ 98 struct mhi_buf { 99 void *buf; 100 const char *name; 101 dma_addr_t dma_addr; 102 size_t len; 103 }; 104 105 /** 106 * struct image_info - Firmware and RDDM table 107 * @mhi_buf: Buffer for firmware and RDDM table 108 * @entries: # of entries in table 109 */ 110 struct image_info { 111 /* private: from internal.h */ 112 struct bhi_vec_entry *bhi_vec; 113 /* public: */ 114 u32 entries; 115 struct mhi_buf mhi_buf[] __counted_by(entries); 116 }; 117 118 /** 119 * struct mhi_link_info - BW requirement 120 * @target_link_speed: Link speed as defined by TLS bits in LinkControl reg 121 * @target_link_width: Link width as defined by NLW bits in LinkStatus reg 122 */ 123 struct mhi_link_info { 124 unsigned int target_link_speed; 125 unsigned int target_link_width; 126 }; 127 128 /** 129 * enum mhi_ee_type - Execution environment types 130 * @MHI_EE_PBL: Primary Bootloader 131 * @MHI_EE_SBL: Secondary Bootloader 132 * @MHI_EE_AMSS: Modem, aka the primary runtime EE 133 * @MHI_EE_RDDM: Ram dump download mode 134 * @MHI_EE_WFW: WLAN firmware mode 135 * @MHI_EE_PTHRU: Passthrough 136 * @MHI_EE_EDL: Embedded downloader 137 * @MHI_EE_FP: Flash Programmer Environment 138 */ 139 enum mhi_ee_type { 140 MHI_EE_PBL, 141 MHI_EE_SBL, 142 MHI_EE_AMSS, 143 MHI_EE_RDDM, 144 MHI_EE_WFW, 145 MHI_EE_PTHRU, 146 MHI_EE_EDL, 147 MHI_EE_FP, 148 MHI_EE_MAX_SUPPORTED = MHI_EE_FP, 149 MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */ 150 MHI_EE_NOT_SUPPORTED, 151 MHI_EE_MAX, 152 }; 153 154 /** 155 * enum mhi_state - MHI states 156 * @MHI_STATE_RESET: Reset state 157 * @MHI_STATE_READY: Ready state 158 * @MHI_STATE_M0: M0 state 159 * @MHI_STATE_M1: M1 state 160 * @MHI_STATE_M2: M2 state 161 * @MHI_STATE_M3: M3 state 162 * @MHI_STATE_M3_FAST: M3 Fast state 163 * @MHI_STATE_BHI: BHI state 164 * @MHI_STATE_SYS_ERR: System Error state 165 */ 166 enum mhi_state { 167 MHI_STATE_RESET = 0x0, 168 MHI_STATE_READY = 0x1, 169 MHI_STATE_M0 = 0x2, 170 MHI_STATE_M1 = 0x3, 171 MHI_STATE_M2 = 0x4, 172 MHI_STATE_M3 = 0x5, 173 MHI_STATE_M3_FAST = 0x6, 174 MHI_STATE_BHI = 0x7, 175 MHI_STATE_SYS_ERR = 0xFF, 176 /* private: */ 177 MHI_STATE_MAX, 178 }; 179 180 /** 181 * enum mhi_ch_ee_mask - Execution environment mask for channel 182 * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE 183 * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE 184 * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE 185 * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE 186 * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE 187 * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE 188 * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE 189 */ 190 enum mhi_ch_ee_mask { 191 MHI_CH_EE_PBL = BIT(MHI_EE_PBL), 192 MHI_CH_EE_SBL = BIT(MHI_EE_SBL), 193 MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS), 194 MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM), 195 MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU), 196 MHI_CH_EE_WFW = BIT(MHI_EE_WFW), 197 MHI_CH_EE_EDL = BIT(MHI_EE_EDL), 198 }; 199 200 /** 201 * enum mhi_er_data_type - Event ring data types 202 * @MHI_ER_DATA: Only client data over this ring 203 * @MHI_ER_CTRL: MHI control data and client data 204 */ 205 enum mhi_er_data_type { 206 MHI_ER_DATA, 207 MHI_ER_CTRL, 208 }; 209 210 /** 211 * enum mhi_db_brst_mode - Doorbell mode 212 * @MHI_DB_BRST_DISABLE: Burst mode disable 213 * @MHI_DB_BRST_ENABLE: Burst mode enable 214 */ 215 enum mhi_db_brst_mode { 216 MHI_DB_BRST_DISABLE = 0x2, 217 MHI_DB_BRST_ENABLE = 0x3, 218 }; 219 220 /** 221 * struct mhi_channel_config - Channel configuration structure for controller 222 * @name: The name of this channel 223 * @num: The number assigned to this channel 224 * @num_elements: The number of elements that can be queued to this channel 225 * @local_elements: The local ring length of the channel 226 * @event_ring: The event ring index that services this channel 227 * @dir: Direction that data may flow on this channel 228 * @type: Channel type 229 * @ee_mask: Execution Environment mask for this channel 230 * @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds 231 * for UL channels, multiple of 8 ring elements for DL channels 232 * @doorbell: Doorbell mode 233 * @lpm_notify: The channel master requires low power mode notifications 234 * @offload_channel: The client manages the channel completely 235 * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition 236 * @wake_capable: Channel capable of waking up the system 237 */ 238 struct mhi_channel_config { 239 char *name; 240 u32 num; 241 u32 num_elements; 242 u32 local_elements; 243 u32 event_ring; 244 enum dma_data_direction dir; 245 enum mhi_ch_type type; 246 u32 ee_mask; 247 u32 pollcfg; 248 enum mhi_db_brst_mode doorbell; 249 bool lpm_notify; 250 bool offload_channel; 251 bool doorbell_mode_switch; 252 bool wake_capable; 253 }; 254 255 /** 256 * struct mhi_event_config - Event ring configuration structure for controller 257 * @num_elements: The number of elements that can be queued to this ring 258 * @irq_moderation_ms: Delay irq for additional events to be aggregated 259 * @irq: IRQ associated with this ring 260 * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring 261 * @priority: Priority of this ring. Use 1 for now 262 * @mode: Doorbell mode 263 * @data_type: Type of data this ring will process 264 * @hardware_event: This ring is associated with hardware channels 265 * @client_managed: This ring is client managed 266 * @offload_channel: This ring is associated with an offloaded channel 267 */ 268 struct mhi_event_config { 269 u32 num_elements; 270 u32 irq_moderation_ms; 271 u32 irq; 272 u32 channel; 273 u32 priority; 274 enum mhi_db_brst_mode mode; 275 enum mhi_er_data_type data_type; 276 bool hardware_event; 277 bool client_managed; 278 bool offload_channel; 279 }; 280 281 /** 282 * struct mhi_controller_config - Root MHI controller configuration 283 * @max_channels: Maximum number of channels supported 284 * @timeout_ms: Timeout value for operations. 0 means use default 285 * @ready_timeout_ms: Timeout value for waiting device to be ready (optional) 286 * @buf_len: Size of automatically allocated buffers. 0 means use default 287 * @num_channels: Number of channels defined in @ch_cfg 288 * @ch_cfg: Array of defined channels 289 * @num_events: Number of event rings defined in @event_cfg 290 * @event_cfg: Array of defined event rings 291 * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access 292 * @m2_no_db: Host is not allowed to ring DB in M2 state 293 */ 294 struct mhi_controller_config { 295 u32 max_channels; 296 u32 timeout_ms; 297 u32 ready_timeout_ms; 298 u32 buf_len; 299 u32 num_channels; 300 const struct mhi_channel_config *ch_cfg; 301 u32 num_events; 302 struct mhi_event_config *event_cfg; 303 bool use_bounce_buf; 304 bool m2_no_db; 305 }; 306 307 /** 308 * struct mhi_controller - Master MHI controller structure 309 * @name: Device name of the MHI controller 310 * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI 311 * controller (required) 312 * @mhi_dev: MHI device instance for the controller 313 * @debugfs_dentry: MHI controller debugfs directory 314 * @regs: Base address of MHI MMIO register space (required) 315 * @bhi: Points to base of MHI BHI register space 316 * @bhie: Points to base of MHI BHIe register space 317 * @wake_db: MHI WAKE doorbell register address 318 * @iova_start: IOMMU starting address for data (required) 319 * @iova_stop: IOMMU stop address for data (required) 320 * @fw_image: Firmware image name for normal booting (optional) 321 * @fw_data: Firmware image data content for normal booting, used only 322 * if fw_image is NULL and fbc_download is true (optional) 323 * @fw_sz: Firmware image data size for normal booting, used only if fw_image 324 * is NULL and fbc_download is true (optional) 325 * @edl_image: Firmware image name for emergency download mode (optional) 326 * @rddm_size: RAM dump size that host should allocate for debugging purpose 327 * @sbl_size: SBL image size downloaded through BHIe (optional) 328 * @seg_len: BHIe vector size (optional) 329 * @reg_len: Length of the MHI MMIO region (required) 330 * @fbc_image: Points to firmware image buffer 331 * @rddm_image: Points to RAM dump buffer 332 * @mhi_chan: Points to the channel configuration table 333 * @lpm_chans: List of channels that require LPM notifications 334 * @irq: base irq # to request (required) 335 * @max_chan: Maximum number of channels the controller supports 336 * @total_ev_rings: Total # of event rings allocated 337 * @hw_ev_rings: Number of hardware event rings 338 * @sw_ev_rings: Number of software event rings 339 * @nr_irqs: Number of IRQ allocated by bus master (required) 340 * @serial_number: MHI controller serial number obtained from BHI 341 * @mhi_event: MHI event ring configurations table 342 * @mhi_cmd: MHI command ring configurations table 343 * @mhi_ctxt: MHI device context, shared memory between host and device 344 * @pm_mutex: Mutex for suspend/resume operation 345 * @pm_lock: Lock for protecting MHI power management state 346 * @timeout_ms: Timeout in ms for state transitions 347 * @ready_timeout_ms: Timeout in ms for waiting device to be ready (optional) 348 * @pm_state: MHI power management state 349 * @db_access: DB access states 350 * @ee: MHI device execution environment 351 * @dev_state: MHI device state 352 * @dev_wake: Device wakeup count 353 * @pending_pkts: Pending packets for the controller 354 * @M0: Counter to track number of device MHI state changes 355 * @M2: Counter to track number of device MHI state changes 356 * @M3: Counter to track number of device MHI state changes 357 * @transition_list: List of MHI state transitions 358 * @transition_lock: Lock for protecting MHI state transition list 359 * @wlock: Lock for protecting device wakeup 360 * @mhi_link_info: Device bandwidth info 361 * @st_worker: State transition worker 362 * @hiprio_wq: High priority workqueue for MHI work such as state transitions 363 * @state_event: State change event 364 * @status_cb: CB function to notify power states of the device (required) 365 * @wake_get: CB function to assert device wake (optional) 366 * @wake_put: CB function to de-assert device wake (optional) 367 * @wake_toggle: CB function to assert and de-assert device wake (optional) 368 * @runtime_get: CB function to controller runtime resume (required) 369 * @runtime_put: CB function to decrement pm usage (required) 370 * @map_single: CB function to create TRE buffer 371 * @unmap_single: CB function to destroy TRE buffer 372 * @read_reg: Read a MHI register via the physical link (required) 373 * @write_reg: Write a MHI register via the physical link (required) 374 * @reset: Controller specific reset function (optional) 375 * @edl_trigger: CB function to trigger EDL mode (optional) 376 * @buffer_len: Bounce buffer length 377 * @index: Index of the MHI controller instance 378 * @bounce_buf: Use of bounce buffer 379 * @fbc_download: MHI host needs to do complete image transfer (optional) 380 * @wake_set: Device wakeup set flag 381 * @no_m3: Device doesn't support M3 state 382 * @irq_flags: irq flags passed to request_irq (optional) 383 * @mru: the default MRU for the MHI device 384 * 385 * Fields marked as (required) need to be populated by the controller driver 386 * before calling mhi_register_controller(). For the fields marked as (optional) 387 * they can be populated depending on the usecase. 388 */ 389 struct mhi_controller { 390 const char *name; 391 struct device *cntrl_dev; 392 struct mhi_device *mhi_dev; 393 struct dentry *debugfs_dentry; 394 void __iomem *regs; 395 void __iomem *bhi; 396 void __iomem *bhie; 397 void __iomem *wake_db; 398 399 dma_addr_t iova_start; 400 dma_addr_t iova_stop; 401 const char *fw_image; 402 const u8 *fw_data; 403 size_t fw_sz; 404 const char *edl_image; 405 size_t rddm_size; 406 size_t sbl_size; 407 size_t seg_len; 408 size_t reg_len; 409 struct image_info *fbc_image; 410 struct image_info *rddm_image; 411 struct mhi_chan *mhi_chan; 412 struct list_head lpm_chans; 413 int *irq; 414 u32 max_chan; 415 u32 total_ev_rings; 416 u32 hw_ev_rings; 417 u32 sw_ev_rings; 418 u32 nr_irqs; 419 u32 serial_number; 420 421 struct mhi_event *mhi_event; 422 struct mhi_cmd *mhi_cmd; 423 struct mhi_ctxt *mhi_ctxt; 424 425 struct mutex pm_mutex; 426 rwlock_t pm_lock; 427 u32 timeout_ms; 428 u32 ready_timeout_ms; 429 u32 pm_state; 430 u32 db_access; 431 enum mhi_ee_type ee; 432 enum mhi_state dev_state; 433 atomic_t dev_wake; 434 atomic_t pending_pkts; 435 u32 M0, M2, M3; 436 struct list_head transition_list; 437 spinlock_t transition_lock; 438 spinlock_t wlock; 439 struct mhi_link_info mhi_link_info; 440 struct work_struct st_worker; 441 struct workqueue_struct *hiprio_wq; 442 wait_queue_head_t state_event; 443 444 void (*status_cb)(struct mhi_controller *mhi_cntrl, 445 enum mhi_callback cb); 446 void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override); 447 void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override); 448 void (*wake_toggle)(struct mhi_controller *mhi_cntrl); 449 int (*runtime_get)(struct mhi_controller *mhi_cntrl); 450 void (*runtime_put)(struct mhi_controller *mhi_cntrl); 451 int (*map_single)(struct mhi_controller *mhi_cntrl, 452 struct mhi_buf_info *buf); 453 void (*unmap_single)(struct mhi_controller *mhi_cntrl, 454 struct mhi_buf_info *buf); 455 int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, 456 u32 *out); 457 void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, 458 u32 val); 459 void (*reset)(struct mhi_controller *mhi_cntrl); 460 int (*edl_trigger)(struct mhi_controller *mhi_cntrl); 461 462 size_t buffer_len; 463 int index; 464 bool bounce_buf; 465 bool fbc_download; 466 bool wake_set; 467 bool no_m3; 468 unsigned long irq_flags; 469 u32 mru; 470 }; 471 472 /** 473 * struct mhi_device - Structure representing an MHI device which binds 474 * to channels or is associated with controllers 475 * @id: Pointer to MHI device ID struct 476 * @name: Name of the associated MHI device 477 * @mhi_cntrl: Controller the device belongs to 478 * @ul_chan: UL channel for the device 479 * @dl_chan: DL channel for the device 480 * @dev: Driver model device node for the MHI device 481 * @dev_type: MHI device type 482 * @ul_chan_id: MHI channel id for UL transfer 483 * @dl_chan_id: MHI channel id for DL transfer 484 * @dev_wake: Device wakeup counter 485 */ 486 struct mhi_device { 487 const struct mhi_device_id *id; 488 const char *name; 489 struct mhi_controller *mhi_cntrl; 490 struct mhi_chan *ul_chan; 491 struct mhi_chan *dl_chan; 492 struct device dev; 493 enum mhi_device_type dev_type; 494 int ul_chan_id; 495 int dl_chan_id; 496 u32 dev_wake; 497 }; 498 499 /** 500 * struct mhi_result - Completed buffer information 501 * @buf_addr: Address of data buffer 502 * @bytes_xferd: # of bytes transferred 503 * @dir: Channel direction 504 * @transaction_status: Status of last transaction 505 */ 506 struct mhi_result { 507 void *buf_addr; 508 size_t bytes_xferd; 509 enum dma_data_direction dir; 510 int transaction_status; 511 }; 512 513 /** 514 * struct mhi_driver - Structure representing a MHI client driver 515 * @id_table: table of MHI channel names that a driver supports 516 * @probe: CB function for client driver probe function 517 * @remove: CB function for client driver remove function 518 * @ul_xfer_cb: CB function for UL data transfer 519 * @dl_xfer_cb: CB function for DL data transfer 520 * @status_cb: CB functions for asynchronous status 521 * @driver: Device driver model driver 522 */ 523 struct mhi_driver { 524 const struct mhi_device_id *id_table; 525 int (*probe)(struct mhi_device *mhi_dev, 526 const struct mhi_device_id *id); 527 void (*remove)(struct mhi_device *mhi_dev); 528 void (*ul_xfer_cb)(struct mhi_device *mhi_dev, 529 struct mhi_result *result); 530 void (*dl_xfer_cb)(struct mhi_device *mhi_dev, 531 struct mhi_result *result); 532 void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb); 533 struct device_driver driver; 534 }; 535 536 #define to_mhi_driver(drv) container_of_const(drv, struct mhi_driver, driver) 537 #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev) 538 539 /** 540 * mhi_alloc_controller - Allocate the MHI Controller structure 541 * Allocate the mhi_controller structure using zero initialized memory 542 */ 543 struct mhi_controller *mhi_alloc_controller(void); 544 545 /** 546 * mhi_free_controller - Free the MHI Controller structure 547 * @mhi_cntrl: MHI controller to free 548 * Free the mhi_controller structure which was previously allocated 549 */ 550 void mhi_free_controller(struct mhi_controller *mhi_cntrl); 551 552 /** 553 * mhi_register_controller - Register MHI controller 554 * @mhi_cntrl: MHI controller to register 555 * @config: Configuration to use for the controller 556 */ 557 int mhi_register_controller(struct mhi_controller *mhi_cntrl, 558 const struct mhi_controller_config *config); 559 560 /** 561 * mhi_unregister_controller - Unregister MHI controller 562 * @mhi_cntrl: MHI controller to unregister 563 */ 564 void mhi_unregister_controller(struct mhi_controller *mhi_cntrl); 565 566 /* 567 * module_mhi_driver() - Helper macro for drivers that don't do 568 * anything special other than using default mhi_driver_register() and 569 * mhi_driver_unregister(). This eliminates a lot of boilerplate. 570 * Each module may only use this macro once. 571 */ 572 #define module_mhi_driver(mhi_drv) \ 573 module_driver(mhi_drv, mhi_driver_register, \ 574 mhi_driver_unregister) 575 576 /* 577 * Macro to avoid include chaining to get THIS_MODULE 578 */ 579 #define mhi_driver_register(mhi_drv) \ 580 __mhi_driver_register(mhi_drv, THIS_MODULE) 581 582 /** 583 * __mhi_driver_register - Register driver with MHI framework 584 * @mhi_drv: Driver associated with the device 585 * @owner: The module owner 586 */ 587 int __mhi_driver_register(struct mhi_driver *mhi_drv, struct module *owner); 588 589 /** 590 * mhi_driver_unregister - Unregister a driver for mhi_devices 591 * @mhi_drv: Driver associated with the device 592 */ 593 void mhi_driver_unregister(struct mhi_driver *mhi_drv); 594 595 /** 596 * mhi_set_mhi_state - Set MHI device state 597 * @mhi_cntrl: MHI controller 598 * @state: State to set 599 */ 600 void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl, 601 enum mhi_state state); 602 603 /** 604 * mhi_notify - Notify the MHI client driver about client device status 605 * @mhi_dev: MHI device instance 606 * @cb_reason: MHI callback reason 607 */ 608 void mhi_notify(struct mhi_device *mhi_dev, enum mhi_callback cb_reason); 609 610 /** 611 * mhi_get_free_desc_count - Get transfer ring length 612 * Get # of TD available to queue buffers 613 * @mhi_dev: Device associated with the channels 614 * @dir: Direction of the channel 615 */ 616 int mhi_get_free_desc_count(struct mhi_device *mhi_dev, 617 enum dma_data_direction dir); 618 619 /** 620 * mhi_prepare_for_power_up - Do pre-initialization before power up. 621 * This is optional, call this before power up if 622 * the controller does not want bus framework to 623 * automatically free any allocated memory during 624 * shutdown process. 625 * @mhi_cntrl: MHI controller 626 */ 627 int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl); 628 629 /** 630 * mhi_async_power_up - Start MHI power up sequence 631 * @mhi_cntrl: MHI controller 632 */ 633 int mhi_async_power_up(struct mhi_controller *mhi_cntrl); 634 635 /** 636 * mhi_sync_power_up - Start MHI power up sequence and wait till the device 637 * enters valid EE state 638 * @mhi_cntrl: MHI controller 639 */ 640 int mhi_sync_power_up(struct mhi_controller *mhi_cntrl); 641 642 /** 643 * mhi_power_down - Power down the MHI device and also destroy the 644 * 'struct device' for the channels associated with it. 645 * See also mhi_power_down_keep_dev() which is a variant 646 * of this API that keeps the 'struct device' for channels 647 * (useful during suspend/hibernation). 648 * @mhi_cntrl: MHI controller 649 * @graceful: Link is still accessible, so do a graceful shutdown process 650 */ 651 void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful); 652 653 /** 654 * mhi_power_down_keep_dev - Power down the MHI device but keep the 'struct 655 * device' for the channels associated with it. 656 * This is a variant of 'mhi_power_down()' and 657 * useful in scenarios such as suspend/hibernation 658 * where destroying of the 'struct device' is not 659 * needed. 660 * @mhi_cntrl: MHI controller 661 * @graceful: Link is still accessible, so do a graceful shutdown process 662 */ 663 void mhi_power_down_keep_dev(struct mhi_controller *mhi_cntrl, bool graceful); 664 665 /** 666 * mhi_unprepare_after_power_down - Free any allocated memory after power down 667 * @mhi_cntrl: MHI controller 668 */ 669 void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl); 670 671 /** 672 * mhi_pm_suspend - Move MHI into a suspended state 673 * @mhi_cntrl: MHI controller 674 */ 675 int mhi_pm_suspend(struct mhi_controller *mhi_cntrl); 676 677 /** 678 * mhi_pm_resume - Resume MHI from suspended state 679 * @mhi_cntrl: MHI controller 680 */ 681 int mhi_pm_resume(struct mhi_controller *mhi_cntrl); 682 683 /** 684 * mhi_pm_resume_force - Force resume MHI from suspended state 685 * @mhi_cntrl: MHI controller 686 * 687 * Resume the device irrespective of its MHI state. As per the MHI spec, devices 688 * has to be in M3 state during resume. But some devices seem to be in a 689 * different MHI state other than M3 but they continue working fine if allowed. 690 * This API is intented to be used for such devices. 691 * 692 * Return: 0 if the resume succeeds, a negative error code otherwise 693 */ 694 int mhi_pm_resume_force(struct mhi_controller *mhi_cntrl); 695 696 /** 697 * mhi_download_rddm_image - Download ramdump image from device for 698 * debugging purpose. 699 * @mhi_cntrl: MHI controller 700 * @in_panic: Download rddm image during kernel panic 701 */ 702 int mhi_download_rddm_image(struct mhi_controller *mhi_cntrl, bool in_panic); 703 704 /** 705 * mhi_force_rddm_mode - Force device into rddm mode 706 * @mhi_cntrl: MHI controller 707 */ 708 int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl); 709 710 /** 711 * mhi_get_exec_env - Get BHI execution environment of the device 712 * @mhi_cntrl: MHI controller 713 */ 714 enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl); 715 716 /** 717 * mhi_get_mhi_state - Get MHI state of the device 718 * @mhi_cntrl: MHI controller 719 */ 720 enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl); 721 722 /** 723 * mhi_soc_reset - Trigger a device reset. This can be used as a last resort 724 * to reset and recover a device. 725 * @mhi_cntrl: MHI controller 726 */ 727 void mhi_soc_reset(struct mhi_controller *mhi_cntrl); 728 729 /** 730 * mhi_device_get_sync - Disable device low power mode. Synchronously 731 * take the controller out of suspended state 732 * @mhi_dev: Device associated with the channel 733 */ 734 int mhi_device_get_sync(struct mhi_device *mhi_dev); 735 736 /** 737 * mhi_device_put - Re-enable device low power mode 738 * @mhi_dev: Device associated with the channel 739 */ 740 void mhi_device_put(struct mhi_device *mhi_dev); 741 742 /** 743 * mhi_prepare_for_transfer - Setup UL and DL channels for data transfer. 744 * @mhi_dev: Device associated with the channels 745 * 746 * Allocate and initialize the channel context and also issue the START channel 747 * command to both channels. Channels can be started only if both host and 748 * device execution environments match and channels are in a DISABLED state. 749 */ 750 int mhi_prepare_for_transfer(struct mhi_device *mhi_dev); 751 752 /** 753 * mhi_unprepare_from_transfer - Reset UL and DL channels for data transfer. 754 * Issue the RESET channel command and let the 755 * device clean-up the context so no incoming 756 * transfers are seen on the host. Free memory 757 * associated with the context on host. If device 758 * is unresponsive, only perform a host side 759 * clean-up. Channels can be reset only if both 760 * host and device execution environments match 761 * and channels are in an ENABLED, STOPPED or 762 * SUSPENDED state. 763 * @mhi_dev: Device associated with the channels 764 */ 765 void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev); 766 767 /** 768 * mhi_queue_buf - Send or receive raw buffers from client device over MHI 769 * channel 770 * @mhi_dev: Device associated with the channels 771 * @dir: DMA direction for the channel 772 * @buf: Buffer for holding the data 773 * @len: Buffer length 774 * @mflags: MHI transfer flags used for the transfer 775 */ 776 int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir, 777 void *buf, size_t len, enum mhi_flags mflags); 778 779 /** 780 * mhi_queue_skb - Send or receive SKBs from client device over MHI channel 781 * @mhi_dev: Device associated with the channels 782 * @dir: DMA direction for the channel 783 * @skb: Buffer for holding SKBs 784 * @len: Buffer length 785 * @mflags: MHI transfer flags used for the transfer 786 */ 787 int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir, 788 struct sk_buff *skb, size_t len, enum mhi_flags mflags); 789 790 /** 791 * mhi_queue_is_full - Determine whether queueing new elements is possible 792 * @mhi_dev: Device associated with the channels 793 * @dir: DMA direction for the channel 794 */ 795 bool mhi_queue_is_full(struct mhi_device *mhi_dev, enum dma_data_direction dir); 796 797 /** 798 * mhi_get_channel_doorbell_offset - Get the channel doorbell offset 799 * @mhi_cntrl: MHI controller 800 * @chdb_offset: Read channel doorbell offset 801 * 802 * Return: 0 if the read succeeds, a negative error code otherwise 803 */ 804 int mhi_get_channel_doorbell_offset(struct mhi_controller *mhi_cntrl, u32 *chdb_offset); 805 806 #endif /* _MHI_H_ */ 807