1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
3 */
4
5 #if defined(__FreeBSD__)
6 #define LINUXKPI_PARAM_PREFIX rtw88_
7 #endif
8
9 #include <linux/devcoredump.h>
10
11 #include "main.h"
12 #include "regd.h"
13 #include "fw.h"
14 #include "ps.h"
15 #include "sec.h"
16 #include "mac.h"
17 #include "coex.h"
18 #include "phy.h"
19 #include "reg.h"
20 #include "efuse.h"
21 #include "tx.h"
22 #include "debug.h"
23 #include "bf.h"
24 #include "sar.h"
25 #include "sdio.h"
26 #include "led.h"
27
28 bool rtw_disable_lps_deep_mode;
29 EXPORT_SYMBOL(rtw_disable_lps_deep_mode);
30 bool rtw_bf_support = true;
31 unsigned int rtw_debug_mask;
32 EXPORT_SYMBOL(rtw_debug_mask);
33 /* EDCCA is enabled during normal behavior. For debugging purpose in
34 * a noisy environment, it can be disabled via edcca debugfs. Because
35 * all rtw88 devices will probably be affected if environment is noisy,
36 * rtw_edcca_enabled is just declared by driver instead of by device.
37 * So, turning it off will take effect for all rtw88 devices before
38 * there is a tough reason to maintain rtw_edcca_enabled by device.
39 */
40 bool rtw_edcca_enabled = true;
41
42 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644);
43 module_param_named(support_bf, rtw_bf_support, bool, 0644);
44 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
45
46 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS");
47 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support");
48 MODULE_PARM_DESC(debug_mask, "Debugging mask");
49
50 #if defined(__FreeBSD__)
51 static bool rtw_ht_support = false;
52 module_param_named(support_ht, rtw_ht_support, bool, 0644);
53 MODULE_PARM_DESC(support_ht, "Set to Y to enable HT support");
54
55 static bool rtw_vht_support = false;
56 module_param_named(support_vht, rtw_vht_support, bool, 0644);
57 MODULE_PARM_DESC(support_vht, "Set to Y to enable VHT support");
58 #endif
59
60 #if defined(__FreeBSD__)
61 /* Macros based on rtw89::core.c. */
62 #define RTW88_DEF_CHAN(_freq, _hw_val, _flags, _band) \
63 { .center_freq = _freq, .hw_value = _hw_val, .flags = _flags, .band = _band, }
64 #define RTW88_DEF_CHAN_2G(_freq, _hw_val) \
65 RTW88_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_2GHZ)
66 #define RTW88_DEF_CHAN_5G(_freq, _hw_val) \
67 RTW88_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_5GHZ)
68 #define RTW88_DEF_CHAN_5G_NO_HT40MINUS(_freq, _hw_val) \
69 RTW88_DEF_CHAN(_freq, _hw_val, IEEE80211_CHAN_NO_HT40MINUS, NL80211_BAND_5GHZ)
70
71 static struct ieee80211_channel rtw_channeltable_2g[] = {
72 RTW88_DEF_CHAN_2G(2412, 1),
73 RTW88_DEF_CHAN_2G(2417, 2),
74 RTW88_DEF_CHAN_2G(2422, 3),
75 RTW88_DEF_CHAN_2G(2427, 4),
76 RTW88_DEF_CHAN_2G(2432, 5),
77 RTW88_DEF_CHAN_2G(2437, 6),
78 RTW88_DEF_CHAN_2G(2442, 7),
79 RTW88_DEF_CHAN_2G(2447, 8),
80 RTW88_DEF_CHAN_2G(2452, 9),
81 RTW88_DEF_CHAN_2G(2457, 10),
82 RTW88_DEF_CHAN_2G(2462, 11),
83 RTW88_DEF_CHAN_2G(2467, 12),
84 RTW88_DEF_CHAN_2G(2472, 13),
85 RTW88_DEF_CHAN_2G(2484, 14),
86 };
87
88 static struct ieee80211_channel rtw_channeltable_5g[] = {
89 RTW88_DEF_CHAN_5G(5180, 36),
90 RTW88_DEF_CHAN_5G(5200, 40),
91 RTW88_DEF_CHAN_5G(5220, 44),
92 RTW88_DEF_CHAN_5G(5240, 48),
93 RTW88_DEF_CHAN_5G(5260, 52),
94 RTW88_DEF_CHAN_5G(5280, 56),
95 RTW88_DEF_CHAN_5G(5300, 60),
96 RTW88_DEF_CHAN_5G(5320, 64),
97 RTW88_DEF_CHAN_5G(5500, 100),
98 RTW88_DEF_CHAN_5G(5520, 104),
99 RTW88_DEF_CHAN_5G(5540, 108),
100 RTW88_DEF_CHAN_5G(5560, 112),
101 RTW88_DEF_CHAN_5G(5580, 116),
102 RTW88_DEF_CHAN_5G(5600, 120),
103 RTW88_DEF_CHAN_5G(5620, 124),
104 RTW88_DEF_CHAN_5G(5640, 128),
105 RTW88_DEF_CHAN_5G(5660, 132),
106 RTW88_DEF_CHAN_5G(5680, 136),
107 RTW88_DEF_CHAN_5G(5700, 140),
108 RTW88_DEF_CHAN_5G(5720, 144),
109 RTW88_DEF_CHAN_5G(5745, 149),
110 RTW88_DEF_CHAN_5G(5765, 153),
111 RTW88_DEF_CHAN_5G(5785, 157),
112 RTW88_DEF_CHAN_5G(5805, 161),
113 RTW88_DEF_CHAN_5G_NO_HT40MINUS(5825, 165),
114 };
115 #elif deifned(__linux__)
116 static struct ieee80211_channel rtw_channeltable_2g[] = {
117 {.center_freq = 2412, .hw_value = 1,},
118 {.center_freq = 2417, .hw_value = 2,},
119 {.center_freq = 2422, .hw_value = 3,},
120 {.center_freq = 2427, .hw_value = 4,},
121 {.center_freq = 2432, .hw_value = 5,},
122 {.center_freq = 2437, .hw_value = 6,},
123 {.center_freq = 2442, .hw_value = 7,},
124 {.center_freq = 2447, .hw_value = 8,},
125 {.center_freq = 2452, .hw_value = 9,},
126 {.center_freq = 2457, .hw_value = 10,},
127 {.center_freq = 2462, .hw_value = 11,},
128 {.center_freq = 2467, .hw_value = 12,},
129 {.center_freq = 2472, .hw_value = 13,},
130 {.center_freq = 2484, .hw_value = 14,},
131 };
132
133 static struct ieee80211_channel rtw_channeltable_5g[] = {
134 {.center_freq = 5180, .hw_value = 36,},
135 {.center_freq = 5200, .hw_value = 40,},
136 {.center_freq = 5220, .hw_value = 44,},
137 {.center_freq = 5240, .hw_value = 48,},
138 {.center_freq = 5260, .hw_value = 52,},
139 {.center_freq = 5280, .hw_value = 56,},
140 {.center_freq = 5300, .hw_value = 60,},
141 {.center_freq = 5320, .hw_value = 64,},
142 {.center_freq = 5500, .hw_value = 100,},
143 {.center_freq = 5520, .hw_value = 104,},
144 {.center_freq = 5540, .hw_value = 108,},
145 {.center_freq = 5560, .hw_value = 112,},
146 {.center_freq = 5580, .hw_value = 116,},
147 {.center_freq = 5600, .hw_value = 120,},
148 {.center_freq = 5620, .hw_value = 124,},
149 {.center_freq = 5640, .hw_value = 128,},
150 {.center_freq = 5660, .hw_value = 132,},
151 {.center_freq = 5680, .hw_value = 136,},
152 {.center_freq = 5700, .hw_value = 140,},
153 {.center_freq = 5720, .hw_value = 144,},
154 {.center_freq = 5745, .hw_value = 149,},
155 {.center_freq = 5765, .hw_value = 153,},
156 {.center_freq = 5785, .hw_value = 157,},
157 {.center_freq = 5805, .hw_value = 161,},
158 {.center_freq = 5825, .hw_value = 165,
159 .flags = IEEE80211_CHAN_NO_HT40MINUS},
160 };
161 #endif
162
163 static struct ieee80211_rate rtw_ratetable[] = {
164 {.bitrate = 10, .hw_value = 0x00,},
165 {.bitrate = 20, .hw_value = 0x01,},
166 {.bitrate = 55, .hw_value = 0x02,},
167 {.bitrate = 110, .hw_value = 0x03,},
168 {.bitrate = 60, .hw_value = 0x04,},
169 {.bitrate = 90, .hw_value = 0x05,},
170 {.bitrate = 120, .hw_value = 0x06,},
171 {.bitrate = 180, .hw_value = 0x07,},
172 {.bitrate = 240, .hw_value = 0x08,},
173 {.bitrate = 360, .hw_value = 0x09,},
174 {.bitrate = 480, .hw_value = 0x0a,},
175 {.bitrate = 540, .hw_value = 0x0b,},
176 };
177
178 static const struct ieee80211_iface_limit rtw_iface_limits[] = {
179 {
180 .max = 1,
181 .types = BIT(NL80211_IFTYPE_STATION),
182 },
183 {
184 .max = 1,
185 .types = BIT(NL80211_IFTYPE_AP),
186 }
187 };
188
189 static const struct ieee80211_iface_combination rtw_iface_combs[] = {
190 {
191 .limits = rtw_iface_limits,
192 .n_limits = ARRAY_SIZE(rtw_iface_limits),
193 .max_interfaces = 2,
194 .num_different_channels = 1,
195 }
196 };
197
rtw_desc_to_bitrate(u8 desc_rate)198 u16 rtw_desc_to_bitrate(u8 desc_rate)
199 {
200 struct ieee80211_rate rate;
201
202 if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n"))
203 return 0;
204
205 rate = rtw_ratetable[desc_rate];
206
207 return rate.bitrate;
208 }
209
210 static const struct ieee80211_supported_band rtw_band_2ghz = {
211 .band = NL80211_BAND_2GHZ,
212
213 .channels = rtw_channeltable_2g,
214 .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
215
216 .bitrates = rtw_ratetable,
217 .n_bitrates = ARRAY_SIZE(rtw_ratetable),
218
219 .ht_cap = {0},
220 .vht_cap = {0},
221 };
222
223 static const struct ieee80211_supported_band rtw_band_5ghz = {
224 .band = NL80211_BAND_5GHZ,
225
226 .channels = rtw_channeltable_5g,
227 .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
228
229 /* 5G has no CCK rates */
230 .bitrates = rtw_ratetable + 4,
231 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
232
233 .ht_cap = {0},
234 .vht_cap = {0},
235 };
236
237 struct rtw_watch_dog_iter_data {
238 struct rtw_dev *rtwdev;
239 struct rtw_vif *rtwvif;
240 };
241
rtw_dynamic_csi_rate(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif)242 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif)
243 {
244 struct rtw_bf_info *bf_info = &rtwdev->bf_info;
245 u8 fix_rate_enable = 0;
246 u8 new_csi_rate_idx;
247
248 if (rtwvif->bfee.role != RTW_BFEE_SU &&
249 rtwvif->bfee.role != RTW_BFEE_MU)
250 return;
251
252 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi,
253 bf_info->cur_csi_rpt_rate,
254 fix_rate_enable, &new_csi_rate_idx);
255
256 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)
257 bf_info->cur_csi_rpt_rate = new_csi_rate_idx;
258 }
259
rtw_vif_watch_dog_iter(void * data,struct ieee80211_vif * vif)260 static void rtw_vif_watch_dog_iter(void *data, struct ieee80211_vif *vif)
261 {
262 struct rtw_watch_dog_iter_data *iter_data = data;
263 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
264
265 if (vif->type == NL80211_IFTYPE_STATION)
266 if (vif->cfg.assoc)
267 iter_data->rtwvif = rtwvif;
268
269 rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif);
270
271 rtwvif->stats.tx_unicast = 0;
272 rtwvif->stats.rx_unicast = 0;
273 rtwvif->stats.tx_cnt = 0;
274 rtwvif->stats.rx_cnt = 0;
275 }
276
rtw_sw_beacon_loss_check(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,int received_beacons)277 static void rtw_sw_beacon_loss_check(struct rtw_dev *rtwdev,
278 struct rtw_vif *rtwvif, int received_beacons)
279 {
280 int watchdog_delay = 2000000 / 1024; /* TU */
281 int beacon_int, expected_beacons;
282
283 if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_BCN_FILTER) || !rtwvif)
284 return;
285
286 beacon_int = rtwvif_to_vif(rtwvif)->bss_conf.beacon_int;
287 expected_beacons = DIV_ROUND_UP(watchdog_delay, beacon_int);
288
289 rtwdev->beacon_loss = received_beacons < expected_beacons / 2;
290 }
291
292 /* process TX/RX statistics periodically for hardware,
293 * the information helps hardware to enhance performance
294 */
rtw_watch_dog_work(struct work_struct * work)295 static void rtw_watch_dog_work(struct work_struct *work)
296 {
297 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
298 watch_dog_work.work);
299 struct rtw_traffic_stats *stats = &rtwdev->stats;
300 struct rtw_watch_dog_iter_data data = {};
301 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
302 int received_beacons = rtwdev->dm_info.cur_pkt_count.num_bcn_pkt;
303 u32 tx_unicast_mbps, rx_unicast_mbps;
304 bool ps_active;
305
306 mutex_lock(&rtwdev->mutex);
307
308 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
309 goto unlock;
310
311 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
312 RTW_WATCH_DOG_DELAY_TIME);
313
314 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
315 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
316 else
317 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
318
319 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))
320 rtw_coex_wl_status_change_notify(rtwdev, 0);
321
322 if (stats->tx_cnt > RTW_LPS_THRESHOLD ||
323 stats->rx_cnt > RTW_LPS_THRESHOLD)
324 ps_active = true;
325 else
326 ps_active = false;
327
328 tx_unicast_mbps = stats->tx_unicast >> RTW_TP_SHIFT;
329 rx_unicast_mbps = stats->rx_unicast >> RTW_TP_SHIFT;
330
331 ewma_tp_add(&stats->tx_ewma_tp, tx_unicast_mbps);
332 ewma_tp_add(&stats->rx_ewma_tp, rx_unicast_mbps);
333 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
334 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
335
336 /* reset tx/rx statictics */
337 stats->tx_unicast = 0;
338 stats->rx_unicast = 0;
339 stats->tx_cnt = 0;
340 stats->rx_cnt = 0;
341
342 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
343 goto unlock;
344
345 /* make sure BB/RF is working for dynamic mech */
346 rtw_leave_lps(rtwdev);
347 rtw_coex_wl_status_check(rtwdev);
348 rtw_coex_query_bt_hid_list(rtwdev);
349 rtw_coex_active_query_bt_info(rtwdev);
350
351 rtw_phy_dynamic_mechanism(rtwdev);
352
353 rtw_hci_dynamic_rx_agg(rtwdev,
354 tx_unicast_mbps >= 1 || rx_unicast_mbps >= 1);
355
356 data.rtwdev = rtwdev;
357 /* rtw_iterate_vifs internally uses an atomic iterator which is needed
358 * to avoid taking local->iflist_mtx mutex
359 */
360 rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data);
361
362 rtw_sw_beacon_loss_check(rtwdev, data.rtwvif, received_beacons);
363
364 /* fw supports only one station associated to enter lps, if there are
365 * more than two stations associated to the AP, then we can not enter
366 * lps, because fw does not handle the overlapped beacon interval
367 *
368 * rtw_recalc_lps() iterate vifs and determine if driver can enter
369 * ps by vif->type and vif->cfg.ps, all we need to do here is to
370 * get that vif and check if device is having traffic more than the
371 * threshold.
372 */
373 if (rtwdev->ps_enabled && data.rtwvif && !ps_active &&
374 !rtwdev->beacon_loss && !rtwdev->ap_active)
375 rtw_enter_lps(rtwdev, data.rtwvif->port);
376
377 rtwdev->watch_dog_cnt++;
378
379 unlock:
380 mutex_unlock(&rtwdev->mutex);
381 }
382
rtw_c2h_work(struct work_struct * work)383 static void rtw_c2h_work(struct work_struct *work)
384 {
385 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
386 struct sk_buff *skb, *tmp;
387
388 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
389 skb_unlink(skb, &rtwdev->c2h_queue);
390 rtw_fw_c2h_cmd_handle(rtwdev, skb);
391 dev_kfree_skb_any(skb);
392 }
393 }
394
rtw_ips_work(struct work_struct * work)395 static void rtw_ips_work(struct work_struct *work)
396 {
397 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work);
398
399 mutex_lock(&rtwdev->mutex);
400 if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)
401 rtw_enter_ips(rtwdev);
402 mutex_unlock(&rtwdev->mutex);
403 }
404
rtw_sta_rc_work(struct work_struct * work)405 static void rtw_sta_rc_work(struct work_struct *work)
406 {
407 struct rtw_sta_info *si = container_of(work, struct rtw_sta_info,
408 rc_work);
409 struct rtw_dev *rtwdev = si->rtwdev;
410
411 mutex_lock(&rtwdev->mutex);
412 rtw_update_sta_info(rtwdev, si, true);
413 mutex_unlock(&rtwdev->mutex);
414 }
415
rtw_sta_add(struct rtw_dev * rtwdev,struct ieee80211_sta * sta,struct ieee80211_vif * vif)416 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
417 struct ieee80211_vif *vif)
418 {
419 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
420 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
421 int i;
422
423 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
424 si->mac_id = rtwvif->mac_id;
425 } else {
426 si->mac_id = rtw_acquire_macid(rtwdev);
427 if (si->mac_id >= RTW_MAX_MAC_ID_NUM)
428 return -ENOSPC;
429 }
430
431 si->rtwdev = rtwdev;
432 si->sta = sta;
433 si->vif = vif;
434 si->init_ra_lv = 1;
435 ewma_rssi_init(&si->avg_rssi);
436 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
437 rtw_txq_init(rtwdev, sta->txq[i]);
438 INIT_WORK(&si->rc_work, rtw_sta_rc_work);
439
440 rtw_update_sta_info(rtwdev, si, true);
441 rtw_fw_media_status_report(rtwdev, si->mac_id, true);
442
443 rtwdev->sta_cnt++;
444 rtwdev->beacon_loss = false;
445 #if defined(__linux__)
446 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n",
447 sta->addr, si->mac_id);
448 #elif defined(__FreeBSD__)
449 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D joined with macid %d\n",
450 sta->addr, ":", si->mac_id);
451 #endif
452
453 return 0;
454 }
455
rtw_sta_remove(struct rtw_dev * rtwdev,struct ieee80211_sta * sta,bool fw_exist)456 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
457 bool fw_exist)
458 {
459 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
460 struct ieee80211_vif *vif = si->vif;
461 int i;
462
463 cancel_work_sync(&si->rc_work);
464
465 if (vif->type != NL80211_IFTYPE_STATION || sta->tdls)
466 rtw_release_macid(rtwdev, si->mac_id);
467 if (fw_exist)
468 rtw_fw_media_status_report(rtwdev, si->mac_id, false);
469
470 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
471 rtw_txq_cleanup(rtwdev, sta->txq[i]);
472
473 kfree(si->mask);
474
475 rtwdev->sta_cnt--;
476 #if defined(__linux__)
477 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n",
478 sta->addr, si->mac_id);
479 #elif defined(__FreeBSD__)
480 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D with macid %d left\n",
481 sta->addr, ":", si->mac_id);
482 #endif
483 }
484
485 struct rtw_fwcd_hdr {
486 u32 item;
487 u32 size;
488 u32 padding1;
489 u32 padding2;
490 } __packed;
491
rtw_fwcd_prep(struct rtw_dev * rtwdev)492 static int rtw_fwcd_prep(struct rtw_dev *rtwdev)
493 {
494 const struct rtw_chip_info *chip = rtwdev->chip;
495 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
496 const struct rtw_fwcd_segs *segs = chip->fwcd_segs;
497 u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr);
498 u8 i;
499
500 if (segs) {
501 prep_size += segs->num * sizeof(struct rtw_fwcd_hdr);
502
503 for (i = 0; i < segs->num; i++)
504 prep_size += segs->segs[i];
505 }
506
507 desc->data = vmalloc(prep_size);
508 if (!desc->data)
509 return -ENOMEM;
510
511 desc->size = prep_size;
512 desc->next = desc->data;
513
514 return 0;
515 }
516
rtw_fwcd_next(struct rtw_dev * rtwdev,u32 item,u32 size)517 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size)
518 {
519 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
520 struct rtw_fwcd_hdr *hdr;
521 u8 *next;
522
523 if (!desc->data) {
524 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n");
525 return NULL;
526 }
527
528 next = desc->next + sizeof(struct rtw_fwcd_hdr);
529 if (next - desc->data + size > desc->size) {
530 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n");
531 return NULL;
532 }
533
534 hdr = (struct rtw_fwcd_hdr *)(desc->next);
535 hdr->item = item;
536 hdr->size = size;
537 hdr->padding1 = 0x01234567;
538 hdr->padding2 = 0x89abcdef;
539 desc->next = next + size;
540
541 return next;
542 }
543
rtw_fwcd_dump(struct rtw_dev * rtwdev)544 static void rtw_fwcd_dump(struct rtw_dev *rtwdev)
545 {
546 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
547
548 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n");
549
550 /* Data will be freed after lifetime of device coredump. After calling
551 * dev_coredump, data is supposed to be handled by the device coredump
552 * framework. Note that a new dump will be discarded if a previous one
553 * hasn't been released yet.
554 */
555 dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL);
556 }
557
rtw_fwcd_free(struct rtw_dev * rtwdev,bool free_self)558 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self)
559 {
560 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
561
562 if (free_self) {
563 rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n");
564 vfree(desc->data);
565 }
566
567 desc->data = NULL;
568 desc->next = NULL;
569 }
570
rtw_fw_dump_crash_log(struct rtw_dev * rtwdev)571 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev)
572 {
573 u32 size = rtwdev->chip->fw_rxff_size;
574 u32 *buf;
575 u8 seq;
576
577 buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size);
578 if (!buf)
579 return -ENOMEM;
580
581 if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) {
582 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n");
583 return -EINVAL;
584 }
585
586 if (GET_FW_DUMP_LEN(buf) == 0) {
587 rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n");
588 return -EINVAL;
589 }
590
591 seq = GET_FW_DUMP_SEQ(buf);
592 if (seq > 0) {
593 rtw_dbg(rtwdev, RTW_DBG_FW,
594 "fw crash dump's seq is wrong: %d\n", seq);
595 return -EINVAL;
596 }
597
598 return 0;
599 }
600
rtw_dump_fw(struct rtw_dev * rtwdev,const u32 ocp_src,u32 size,u32 fwcd_item)601 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size,
602 u32 fwcd_item)
603 {
604 u32 rxff = rtwdev->chip->fw_rxff_size;
605 u32 dump_size, done_size = 0;
606 u8 *buf;
607 int ret;
608
609 buf = rtw_fwcd_next(rtwdev, fwcd_item, size);
610 if (!buf)
611 return -ENOMEM;
612
613 while (size) {
614 dump_size = size > rxff ? rxff : size;
615
616 ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size,
617 dump_size);
618 if (ret) {
619 rtw_err(rtwdev,
620 "ddma fw 0x%x [+0x%x] to fw fifo fail\n",
621 ocp_src, done_size);
622 return ret;
623 }
624
625 ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0,
626 dump_size, (u32 *)(buf + done_size));
627 if (ret) {
628 rtw_err(rtwdev,
629 "dump fw 0x%x [+0x%x] from fw fifo fail\n",
630 ocp_src, done_size);
631 return ret;
632 }
633
634 size -= dump_size;
635 done_size += dump_size;
636 }
637
638 return 0;
639 }
640 EXPORT_SYMBOL(rtw_dump_fw);
641
rtw_dump_reg(struct rtw_dev * rtwdev,const u32 addr,const u32 size)642 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size)
643 {
644 u8 *buf;
645 u32 i;
646
647 if (addr & 0x3) {
648 WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr);
649 return -EINVAL;
650 }
651
652 buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size);
653 if (!buf)
654 return -ENOMEM;
655
656 for (i = 0; i < size; i += 4)
657 *(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i);
658
659 return 0;
660 }
661 EXPORT_SYMBOL(rtw_dump_reg);
662
rtw_vif_assoc_changed(struct rtw_vif * rtwvif,struct ieee80211_bss_conf * conf)663 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif,
664 struct ieee80211_bss_conf *conf)
665 {
666 struct ieee80211_vif *vif = NULL;
667
668 if (conf)
669 vif = container_of(conf, struct ieee80211_vif, bss_conf);
670
671 if (conf && vif->cfg.assoc) {
672 rtwvif->aid = vif->cfg.aid;
673 rtwvif->net_type = RTW_NET_MGD_LINKED;
674 } else {
675 rtwvif->aid = 0;
676 rtwvif->net_type = RTW_NET_NO_LINK;
677 }
678 }
679
rtw_reset_key_iter(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key,void * data)680 static void rtw_reset_key_iter(struct ieee80211_hw *hw,
681 struct ieee80211_vif *vif,
682 struct ieee80211_sta *sta,
683 struct ieee80211_key_conf *key,
684 void *data)
685 {
686 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
687 struct rtw_sec_desc *sec = &rtwdev->sec;
688
689 rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx);
690 }
691
rtw_reset_sta_iter(void * data,struct ieee80211_sta * sta)692 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta)
693 {
694 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
695
696 if (rtwdev->sta_cnt == 0) {
697 rtw_warn(rtwdev, "sta count before reset should not be 0\n");
698 return;
699 }
700 rtw_sta_remove(rtwdev, sta, false);
701 }
702
rtw_reset_vif_iter(void * data,u8 * mac,struct ieee80211_vif * vif)703 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
704 {
705 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
706 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
707
708 rtw_bf_disassoc(rtwdev, vif, NULL);
709 rtw_vif_assoc_changed(rtwvif, NULL);
710 rtw_txq_cleanup(rtwdev, vif->txq);
711
712 rtw_release_macid(rtwdev, rtwvif->mac_id);
713 }
714
rtw_fw_recovery(struct rtw_dev * rtwdev)715 void rtw_fw_recovery(struct rtw_dev *rtwdev)
716 {
717 if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags))
718 ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work);
719 }
720 EXPORT_SYMBOL(rtw_fw_recovery);
721
__fw_recovery_work(struct rtw_dev * rtwdev)722 static void __fw_recovery_work(struct rtw_dev *rtwdev)
723 {
724 int ret = 0;
725
726 set_bit(RTW_FLAG_RESTARTING, rtwdev->flags);
727 clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags);
728
729 ret = rtw_fwcd_prep(rtwdev);
730 if (ret)
731 goto free;
732 ret = rtw_fw_dump_crash_log(rtwdev);
733 if (ret)
734 goto free;
735 ret = rtw_chip_dump_fw_crash(rtwdev);
736 if (ret)
737 goto free;
738
739 rtw_fwcd_dump(rtwdev);
740 free:
741 rtw_fwcd_free(rtwdev, !!ret);
742 rtw_write8(rtwdev, REG_MCU_TST_CFG, 0);
743
744 WARN(1, "firmware crash, start reset and recover\n");
745
746 rcu_read_lock();
747 rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev);
748 rcu_read_unlock();
749 rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev);
750 rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev);
751 bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM);
752 rtw_enter_ips(rtwdev);
753 }
754
rtw_fw_recovery_work(struct work_struct * work)755 static void rtw_fw_recovery_work(struct work_struct *work)
756 {
757 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
758 fw_recovery_work);
759
760 mutex_lock(&rtwdev->mutex);
761 __fw_recovery_work(rtwdev);
762 mutex_unlock(&rtwdev->mutex);
763
764 ieee80211_restart_hw(rtwdev->hw);
765 }
766
767 struct rtw_txq_ba_iter_data {
768 };
769
rtw_txq_ba_iter(void * data,struct ieee80211_sta * sta)770 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta)
771 {
772 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
773 int ret;
774 u8 tid;
775
776 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
777 while (tid != IEEE80211_NUM_TIDS) {
778 clear_bit(tid, si->tid_ba);
779 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
780 if (ret == -EINVAL) {
781 struct ieee80211_txq *txq;
782 struct rtw_txq *rtwtxq;
783
784 txq = sta->txq[tid];
785 rtwtxq = (struct rtw_txq *)txq->drv_priv;
786 set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags);
787 }
788
789 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
790 }
791 }
792
rtw_txq_ba_work(struct work_struct * work)793 static void rtw_txq_ba_work(struct work_struct *work)
794 {
795 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work);
796 struct rtw_txq_ba_iter_data data;
797
798 rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data);
799 }
800
rtw_set_rx_freq_band(struct rtw_rx_pkt_stat * pkt_stat,u8 channel)801 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel)
802 {
803 if (IS_CH_2G_BAND(channel))
804 pkt_stat->band = NL80211_BAND_2GHZ;
805 else if (IS_CH_5G_BAND(channel))
806 pkt_stat->band = NL80211_BAND_5GHZ;
807 else
808 return;
809
810 pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band);
811 }
812 EXPORT_SYMBOL(rtw_set_rx_freq_band);
813
rtw_set_dtim_period(struct rtw_dev * rtwdev,int dtim_period)814 void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period)
815 {
816 rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE);
817 rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1);
818 }
819
rtw_update_channel(struct rtw_dev * rtwdev,u8 center_channel,u8 primary_channel,enum rtw_supported_band band,enum rtw_bandwidth bandwidth)820 void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel,
821 u8 primary_channel, enum rtw_supported_band band,
822 enum rtw_bandwidth bandwidth)
823 {
824 enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band);
825 struct rtw_hal *hal = &rtwdev->hal;
826 u8 *cch_by_bw = hal->cch_by_bw;
827 u32 center_freq, primary_freq;
828 enum rtw_sar_bands sar_band;
829 u8 primary_channel_idx;
830
831 center_freq = ieee80211_channel_to_frequency(center_channel, nl_band);
832 primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band);
833
834 /* assign the center channel used while 20M bw is selected */
835 cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel;
836
837 /* assign the center channel used while current bw is selected */
838 cch_by_bw[bandwidth] = center_channel;
839
840 switch (bandwidth) {
841 case RTW_CHANNEL_WIDTH_20:
842 default:
843 primary_channel_idx = RTW_SC_DONT_CARE;
844 break;
845 case RTW_CHANNEL_WIDTH_40:
846 if (primary_freq > center_freq)
847 primary_channel_idx = RTW_SC_20_UPPER;
848 else
849 primary_channel_idx = RTW_SC_20_LOWER;
850 break;
851 case RTW_CHANNEL_WIDTH_80:
852 if (primary_freq > center_freq) {
853 if (primary_freq - center_freq == 10)
854 primary_channel_idx = RTW_SC_20_UPPER;
855 else
856 primary_channel_idx = RTW_SC_20_UPMOST;
857
858 /* assign the center channel used
859 * while 40M bw is selected
860 */
861 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4;
862 } else {
863 if (center_freq - primary_freq == 10)
864 primary_channel_idx = RTW_SC_20_LOWER;
865 else
866 primary_channel_idx = RTW_SC_20_LOWEST;
867
868 /* assign the center channel used
869 * while 40M bw is selected
870 */
871 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4;
872 }
873 break;
874 }
875
876 switch (center_channel) {
877 case 1 ... 14:
878 sar_band = RTW_SAR_BAND_0;
879 break;
880 case 36 ... 64:
881 sar_band = RTW_SAR_BAND_1;
882 break;
883 case 100 ... 144:
884 sar_band = RTW_SAR_BAND_3;
885 break;
886 case 149 ... 177:
887 sar_band = RTW_SAR_BAND_4;
888 break;
889 default:
890 WARN(1, "unknown ch(%u) to SAR band\n", center_channel);
891 sar_band = RTW_SAR_BAND_0;
892 break;
893 }
894
895 hal->current_primary_channel_index = primary_channel_idx;
896 hal->current_band_width = bandwidth;
897 hal->primary_channel = primary_channel;
898 hal->current_channel = center_channel;
899 hal->current_band_type = band;
900 hal->sar_band = sar_band;
901 }
902
rtw_get_channel_params(struct cfg80211_chan_def * chandef,struct rtw_channel_params * chan_params)903 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
904 struct rtw_channel_params *chan_params)
905 {
906 struct ieee80211_channel *channel = chandef->chan;
907 enum nl80211_chan_width width = chandef->width;
908 u32 primary_freq, center_freq;
909 u8 center_chan;
910 u8 bandwidth = RTW_CHANNEL_WIDTH_20;
911
912 center_chan = channel->hw_value;
913 primary_freq = channel->center_freq;
914 center_freq = chandef->center_freq1;
915
916 switch (width) {
917 case NL80211_CHAN_WIDTH_20_NOHT:
918 case NL80211_CHAN_WIDTH_20:
919 bandwidth = RTW_CHANNEL_WIDTH_20;
920 break;
921 case NL80211_CHAN_WIDTH_40:
922 bandwidth = RTW_CHANNEL_WIDTH_40;
923 if (primary_freq > center_freq)
924 center_chan -= 2;
925 else
926 center_chan += 2;
927 break;
928 case NL80211_CHAN_WIDTH_80:
929 bandwidth = RTW_CHANNEL_WIDTH_80;
930 if (primary_freq > center_freq) {
931 if (primary_freq - center_freq == 10)
932 center_chan -= 2;
933 else
934 center_chan -= 6;
935 } else {
936 if (center_freq - primary_freq == 10)
937 center_chan += 2;
938 else
939 center_chan += 6;
940 }
941 break;
942 default:
943 center_chan = 0;
944 break;
945 }
946
947 chan_params->center_chan = center_chan;
948 chan_params->bandwidth = bandwidth;
949 chan_params->primary_chan = channel->hw_value;
950 }
951
rtw_set_channel(struct rtw_dev * rtwdev)952 void rtw_set_channel(struct rtw_dev *rtwdev)
953 {
954 const struct rtw_chip_info *chip = rtwdev->chip;
955 struct ieee80211_hw *hw = rtwdev->hw;
956 struct rtw_hal *hal = &rtwdev->hal;
957 struct rtw_channel_params ch_param;
958 u8 center_chan, primary_chan, bandwidth, band;
959
960 rtw_get_channel_params(&hw->conf.chandef, &ch_param);
961 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
962 return;
963
964 center_chan = ch_param.center_chan;
965 primary_chan = ch_param.primary_chan;
966 bandwidth = ch_param.bandwidth;
967 band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
968
969 rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth);
970
971 if (rtwdev->scan_info.op_chan)
972 rtw_store_op_chan(rtwdev, true);
973
974 chip->ops->set_channel(rtwdev, center_chan, bandwidth,
975 hal->current_primary_channel_index);
976
977 if (hal->current_band_type == RTW_BAND_5G) {
978 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
979 } else {
980 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
981 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
982 else
983 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
984 }
985
986 rtw_phy_set_tx_power_level(rtwdev, center_chan);
987
988 /* if the channel isn't set for scanning, we will do RF calibration
989 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration
990 * during scanning on each channel takes too long.
991 */
992 if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
993 rtwdev->need_rfk = true;
994 }
995
rtw_chip_prepare_tx(struct rtw_dev * rtwdev)996 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev)
997 {
998 const struct rtw_chip_info *chip = rtwdev->chip;
999
1000 if (rtwdev->need_rfk) {
1001 rtwdev->need_rfk = false;
1002 chip->ops->phy_calibration(rtwdev);
1003 }
1004 }
1005
rtw_vif_write_addr(struct rtw_dev * rtwdev,u32 start,u8 * addr)1006 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
1007 {
1008 int i;
1009
1010 for (i = 0; i < ETH_ALEN; i++)
1011 rtw_write8(rtwdev, start + i, addr[i]);
1012 }
1013
rtw_vif_port_config(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,u32 config)1014 void rtw_vif_port_config(struct rtw_dev *rtwdev,
1015 struct rtw_vif *rtwvif,
1016 u32 config)
1017 {
1018 u32 addr, mask;
1019
1020 if (config & PORT_SET_MAC_ADDR) {
1021 addr = rtwvif->conf->mac_addr.addr;
1022 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
1023 }
1024 if (config & PORT_SET_BSSID) {
1025 addr = rtwvif->conf->bssid.addr;
1026 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
1027 }
1028 if (config & PORT_SET_NET_TYPE) {
1029 addr = rtwvif->conf->net_type.addr;
1030 mask = rtwvif->conf->net_type.mask;
1031 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
1032 }
1033 if (config & PORT_SET_AID) {
1034 addr = rtwvif->conf->aid.addr;
1035 mask = rtwvif->conf->aid.mask;
1036 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
1037 }
1038 if (config & PORT_SET_BCN_CTRL) {
1039 addr = rtwvif->conf->bcn_ctrl.addr;
1040 mask = rtwvif->conf->bcn_ctrl.mask;
1041 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
1042 }
1043 }
1044
hw_bw_cap_to_bitamp(u8 bw_cap)1045 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
1046 {
1047 u8 bw = 0;
1048
1049 switch (bw_cap) {
1050 case EFUSE_HW_CAP_IGNORE:
1051 case EFUSE_HW_CAP_SUPP_BW80:
1052 bw |= BIT(RTW_CHANNEL_WIDTH_80);
1053 fallthrough;
1054 case EFUSE_HW_CAP_SUPP_BW40:
1055 bw |= BIT(RTW_CHANNEL_WIDTH_40);
1056 fallthrough;
1057 default:
1058 bw |= BIT(RTW_CHANNEL_WIDTH_20);
1059 break;
1060 }
1061
1062 return bw;
1063 }
1064
rtw_hw_config_rf_ant_num(struct rtw_dev * rtwdev,u8 hw_ant_num)1065 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
1066 {
1067 const struct rtw_chip_info *chip = rtwdev->chip;
1068 struct rtw_hal *hal = &rtwdev->hal;
1069
1070 if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
1071 hw_ant_num >= hal->rf_path_num)
1072 return;
1073
1074 switch (hw_ant_num) {
1075 case 1:
1076 hal->rf_type = RF_1T1R;
1077 hal->rf_path_num = 1;
1078 if (!chip->fix_rf_phy_num)
1079 hal->rf_phy_num = hal->rf_path_num;
1080 hal->antenna_tx = BB_PATH_A;
1081 hal->antenna_rx = BB_PATH_A;
1082 break;
1083 default:
1084 WARN(1, "invalid hw configuration from efuse\n");
1085 break;
1086 }
1087 }
1088
get_vht_ra_mask(struct ieee80211_sta * sta)1089 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
1090 {
1091 u64 ra_mask = 0;
1092 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
1093 u8 vht_mcs_cap;
1094 int i, nss;
1095
1096 /* 4SS, every two bits for MCS7/8/9 */
1097 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
1098 vht_mcs_cap = mcs_map & 0x3;
1099 switch (vht_mcs_cap) {
1100 case 2: /* MCS9 */
1101 ra_mask |= 0x3ffULL << nss;
1102 break;
1103 case 1: /* MCS8 */
1104 ra_mask |= 0x1ffULL << nss;
1105 break;
1106 case 0: /* MCS7 */
1107 ra_mask |= 0x0ffULL << nss;
1108 break;
1109 default:
1110 break;
1111 }
1112 }
1113
1114 return ra_mask;
1115 }
1116
get_rate_id(u8 wireless_set,enum rtw_bandwidth bw_mode,u8 tx_num)1117 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
1118 {
1119 u8 rate_id = 0;
1120
1121 switch (wireless_set) {
1122 case WIRELESS_CCK:
1123 rate_id = RTW_RATEID_B_20M;
1124 break;
1125 case WIRELESS_OFDM:
1126 rate_id = RTW_RATEID_G;
1127 break;
1128 case WIRELESS_CCK | WIRELESS_OFDM:
1129 rate_id = RTW_RATEID_BG;
1130 break;
1131 case WIRELESS_OFDM | WIRELESS_HT:
1132 if (tx_num == 1)
1133 rate_id = RTW_RATEID_GN_N1SS;
1134 else if (tx_num == 2)
1135 rate_id = RTW_RATEID_GN_N2SS;
1136 else if (tx_num == 3)
1137 rate_id = RTW_RATEID_ARFR5_N_3SS;
1138 break;
1139 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
1140 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
1141 if (tx_num == 1)
1142 rate_id = RTW_RATEID_BGN_40M_1SS;
1143 else if (tx_num == 2)
1144 rate_id = RTW_RATEID_BGN_40M_2SS;
1145 else if (tx_num == 3)
1146 rate_id = RTW_RATEID_ARFR5_N_3SS;
1147 else if (tx_num == 4)
1148 rate_id = RTW_RATEID_ARFR7_N_4SS;
1149 } else {
1150 if (tx_num == 1)
1151 rate_id = RTW_RATEID_BGN_20M_1SS;
1152 else if (tx_num == 2)
1153 rate_id = RTW_RATEID_BGN_20M_2SS;
1154 else if (tx_num == 3)
1155 rate_id = RTW_RATEID_ARFR5_N_3SS;
1156 else if (tx_num == 4)
1157 rate_id = RTW_RATEID_ARFR7_N_4SS;
1158 }
1159 break;
1160 case WIRELESS_OFDM | WIRELESS_VHT:
1161 if (tx_num == 1)
1162 rate_id = RTW_RATEID_ARFR1_AC_1SS;
1163 else if (tx_num == 2)
1164 rate_id = RTW_RATEID_ARFR0_AC_2SS;
1165 else if (tx_num == 3)
1166 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1167 else if (tx_num == 4)
1168 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1169 break;
1170 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
1171 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
1172 if (tx_num == 1)
1173 rate_id = RTW_RATEID_ARFR1_AC_1SS;
1174 else if (tx_num == 2)
1175 rate_id = RTW_RATEID_ARFR0_AC_2SS;
1176 else if (tx_num == 3)
1177 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1178 else if (tx_num == 4)
1179 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1180 } else {
1181 if (tx_num == 1)
1182 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
1183 else if (tx_num == 2)
1184 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
1185 else if (tx_num == 3)
1186 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1187 else if (tx_num == 4)
1188 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1189 }
1190 break;
1191 default:
1192 break;
1193 }
1194
1195 return rate_id;
1196 }
1197
1198 #define RA_MASK_CCK_RATES 0x0000f
1199 #define RA_MASK_OFDM_RATES 0x00ff0
1200 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)
1201 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)
1202 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)
1203 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \
1204 RA_MASK_HT_RATES_2SS | \
1205 RA_MASK_HT_RATES_3SS)
1206 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)
1207 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)
1208 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)
1209 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \
1210 RA_MASK_VHT_RATES_2SS | \
1211 RA_MASK_VHT_RATES_3SS)
1212 #define RA_MASK_CCK_IN_BG 0x00005
1213 #define RA_MASK_CCK_IN_HT 0x00005
1214 #define RA_MASK_CCK_IN_VHT 0x00005
1215 #define RA_MASK_OFDM_IN_VHT 0x00010
1216 #define RA_MASK_OFDM_IN_HT_2G 0x00010
1217 #define RA_MASK_OFDM_IN_HT_5G 0x00030
1218
rtw_rate_mask_rssi(struct rtw_sta_info * si,u8 wireless_set)1219 static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set)
1220 {
1221 u8 rssi_level = si->rssi_level;
1222
1223 if (wireless_set == WIRELESS_CCK)
1224 return 0xffffffffffffffffULL;
1225
1226 if (rssi_level == 0)
1227 return 0xffffffffffffffffULL;
1228 else if (rssi_level == 1)
1229 return 0xfffffffffffffff0ULL;
1230 else if (rssi_level == 2)
1231 return 0xffffffffffffefe0ULL;
1232 else if (rssi_level == 3)
1233 return 0xffffffffffffcfc0ULL;
1234 else if (rssi_level == 4)
1235 return 0xffffffffffff8f80ULL;
1236 else
1237 return 0xffffffffffff0f00ULL;
1238 }
1239
rtw_rate_mask_recover(u64 ra_mask,u64 ra_mask_bak)1240 static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak)
1241 {
1242 if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0)
1243 ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1244
1245 if (ra_mask == 0)
1246 ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1247
1248 return ra_mask;
1249 }
1250
rtw_rate_mask_cfg(struct rtw_dev * rtwdev,struct rtw_sta_info * si,u64 ra_mask,bool is_vht_enable)1251 static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1252 u64 ra_mask, bool is_vht_enable)
1253 {
1254 struct rtw_hal *hal = &rtwdev->hal;
1255 const struct cfg80211_bitrate_mask *mask = si->mask;
1256 u64 cfg_mask = GENMASK_ULL(63, 0);
1257 u8 band;
1258
1259 if (!si->use_cfg_mask)
1260 return ra_mask;
1261
1262 band = hal->current_band_type;
1263 if (band == RTW_BAND_2G) {
1264 band = NL80211_BAND_2GHZ;
1265 cfg_mask = mask->control[band].legacy;
1266 } else if (band == RTW_BAND_5G) {
1267 band = NL80211_BAND_5GHZ;
1268 cfg_mask = u64_encode_bits(mask->control[band].legacy,
1269 RA_MASK_OFDM_RATES);
1270 }
1271
1272 if (!is_vht_enable) {
1273 if (ra_mask & RA_MASK_HT_RATES_1SS)
1274 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0],
1275 RA_MASK_HT_RATES_1SS);
1276 if (ra_mask & RA_MASK_HT_RATES_2SS)
1277 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1],
1278 RA_MASK_HT_RATES_2SS);
1279 } else {
1280 if (ra_mask & RA_MASK_VHT_RATES_1SS)
1281 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0],
1282 RA_MASK_VHT_RATES_1SS);
1283 if (ra_mask & RA_MASK_VHT_RATES_2SS)
1284 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1],
1285 RA_MASK_VHT_RATES_2SS);
1286 }
1287
1288 ra_mask &= cfg_mask;
1289
1290 return ra_mask;
1291 }
1292
rtw_update_sta_info(struct rtw_dev * rtwdev,struct rtw_sta_info * si,bool reset_ra_mask)1293 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1294 bool reset_ra_mask)
1295 {
1296 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1297 struct ieee80211_sta *sta = si->sta;
1298 struct rtw_efuse *efuse = &rtwdev->efuse;
1299 struct rtw_hal *hal = &rtwdev->hal;
1300 u8 wireless_set;
1301 u8 bw_mode;
1302 u8 rate_id;
1303 u8 stbc_en = 0;
1304 u8 ldpc_en = 0;
1305 u8 tx_num = 1;
1306 u64 ra_mask = 0;
1307 u64 ra_mask_bak = 0;
1308 bool is_vht_enable = false;
1309 bool is_support_sgi = false;
1310
1311 if (sta->deflink.vht_cap.vht_supported) {
1312 is_vht_enable = true;
1313 ra_mask |= get_vht_ra_mask(sta);
1314 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
1315 stbc_en = VHT_STBC_EN;
1316 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
1317 ldpc_en = VHT_LDPC_EN;
1318 } else if (sta->deflink.ht_cap.ht_supported) {
1319 ra_mask |= ((u64)sta->deflink.ht_cap.mcs.rx_mask[3] << 36) |
1320 ((u64)sta->deflink.ht_cap.mcs.rx_mask[2] << 28) |
1321 (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) |
1322 (sta->deflink.ht_cap.mcs.rx_mask[0] << 12);
1323 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1324 stbc_en = HT_STBC_EN;
1325 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
1326 ldpc_en = HT_LDPC_EN;
1327 }
1328
1329 if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)
1330 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
1331 else if (efuse->hw_cap.nss == 2)
1332 ra_mask &= RA_MASK_VHT_RATES_2SS | RA_MASK_HT_RATES_2SS |
1333 RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
1334
1335 if (hal->current_band_type == RTW_BAND_5G) {
1336 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4;
1337 ra_mask_bak = ra_mask;
1338 if (sta->deflink.vht_cap.vht_supported) {
1339 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
1340 wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
1341 } else if (sta->deflink.ht_cap.ht_supported) {
1342 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
1343 wireless_set = WIRELESS_OFDM | WIRELESS_HT;
1344 } else {
1345 wireless_set = WIRELESS_OFDM;
1346 }
1347 dm_info->rrsr_val_init = RRSR_INIT_5G;
1348 } else if (hal->current_band_type == RTW_BAND_2G) {
1349 ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ];
1350 ra_mask_bak = ra_mask;
1351 if (sta->deflink.vht_cap.vht_supported) {
1352 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
1353 RA_MASK_OFDM_IN_VHT;
1354 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1355 WIRELESS_HT | WIRELESS_VHT;
1356 } else if (sta->deflink.ht_cap.ht_supported) {
1357 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
1358 RA_MASK_OFDM_IN_HT_2G;
1359 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1360 WIRELESS_HT;
1361 #if defined(__linux__)
1362 } else if (sta->deflink.supp_rates[0] <= 0xf) {
1363 #elif defined(__FreeBSD__)
1364 } else if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] <= 0xf) {
1365 #endif
1366 wireless_set = WIRELESS_CCK;
1367 } else {
1368 ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG;
1369 wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
1370 }
1371 dm_info->rrsr_val_init = RRSR_INIT_2G;
1372 } else {
1373 rtw_err(rtwdev, "Unknown band type\n");
1374 ra_mask_bak = ra_mask;
1375 wireless_set = 0;
1376 }
1377
1378 switch (sta->deflink.bandwidth) {
1379 case IEEE80211_STA_RX_BW_80:
1380 bw_mode = RTW_CHANNEL_WIDTH_80;
1381 is_support_sgi = sta->deflink.vht_cap.vht_supported &&
1382 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80);
1383 break;
1384 case IEEE80211_STA_RX_BW_40:
1385 bw_mode = RTW_CHANNEL_WIDTH_40;
1386 is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1387 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40);
1388 break;
1389 default:
1390 bw_mode = RTW_CHANNEL_WIDTH_20;
1391 is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1392 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20);
1393 break;
1394 }
1395
1396 if (sta->deflink.vht_cap.vht_supported ||
1397 sta->deflink.ht_cap.ht_supported)
1398 tx_num = efuse->hw_cap.nss;
1399
1400 rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
1401
1402 ra_mask &= rtw_rate_mask_rssi(si, wireless_set);
1403 ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak);
1404 ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable);
1405
1406 si->bw_mode = bw_mode;
1407 si->stbc_en = stbc_en;
1408 si->ldpc_en = ldpc_en;
1409 si->sgi_enable = is_support_sgi;
1410 si->vht_enable = is_vht_enable;
1411 si->ra_mask = ra_mask;
1412 si->rate_id = rate_id;
1413
1414 rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask);
1415 }
1416
rtw_wait_firmware_completion(struct rtw_dev * rtwdev)1417 int rtw_wait_firmware_completion(struct rtw_dev *rtwdev)
1418 {
1419 const struct rtw_chip_info *chip = rtwdev->chip;
1420 struct rtw_fw_state *fw;
1421 int ret = 0;
1422
1423 fw = &rtwdev->fw;
1424 wait_for_completion(&fw->completion);
1425 if (!fw->firmware)
1426 ret = -EINVAL;
1427
1428 if (chip->wow_fw_name) {
1429 fw = &rtwdev->wow_fw;
1430 wait_for_completion(&fw->completion);
1431 if (!fw->firmware)
1432 ret = -EINVAL;
1433 }
1434
1435 return ret;
1436 }
1437 EXPORT_SYMBOL(rtw_wait_firmware_completion);
1438
rtw_update_lps_deep_mode(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1439 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev,
1440 struct rtw_fw_state *fw)
1441 {
1442 const struct rtw_chip_info *chip = rtwdev->chip;
1443
1444 if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported ||
1445 !fw->feature)
1446 return LPS_DEEP_MODE_NONE;
1447
1448 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) &&
1449 rtw_fw_feature_check(fw, FW_FEATURE_PG))
1450 return LPS_DEEP_MODE_PG;
1451
1452 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) &&
1453 rtw_fw_feature_check(fw, FW_FEATURE_LCLK))
1454 return LPS_DEEP_MODE_LCLK;
1455
1456 return LPS_DEEP_MODE_NONE;
1457 }
1458
rtw_power_on(struct rtw_dev * rtwdev)1459 int rtw_power_on(struct rtw_dev *rtwdev)
1460 {
1461 const struct rtw_chip_info *chip = rtwdev->chip;
1462 struct rtw_fw_state *fw = &rtwdev->fw;
1463 bool wifi_only;
1464 int ret;
1465
1466 ret = rtw_hci_setup(rtwdev);
1467 if (ret) {
1468 rtw_err(rtwdev, "failed to setup hci\n");
1469 goto err;
1470 }
1471
1472 /* power on MAC before firmware downloaded */
1473 ret = rtw_mac_power_on(rtwdev);
1474 if (ret) {
1475 rtw_err(rtwdev, "failed to power on mac\n");
1476 goto err;
1477 }
1478
1479 ret = rtw_wait_firmware_completion(rtwdev);
1480 if (ret) {
1481 rtw_err(rtwdev, "failed to wait firmware completion\n");
1482 goto err_off;
1483 }
1484
1485 ret = rtw_download_firmware(rtwdev, fw);
1486 if (ret) {
1487 rtw_err(rtwdev, "failed to download firmware\n");
1488 goto err_off;
1489 }
1490
1491 /* config mac after firmware downloaded */
1492 ret = rtw_mac_init(rtwdev);
1493 if (ret) {
1494 rtw_err(rtwdev, "failed to configure mac\n");
1495 goto err_off;
1496 }
1497
1498 chip->ops->phy_set_param(rtwdev);
1499
1500 ret = rtw_mac_postinit(rtwdev);
1501 if (ret) {
1502 rtw_err(rtwdev, "failed to configure mac in postinit\n");
1503 goto err_off;
1504 }
1505
1506 ret = rtw_hci_start(rtwdev);
1507 if (ret) {
1508 rtw_err(rtwdev, "failed to start hci\n");
1509 goto err_off;
1510 }
1511
1512 /* send H2C after HCI has started */
1513 rtw_fw_send_general_info(rtwdev);
1514 rtw_fw_send_phydm_info(rtwdev);
1515
1516 wifi_only = !rtwdev->efuse.btcoex;
1517 rtw_coex_power_on_setting(rtwdev);
1518 rtw_coex_init_hw_config(rtwdev, wifi_only);
1519
1520 return 0;
1521
1522 err_off:
1523 rtw_mac_power_off(rtwdev);
1524
1525 err:
1526 return ret;
1527 }
1528 EXPORT_SYMBOL(rtw_power_on);
1529
rtw_core_fw_scan_notify(struct rtw_dev * rtwdev,bool start)1530 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start)
1531 {
1532 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN))
1533 return;
1534
1535 if (start) {
1536 rtw_fw_scan_notify(rtwdev, true);
1537 } else {
1538 reinit_completion(&rtwdev->fw_scan_density);
1539 rtw_fw_scan_notify(rtwdev, false);
1540 if (!wait_for_completion_timeout(&rtwdev->fw_scan_density,
1541 SCAN_NOTIFY_TIMEOUT))
1542 rtw_warn(rtwdev, "firmware failed to report density after scan\n");
1543 }
1544 }
1545
rtw_core_scan_start(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,const u8 * mac_addr,bool hw_scan)1546 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,
1547 const u8 *mac_addr, bool hw_scan)
1548 {
1549 u32 config = 0;
1550 int ret = 0;
1551
1552 rtw_leave_lps(rtwdev);
1553
1554 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) {
1555 ret = rtw_leave_ips(rtwdev);
1556 if (ret) {
1557 rtw_err(rtwdev, "failed to leave idle state\n");
1558 return;
1559 }
1560 }
1561
1562 ether_addr_copy(rtwvif->mac_addr, mac_addr);
1563 config |= PORT_SET_MAC_ADDR;
1564 rtw_vif_port_config(rtwdev, rtwvif, config);
1565
1566 rtw_coex_scan_notify(rtwdev, COEX_SCAN_START);
1567 rtw_core_fw_scan_notify(rtwdev, true);
1568
1569 set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1570 set_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1571 }
1572
rtw_core_scan_complete(struct rtw_dev * rtwdev,struct ieee80211_vif * vif,bool hw_scan)1573 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
1574 bool hw_scan)
1575 {
1576 struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL;
1577 u32 config = 0;
1578
1579 if (!rtwvif)
1580 return;
1581
1582 clear_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1583 clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1584
1585 rtw_core_fw_scan_notify(rtwdev, false);
1586
1587 ether_addr_copy(rtwvif->mac_addr, vif->addr);
1588 config |= PORT_SET_MAC_ADDR;
1589 rtw_vif_port_config(rtwdev, rtwvif, config);
1590
1591 rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH);
1592
1593 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
1594 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
1595 }
1596
rtw_core_start(struct rtw_dev * rtwdev)1597 int rtw_core_start(struct rtw_dev *rtwdev)
1598 {
1599 int ret;
1600
1601 ret = rtwdev->chip->ops->power_on(rtwdev);
1602 if (ret)
1603 return ret;
1604
1605 rtw_sec_enable_sec_engine(rtwdev);
1606
1607 rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw);
1608 rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw);
1609
1610 /* rcr reset after powered on */
1611 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
1612
1613 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
1614 RTW_WATCH_DOG_DELAY_TIME);
1615
1616 set_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1617
1618 return 0;
1619 }
1620
rtw_power_off(struct rtw_dev * rtwdev)1621 void rtw_power_off(struct rtw_dev *rtwdev)
1622 {
1623 rtw_hci_stop(rtwdev);
1624 rtw_coex_power_off_setting(rtwdev);
1625 rtw_mac_power_off(rtwdev);
1626 }
1627 EXPORT_SYMBOL(rtw_power_off);
1628
rtw_core_stop(struct rtw_dev * rtwdev)1629 void rtw_core_stop(struct rtw_dev *rtwdev)
1630 {
1631 struct rtw_coex *coex = &rtwdev->coex;
1632
1633 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1634 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);
1635
1636 mutex_unlock(&rtwdev->mutex);
1637
1638 cancel_work_sync(&rtwdev->c2h_work);
1639 cancel_work_sync(&rtwdev->update_beacon_work);
1640 cancel_delayed_work_sync(&rtwdev->watch_dog_work);
1641 cancel_delayed_work_sync(&coex->bt_relink_work);
1642 cancel_delayed_work_sync(&coex->bt_reenable_work);
1643 cancel_delayed_work_sync(&coex->defreeze_work);
1644 cancel_delayed_work_sync(&coex->wl_remain_work);
1645 cancel_delayed_work_sync(&coex->bt_remain_work);
1646 cancel_delayed_work_sync(&coex->wl_connecting_work);
1647 cancel_delayed_work_sync(&coex->bt_multi_link_remain_work);
1648 cancel_delayed_work_sync(&coex->wl_ccklock_work);
1649
1650 mutex_lock(&rtwdev->mutex);
1651
1652 rtwdev->chip->ops->power_off(rtwdev);
1653 }
1654
rtw_init_ht_cap(struct rtw_dev * rtwdev,struct ieee80211_sta_ht_cap * ht_cap)1655 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
1656 struct ieee80211_sta_ht_cap *ht_cap)
1657 {
1658 const struct rtw_chip_info *chip = rtwdev->chip;
1659 struct rtw_efuse *efuse = &rtwdev->efuse;
1660 int i;
1661
1662 ht_cap->ht_supported = true;
1663 ht_cap->cap = 0;
1664 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
1665 IEEE80211_HT_CAP_MAX_AMSDU |
1666 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
1667
1668 if (rtw_chip_has_rx_ldpc(rtwdev))
1669 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
1670 if (rtw_chip_has_tx_stbc(rtwdev))
1671 ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC;
1672
1673 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
1674 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
1675 IEEE80211_HT_CAP_DSSSCCK40 |
1676 IEEE80211_HT_CAP_SGI_40;
1677 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1678 ht_cap->ampdu_density = chip->ampdu_density;
1679 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1680
1681 for (i = 0; i < efuse->hw_cap.nss; i++)
1682 ht_cap->mcs.rx_mask[i] = 0xFF;
1683 ht_cap->mcs.rx_mask[4] = 0x01;
1684 ht_cap->mcs.rx_highest = cpu_to_le16(150 * efuse->hw_cap.nss);
1685 }
1686
rtw_init_vht_cap(struct rtw_dev * rtwdev,struct ieee80211_sta_vht_cap * vht_cap)1687 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
1688 struct ieee80211_sta_vht_cap *vht_cap)
1689 {
1690 struct rtw_efuse *efuse = &rtwdev->efuse;
1691 u16 mcs_map = 0;
1692 __le16 highest;
1693 int i;
1694
1695 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
1696 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
1697 return;
1698
1699 vht_cap->vht_supported = true;
1700 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
1701 IEEE80211_VHT_CAP_SHORT_GI_80 |
1702 IEEE80211_VHT_CAP_RXSTBC_1 |
1703 IEEE80211_VHT_CAP_HTC_VHT |
1704 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
1705 0;
1706 if (rtwdev->hal.rf_path_num > 1)
1707 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
1708 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
1709 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
1710 vht_cap->cap |= (rtwdev->hal.bfee_sts_cap <<
1711 IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
1712
1713 if (rtw_chip_has_rx_ldpc(rtwdev))
1714 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
1715
1716 for (i = 0; i < 8; i++) {
1717 if (i < efuse->hw_cap.nss)
1718 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2);
1719 else
1720 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
1721 }
1722
1723 highest = cpu_to_le16(390 * efuse->hw_cap.nss);
1724
1725 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
1726 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
1727 vht_cap->vht_mcs.rx_highest = highest;
1728 vht_cap->vht_mcs.tx_highest = highest;
1729 }
1730
rtw_get_max_scan_ie_len(struct rtw_dev * rtwdev)1731 static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev)
1732 {
1733 u16 len;
1734
1735 len = rtwdev->chip->max_scan_ie_len;
1736
1737 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) &&
1738 rtwdev->chip->id == RTW_CHIP_TYPE_8822C)
1739 len = IEEE80211_MAX_DATA_LEN;
1740 else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM))
1741 len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE;
1742
1743 return len;
1744 }
1745
rtw_set_supported_band(struct ieee80211_hw * hw,const struct rtw_chip_info * chip)1746 static void rtw_set_supported_band(struct ieee80211_hw *hw,
1747 const struct rtw_chip_info *chip)
1748 {
1749 struct rtw_dev *rtwdev = hw->priv;
1750 struct ieee80211_supported_band *sband;
1751
1752 if (chip->band & RTW_BAND_2G) {
1753 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
1754 if (!sband)
1755 goto err_out;
1756 #if defined(__linux__)
1757 if (chip->ht_supported)
1758 #elif defined(__FreeBSD__)
1759 if (rtw_ht_support && chip->ht_supported)
1760 #endif
1761 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1762 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
1763 }
1764
1765 if (chip->band & RTW_BAND_5G) {
1766 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
1767 if (!sband)
1768 goto err_out;
1769 #if defined(__linux__)
1770 if (chip->ht_supported)
1771 #elif defined(__FreeBSD__)
1772 if (rtw_ht_support && chip->ht_supported)
1773 #endif
1774 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1775 #if defined(__linux__)
1776 if (chip->vht_supported)
1777 #elif defined(__FreeBSD__)
1778 if (rtw_vht_support && chip->vht_supported)
1779 #endif
1780 rtw_init_vht_cap(rtwdev, &sband->vht_cap);
1781 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
1782 }
1783
1784 return;
1785
1786 err_out:
1787 rtw_err(rtwdev, "failed to set supported band\n");
1788 }
1789
rtw_unset_supported_band(struct ieee80211_hw * hw,const struct rtw_chip_info * chip)1790 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
1791 const struct rtw_chip_info *chip)
1792 {
1793 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
1794 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
1795 }
1796
rtw_vif_smps_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1797 static void rtw_vif_smps_iter(void *data, u8 *mac,
1798 struct ieee80211_vif *vif)
1799 {
1800 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
1801
1802 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
1803 return;
1804
1805 if (rtwdev->hal.txrx_1ss)
1806 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC);
1807 else
1808 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF);
1809 }
1810
rtw_set_txrx_1ss(struct rtw_dev * rtwdev,bool txrx_1ss)1811 void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss)
1812 {
1813 const struct rtw_chip_info *chip = rtwdev->chip;
1814 struct rtw_hal *hal = &rtwdev->hal;
1815
1816 if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss)
1817 return;
1818
1819 rtwdev->hal.txrx_1ss = txrx_1ss;
1820 if (txrx_1ss)
1821 chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false);
1822 else
1823 chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx,
1824 hal->antenna_rx, false);
1825 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev);
1826 }
1827
__update_firmware_feature(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1828 static void __update_firmware_feature(struct rtw_dev *rtwdev,
1829 struct rtw_fw_state *fw)
1830 {
1831 u32 feature;
1832 const struct rtw_fw_hdr *fw_hdr =
1833 (const struct rtw_fw_hdr *)fw->firmware->data;
1834
1835 feature = le32_to_cpu(fw_hdr->feature);
1836 fw->feature = feature & FW_FEATURE_SIG ? feature : 0;
1837
1838 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C &&
1839 RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13))
1840 fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM;
1841 }
1842
__update_firmware_info(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1843 static void __update_firmware_info(struct rtw_dev *rtwdev,
1844 struct rtw_fw_state *fw)
1845 {
1846 const struct rtw_fw_hdr *fw_hdr =
1847 (const struct rtw_fw_hdr *)fw->firmware->data;
1848
1849 fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver);
1850 fw->version = le16_to_cpu(fw_hdr->version);
1851 fw->sub_version = fw_hdr->subversion;
1852 fw->sub_index = fw_hdr->subindex;
1853
1854 __update_firmware_feature(rtwdev, fw);
1855 }
1856
__update_firmware_info_legacy(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1857 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev,
1858 struct rtw_fw_state *fw)
1859 {
1860 struct rtw_fw_hdr_legacy *legacy =
1861 #if defined(__linux__)
1862 (struct rtw_fw_hdr_legacy *)fw->firmware->data;
1863 #elif defined(__FreeBSD__)
1864 __DECONST(struct rtw_fw_hdr_legacy *, fw->firmware->data);
1865 #endif
1866
1867 fw->h2c_version = 0;
1868 fw->version = le16_to_cpu(legacy->version);
1869 fw->sub_version = legacy->subversion1;
1870 fw->sub_index = legacy->subversion2;
1871 }
1872
update_firmware_info(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1873 static void update_firmware_info(struct rtw_dev *rtwdev,
1874 struct rtw_fw_state *fw)
1875 {
1876 if (rtw_chip_wcpu_8051(rtwdev))
1877 __update_firmware_info_legacy(rtwdev, fw);
1878 else
1879 __update_firmware_info(rtwdev, fw);
1880 }
1881
rtw_load_firmware_cb(const struct firmware * firmware,void * context)1882 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
1883 {
1884 struct rtw_fw_state *fw = context;
1885 struct rtw_dev *rtwdev = fw->rtwdev;
1886
1887 if (!firmware || !firmware->data) {
1888 rtw_err(rtwdev, "failed to request firmware\n");
1889 complete_all(&fw->completion);
1890 return;
1891 }
1892
1893 fw->firmware = firmware;
1894 update_firmware_info(rtwdev, fw);
1895 complete_all(&fw->completion);
1896
1897 rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n",
1898 fw->type == RTW_WOWLAN_FW ? "WOW " : "",
1899 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version);
1900 }
1901
rtw_load_firmware(struct rtw_dev * rtwdev,enum rtw_fw_type type)1902 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type)
1903 {
1904 const char *fw_name;
1905 struct rtw_fw_state *fw;
1906 int ret;
1907
1908 switch (type) {
1909 case RTW_WOWLAN_FW:
1910 fw = &rtwdev->wow_fw;
1911 fw_name = rtwdev->chip->wow_fw_name;
1912 break;
1913
1914 case RTW_NORMAL_FW:
1915 fw = &rtwdev->fw;
1916 fw_name = rtwdev->chip->fw_name;
1917 break;
1918
1919 default:
1920 rtw_warn(rtwdev, "unsupported firmware type\n");
1921 return -ENOENT;
1922 }
1923
1924 fw->type = type;
1925 fw->rtwdev = rtwdev;
1926 init_completion(&fw->completion);
1927
1928 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
1929 GFP_KERNEL, fw, rtw_load_firmware_cb);
1930 if (ret) {
1931 rtw_err(rtwdev, "failed to async firmware request\n");
1932 return ret;
1933 }
1934
1935 return 0;
1936 }
1937
rtw_chip_parameter_setup(struct rtw_dev * rtwdev)1938 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
1939 {
1940 const struct rtw_chip_info *chip = rtwdev->chip;
1941 struct rtw_hal *hal = &rtwdev->hal;
1942 struct rtw_efuse *efuse = &rtwdev->efuse;
1943
1944 switch (rtw_hci_type(rtwdev)) {
1945 case RTW_HCI_TYPE_PCIE:
1946 rtwdev->hci.rpwm_addr = 0x03d9;
1947 rtwdev->hci.cpwm_addr = 0x03da;
1948 break;
1949 case RTW_HCI_TYPE_SDIO:
1950 rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1;
1951 rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2;
1952 break;
1953 case RTW_HCI_TYPE_USB:
1954 rtwdev->hci.rpwm_addr = 0xfe58;
1955 rtwdev->hci.cpwm_addr = 0xfe57;
1956 break;
1957 default:
1958 rtw_err(rtwdev, "unsupported hci type\n");
1959 return -EINVAL;
1960 }
1961
1962 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
1963 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
1964 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
1965 if (hal->chip_version & BIT_RF_TYPE_ID) {
1966 hal->rf_type = RF_2T2R;
1967 hal->rf_path_num = 2;
1968 hal->antenna_tx = BB_PATH_AB;
1969 hal->antenna_rx = BB_PATH_AB;
1970 } else {
1971 hal->rf_type = RF_1T1R;
1972 hal->rf_path_num = 1;
1973 hal->antenna_tx = BB_PATH_A;
1974 hal->antenna_rx = BB_PATH_A;
1975 }
1976 hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num :
1977 hal->rf_path_num;
1978
1979 efuse->physical_size = chip->phy_efuse_size;
1980 efuse->logical_size = chip->log_efuse_size;
1981 efuse->protect_size = chip->ptct_efuse_size;
1982
1983 /* default use ack */
1984 rtwdev->hal.rcr |= BIT_VHT_DACK;
1985
1986 hal->bfee_sts_cap = 3;
1987
1988 return 0;
1989 }
1990
rtw_chip_efuse_enable(struct rtw_dev * rtwdev)1991 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
1992 {
1993 struct rtw_fw_state *fw = &rtwdev->fw;
1994 int ret;
1995
1996 ret = rtw_hci_setup(rtwdev);
1997 if (ret) {
1998 rtw_err(rtwdev, "failed to setup hci\n");
1999 goto err;
2000 }
2001
2002 ret = rtw_mac_power_on(rtwdev);
2003 if (ret) {
2004 rtw_err(rtwdev, "failed to power on mac\n");
2005 goto err;
2006 }
2007
2008 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
2009
2010 wait_for_completion(&fw->completion);
2011 if (!fw->firmware) {
2012 ret = -EINVAL;
2013 rtw_err(rtwdev, "failed to load firmware\n");
2014 goto err;
2015 }
2016
2017 ret = rtw_download_firmware(rtwdev, fw);
2018 if (ret) {
2019 rtw_err(rtwdev, "failed to download firmware\n");
2020 goto err_off;
2021 }
2022
2023 return 0;
2024
2025 err_off:
2026 rtw_mac_power_off(rtwdev);
2027
2028 err:
2029 return ret;
2030 }
2031
rtw_dump_hw_feature(struct rtw_dev * rtwdev)2032 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
2033 {
2034 struct rtw_efuse *efuse = &rtwdev->efuse;
2035 u8 hw_feature[HW_FEATURE_LEN];
2036 u8 id;
2037 u8 bw;
2038 int i;
2039
2040 if (!rtwdev->chip->hw_feature_report)
2041 return 0;
2042
2043 id = rtw_read8(rtwdev, REG_C2HEVT);
2044 if (id != C2H_HW_FEATURE_REPORT) {
2045 rtw_err(rtwdev, "failed to read hw feature report\n");
2046 return -EBUSY;
2047 }
2048
2049 for (i = 0; i < HW_FEATURE_LEN; i++)
2050 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
2051
2052 rtw_write8(rtwdev, REG_C2HEVT, 0);
2053
2054 bw = GET_EFUSE_HW_CAP_BW(hw_feature);
2055 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
2056 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
2057 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
2058 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
2059 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
2060
2061 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
2062
2063 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
2064 efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
2065 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
2066
2067 rtw_dbg(rtwdev, RTW_DBG_EFUSE,
2068 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
2069 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
2070 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
2071
2072 return 0;
2073 }
2074
rtw_chip_efuse_disable(struct rtw_dev * rtwdev)2075 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
2076 {
2077 rtw_hci_stop(rtwdev);
2078 rtw_mac_power_off(rtwdev);
2079 }
2080
rtw_chip_efuse_info_setup(struct rtw_dev * rtwdev)2081 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
2082 {
2083 struct rtw_efuse *efuse = &rtwdev->efuse;
2084 int ret;
2085
2086 mutex_lock(&rtwdev->mutex);
2087
2088 /* power on mac to read efuse */
2089 ret = rtw_chip_efuse_enable(rtwdev);
2090 if (ret)
2091 goto out_unlock;
2092
2093 ret = rtw_parse_efuse_map(rtwdev);
2094 if (ret)
2095 goto out_disable;
2096
2097 ret = rtw_dump_hw_feature(rtwdev);
2098 if (ret)
2099 goto out_disable;
2100
2101 ret = rtw_check_supported_rfe(rtwdev);
2102 if (ret)
2103 goto out_disable;
2104
2105 if (efuse->crystal_cap == 0xff)
2106 efuse->crystal_cap = 0;
2107 if (efuse->pa_type_2g == 0xff)
2108 efuse->pa_type_2g = 0;
2109 if (efuse->pa_type_5g == 0xff)
2110 efuse->pa_type_5g = 0;
2111 if (efuse->lna_type_2g == 0xff)
2112 efuse->lna_type_2g = 0;
2113 if (efuse->lna_type_5g == 0xff)
2114 efuse->lna_type_5g = 0;
2115 if (efuse->channel_plan == 0xff)
2116 efuse->channel_plan = 0x7f;
2117 if (efuse->rf_board_option == 0xff)
2118 efuse->rf_board_option = 0;
2119 if (efuse->bt_setting & BIT(0))
2120 efuse->share_ant = true;
2121 if (efuse->regd == 0xff)
2122 efuse->regd = 0;
2123 if (efuse->tx_bb_swing_setting_2g == 0xff)
2124 efuse->tx_bb_swing_setting_2g = 0;
2125 if (efuse->tx_bb_swing_setting_5g == 0xff)
2126 efuse->tx_bb_swing_setting_5g = 0;
2127
2128 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
2129 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
2130 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
2131 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
2132 efuse->ext_lna_5g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
2133
2134 if (!is_valid_ether_addr(efuse->addr)) {
2135 eth_random_addr(efuse->addr);
2136 dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n");
2137 }
2138
2139 out_disable:
2140 rtw_chip_efuse_disable(rtwdev);
2141
2142 out_unlock:
2143 mutex_unlock(&rtwdev->mutex);
2144 return ret;
2145 }
2146
rtw_chip_board_info_setup(struct rtw_dev * rtwdev)2147 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
2148 {
2149 struct rtw_hal *hal = &rtwdev->hal;
2150 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
2151
2152 if (!rfe_def)
2153 return -ENODEV;
2154
2155 rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type);
2156
2157 rtw_phy_init_tx_power(rtwdev);
2158 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
2159 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
2160 rtw_phy_tx_power_by_rate_config(hal);
2161 rtw_phy_tx_power_limit_config(hal);
2162
2163 return 0;
2164 }
2165
rtw_chip_info_setup(struct rtw_dev * rtwdev)2166 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
2167 {
2168 int ret;
2169
2170 ret = rtw_chip_parameter_setup(rtwdev);
2171 if (ret) {
2172 rtw_err(rtwdev, "failed to setup chip parameters\n");
2173 goto err_out;
2174 }
2175
2176 ret = rtw_chip_efuse_info_setup(rtwdev);
2177 if (ret) {
2178 rtw_err(rtwdev, "failed to setup chip efuse info\n");
2179 goto err_out;
2180 }
2181
2182 ret = rtw_chip_board_info_setup(rtwdev);
2183 if (ret) {
2184 rtw_err(rtwdev, "failed to setup chip board info\n");
2185 goto err_out;
2186 }
2187
2188 return 0;
2189
2190 err_out:
2191 return ret;
2192 }
2193 EXPORT_SYMBOL(rtw_chip_info_setup);
2194
rtw_stats_init(struct rtw_dev * rtwdev)2195 static void rtw_stats_init(struct rtw_dev *rtwdev)
2196 {
2197 struct rtw_traffic_stats *stats = &rtwdev->stats;
2198 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
2199 int i;
2200
2201 ewma_tp_init(&stats->tx_ewma_tp);
2202 ewma_tp_init(&stats->rx_ewma_tp);
2203
2204 for (i = 0; i < RTW_EVM_NUM; i++)
2205 ewma_evm_init(&dm_info->ewma_evm[i]);
2206 for (i = 0; i < RTW_SNR_NUM; i++)
2207 ewma_snr_init(&dm_info->ewma_snr[i]);
2208 }
2209
rtw_core_init(struct rtw_dev * rtwdev)2210 int rtw_core_init(struct rtw_dev *rtwdev)
2211 {
2212 const struct rtw_chip_info *chip = rtwdev->chip;
2213 struct rtw_coex *coex = &rtwdev->coex;
2214 int ret;
2215
2216 INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
2217 INIT_LIST_HEAD(&rtwdev->txqs);
2218
2219 timer_setup(&rtwdev->tx_report.purge_timer,
2220 rtw_tx_report_purge_timer, 0);
2221 rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
2222 if (!rtwdev->tx_wq) {
2223 rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n");
2224 return -ENOMEM;
2225 }
2226
2227 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
2228 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
2229 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
2230 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
2231 INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work);
2232 INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work);
2233 INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work);
2234 INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work,
2235 rtw_coex_bt_multi_link_remain_work);
2236 INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work);
2237 INIT_WORK(&rtwdev->tx_work, rtw_tx_work);
2238 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
2239 INIT_WORK(&rtwdev->ips_work, rtw_ips_work);
2240 INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work);
2241 INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work);
2242 INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work);
2243 skb_queue_head_init(&rtwdev->c2h_queue);
2244 skb_queue_head_init(&rtwdev->coex.queue);
2245 skb_queue_head_init(&rtwdev->tx_report.queue);
2246
2247 spin_lock_init(&rtwdev->txq_lock);
2248 spin_lock_init(&rtwdev->tx_report.q_lock);
2249
2250 mutex_init(&rtwdev->mutex);
2251 mutex_init(&rtwdev->hal.tx_power_mutex);
2252
2253 init_waitqueue_head(&rtwdev->coex.wait);
2254 init_completion(&rtwdev->lps_leave_check);
2255 init_completion(&rtwdev->fw_scan_density);
2256
2257 rtwdev->sec.total_cam_num = 32;
2258 rtwdev->hal.current_channel = 1;
2259 rtwdev->dm_info.fix_rate = U8_MAX;
2260
2261 rtw_stats_init(rtwdev);
2262
2263 /* default rx filter setting */
2264 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
2265 BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
2266 BIT_AB | BIT_AM | BIT_APM;
2267
2268 ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW);
2269 if (ret) {
2270 rtw_warn(rtwdev, "no firmware loaded\n");
2271 goto out;
2272 }
2273
2274 if (chip->wow_fw_name) {
2275 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW);
2276 if (ret) {
2277 rtw_warn(rtwdev, "no wow firmware loaded\n");
2278 wait_for_completion(&rtwdev->fw.completion);
2279 if (rtwdev->fw.firmware)
2280 release_firmware(rtwdev->fw.firmware);
2281 goto out;
2282 }
2283 }
2284
2285 #if defined(__FreeBSD__)
2286 rtw_wait_firmware_completion(rtwdev);
2287 #endif
2288
2289 return 0;
2290
2291 out:
2292 destroy_workqueue(rtwdev->tx_wq);
2293 return ret;
2294 }
2295 EXPORT_SYMBOL(rtw_core_init);
2296
rtw_core_deinit(struct rtw_dev * rtwdev)2297 void rtw_core_deinit(struct rtw_dev *rtwdev)
2298 {
2299 struct rtw_fw_state *fw = &rtwdev->fw;
2300 struct rtw_fw_state *wow_fw = &rtwdev->wow_fw;
2301 struct rtw_rsvd_page *rsvd_pkt, *tmp;
2302 unsigned long flags;
2303
2304 rtw_wait_firmware_completion(rtwdev);
2305
2306 if (fw->firmware)
2307 release_firmware(fw->firmware);
2308
2309 if (wow_fw->firmware)
2310 release_firmware(wow_fw->firmware);
2311
2312 destroy_workqueue(rtwdev->tx_wq);
2313 timer_delete_sync(&rtwdev->tx_report.purge_timer);
2314 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
2315 skb_queue_purge(&rtwdev->tx_report.queue);
2316 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
2317 skb_queue_purge(&rtwdev->coex.queue);
2318 skb_queue_purge(&rtwdev->c2h_queue);
2319
2320 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list,
2321 build_list) {
2322 list_del(&rsvd_pkt->build_list);
2323 kfree(rsvd_pkt);
2324 }
2325
2326 mutex_destroy(&rtwdev->mutex);
2327 mutex_destroy(&rtwdev->hal.tx_power_mutex);
2328 }
2329 EXPORT_SYMBOL(rtw_core_deinit);
2330
rtw_register_hw(struct rtw_dev * rtwdev,struct ieee80211_hw * hw)2331 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2332 {
2333 struct rtw_hal *hal = &rtwdev->hal;
2334 int max_tx_headroom = 0;
2335 int ret;
2336
2337 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
2338
2339 if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO)
2340 max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN;
2341
2342 hw->extra_tx_headroom = max_tx_headroom;
2343 hw->queues = IEEE80211_NUM_ACS;
2344 hw->txq_data_size = sizeof(struct rtw_txq);
2345 hw->sta_data_size = sizeof(struct rtw_sta_info);
2346 hw->vif_data_size = sizeof(struct rtw_vif);
2347
2348 ieee80211_hw_set(hw, SIGNAL_DBM);
2349 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
2350 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
2351 ieee80211_hw_set(hw, MFP_CAPABLE);
2352 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
2353 ieee80211_hw_set(hw, SUPPORTS_PS);
2354 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
2355 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
2356 if (rtwdev->chip->amsdu_in_ampdu)
2357 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
2358 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
2359 ieee80211_hw_set(hw, TX_AMSDU);
2360 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
2361
2362 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2363 BIT(NL80211_IFTYPE_AP) |
2364 BIT(NL80211_IFTYPE_ADHOC);
2365 hw->wiphy->available_antennas_tx = hal->antenna_tx;
2366 hw->wiphy->available_antennas_rx = hal->antenna_rx;
2367
2368 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
2369 WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
2370
2371 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
2372 hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS;
2373 hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev);
2374
2375 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C) {
2376 hw->wiphy->iface_combinations = rtw_iface_combs;
2377 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs);
2378 }
2379
2380 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
2381 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN);
2382 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
2383
2384 #ifdef CONFIG_PM
2385 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
2386 hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids;
2387 #endif
2388 rtw_set_supported_band(hw, rtwdev->chip);
2389 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
2390
2391 hw->wiphy->sar_capa = &rtw_sar_capa;
2392
2393 ret = rtw_regd_init(rtwdev);
2394 if (ret) {
2395 rtw_err(rtwdev, "failed to init regd\n");
2396 return ret;
2397 }
2398
2399 rtw_led_init(rtwdev);
2400
2401 ret = ieee80211_register_hw(hw);
2402 if (ret) {
2403 rtw_err(rtwdev, "failed to register hw\n");
2404 goto led_deinit;
2405 }
2406
2407 ret = rtw_regd_hint(rtwdev);
2408 if (ret) {
2409 rtw_err(rtwdev, "failed to hint regd\n");
2410 goto led_deinit;
2411 }
2412
2413 rtw_debugfs_init(rtwdev);
2414
2415 rtwdev->bf_info.bfer_mu_cnt = 0;
2416 rtwdev->bf_info.bfer_su_cnt = 0;
2417
2418 return 0;
2419
2420 led_deinit:
2421 rtw_led_deinit(rtwdev);
2422 return ret;
2423 }
2424 EXPORT_SYMBOL(rtw_register_hw);
2425
rtw_unregister_hw(struct rtw_dev * rtwdev,struct ieee80211_hw * hw)2426 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2427 {
2428 const struct rtw_chip_info *chip = rtwdev->chip;
2429
2430 ieee80211_unregister_hw(hw);
2431 rtw_unset_supported_band(hw, chip);
2432 rtw_debugfs_deinit(rtwdev);
2433 rtw_led_deinit(rtwdev);
2434 }
2435 EXPORT_SYMBOL(rtw_unregister_hw);
2436
2437 static
rtw_swap_reg_nbytes(struct rtw_dev * rtwdev,const struct rtw_hw_reg * reg1,const struct rtw_hw_reg * reg2,u8 nbytes)2438 void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,
2439 const struct rtw_hw_reg *reg2, u8 nbytes)
2440 {
2441 u8 i;
2442
2443 for (i = 0; i < nbytes; i++) {
2444 u8 v1 = rtw_read8(rtwdev, reg1->addr + i);
2445 u8 v2 = rtw_read8(rtwdev, reg2->addr + i);
2446
2447 rtw_write8(rtwdev, reg1->addr + i, v2);
2448 rtw_write8(rtwdev, reg2->addr + i, v1);
2449 }
2450 }
2451
2452 static
rtw_swap_reg_mask(struct rtw_dev * rtwdev,const struct rtw_hw_reg * reg1,const struct rtw_hw_reg * reg2)2453 void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,
2454 const struct rtw_hw_reg *reg2)
2455 {
2456 u32 v1, v2;
2457
2458 v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask);
2459 v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask);
2460 rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1);
2461 rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2);
2462 }
2463
2464 struct rtw_iter_port_switch_data {
2465 struct rtw_dev *rtwdev;
2466 struct rtw_vif *rtwvif_ap;
2467 };
2468
rtw_port_switch_iter(void * data,struct ieee80211_vif * vif)2469 static void rtw_port_switch_iter(void *data, struct ieee80211_vif *vif)
2470 {
2471 struct rtw_iter_port_switch_data *iter_data = data;
2472 struct rtw_dev *rtwdev = iter_data->rtwdev;
2473 struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv;
2474 struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap;
2475 const struct rtw_hw_reg *reg1, *reg2;
2476
2477 if (rtwvif_target->port != RTW_PORT_0)
2478 return;
2479
2480 rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n",
2481 rtwvif_ap->port, rtwvif_target->port);
2482
2483 /* Leave LPS so the value swapped are not in PS mode */
2484 rtw_leave_lps(rtwdev);
2485
2486 reg1 = &rtwvif_ap->conf->net_type;
2487 reg2 = &rtwvif_target->conf->net_type;
2488 rtw_swap_reg_mask(rtwdev, reg1, reg2);
2489
2490 reg1 = &rtwvif_ap->conf->mac_addr;
2491 reg2 = &rtwvif_target->conf->mac_addr;
2492 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);
2493
2494 reg1 = &rtwvif_ap->conf->bssid;
2495 reg2 = &rtwvif_target->conf->bssid;
2496 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);
2497
2498 reg1 = &rtwvif_ap->conf->bcn_ctrl;
2499 reg2 = &rtwvif_target->conf->bcn_ctrl;
2500 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1);
2501
2502 swap(rtwvif_target->port, rtwvif_ap->port);
2503 swap(rtwvif_target->conf, rtwvif_ap->conf);
2504
2505 rtw_fw_default_port(rtwdev, rtwvif_target);
2506 }
2507
rtw_core_port_switch(struct rtw_dev * rtwdev,struct ieee80211_vif * vif)2508 void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif)
2509 {
2510 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
2511 struct rtw_iter_port_switch_data iter_data;
2512
2513 if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0)
2514 return;
2515
2516 iter_data.rtwdev = rtwdev;
2517 iter_data.rtwvif_ap = rtwvif;
2518 rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data);
2519 }
2520
rtw_check_sta_active_iter(void * data,struct ieee80211_vif * vif)2521 static void rtw_check_sta_active_iter(void *data, struct ieee80211_vif *vif)
2522 {
2523 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
2524 bool *active = data;
2525
2526 if (*active)
2527 return;
2528
2529 if (vif->type != NL80211_IFTYPE_STATION)
2530 return;
2531
2532 if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid))
2533 *active = true;
2534 }
2535
rtw_core_check_sta_active(struct rtw_dev * rtwdev)2536 bool rtw_core_check_sta_active(struct rtw_dev *rtwdev)
2537 {
2538 bool sta_active = false;
2539
2540 rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active);
2541
2542 return rtwdev->ap_active || sta_active;
2543 }
2544
rtw_core_enable_beacon(struct rtw_dev * rtwdev,bool enable)2545 void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable)
2546 {
2547 if (!rtwdev->ap_active)
2548 return;
2549
2550 if (enable) {
2551 rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
2552 rtw_write32_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);
2553 } else {
2554 rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
2555 rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);
2556 }
2557 }
2558
rtw_set_ampdu_factor(struct rtw_dev * rtwdev,struct ieee80211_vif * vif,struct ieee80211_bss_conf * bss_conf)2559 void rtw_set_ampdu_factor(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
2560 struct ieee80211_bss_conf *bss_conf)
2561 {
2562 const struct rtw_chip_ops *ops = rtwdev->chip->ops;
2563 struct ieee80211_sta *sta;
2564 u8 factor = 0xff;
2565
2566 if (!ops->set_ampdu_factor)
2567 return;
2568
2569 rcu_read_lock();
2570
2571 sta = ieee80211_find_sta(vif, bss_conf->bssid);
2572 if (!sta) {
2573 rcu_read_unlock();
2574 rtw_warn(rtwdev, "%s: failed to find station %pM\n",
2575 __func__, bss_conf->bssid);
2576 return;
2577 }
2578
2579 if (sta->deflink.vht_cap.vht_supported)
2580 factor = u32_get_bits(sta->deflink.vht_cap.cap,
2581 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK);
2582 else if (sta->deflink.ht_cap.ht_supported)
2583 factor = sta->deflink.ht_cap.ampdu_factor;
2584
2585 rcu_read_unlock();
2586
2587 if (factor != 0xff)
2588 ops->set_ampdu_factor(rtwdev, factor);
2589 }
2590
2591 MODULE_AUTHOR("Realtek Corporation");
2592 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
2593 MODULE_LICENSE("Dual BSD/GPL");
2594