1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2024 Realtek Corporation 3 */ 4 5 #include "rtw8852bt_rfk_table.h" 6 7 static const struct rtw89_reg5_def rtw8852bt_tssi_sys_defs[] = { 8 RTW89_DECL_RFK_WM(0x12a8, 0x0000000f, 0x4), 9 RTW89_DECL_RFK_WM(0x32a8, 0x0000000f, 0x4), 10 RTW89_DECL_RFK_WM(0x12bc, 0x000ffff0, 0x5555), 11 RTW89_DECL_RFK_WM(0x32bc, 0x000ffff0, 0x5555), 12 RTW89_DECL_RFK_WM(0x0300, 0xff000000, 0x16), 13 RTW89_DECL_RFK_WM(0x0304, 0x000000ff, 0x19), 14 RTW89_DECL_RFK_WM(0x0314, 0xffff0000, 0x2041), 15 RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x2041), 16 RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x20012041), 17 RTW89_DECL_RFK_WM(0x0020, 0x00006000, 0x3), 18 RTW89_DECL_RFK_WM(0x0024, 0x00006000, 0x3), 19 RTW89_DECL_RFK_WM(0x0704, 0xffff0000, 0x601e), 20 RTW89_DECL_RFK_WM(0x2704, 0xffff0000, 0x601e), 21 RTW89_DECL_RFK_WM(0x0700, 0xf0000000, 0x4), 22 RTW89_DECL_RFK_WM(0x2700, 0xf0000000, 0x4), 23 RTW89_DECL_RFK_WM(0x0650, 0x3c000000, 0x0), 24 RTW89_DECL_RFK_WM(0x2650, 0x3c000000, 0x0), 25 }; 26 27 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_sys_defs); 28 29 static const struct rtw89_reg5_def rtw8852bt_tssi_sys_a_defs_2g[] = { 30 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x33), 31 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x33), 32 RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x1), 33 RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1e), 34 }; 35 36 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_sys_a_defs_2g); 37 38 static const struct rtw89_reg5_def rtw8852bt_tssi_sys_a_defs_5g[] = { 39 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x44), 40 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x44), 41 RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x0), 42 RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1d), 43 }; 44 45 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_sys_a_defs_5g); 46 47 static const struct rtw89_reg5_def rtw8852bt_tssi_sys_b_defs_2g[] = { 48 RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x33), 49 RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x33), 50 RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x1), 51 RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1e), 52 }; 53 54 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_sys_b_defs_2g); 55 56 static const struct rtw89_reg5_def rtw8852bt_tssi_sys_b_defs_5g[] = { 57 RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x44), 58 RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x44), 59 RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x0), 60 RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1d), 61 }; 62 63 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_sys_b_defs_5g); 64 65 static const struct rtw89_reg5_def rtw8852bt_tssi_init_txpwr_defs_a[] = { 66 RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0), 67 RTW89_DECL_RFK_WM(0x5800, 0xffffffff, 0x003f807f), 68 RTW89_DECL_RFK_WM(0x580c, 0x0000007f, 0x40), 69 RTW89_DECL_RFK_WM(0x580c, 0x0fffff00, 0x00040), 70 RTW89_DECL_RFK_WM(0x5810, 0xffffffff, 0x59010000), 71 RTW89_DECL_RFK_WM(0x5814, 0x01ffffff, 0x002d000), 72 RTW89_DECL_RFK_WM(0x5814, 0xf8000000, 0x00), 73 RTW89_DECL_RFK_WM(0x5818, 0xffffffff, 0x002c1800), 74 RTW89_DECL_RFK_WM(0x581c, 0x3fffffff, 0x1dc80280), 75 RTW89_DECL_RFK_WM(0x5820, 0xffffffff, 0x00002080), 76 RTW89_DECL_RFK_WM(0x580c, 0x10000000, 0x1), 77 RTW89_DECL_RFK_WM(0x580c, 0x40000000, 0x1), 78 RTW89_DECL_RFK_WM(0x5834, 0x3fffffff, 0x000115f2), 79 RTW89_DECL_RFK_WM(0x5838, 0x7fffffff, 0x0000121), 80 RTW89_DECL_RFK_WM(0x5854, 0x3fffffff, 0x000115f2), 81 RTW89_DECL_RFK_WM(0x5858, 0x7fffffff, 0x0000121), 82 RTW89_DECL_RFK_WM(0x5860, 0x80000000, 0x0), 83 RTW89_DECL_RFK_WM(0x5864, 0x07ffffff, 0x00801ff), 84 RTW89_DECL_RFK_WM(0x5898, 0xffffffff, 0x00000000), 85 RTW89_DECL_RFK_WM(0x589c, 0xffffffff, 0x00000000), 86 RTW89_DECL_RFK_WM(0x58a4, 0x000000ff, 0x16), 87 RTW89_DECL_RFK_WM(0x58b0, 0xffffffff, 0x00000000), 88 RTW89_DECL_RFK_WM(0x58b4, 0x7fffffff, 0x0a002000), 89 RTW89_DECL_RFK_WM(0x58b8, 0x7fffffff, 0x00007628), 90 RTW89_DECL_RFK_WM(0x58bc, 0x07ffffff, 0x7a7807f), 91 RTW89_DECL_RFK_WM(0x58c0, 0xfffe0000, 0x003f), 92 RTW89_DECL_RFK_WM(0x58c4, 0xffffffff, 0x0003ffff), 93 RTW89_DECL_RFK_WM(0x58c8, 0x00ffffff, 0x000000), 94 RTW89_DECL_RFK_WM(0x58c8, 0xf0000000, 0x0), 95 RTW89_DECL_RFK_WM(0x58cc, 0xffffffff, 0x00000000), 96 RTW89_DECL_RFK_WM(0x58d0, 0x07ffffff, 0x2008101), 97 RTW89_DECL_RFK_WM(0x58d4, 0x000000ff, 0x00), 98 RTW89_DECL_RFK_WM(0x58d4, 0x0003fe00, 0x0ff), 99 RTW89_DECL_RFK_WM(0x58d4, 0x07fc0000, 0x100), 100 RTW89_DECL_RFK_WM(0x58d8, 0xffffffff, 0x8008016c), 101 RTW89_DECL_RFK_WM(0x58dc, 0x0001ffff, 0x0807f), 102 RTW89_DECL_RFK_WM(0x58dc, 0xfff00000, 0xc00), 103 RTW89_DECL_RFK_WM(0x58f0, 0x0003ffff, 0x001ff), 104 RTW89_DECL_RFK_WM(0x58f4, 0x000fffff, 0x000), 105 }; 106 107 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_init_txpwr_defs_a); 108 109 static const struct rtw89_reg5_def rtw8852bt_tssi_init_txpwr_defs_b[] = { 110 RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0), 111 RTW89_DECL_RFK_WM(0x7800, 0xffffffff, 0x003f807f), 112 RTW89_DECL_RFK_WM(0x780c, 0x0000007f, 0x40), 113 RTW89_DECL_RFK_WM(0x780c, 0x0fffff00, 0x00040), 114 RTW89_DECL_RFK_WM(0x7810, 0xffffffff, 0x59010000), 115 RTW89_DECL_RFK_WM(0x7814, 0x01ffffff, 0x002d000), 116 RTW89_DECL_RFK_WM(0x7814, 0xf8000000, 0x00), 117 RTW89_DECL_RFK_WM(0x7818, 0xffffffff, 0x002c1800), 118 RTW89_DECL_RFK_WM(0x781c, 0x3fffffff, 0x1dc80280), 119 RTW89_DECL_RFK_WM(0x7820, 0xffffffff, 0x00002080), 120 RTW89_DECL_RFK_WM(0x780c, 0x10000000, 0x1), 121 RTW89_DECL_RFK_WM(0x780c, 0x40000000, 0x1), 122 RTW89_DECL_RFK_WM(0x7834, 0x3fffffff, 0x000115f2), 123 RTW89_DECL_RFK_WM(0x7838, 0x7fffffff, 0x0000121), 124 RTW89_DECL_RFK_WM(0x7854, 0x3fffffff, 0x000115f2), 125 RTW89_DECL_RFK_WM(0x7858, 0x7fffffff, 0x0000121), 126 RTW89_DECL_RFK_WM(0x7860, 0x80000000, 0x0), 127 RTW89_DECL_RFK_WM(0x7864, 0x07ffffff, 0x00801ff), 128 RTW89_DECL_RFK_WM(0x7898, 0xffffffff, 0x00000000), 129 RTW89_DECL_RFK_WM(0x789c, 0xffffffff, 0x00000000), 130 RTW89_DECL_RFK_WM(0x78a4, 0x000000ff, 0x16), 131 RTW89_DECL_RFK_WM(0x78b0, 0xffffffff, 0x00000000), 132 RTW89_DECL_RFK_WM(0x78b4, 0x7fffffff, 0x0a002000), 133 RTW89_DECL_RFK_WM(0x78b8, 0x7fffffff, 0x00007628), 134 RTW89_DECL_RFK_WM(0x78bc, 0x07ffffff, 0x7a7807f), 135 RTW89_DECL_RFK_WM(0x78c0, 0xfffe0000, 0x003f), 136 RTW89_DECL_RFK_WM(0x78c4, 0xffffffff, 0x0003ffff), 137 RTW89_DECL_RFK_WM(0x78c8, 0x00ffffff, 0x000000), 138 RTW89_DECL_RFK_WM(0x78c8, 0xf0000000, 0x0), 139 RTW89_DECL_RFK_WM(0x78cc, 0xffffffff, 0x00000000), 140 RTW89_DECL_RFK_WM(0x78d0, 0x07ffffff, 0x2008101), 141 RTW89_DECL_RFK_WM(0x78d4, 0x000000ff, 0x00), 142 RTW89_DECL_RFK_WM(0x78d4, 0x0003fe00, 0x0ff), 143 RTW89_DECL_RFK_WM(0x78d4, 0x07fc0000, 0x100), 144 RTW89_DECL_RFK_WM(0x78d8, 0xffffffff, 0x8008016c), 145 RTW89_DECL_RFK_WM(0x78dc, 0x0001ffff, 0x0807f), 146 RTW89_DECL_RFK_WM(0x78dc, 0xfff00000, 0xc00), 147 RTW89_DECL_RFK_WM(0x78f0, 0x0003ffff, 0x001ff), 148 RTW89_DECL_RFK_WM(0x78f4, 0x000fffff, 0x000), 149 }; 150 151 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_init_txpwr_defs_b); 152 153 static const struct rtw89_reg5_def rtw8852bt_tssi_init_txpwr_he_tb_defs_a[] = { 154 RTW89_DECL_RFK_WM(0x58a0, 0xffffffff, 0x000000fe), 155 RTW89_DECL_RFK_WM(0x58e4, 0x0000007f, 0x1f), 156 }; 157 158 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_init_txpwr_he_tb_defs_a); 159 160 static const struct rtw89_reg5_def rtw8852bt_tssi_init_txpwr_he_tb_defs_b[] = { 161 RTW89_DECL_RFK_WM(0x78a0, 0xffffffff, 0x000000fe), 162 RTW89_DECL_RFK_WM(0x78e4, 0x0000007f, 0x1f), 163 }; 164 165 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_init_txpwr_he_tb_defs_b); 166 167 static const struct rtw89_reg5_def rtw8852bt_tssi_dck_defs_a[] = { 168 RTW89_DECL_RFK_WM(0x580c, 0x0fff0000, 0x000), 169 RTW89_DECL_RFK_WM(0x5814, 0x003ff000, 0x0ef), 170 RTW89_DECL_RFK_WM(0x5814, 0x18000000, 0x0), 171 }; 172 173 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_dck_defs_a); 174 175 static const struct rtw89_reg5_def rtw8852bt_tssi_dck_defs_b[] = { 176 RTW89_DECL_RFK_WM(0x780c, 0x0fff0000, 0x000), 177 RTW89_DECL_RFK_WM(0x7814, 0x003ff000, 0x0ef), 178 RTW89_DECL_RFK_WM(0x7814, 0x18000000, 0x0), 179 }; 180 181 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_dck_defs_b); 182 183 static const struct rtw89_reg5_def rtw8852bt_tssi_dac_gain_defs_a[] = { 184 RTW89_DECL_RFK_WM(0x58b0, 0x00000400, 0x1), 185 RTW89_DECL_RFK_WM(0x58b0, 0x00000fff, 0x000), 186 RTW89_DECL_RFK_WM(0x58b0, 0x00000800, 0x1), 187 RTW89_DECL_RFK_WM(0x5a00, 0xffffffff, 0x00000000), 188 RTW89_DECL_RFK_WM(0x5a04, 0xffffffff, 0x00000000), 189 RTW89_DECL_RFK_WM(0x5a08, 0xffffffff, 0x00000000), 190 RTW89_DECL_RFK_WM(0x5a0c, 0xffffffff, 0x00000000), 191 RTW89_DECL_RFK_WM(0x5a10, 0xffffffff, 0x00000000), 192 RTW89_DECL_RFK_WM(0x5a14, 0xffffffff, 0x00000000), 193 RTW89_DECL_RFK_WM(0x5a18, 0xffffffff, 0x00000000), 194 RTW89_DECL_RFK_WM(0x5a1c, 0xffffffff, 0x00000000), 195 RTW89_DECL_RFK_WM(0x5a20, 0xffffffff, 0x00000000), 196 RTW89_DECL_RFK_WM(0x5a24, 0xffffffff, 0x00000000), 197 RTW89_DECL_RFK_WM(0x5a28, 0xffffffff, 0x00000000), 198 RTW89_DECL_RFK_WM(0x5a2c, 0xffffffff, 0x00000000), 199 RTW89_DECL_RFK_WM(0x5a30, 0xffffffff, 0x00000000), 200 RTW89_DECL_RFK_WM(0x5a34, 0xffffffff, 0x00000000), 201 RTW89_DECL_RFK_WM(0x5a38, 0xffffffff, 0x00000000), 202 RTW89_DECL_RFK_WM(0x5a3c, 0xffffffff, 0x00000000), 203 RTW89_DECL_RFK_WM(0x5a40, 0xffffffff, 0x00000000), 204 RTW89_DECL_RFK_WM(0x5a44, 0xffffffff, 0x00000000), 205 RTW89_DECL_RFK_WM(0x5a48, 0xffffffff, 0x00000000), 206 RTW89_DECL_RFK_WM(0x5a4c, 0xffffffff, 0x00000000), 207 RTW89_DECL_RFK_WM(0x5a50, 0xffffffff, 0x00000000), 208 RTW89_DECL_RFK_WM(0x5a54, 0xffffffff, 0x00000000), 209 RTW89_DECL_RFK_WM(0x5a58, 0xffffffff, 0x00000000), 210 RTW89_DECL_RFK_WM(0x5a5c, 0xffffffff, 0x00000000), 211 RTW89_DECL_RFK_WM(0x5a60, 0xffffffff, 0x00000000), 212 RTW89_DECL_RFK_WM(0x5a64, 0xffffffff, 0x00000000), 213 RTW89_DECL_RFK_WM(0x5a68, 0xffffffff, 0x00000000), 214 RTW89_DECL_RFK_WM(0x5a6c, 0xffffffff, 0x00000000), 215 RTW89_DECL_RFK_WM(0x5a70, 0xffffffff, 0x00000000), 216 RTW89_DECL_RFK_WM(0x5a74, 0xffffffff, 0x00000000), 217 RTW89_DECL_RFK_WM(0x5a78, 0xffffffff, 0x00000000), 218 RTW89_DECL_RFK_WM(0x5a7c, 0xffffffff, 0x00000000), 219 RTW89_DECL_RFK_WM(0x5a80, 0xffffffff, 0x00000000), 220 RTW89_DECL_RFK_WM(0x5a84, 0xffffffff, 0x00000000), 221 RTW89_DECL_RFK_WM(0x5a88, 0xffffffff, 0x00000000), 222 RTW89_DECL_RFK_WM(0x5a8c, 0xffffffff, 0x00000000), 223 RTW89_DECL_RFK_WM(0x5a90, 0xffffffff, 0x00000000), 224 RTW89_DECL_RFK_WM(0x5a94, 0xffffffff, 0x00000000), 225 RTW89_DECL_RFK_WM(0x5a98, 0xffffffff, 0x00000000), 226 RTW89_DECL_RFK_WM(0x5a9c, 0xffffffff, 0x00000000), 227 RTW89_DECL_RFK_WM(0x5aa0, 0xffffffff, 0x00000000), 228 RTW89_DECL_RFK_WM(0x5aa4, 0xffffffff, 0x00000000), 229 RTW89_DECL_RFK_WM(0x5aa8, 0xffffffff, 0x00000000), 230 RTW89_DECL_RFK_WM(0x5aac, 0xffffffff, 0x00000000), 231 RTW89_DECL_RFK_WM(0x5ab0, 0xffffffff, 0x00000000), 232 RTW89_DECL_RFK_WM(0x5ab4, 0xffffffff, 0x00000000), 233 RTW89_DECL_RFK_WM(0x5ab8, 0xffffffff, 0x00000000), 234 RTW89_DECL_RFK_WM(0x5abc, 0xffffffff, 0x00000000), 235 RTW89_DECL_RFK_WM(0x5ac0, 0xffffffff, 0x00000000), 236 }; 237 238 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_dac_gain_defs_a); 239 240 static const struct rtw89_reg5_def rtw8852bt_tssi_dac_gain_defs_b[] = { 241 RTW89_DECL_RFK_WM(0x78b0, 0x00000fff, 0x000), 242 RTW89_DECL_RFK_WM(0x78b0, 0x00000800, 0x1), 243 RTW89_DECL_RFK_WM(0x7a00, 0xffffffff, 0x00000000), 244 RTW89_DECL_RFK_WM(0x7a04, 0xffffffff, 0x00000000), 245 RTW89_DECL_RFK_WM(0x7a08, 0xffffffff, 0x00000000), 246 RTW89_DECL_RFK_WM(0x7a0c, 0xffffffff, 0x00000000), 247 RTW89_DECL_RFK_WM(0x7a10, 0xffffffff, 0x00000000), 248 RTW89_DECL_RFK_WM(0x7a14, 0xffffffff, 0x00000000), 249 RTW89_DECL_RFK_WM(0x7a18, 0xffffffff, 0x00000000), 250 RTW89_DECL_RFK_WM(0x7a1c, 0xffffffff, 0x00000000), 251 RTW89_DECL_RFK_WM(0x7a20, 0xffffffff, 0x00000000), 252 RTW89_DECL_RFK_WM(0x7a24, 0xffffffff, 0x00000000), 253 RTW89_DECL_RFK_WM(0x7a28, 0xffffffff, 0x00000000), 254 RTW89_DECL_RFK_WM(0x7a2c, 0xffffffff, 0x00000000), 255 RTW89_DECL_RFK_WM(0x7a30, 0xffffffff, 0x00000000), 256 RTW89_DECL_RFK_WM(0x7a34, 0xffffffff, 0x00000000), 257 RTW89_DECL_RFK_WM(0x7a38, 0xffffffff, 0x00000000), 258 RTW89_DECL_RFK_WM(0x7a3c, 0xffffffff, 0x00000000), 259 RTW89_DECL_RFK_WM(0x7a40, 0xffffffff, 0x00000000), 260 RTW89_DECL_RFK_WM(0x7a44, 0xffffffff, 0x00000000), 261 RTW89_DECL_RFK_WM(0x7a48, 0xffffffff, 0x00000000), 262 RTW89_DECL_RFK_WM(0x7a4c, 0xffffffff, 0x00000000), 263 RTW89_DECL_RFK_WM(0x7a50, 0xffffffff, 0x00000000), 264 RTW89_DECL_RFK_WM(0x7a54, 0xffffffff, 0x00000000), 265 RTW89_DECL_RFK_WM(0x7a58, 0xffffffff, 0x00000000), 266 RTW89_DECL_RFK_WM(0x7a5c, 0xffffffff, 0x00000000), 267 RTW89_DECL_RFK_WM(0x7a60, 0xffffffff, 0x00000000), 268 RTW89_DECL_RFK_WM(0x7a64, 0xffffffff, 0x00000000), 269 RTW89_DECL_RFK_WM(0x7a68, 0xffffffff, 0x00000000), 270 RTW89_DECL_RFK_WM(0x7a6c, 0xffffffff, 0x00000000), 271 RTW89_DECL_RFK_WM(0x7a70, 0xffffffff, 0x00000000), 272 RTW89_DECL_RFK_WM(0x7a74, 0xffffffff, 0x00000000), 273 RTW89_DECL_RFK_WM(0x7a78, 0xffffffff, 0x00000000), 274 RTW89_DECL_RFK_WM(0x7a7c, 0xffffffff, 0x00000000), 275 RTW89_DECL_RFK_WM(0x7a80, 0xffffffff, 0x00000000), 276 RTW89_DECL_RFK_WM(0x7a84, 0xffffffff, 0x00000000), 277 RTW89_DECL_RFK_WM(0x7a88, 0xffffffff, 0x00000000), 278 RTW89_DECL_RFK_WM(0x7a8c, 0xffffffff, 0x00000000), 279 RTW89_DECL_RFK_WM(0x7a90, 0xffffffff, 0x00000000), 280 RTW89_DECL_RFK_WM(0x7a94, 0xffffffff, 0x00000000), 281 RTW89_DECL_RFK_WM(0x7a98, 0xffffffff, 0x00000000), 282 RTW89_DECL_RFK_WM(0x7a9c, 0xffffffff, 0x00000000), 283 RTW89_DECL_RFK_WM(0x7aa0, 0xffffffff, 0x00000000), 284 RTW89_DECL_RFK_WM(0x7aa4, 0xffffffff, 0x00000000), 285 RTW89_DECL_RFK_WM(0x7aa8, 0xffffffff, 0x00000000), 286 RTW89_DECL_RFK_WM(0x7aac, 0xffffffff, 0x00000000), 287 RTW89_DECL_RFK_WM(0x7ab0, 0xffffffff, 0x00000000), 288 RTW89_DECL_RFK_WM(0x7ab4, 0xffffffff, 0x00000000), 289 RTW89_DECL_RFK_WM(0x7ab8, 0xffffffff, 0x00000000), 290 RTW89_DECL_RFK_WM(0x7abc, 0xffffffff, 0x00000000), 291 RTW89_DECL_RFK_WM(0x7ac0, 0xffffffff, 0x00000000), 292 }; 293 294 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_dac_gain_defs_b); 295 296 static const struct rtw89_reg5_def rtw8852bt_tssi_slope_a_defs_2g[] = { 297 RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0801008), 298 RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201020), 299 RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201008), 300 RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0804008), 301 RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008), 302 RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008), 303 RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808), 304 RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08081e28), 305 RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808), 306 RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08081e28), 307 RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808), 308 RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1), 309 }; 310 311 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_slope_a_defs_2g); 312 313 static const struct rtw89_reg5_def rtw8852bt_tssi_slope_a_defs_5g[] = { 314 RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0201008), 315 RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201019), 316 RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201008), 317 RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0201008), 318 RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008), 319 RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008), 320 RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808), 321 RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08081808), 322 RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808), 323 RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08080808), 324 RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808), 325 RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1), 326 }; 327 328 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_slope_a_defs_5g); 329 330 static const struct rtw89_reg5_def rtw8852bt_tssi_slope_b_defs_2g[] = { 331 RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0801008), 332 RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201020), 333 RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0201008), 334 RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0804008), 335 RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0201008), 336 RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x008), 337 RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808), 338 RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08081e28), 339 RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08080808), 340 RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08081e28), 341 RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x0808), 342 RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x1), 343 }; 344 345 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_slope_b_defs_2g); 346 347 static const struct rtw89_reg5_def rtw8852bt_tssi_slope_b_defs_5g[] = { 348 RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0201008), 349 RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201019), 350 RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0201008), 351 RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0201008), 352 RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0201008), 353 RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x008), 354 RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808), 355 RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08081808), 356 RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08080808), 357 RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08080808), 358 RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x0808), 359 RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x1), 360 }; 361 362 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_slope_b_defs_5g); 363 364 static const struct rtw89_reg5_def rtw8852bt_tssi_align_a_2g_all_defs[] = { 365 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), 366 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), 367 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), 368 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x029f57c0), 369 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000077), 370 RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), 371 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x029f5bc0), 372 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000076), 373 RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), 374 }; 375 376 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_align_a_2g_all_defs); 377 378 static const struct rtw89_reg5_def rtw8852bt_tssi_align_a_5g1_all_defs[] = { 379 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), 380 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), 381 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), 382 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x007ff3d7), 383 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000068), 384 RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), 385 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), 386 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), 387 RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), 388 }; 389 390 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_align_a_5g1_all_defs); 391 392 static const struct rtw89_reg5_def rtw8852bt_tssi_align_a_5g2_all_defs[] = { 393 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), 394 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), 395 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), 396 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x00a003db), 397 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000065), 398 RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), 399 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), 400 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), 401 RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), 402 }; 403 404 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_align_a_5g2_all_defs); 405 406 static const struct rtw89_reg5_def rtw8852bt_tssi_align_a_5g3_all_defs[] = { 407 RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), 408 RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), 409 RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), 410 RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01101be2), 411 RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000065), 412 RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), 413 RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), 414 RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), 415 RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), 416 }; 417 418 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_align_a_5g3_all_defs); 419 420 static const struct rtw89_reg5_def rtw8852bt_tssi_align_b_2g_all_defs[] = { 421 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), 422 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), 423 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), 424 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x023f3fb9), 425 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000075), 426 RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), 427 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x01df3fb8), 428 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000074), 429 RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), 430 }; 431 432 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_align_b_2g_all_defs); 433 434 static const struct rtw89_reg5_def rtw8852bt_tssi_align_b_5g1_all_defs[] = { 435 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), 436 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), 437 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), 438 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x010017e0), 439 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), 440 RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), 441 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), 442 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), 443 RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), 444 }; 445 446 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_align_b_5g1_all_defs); 447 448 static const struct rtw89_reg5_def rtw8852bt_tssi_align_b_5g2_all_defs[] = { 449 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), 450 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), 451 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), 452 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x01201fe2), 453 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000066), 454 RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), 455 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), 456 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), 457 RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), 458 }; 459 460 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_align_b_5g2_all_defs); 461 462 static const struct rtw89_reg5_def rtw8852bt_tssi_align_b_5g3_all_defs[] = { 463 RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), 464 RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), 465 RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), 466 RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x01602fe5), 467 RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000068), 468 RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), 469 RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), 470 RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), 471 RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), 472 }; 473 474 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_align_b_5g3_all_defs); 475 476 static const struct rtw89_reg5_def rtw8852bt_tssi_slope_defs_a[] = { 477 RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x1), 478 RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x1), 479 RTW89_DECL_RFK_WM(0x5814, 0x20000000, 0x1), 480 }; 481 482 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_slope_defs_a); 483 484 static const struct rtw89_reg5_def rtw8852bt_tssi_slope_defs_b[] = { 485 RTW89_DECL_RFK_WM(0x7814, 0x00000800, 0x1), 486 RTW89_DECL_RFK_WM(0x781c, 0x20000000, 0x1), 487 RTW89_DECL_RFK_WM(0x7814, 0x20000000, 0x1), 488 }; 489 490 RTW89_DECLARE_RFK_TBL(rtw8852bt_tssi_slope_defs_b); 491