1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt722-sdca-sdw.c -- rt722 SDCA ALSA SoC audio driver 4 // 5 // Copyright(c) 2023 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/module.h> 12 #include <linux/mod_devicetable.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/soundwire/sdw_registers.h> 15 16 #include "rt722-sdca.h" 17 #include "rt722-sdca-sdw.h" 18 19 static int rt722_sdca_mbq_size(struct device *dev, unsigned int reg) 20 { 21 switch (reg) { 22 case 0x22f0 ... 0x22f1: 23 case 0x2f01 ... 0x2f0c: 24 case 0x2f21 ... 0x2f24: 25 case 0x2f35 ... 0x2f36: 26 case 0x2f50 ... 0x2f52: 27 case 0x2f54: 28 case 0x2f58 ... 0x2f5d: 29 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 30 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_SELECTED_MODE, 31 0): 32 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE, 33 0): 34 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU03, RT722_SDCA_CTL_SELECTED_MODE, 35 0): 36 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, 37 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 38 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, 39 RT722_SDCA_CTL_FU_MUTE, CH_R): 40 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU0D, 41 RT722_SDCA_CTL_SELECTED_MODE, 0): 42 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, 43 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 44 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, 45 RT722_SDCA_CTL_FU_MUTE, CH_R): 46 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, 47 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 48 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, 49 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 50 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, 51 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 52 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, 53 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 54 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01, 55 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 56 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11, 57 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 58 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, 59 RT722_SDCA_CTL_FU_MUTE, CH_01) ... 60 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, 61 RT722_SDCA_CTL_FU_MUTE, CH_04): 62 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26, 63 RT722_SDCA_CTL_VENDOR_DEF, 0): 64 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, 65 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 66 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, 67 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 68 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 69 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F, 70 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 71 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 72 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ... 73 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 74 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0): 75 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, 76 RT722_SDCA_CTL_FU_MUTE, CH_L) ... 77 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, 78 RT722_SDCA_CTL_FU_MUTE, CH_R): 79 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23, 80 RT722_SDCA_CTL_VENDOR_DEF, CH_08): 81 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, 82 RT722_SDCA_CTL_REQ_POWER_STATE, 0): 83 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, 84 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 85 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 86 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31, 87 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): 88 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2: 89 case 0x44011000 ... 0x440115ff: 90 case 0x44012000: 91 case 0x44012021: 92 case 0x44012022: 93 case 0x44012025: 94 case 0x44021000 ... 0x440211ff: 95 case 0x44022000: 96 case 0x44022019: 97 case 0x4402201a: 98 case 0x4402201d: 99 case 0x44041000 ... 0x440415ff: 100 case 0x44042000: 101 case 0x44042019: 102 case 0x4404201a: 103 case 0x4404201d: 104 return 1; 105 case 0x2000000 ... 0x2000024: 106 case 0x2000029 ... 0x200004a: 107 case 0x2000051 ... 0x2000052: 108 case 0x200005a ... 0x200005b: 109 case 0x2000061 ... 0x2000069: 110 case 0x200006b: 111 case 0x2000070: 112 case 0x200007f: 113 case 0x2000082 ... 0x200008e: 114 case 0x2000090 ... 0x2000094: 115 case 0x20000b1: 116 case 0x20000b4: 117 case 0x3110000: 118 case 0x5300000 ... 0x5300300: 119 case 0x5400002: 120 case 0x5600000 ... 0x5600007: 121 case 0x5700000 ... 0x5700004: 122 case 0x5800000 ... 0x5800004: 123 case 0x5810000: 124 case 0x5b00003: 125 case 0x5c00011: 126 case 0x5d00006: 127 case 0x5f00000 ... 0x5f0000d: 128 case 0x5f00030: 129 case 0x6100000 ... 0x6100051: 130 case 0x6100055 ... 0x6100057: 131 case 0x6100060: 132 case 0x6100062: 133 case 0x6100064 ... 0x6100065: 134 case 0x6100067: 135 case 0x6100070 ... 0x610007c: 136 case 0x6100080: 137 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, 138 CH_01) ... 139 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN, 140 CH_04): 141 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 142 CH_01): 143 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 144 CH_02): 145 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 146 CH_03): 147 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME, 148 CH_04): 149 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L): 150 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R): 151 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME, 152 CH_L): 153 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME, 154 CH_R): 155 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME, 156 CH_L): 157 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME, 158 CH_R): 159 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, 160 RT722_SDCA_CTL_FU_CH_GAIN, CH_L): 161 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44, 162 RT722_SDCA_CTL_FU_CH_GAIN, CH_R): 163 return 2; 164 default: 165 return 0; 166 } 167 } 168 169 static const struct regmap_sdw_mbq_cfg rt722_mbq_config = { 170 .mbq_size = rt722_sdca_mbq_size, 171 }; 172 173 static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg) 174 { 175 return rt722_sdca_mbq_size(dev, reg) > 0; 176 } 177 178 static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg) 179 { 180 switch (reg) { 181 case 0x2f01: 182 case 0x2f54: 183 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 184 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 185 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 186 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE, 187 0): 188 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 189 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 190 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 191 0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, 192 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0): 193 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0): 194 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0): 195 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2: 196 case 0x2000000: 197 case 0x2000007: 198 case 0x200000d: 199 case 0x2000019: 200 case 0x2000020: 201 case 0x2000030: 202 case 0x2000046: 203 case 0x2000067: 204 case 0x2000084: 205 case 0x2000086: 206 case 0x3110000: 207 case 0x5800003: 208 case 0x5810000: 209 case 0x44011000 ... 0x440115ff: 210 case 0x44012000: 211 case 0x44012021: 212 case 0x44012022: 213 case 0x44012025: 214 case 0x44021000 ... 0x440211ff: 215 case 0x44022000: 216 case 0x44022019: 217 case 0x4402201a: 218 case 0x4402201d: 219 case 0x44041000 ... 0x440415ff: 220 case 0x44042000: 221 case 0x44042019: 222 case 0x4404201a: 223 case 0x4404201d: 224 return true; 225 default: 226 return false; 227 } 228 } 229 230 static const struct regmap_config rt722_sdca_regmap = { 231 .reg_bits = 32, 232 .val_bits = 16, 233 .readable_reg = rt722_sdca_readable_register, 234 .volatile_reg = rt722_sdca_volatile_register, 235 .max_register = 0x44ffffff, 236 .reg_defaults = rt722_sdca_reg_defaults, 237 .num_reg_defaults = ARRAY_SIZE(rt722_sdca_reg_defaults), 238 .cache_type = REGCACHE_MAPLE, 239 .use_single_read = true, 240 .use_single_write = true, 241 }; 242 243 static int rt722_sdca_update_status(struct sdw_slave *slave, 244 enum sdw_slave_status status) 245 { 246 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 247 248 if (status == SDW_SLAVE_UNATTACHED) 249 rt722->hw_init = false; 250 251 if (status == SDW_SLAVE_ATTACHED) { 252 if (rt722->hs_jack) { 253 /* 254 * Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then 255 * if the device attached again, we will need to set the setting back. 256 * It could avoid losing the jack detection interrupt. 257 * This also could sync with the cache value as the rt722_sdca_jack_init set. 258 */ 259 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1, 260 SDW_SCP_SDCA_INTMASK_SDCA_0); 261 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2, 262 SDW_SCP_SDCA_INTMASK_SDCA_8); 263 } 264 } 265 266 /* 267 * Perform initialization only if slave status is present and 268 * hw_init flag is false 269 */ 270 if (rt722->hw_init || status != SDW_SLAVE_ATTACHED) 271 return 0; 272 273 /* perform I/O transfers required for Slave initialization */ 274 return rt722_sdca_io_init(&slave->dev, slave); 275 } 276 277 static int rt722_sdca_read_prop(struct sdw_slave *slave) 278 { 279 struct sdw_slave_prop *prop = &slave->prop; 280 int nval; 281 int i, j; 282 u32 bit; 283 unsigned long addr; 284 struct sdw_dpn_prop *dpn; 285 286 sdw_slave_read_lane_mapping(slave); 287 288 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; 289 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 290 291 prop->paging_support = true; 292 293 /* 294 * port = 1 for headphone playback 295 * port = 2 for headset-mic capture 296 * port = 3 for speaker playback 297 * port = 6 for digital-mic capture 298 */ 299 prop->source_ports = BIT(6) | BIT(2); /* BITMAP: 01000100 */ 300 prop->sink_ports = BIT(3) | BIT(1); /* BITMAP: 00001010 */ 301 302 nval = hweight32(prop->source_ports); 303 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 304 sizeof(*prop->src_dpn_prop), GFP_KERNEL); 305 if (!prop->src_dpn_prop) 306 return -ENOMEM; 307 308 i = 0; 309 dpn = prop->src_dpn_prop; 310 addr = prop->source_ports; 311 for_each_set_bit(bit, &addr, 32) { 312 dpn[i].num = bit; 313 dpn[i].type = SDW_DPN_FULL; 314 dpn[i].simple_ch_prep_sm = true; 315 dpn[i].ch_prep_timeout = 10; 316 i++; 317 } 318 319 /* do this again for sink now */ 320 nval = hweight32(prop->sink_ports); 321 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 322 sizeof(*prop->sink_dpn_prop), GFP_KERNEL); 323 if (!prop->sink_dpn_prop) 324 return -ENOMEM; 325 326 j = 0; 327 dpn = prop->sink_dpn_prop; 328 addr = prop->sink_ports; 329 for_each_set_bit(bit, &addr, 32) { 330 dpn[j].num = bit; 331 dpn[j].type = SDW_DPN_FULL; 332 dpn[j].simple_ch_prep_sm = true; 333 dpn[j].ch_prep_timeout = 10; 334 j++; 335 } 336 337 /* set the timeout values */ 338 prop->clk_stop_timeout = 900; 339 340 /* wake-up event */ 341 prop->wake_capable = 1; 342 343 /* Three data lanes are supported by rt722-sdca codec */ 344 prop->lane_control_support = true; 345 346 return 0; 347 } 348 349 static int rt722_sdca_interrupt_callback(struct sdw_slave *slave, 350 struct sdw_slave_intr_status *status) 351 { 352 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 353 int ret, stat; 354 int count = 0, retry = 3; 355 unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0; 356 357 if (cancel_delayed_work_sync(&rt722->jack_detect_work)) { 358 dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__); 359 /* avoid the HID owner doesn't change to device */ 360 if (rt722->scp_sdca_stat2) 361 scp_sdca_stat2 = rt722->scp_sdca_stat2; 362 } 363 364 /* 365 * The critical section below intentionally protects a rather large piece of code. 366 * We don't want to allow the system suspend to disable an interrupt while we are 367 * processing it, which could be problematic given the quirky SoundWire interrupt 368 * scheme. We do want however to prevent new workqueues from being scheduled if 369 * the disable_irq flag was set during system suspend. 370 */ 371 mutex_lock(&rt722->disable_irq_lock); 372 373 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 374 if (ret < 0) 375 goto io_error; 376 rt722->scp_sdca_stat1 = ret; 377 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 378 if (ret < 0) 379 goto io_error; 380 rt722->scp_sdca_stat2 = ret; 381 if (scp_sdca_stat2) 382 rt722->scp_sdca_stat2 |= scp_sdca_stat2; 383 do { 384 /* clear flag */ 385 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 386 if (ret < 0) 387 goto io_error; 388 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) { 389 ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1, 390 SDW_SCP_SDCA_INT_SDCA_0, SDW_SCP_SDCA_INT_SDCA_0); 391 if (ret < 0) 392 goto io_error; 393 } 394 395 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 396 if (ret < 0) 397 goto io_error; 398 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) { 399 ret = sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INT2, 400 SDW_SCP_SDCA_INTMASK_SDCA_8); 401 if (ret < 0) 402 goto io_error; 403 } 404 405 /* check if flag clear or not */ 406 ret = sdw_read_no_pm(rt722->slave, SDW_DP0_INT); 407 if (ret < 0) 408 goto io_error; 409 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; 410 411 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1); 412 if (ret < 0) 413 goto io_error; 414 scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0; 415 416 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2); 417 if (ret < 0) 418 goto io_error; 419 scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8; 420 421 stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade; 422 423 count++; 424 } while (stat != 0 && count < retry); 425 426 if (stat) 427 dev_warn(&slave->dev, 428 "%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__, 429 rt722->scp_sdca_stat1, rt722->scp_sdca_stat2); 430 431 if (status->sdca_cascade && !rt722->disable_irq) 432 mod_delayed_work(system_power_efficient_wq, 433 &rt722->jack_detect_work, msecs_to_jiffies(280)); 434 435 mutex_unlock(&rt722->disable_irq_lock); 436 437 return 0; 438 439 io_error: 440 mutex_unlock(&rt722->disable_irq_lock); 441 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret); 442 return ret; 443 } 444 445 static const struct sdw_slave_ops rt722_sdca_slave_ops = { 446 .read_prop = rt722_sdca_read_prop, 447 .interrupt_callback = rt722_sdca_interrupt_callback, 448 .update_status = rt722_sdca_update_status, 449 }; 450 451 static int rt722_sdca_sdw_probe(struct sdw_slave *slave, 452 const struct sdw_device_id *id) 453 { 454 struct regmap *regmap; 455 456 /* Regmap Initialization */ 457 regmap = devm_regmap_init_sdw_mbq_cfg(&slave->dev, slave, 458 &rt722_sdca_regmap, 459 &rt722_mbq_config); 460 if (IS_ERR(regmap)) 461 return PTR_ERR(regmap); 462 463 return rt722_sdca_init(&slave->dev, regmap, slave); 464 } 465 466 static void rt722_sdca_sdw_remove(struct sdw_slave *slave) 467 { 468 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev); 469 470 if (rt722->hw_init) { 471 cancel_delayed_work_sync(&rt722->jack_detect_work); 472 cancel_delayed_work_sync(&rt722->jack_btn_check_work); 473 } 474 475 if (rt722->first_hw_init) 476 pm_runtime_disable(&slave->dev); 477 478 mutex_destroy(&rt722->calibrate_mutex); 479 mutex_destroy(&rt722->disable_irq_lock); 480 } 481 482 static const struct sdw_device_id rt722_sdca_id[] = { 483 SDW_SLAVE_ENTRY_EXT(0x025d, 0x722, 0x3, 0x1, 0), 484 {}, 485 }; 486 MODULE_DEVICE_TABLE(sdw, rt722_sdca_id); 487 488 static int rt722_sdca_dev_suspend(struct device *dev) 489 { 490 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev); 491 492 if (!rt722->hw_init) 493 return 0; 494 495 cancel_delayed_work_sync(&rt722->jack_detect_work); 496 cancel_delayed_work_sync(&rt722->jack_btn_check_work); 497 498 regcache_cache_only(rt722->regmap, true); 499 500 return 0; 501 } 502 503 static int rt722_sdca_dev_system_suspend(struct device *dev) 504 { 505 struct rt722_sdca_priv *rt722_sdca = dev_get_drvdata(dev); 506 struct sdw_slave *slave = dev_to_sdw_dev(dev); 507 int ret1, ret2; 508 509 if (!rt722_sdca->hw_init) 510 return 0; 511 512 /* 513 * prevent new interrupts from being handled after the 514 * deferred work completes and before the parent disables 515 * interrupts on the link 516 */ 517 mutex_lock(&rt722_sdca->disable_irq_lock); 518 rt722_sdca->disable_irq = true; 519 ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1, 520 SDW_SCP_SDCA_INTMASK_SDCA_0, 0); 521 ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2, 522 SDW_SCP_SDCA_INTMASK_SDCA_8, 0); 523 mutex_unlock(&rt722_sdca->disable_irq_lock); 524 525 if (ret1 < 0 || ret2 < 0) { 526 /* log but don't prevent suspend from happening */ 527 dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__); 528 } 529 530 return rt722_sdca_dev_suspend(dev); 531 } 532 533 #define RT722_PROBE_TIMEOUT 5000 534 535 static int rt722_sdca_dev_resume(struct device *dev) 536 { 537 struct sdw_slave *slave = dev_to_sdw_dev(dev); 538 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev); 539 int ret; 540 541 if (!rt722->first_hw_init) 542 return 0; 543 544 if (!slave->unattach_request) { 545 mutex_lock(&rt722->disable_irq_lock); 546 if (rt722->disable_irq == true) { 547 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_0); 548 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8); 549 rt722->disable_irq = false; 550 } 551 mutex_unlock(&rt722->disable_irq_lock); 552 } 553 554 ret = sdw_slave_wait_for_init(slave, RT722_PROBE_TIMEOUT); 555 if (ret) 556 return ret; 557 558 regcache_cache_only(rt722->regmap, false); 559 regcache_sync(rt722->regmap); 560 return 0; 561 } 562 563 static const struct dev_pm_ops rt722_sdca_pm = { 564 SYSTEM_SLEEP_PM_OPS(rt722_sdca_dev_system_suspend, rt722_sdca_dev_resume) 565 RUNTIME_PM_OPS(rt722_sdca_dev_suspend, rt722_sdca_dev_resume, NULL) 566 }; 567 568 static struct sdw_driver rt722_sdca_sdw_driver = { 569 .driver = { 570 .name = "rt722-sdca", 571 .pm = pm_ptr(&rt722_sdca_pm), 572 }, 573 .probe = rt722_sdca_sdw_probe, 574 .remove = rt722_sdca_sdw_remove, 575 .ops = &rt722_sdca_slave_ops, 576 .id_table = rt722_sdca_id, 577 }; 578 module_sdw_driver(rt722_sdca_sdw_driver); 579 580 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver"); 581 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>"); 582 MODULE_LICENSE("GPL"); 583