1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt722-sdca.c -- rt722 SDCA ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/cleanup.h>
10 #include <linux/bitops.h>
11 #include <linux/delay.h>
12 #include <linux/dmi.h>
13 #include <linux/firmware.h>
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/slab.h>
20 #include <linux/soundwire/sdw_registers.h>
21 #include <sound/core.h>
22 #include <sound/initval.h>
23 #include <sound/jack.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/sdw.h>
28 #include <sound/tlv.h>
29
30 #include "rt722-sdca.h"
31
32 #define RT722_NID_ADDR(nid, reg) ((nid) << 20 | (reg))
33
rt722_sdca_index_write(struct rt722_sdca_priv * rt722,unsigned int nid,unsigned int reg,unsigned int value)34 int rt722_sdca_index_write(struct rt722_sdca_priv *rt722,
35 unsigned int nid, unsigned int reg, unsigned int value)
36 {
37 struct regmap *regmap = rt722->regmap;
38 unsigned int addr = RT722_NID_ADDR(nid, reg);
39 int ret;
40
41 ret = regmap_write(regmap, addr, value);
42 if (ret < 0)
43 dev_err(&rt722->slave->dev,
44 "%s: Failed to set private value: %06x <= %04x ret=%d\n",
45 __func__, addr, value, ret);
46
47 return ret;
48 }
49
rt722_sdca_index_read(struct rt722_sdca_priv * rt722,unsigned int nid,unsigned int reg,unsigned int * value)50 int rt722_sdca_index_read(struct rt722_sdca_priv *rt722,
51 unsigned int nid, unsigned int reg, unsigned int *value)
52 {
53 int ret;
54 struct regmap *regmap = rt722->regmap;
55 unsigned int addr = RT722_NID_ADDR(nid, reg);
56
57 ret = regmap_read(regmap, addr, value);
58 if (ret < 0)
59 dev_err(&rt722->slave->dev,
60 "%s: Failed to get private value: %06x => %04x ret=%d\n",
61 __func__, addr, *value, ret);
62
63 return ret;
64 }
65
rt722_sdca_index_update_bits(struct rt722_sdca_priv * rt722,unsigned int nid,unsigned int reg,unsigned int mask,unsigned int val)66 static int rt722_sdca_index_update_bits(struct rt722_sdca_priv *rt722,
67 unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val)
68 {
69 unsigned int tmp;
70 int ret;
71
72 ret = rt722_sdca_index_read(rt722, nid, reg, &tmp);
73 if (ret < 0)
74 return ret;
75
76 set_mask_bits(&tmp, mask, val);
77 return rt722_sdca_index_write(rt722, nid, reg, tmp);
78 }
79
rt722_sdca_btn_type(unsigned char * buffer)80 static int rt722_sdca_btn_type(unsigned char *buffer)
81 {
82 if ((*buffer & 0xf0) == 0x10 || (*buffer & 0x0f) == 0x01 || (*(buffer + 1) == 0x01) ||
83 (*(buffer + 1) == 0x10))
84 return SND_JACK_BTN_2;
85 else if ((*buffer & 0xf0) == 0x20 || (*buffer & 0x0f) == 0x02 || (*(buffer + 1) == 0x02) ||
86 (*(buffer + 1) == 0x20))
87 return SND_JACK_BTN_3;
88 else if ((*buffer & 0xf0) == 0x40 || (*buffer & 0x0f) == 0x04 || (*(buffer + 1) == 0x04) ||
89 (*(buffer + 1) == 0x40))
90 return SND_JACK_BTN_0;
91 else if ((*buffer & 0xf0) == 0x80 || (*buffer & 0x0f) == 0x08 || (*(buffer + 1) == 0x08) ||
92 (*(buffer + 1) == 0x80))
93 return SND_JACK_BTN_1;
94
95 return 0;
96 }
97
rt722_sdca_button_detect(struct rt722_sdca_priv * rt722)98 static unsigned int rt722_sdca_button_detect(struct rt722_sdca_priv *rt722)
99 {
100 unsigned int btn_type = 0, offset, idx, val, owner;
101 int ret;
102 unsigned char buf[3];
103
104 /* get current UMP message owner */
105 ret = regmap_read(rt722->regmap,
106 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
107 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0), &owner);
108 if (ret < 0)
109 return 0;
110
111 /* if owner is device then there is no button event from device */
112 if (owner == 1)
113 return 0;
114
115 /* read UMP message offset */
116 ret = regmap_read(rt722->regmap,
117 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
118 RT722_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset);
119 if (ret < 0)
120 goto _end_btn_det_;
121
122 for (idx = 0; idx < sizeof(buf); idx++) {
123 ret = regmap_read(rt722->regmap,
124 RT722_BUF_ADDR_HID1 + offset + idx, &val);
125 if (ret < 0)
126 goto _end_btn_det_;
127 buf[idx] = val & 0xff;
128 }
129
130 if (buf[0] == 0x11)
131 btn_type = rt722_sdca_btn_type(&buf[1]);
132
133 _end_btn_det_:
134 /* Host is owner, so set back to device */
135 if (owner == 0)
136 /* set owner to device */
137 regmap_write(rt722->regmap,
138 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
139 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0), 0x01);
140
141 return btn_type;
142 }
143
rt722_sdca_headset_detect(struct rt722_sdca_priv * rt722)144 static int rt722_sdca_headset_detect(struct rt722_sdca_priv *rt722)
145 {
146 unsigned int det_mode;
147 int ret;
148
149 /* get detected_mode */
150 ret = regmap_read(rt722->regmap,
151 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49,
152 RT722_SDCA_CTL_DETECTED_MODE, 0), &det_mode);
153 if (ret < 0)
154 goto io_error;
155
156 switch (det_mode) {
157 case 0x00:
158 rt722->jack_type = 0;
159 break;
160 case 0x03:
161 rt722->jack_type = SND_JACK_HEADPHONE;
162 break;
163 case 0x05:
164 rt722->jack_type = SND_JACK_HEADSET;
165 break;
166 }
167
168 /* write selected_mode */
169 if (det_mode) {
170 ret = regmap_write(rt722->regmap,
171 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49,
172 RT722_SDCA_CTL_SELECTED_MODE, 0), det_mode);
173 if (ret < 0)
174 goto io_error;
175 }
176
177 dev_dbg(&rt722->slave->dev,
178 "%s, detected_mode=0x%x\n", __func__, det_mode);
179
180 return 0;
181
182 io_error:
183 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
184 return ret;
185 }
186
rt722_sdca_jack_detect_handler(struct work_struct * work)187 static void rt722_sdca_jack_detect_handler(struct work_struct *work)
188 {
189 struct rt722_sdca_priv *rt722 =
190 container_of(work, struct rt722_sdca_priv, jack_detect_work.work);
191 int btn_type = 0, ret;
192
193 if (!rt722->hs_jack)
194 return;
195
196 if (!rt722->component->card || !rt722->component->card->instantiated)
197 return;
198
199 /* SDW_SCP_SDCA_INT_SDCA_0 is used for jack detection */
200 if (rt722->scp_sdca_stat1 & SDW_SCP_SDCA_INT_SDCA_0) {
201 ret = rt722_sdca_headset_detect(rt722);
202 if (ret < 0)
203 return;
204 }
205
206 /* SDW_SCP_SDCA_INT_SDCA_8 is used for button detection */
207 if (rt722->scp_sdca_stat2 & SDW_SCP_SDCA_INT_SDCA_8)
208 btn_type = rt722_sdca_button_detect(rt722);
209
210 if (rt722->jack_type == 0)
211 btn_type = 0;
212
213 dev_dbg(&rt722->slave->dev,
214 "in %s, jack_type=%d\n", __func__, rt722->jack_type);
215 dev_dbg(&rt722->slave->dev,
216 "in %s, btn_type=0x%x\n", __func__, btn_type);
217 dev_dbg(&rt722->slave->dev,
218 "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
219 rt722->scp_sdca_stat1, rt722->scp_sdca_stat2);
220
221 snd_soc_jack_report(rt722->hs_jack, rt722->jack_type | btn_type,
222 SND_JACK_HEADSET |
223 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
224 SND_JACK_BTN_2 | SND_JACK_BTN_3);
225
226 if (btn_type) {
227 /* button released */
228 snd_soc_jack_report(rt722->hs_jack, rt722->jack_type,
229 SND_JACK_HEADSET |
230 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
231 SND_JACK_BTN_2 | SND_JACK_BTN_3);
232
233 mod_delayed_work(system_power_efficient_wq,
234 &rt722->jack_btn_check_work, msecs_to_jiffies(200));
235 }
236 }
237
rt722_sdca_btn_check_handler(struct work_struct * work)238 static void rt722_sdca_btn_check_handler(struct work_struct *work)
239 {
240 struct rt722_sdca_priv *rt722 =
241 container_of(work, struct rt722_sdca_priv, jack_btn_check_work.work);
242 int btn_type = 0, ret, idx;
243 unsigned int det_mode, offset, val;
244 unsigned char buf[3];
245
246 ret = regmap_read(rt722->regmap,
247 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49,
248 RT722_SDCA_CTL_DETECTED_MODE, 0), &det_mode);
249 if (ret < 0)
250 goto io_error;
251
252 /* pin attached */
253 if (det_mode) {
254 /* read UMP message offset */
255 ret = regmap_read(rt722->regmap,
256 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
257 RT722_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset);
258 if (ret < 0)
259 goto io_error;
260
261 for (idx = 0; idx < sizeof(buf); idx++) {
262 ret = regmap_read(rt722->regmap,
263 RT722_BUF_ADDR_HID1 + offset + idx, &val);
264 if (ret < 0)
265 goto io_error;
266 buf[idx] = val & 0xff;
267 }
268
269 if (buf[0] == 0x11)
270 btn_type = rt722_sdca_btn_type(&buf[1]);
271 } else
272 rt722->jack_type = 0;
273
274 dev_dbg(&rt722->slave->dev, "%s, btn_type=0x%x\n", __func__, btn_type);
275 snd_soc_jack_report(rt722->hs_jack, rt722->jack_type | btn_type,
276 SND_JACK_HEADSET |
277 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
278 SND_JACK_BTN_2 | SND_JACK_BTN_3);
279
280 if (btn_type) {
281 /* button released */
282 snd_soc_jack_report(rt722->hs_jack, rt722->jack_type,
283 SND_JACK_HEADSET |
284 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
285 SND_JACK_BTN_2 | SND_JACK_BTN_3);
286
287 mod_delayed_work(system_power_efficient_wq,
288 &rt722->jack_btn_check_work, msecs_to_jiffies(200));
289 }
290
291 return;
292
293 io_error:
294 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
295 }
296
rt722_sdca_jack_init(struct rt722_sdca_priv * rt722)297 static void rt722_sdca_jack_init(struct rt722_sdca_priv *rt722)
298 {
299 guard(mutex)(&rt722->calibrate_mutex);
300 if (rt722->hs_jack) {
301 /* set SCP_SDCA_IntMask1[0]=1 */
302 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1,
303 SDW_SCP_SDCA_INTMASK_SDCA_0);
304 /* set SCP_SDCA_IntMask2[0]=1 */
305 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2,
306 SDW_SCP_SDCA_INTMASK_SDCA_8);
307 dev_dbg(&rt722->slave->dev, "in %s enable\n", __func__);
308 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
309 RT722_HDA_LEGACY_UNSOL_CTL, 0x016E);
310 /* set XU(et03h) & XU(et0Dh) to Not bypassed */
311 regmap_write(rt722->regmap,
312 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU03,
313 RT722_SDCA_CTL_SELECTED_MODE, 0), 0);
314 regmap_write(rt722->regmap,
315 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU0D,
316 RT722_SDCA_CTL_SELECTED_MODE, 0), 0);
317 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_GE_RELATED_CTL1, 0x0000);
318 /* trigger GE interrupt */
319 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_HDA_CTL,
320 RT722_GE_RELATED_CTL2, 0x4000, 0x4000);
321 }
322 }
323
rt722_sdca_set_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * hs_jack,void * data)324 static int rt722_sdca_set_jack_detect(struct snd_soc_component *component,
325 struct snd_soc_jack *hs_jack, void *data)
326 {
327 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
328 int ret;
329
330 rt722->hs_jack = hs_jack;
331
332 ret = pm_runtime_resume_and_get(component->dev);
333 if (ret < 0) {
334 if (ret != -EACCES) {
335 dev_err(component->dev, "%s: failed to resume %d\n", __func__, ret);
336 return ret;
337 }
338 /* pm_runtime not enabled yet */
339 dev_dbg(component->dev, "%s: skipping jack init for now\n", __func__);
340 return 0;
341 }
342
343 rt722_sdca_jack_init(rt722);
344
345 pm_runtime_put_autosuspend(component->dev);
346
347 return 0;
348 }
349
rt722_cae_load(struct rt722_sdca_priv * rt722)350 static int rt722_cae_load(struct rt722_sdca_priv *rt722)
351 {
352 struct device *dev = &rt722->slave->dev;
353 static const char func_tag[] = "FUNC";
354 static const char xu_tag[] = "XU";
355 const char *dmi_vendor, *dmi_product, *dmi_sku;
356 unsigned int cae_st_spk, cae_st_hp, cae_st_mic;
357 unsigned int func, value;
358 unsigned int combined_val;
359 unsigned int addr, size;
360 unsigned int fw_offset;
361 unsigned char mbq_high_val = 0;
362 unsigned char *param_data;
363 unsigned char *fw_data;
364 char tag[5];
365 char *space;
366 int v_len, p_len, s_len;
367 int ret = 0, i;
368 int retry = 50;
369
370 dmi_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
371 dmi_product = dmi_get_system_info(DMI_PRODUCT_NAME);
372 dmi_sku = dmi_get_system_info(DMI_PRODUCT_SKU);
373
374 if (!dmi_vendor || !dmi_product || !dmi_sku) {
375 dev_warn(dev, "%s: Incomplete DMI info\n", __func__);
376 return -EINVAL;
377 }
378 space = strchr(dmi_vendor, ' ');
379 v_len = space ? space - dmi_vendor : strlen(dmi_vendor);
380
381 space = strchr(dmi_product, ' ');
382 p_len = space ? space - dmi_product : strlen(dmi_product);
383
384 space = strchr(dmi_sku, ' ');
385 s_len = space ? space - dmi_sku : strlen(dmi_sku);
386
387 char *cae_filename __free(kfree) =
388 kasprintf(GFP_KERNEL,
389 "realtek/rt722/rt722_RAE_%.*s_%.*s_%.*s.dat",
390 v_len, dmi_vendor,
391 p_len, dmi_product,
392 s_len, dmi_sku);
393 if (!cae_filename)
394 return -ENOMEM;
395 dev_dbg(dev, "%s: try to load CAE file %s\n", __func__, cae_filename);
396
397 regmap_write(rt722->regmap, RT722_SPK_CAE_PARAM1, 0x5f);
398 regmap_write(rt722->regmap, RT722_HP_CAE_PARAM39, 0x5f);
399 regmap_write(rt722->regmap, RT722_MIC_CAE_PARAM39, 0x5f);
400 usleep_range(50000, 60000);
401
402 const struct firmware *cae_fw __free(firmware) = NULL;
403 request_firmware(&cae_fw, cae_filename, dev);
404 if (!cae_fw) {
405 dev_err(dev, "%s: Failed to load CAE firmware\n", __func__);
406 return -ENOENT;
407 }
408
409 regmap_read(rt722->regmap, RT722_SPK_CAE_PARAM38, &cae_st_spk);
410 regmap_read(rt722->regmap, RT722_HP_CAE_PARAM68, &cae_st_hp);
411 regmap_read(rt722->regmap, RT722_MIC_CAE_PARAM99, &cae_st_mic);
412 cae_st_spk &= 0x80;
413 cae_st_hp &= 0x80;
414 cae_st_mic &= 0x80;
415
416 dev_dbg(dev, "%s(%d) spk_crc:%x, hp_crc:%x, mic_crc:%x\n",
417 __func__, __LINE__, cae_st_spk, cae_st_hp, cae_st_mic);
418
419 if (cae_st_spk)
420 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_EQ_CAE,
421 RT722_EQ_CTRL_SPK, 0x0008, 0x0008);
422 else if (cae_st_hp)
423 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_EQ_CAE,
424 RT722_EQ_CTRL_HP, 0x0008, 0x0008);
425 else if (cae_st_mic)
426 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_EQ_CAE,
427 RT722_EQ_CTRL_DMIC, 0x0008, 0x0008);
428
429 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
430 RT722_MISC_CTRL1, 0x8000, 0x8000);
431
432 regmap_update_bits(rt722->regmap, RT722_SPK_CAE_PARAM34, 0x1, 0x0);
433 regmap_update_bits(rt722->regmap, RT722_HP_CAE_PARAM64, 0x1, 0x0);
434 regmap_update_bits(rt722->regmap, RT722_MIC_CAE_PARAM95, 0x1, 0x0);
435
436 while (--retry) {
437 regmap_read(rt722->regmap, RT722_SPK_CAE_PARAM35, &cae_st_spk);
438 regmap_read(rt722->regmap, RT722_HP_CAE_PARAM65, &cae_st_hp);
439 regmap_read(rt722->regmap, RT722_MIC_CAE_PARAM96, &cae_st_mic);
440 dev_dbg(dev, "%s(%d) cae_st_spk:%x, cae_st_hp:%x, cae_st_mic:%x\n",
441 __func__, __LINE__, cae_st_spk, cae_st_hp, cae_st_mic);
442 if ((cae_st_spk & 0x40) && (cae_st_hp & 0x40) && (cae_st_mic & 0x40))
443 break;
444 usleep_range(1000, 1100);
445 }
446
447 if (!retry && !((cae_st_spk & 0x40) && (cae_st_hp & 0x40)
448 && (cae_st_mic & 0x40))) {
449 dev_err(dev, "%s: CAE is not ready to be loaded.\n", __func__);
450 ret = -ETIMEDOUT;
451 goto out_release;
452 }
453
454 dev_dbg(dev, "%s, cae_fw size=0x%zx, start\n", __func__, cae_fw->size);
455
456 rt722_sdca_index_write(rt722, RT722_VENDOR_EQ_CAE,
457 RT722_EQ_CTRL_AMIC, 0x8000);
458 rt722_sdca_index_write(rt722, RT722_VENDOR_EQ_CAE,
459 RT722_EQ_CTRL_DMIC, 0x8004);
460 rt722_sdca_index_write(rt722, RT722_VENDOR_EQ_CAE,
461 RT722_EQ_CTRL_HP, 0x8074);
462 rt722_sdca_index_write(rt722, RT722_VENDOR_EQ_CAE,
463 RT722_EQ_CTRL_SPK, 0xa074);
464
465 regcache_cache_bypass(rt722->regmap, true);
466 for (fw_offset = 0; fw_offset < cae_fw->size;) {
467
468 if (fw_offset + 12 > cae_fw->size) {
469 dev_err(dev, "%s: Unexpected end of firmware\n", __func__);
470 ret = -EINVAL;
471 goto verify_abort;
472 }
473
474 fw_data = (unsigned char *)&cae_fw->data[fw_offset];
475 memcpy(tag, fw_data, 4);
476 tag[4] = '\0';
477
478 if (strcmp(tag, xu_tag) == 0) {
479 dev_dbg(dev, "%s: This is a XU tag", __func__);
480 memcpy(&addr, (fw_data + 4), 4);
481 memcpy(&size, (fw_data + 8), 4);
482
483 if (size == 0 || size > cae_fw->size - fw_offset - 12) {
484 dev_err(dev, "%s: Invalid payload size: %u\n", __func__, size);
485 ret = -EINVAL;
486 goto verify_abort;
487 }
488
489 param_data = (unsigned char *)(fw_data + 12);
490
491 dev_dbg(dev, "%s: addr=0x%x, size=0x%x\n", __func__, addr, size);
492
493 if ((addr <= 0x05302300 && addr >= 0x05300000) ||
494 (addr <= 0x020020b4 && addr >= 0x020000b1)) {
495 if (addr & BIT(13)) {
496 mbq_high_val = param_data[0];
497 dev_dbg(dev, "MBQ: High Byte 0x%02x\n", mbq_high_val);
498 fw_offset += (size + 12);
499
500 continue;
501 } else {
502 regcache_cache_bypass(rt722->regmap, false);
503 combined_val = (mbq_high_val << 8) | param_data[0];
504 if (addr == 0x20000b1 || addr == 0x20000b4)
505 combined_val |= (0x2 << 8);
506 ret = regmap_write(rt722->regmap, addr, combined_val);
507 if (ret) {
508 dev_err(dev,
509 "MBQ fail: addr=0x%x ret=%d\n", addr, ret);
510 regcache_cache_bypass(rt722->regmap, true);
511 goto verify_abort;
512 }
513
514 dev_dbg(dev, "MBQ-reg=0x%x, value=0x%x\n",
515 addr, combined_val);
516
517 fw_offset += (size + 12);
518 regcache_cache_bypass(rt722->regmap, true);
519 continue;
520 }
521 }
522
523 for (i = 0; i < size; i++) {
524 ret = regmap_write(rt722->regmap, addr + i, param_data[i]);
525 if (ret) {
526 dev_err(dev,
527 "CAE write fail: addr=0x%x ret=%d\n",
528 addr + i, ret);
529 goto verify_abort;
530 }
531 }
532 fw_offset += (size + 12);
533 } else if (strcmp(tag, func_tag) == 0) {
534 dev_dbg(dev, "%s: This is a FUNC tag", __func__);
535
536 memcpy(&func, (fw_data + 4), 4);
537 memcpy(&value, (fw_data + 8), 4);
538 dev_dbg(dev, "%s: func=0x%x, value=0x%x\n",
539 __func__, func, value);
540
541 if (func == 1)
542 msleep(value);
543
544 fw_offset += 12;
545 } else {
546 dev_err(dev, "%s: No XU/FUNC tag at fw_offset=0x%x\n",
547 __func__, fw_offset);
548 ret = -EINVAL;
549 goto verify_abort;
550 }
551 }
552
553 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
554 RT722_MISC_CTRL1, 0x8000, 0x0000);
555 regcache_cache_bypass(rt722->regmap, false);
556 rt722->cae_update_done = 1;
557 dev_dbg(dev, "%s: CAE FW update done.\n", __func__);
558 return 0;
559
560 verify_abort:
561 regcache_cache_bypass(rt722->regmap, false);
562 if (!ret)
563 ret = -EIO;
564 out_release:
565 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
566 RT722_MISC_CTRL1, 0x8000, 0x0000);
567 dev_err(dev, "%s: CAE FW update aborted (ret=%d).\n", __func__, ret);
568 return ret;
569 }
570
rt722_cae_update_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)571 static int rt722_cae_update_put(struct snd_kcontrol *kcontrol,
572 struct snd_ctl_elem_value *ucontrol)
573 {
574 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
575 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
576 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component);
577 int ret, changed = 0;
578
579 if (!rt722->hw_init)
580 return 0;
581
582 ret = pm_runtime_resume_and_get(component->dev);
583 if (ret < 0 && ret != -EACCES)
584 return ret;
585
586 if (ucontrol->value.integer.value[0]) {
587 if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_OFF) {
588 ret = rt722_cae_load(rt722);
589 if (ret) {
590 dev_err(component->dev, "CAE load failed: %d\n", ret);
591 goto out;
592 } else
593 changed = 1;
594 }
595 } else {
596 if (rt722->cae_update_done) {
597 rt722->cae_update_done = 0;
598 changed = 1;
599 }
600 }
601
602 out:
603 pm_runtime_mark_last_busy(component->dev);
604 pm_runtime_put_autosuspend(component->dev);
605
606 return ret < 0 ? ret : changed;
607 }
608
rt722_cae_update_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)609 static int rt722_cae_update_get(struct snd_kcontrol *kcontrol,
610 struct snd_ctl_elem_value *ucontrol)
611 {
612 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
613 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
614
615 ucontrol->value.integer.value[0] = rt722->cae_update_done;
616
617 return 0;
618 }
619
620
621 /* For SDCA control DAC/ADC Gain */
rt722_sdca_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)622 static int rt722_sdca_set_gain_put(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624 {
625 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
626 struct soc_mixer_control *mc =
627 (struct soc_mixer_control *)kcontrol->private_value;
628 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
629 unsigned int read_l, read_r, gain_l_val, gain_r_val;
630 unsigned int adc_vol_flag = 0, changed = 0;
631 unsigned int lvalue, rvalue;
632 const unsigned int interval_offset = 0xc0;
633 const unsigned int tendB = 0xa00;
634
635 if (strstr(ucontrol->id.name, "FU1E Capture Volume") ||
636 strstr(ucontrol->id.name, "FU0F Capture Volume"))
637 adc_vol_flag = 1;
638
639 regmap_read(rt722->regmap, mc->reg, &lvalue);
640 regmap_read(rt722->regmap, mc->rreg, &rvalue);
641
642 /* L Channel */
643 gain_l_val = ucontrol->value.integer.value[0];
644 if (gain_l_val > mc->max)
645 gain_l_val = mc->max;
646
647 if (mc->shift == 8) /* boost gain */
648 gain_l_val = gain_l_val * tendB;
649 else {
650 /* ADC/DAC gain */
651 if (adc_vol_flag)
652 gain_l_val = 0x1e00 - ((mc->max - gain_l_val) * interval_offset);
653 else
654 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset);
655 gain_l_val &= 0xffff;
656 }
657
658 /* R Channel */
659 gain_r_val = ucontrol->value.integer.value[1];
660 if (gain_r_val > mc->max)
661 gain_r_val = mc->max;
662
663 if (mc->shift == 8) /* boost gain */
664 gain_r_val = gain_r_val * tendB;
665 else {
666 /* ADC/DAC gain */
667 if (adc_vol_flag)
668 gain_r_val = 0x1e00 - ((mc->max - gain_r_val) * interval_offset);
669 else
670 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset);
671 gain_r_val &= 0xffff;
672 }
673
674 if (lvalue != gain_l_val || rvalue != gain_r_val)
675 changed = 1;
676 else
677 return 0;
678
679 /* Lch*/
680 regmap_write(rt722->regmap, mc->reg, gain_l_val);
681
682 /* Rch */
683 regmap_write(rt722->regmap, mc->rreg, gain_r_val);
684
685 regmap_read(rt722->regmap, mc->reg, &read_l);
686 regmap_read(rt722->regmap, mc->rreg, &read_r);
687 if (read_r == gain_r_val && read_l == gain_l_val)
688 return changed;
689
690 return -EIO;
691 }
692
rt722_sdca_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)693 static int rt722_sdca_set_gain_get(struct snd_kcontrol *kcontrol,
694 struct snd_ctl_elem_value *ucontrol)
695 {
696 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
697 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
698 struct soc_mixer_control *mc =
699 (struct soc_mixer_control *)kcontrol->private_value;
700 unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0;
701 unsigned int adc_vol_flag = 0;
702 const unsigned int interval_offset = 0xc0;
703 const unsigned int tendB = 0xa00;
704
705 if (strstr(ucontrol->id.name, "FU1E Capture Volume") ||
706 strstr(ucontrol->id.name, "FU0F Capture Volume"))
707 adc_vol_flag = 1;
708
709 regmap_read(rt722->regmap, mc->reg, &read_l);
710 regmap_read(rt722->regmap, mc->rreg, &read_r);
711
712 if (mc->shift == 8) /* boost gain */
713 ctl_l = read_l / tendB;
714 else {
715 if (adc_vol_flag)
716 ctl_l = mc->max - (((0x1e00 - read_l) & 0xffff) / interval_offset);
717 else
718 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset);
719 }
720
721 if (read_l != read_r) {
722 if (mc->shift == 8) /* boost gain */
723 ctl_r = read_r / tendB;
724 else { /* ADC/DAC gain */
725 if (adc_vol_flag)
726 ctl_r = mc->max - (((0x1e00 - read_r) & 0xffff) / interval_offset);
727 else
728 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset);
729 }
730 } else {
731 ctl_r = ctl_l;
732 }
733
734 ucontrol->value.integer.value[0] = ctl_l;
735 ucontrol->value.integer.value[1] = ctl_r;
736
737 return 0;
738 }
739
rt722_sdca_set_fu1e_capture_ctl(struct rt722_sdca_priv * rt722)740 static int rt722_sdca_set_fu1e_capture_ctl(struct rt722_sdca_priv *rt722)
741 {
742 int err, i;
743 unsigned int ch_mute;
744
745 for (i = 0; i < ARRAY_SIZE(rt722->fu1e_mixer_mute); i++) {
746 ch_mute = rt722->fu1e_dapm_mute || rt722->fu1e_mixer_mute[i];
747 err = regmap_write(rt722->regmap,
748 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
749 RT722_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
750 if (err < 0)
751 return err;
752 }
753
754 return 0;
755 }
756
rt722_sdca_fu1e_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)757 static int rt722_sdca_fu1e_capture_get(struct snd_kcontrol *kcontrol,
758 struct snd_ctl_elem_value *ucontrol)
759 {
760 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
761 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
762 struct rt722_sdca_dmic_kctrl_priv *p =
763 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
764 unsigned int i;
765
766 for (i = 0; i < p->count; i++)
767 ucontrol->value.integer.value[i] = !rt722->fu1e_mixer_mute[i];
768
769 return 0;
770 }
771
rt722_sdca_fu1e_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)772 static int rt722_sdca_fu1e_capture_put(struct snd_kcontrol *kcontrol,
773 struct snd_ctl_elem_value *ucontrol)
774 {
775 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
776 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
777 struct rt722_sdca_dmic_kctrl_priv *p =
778 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
779 int err, changed = 0, i;
780
781 for (i = 0; i < p->count; i++) {
782 if (rt722->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
783 changed = 1;
784 rt722->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
785 }
786
787 err = rt722_sdca_set_fu1e_capture_ctl(rt722);
788 if (err < 0)
789 return err;
790
791 return changed;
792 }
793
rt722_sdca_set_fu06_playback_ctl(struct rt722_sdca_priv * rt722)794 static int rt722_sdca_set_fu06_playback_ctl(struct rt722_sdca_priv *rt722)
795 {
796 int err;
797 unsigned int ch_l, ch_r;
798
799 ch_l = (rt722->fu06_dapm_mute || rt722->fu06_mixer_l_mute) ? 0x01 : 0x00;
800 ch_r = (rt722->fu06_dapm_mute || rt722->fu06_mixer_r_mute) ? 0x01 : 0x00;
801
802 err = regmap_write(rt722->regmap,
803 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
804 RT722_SDCA_CTL_FU_MUTE, CH_L), ch_l);
805 if (err < 0)
806 return err;
807
808 err = regmap_write(rt722->regmap,
809 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
810 RT722_SDCA_CTL_FU_MUTE, CH_R), ch_r);
811 if (err < 0)
812 return err;
813
814 return 0;
815 }
816
rt722_sdca_fu06_playback_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)817 static int rt722_sdca_fu06_playback_get(struct snd_kcontrol *kcontrol,
818 struct snd_ctl_elem_value *ucontrol)
819 {
820 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
821 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
822
823 ucontrol->value.integer.value[0] = !rt722->fu06_mixer_l_mute;
824 ucontrol->value.integer.value[1] = !rt722->fu06_mixer_r_mute;
825 return 0;
826 }
827
rt722_sdca_fu06_playback_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)828 static int rt722_sdca_fu06_playback_put(struct snd_kcontrol *kcontrol,
829 struct snd_ctl_elem_value *ucontrol)
830 {
831 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
832 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
833 int err, changed = 0;
834
835 if (rt722->fu06_mixer_l_mute != !ucontrol->value.integer.value[0] ||
836 rt722->fu06_mixer_r_mute != !ucontrol->value.integer.value[1])
837 changed = 1;
838
839 rt722->fu06_mixer_l_mute = !ucontrol->value.integer.value[0];
840 rt722->fu06_mixer_r_mute = !ucontrol->value.integer.value[1];
841
842 err = rt722_sdca_set_fu06_playback_ctl(rt722);
843 if (err < 0)
844 return err;
845
846 return changed;
847 }
848
rt722_sdca_set_fu0f_capture_ctl(struct rt722_sdca_priv * rt722)849 static int rt722_sdca_set_fu0f_capture_ctl(struct rt722_sdca_priv *rt722)
850 {
851 int err;
852 unsigned int ch_l, ch_r;
853
854 ch_l = (rt722->fu0f_dapm_mute || rt722->fu0f_mixer_l_mute) ? 0x01 : 0x00;
855 ch_r = (rt722->fu0f_dapm_mute || rt722->fu0f_mixer_r_mute) ? 0x01 : 0x00;
856
857 err = regmap_write(rt722->regmap,
858 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
859 RT722_SDCA_CTL_FU_MUTE, CH_L), ch_l);
860 if (err < 0)
861 return err;
862
863 err = regmap_write(rt722->regmap,
864 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
865 RT722_SDCA_CTL_FU_MUTE, CH_R), ch_r);
866 if (err < 0)
867 return err;
868
869 return 0;
870 }
871
rt722_sdca_fu0f_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)872 static int rt722_sdca_fu0f_capture_get(struct snd_kcontrol *kcontrol,
873 struct snd_ctl_elem_value *ucontrol)
874 {
875 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
876 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
877
878 ucontrol->value.integer.value[0] = !rt722->fu0f_mixer_l_mute;
879 ucontrol->value.integer.value[1] = !rt722->fu0f_mixer_r_mute;
880 return 0;
881 }
882
rt722_sdca_fu0f_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)883 static int rt722_sdca_fu0f_capture_put(struct snd_kcontrol *kcontrol,
884 struct snd_ctl_elem_value *ucontrol)
885 {
886 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
887 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
888 int err, changed = 0;
889
890 if (rt722->fu0f_mixer_l_mute != !ucontrol->value.integer.value[0] ||
891 rt722->fu0f_mixer_r_mute != !ucontrol->value.integer.value[1])
892 changed = 1;
893
894 rt722->fu0f_mixer_l_mute = !ucontrol->value.integer.value[0];
895 rt722->fu0f_mixer_r_mute = !ucontrol->value.integer.value[1];
896 err = rt722_sdca_set_fu0f_capture_ctl(rt722);
897 if (err < 0)
898 return err;
899
900 return changed;
901 }
902
rt722_sdca_fu_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)903 static int rt722_sdca_fu_info(struct snd_kcontrol *kcontrol,
904 struct snd_ctl_elem_info *uinfo)
905 {
906 struct rt722_sdca_dmic_kctrl_priv *p =
907 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
908
909 if (p->max == 1)
910 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
911 else
912 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
913 uinfo->count = p->count;
914 uinfo->value.integer.min = 0;
915 uinfo->value.integer.max = p->max;
916 return 0;
917 }
918
rt722_sdca_dmic_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)919 static int rt722_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
920 struct snd_ctl_elem_value *ucontrol)
921 {
922 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
923 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
924 struct rt722_sdca_dmic_kctrl_priv *p =
925 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
926 unsigned int boost_step = 0x0a00;
927 unsigned int vol_max = 0x1e00;
928 unsigned int regvalue, ctl, i;
929 unsigned int adc_vol_flag = 0;
930 const unsigned int interval_offset = 0xc0;
931
932 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
933 adc_vol_flag = 1;
934
935 /* check all channels */
936 for (i = 0; i < p->count; i++) {
937 regmap_read(rt722->regmap, p->reg_base + i, ®value);
938
939 if (!adc_vol_flag) /* boost gain */
940 ctl = regvalue / boost_step;
941 else /* ADC gain */
942 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset);
943
944 ucontrol->value.integer.value[i] = ctl;
945 }
946
947 return 0;
948 }
949
rt722_sdca_dmic_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)950 static int rt722_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
951 struct snd_ctl_elem_value *ucontrol)
952 {
953 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
954 struct rt722_sdca_dmic_kctrl_priv *p =
955 (struct rt722_sdca_dmic_kctrl_priv *)kcontrol->private_value;
956 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
957 unsigned int boost_step = 0x0a00;
958 unsigned int vol_max = 0x1e00;
959 unsigned int gain_val[4];
960 unsigned int i, adc_vol_flag = 0, changed = 0;
961 unsigned int regvalue[4];
962 const unsigned int interval_offset = 0xc0;
963 int err;
964
965 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
966 adc_vol_flag = 1;
967
968 /* check all channels */
969 for (i = 0; i < p->count; i++) {
970 regmap_read(rt722->regmap, p->reg_base + i, ®value[i]);
971
972 gain_val[i] = ucontrol->value.integer.value[i];
973 if (gain_val[i] > p->max)
974 gain_val[i] = p->max;
975
976 if (!adc_vol_flag) /* boost gain */
977 gain_val[i] = gain_val[i] * boost_step;
978 else { /* ADC gain */
979 gain_val[i] = vol_max - ((p->max - gain_val[i]) * interval_offset);
980 gain_val[i] &= 0xffff;
981 }
982
983 if (regvalue[i] != gain_val[i])
984 changed = 1;
985 }
986
987 if (!changed)
988 return 0;
989
990 for (i = 0; i < p->count; i++) {
991 err = regmap_write(rt722->regmap, p->reg_base + i, gain_val[i]);
992 if (err < 0)
993 dev_err(&rt722->slave->dev, "%s: %#08x can't be set\n",
994 __func__, p->reg_base + i);
995 }
996
997 return changed;
998 }
999
1000 #define RT722_SDCA_PR_VALUE(xreg_base, xcount, xmax, xinvert) \
1001 ((unsigned long)&(struct rt722_sdca_dmic_kctrl_priv) \
1002 {.reg_base = xreg_base, .count = xcount, .max = xmax, \
1003 .invert = xinvert})
1004
1005 #define RT722_SDCA_FU_CTRL(xname, reg_base, xmax, xinvert, xcount) \
1006 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
1007 .info = rt722_sdca_fu_info, \
1008 .get = rt722_sdca_fu1e_capture_get, \
1009 .put = rt722_sdca_fu1e_capture_put, \
1010 .private_value = RT722_SDCA_PR_VALUE(reg_base, xcount, xmax, xinvert)}
1011
1012 #define RT722_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
1013 xhandler_put, xcount, xmax, tlv_array) \
1014 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
1015 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
1016 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
1017 .tlv.p = (tlv_array), \
1018 .info = rt722_sdca_fu_info, \
1019 .get = xhandler_get, .put = xhandler_put, \
1020 .private_value = RT722_SDCA_PR_VALUE(reg_base, xcount, xmax, 0) }
1021
1022 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0);
1023 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -1725, 75, 0);
1024 static const DECLARE_TLV_DB_SCALE(boost_vol_tlv, 0, 1000, 0);
1025
1026 static const struct snd_kcontrol_new rt722_sdca_controls[] = {
1027 /* Headphone playback settings */
1028 SOC_DOUBLE_R_EXT_TLV("FU05 Playback Volume",
1029 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
1030 RT722_SDCA_CTL_FU_VOLUME, CH_L),
1031 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
1032 RT722_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0,
1033 rt722_sdca_set_gain_get, rt722_sdca_set_gain_put, out_vol_tlv),
1034 /* Headset mic capture settings */
1035 SOC_DOUBLE_EXT("FU0F Capture Switch", SND_SOC_NOPM, 0, 1, 1, 0,
1036 rt722_sdca_fu0f_capture_get, rt722_sdca_fu0f_capture_put),
1037 SOC_DOUBLE_R_EXT_TLV("FU0F Capture Volume",
1038 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
1039 RT722_SDCA_CTL_FU_VOLUME, CH_L),
1040 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
1041 RT722_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x3f, 0,
1042 rt722_sdca_set_gain_get, rt722_sdca_set_gain_put, mic_vol_tlv),
1043 SOC_DOUBLE_R_EXT_TLV("FU33 Boost Volume",
1044 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
1045 RT722_SDCA_CTL_FU_CH_GAIN, CH_L),
1046 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
1047 RT722_SDCA_CTL_FU_CH_GAIN, CH_R), 8, 3, 0,
1048 rt722_sdca_set_gain_get, rt722_sdca_set_gain_put, boost_vol_tlv),
1049 /* AMP playback settings */
1050 SOC_DOUBLE_EXT("FU06 Playback Switch", SND_SOC_NOPM, 0, 1, 1, 0,
1051 rt722_sdca_fu06_playback_get, rt722_sdca_fu06_playback_put),
1052 SOC_DOUBLE_R_EXT_TLV("FU06 Playback Volume",
1053 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
1054 RT722_SDCA_CTL_FU_VOLUME, CH_L),
1055 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
1056 RT722_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0,
1057 rt722_sdca_set_gain_get, rt722_sdca_set_gain_put, out_vol_tlv),
1058 /* DMIC capture settings */
1059 RT722_SDCA_FU_CTRL("FU1E Capture Switch",
1060 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
1061 RT722_SDCA_CTL_FU_MUTE, CH_01), 1, 1, 4),
1062 RT722_SDCA_EXT_TLV("FU1E Capture Volume",
1063 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
1064 RT722_SDCA_CTL_FU_VOLUME, CH_01),
1065 rt722_sdca_dmic_set_gain_get, rt722_sdca_dmic_set_gain_put,
1066 4, 0x3f, mic_vol_tlv),
1067 RT722_SDCA_EXT_TLV("FU15 Boost Volume",
1068 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15,
1069 RT722_SDCA_CTL_FU_CH_GAIN, CH_01),
1070 rt722_sdca_dmic_set_gain_get, rt722_sdca_dmic_set_gain_put,
1071 4, 3, boost_vol_tlv),
1072 /* CAE firmware update */
1073 SOC_SINGLE_EXT("CAE Update", SND_SOC_NOPM, 0, 1, 0,
1074 rt722_cae_update_get, rt722_cae_update_put),
1075 };
1076
1077 static const char * const adc22_mux_text[] = {
1078 "MIC2",
1079 "LINE1",
1080 "LINE2",
1081 };
1082
1083 static const char * const adc07_10_mux_text[] = {
1084 "DMIC1",
1085 "DMIC2",
1086 };
1087
1088 static SOC_ENUM_SINGLE_DECL(rt722_adc22_enum,
1089 RT722_NID_ADDR(RT722_VENDOR_HDA_CTL, RT722_HDA_LEGACY_MUX_CTL0),
1090 12, adc22_mux_text);
1091
1092 static SOC_ENUM_SINGLE_DECL(rt722_adc24_enum,
1093 RT722_NID_ADDR(RT722_VENDOR_HDA_CTL, RT722_HDA_LEGACY_MUX_CTL0),
1094 4, adc07_10_mux_text);
1095
1096 static SOC_ENUM_SINGLE_DECL(rt722_adc25_enum,
1097 RT722_NID_ADDR(RT722_VENDOR_HDA_CTL, RT722_HDA_LEGACY_MUX_CTL0),
1098 0, adc07_10_mux_text);
1099
1100 static const struct snd_kcontrol_new rt722_sdca_adc22_mux =
1101 SOC_DAPM_ENUM("ADC 22 Mux", rt722_adc22_enum);
1102
1103 static const struct snd_kcontrol_new rt722_sdca_adc24_mux =
1104 SOC_DAPM_ENUM("ADC 24 Mux", rt722_adc24_enum);
1105
1106 static const struct snd_kcontrol_new rt722_sdca_adc25_mux =
1107 SOC_DAPM_ENUM("ADC 25 Mux", rt722_adc25_enum);
1108
rt722_sdca_fu42_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1109 static int rt722_sdca_fu42_event(struct snd_soc_dapm_widget *w,
1110 struct snd_kcontrol *kcontrol, int event)
1111 {
1112 struct snd_soc_component *component =
1113 snd_soc_dapm_to_component(w->dapm);
1114 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1115 unsigned char unmute = 0x0, mute = 0x1;
1116
1117 switch (event) {
1118 case SND_SOC_DAPM_POST_PMU:
1119 regmap_write(rt722->regmap,
1120 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
1121 RT722_SDCA_CTL_FU_MUTE, CH_L), unmute);
1122 regmap_write(rt722->regmap,
1123 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
1124 RT722_SDCA_CTL_FU_MUTE, CH_R), unmute);
1125 break;
1126 case SND_SOC_DAPM_PRE_PMD:
1127 regmap_write(rt722->regmap,
1128 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
1129 RT722_SDCA_CTL_FU_MUTE, CH_L), mute);
1130 regmap_write(rt722->regmap,
1131 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
1132 RT722_SDCA_CTL_FU_MUTE, CH_R), mute);
1133 break;
1134 }
1135 return 0;
1136 }
1137
rt722_sdca_fu21_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1138 static int rt722_sdca_fu21_event(struct snd_soc_dapm_widget *w,
1139 struct snd_kcontrol *kcontrol, int event)
1140 {
1141 struct snd_soc_component *component =
1142 snd_soc_dapm_to_component(w->dapm);
1143 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1144
1145 switch (event) {
1146 case SND_SOC_DAPM_POST_PMU:
1147 rt722->fu06_dapm_mute = false;
1148 break;
1149 case SND_SOC_DAPM_PRE_PMD:
1150 rt722->fu06_dapm_mute = true;
1151 break;
1152 }
1153
1154 return rt722_sdca_set_fu06_playback_ctl(rt722);
1155 }
1156
rt722_sdca_fu113_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1157 static int rt722_sdca_fu113_event(struct snd_soc_dapm_widget *w,
1158 struct snd_kcontrol *kcontrol, int event)
1159 {
1160 struct snd_soc_component *component =
1161 snd_soc_dapm_to_component(w->dapm);
1162 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1163
1164 switch (event) {
1165 case SND_SOC_DAPM_POST_PMU:
1166 rt722->fu1e_dapm_mute = false;
1167 rt722_sdca_set_fu1e_capture_ctl(rt722);
1168 usleep_range(150000, 160000);
1169 break;
1170 case SND_SOC_DAPM_PRE_PMD:
1171 rt722->fu1e_dapm_mute = true;
1172 rt722_sdca_set_fu1e_capture_ctl(rt722);
1173 break;
1174 }
1175 return 0;
1176 }
1177
rt722_sdca_fu36_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1178 static int rt722_sdca_fu36_event(struct snd_soc_dapm_widget *w,
1179 struct snd_kcontrol *kcontrol, int event)
1180 {
1181 struct snd_soc_component *component =
1182 snd_soc_dapm_to_component(w->dapm);
1183 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1184
1185 switch (event) {
1186 case SND_SOC_DAPM_POST_PMU:
1187 rt722->fu0f_dapm_mute = false;
1188 rt722_sdca_set_fu0f_capture_ctl(rt722);
1189 break;
1190 case SND_SOC_DAPM_PRE_PMD:
1191 rt722->fu0f_dapm_mute = true;
1192 rt722_sdca_set_fu0f_capture_ctl(rt722);
1193 break;
1194 }
1195 return 0;
1196 }
1197
rt722_pde_transition_delay(struct rt722_sdca_priv * rt722,unsigned char func,unsigned char entity,unsigned char ps)1198 static void rt722_pde_transition_delay(struct rt722_sdca_priv *rt722, unsigned char func,
1199 unsigned char entity, unsigned char ps)
1200 {
1201 unsigned int delay = 1000, val;
1202
1203 pm_runtime_mark_last_busy(&rt722->slave->dev);
1204
1205 /* waiting for Actual PDE becomes to PS0/PS3 */
1206 while (delay) {
1207 regmap_read(rt722->regmap,
1208 SDW_SDCA_CTL(func, entity, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0), &val);
1209 if (val == ps)
1210 break;
1211
1212 usleep_range(1000, 1500);
1213 delay--;
1214 }
1215 if (!delay) {
1216 dev_warn(&rt722->slave->dev, "%s PDE to %s is NOT ready", __func__, ps?"PS3":"PS0");
1217 }
1218 }
1219
rt722_sdca_pde47_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1220 static int rt722_sdca_pde47_event(struct snd_soc_dapm_widget *w,
1221 struct snd_kcontrol *kcontrol, int event)
1222 {
1223 struct snd_soc_component *component =
1224 snd_soc_dapm_to_component(w->dapm);
1225 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1226 unsigned char ps0 = 0x0, ps3 = 0x3;
1227
1228 switch (event) {
1229 case SND_SOC_DAPM_POST_PMU:
1230 regmap_write(rt722->regmap,
1231 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40,
1232 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1233 rt722_pde_transition_delay(rt722, FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, ps0);
1234 break;
1235 case SND_SOC_DAPM_PRE_PMD:
1236 regmap_write(rt722->regmap,
1237 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40,
1238 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1239 rt722_pde_transition_delay(rt722, FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, ps3);
1240 break;
1241 }
1242 return 0;
1243 }
1244
rt722_sdca_pde23_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1245 static int rt722_sdca_pde23_event(struct snd_soc_dapm_widget *w,
1246 struct snd_kcontrol *kcontrol, int event)
1247 {
1248 struct snd_soc_component *component =
1249 snd_soc_dapm_to_component(w->dapm);
1250 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1251 unsigned char ps0 = 0x0, ps3 = 0x3;
1252
1253 switch (event) {
1254 case SND_SOC_DAPM_POST_PMU:
1255 regmap_write(rt722->regmap,
1256 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23,
1257 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1258 rt722_pde_transition_delay(rt722, FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, ps0);
1259 break;
1260 case SND_SOC_DAPM_PRE_PMD:
1261 regmap_write(rt722->regmap,
1262 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23,
1263 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1264 rt722_pde_transition_delay(rt722, FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, ps3);
1265 break;
1266 }
1267 return 0;
1268 }
1269
rt722_sdca_pde11_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1270 static int rt722_sdca_pde11_event(struct snd_soc_dapm_widget *w,
1271 struct snd_kcontrol *kcontrol, int event)
1272 {
1273 struct snd_soc_component *component =
1274 snd_soc_dapm_to_component(w->dapm);
1275 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1276 unsigned char ps0 = 0x0, ps3 = 0x3;
1277
1278 switch (event) {
1279 case SND_SOC_DAPM_POST_PMU:
1280 regmap_write(rt722->regmap,
1281 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A,
1282 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1283 rt722_pde_transition_delay(rt722, FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, ps0);
1284 break;
1285 case SND_SOC_DAPM_PRE_PMD:
1286 regmap_write(rt722->regmap,
1287 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A,
1288 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1289 rt722_pde_transition_delay(rt722, FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, ps3);
1290 break;
1291 }
1292 return 0;
1293 }
1294
rt722_sdca_pde12_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1295 static int rt722_sdca_pde12_event(struct snd_soc_dapm_widget *w,
1296 struct snd_kcontrol *kcontrol, int event)
1297 {
1298 struct snd_soc_component *component =
1299 snd_soc_dapm_to_component(w->dapm);
1300 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1301 unsigned char ps0 = 0x0, ps3 = 0x3;
1302
1303 switch (event) {
1304 case SND_SOC_DAPM_POST_PMU:
1305 regmap_write(rt722->regmap,
1306 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12,
1307 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1308 rt722_pde_transition_delay(rt722, FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, ps0);
1309 break;
1310 case SND_SOC_DAPM_PRE_PMD:
1311 regmap_write(rt722->regmap,
1312 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12,
1313 RT722_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1314 rt722_pde_transition_delay(rt722, FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, ps3);
1315 break;
1316 }
1317 return 0;
1318 }
1319
1320 static const struct snd_soc_dapm_widget rt722_sdca_dapm_widgets[] = {
1321 SND_SOC_DAPM_OUTPUT("HP"),
1322 SND_SOC_DAPM_OUTPUT("SPK"),
1323 SND_SOC_DAPM_INPUT("MIC2"),
1324 SND_SOC_DAPM_INPUT("LINE1"),
1325 SND_SOC_DAPM_INPUT("LINE2"),
1326 SND_SOC_DAPM_INPUT("DMIC1_2"),
1327 SND_SOC_DAPM_INPUT("DMIC3_4"),
1328
1329 SND_SOC_DAPM_SUPPLY("PDE 23", SND_SOC_NOPM, 0, 0,
1330 rt722_sdca_pde23_event,
1331 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1332 SND_SOC_DAPM_SUPPLY("PDE 47", SND_SOC_NOPM, 0, 0,
1333 rt722_sdca_pde47_event,
1334 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1335 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
1336 rt722_sdca_pde11_event,
1337 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1338 SND_SOC_DAPM_SUPPLY("PDE 12", SND_SOC_NOPM, 0, 0,
1339 rt722_sdca_pde12_event,
1340 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1341
1342 SND_SOC_DAPM_DAC_E("FU 21", NULL, SND_SOC_NOPM, 0, 0,
1343 rt722_sdca_fu21_event,
1344 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1345 SND_SOC_DAPM_DAC_E("FU 42", NULL, SND_SOC_NOPM, 0, 0,
1346 rt722_sdca_fu42_event,
1347 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1348 SND_SOC_DAPM_ADC_E("FU 36", NULL, SND_SOC_NOPM, 0, 0,
1349 rt722_sdca_fu36_event,
1350 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1351 SND_SOC_DAPM_ADC_E("FU 113", NULL, SND_SOC_NOPM, 0, 0,
1352 rt722_sdca_fu113_event,
1353 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1354 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
1355 &rt722_sdca_adc22_mux),
1356 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
1357 &rt722_sdca_adc24_mux),
1358 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
1359 &rt722_sdca_adc25_mux),
1360
1361 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Headphone Playback", 0, SND_SOC_NOPM, 0, 0),
1362 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Headset Capture", 0, SND_SOC_NOPM, 0, 0),
1363 SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Speaker Playback", 0, SND_SOC_NOPM, 0, 0),
1364 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 DMic Capture", 0, SND_SOC_NOPM, 0, 0),
1365 };
1366
1367 static const struct snd_soc_dapm_route rt722_sdca_audio_map[] = {
1368 {"FU 42", NULL, "DP1RX"},
1369 {"FU 21", NULL, "DP3RX"},
1370
1371 {"ADC 22 Mux", "MIC2", "MIC2"},
1372 {"ADC 22 Mux", "LINE1", "LINE1"},
1373 {"ADC 22 Mux", "LINE2", "LINE2"},
1374 {"ADC 24 Mux", "DMIC1", "DMIC1_2"},
1375 {"ADC 24 Mux", "DMIC2", "DMIC3_4"},
1376 {"ADC 25 Mux", "DMIC1", "DMIC1_2"},
1377 {"ADC 25 Mux", "DMIC2", "DMIC3_4"},
1378 {"FU 36", NULL, "PDE 12"},
1379 {"FU 36", NULL, "ADC 22 Mux"},
1380 {"FU 113", NULL, "PDE 11"},
1381 {"FU 113", NULL, "ADC 24 Mux"},
1382 {"FU 113", NULL, "ADC 25 Mux"},
1383 {"DP2TX", NULL, "FU 36"},
1384 {"DP6TX", NULL, "FU 113"},
1385
1386 {"HP", NULL, "PDE 47"},
1387 {"HP", NULL, "FU 42"},
1388 {"SPK", NULL, "PDE 23"},
1389 {"SPK", NULL, "FU 21"},
1390 };
1391
rt722_sdca_parse_dt(struct rt722_sdca_priv * rt722,struct device * dev)1392 static int rt722_sdca_parse_dt(struct rt722_sdca_priv *rt722, struct device *dev)
1393 {
1394 device_property_read_u32(dev, "realtek,jd-src", &rt722->jd_src);
1395
1396 return 0;
1397 }
1398
rt722_sdca_probe(struct snd_soc_component * component)1399 static int rt722_sdca_probe(struct snd_soc_component *component)
1400 {
1401 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1402 int ret;
1403
1404 rt722_sdca_parse_dt(rt722, &rt722->slave->dev);
1405 rt722->component = component;
1406
1407 ret = pm_runtime_resume(component->dev);
1408 if (ret < 0 && ret != -EACCES)
1409 return ret;
1410
1411 return 0;
1412 }
1413
1414 static const struct snd_soc_component_driver soc_sdca_dev_rt722 = {
1415 .probe = rt722_sdca_probe,
1416 .controls = rt722_sdca_controls,
1417 .num_controls = ARRAY_SIZE(rt722_sdca_controls),
1418 .dapm_widgets = rt722_sdca_dapm_widgets,
1419 .num_dapm_widgets = ARRAY_SIZE(rt722_sdca_dapm_widgets),
1420 .dapm_routes = rt722_sdca_audio_map,
1421 .num_dapm_routes = ARRAY_SIZE(rt722_sdca_audio_map),
1422 .set_jack = rt722_sdca_set_jack_detect,
1423 .endianness = 1,
1424 };
1425
rt722_sdca_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)1426 static int rt722_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
1427 int direction)
1428 {
1429 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
1430
1431 return 0;
1432 }
1433
rt722_sdca_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1434 static void rt722_sdca_shutdown(struct snd_pcm_substream *substream,
1435 struct snd_soc_dai *dai)
1436 {
1437 snd_soc_dai_set_dma_data(dai, substream, NULL);
1438 }
1439
rt722_sdca_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)1440 static int rt722_sdca_pcm_hw_params(struct snd_pcm_substream *substream,
1441 struct snd_pcm_hw_params *params,
1442 struct snd_soc_dai *dai)
1443 {
1444 struct snd_soc_component *component = dai->component;
1445 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1446 struct sdw_stream_config stream_config = {0};
1447 struct sdw_port_config port_config;
1448 struct sdw_stream_runtime *sdw_stream;
1449 int retval, port;
1450 unsigned int sampling_rate;
1451
1452 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
1453 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
1454
1455 if (!sdw_stream)
1456 return -EINVAL;
1457
1458 if (!rt722->slave)
1459 return -EINVAL;
1460
1461 /*
1462 * RT722_AIF1 with port = 1 for headphone playback
1463 * RT722_AIF1 with port = 2 for headset-mic capture
1464 * RT722_AIF2 with port = 3 for speaker playback
1465 * RT722_AIF3 with port = 6 for digital-mic capture
1466 */
1467 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1468 if (dai->id == RT722_AIF1)
1469 port = 1;
1470 else if (dai->id == RT722_AIF2)
1471 port = 3;
1472 else
1473 return -EINVAL;
1474 } else {
1475 if (dai->id == RT722_AIF1)
1476 port = 2;
1477 else if (dai->id == RT722_AIF3)
1478 port = 6;
1479 else
1480 return -EINVAL;
1481 }
1482
1483 /* SoundWire specific configuration */
1484 snd_sdw_params_to_config(substream, params, &stream_config, &port_config);
1485 port_config.num = port;
1486
1487 retval = sdw_stream_add_slave(rt722->slave, &stream_config,
1488 &port_config, 1, sdw_stream);
1489 if (retval) {
1490 dev_err(dai->dev, "%s: Unable to configure port\n", __func__);
1491 return retval;
1492 }
1493
1494 if (params_channels(params) > 16) {
1495 dev_err(component->dev, "%s: Unsupported channels %d\n",
1496 __func__, params_channels(params));
1497 return -EINVAL;
1498 }
1499
1500 /* sampling rate configuration */
1501 switch (params_rate(params)) {
1502 case 44100:
1503 sampling_rate = RT722_SDCA_RATE_44100HZ;
1504 break;
1505 case 48000:
1506 sampling_rate = RT722_SDCA_RATE_48000HZ;
1507 break;
1508 case 96000:
1509 sampling_rate = RT722_SDCA_RATE_96000HZ;
1510 break;
1511 case 192000:
1512 sampling_rate = RT722_SDCA_RATE_192000HZ;
1513 break;
1514 default:
1515 dev_err(component->dev, "%s: Rate %d is not supported\n",
1516 __func__, params_rate(params));
1517 return -EINVAL;
1518 }
1519
1520 /* set sampling frequency */
1521 if (dai->id == RT722_AIF1) {
1522 regmap_write(rt722->regmap,
1523 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01,
1524 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1525 regmap_write(rt722->regmap,
1526 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11,
1527 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1528 }
1529
1530 if (dai->id == RT722_AIF2)
1531 regmap_write(rt722->regmap,
1532 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31,
1533 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1534
1535 if (dai->id == RT722_AIF3)
1536 regmap_write(rt722->regmap,
1537 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F,
1538 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1539
1540 return 0;
1541 }
1542
rt722_sdca_pcm_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1543 static int rt722_sdca_pcm_hw_free(struct snd_pcm_substream *substream,
1544 struct snd_soc_dai *dai)
1545 {
1546 struct snd_soc_component *component = dai->component;
1547 struct rt722_sdca_priv *rt722 = snd_soc_component_get_drvdata(component);
1548 struct sdw_stream_runtime *sdw_stream =
1549 snd_soc_dai_get_dma_data(dai, substream);
1550
1551 if (!rt722->slave)
1552 return -EINVAL;
1553
1554 sdw_stream_remove_slave(rt722->slave, sdw_stream);
1555 return 0;
1556 }
1557
1558 #define RT722_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
1559 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
1560 #define RT722_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1561 SNDRV_PCM_FMTBIT_S24_LE)
1562
1563 static const struct snd_soc_dai_ops rt722_sdca_ops = {
1564 .hw_params = rt722_sdca_pcm_hw_params,
1565 .hw_free = rt722_sdca_pcm_hw_free,
1566 .set_stream = rt722_sdca_set_sdw_stream,
1567 .shutdown = rt722_sdca_shutdown,
1568 };
1569
1570 static struct snd_soc_dai_driver rt722_sdca_dai[] = {
1571 {
1572 .name = "rt722-sdca-aif1",
1573 .id = RT722_AIF1,
1574 .playback = {
1575 .stream_name = "DP1 Headphone Playback",
1576 .channels_min = 1,
1577 .channels_max = 2,
1578 .rates = RT722_STEREO_RATES,
1579 .formats = RT722_FORMATS,
1580 },
1581 .capture = {
1582 .stream_name = "DP2 Headset Capture",
1583 .channels_min = 1,
1584 .channels_max = 2,
1585 .rates = RT722_STEREO_RATES,
1586 .formats = RT722_FORMATS,
1587 },
1588 .ops = &rt722_sdca_ops,
1589 },
1590 {
1591 .name = "rt722-sdca-aif2",
1592 .id = RT722_AIF2,
1593 .playback = {
1594 .stream_name = "DP3 Speaker Playback",
1595 .channels_min = 1,
1596 .channels_max = 2,
1597 .rates = RT722_STEREO_RATES,
1598 .formats = RT722_FORMATS,
1599 },
1600 .ops = &rt722_sdca_ops,
1601 },
1602 {
1603 .name = "rt722-sdca-aif3",
1604 .id = RT722_AIF3,
1605 .capture = {
1606 .stream_name = "DP6 DMic Capture",
1607 .channels_min = 1,
1608 .channels_max = 4,
1609 .rates = RT722_STEREO_RATES,
1610 .formats = RT722_FORMATS,
1611 },
1612 .ops = &rt722_sdca_ops,
1613 }
1614 };
1615
rt722_sdca_init(struct device * dev,struct regmap * regmap,struct sdw_slave * slave)1616 int rt722_sdca_init(struct device *dev, struct regmap *regmap, struct sdw_slave *slave)
1617 {
1618 struct rt722_sdca_priv *rt722;
1619
1620 rt722 = devm_kzalloc(dev, sizeof(*rt722), GFP_KERNEL);
1621 if (!rt722)
1622 return -ENOMEM;
1623
1624 dev_set_drvdata(dev, rt722);
1625 rt722->slave = slave;
1626 rt722->regmap = regmap;
1627
1628 regcache_cache_only(rt722->regmap, true);
1629
1630 mutex_init(&rt722->calibrate_mutex);
1631 mutex_init(&rt722->disable_irq_lock);
1632
1633 INIT_DELAYED_WORK(&rt722->jack_detect_work, rt722_sdca_jack_detect_handler);
1634 INIT_DELAYED_WORK(&rt722->jack_btn_check_work, rt722_sdca_btn_check_handler);
1635
1636 /*
1637 * Mark hw_init to false
1638 * HW init will be performed when device reports present
1639 */
1640 rt722->hw_init = false;
1641 rt722->first_hw_init = false;
1642 rt722->fu1e_dapm_mute = true;
1643 rt722->fu0f_dapm_mute = true;
1644 rt722->fu06_dapm_mute = true;
1645 rt722->fu06_mixer_l_mute = rt722->fu06_mixer_r_mute = false;
1646 rt722->fu0f_mixer_l_mute = rt722->fu0f_mixer_r_mute = true;
1647 rt722->fu1e_mixer_mute[0] = rt722->fu1e_mixer_mute[1] =
1648 rt722->fu1e_mixer_mute[2] = rt722->fu1e_mixer_mute[3] = true;
1649 rt722->cae_update_done = 0;
1650
1651 return devm_snd_soc_register_component(dev,
1652 &soc_sdca_dev_rt722, rt722_sdca_dai, ARRAY_SIZE(rt722_sdca_dai));
1653 }
1654
rt722_sdca_dmic_preset(struct rt722_sdca_priv * rt722)1655 static void rt722_sdca_dmic_preset(struct rt722_sdca_priv *rt722)
1656 {
1657 unsigned int mic_func_status;
1658 struct device *dev = &rt722->slave->dev;
1659
1660 regmap_read(rt722->regmap,
1661 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0), &mic_func_status);
1662 dev_dbg(dev, "%s mic func_status=0x%x\n", __func__, mic_func_status);
1663
1664 if ((mic_func_status & FUNCTION_NEEDS_INITIALIZATION) || (!rt722->first_hw_init)) {
1665 /* Set AD07 power entity floating control */
1666 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1667 RT722_ADC0A_08_PDE_FLOAT_CTL, 0x2a29);
1668 /* Set AD10 power entity floating control */
1669 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1670 RT722_ADC10_PDE_FLOAT_CTL, 0x2a00);
1671 /* Set DMIC1/DMIC2 power entity floating control */
1672 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1673 RT722_DMIC1_2_PDE_FLOAT_CTL, 0x2a2a);
1674 /* Set DMIC2 IT entity floating control */
1675 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1676 RT722_DMIC_ENT_FLOAT_CTL, 0x2626);
1677 /* Set AD10 FU entity floating control */
1678 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1679 RT722_ADC_ENT_FLOAT_CTL, 0x1e00);
1680 /* Set DMIC2 FU entity floating control */
1681 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1682 RT722_DMIC_GAIN_ENT_FLOAT_CTL0, 0x1515);
1683 /* Set AD10 FU channel floating control */
1684 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1685 RT722_ADC_VOL_CH_FLOAT_CTL, 0x0304);
1686 /* Set DMIC2 FU channel floating control */
1687 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1688 RT722_DMIC_GAIN_ENT_FLOAT_CTL2, 0x0304);
1689 /* vf71f_r12_07_06 and vf71f_r13_07_06 = 2’b00 */
1690 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL,
1691 RT722_HDA_LEGACY_CONFIG_CTL0, 0x0000);
1692 /* Enable vf707_r12_05/vf707_r13_05 */
1693 regmap_write(rt722->regmap,
1694 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26,
1695 RT722_SDCA_CTL_VENDOR_DEF, 0), 0x01);
1696 /* Fine tune PDE2A latency */
1697 regmap_write(rt722->regmap, 0x2f5c, 0x25);
1698 /* PHYtiming TDZ/TZD control */
1699 regmap_write(rt722->regmap, 0x2f03, 0x06);
1700
1701 if (rt722->hw_vid == RT722_VB)
1702 regmap_write(rt722->regmap, 0x2f52, 0x00);
1703
1704 /* clear flag */
1705 regmap_write(rt722->regmap,
1706 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0),
1707 FUNCTION_NEEDS_INITIALIZATION);
1708 }
1709 }
1710
rt722_sdca_amp_preset(struct rt722_sdca_priv * rt722)1711 static void rt722_sdca_amp_preset(struct rt722_sdca_priv *rt722)
1712 {
1713 unsigned int amp_func_status;
1714 struct device *dev = &rt722->slave->dev;
1715
1716 regmap_read(rt722->regmap,
1717 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0), &_func_status);
1718 dev_dbg(dev, "%s amp func_status=0x%x\n", __func__, amp_func_status);
1719
1720 if ((amp_func_status & FUNCTION_NEEDS_INITIALIZATION) || (!rt722->first_hw_init)) {
1721 /* Set DVQ=01 */
1722 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_CLSD_CTRL6,
1723 0xc215);
1724 /* Reset dc_cal_top */
1725 rt722_sdca_index_write(rt722, RT722_VENDOR_CALI, RT722_DC_CALIB_CTRL,
1726 0x702c);
1727 /* W1C Trigger Calibration */
1728 rt722_sdca_index_write(rt722, RT722_VENDOR_CALI, RT722_DC_CALIB_CTRL,
1729 0xf02d);
1730 /* Set DAC02/ClassD power entity floating control */
1731 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_AMP_PDE_FLOAT_CTL,
1732 0x2323);
1733 /* Set EAPD high */
1734 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_EAPD_CTL,
1735 0x0002);
1736 /* Enable vf707_r14 */
1737 regmap_write(rt722->regmap,
1738 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23,
1739 RT722_SDCA_CTL_VENDOR_DEF, CH_08), 0x04);
1740
1741 if (rt722->hw_vid == RT722_VB)
1742 regmap_write(rt722->regmap, 0x2f54, 0x00);
1743
1744 /* clear flag */
1745 regmap_write(rt722->regmap,
1746 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0),
1747 FUNCTION_NEEDS_INITIALIZATION);
1748 }
1749 }
1750
rt722_sdca_jack_preset(struct rt722_sdca_priv * rt722)1751 static void rt722_sdca_jack_preset(struct rt722_sdca_priv *rt722)
1752 {
1753 int loop_check, chk_cnt = 100, ret;
1754 unsigned int calib_status = 0;
1755 unsigned int jack_func_status;
1756 struct device *dev = &rt722->slave->dev;
1757
1758 regmap_read(rt722->regmap,
1759 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0), &jack_func_status);
1760 dev_dbg(dev, "%s jack func_status=0x%x\n", __func__, jack_func_status);
1761
1762 if ((jack_func_status & FUNCTION_NEEDS_INITIALIZATION) || (!rt722->first_hw_init)) {
1763 /* Config analog bias */
1764 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_ANALOG_BIAS_CTL3,
1765 0xa081);
1766 /* GE related settings */
1767 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_GE_RELATED_CTL2,
1768 0xa009);
1769 /* Button A, B, C, D bypass mode */
1770 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_UMP_HID_CTL4,
1771 0xcf00);
1772 /* HID1 slot enable */
1773 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_UMP_HID_CTL5,
1774 0x000f);
1775 /* Report ID for HID1 */
1776 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_UMP_HID_CTL0,
1777 0x1100);
1778 /* OSC/OOC for slot 2, 3 */
1779 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_UMP_HID_CTL7,
1780 0x0c12);
1781 /* Set JD de-bounce clock control */
1782 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_JD_CTRL1,
1783 0x7002);
1784 /* Set DVQ=01 */
1785 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_CLSD_CTRL6,
1786 0xc215);
1787 /* FSM switch to calibration manual mode */
1788 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_FSM_CTL,
1789 0x4100);
1790 /* W1C Trigger DC calibration (HP) */
1791 rt722_sdca_index_write(rt722, RT722_VENDOR_CALI, RT722_DAC_DC_CALI_CTL3,
1792 0x008d);
1793 /* check HP calibration FSM status */
1794 for (loop_check = 0; loop_check < chk_cnt; loop_check++) {
1795 usleep_range(10000, 11000);
1796 ret = rt722_sdca_index_read(rt722, RT722_VENDOR_CALI,
1797 RT722_DAC_DC_CALI_CTL3, &calib_status);
1798 if (ret < 0)
1799 dev_dbg(&rt722->slave->dev, "calibration failed!, ret=%d\n", ret);
1800 if ((calib_status & 0x0040) == 0x0)
1801 break;
1802 }
1803
1804 if (loop_check == chk_cnt)
1805 dev_dbg(&rt722->slave->dev, "%s, calibration time-out!\n", __func__);
1806
1807 /* Set ADC09 power entity floating control */
1808 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_ADC0A_08_PDE_FLOAT_CTL,
1809 0x2a12);
1810 /* Set MIC2 and LINE1 power entity floating control */
1811 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_MIC2_LINE2_PDE_FLOAT_CTL,
1812 0x3429);
1813 /* Set ET41h and LINE2 power entity floating control */
1814 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_ET41_LINE2_PDE_FLOAT_CTL,
1815 0x4112);
1816 /* Set DAC03 and HP power entity floating control */
1817 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_DAC03_HP_PDE_FLOAT_CTL,
1818 0x4040);
1819 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_ENT_FLOAT_CTRL_1,
1820 0x4141);
1821 rt722_sdca_index_write(rt722, RT722_VENDOR_HDA_CTL, RT722_FLOAT_CTRL_1,
1822 0x0101);
1823 /* Fine tune PDE40 latency */
1824 regmap_write(rt722->regmap, 0x2f58, 0x07);
1825 regmap_write(rt722->regmap, 0x2f03, 0x06);
1826 /* MIC VRefo */
1827 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
1828 RT722_COMBO_JACK_AUTO_CTL1, 0x0200, 0x0200);
1829 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
1830 RT722_VREFO_GAT, 0x4000, 0x4000);
1831 /* Release HP-JD, EN_CBJ_TIE_GL/R open, en_osw gating auto done bit */
1832 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_DIGITAL_MISC_CTRL4,
1833 0x0010);
1834
1835 if (rt722->hw_vid == RT722_VB)
1836 regmap_write(rt722->regmap, 0x2f51, 0x00);
1837
1838 /* clear flag */
1839 regmap_write(rt722->regmap,
1840 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0),
1841 FUNCTION_NEEDS_INITIALIZATION);
1842 }
1843 }
1844
rt722_sdca_reset(struct rt722_sdca_priv * rt722)1845 static void rt722_sdca_reset(struct rt722_sdca_priv *rt722)
1846 {
1847 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_REG,
1848 RT722_LDO1_CTL, RT722_HIDDEN_REG_SW_RESET,
1849 RT722_HIDDEN_REG_SW_RESET);
1850 rt722_sdca_index_update_bits(rt722, RT722_VENDOR_HDA_CTL,
1851 RT722_HDA_LEGACY_RESET_CTL, 0x1, 0x1);
1852 if (rt722->hw_vid == RT722_VA)
1853 rt722_sdca_index_write(rt722, RT722_VENDOR_REG, RT722_LDO1_CTL, 0xb091);
1854 }
1855
rt722_sdca_io_init(struct device * dev,struct sdw_slave * slave)1856 int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave)
1857 {
1858 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
1859 unsigned int val;
1860
1861 rt722->disable_irq = false;
1862
1863 if (rt722->hw_init)
1864 return 0;
1865
1866 regcache_cache_only(rt722->regmap, false);
1867 if (rt722->first_hw_init) {
1868 regcache_cache_bypass(rt722->regmap, true);
1869 } else {
1870 /*
1871 * PM runtime is only enabled when a Slave reports as Attached
1872 */
1873
1874 /* set autosuspend parameters */
1875 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
1876 pm_runtime_use_autosuspend(&slave->dev);
1877
1878 /* update count of parent 'active' children */
1879 pm_runtime_set_active(&slave->dev);
1880
1881 /* make sure the device does not suspend immediately */
1882 pm_runtime_mark_last_busy(&slave->dev);
1883
1884 pm_runtime_enable(&slave->dev);
1885 }
1886
1887 pm_runtime_get_noresume(&slave->dev);
1888
1889 rt722_sdca_index_read(rt722, RT722_VENDOR_REG, RT722_JD_PRODUCT_NUM, &val);
1890 rt722->hw_vid = (val & 0x0f00) >> 8;
1891 dev_dbg(&slave->dev, "%s hw_vid=0x%x\n", __func__, rt722->hw_vid);
1892
1893 if (!rt722->first_hw_init)
1894 rt722_sdca_reset(rt722);
1895
1896 rt722_sdca_dmic_preset(rt722);
1897 rt722_sdca_amp_preset(rt722);
1898 rt722_sdca_jack_preset(rt722);
1899
1900 if (rt722->hs_jack && (!rt722->first_hw_init))
1901 rt722_sdca_jack_init(rt722);
1902
1903 if (rt722->first_hw_init) {
1904 regcache_cache_bypass(rt722->regmap, false);
1905 regcache_mark_dirty(rt722->regmap);
1906 } else
1907 rt722->first_hw_init = true;
1908
1909 /* Mark Slave initialization complete */
1910 rt722->hw_init = true;
1911
1912 pm_runtime_put_autosuspend(&slave->dev);
1913
1914 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
1915 return 0;
1916 }
1917
1918 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver");
1919 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
1920 MODULE_LICENSE("GPL");
1921