1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt722-sdca-sdw.c -- rt722 SDCA ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/cleanup.h>
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/module.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/soundwire/sdw_registers.h>
15
16 #include "rt722-sdca.h"
17 #include "rt722-sdca-sdw.h"
18
rt722_sdca_mbq_size(struct device * dev,unsigned int reg)19 static int rt722_sdca_mbq_size(struct device *dev, unsigned int reg)
20 {
21 switch (reg) {
22 case 0x22f0 ... 0x22f1:
23 case 0x2f01 ... 0x2f0c:
24 case 0x2f21 ... 0x2f24:
25 case 0x2f35 ... 0x2f36:
26 case 0x2f50 ... 0x2f52:
27 case 0x2f54:
28 case 0x2f58 ... 0x2f5d:
29 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0):
30 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_SELECTED_MODE,
31 0):
32 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
33 0):
34 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU03, RT722_SDCA_CTL_SELECTED_MODE,
35 0):
36 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
37 RT722_SDCA_CTL_FU_MUTE, CH_L) ...
38 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05,
39 RT722_SDCA_CTL_FU_MUTE, CH_R):
40 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_XU0D,
41 RT722_SDCA_CTL_SELECTED_MODE, 0):
42 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
43 RT722_SDCA_CTL_FU_MUTE, CH_L) ...
44 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F,
45 RT722_SDCA_CTL_FU_MUTE, CH_R):
46 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40,
47 RT722_SDCA_CTL_REQ_POWER_STATE, 0):
48 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40,
49 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0):
50 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12,
51 RT722_SDCA_CTL_REQ_POWER_STATE, 0):
52 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12,
53 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0):
54 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS01,
55 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
56 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_CS11,
57 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
58 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
59 RT722_SDCA_CTL_FU_MUTE, CH_01) ...
60 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E,
61 RT722_SDCA_CTL_FU_MUTE, CH_04):
62 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26,
63 RT722_SDCA_CTL_VENDOR_DEF, 0):
64 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A,
65 RT722_SDCA_CTL_REQ_POWER_STATE, 0):
66 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A,
67 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0):
68 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0):
69 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_CS1F,
70 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
71 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
72 RT722_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ...
73 SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
74 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
75 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
76 RT722_SDCA_CTL_FU_MUTE, CH_L) ...
77 SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06,
78 RT722_SDCA_CTL_FU_MUTE, CH_R):
79 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23,
80 RT722_SDCA_CTL_VENDOR_DEF, CH_08):
81 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23,
82 RT722_SDCA_CTL_REQ_POWER_STATE, 0):
83 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23,
84 RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0):
85 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0):
86 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31,
87 RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
88 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
89 case 0x44011000 ... 0x440115ff:
90 case 0x44012000:
91 case 0x44012021:
92 case 0x44012022:
93 case 0x44012025:
94 case 0x44021000 ... 0x440211ff:
95 case 0x44022000:
96 case 0x44022019:
97 case 0x4402201a:
98 case 0x4402201d:
99 case 0x44041000 ... 0x440415ff:
100 case 0x44042000:
101 case 0x44042019:
102 case 0x4404201a:
103 case 0x4404201d:
104 return 1;
105 case 0x2000000 ... 0x2000024:
106 case 0x2000029 ... 0x200004a:
107 case 0x2000051 ... 0x2000052:
108 case 0x200005a ... 0x200005b:
109 case 0x2000061 ... 0x2000069:
110 case 0x200006b:
111 case 0x2000070:
112 case 0x200007f:
113 case 0x2000082 ... 0x200008e:
114 case 0x2000090 ... 0x2000094:
115 case 0x20000b1:
116 case 0x20000b4:
117 case 0x3010000:
118 case 0x3110000:
119 case 0x5300000 ... 0x5300300:
120 case 0x5400002:
121 case 0x5600000 ... 0x5600007:
122 case 0x5700000 ... 0x5700004:
123 case 0x5800000 ... 0x5800004:
124 case 0x5810000:
125 case 0x5b00003:
126 case 0x5c00011:
127 case 0x5d00006:
128 case 0x5f00000 ... 0x5f0000d:
129 case 0x5f00030:
130 case 0x6100000 ... 0x6100051:
131 case 0x6100055 ... 0x6100057:
132 case 0x6100060:
133 case 0x6100062:
134 case 0x6100064 ... 0x6100065:
135 case 0x6100067:
136 case 0x6100070 ... 0x610007c:
137 case 0x6100080:
138 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN,
139 CH_01) ...
140 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_FU15, RT722_SDCA_CTL_FU_CH_GAIN,
141 CH_04):
142 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
143 CH_01):
144 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
145 CH_02):
146 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
147 CH_03):
148 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
149 CH_04):
150 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L):
151 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R):
152 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
153 CH_L):
154 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
155 CH_R):
156 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
157 CH_L):
158 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
159 CH_R):
160 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
161 RT722_SDCA_CTL_FU_CH_GAIN, CH_L):
162 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
163 RT722_SDCA_CTL_FU_CH_GAIN, CH_R):
164 return 2;
165 default:
166 return 0;
167 }
168 }
169
170 static const struct regmap_sdw_mbq_cfg rt722_mbq_config = {
171 .mbq_size = rt722_sdca_mbq_size,
172 };
173
rt722_sdca_readable_register(struct device * dev,unsigned int reg)174 static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg)
175 {
176 return rt722_sdca_mbq_size(dev, reg) > 0;
177 }
178
rt722_sdca_volatile_register(struct device * dev,unsigned int reg)179 static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg)
180 {
181 switch (reg) {
182 case 0x2f01:
183 case 0x2f54:
184 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0):
185 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE12, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0):
186 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PDE40, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0):
187 case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
188 0):
189 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0):
190 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0):
191 case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
192 0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
193 RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
194 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT0, RT722_SDCA_CTL_FUNC_STATUS, 0):
195 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, RT722_SDCA_CTL_ACTUAL_POWER_STATE, 0):
196 case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
197 case 0x2000000:
198 case 0x2000007:
199 case 0x200000d:
200 case 0x2000019:
201 case 0x200001a:
202 case 0x2000020:
203 case 0x2000030:
204 case 0x2000046:
205 case 0x2000067:
206 case 0x2000084:
207 case 0x2000086:
208 case 0x3010000:
209 case 0x3110000:
210 case 0x5800003:
211 case 0x5810000:
212 case 0x6100008:
213 case 0x44011000 ... 0x440115ff:
214 case 0x44012000:
215 case 0x44012021:
216 case 0x44012022:
217 case 0x44012025:
218 case 0x44021000 ... 0x440211ff:
219 case 0x44022000:
220 case 0x44022019:
221 case 0x4402201a:
222 case 0x4402201d:
223 case 0x44041000 ... 0x440415ff:
224 case 0x44042000:
225 case 0x44042019:
226 case 0x4404201a:
227 case 0x4404201d:
228 return true;
229 default:
230 return false;
231 }
232 }
233
234 static const struct regmap_config rt722_sdca_regmap = {
235 .reg_bits = 32,
236 .val_bits = 16,
237 .readable_reg = rt722_sdca_readable_register,
238 .volatile_reg = rt722_sdca_volatile_register,
239 .max_register = 0x44ffffff,
240 .reg_defaults = rt722_sdca_reg_defaults,
241 .num_reg_defaults = ARRAY_SIZE(rt722_sdca_reg_defaults),
242 .cache_type = REGCACHE_MAPLE,
243 .use_single_read = true,
244 .use_single_write = true,
245 };
246
rt722_sdca_update_status(struct sdw_slave * slave,enum sdw_slave_status status)247 static int rt722_sdca_update_status(struct sdw_slave *slave,
248 enum sdw_slave_status status)
249 {
250 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
251
252 if (status == SDW_SLAVE_UNATTACHED)
253 rt722->hw_init = false;
254
255 if (status == SDW_SLAVE_ATTACHED) {
256 if (rt722->hs_jack) {
257 /*
258 * Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then
259 * if the device attached again, we will need to set the setting back.
260 * It could avoid losing the jack detection interrupt.
261 * This also could sync with the cache value as the rt722_sdca_jack_init set.
262 */
263 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1,
264 SDW_SCP_SDCA_INTMASK_SDCA_0);
265 sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2,
266 SDW_SCP_SDCA_INTMASK_SDCA_8);
267 }
268 }
269
270 /*
271 * Perform initialization only if slave status is present and
272 * hw_init flag is false
273 */
274 if (rt722->hw_init || status != SDW_SLAVE_ATTACHED)
275 return 0;
276
277 /* perform I/O transfers required for Slave initialization */
278 return rt722_sdca_io_init(&slave->dev, slave);
279 }
280
rt722_sdca_read_prop(struct sdw_slave * slave)281 static int rt722_sdca_read_prop(struct sdw_slave *slave)
282 {
283 struct sdw_slave_prop *prop = &slave->prop;
284 int nval;
285 int i, j;
286 u32 bit;
287 unsigned long addr;
288 struct sdw_dpn_prop *dpn;
289
290 sdw_slave_read_lane_mapping(slave);
291
292 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
293 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
294
295 prop->paging_support = true;
296
297 /*
298 * port = 1 for headphone playback
299 * port = 2 for headset-mic capture
300 * port = 3 for speaker playback
301 * port = 6 for digital-mic capture
302 */
303 prop->source_ports = BIT(6) | BIT(2); /* BITMAP: 01000100 */
304 prop->sink_ports = BIT(3) | BIT(1); /* BITMAP: 00001010 */
305
306 nval = hweight32(prop->source_ports);
307 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
308 sizeof(*prop->src_dpn_prop), GFP_KERNEL);
309 if (!prop->src_dpn_prop)
310 return -ENOMEM;
311
312 i = 0;
313 dpn = prop->src_dpn_prop;
314 addr = prop->source_ports;
315 for_each_set_bit(bit, &addr, 32) {
316 dpn[i].num = bit;
317 dpn[i].type = SDW_DPN_FULL;
318 dpn[i].simple_ch_prep_sm = true;
319 dpn[i].ch_prep_timeout = 10;
320 i++;
321 }
322
323 /* do this again for sink now */
324 nval = hweight32(prop->sink_ports);
325 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
326 sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
327 if (!prop->sink_dpn_prop)
328 return -ENOMEM;
329
330 j = 0;
331 dpn = prop->sink_dpn_prop;
332 addr = prop->sink_ports;
333 for_each_set_bit(bit, &addr, 32) {
334 dpn[j].num = bit;
335 dpn[j].type = SDW_DPN_FULL;
336 dpn[j].simple_ch_prep_sm = true;
337 dpn[j].ch_prep_timeout = 10;
338 j++;
339 }
340
341 /* set the timeout values */
342 prop->clk_stop_timeout = 900;
343
344 /* wake-up event */
345 prop->wake_capable = 1;
346
347 /* Three data lanes are supported by rt722-sdca codec */
348 prop->lane_control_support = true;
349
350 return 0;
351 }
352
rt722_sdca_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)353 static int rt722_sdca_interrupt_callback(struct sdw_slave *slave,
354 struct sdw_slave_intr_status *status)
355 {
356 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
357 int ret, stat;
358 int count = 0, retry = 3;
359 unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0;
360
361 if (cancel_delayed_work_sync(&rt722->jack_detect_work)) {
362 dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__);
363 /* avoid the HID owner doesn't change to device */
364 if (rt722->scp_sdca_stat2)
365 scp_sdca_stat2 = rt722->scp_sdca_stat2;
366 }
367
368 /*
369 * The critical section below intentionally protects a rather large piece of code.
370 * We don't want to allow the system suspend to disable an interrupt while we are
371 * processing it, which could be problematic given the quirky SoundWire interrupt
372 * scheme. We do want however to prevent new workqueues from being scheduled if
373 * the disable_irq flag was set during system suspend.
374 */
375 mutex_lock(&rt722->disable_irq_lock);
376
377 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
378 if (ret < 0)
379 goto io_error;
380 rt722->scp_sdca_stat1 = ret;
381 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
382 if (ret < 0)
383 goto io_error;
384 rt722->scp_sdca_stat2 = ret;
385 if (scp_sdca_stat2)
386 rt722->scp_sdca_stat2 |= scp_sdca_stat2;
387 do {
388 /* clear flag */
389 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
390 if (ret < 0)
391 goto io_error;
392 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) {
393 ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1,
394 SDW_SCP_SDCA_INT_SDCA_0, SDW_SCP_SDCA_INT_SDCA_0);
395 if (ret < 0)
396 goto io_error;
397 }
398
399 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
400 if (ret < 0)
401 goto io_error;
402 if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) {
403 ret = sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INT2,
404 SDW_SCP_SDCA_INTMASK_SDCA_8);
405 if (ret < 0)
406 goto io_error;
407 }
408
409 /* check if flag clear or not */
410 ret = sdw_read_no_pm(rt722->slave, SDW_DP0_INT);
411 if (ret < 0)
412 goto io_error;
413 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
414
415 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
416 if (ret < 0)
417 goto io_error;
418 scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0;
419
420 ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
421 if (ret < 0)
422 goto io_error;
423 scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8;
424
425 stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade;
426
427 count++;
428 } while (stat != 0 && count < retry);
429
430 if (stat)
431 dev_warn(&slave->dev,
432 "%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
433 rt722->scp_sdca_stat1, rt722->scp_sdca_stat2);
434
435 if (status->sdca_cascade && !rt722->disable_irq)
436 mod_delayed_work(system_power_efficient_wq,
437 &rt722->jack_detect_work, msecs_to_jiffies(280));
438
439 mutex_unlock(&rt722->disable_irq_lock);
440
441 return 0;
442
443 io_error:
444 mutex_unlock(&rt722->disable_irq_lock);
445 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
446 return ret;
447 }
448
449 static const struct sdw_slave_ops rt722_sdca_slave_ops = {
450 .read_prop = rt722_sdca_read_prop,
451 .interrupt_callback = rt722_sdca_interrupt_callback,
452 .update_status = rt722_sdca_update_status,
453 };
454
rt722_sdca_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)455 static int rt722_sdca_sdw_probe(struct sdw_slave *slave,
456 const struct sdw_device_id *id)
457 {
458 struct regmap *regmap;
459
460 /* Regmap Initialization */
461 regmap = devm_regmap_init_sdw_mbq_cfg(&slave->dev, slave,
462 &rt722_sdca_regmap,
463 &rt722_mbq_config);
464 if (IS_ERR(regmap))
465 return PTR_ERR(regmap);
466
467 return rt722_sdca_init(&slave->dev, regmap, slave);
468 }
469
rt722_sdca_sdw_remove(struct sdw_slave * slave)470 static void rt722_sdca_sdw_remove(struct sdw_slave *slave)
471 {
472 struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
473
474 if (rt722->hw_init) {
475 cancel_delayed_work_sync(&rt722->jack_detect_work);
476 cancel_delayed_work_sync(&rt722->jack_btn_check_work);
477 }
478
479 if (rt722->first_hw_init)
480 pm_runtime_disable(&slave->dev);
481
482 mutex_destroy(&rt722->calibrate_mutex);
483 mutex_destroy(&rt722->disable_irq_lock);
484 }
485
486 static const struct sdw_device_id rt722_sdca_id[] = {
487 SDW_SLAVE_ENTRY_EXT(0x025d, 0x722, 0x3, 0x1, 0),
488 {},
489 };
490 MODULE_DEVICE_TABLE(sdw, rt722_sdca_id);
491
rt722_sdca_dev_suspend(struct device * dev)492 static int rt722_sdca_dev_suspend(struct device *dev)
493 {
494 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
495
496 if (!rt722->hw_init)
497 return 0;
498
499 cancel_delayed_work_sync(&rt722->jack_detect_work);
500 cancel_delayed_work_sync(&rt722->jack_btn_check_work);
501
502 regcache_cache_only(rt722->regmap, true);
503
504 return 0;
505 }
506
rt722_sdca_dev_system_suspend(struct device * dev)507 static int rt722_sdca_dev_system_suspend(struct device *dev)
508 {
509 struct rt722_sdca_priv *rt722_sdca = dev_get_drvdata(dev);
510 struct sdw_slave *slave = dev_to_sdw_dev(dev);
511 int ret1, ret2;
512
513 if (!rt722_sdca->hw_init)
514 return 0;
515
516 /*
517 * prevent new interrupts from being handled after the
518 * deferred work completes and before the parent disables
519 * interrupts on the link
520 */
521 scoped_guard(mutex, &rt722_sdca->disable_irq_lock) {
522 rt722_sdca->disable_irq = true;
523 ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1,
524 SDW_SCP_SDCA_INTMASK_SDCA_0, 0);
525 ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2,
526 SDW_SCP_SDCA_INTMASK_SDCA_8, 0);
527 }
528
529 if (ret1 < 0 || ret2 < 0) {
530 /* log but don't prevent suspend from happening */
531 dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__);
532 }
533
534 return rt722_sdca_dev_suspend(dev);
535 }
536
537 #define RT722_PROBE_TIMEOUT 5000
538
rt722_sdca_dev_resume(struct device * dev)539 static int rt722_sdca_dev_resume(struct device *dev)
540 {
541 struct sdw_slave *slave = dev_to_sdw_dev(dev);
542 struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
543 int ret;
544
545 if (!rt722->first_hw_init)
546 return 0;
547
548 if (!slave->unattach_request) {
549 scoped_guard(mutex, &rt722->disable_irq_lock) {
550 if (rt722->disable_irq) {
551 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1,
552 SDW_SCP_SDCA_INTMASK_SDCA_0);
553 sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2,
554 SDW_SCP_SDCA_INTMASK_SDCA_8);
555 rt722->disable_irq = false;
556 }
557 }
558 }
559
560 ret = sdw_slave_wait_for_init(slave, RT722_PROBE_TIMEOUT);
561 if (ret) {
562 sdw_show_ping_status(slave->bus, true);
563 return ret;
564 }
565
566 regcache_cache_only(rt722->regmap, false);
567 ret = regcache_sync(rt722->regmap);
568 if (ret) {
569 regcache_cache_only(rt722->regmap, true);
570 regcache_mark_dirty(rt722->regmap);
571 return ret;
572 }
573
574 return 0;
575 }
576
577 static const struct dev_pm_ops rt722_sdca_pm = {
578 SYSTEM_SLEEP_PM_OPS(rt722_sdca_dev_system_suspend, rt722_sdca_dev_resume)
579 RUNTIME_PM_OPS(rt722_sdca_dev_suspend, rt722_sdca_dev_resume, NULL)
580 };
581
582 static struct sdw_driver rt722_sdca_sdw_driver = {
583 .driver = {
584 .name = "rt722-sdca",
585 .pm = pm_ptr(&rt722_sdca_pm),
586 },
587 .probe = rt722_sdca_sdw_probe,
588 .remove = rt722_sdca_sdw_remove,
589 .ops = &rt722_sdca_slave_ops,
590 .id_table = rt722_sdca_id,
591 };
592 module_sdw_driver(rt722_sdca_sdw_driver);
593
594 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver");
595 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
596 MODULE_LICENSE("GPL");
597