1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt721-sdca.c -- rt721 SDCA ALSA SoC audio driver
4 //
5 // Copyright(c) 2024 Realtek Semiconductor Corp.
6 //
7 //
8 #include <linux/cleanup.h>
9 #include <linux/bitops.h>
10 #include <sound/core.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <sound/initval.h>
14 #include <sound/jack.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <sound/pcm.h>
19 #include <linux/pm_runtime.h>
20 #include <sound/pcm_params.h>
21 #include <linux/soundwire/sdw_registers.h>
22 #include <linux/slab.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/sdw.h>
25 #include <sound/tlv.h>
26
27 #include "rt721-sdca.h"
28 #include "rt-sdw-common.h"
29
rt721_sdca_jack_detect_handler(struct work_struct * work)30 static void rt721_sdca_jack_detect_handler(struct work_struct *work)
31 {
32 struct rt721_sdca_priv *rt721 =
33 container_of(work, struct rt721_sdca_priv, jack_detect_work.work);
34 int btn_type = 0;
35
36 if (!rt721->hs_jack)
37 return;
38
39 if (!rt721->component->card || !rt721->component->card->instantiated)
40 return;
41
42 /* SDW_SCP_SDCA_INT_SDCA_6 is used for jack detection */
43 if (rt721->scp_sdca_stat1 & SDW_SCP_SDCA_INT_SDCA_0) {
44 rt721->jack_type = rt_sdca_headset_detect(rt721->regmap,
45 RT721_SDCA_ENT_GE49);
46 if (rt721->jack_type < 0)
47 return;
48 }
49
50 /* SDW_SCP_SDCA_INT_SDCA_8 is used for button detection */
51 if (rt721->scp_sdca_stat2 & SDW_SCP_SDCA_INT_SDCA_8)
52 btn_type = rt_sdca_button_detect(rt721->regmap,
53 RT721_SDCA_ENT_HID01, RT721_BUF_ADDR_HID1,
54 RT721_SDCA_HID_ID);
55
56 if (rt721->jack_type == 0)
57 btn_type = 0;
58
59 dev_dbg(&rt721->slave->dev,
60 "in %s, jack_type=%d\n", __func__, rt721->jack_type);
61 dev_dbg(&rt721->slave->dev,
62 "in %s, btn_type=0x%x\n", __func__, btn_type);
63 dev_dbg(&rt721->slave->dev,
64 "in %s, scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
65 rt721->scp_sdca_stat1, rt721->scp_sdca_stat2);
66
67 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type,
68 SND_JACK_HEADSET |
69 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
70 SND_JACK_BTN_2 | SND_JACK_BTN_3);
71
72 if (btn_type) {
73 /* button released */
74 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type,
75 SND_JACK_HEADSET |
76 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
77 SND_JACK_BTN_2 | SND_JACK_BTN_3);
78
79 mod_delayed_work(system_power_efficient_wq,
80 &rt721->jack_btn_check_work, msecs_to_jiffies(200));
81 }
82 }
83
rt721_sdca_btn_check_handler(struct work_struct * work)84 static void rt721_sdca_btn_check_handler(struct work_struct *work)
85 {
86 struct rt721_sdca_priv *rt721 =
87 container_of(work, struct rt721_sdca_priv, jack_btn_check_work.work);
88 int btn_type = 0, ret, idx;
89 unsigned int det_mode, offset, val;
90 unsigned char buf[3];
91
92 ret = regmap_read(rt721->regmap,
93 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_GE49,
94 RT721_SDCA_CTL_DETECTED_MODE, 0), &det_mode);
95 if (ret < 0)
96 goto io_error;
97
98 /* pin attached */
99 if (det_mode) {
100 /* read UMP message offset */
101 ret = regmap_read(rt721->regmap,
102 SDW_SDCA_CTL(FUNC_NUM_HID, RT721_SDCA_ENT_HID01,
103 RT721_SDCA_CTL_HIDTX_MESSAGE_OFFSET, 0), &offset);
104 if (ret < 0)
105 goto io_error;
106
107 for (idx = 0; idx < sizeof(buf); idx++) {
108 ret = regmap_read(rt721->regmap,
109 RT721_BUF_ADDR_HID1 + offset + idx, &val);
110 if (ret < 0)
111 goto io_error;
112 buf[idx] = val & 0xff;
113 }
114 /* Report ID for HID1 */
115 if (buf[0] == 0x11)
116 btn_type = rt_sdca_btn_type(&buf[1]);
117 } else
118 rt721->jack_type = 0;
119
120 dev_dbg(&rt721->slave->dev, "%s, btn_type=0x%x\n", __func__, btn_type);
121 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type | btn_type,
122 SND_JACK_HEADSET |
123 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
124 SND_JACK_BTN_2 | SND_JACK_BTN_3);
125
126 if (btn_type) {
127 /* button released */
128 snd_soc_jack_report(rt721->hs_jack, rt721->jack_type,
129 SND_JACK_HEADSET |
130 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
131 SND_JACK_BTN_2 | SND_JACK_BTN_3);
132
133 mod_delayed_work(system_power_efficient_wq,
134 &rt721->jack_btn_check_work, msecs_to_jiffies(200));
135 }
136
137 return;
138
139 io_error:
140 pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
141 }
142
rt721_sdca_dmic_preset(struct rt721_sdca_priv * rt721)143 static void rt721_sdca_dmic_preset(struct rt721_sdca_priv *rt721)
144 {
145 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
146 RT721_MISC_POWER_CTL31, 0x8000);
147 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
148 RT721_VREF1_HV_CTRL1, 0xe000);
149 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
150 RT721_MISC_POWER_CTL31, 0x8007);
151 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
152 RT721_ENT_FLOAT_CTL9, 0x2a2a);
153 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
154 RT721_ENT_FLOAT_CTL10, 0x2a00);
155 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
156 RT721_ENT_FLOAT_CTL6, 0x2a2a);
157 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
158 RT721_ENT_FLOAT_CTL5, 0x2626);
159 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
160 RT721_ENT_FLOAT_CTL8, 0x1e00);
161 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
162 RT721_ENT_FLOAT_CTL7, 0x1515);
163 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
164 RT721_CH_FLOAT_CTL3, 0x0304);
165 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
166 RT721_CH_FLOAT_CTL4, 0x0304);
167 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
168 RT721_HDA_LEGACY_CTL1, 0x0000);
169 regmap_write(rt721->regmap,
170 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_IT26,
171 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x01);
172 regmap_write(rt721->mbq_regmap, 0x5910009, 0x2e01);
173 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL,
174 RT721_RC_CALIB_CTRL0, 0x0b00);
175 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL,
176 RT721_RC_CALIB_CTRL0, 0x0b40);
177 regmap_write(rt721->regmap, 0x2f5c, 0x25);
178 }
179
rt721_sdca_amp_preset(struct rt721_sdca_priv * rt721)180 static void rt721_sdca_amp_preset(struct rt721_sdca_priv *rt721)
181 {
182 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
183 RT721_MISC_POWER_CTL31, 0x8000);
184 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
185 RT721_VREF1_HV_CTRL1, 0xe000);
186 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
187 RT721_MISC_POWER_CTL31, 0x8007);
188 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6420);
189 regmap_write(rt721->mbq_regmap, 0x5810000, 0x6421);
190 regmap_write(rt721->mbq_regmap, 0x5810000, 0xe421);
191 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
192 RT721_CH_FLOAT_CTL6, 0x5561);
193 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_REG,
194 RT721_GPIO_PAD_CTRL5, 0x8003);
195 regmap_write(rt721->regmap,
196 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23,
197 RT721_SDCA_CTL_VENDOR_DEF, 0), 0x04);
198 regmap_write(rt721->regmap,
199 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
200 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00);
201 regmap_write(rt721->regmap,
202 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
203 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00);
204 regmap_write(rt721->regmap,
205 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55,
206 RT721_SDCA_CTL_FU_MUTE, CH_01), 0x00);
207 regmap_write(rt721->regmap,
208 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55,
209 RT721_SDCA_CTL_FU_MUTE, CH_02), 0x00);
210 regmap_write(rt721->regmap, 0x2f5d, 0x1);
211 }
212
rt721_sdca_jack_preset(struct rt721_sdca_priv * rt721)213 static void rt721_sdca_jack_preset(struct rt721_sdca_priv *rt721)
214 {
215 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
216 RT721_MISC_POWER_CTL31, 0x8000);
217 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
218 RT721_VREF1_HV_CTRL1, 0xe000);
219 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
220 RT721_MISC_POWER_CTL31, 0x8007);
221 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
222 RT721_GE_REL_CTRL1, 0x8011);
223 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
224 RT721_UMP_HID_CTRL3, 0xcf00);
225 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
226 RT721_UMP_HID_CTRL4, 0x000f);
227 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
228 RT721_UMP_HID_CTRL1, 0x1100);
229 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
230 RT721_UMP_HID_CTRL5, 0x0c12);
231 rt_sdca_index_write(rt721->mbq_regmap, RT721_JD_CTRL,
232 RT721_JD_1PIN_GAT_CTRL2, 0xc002);
233 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL,
234 RT721_RC_CALIB_CTRL0, 0x0b00);
235 rt_sdca_index_write(rt721->mbq_regmap, RT721_RC_CALIB_CTRL,
236 RT721_RC_CALIB_CTRL0, 0x0b40);
237 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
238 RT721_UAJ_TOP_TCON14, 0x3333);
239 regmap_write(rt721->mbq_regmap, 0x5810035, 0x0036);
240 regmap_write(rt721->mbq_regmap, 0x5810030, 0xee00);
241 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL,
242 RT721_HP_AMP_2CH_CAL1, 0x0140);
243 regmap_write(rt721->mbq_regmap, 0x5810000, 0x0021);
244 regmap_write(rt721->mbq_regmap, 0x5810000, 0x8021);
245 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL,
246 RT721_HP_AMP_2CH_CAL18, 0x5522);
247 regmap_write(rt721->mbq_regmap, 0x5b10007, 0x2000);
248 regmap_write(rt721->mbq_regmap, 0x5B10017, 0x1b0f);
249 rt_sdca_index_write(rt721->mbq_regmap, RT721_CBJ_CTRL,
250 RT721_CBJ_A0_GAT_CTRL1, 0x2205);
251 rt_sdca_index_write(rt721->mbq_regmap, RT721_CAP_PORT_CTRL,
252 RT721_HP_AMP_2CH_CAL4, 0xa105);
253 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
254 RT721_UAJ_TOP_TCON14, 0x3b33);
255 regmap_write(rt721->mbq_regmap, 0x310400, 0x3043);
256 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
257 RT721_UAJ_TOP_TCON14, 0x3f33);
258 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
259 RT721_UAJ_TOP_TCON13, 0x6048);
260 regmap_write(rt721->mbq_regmap, 0x310401, 0x3000);
261 regmap_write(rt721->mbq_regmap, 0x310402, 0x1b00);
262 regmap_write(rt721->mbq_regmap, 0x310300, 0x000f);
263 regmap_write(rt721->mbq_regmap, 0x310301, 0x3000);
264 regmap_write(rt721->mbq_regmap, 0x310302, 0x1b00);
265 rt_sdca_index_write(rt721->mbq_regmap, RT721_VENDOR_ANA_CTL,
266 RT721_UAJ_TOP_TCON17, 0x0008);
267 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL,
268 RT721_DAC_2CH_CTRL3, 0x55ff);
269 rt_sdca_index_write(rt721->mbq_regmap, RT721_DAC_CTRL,
270 RT721_DAC_2CH_CTRL4, 0xcc00);
271 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
272 RT721_MBIAS_LV_CTRL2, 0x6677);
273 rt_sdca_index_write(rt721->mbq_regmap, RT721_ANA_POW_PART,
274 RT721_VREF2_LV_CTRL1, 0x7600);
275 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
276 RT721_ENT_FLOAT_CTL2, 0x1234);
277 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
278 RT721_ENT_FLOAT_CTL3, 0x3512);
279 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
280 RT721_ENT_FLOAT_CTL1, 0x4040);
281 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
282 RT721_ENT_FLOAT_CTL4, 0x1201);
283 rt_sdca_index_write(rt721->mbq_regmap, RT721_BOOST_CTRL,
284 RT721_BST_4CH_TOP_GATING_CTRL1, 0x002a);
285 regmap_write(rt721->regmap, 0x2f58, 0x07);
286
287 regmap_write(rt721->regmap, 0x2f51, 0x00);
288 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
289 RT721_MISC_CTL, 0x0004);
290 }
291
rt721_sdca_jack_init(struct rt721_sdca_priv * rt721)292 static void rt721_sdca_jack_init(struct rt721_sdca_priv *rt721)
293 {
294 guard(mutex)(&rt721->calibrate_mutex);
295 if (rt721->hs_jack) {
296 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK1,
297 SDW_SCP_SDCA_INTMASK_SDCA_0);
298 sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK2,
299 SDW_SCP_SDCA_INTMASK_SDCA_8);
300 dev_dbg(&rt721->slave->dev, "in %s enable\n", __func__);
301 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
302 RT721_HDA_LEGACY_UAJ_CTL, 0x036E);
303 regmap_write(rt721->regmap,
304 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU03,
305 RT721_SDCA_CTL_SELECTED_MODE, 0), 0);
306 regmap_write(rt721->regmap,
307 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XU0D,
308 RT721_SDCA_CTL_SELECTED_MODE, 0), 0);
309 rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
310 RT721_XU_REL_CTRL, 0x0000);
311 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
312 RT721_GE_REL_CTRL1, 0x4000, 0x4000);
313 }
314 }
315
rt721_sdca_set_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * hs_jack,void * data)316 static int rt721_sdca_set_jack_detect(struct snd_soc_component *component,
317 struct snd_soc_jack *hs_jack, void *data)
318 {
319 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
320 int ret;
321
322 rt721->hs_jack = hs_jack;
323
324 ret = pm_runtime_resume_and_get(component->dev);
325 if (ret < 0) {
326 if (ret != -EACCES) {
327 dev_err(component->dev, "%s: failed to resume %d\n", __func__, ret);
328 return ret;
329 }
330 /* pm_runtime not enabled yet */
331 dev_dbg(component->dev, "%s: skipping jack init for now\n", __func__);
332 return 0;
333 }
334
335 rt721_sdca_jack_init(rt721);
336
337 pm_runtime_put_autosuspend(component->dev);
338
339 return 0;
340 }
341
342 /* For SDCA control DAC/ADC Gain */
rt721_sdca_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)343 static int rt721_sdca_set_gain_put(struct snd_kcontrol *kcontrol,
344 struct snd_ctl_elem_value *ucontrol)
345 {
346 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
347 struct soc_mixer_control *mc =
348 (struct soc_mixer_control *)kcontrol->private_value;
349 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
350 unsigned int read_l, read_r, gain_l_val, gain_r_val;
351 unsigned int adc_vol_flag = 0, changed = 0;
352 unsigned int lvalue, rvalue;
353 const unsigned int interval_offset = 0xc0;
354 const unsigned int tendA = 0x200;
355 const unsigned int tendB = 0xa00;
356
357 if (strstr(ucontrol->id.name, "FU1E Capture Volume") ||
358 strstr(ucontrol->id.name, "FU0F Capture Volume"))
359 adc_vol_flag = 1;
360
361 regmap_read(rt721->mbq_regmap, mc->reg, &lvalue);
362 regmap_read(rt721->mbq_regmap, mc->rreg, &rvalue);
363
364 /* L Channel */
365 gain_l_val = ucontrol->value.integer.value[0];
366 if (gain_l_val > mc->max)
367 gain_l_val = mc->max;
368
369 if (mc->shift == 8) {
370 /* boost gain */
371 gain_l_val = gain_l_val * tendB;
372 } else if (mc->shift == 1) {
373 /* FU33 boost gain */
374 if (gain_l_val == 0)
375 gain_l_val = 0x8000;
376 else
377 gain_l_val = (gain_l_val - 1) * tendA;
378 } else {
379 /* ADC/DAC gain */
380 if (adc_vol_flag)
381 gain_l_val = 0x1e00 - ((mc->max - gain_l_val) * interval_offset);
382 else
383 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset);
384 gain_l_val &= 0xffff;
385 }
386
387 /* R Channel */
388 gain_r_val = ucontrol->value.integer.value[1];
389 if (gain_r_val > mc->max)
390 gain_r_val = mc->max;
391
392 if (mc->shift == 8) {
393 /* boost gain */
394 gain_r_val = gain_r_val * tendB;
395 } else if (mc->shift == 1) {
396 /* FU33 boost gain */
397 if (gain_r_val == 0)
398 gain_r_val = 0x8000;
399 else
400 gain_r_val = (gain_r_val - 1) * tendA;
401 } else {
402 /* ADC/DAC gain */
403 if (adc_vol_flag)
404 gain_r_val = 0x1e00 - ((mc->max - gain_r_val) * interval_offset);
405 else
406 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset);
407 gain_r_val &= 0xffff;
408 }
409
410 if (lvalue != gain_l_val || rvalue != gain_r_val)
411 changed = 1;
412 else
413 return 0;
414
415 /* Lch*/
416 regmap_write(rt721->mbq_regmap, mc->reg, gain_l_val);
417
418 /* Rch */
419 regmap_write(rt721->mbq_regmap, mc->rreg, gain_r_val);
420
421 regmap_read(rt721->mbq_regmap, mc->reg, &read_l);
422 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r);
423 if (read_r == gain_r_val && read_l == gain_l_val)
424 return changed;
425
426 return -EIO;
427 }
428
rt721_sdca_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)429 static int rt721_sdca_set_gain_get(struct snd_kcontrol *kcontrol,
430 struct snd_ctl_elem_value *ucontrol)
431 {
432 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
433 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
434 struct soc_mixer_control *mc =
435 (struct soc_mixer_control *)kcontrol->private_value;
436 unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0;
437 unsigned int adc_vol_flag = 0;
438 const unsigned int interval_offset = 0xc0;
439 const unsigned int tendA = 0x200;
440 const unsigned int tendB = 0xa00;
441
442 if (strstr(ucontrol->id.name, "FU1E Capture Volume") ||
443 strstr(ucontrol->id.name, "FU0F Capture Volume"))
444 adc_vol_flag = 1;
445
446 regmap_read(rt721->mbq_regmap, mc->reg, &read_l);
447 regmap_read(rt721->mbq_regmap, mc->rreg, &read_r);
448
449 if (mc->shift == 8) {
450 /* boost gain */
451 ctl_l = read_l / tendB;
452 } else if (mc->shift == 1) {
453 /* FU33 boost gain */
454 if (read_l == 0x8000 || read_l == 0xfe00)
455 ctl_l = 0;
456 else
457 ctl_l = read_l / tendA + 1;
458 } else {
459 if (adc_vol_flag)
460 ctl_l = mc->max - (((0x1e00 - read_l) & 0xffff) / interval_offset);
461 else
462 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset);
463 }
464
465 if (read_l != read_r) {
466 if (mc->shift == 8) {
467 /* boost gain */
468 ctl_r = read_r / tendB;
469 } else if (mc->shift == 1) {
470 /* FU33 boost gain */
471 if (read_r == 0x8000 || read_r == 0xfe00)
472 ctl_r = 0;
473 else
474 ctl_r = read_r / tendA + 1;
475 } else { /* ADC/DAC gain */
476 if (adc_vol_flag)
477 ctl_r = mc->max - (((0x1e00 - read_r) & 0xffff) / interval_offset);
478 else
479 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset);
480 }
481 } else {
482 ctl_r = ctl_l;
483 }
484
485 ucontrol->value.integer.value[0] = ctl_l;
486 ucontrol->value.integer.value[1] = ctl_r;
487
488 return 0;
489 }
490
rt721_sdca_set_fu1e_capture_ctl(struct rt721_sdca_priv * rt721)491 static int rt721_sdca_set_fu1e_capture_ctl(struct rt721_sdca_priv *rt721)
492 {
493 int err, i;
494 unsigned int ch_mute;
495
496 for (i = 0; i < ARRAY_SIZE(rt721->fu1e_mixer_mute); i++) {
497 ch_mute = rt721->fu1e_dapm_mute || rt721->fu1e_mixer_mute[i];
498 err = regmap_write(rt721->regmap,
499 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
500 RT721_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
501 if (err < 0)
502 return err;
503 }
504
505 return 0;
506 }
507
rt721_sdca_fu1e_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)508 static int rt721_sdca_fu1e_capture_get(struct snd_kcontrol *kcontrol,
509 struct snd_ctl_elem_value *ucontrol)
510 {
511 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
512 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
513 struct rt721_sdca_dmic_kctrl_priv *p =
514 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
515 unsigned int i;
516
517 for (i = 0; i < p->count; i++)
518 ucontrol->value.integer.value[i] = !rt721->fu1e_mixer_mute[i];
519
520 return 0;
521 }
522
rt721_sdca_fu1e_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)523 static int rt721_sdca_fu1e_capture_put(struct snd_kcontrol *kcontrol,
524 struct snd_ctl_elem_value *ucontrol)
525 {
526 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
527 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
528 struct rt721_sdca_dmic_kctrl_priv *p =
529 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
530 int err, changed = 0, i;
531
532 for (i = 0; i < p->count; i++) {
533 if (rt721->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
534 changed = 1;
535 rt721->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
536 }
537
538 err = rt721_sdca_set_fu1e_capture_ctl(rt721);
539 if (err < 0)
540 return err;
541
542 return changed;
543 }
544
rt721_sdca_set_fu0f_capture_ctl(struct rt721_sdca_priv * rt721)545 static int rt721_sdca_set_fu0f_capture_ctl(struct rt721_sdca_priv *rt721)
546 {
547 int err;
548 unsigned int ch_l, ch_r;
549
550 ch_l = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_l_mute) ? 0x01 : 0x00;
551 ch_r = (rt721->fu0f_dapm_mute || rt721->fu0f_mixer_r_mute) ? 0x01 : 0x00;
552
553 err = regmap_write(rt721->regmap,
554 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
555 RT721_SDCA_CTL_FU_MUTE, CH_L), ch_l);
556 if (err < 0)
557 return err;
558
559 err = regmap_write(rt721->regmap,
560 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
561 RT721_SDCA_CTL_FU_MUTE, CH_R), ch_r);
562 if (err < 0)
563 return err;
564
565 return 0;
566 }
567
rt721_sdca_fu0f_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)568 static int rt721_sdca_fu0f_capture_get(struct snd_kcontrol *kcontrol,
569 struct snd_ctl_elem_value *ucontrol)
570 {
571 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
572 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
573
574 ucontrol->value.integer.value[0] = !rt721->fu0f_mixer_l_mute;
575 ucontrol->value.integer.value[1] = !rt721->fu0f_mixer_r_mute;
576 return 0;
577 }
578
rt721_sdca_fu0f_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)579 static int rt721_sdca_fu0f_capture_put(struct snd_kcontrol *kcontrol,
580 struct snd_ctl_elem_value *ucontrol)
581 {
582 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
583 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
584 int err, changed = 0;
585
586 if (rt721->fu0f_mixer_l_mute != !ucontrol->value.integer.value[0] ||
587 rt721->fu0f_mixer_r_mute != !ucontrol->value.integer.value[1])
588 changed = 1;
589
590 rt721->fu0f_mixer_l_mute = !ucontrol->value.integer.value[0];
591 rt721->fu0f_mixer_r_mute = !ucontrol->value.integer.value[1];
592 err = rt721_sdca_set_fu0f_capture_ctl(rt721);
593 if (err < 0)
594 return err;
595
596 return changed;
597 }
598
rt721_sdca_fu_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)599 static int rt721_sdca_fu_info(struct snd_kcontrol *kcontrol,
600 struct snd_ctl_elem_info *uinfo)
601 {
602 struct rt721_sdca_dmic_kctrl_priv *p =
603 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
604
605 if (p->max == 1)
606 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
607 else
608 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
609 uinfo->count = p->count;
610 uinfo->value.integer.min = 0;
611 uinfo->value.integer.max = p->max;
612 return 0;
613 }
614
rt721_sdca_dmic_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)615 static int rt721_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
616 struct snd_ctl_elem_value *ucontrol)
617 {
618 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
619 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
620 struct rt721_sdca_dmic_kctrl_priv *p =
621 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
622 unsigned int boost_step = 0x0a00;
623 unsigned int vol_max = 0x1e00;
624 unsigned int regvalue, ctl, i;
625 unsigned int adc_vol_flag = 0;
626 const unsigned int interval_offset = 0xc0;
627
628 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
629 adc_vol_flag = 1;
630
631 /* check all channels */
632 for (i = 0; i < p->count; i++) {
633 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value);
634
635 if (!adc_vol_flag) /* boost gain */
636 ctl = regvalue / boost_step;
637 else /* ADC gain */
638 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset);
639
640 ucontrol->value.integer.value[i] = ctl;
641 }
642
643 return 0;
644 }
645
rt721_sdca_dmic_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)646 static int rt721_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
647 struct snd_ctl_elem_value *ucontrol)
648 {
649 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
650 struct rt721_sdca_dmic_kctrl_priv *p =
651 (struct rt721_sdca_dmic_kctrl_priv *)kcontrol->private_value;
652 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
653 unsigned int boost_step = 0x0a00;
654 unsigned int vol_max = 0x1e00;
655 unsigned int gain_val[4];
656 unsigned int i, adc_vol_flag = 0, changed = 0;
657 unsigned int regvalue[4];
658 const unsigned int interval_offset = 0xc0;
659 int err;
660
661 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
662 adc_vol_flag = 1;
663
664 /* check all channels */
665 for (i = 0; i < p->count; i++) {
666 regmap_read(rt721->mbq_regmap, p->reg_base + i, ®value[i]);
667
668 gain_val[i] = ucontrol->value.integer.value[i];
669 if (gain_val[i] > p->max)
670 gain_val[i] = p->max;
671
672 if (!adc_vol_flag) /* boost gain */
673 gain_val[i] = gain_val[i] * boost_step;
674 else { /* ADC gain */
675 gain_val[i] = vol_max - ((p->max - gain_val[i]) * interval_offset);
676 gain_val[i] &= 0xffff;
677 }
678
679 if (regvalue[i] != gain_val[i])
680 changed = 1;
681 }
682
683 if (!changed)
684 return 0;
685
686 for (i = 0; i < p->count; i++) {
687 err = regmap_write(rt721->mbq_regmap, p->reg_base + i, gain_val[i]);
688 if (err < 0)
689 dev_err(&rt721->slave->dev, "%#08x can't be set\n", p->reg_base + i);
690 }
691
692 return changed;
693 }
694
695 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0);
696 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -1725, 75, 0);
697 static const DECLARE_TLV_DB_SCALE(boost_vol_tlv, 0, 1000, 0);
698 static const DECLARE_TLV_DB_SCALE(mic2_boost_vol_tlv, -200, 200, 0);
699
700 static const struct snd_kcontrol_new rt721_sdca_controls[] = {
701 /* Headphone playback settings */
702 SOC_DOUBLE_R_EXT_TLV("FU05 Playback Volume",
703 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
704 RT721_SDCA_CTL_FU_VOLUME, CH_L),
705 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
706 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0,
707 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv),
708 /* Headset mic capture settings */
709 SOC_DOUBLE_EXT("FU0F Capture Switch", SND_SOC_NOPM, 0, 1, 1, 0,
710 rt721_sdca_fu0f_capture_get, rt721_sdca_fu0f_capture_put),
711 SOC_DOUBLE_R_EXT_TLV("FU0F Capture Volume",
712 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
713 RT721_SDCA_CTL_FU_VOLUME, CH_L),
714 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
715 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x3f, 0,
716 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic_vol_tlv),
717 SOC_DOUBLE_R_EXT_TLV("FU33 Boost Volume",
718 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44,
719 RT721_SDCA_CTL_FU_CH_GAIN, CH_L),
720 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44,
721 RT721_SDCA_CTL_FU_CH_GAIN, CH_R), 1, 0x15, 0,
722 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, mic2_boost_vol_tlv),
723 /* AMP playback settings */
724 SOC_DOUBLE_R_EXT_TLV("FU06 Playback Volume",
725 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
726 RT721_SDCA_CTL_FU_VOLUME, CH_L),
727 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
728 RT721_SDCA_CTL_FU_VOLUME, CH_R), 0, 0x57, 0,
729 rt721_sdca_set_gain_get, rt721_sdca_set_gain_put, out_vol_tlv),
730 /* DMIC capture settings */
731 RT_SDCA_FU_CTRL("FU1E Capture Switch",
732 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
733 RT721_SDCA_CTL_FU_MUTE, CH_01), 1, 1, 4, rt721_sdca_fu_info,
734 rt721_sdca_fu1e_capture_get, rt721_sdca_fu1e_capture_put),
735 RT_SDCA_EXT_TLV("FU1E Capture Volume",
736 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
737 RT721_SDCA_CTL_FU_VOLUME, CH_01),
738 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put,
739 4, 0x3f, mic_vol_tlv, rt721_sdca_fu_info),
740 RT_SDCA_EXT_TLV("FU15 Boost Volume",
741 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15,
742 RT721_SDCA_CTL_FU_CH_GAIN, CH_01),
743 rt721_sdca_dmic_set_gain_get, rt721_sdca_dmic_set_gain_put,
744 4, 3, boost_vol_tlv, rt721_sdca_fu_info),
745 };
746
rt721_sdca_adc_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)747 static int rt721_sdca_adc_mux_get(struct snd_kcontrol *kcontrol,
748 struct snd_ctl_elem_value *ucontrol)
749 {
750 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol);
751 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
752 unsigned int val = 0, mask_sft, mask;
753
754 if (strstr(ucontrol->id.name, "ADC 09 Mux")) {
755 mask_sft = 12;
756 mask = 0x7;
757 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) {
758 mask_sft = 10;
759 mask = 0x3;
760 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) {
761 mask_sft = 8;
762 mask = 0x3;
763 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) {
764 mask_sft = 6;
765 mask = 0x3;
766 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) {
767 mask_sft = 4;
768 mask = 0x3;
769 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) {
770 mask_sft = 2;
771 mask = 0x3;
772 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) {
773 mask_sft = 0;
774 mask = 0x3;
775 } else
776 return -EINVAL;
777
778 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
779 RT721_HDA_LEGACY_MUX_CTL0, &val);
780
781 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & mask;
782
783 return 0;
784 }
785
rt721_sdca_adc_mux_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)786 static int rt721_sdca_adc_mux_put(struct snd_kcontrol *kcontrol,
787 struct snd_ctl_elem_value *ucontrol)
788 {
789 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol);
790 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_to_dapm(kcontrol);
791 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
792 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
793 unsigned int *item = ucontrol->value.enumerated.item;
794 unsigned int val, val2 = 0, change, mask_sft, mask;
795 unsigned int check;
796
797 if (item[0] >= e->items)
798 return -EINVAL;
799
800 if (strstr(ucontrol->id.name, "ADC 09 Mux")) {
801 mask_sft = 12;
802 mask = 0x7;
803 } else if (strstr(ucontrol->id.name, "ADC 08 R Mux")) {
804 mask_sft = 10;
805 mask = 0x3;
806 } else if (strstr(ucontrol->id.name, "ADC 08 L Mux")) {
807 mask_sft = 8;
808 mask = 0x3;
809 } else if (strstr(ucontrol->id.name, "ADC 10 R Mux")) {
810 mask_sft = 6;
811 mask = 0x3;
812 } else if (strstr(ucontrol->id.name, "ADC 10 L Mux")) {
813 mask_sft = 4;
814 mask = 0x3;
815 } else if (strstr(ucontrol->id.name, "ADC 07 R Mux")) {
816 mask_sft = 2;
817 mask = 0x3;
818 } else if (strstr(ucontrol->id.name, "ADC 07 L Mux")) {
819 mask_sft = 0;
820 mask = 0x3;
821 } else
822 return -EINVAL;
823
824 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
825 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
826 RT721_HDA_LEGACY_MUX_CTL0, &val2);
827
828 if (strstr(ucontrol->id.name, "ADC 09 Mux"))
829 val2 = (val2 >> mask_sft) & 0x7;
830 else
831 val2 = (val2 >> mask_sft) & 0x3;
832
833 if (val == val2)
834 change = 0;
835 else
836 change = 1;
837
838 if (change) {
839 rt_sdca_index_read(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
840 RT721_HDA_LEGACY_MUX_CTL0, &check);
841 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
842 RT721_HDA_LEGACY_MUX_CTL0, mask << mask_sft,
843 val << mask_sft);
844 }
845
846 snd_soc_dapm_mux_update_power(dapm, kcontrol,
847 item[0], e, NULL);
848
849 return change;
850 }
851
852 static const char * const adc09_mux_text[] = {
853 "MIC2",
854 "LINE1",
855 "LINE2",
856 };
857 static const char * const adc07_10_mux_text[] = {
858 "DMIC1 RE",
859 "DMIC1 FE",
860 "DMIC2 RE",
861 "DMIC2 FE",
862 };
863
864 static SOC_ENUM_SINGLE_DECL(
865 rt721_adc09_enum, SND_SOC_NOPM, 0, adc09_mux_text);
866 static SOC_ENUM_SINGLE_DECL(
867 rt721_dmic_enum, SND_SOC_NOPM, 0, adc07_10_mux_text);
868
869 static const struct snd_kcontrol_new rt721_sdca_adc09_mux =
870 SOC_DAPM_ENUM_EXT("ADC 09 Mux", rt721_adc09_enum,
871 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
872 static const struct snd_kcontrol_new rt721_sdca_adc08_r_mux =
873 SOC_DAPM_ENUM_EXT("ADC 08 R Mux", rt721_dmic_enum,
874 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
875 static const struct snd_kcontrol_new rt721_sdca_adc08_l_mux =
876 SOC_DAPM_ENUM_EXT("ADC 08 L Mux", rt721_dmic_enum,
877 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
878 static const struct snd_kcontrol_new rt721_sdca_adc10_r_mux =
879 SOC_DAPM_ENUM_EXT("ADC 10 R Mux", rt721_dmic_enum,
880 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
881 static const struct snd_kcontrol_new rt721_sdca_adc10_l_mux =
882 SOC_DAPM_ENUM_EXT("ADC 10 L Mux", rt721_dmic_enum,
883 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
884 static const struct snd_kcontrol_new rt721_sdca_adc07_r_mux =
885 SOC_DAPM_ENUM_EXT("ADC 07 R Mux", rt721_dmic_enum,
886 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
887 static const struct snd_kcontrol_new rt721_sdca_adc07_l_mux =
888 SOC_DAPM_ENUM_EXT("ADC 07 L Mux", rt721_dmic_enum,
889 rt721_sdca_adc_mux_get, rt721_sdca_adc_mux_put);
890
891
rt721_sdca_fu42_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)892 static int rt721_sdca_fu42_event(struct snd_soc_dapm_widget *w,
893 struct snd_kcontrol *kcontrol, int event)
894 {
895 struct snd_soc_component *component =
896 snd_soc_dapm_to_component(w->dapm);
897 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
898 unsigned char unmute = 0x0, mute = 0x1;
899
900 switch (event) {
901 case SND_SOC_DAPM_POST_PMU:
902 msleep(100);
903 regmap_write(rt721->regmap,
904 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
905 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute);
906 regmap_write(rt721->regmap,
907 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
908 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute);
909 break;
910 case SND_SOC_DAPM_PRE_PMD:
911 regmap_write(rt721->regmap,
912 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
913 RT721_SDCA_CTL_FU_MUTE, CH_L), mute);
914 regmap_write(rt721->regmap,
915 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
916 RT721_SDCA_CTL_FU_MUTE, CH_R), mute);
917 break;
918 }
919 return 0;
920 }
921
rt721_sdca_fu21_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)922 static int rt721_sdca_fu21_event(struct snd_soc_dapm_widget *w,
923 struct snd_kcontrol *kcontrol, int event)
924 {
925 struct snd_soc_component *component =
926 snd_soc_dapm_to_component(w->dapm);
927 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
928 unsigned char unmute = 0x0, mute = 0x1;
929
930 switch (event) {
931 case SND_SOC_DAPM_POST_PMU:
932 regmap_write(rt721->regmap,
933 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
934 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute);
935 regmap_write(rt721->regmap,
936 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
937 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute);
938 break;
939 case SND_SOC_DAPM_PRE_PMD:
940 regmap_write(rt721->regmap,
941 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
942 RT721_SDCA_CTL_FU_MUTE, CH_L), mute);
943 regmap_write(rt721->regmap,
944 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
945 RT721_SDCA_CTL_FU_MUTE, CH_R), mute);
946 break;
947 }
948 return 0;
949 }
950
rt721_sdca_fu23_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)951 static int rt721_sdca_fu23_event(struct snd_soc_dapm_widget *w,
952 struct snd_kcontrol *kcontrol, int event)
953 {
954 struct snd_soc_component *component =
955 snd_soc_dapm_to_component(w->dapm);
956 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
957 unsigned char unmute = 0x0, mute = 0x1;
958
959 switch (event) {
960 case SND_SOC_DAPM_POST_PMU:
961 regmap_write(rt721->regmap,
962 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
963 RT721_SDCA_CTL_FU_MUTE, CH_L), unmute);
964 regmap_write(rt721->regmap,
965 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
966 RT721_SDCA_CTL_FU_MUTE, CH_R), unmute);
967 break;
968 case SND_SOC_DAPM_PRE_PMD:
969 regmap_write(rt721->regmap,
970 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
971 RT721_SDCA_CTL_FU_MUTE, CH_L), mute);
972 regmap_write(rt721->regmap,
973 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
974 RT721_SDCA_CTL_FU_MUTE, CH_R), mute);
975 break;
976 }
977 return 0;
978 }
979
rt721_sdca_fu113_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)980 static int rt721_sdca_fu113_event(struct snd_soc_dapm_widget *w,
981 struct snd_kcontrol *kcontrol, int event)
982 {
983 struct snd_soc_component *component =
984 snd_soc_dapm_to_component(w->dapm);
985 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
986
987 switch (event) {
988 case SND_SOC_DAPM_POST_PMU:
989 rt721->fu1e_dapm_mute = false;
990 rt721_sdca_set_fu1e_capture_ctl(rt721);
991 break;
992 case SND_SOC_DAPM_PRE_PMD:
993 rt721->fu1e_dapm_mute = true;
994 rt721_sdca_set_fu1e_capture_ctl(rt721);
995 break;
996 }
997 return 0;
998 }
999
rt721_sdca_fu36_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1000 static int rt721_sdca_fu36_event(struct snd_soc_dapm_widget *w,
1001 struct snd_kcontrol *kcontrol, int event)
1002 {
1003 struct snd_soc_component *component =
1004 snd_soc_dapm_to_component(w->dapm);
1005 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1006
1007 switch (event) {
1008 case SND_SOC_DAPM_POST_PMU:
1009 rt721->fu0f_dapm_mute = false;
1010 rt721_sdca_set_fu0f_capture_ctl(rt721);
1011 break;
1012 case SND_SOC_DAPM_PRE_PMD:
1013 rt721->fu0f_dapm_mute = true;
1014 rt721_sdca_set_fu0f_capture_ctl(rt721);
1015 break;
1016 }
1017 return 0;
1018 }
1019
rt721_sdca_pde47_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1020 static int rt721_sdca_pde47_event(struct snd_soc_dapm_widget *w,
1021 struct snd_kcontrol *kcontrol, int event)
1022 {
1023 struct snd_soc_component *component =
1024 snd_soc_dapm_to_component(w->dapm);
1025 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1026 unsigned char ps0 = 0x0, ps3 = 0x3;
1027
1028 switch (event) {
1029 case SND_SOC_DAPM_POST_PMU:
1030 regmap_write(rt721->regmap,
1031 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40,
1032 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1033 break;
1034 case SND_SOC_DAPM_PRE_PMD:
1035 regmap_write(rt721->regmap,
1036 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40,
1037 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1038 break;
1039 }
1040 return 0;
1041 }
1042
rt721_sdca_pde41_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1043 static int rt721_sdca_pde41_event(struct snd_soc_dapm_widget *w,
1044 struct snd_kcontrol *kcontrol, int event)
1045 {
1046 struct snd_soc_component *component =
1047 snd_soc_dapm_to_component(w->dapm);
1048 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1049 unsigned char ps0 = 0x0, ps3 = 0x3;
1050
1051 switch (event) {
1052 case SND_SOC_DAPM_POST_PMU:
1053 regmap_write(rt721->regmap,
1054 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41,
1055 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1056 break;
1057 case SND_SOC_DAPM_PRE_PMD:
1058 regmap_write(rt721->regmap,
1059 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE41,
1060 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1061 break;
1062 }
1063 return 0;
1064 }
1065
rt721_sdca_pde11_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1066 static int rt721_sdca_pde11_event(struct snd_soc_dapm_widget *w,
1067 struct snd_kcontrol *kcontrol, int event)
1068 {
1069 struct snd_soc_component *component =
1070 snd_soc_dapm_to_component(w->dapm);
1071 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1072 unsigned char ps0 = 0x0, ps3 = 0x3;
1073
1074 switch (event) {
1075 case SND_SOC_DAPM_POST_PMU:
1076 regmap_write(rt721->regmap,
1077 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A,
1078 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1079 break;
1080 case SND_SOC_DAPM_PRE_PMD:
1081 regmap_write(rt721->regmap,
1082 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A,
1083 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1084 break;
1085 }
1086 return 0;
1087 }
1088
rt721_sdca_pde34_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1089 static int rt721_sdca_pde34_event(struct snd_soc_dapm_widget *w,
1090 struct snd_kcontrol *kcontrol, int event)
1091 {
1092 struct snd_soc_component *component =
1093 snd_soc_dapm_to_component(w->dapm);
1094 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1095 unsigned char ps0 = 0x0, ps3 = 0x3;
1096
1097 switch (event) {
1098 case SND_SOC_DAPM_POST_PMU:
1099 regmap_write(rt721->regmap,
1100 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12,
1101 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps0);
1102 break;
1103 case SND_SOC_DAPM_PRE_PMD:
1104 regmap_write(rt721->regmap,
1105 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12,
1106 RT721_SDCA_CTL_REQ_POWER_STATE, 0), ps3);
1107 break;
1108 }
1109 return 0;
1110 }
1111
1112 static const struct snd_soc_dapm_widget rt721_sdca_dapm_widgets[] = {
1113 SND_SOC_DAPM_OUTPUT("HP"),
1114 SND_SOC_DAPM_OUTPUT("SPK"),
1115 SND_SOC_DAPM_INPUT("MIC2"),
1116 SND_SOC_DAPM_INPUT("LINE1"),
1117 SND_SOC_DAPM_INPUT("LINE2"),
1118 SND_SOC_DAPM_INPUT("DMIC1_2"),
1119 SND_SOC_DAPM_INPUT("DMIC3_4"),
1120
1121 SND_SOC_DAPM_SUPPLY("PDE 41", SND_SOC_NOPM, 0, 0,
1122 rt721_sdca_pde41_event,
1123 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1124 SND_SOC_DAPM_SUPPLY("PDE 47", SND_SOC_NOPM, 0, 0,
1125 rt721_sdca_pde47_event,
1126 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1127 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
1128 rt721_sdca_pde11_event,
1129 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1130 SND_SOC_DAPM_SUPPLY("PDE 34", SND_SOC_NOPM, 0, 0,
1131 rt721_sdca_pde34_event,
1132 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1133
1134 SND_SOC_DAPM_DAC_E("FU 21", NULL, SND_SOC_NOPM, 0, 0,
1135 rt721_sdca_fu21_event,
1136 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1137 SND_SOC_DAPM_DAC_E("FU 23", NULL, SND_SOC_NOPM, 0, 0,
1138 rt721_sdca_fu23_event,
1139 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1140 SND_SOC_DAPM_DAC_E("FU 42", NULL, SND_SOC_NOPM, 0, 0,
1141 rt721_sdca_fu42_event,
1142 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1143 SND_SOC_DAPM_ADC_E("FU 36", NULL, SND_SOC_NOPM, 0, 0,
1144 rt721_sdca_fu36_event,
1145 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1146 SND_SOC_DAPM_ADC_E("FU 113", NULL, SND_SOC_NOPM, 0, 0,
1147 rt721_sdca_fu113_event,
1148 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1149 SND_SOC_DAPM_MUX("ADC 09 Mux", SND_SOC_NOPM, 0, 0,
1150 &rt721_sdca_adc09_mux),
1151 SND_SOC_DAPM_MUX("ADC 08 R Mux", SND_SOC_NOPM, 0, 0,
1152 &rt721_sdca_adc08_r_mux),
1153 SND_SOC_DAPM_MUX("ADC 08 L Mux", SND_SOC_NOPM, 0, 0,
1154 &rt721_sdca_adc08_l_mux),
1155 SND_SOC_DAPM_MUX("ADC 10 R Mux", SND_SOC_NOPM, 0, 0,
1156 &rt721_sdca_adc10_r_mux),
1157 SND_SOC_DAPM_MUX("ADC 10 L Mux", SND_SOC_NOPM, 0, 0,
1158 &rt721_sdca_adc10_l_mux),
1159 SND_SOC_DAPM_MUX("ADC 07 R Mux", SND_SOC_NOPM, 0, 0,
1160 &rt721_sdca_adc07_r_mux),
1161 SND_SOC_DAPM_MUX("ADC 07 L Mux", SND_SOC_NOPM, 0, 0,
1162 &rt721_sdca_adc07_l_mux),
1163
1164 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Headphone Playback", 0, SND_SOC_NOPM, 0, 0),
1165 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Headset Capture", 0, SND_SOC_NOPM, 0, 0),
1166 SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Speaker Playback", 0, SND_SOC_NOPM, 0, 0),
1167 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 DMic Capture", 0, SND_SOC_NOPM, 0, 0),
1168 };
1169
1170 static const struct snd_soc_dapm_route rt721_sdca_audio_map[] = {
1171 {"FU 42", NULL, "DP1RX"},
1172 {"FU 21", NULL, "DP3RX"},
1173 {"FU 23", NULL, "DP3RX"},
1174
1175 {"ADC 09 Mux", "MIC2", "MIC2"},
1176 {"ADC 09 Mux", "LINE1", "LINE1"},
1177 {"ADC 09 Mux", "LINE2", "LINE2"},
1178 {"ADC 07 R Mux", "DMIC1 RE", "DMIC1_2"},
1179 {"ADC 07 R Mux", "DMIC1 FE", "DMIC1_2"},
1180 {"ADC 07 R Mux", "DMIC2 RE", "DMIC3_4"},
1181 {"ADC 07 R Mux", "DMIC2 FE", "DMIC3_4"},
1182 {"ADC 07 L Mux", "DMIC1 RE", "DMIC1_2"},
1183 {"ADC 07 L Mux", "DMIC1 FE", "DMIC1_2"},
1184 {"ADC 07 L Mux", "DMIC2 RE", "DMIC3_4"},
1185 {"ADC 07 L Mux", "DMIC2 FE", "DMIC3_4"},
1186 {"ADC 08 R Mux", "DMIC1 RE", "DMIC1_2"},
1187 {"ADC 08 R Mux", "DMIC1 FE", "DMIC1_2"},
1188 {"ADC 08 R Mux", "DMIC2 RE", "DMIC3_4"},
1189 {"ADC 08 R Mux", "DMIC2 FE", "DMIC3_4"},
1190 {"ADC 08 L Mux", "DMIC1 RE", "DMIC1_2"},
1191 {"ADC 08 L Mux", "DMIC1 FE", "DMIC1_2"},
1192 {"ADC 08 L Mux", "DMIC2 RE", "DMIC3_4"},
1193 {"ADC 08 L Mux", "DMIC2 FE", "DMIC3_4"},
1194 {"ADC 10 R Mux", "DMIC1 RE", "DMIC1_2"},
1195 {"ADC 10 R Mux", "DMIC1 FE", "DMIC1_2"},
1196 {"ADC 10 R Mux", "DMIC2 RE", "DMIC3_4"},
1197 {"ADC 10 R Mux", "DMIC2 FE", "DMIC3_4"},
1198 {"ADC 10 L Mux", "DMIC1 RE", "DMIC1_2"},
1199 {"ADC 10 L Mux", "DMIC1 FE", "DMIC1_2"},
1200 {"ADC 10 L Mux", "DMIC2 RE", "DMIC3_4"},
1201 {"ADC 10 L Mux", "DMIC2 FE", "DMIC3_4"},
1202 {"FU 36", NULL, "PDE 34"},
1203 {"FU 36", NULL, "ADC 09 Mux"},
1204 {"FU 113", NULL, "PDE 11"},
1205 {"FU 113", NULL, "ADC 07 R Mux"},
1206 {"FU 113", NULL, "ADC 07 L Mux"},
1207 {"FU 113", NULL, "ADC 10 R Mux"},
1208 {"FU 113", NULL, "ADC 10 L Mux"},
1209 {"DP2TX", NULL, "FU 36"},
1210 {"DP6TX", NULL, "FU 113"},
1211
1212 {"HP", NULL, "PDE 47"},
1213 {"HP", NULL, "FU 42"},
1214 {"SPK", NULL, "PDE 41"},
1215 {"SPK", NULL, "FU 21"},
1216 {"SPK", NULL, "FU 23"},
1217 };
1218
rt721_sdca_parse_dt(struct rt721_sdca_priv * rt721,struct device * dev)1219 static int rt721_sdca_parse_dt(struct rt721_sdca_priv *rt721, struct device *dev)
1220 {
1221 device_property_read_u32(dev, "realtek,jd-src", &rt721->jd_src);
1222
1223 return 0;
1224 }
1225
rt721_sdca_probe(struct snd_soc_component * component)1226 static int rt721_sdca_probe(struct snd_soc_component *component)
1227 {
1228 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1229 int ret;
1230
1231 rt721_sdca_parse_dt(rt721, &rt721->slave->dev);
1232 rt721->component = component;
1233
1234 ret = pm_runtime_resume(component->dev);
1235 if (ret < 0 && ret != -EACCES)
1236 return ret;
1237
1238 return 0;
1239 }
1240
1241 static const struct snd_soc_component_driver soc_sdca_dev_rt721 = {
1242 .probe = rt721_sdca_probe,
1243 .controls = rt721_sdca_controls,
1244 .num_controls = ARRAY_SIZE(rt721_sdca_controls),
1245 .dapm_widgets = rt721_sdca_dapm_widgets,
1246 .num_dapm_widgets = ARRAY_SIZE(rt721_sdca_dapm_widgets),
1247 .dapm_routes = rt721_sdca_audio_map,
1248 .num_dapm_routes = ARRAY_SIZE(rt721_sdca_audio_map),
1249 .set_jack = rt721_sdca_set_jack_detect,
1250 .endianness = 1,
1251 };
1252
rt721_sdca_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)1253 static int rt721_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
1254 int direction)
1255 {
1256 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
1257
1258 return 0;
1259 }
1260
rt721_sdca_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1261 static void rt721_sdca_shutdown(struct snd_pcm_substream *substream,
1262 struct snd_soc_dai *dai)
1263 {
1264 snd_soc_dai_set_dma_data(dai, substream, NULL);
1265 }
1266
rt721_sdca_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)1267 static int rt721_sdca_pcm_hw_params(struct snd_pcm_substream *substream,
1268 struct snd_pcm_hw_params *params,
1269 struct snd_soc_dai *dai)
1270 {
1271 struct snd_soc_component *component = dai->component;
1272 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1273 struct sdw_stream_config stream_config = {0};
1274 struct sdw_port_config port_config;
1275 struct sdw_stream_runtime *sdw_stream;
1276 int retval, port;
1277 unsigned int sampling_rate;
1278
1279 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
1280 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
1281
1282 if (!sdw_stream)
1283 return -EINVAL;
1284
1285 if (!rt721->slave)
1286 return -EINVAL;
1287
1288 /*
1289 * RT721_AIF1 with port = 1 for headphone playback
1290 * RT721_AIF1 with port = 2 for headset-mic capture
1291 * RT721_AIF2 with port = 3 for speaker playback
1292 * RT721_AIF3 with port = 6 for digital-mic capture
1293 */
1294 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1295 if (dai->id == RT721_AIF1)
1296 port = 1;
1297 else if (dai->id == RT721_AIF2)
1298 port = 3;
1299 else
1300 return -EINVAL;
1301 } else {
1302 if (dai->id == RT721_AIF1)
1303 port = 2;
1304 else if (dai->id == RT721_AIF3)
1305 port = 6;
1306 else
1307 return -EINVAL;
1308 }
1309
1310 /* SoundWire specific configuration */
1311 snd_sdw_params_to_config(substream, params, &stream_config, &port_config);
1312 port_config.num = port;
1313
1314 retval = sdw_stream_add_slave(rt721->slave, &stream_config,
1315 &port_config, 1, sdw_stream);
1316 if (retval) {
1317 dev_err(dai->dev, "Unable to configure port\n");
1318 return retval;
1319 }
1320
1321 if (params_channels(params) > 16) {
1322 dev_err(component->dev, "Unsupported channels %d\n",
1323 params_channels(params));
1324 return -EINVAL;
1325 }
1326
1327 /* sampling rate configuration */
1328 switch (params_rate(params)) {
1329 case 8000:
1330 sampling_rate = RT721_SDCA_RATE_8000HZ;
1331 break;
1332 case 16000:
1333 sampling_rate = RT721_SDCA_RATE_16000HZ;
1334 break;
1335 case 24000:
1336 sampling_rate = RT721_SDCA_RATE_24000HZ;
1337 break;
1338 case 32000:
1339 sampling_rate = RT721_SDCA_RATE_32000HZ;
1340 break;
1341 case 44100:
1342 sampling_rate = RT721_SDCA_RATE_44100HZ;
1343 break;
1344 case 48000:
1345 sampling_rate = RT721_SDCA_RATE_48000HZ;
1346 break;
1347 case 96000:
1348 sampling_rate = RT721_SDCA_RATE_96000HZ;
1349 break;
1350 case 192000:
1351 sampling_rate = RT721_SDCA_RATE_192000HZ;
1352 break;
1353 case 384000:
1354 sampling_rate = RT721_SDCA_RATE_384000HZ;
1355 break;
1356 case 768000:
1357 sampling_rate = RT721_SDCA_RATE_768000HZ;
1358 break;
1359 default:
1360 dev_err(component->dev, "Rate %d is not supported\n",
1361 params_rate(params));
1362 return -EINVAL;
1363 }
1364
1365 /* set sampling frequency */
1366 if (dai->id == RT721_AIF1) {
1367 regmap_write(rt721->regmap,
1368 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01,
1369 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1370 regmap_write(rt721->regmap,
1371 SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11,
1372 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1373 }
1374
1375 if (dai->id == RT721_AIF2)
1376 regmap_write(rt721->regmap,
1377 SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31,
1378 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1379
1380 if (dai->id == RT721_AIF3)
1381 regmap_write(rt721->regmap,
1382 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_CS1F,
1383 RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), sampling_rate);
1384
1385 return 0;
1386 }
1387
rt721_sdca_pcm_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1388 static int rt721_sdca_pcm_hw_free(struct snd_pcm_substream *substream,
1389 struct snd_soc_dai *dai)
1390 {
1391 struct snd_soc_component *component = dai->component;
1392 struct rt721_sdca_priv *rt721 = snd_soc_component_get_drvdata(component);
1393 struct sdw_stream_runtime *sdw_stream =
1394 snd_soc_dai_get_dma_data(dai, substream);
1395
1396 if (!rt721->slave)
1397 return -EINVAL;
1398
1399 sdw_stream_remove_slave(rt721->slave, sdw_stream);
1400 return 0;
1401 }
1402
1403 #define RT721_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
1404 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
1405 #define RT721_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1406 SNDRV_PCM_FMTBIT_S24_LE)
1407
1408 static const struct snd_soc_dai_ops rt721_sdca_ops = {
1409 .hw_params = rt721_sdca_pcm_hw_params,
1410 .hw_free = rt721_sdca_pcm_hw_free,
1411 .set_stream = rt721_sdca_set_sdw_stream,
1412 .shutdown = rt721_sdca_shutdown,
1413 };
1414
1415 static struct snd_soc_dai_driver rt721_sdca_dai[] = {
1416 {
1417 .name = "rt721-sdca-aif1",
1418 .id = RT721_AIF1,
1419 .playback = {
1420 .stream_name = "DP1 Headphone Playback",
1421 .channels_min = 1,
1422 .channels_max = 2,
1423 .rates = RT721_STEREO_RATES,
1424 .formats = RT721_FORMATS,
1425 },
1426 .capture = {
1427 .stream_name = "DP2 Headset Capture",
1428 .channels_min = 1,
1429 .channels_max = 2,
1430 .rates = RT721_STEREO_RATES,
1431 .formats = RT721_FORMATS,
1432 },
1433 .ops = &rt721_sdca_ops,
1434 },
1435 {
1436 .name = "rt721-sdca-aif2",
1437 .id = RT721_AIF2,
1438 .playback = {
1439 .stream_name = "DP3 Speaker Playback",
1440 .channels_min = 1,
1441 .channels_max = 2,
1442 .rates = RT721_STEREO_RATES,
1443 .formats = RT721_FORMATS,
1444 },
1445 .ops = &rt721_sdca_ops,
1446 },
1447 {
1448 .name = "rt721-sdca-aif3",
1449 .id = RT721_AIF3,
1450 .capture = {
1451 .stream_name = "DP6 DMic Capture",
1452 .channels_min = 1,
1453 .channels_max = 4,
1454 .rates = RT721_STEREO_RATES,
1455 .formats = RT721_FORMATS,
1456 },
1457 .ops = &rt721_sdca_ops,
1458 }
1459 };
1460
rt721_sdca_init(struct device * dev,struct regmap * regmap,struct regmap * mbq_regmap,struct sdw_slave * slave)1461 int rt721_sdca_init(struct device *dev, struct regmap *regmap,
1462 struct regmap *mbq_regmap, struct sdw_slave *slave)
1463 {
1464 struct rt721_sdca_priv *rt721;
1465
1466 rt721 = devm_kzalloc(dev, sizeof(*rt721), GFP_KERNEL);
1467 if (!rt721)
1468 return -ENOMEM;
1469
1470 dev_set_drvdata(dev, rt721);
1471 rt721->slave = slave;
1472 rt721->regmap = regmap;
1473 rt721->mbq_regmap = mbq_regmap;
1474
1475 regcache_cache_only(rt721->regmap, true);
1476 regcache_cache_only(rt721->mbq_regmap, true);
1477
1478 mutex_init(&rt721->calibrate_mutex);
1479 mutex_init(&rt721->disable_irq_lock);
1480
1481 INIT_DELAYED_WORK(&rt721->jack_detect_work, rt721_sdca_jack_detect_handler);
1482 INIT_DELAYED_WORK(&rt721->jack_btn_check_work, rt721_sdca_btn_check_handler);
1483
1484 /*
1485 * Mark hw_init to false
1486 * HW init will be performed when device reports present
1487 */
1488 rt721->hw_init = false;
1489 rt721->first_hw_init = false;
1490 rt721->fu1e_dapm_mute = true;
1491 rt721->fu0f_dapm_mute = true;
1492 rt721->fu0f_mixer_l_mute = rt721->fu0f_mixer_r_mute = true;
1493 rt721->fu1e_mixer_mute[0] = rt721->fu1e_mixer_mute[1] =
1494 rt721->fu1e_mixer_mute[2] = rt721->fu1e_mixer_mute[3] = true;
1495
1496 return devm_snd_soc_register_component(dev,
1497 &soc_sdca_dev_rt721, rt721_sdca_dai, ARRAY_SIZE(rt721_sdca_dai));
1498 }
1499
rt721_sdca_reset(struct rt721_sdca_priv * rt721)1500 static void rt721_sdca_reset(struct rt721_sdca_priv *rt721)
1501 {
1502 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_VENDOR_REG,
1503 RT721_VD_HIDDEN_CTRL, RT721_HIDDEN_REG_SW_RESET,
1504 RT721_HIDDEN_REG_SW_RESET);
1505 rt_sdca_index_update_bits(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT,
1506 RT721_HDA_LEGACY_RESET_CTL, 0x1, 0x1);
1507 }
1508
rt721_sdca_io_init(struct device * dev,struct sdw_slave * slave)1509 int rt721_sdca_io_init(struct device *dev, struct sdw_slave *slave)
1510 {
1511 struct rt721_sdca_priv *rt721 = dev_get_drvdata(dev);
1512
1513 rt721->disable_irq = false;
1514
1515 if (rt721->hw_init)
1516 return 0;
1517
1518 regcache_cache_only(rt721->regmap, false);
1519 regcache_cache_only(rt721->mbq_regmap, false);
1520 if (rt721->first_hw_init) {
1521 regcache_cache_bypass(rt721->regmap, true);
1522 regcache_cache_bypass(rt721->mbq_regmap, true);
1523 } else {
1524 /*
1525 * PM runtime is only enabled when a Slave reports as Attached
1526 */
1527
1528 /* set autosuspend parameters */
1529 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
1530 pm_runtime_use_autosuspend(&slave->dev);
1531
1532 /* update count of parent 'active' children */
1533 pm_runtime_set_active(&slave->dev);
1534
1535 /* make sure the device does not suspend immediately */
1536 pm_runtime_mark_last_busy(&slave->dev);
1537
1538 pm_runtime_enable(&slave->dev);
1539 }
1540
1541 pm_runtime_get_noresume(&slave->dev);
1542
1543 if (!rt721->first_hw_init)
1544 rt721_sdca_reset(rt721);
1545
1546 rt721_sdca_dmic_preset(rt721);
1547 rt721_sdca_amp_preset(rt721);
1548 rt721_sdca_jack_preset(rt721);
1549
1550 if (rt721->hs_jack && (!rt721->first_hw_init))
1551 rt721_sdca_jack_init(rt721);
1552
1553 if (rt721->first_hw_init) {
1554 regcache_cache_bypass(rt721->regmap, false);
1555 regcache_mark_dirty(rt721->regmap);
1556 regcache_cache_bypass(rt721->mbq_regmap, false);
1557 regcache_mark_dirty(rt721->mbq_regmap);
1558 } else
1559 rt721->first_hw_init = true;
1560
1561 /* Mark Slave initialization complete */
1562 rt721->hw_init = true;
1563
1564 pm_runtime_put_autosuspend(&slave->dev);
1565
1566 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
1567 return 0;
1568 }
1569
1570 MODULE_DESCRIPTION("ASoC RT721 SDCA SDW driver");
1571 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
1572 MODULE_LICENSE("GPL");
1573