xref: /linux/sound/soc/codecs/rt712-sdca-sdw.c (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt712-sdca-sdw.c -- rt712 SDCA ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8 
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/mod_devicetable.h>
12 #include <linux/module.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/soundwire/sdw_registers.h>
15 #include "rt712-sdca.h"
16 #include "rt712-sdca-sdw.h"
17 
rt712_sdca_readable_register(struct device * dev,unsigned int reg)18 static bool rt712_sdca_readable_register(struct device *dev, unsigned int reg)
19 {
20 	switch (reg) {
21 	case 0x201a ... 0x201f:
22 	case 0x2029 ... 0x202a:
23 	case 0x202d ... 0x2034:
24 	case 0x2230 ... 0x2232:
25 	case 0x2f01 ... 0x2f0a:
26 	case 0x2f35 ... 0x2f36:
27 	case 0x2f50:
28 	case 0x2f54:
29 	case 0x2f58 ... 0x2f5d:
30 	case 0x3201:
31 	case 0x320c:
32 	case 0x3301 ... 0x3303:
33 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_GE49, RT712_SDCA_CTL_SELECTED_MODE, 0):
34 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_GE49, RT712_SDCA_CTL_DETECTED_MODE, 0):
35 	case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ...
36 		SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
37 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
38 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
39 	case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
40 	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
41 	case RT712_BUF_ADDR_HID1 ... RT712_BUF_ADDR_HID2:
42 		return true;
43 	default:
44 		return false;
45 	}
46 }
47 
rt712_sdca_volatile_register(struct device * dev,unsigned int reg)48 static bool rt712_sdca_volatile_register(struct device *dev, unsigned int reg)
49 {
50 	switch (reg) {
51 	case 0x201b:
52 	case 0x201c:
53 	case 0x201d:
54 	case 0x201f:
55 	case 0x202d ... 0x202f:
56 	case 0x2230:
57 	case 0x2f01:
58 	case 0x2f35:
59 	case 0x320c:
60 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_GE49, RT712_SDCA_CTL_DETECTED_MODE, 0):
61 	case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ...
62 		SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
63 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
64 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
65 	case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
66 	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
67 	case RT712_BUF_ADDR_HID1 ... RT712_BUF_ADDR_HID2:
68 		return true;
69 	default:
70 		return false;
71 	}
72 }
73 
rt712_sdca_mbq_readable_register(struct device * dev,unsigned int reg)74 static bool rt712_sdca_mbq_readable_register(struct device *dev, unsigned int reg)
75 {
76 	switch (reg) {
77 	case 0x2000000 ... 0x200008e:
78 	case 0x5300000 ... 0x530000e:
79 	case 0x5400000 ... 0x540000e:
80 	case 0x5600000 ... 0x5600008:
81 	case 0x5700000 ... 0x570000d:
82 	case 0x5800000 ... 0x5800021:
83 	case 0x5900000 ... 0x5900028:
84 	case 0x5a00000 ... 0x5a00009:
85 	case 0x5b00000 ... 0x5b00051:
86 	case 0x5c00000 ... 0x5c0009a:
87 	case 0x5d00000 ... 0x5d00009:
88 	case 0x5f00000 ... 0x5f00030:
89 	case 0x6100000 ... 0x61000f1:
90 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_VOLUME, CH_01):
91 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_VOLUME, CH_02):
92 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_VOLUME, CH_01):
93 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_VOLUME, CH_02):
94 	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_01):
95 	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_02):
96 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01):
97 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02):
98 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03):
99 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04):
100 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01):
101 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02):
102 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03):
103 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04):
104 		return true;
105 	default:
106 		return false;
107 	}
108 }
109 
rt712_sdca_mbq_volatile_register(struct device * dev,unsigned int reg)110 static bool rt712_sdca_mbq_volatile_register(struct device *dev, unsigned int reg)
111 {
112 	switch (reg) {
113 	case 0x2000000:
114 	case 0x200001a:
115 	case 0x2000020:
116 	case 0x2000024:
117 	case 0x2000030:
118 	case 0x2000046:
119 	case 0x200008a:
120 	case 0x5800000:
121 	case 0x5800001:
122 	case 0x6100008:
123 		return true;
124 	default:
125 		return false;
126 	}
127 }
128 
129 static const struct regmap_config rt712_sdca_regmap = {
130 	.reg_bits = 32,
131 	.val_bits = 8,
132 	.readable_reg = rt712_sdca_readable_register,
133 	.volatile_reg = rt712_sdca_volatile_register,
134 	.max_register = 0x44ffffff,
135 	.reg_defaults = rt712_sdca_reg_defaults,
136 	.num_reg_defaults = ARRAY_SIZE(rt712_sdca_reg_defaults),
137 	.cache_type = REGCACHE_MAPLE,
138 	.use_single_read = true,
139 	.use_single_write = true,
140 };
141 
142 static const struct regmap_config rt712_sdca_mbq_regmap = {
143 	.name = "sdw-mbq",
144 	.reg_bits = 32,
145 	.val_bits = 16,
146 	.readable_reg = rt712_sdca_mbq_readable_register,
147 	.volatile_reg = rt712_sdca_mbq_volatile_register,
148 	.max_register = 0x41000312,
149 	.reg_defaults = rt712_sdca_mbq_defaults,
150 	.num_reg_defaults = ARRAY_SIZE(rt712_sdca_mbq_defaults),
151 	.cache_type = REGCACHE_MAPLE,
152 	.use_single_read = true,
153 	.use_single_write = true,
154 };
155 
rt712_sdca_update_status(struct sdw_slave * slave,enum sdw_slave_status status)156 static int rt712_sdca_update_status(struct sdw_slave *slave,
157 				enum sdw_slave_status status)
158 {
159 	struct rt712_sdca_priv *rt712 = dev_get_drvdata(&slave->dev);
160 
161 	if (status == SDW_SLAVE_UNATTACHED)
162 		rt712->hw_init = false;
163 
164 	if (status == SDW_SLAVE_ATTACHED) {
165 		if (rt712->hs_jack) {
166 			/*
167 			 * Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then
168 			 * if the device attached again, we will need to set the setting back.
169 			 * It could avoid losing the jack detection interrupt.
170 			 * This also could sync with the cache value as the rt712_sdca_jack_init set.
171 			 */
172 			sdw_write_no_pm(rt712->slave, SDW_SCP_SDCA_INTMASK1,
173 				SDW_SCP_SDCA_INTMASK_SDCA_0);
174 			sdw_write_no_pm(rt712->slave, SDW_SCP_SDCA_INTMASK2,
175 				SDW_SCP_SDCA_INTMASK_SDCA_8);
176 		}
177 	}
178 
179 	/*
180 	 * Perform initialization only if slave status is present and
181 	 * hw_init flag is false
182 	 */
183 	if (rt712->hw_init || status != SDW_SLAVE_ATTACHED)
184 		return 0;
185 
186 	/* perform I/O transfers required for Slave initialization */
187 	return rt712_sdca_io_init(&slave->dev, slave);
188 }
189 
rt712_sdca_read_prop(struct sdw_slave * slave)190 static int rt712_sdca_read_prop(struct sdw_slave *slave)
191 {
192 	struct sdw_slave_prop *prop = &slave->prop;
193 	int nval;
194 	int i, j;
195 	u32 bit;
196 	unsigned long addr;
197 	struct sdw_dpn_prop *dpn;
198 
199 	sdw_slave_read_prop(slave);
200 
201 	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
202 	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
203 
204 	prop->paging_support = true;
205 
206 	/* first we need to allocate memory for set bits in port lists */
207 	prop->source_ports = BIT(8) | BIT(4); /* BITMAP: 100010000 */
208 	prop->sink_ports = BIT(3) | BIT(1); /* BITMAP:  00001010 */
209 
210 	nval = hweight32(prop->source_ports);
211 	prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
212 		sizeof(*prop->src_dpn_prop), GFP_KERNEL);
213 	if (!prop->src_dpn_prop)
214 		return -ENOMEM;
215 
216 	i = 0;
217 	dpn = prop->src_dpn_prop;
218 	addr = prop->source_ports;
219 	for_each_set_bit(bit, &addr, 32) {
220 		dpn[i].num = bit;
221 		dpn[i].type = SDW_DPN_FULL;
222 		dpn[i].simple_ch_prep_sm = true;
223 		dpn[i].ch_prep_timeout = 10;
224 		i++;
225 	}
226 
227 	/* do this again for sink now */
228 	nval = hweight32(prop->sink_ports);
229 	prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
230 		sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
231 	if (!prop->sink_dpn_prop)
232 		return -ENOMEM;
233 
234 	j = 0;
235 	dpn = prop->sink_dpn_prop;
236 	addr = prop->sink_ports;
237 	for_each_set_bit(bit, &addr, 32) {
238 		dpn[j].num = bit;
239 		dpn[j].type = SDW_DPN_FULL;
240 		dpn[j].simple_ch_prep_sm = true;
241 		dpn[j].ch_prep_timeout = 10;
242 		j++;
243 	}
244 
245 	/* set the timeout values */
246 	prop->clk_stop_timeout = 1380;
247 
248 	/* wake-up event */
249 	prop->wake_capable = 1;
250 
251 	return 0;
252 }
253 
rt712_sdca_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)254 static int rt712_sdca_interrupt_callback(struct sdw_slave *slave,
255 					struct sdw_slave_intr_status *status)
256 {
257 	struct rt712_sdca_priv *rt712 = dev_get_drvdata(&slave->dev);
258 	int ret, stat;
259 	int count = 0, retry = 3;
260 	unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0;
261 
262 	dev_dbg(&slave->dev,
263 		"%s control_port_stat=%x, sdca_cascade=%x", __func__,
264 		status->control_port, status->sdca_cascade);
265 
266 	if (cancel_delayed_work_sync(&rt712->jack_detect_work)) {
267 		dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__);
268 		/* avoid the HID owner doesn't change to device */
269 		if (rt712->scp_sdca_stat2)
270 			scp_sdca_stat2 = rt712->scp_sdca_stat2;
271 	}
272 
273 	/*
274 	 * The critical section below intentionally protects a rather large piece of code.
275 	 * We don't want to allow the system suspend to disable an interrupt while we are
276 	 * processing it, which could be problematic given the quirky SoundWire interrupt
277 	 * scheme. We do want however to prevent new workqueues from being scheduled if
278 	 * the disable_irq flag was set during system suspend.
279 	 */
280 	mutex_lock(&rt712->disable_irq_lock);
281 
282 	ret = sdw_read_no_pm(rt712->slave, SDW_SCP_SDCA_INT1);
283 	if (ret < 0)
284 		goto io_error;
285 	rt712->scp_sdca_stat1 = ret;
286 	ret = sdw_read_no_pm(rt712->slave, SDW_SCP_SDCA_INT2);
287 	if (ret < 0)
288 		goto io_error;
289 	rt712->scp_sdca_stat2 = ret;
290 	if (scp_sdca_stat2)
291 		rt712->scp_sdca_stat2 |= scp_sdca_stat2;
292 
293 	do {
294 		/* clear flag */
295 		ret = sdw_read_no_pm(rt712->slave, SDW_SCP_SDCA_INT1);
296 		if (ret < 0)
297 			goto io_error;
298 		if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) {
299 			ret = sdw_write_no_pm(rt712->slave, SDW_SCP_SDCA_INT1,
300 						SDW_SCP_SDCA_INTMASK_SDCA_0);
301 			if (ret < 0)
302 				goto io_error;
303 		}
304 		ret = sdw_read_no_pm(rt712->slave, SDW_SCP_SDCA_INT2);
305 		if (ret < 0)
306 			goto io_error;
307 		if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) {
308 			ret = sdw_write_no_pm(rt712->slave, SDW_SCP_SDCA_INT2,
309 						SDW_SCP_SDCA_INTMASK_SDCA_8);
310 			if (ret < 0)
311 				goto io_error;
312 		}
313 
314 		/* check if flag clear or not */
315 		ret = sdw_read_no_pm(rt712->slave, SDW_DP0_INT);
316 		if (ret < 0)
317 			goto io_error;
318 		sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
319 
320 		ret = sdw_read_no_pm(rt712->slave, SDW_SCP_SDCA_INT1);
321 		if (ret < 0)
322 			goto io_error;
323 		scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0;
324 
325 		ret = sdw_read_no_pm(rt712->slave, SDW_SCP_SDCA_INT2);
326 		if (ret < 0)
327 			goto io_error;
328 		scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8;
329 
330 		stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade;
331 
332 		count++;
333 	} while (stat != 0 && count < retry);
334 
335 	if (stat)
336 		dev_warn(&slave->dev,
337 			"%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
338 			rt712->scp_sdca_stat1, rt712->scp_sdca_stat2);
339 
340 	if (status->sdca_cascade && !rt712->disable_irq)
341 		mod_delayed_work(system_power_efficient_wq,
342 			&rt712->jack_detect_work, msecs_to_jiffies(30));
343 
344 	mutex_unlock(&rt712->disable_irq_lock);
345 
346 	return 0;
347 
348 io_error:
349 	mutex_unlock(&rt712->disable_irq_lock);
350 	pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
351 	return ret;
352 }
353 
354 static const struct sdw_slave_ops rt712_sdca_slave_ops = {
355 	.read_prop = rt712_sdca_read_prop,
356 	.interrupt_callback = rt712_sdca_interrupt_callback,
357 	.update_status = rt712_sdca_update_status,
358 };
359 
rt712_sdca_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)360 static int rt712_sdca_sdw_probe(struct sdw_slave *slave,
361 				const struct sdw_device_id *id)
362 {
363 	struct regmap *regmap, *mbq_regmap;
364 
365 	/* Regmap Initialization */
366 	mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt712_sdca_mbq_regmap);
367 	if (IS_ERR(mbq_regmap))
368 		return PTR_ERR(mbq_regmap);
369 
370 	regmap = devm_regmap_init_sdw(slave, &rt712_sdca_regmap);
371 	if (IS_ERR(regmap))
372 		return PTR_ERR(regmap);
373 
374 	return rt712_sdca_init(&slave->dev, regmap, mbq_regmap, slave);
375 }
376 
rt712_sdca_sdw_remove(struct sdw_slave * slave)377 static int rt712_sdca_sdw_remove(struct sdw_slave *slave)
378 {
379 	struct rt712_sdca_priv *rt712 = dev_get_drvdata(&slave->dev);
380 
381 	if (rt712->hw_init) {
382 		cancel_delayed_work_sync(&rt712->jack_detect_work);
383 		cancel_delayed_work_sync(&rt712->jack_btn_check_work);
384 	}
385 
386 	pm_runtime_disable(&slave->dev);
387 
388 	mutex_destroy(&rt712->calibrate_mutex);
389 	mutex_destroy(&rt712->disable_irq_lock);
390 
391 	return 0;
392 }
393 
394 static const struct sdw_device_id rt712_sdca_id[] = {
395 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x712, 0x3, 0x1, 0),
396 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x713, 0x3, 0x1, 0),
397 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x716, 0x3, 0x1, 0),
398 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x717, 0x3, 0x1, 0),
399 	{},
400 };
401 MODULE_DEVICE_TABLE(sdw, rt712_sdca_id);
402 
rt712_sdca_dev_suspend(struct device * dev)403 static int __maybe_unused rt712_sdca_dev_suspend(struct device *dev)
404 {
405 	struct rt712_sdca_priv *rt712 = dev_get_drvdata(dev);
406 
407 	if (!rt712->hw_init)
408 		return 0;
409 
410 	cancel_delayed_work_sync(&rt712->jack_detect_work);
411 	cancel_delayed_work_sync(&rt712->jack_btn_check_work);
412 
413 	regcache_cache_only(rt712->regmap, true);
414 	regcache_cache_only(rt712->mbq_regmap, true);
415 
416 	return 0;
417 }
418 
rt712_sdca_dev_system_suspend(struct device * dev)419 static int __maybe_unused rt712_sdca_dev_system_suspend(struct device *dev)
420 {
421 	struct rt712_sdca_priv *rt712_sdca = dev_get_drvdata(dev);
422 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
423 	int ret1, ret2;
424 
425 	if (!rt712_sdca->hw_init)
426 		return 0;
427 
428 	/*
429 	 * prevent new interrupts from being handled after the
430 	 * deferred work completes and before the parent disables
431 	 * interrupts on the link
432 	 */
433 	mutex_lock(&rt712_sdca->disable_irq_lock);
434 	rt712_sdca->disable_irq = true;
435 	ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1,
436 				SDW_SCP_SDCA_INTMASK_SDCA_0, 0);
437 	ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2,
438 				SDW_SCP_SDCA_INTMASK_SDCA_8, 0);
439 	mutex_unlock(&rt712_sdca->disable_irq_lock);
440 
441 	if (ret1 < 0 || ret2 < 0) {
442 		/* log but don't prevent suspend from happening */
443 		dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__);
444 	}
445 
446 	return rt712_sdca_dev_suspend(dev);
447 }
448 
449 #define RT712_PROBE_TIMEOUT 5000
450 
rt712_sdca_dev_resume(struct device * dev)451 static int __maybe_unused rt712_sdca_dev_resume(struct device *dev)
452 {
453 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
454 	struct rt712_sdca_priv *rt712 = dev_get_drvdata(dev);
455 	unsigned long time;
456 
457 	if (!rt712->first_hw_init)
458 		return 0;
459 
460 	if (!slave->unattach_request) {
461 		mutex_lock(&rt712->disable_irq_lock);
462 		if (rt712->disable_irq == true) {
463 
464 			sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_0);
465 			sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8);
466 			rt712->disable_irq = false;
467 		}
468 		mutex_unlock(&rt712->disable_irq_lock);
469 		goto regmap_sync;
470 	}
471 
472 	time = wait_for_completion_timeout(&slave->initialization_complete,
473 				msecs_to_jiffies(RT712_PROBE_TIMEOUT));
474 	if (!time) {
475 		dev_err(&slave->dev, "%s: Initialization not complete, timed out\n", __func__);
476 		sdw_show_ping_status(slave->bus, true);
477 
478 		return -ETIMEDOUT;
479 	}
480 
481 regmap_sync:
482 	slave->unattach_request = 0;
483 	regcache_cache_only(rt712->regmap, false);
484 	regcache_sync(rt712->regmap);
485 	regcache_cache_only(rt712->mbq_regmap, false);
486 	regcache_sync(rt712->mbq_regmap);
487 	return 0;
488 }
489 
490 static const struct dev_pm_ops rt712_sdca_pm = {
491 	SET_SYSTEM_SLEEP_PM_OPS(rt712_sdca_dev_system_suspend, rt712_sdca_dev_resume)
492 	SET_RUNTIME_PM_OPS(rt712_sdca_dev_suspend, rt712_sdca_dev_resume, NULL)
493 };
494 
495 static struct sdw_driver rt712_sdca_sdw_driver = {
496 	.driver = {
497 		.name = "rt712-sdca",
498 		.pm = &rt712_sdca_pm,
499 	},
500 	.probe = rt712_sdca_sdw_probe,
501 	.remove = rt712_sdca_sdw_remove,
502 	.ops = &rt712_sdca_slave_ops,
503 	.id_table = rt712_sdca_id,
504 };
505 module_sdw_driver(rt712_sdca_sdw_driver);
506 
507 MODULE_DESCRIPTION("ASoC RT712 SDCA SDW driver");
508 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
509 MODULE_LICENSE("GPL");
510