1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt712-sdca-dmic.c -- rt712 SDCA DMIC ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/module.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/soundwire/sdw_registers.h>
12 #include <linux/slab.h>
13 #include <sound/core.h>
14 #include <sound/pcm.h>
15 #include <sound/pcm_params.h>
16 #include <sound/sdw.h>
17 #include <sound/tlv.h>
18 #include "rt712-sdca.h"
19 #include "rt712-sdca-dmic.h"
20
rt712_sdca_dmic_readable_register(struct device * dev,unsigned int reg)21 static bool rt712_sdca_dmic_readable_register(struct device *dev, unsigned int reg)
22 {
23 switch (reg) {
24 case 0x201a ... 0x201f:
25 case 0x2029 ... 0x202a:
26 case 0x202d ... 0x2034:
27 case 0x2230 ... 0x2232:
28 case 0x2f01 ... 0x2f0a:
29 case 0x2f35 ... 0x2f36:
30 case 0x2f52:
31 case 0x2f58 ... 0x2f59:
32 case 0x3201:
33 case 0x320c:
34 return true;
35 default:
36 return false;
37 }
38 }
39
rt712_sdca_dmic_volatile_register(struct device * dev,unsigned int reg)40 static bool rt712_sdca_dmic_volatile_register(struct device *dev, unsigned int reg)
41 {
42 switch (reg) {
43 case 0x201b:
44 case 0x201c:
45 case 0x201d:
46 case 0x201f:
47 case 0x202d ... 0x202f:
48 case 0x2230:
49 case 0x2f01:
50 case 0x2f35:
51 case 0x320c:
52 return true;
53 default:
54 return false;
55 }
56 }
57
rt712_sdca_dmic_mbq_readable_register(struct device * dev,unsigned int reg)58 static bool rt712_sdca_dmic_mbq_readable_register(struct device *dev, unsigned int reg)
59 {
60 switch (reg) {
61 case 0x2000000 ... 0x200008e:
62 case 0x5300000 ... 0x530000e:
63 case 0x5400000 ... 0x540000e:
64 case 0x5600000 ... 0x5600008:
65 case 0x5700000 ... 0x570000d:
66 case 0x5800000 ... 0x5800021:
67 case 0x5900000 ... 0x5900028:
68 case 0x5a00000 ... 0x5a00009:
69 case 0x5b00000 ... 0x5b00051:
70 case 0x5c00000 ... 0x5c0009a:
71 case 0x5d00000 ... 0x5d00009:
72 case 0x5f00000 ... 0x5f00030:
73 case 0x6100000 ... 0x6100068:
74 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01):
75 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02):
76 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03):
77 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04):
78 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01):
79 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02):
80 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03):
81 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04):
82 return true;
83 default:
84 return false;
85 }
86 }
87
rt712_sdca_dmic_mbq_volatile_register(struct device * dev,unsigned int reg)88 static bool rt712_sdca_dmic_mbq_volatile_register(struct device *dev, unsigned int reg)
89 {
90 switch (reg) {
91 case 0x2000000:
92 case 0x200001a:
93 case 0x2000024:
94 case 0x2000046:
95 case 0x200008a:
96 case 0x5800000:
97 case 0x5800001:
98 case 0x6100008:
99 return true;
100 default:
101 return false;
102 }
103 }
104
105 static const struct regmap_config rt712_sdca_dmic_regmap = {
106 .reg_bits = 32,
107 .val_bits = 8,
108 .readable_reg = rt712_sdca_dmic_readable_register,
109 .volatile_reg = rt712_sdca_dmic_volatile_register,
110 .max_register = 0x40981300,
111 .reg_defaults = rt712_sdca_dmic_reg_defaults,
112 .num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_reg_defaults),
113 .cache_type = REGCACHE_MAPLE,
114 .use_single_read = true,
115 .use_single_write = true,
116 };
117
118 static const struct regmap_config rt712_sdca_dmic_mbq_regmap = {
119 .name = "sdw-mbq",
120 .reg_bits = 32,
121 .val_bits = 16,
122 .readable_reg = rt712_sdca_dmic_mbq_readable_register,
123 .volatile_reg = rt712_sdca_dmic_mbq_volatile_register,
124 .max_register = 0x40800f14,
125 .reg_defaults = rt712_sdca_dmic_mbq_defaults,
126 .num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_mbq_defaults),
127 .cache_type = REGCACHE_MAPLE,
128 .use_single_read = true,
129 .use_single_write = true,
130 };
131
rt712_sdca_dmic_index_write(struct rt712_sdca_dmic_priv * rt712,unsigned int nid,unsigned int reg,unsigned int value)132 static int rt712_sdca_dmic_index_write(struct rt712_sdca_dmic_priv *rt712,
133 unsigned int nid, unsigned int reg, unsigned int value)
134 {
135 int ret;
136 struct regmap *regmap = rt712->mbq_regmap;
137 unsigned int addr = (nid << 20) | reg;
138
139 ret = regmap_write(regmap, addr, value);
140 if (ret < 0)
141 dev_err(&rt712->slave->dev,
142 "%s: Failed to set private value: %06x <= %04x ret=%d\n",
143 __func__, addr, value, ret);
144
145 return ret;
146 }
147
rt712_sdca_dmic_index_read(struct rt712_sdca_dmic_priv * rt712,unsigned int nid,unsigned int reg,unsigned int * value)148 static int rt712_sdca_dmic_index_read(struct rt712_sdca_dmic_priv *rt712,
149 unsigned int nid, unsigned int reg, unsigned int *value)
150 {
151 int ret;
152 struct regmap *regmap = rt712->mbq_regmap;
153 unsigned int addr = (nid << 20) | reg;
154
155 ret = regmap_read(regmap, addr, value);
156 if (ret < 0)
157 dev_err(&rt712->slave->dev,
158 "%s: Failed to get private value: %06x => %04x ret=%d\n",
159 __func__, addr, *value, ret);
160
161 return ret;
162 }
163
rt712_sdca_dmic_index_update_bits(struct rt712_sdca_dmic_priv * rt712,unsigned int nid,unsigned int reg,unsigned int mask,unsigned int val)164 static int rt712_sdca_dmic_index_update_bits(struct rt712_sdca_dmic_priv *rt712,
165 unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val)
166 {
167 unsigned int tmp;
168 int ret;
169
170 ret = rt712_sdca_dmic_index_read(rt712, nid, reg, &tmp);
171 if (ret < 0)
172 return ret;
173
174 set_mask_bits(&tmp, mask, val);
175 return rt712_sdca_dmic_index_write(rt712, nid, reg, tmp);
176 }
177
rt712_sdca_dmic_io_init(struct device * dev,struct sdw_slave * slave)178 static int rt712_sdca_dmic_io_init(struct device *dev, struct sdw_slave *slave)
179 {
180 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
181
182 if (rt712->hw_init)
183 return 0;
184
185 regcache_cache_only(rt712->regmap, false);
186 regcache_cache_only(rt712->mbq_regmap, false);
187 if (rt712->first_hw_init) {
188 regcache_cache_bypass(rt712->regmap, true);
189 regcache_cache_bypass(rt712->mbq_regmap, true);
190 } else {
191 /*
192 * PM runtime status is marked as 'active' only when a Slave reports as Attached
193 */
194
195 /* update count of parent 'active' children */
196 pm_runtime_set_active(&slave->dev);
197 }
198
199 pm_runtime_get_noresume(&slave->dev);
200
201 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
202 RT712_ADC0A_08_PDE_FLOAT_CTL, 0x1112);
203 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
204 RT712_ADC0B_11_PDE_FLOAT_CTL, 0x1111);
205 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
206 RT712_DMIC1_2_PDE_FLOAT_CTL, 0x1111);
207 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
208 RT712_I2S_IN_OUT_PDE_FLOAT_CTL, 0x1155);
209 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
210 RT712_DMIC_ENT_FLOAT_CTL, 0x2626);
211 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
212 RT712_ADC_ENT_FLOAT_CTL, 0x1e19);
213 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
214 RT712_DMIC_GAIN_ENT_FLOAT_CTL0, 0x1515);
215 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
216 RT712_ADC_VOL_CH_FLOAT_CTL2, 0x0304);
217 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
218 RT712_DMIC_GAIN_ENT_FLOAT_CTL2, 0x0304);
219 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
220 RT712_HDA_LEGACY_CONFIG_CTL0, 0x0050);
221 regmap_write(rt712->regmap,
222 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_IT26, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x01);
223 rt712_sdca_dmic_index_write(rt712, RT712_ULTRA_SOUND_DET,
224 RT712_ULTRA_SOUND_DETECTOR6, 0x3200);
225 regmap_write(rt712->regmap, RT712_RC_CAL, 0x23);
226 regmap_write(rt712->regmap, 0x2f52, 0x00);
227
228 if (rt712->first_hw_init) {
229 regcache_cache_bypass(rt712->regmap, false);
230 regcache_mark_dirty(rt712->regmap);
231 regcache_cache_bypass(rt712->mbq_regmap, false);
232 regcache_mark_dirty(rt712->mbq_regmap);
233 } else
234 rt712->first_hw_init = true;
235
236 /* Mark Slave initialization complete */
237 rt712->hw_init = true;
238
239 pm_runtime_put_autosuspend(&slave->dev);
240
241 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
242 return 0;
243 }
244
rt712_sdca_dmic_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)245 static int rt712_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
246 struct snd_ctl_elem_value *ucontrol)
247 {
248 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
249 struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
250 struct rt712_sdca_dmic_kctrl_priv *p =
251 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
252 unsigned int regvalue, ctl, i;
253 unsigned int adc_vol_flag = 0;
254 const unsigned int interval_offset = 0xc0;
255
256 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
257 adc_vol_flag = 1;
258
259 /* check all channels */
260 for (i = 0; i < p->count; i++) {
261 regmap_read(rt712->mbq_regmap, p->reg_base + i, ®value);
262
263 if (!adc_vol_flag) /* boost gain */
264 ctl = regvalue / 0x0a00;
265 else /* ADC gain */
266 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset);
267
268 ucontrol->value.integer.value[i] = ctl;
269 }
270
271 return 0;
272 }
273
rt712_sdca_dmic_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)274 static int rt712_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
275 struct snd_ctl_elem_value *ucontrol)
276 {
277 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
278 struct rt712_sdca_dmic_kctrl_priv *p =
279 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
280 struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
281 unsigned int gain_val[4];
282 unsigned int i, adc_vol_flag = 0, changed = 0;
283 unsigned int regvalue[4];
284 const unsigned int interval_offset = 0xc0;
285 int err;
286
287 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
288 adc_vol_flag = 1;
289
290 /* check all channels */
291 for (i = 0; i < p->count; i++) {
292 regmap_read(rt712->mbq_regmap, p->reg_base + i, ®value[i]);
293
294 gain_val[i] = ucontrol->value.integer.value[i];
295 if (gain_val[i] > p->max)
296 gain_val[i] = p->max;
297
298 if (!adc_vol_flag) /* boost gain */
299 gain_val[i] = gain_val[i] * 0x0a00;
300 else { /* ADC gain */
301 gain_val[i] = 0x1e00 - ((p->max - gain_val[i]) * interval_offset);
302 gain_val[i] &= 0xffff;
303 }
304
305 if (regvalue[i] != gain_val[i])
306 changed = 1;
307 }
308
309 if (!changed)
310 return 0;
311
312 for (i = 0; i < p->count; i++) {
313 err = regmap_write(rt712->mbq_regmap, p->reg_base + i, gain_val[i]);
314 if (err < 0)
315 dev_err(&rt712->slave->dev, "%s: 0x%08x can't be set\n",
316 __func__, p->reg_base + i);
317 }
318
319 return changed;
320 }
321
rt712_sdca_set_fu1e_capture_ctl(struct rt712_sdca_dmic_priv * rt712)322 static int rt712_sdca_set_fu1e_capture_ctl(struct rt712_sdca_dmic_priv *rt712)
323 {
324 int err, i;
325 unsigned int ch_mute;
326
327 for (i = 0; i < ARRAY_SIZE(rt712->fu1e_mixer_mute); i++) {
328 ch_mute = (rt712->fu1e_dapm_mute || rt712->fu1e_mixer_mute[i]) ? 0x01 : 0x00;
329 err = regmap_write(rt712->regmap,
330 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E,
331 RT712_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
332 if (err < 0)
333 return err;
334 }
335
336 return 0;
337 }
338
rt712_sdca_dmic_fu1e_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)339 static int rt712_sdca_dmic_fu1e_capture_get(struct snd_kcontrol *kcontrol,
340 struct snd_ctl_elem_value *ucontrol)
341 {
342 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
343 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
344 struct rt712_sdca_dmic_kctrl_priv *p =
345 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
346 unsigned int i;
347
348 for (i = 0; i < p->count; i++)
349 ucontrol->value.integer.value[i] = !rt712->fu1e_mixer_mute[i];
350
351 return 0;
352 }
353
rt712_sdca_dmic_fu1e_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)354 static int rt712_sdca_dmic_fu1e_capture_put(struct snd_kcontrol *kcontrol,
355 struct snd_ctl_elem_value *ucontrol)
356 {
357 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
358 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
359 struct rt712_sdca_dmic_kctrl_priv *p =
360 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
361 int err, changed = 0, i;
362
363 for (i = 0; i < p->count; i++) {
364 if (rt712->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
365 changed = 1;
366 rt712->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
367 }
368
369 err = rt712_sdca_set_fu1e_capture_ctl(rt712);
370 if (err < 0)
371 return err;
372
373 return changed;
374 }
375
rt712_sdca_fu_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)376 static int rt712_sdca_fu_info(struct snd_kcontrol *kcontrol,
377 struct snd_ctl_elem_info *uinfo)
378 {
379 struct rt712_sdca_dmic_kctrl_priv *p =
380 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
381
382 if (p->max == 1)
383 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
384 else
385 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
386 uinfo->count = p->count;
387 uinfo->value.integer.min = 0;
388 uinfo->value.integer.max = p->max;
389 return 0;
390 }
391
392 #define RT712_SDCA_PR_VALUE(xreg_base, xcount, xmax, xinvert) \
393 ((unsigned long)&(struct rt712_sdca_dmic_kctrl_priv) \
394 {.reg_base = xreg_base, .count = xcount, .max = xmax, \
395 .invert = xinvert})
396
397 #define RT712_SDCA_FU_CTRL(xname, reg_base, xmax, xinvert, xcount) \
398 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
399 .info = rt712_sdca_fu_info, \
400 .get = rt712_sdca_dmic_fu1e_capture_get, \
401 .put = rt712_sdca_dmic_fu1e_capture_put, \
402 .private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, xinvert)}
403
404 #define RT712_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
405 xhandler_put, xcount, xmax, tlv_array) \
406 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
407 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
408 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
409 .tlv.p = (tlv_array), \
410 .info = rt712_sdca_fu_info, \
411 .get = xhandler_get, .put = xhandler_put, \
412 .private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, 0) }
413
414 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
415 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
416
417 static const struct snd_kcontrol_new rt712_sdca_dmic_snd_controls[] = {
418 RT712_SDCA_FU_CTRL("FU1E Capture Switch",
419 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01),
420 1, 1, 4),
421 RT712_SDCA_EXT_TLV("FU1E Capture Volume",
422 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01),
423 rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 0x3f, in_vol_tlv),
424 RT712_SDCA_EXT_TLV("FU15 Boost Volume",
425 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01),
426 rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 3, mic_vol_tlv),
427 };
428
rt712_sdca_dmic_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)429 static int rt712_sdca_dmic_mux_get(struct snd_kcontrol *kcontrol,
430 struct snd_ctl_elem_value *ucontrol)
431 {
432 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol);
433 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
434 unsigned int val = 0, mask_sft;
435
436 if (strstr(ucontrol->id.name, "ADC 25 Mux"))
437 mask_sft = 8;
438 else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
439 mask_sft = 4;
440 else
441 return -EINVAL;
442
443 rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
444 RT712_HDA_LEGACY_MUX_CTL0, &val);
445
446 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & 0x7;
447
448 return 0;
449 }
450
rt712_sdca_dmic_mux_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)451 static int rt712_sdca_dmic_mux_put(struct snd_kcontrol *kcontrol,
452 struct snd_ctl_elem_value *ucontrol)
453 {
454 struct snd_soc_component *component = snd_soc_dapm_kcontrol_to_component(kcontrol);
455 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_to_dapm(kcontrol);
456 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
457 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
458 unsigned int *item = ucontrol->value.enumerated.item;
459 unsigned int val, val2 = 0, change, mask_sft;
460
461 if (item[0] >= e->items)
462 return -EINVAL;
463
464 if (strstr(ucontrol->id.name, "ADC 25 Mux"))
465 mask_sft = 8;
466 else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
467 mask_sft = 4;
468 else
469 return -EINVAL;
470
471 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
472
473 rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
474 RT712_HDA_LEGACY_MUX_CTL0, &val2);
475 val2 = (0x7 << mask_sft) & val2;
476
477 if (val == val2)
478 change = 0;
479 else
480 change = 1;
481
482 if (change)
483 rt712_sdca_dmic_index_update_bits(rt712, RT712_VENDOR_HDA_CTL,
484 RT712_HDA_LEGACY_MUX_CTL0, 0x7 << mask_sft,
485 val << mask_sft);
486
487 snd_soc_dapm_mux_update_power(dapm, kcontrol,
488 item[0], e, NULL);
489
490 return change;
491 }
492
493 static const char * const adc_mux_text[] = {
494 "DMIC1",
495 "DMIC2",
496 };
497
498 static SOC_ENUM_SINGLE_DECL(
499 rt712_adc25_enum, SND_SOC_NOPM, 0, adc_mux_text);
500
501 static SOC_ENUM_SINGLE_DECL(
502 rt712_adc26_enum, SND_SOC_NOPM, 0, adc_mux_text);
503
504 static const struct snd_kcontrol_new rt712_sdca_dmic_adc25_mux =
505 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt712_adc25_enum,
506 rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
507
508 static const struct snd_kcontrol_new rt712_sdca_dmic_adc26_mux =
509 SOC_DAPM_ENUM_EXT("ADC 26 Mux", rt712_adc26_enum,
510 rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
511
rt712_sdca_dmic_fu1e_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)512 static int rt712_sdca_dmic_fu1e_event(struct snd_soc_dapm_widget *w,
513 struct snd_kcontrol *kcontrol, int event)
514 {
515 struct snd_soc_component *component =
516 snd_soc_dapm_to_component(w->dapm);
517 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
518
519 switch (event) {
520 case SND_SOC_DAPM_POST_PMU:
521 rt712->fu1e_dapm_mute = false;
522 rt712_sdca_set_fu1e_capture_ctl(rt712);
523 break;
524 case SND_SOC_DAPM_PRE_PMD:
525 rt712->fu1e_dapm_mute = true;
526 rt712_sdca_set_fu1e_capture_ctl(rt712);
527 break;
528 }
529 return 0;
530 }
531
rt712_sdca_dmic_pde11_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)532 static int rt712_sdca_dmic_pde11_event(struct snd_soc_dapm_widget *w,
533 struct snd_kcontrol *kcontrol, int event)
534 {
535 struct snd_soc_component *component =
536 snd_soc_dapm_to_component(w->dapm);
537 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
538 unsigned char ps0 = 0x0, ps3 = 0x3;
539
540 switch (event) {
541 case SND_SOC_DAPM_POST_PMU:
542 regmap_write(rt712->regmap,
543 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
544 RT712_SDCA_CTL_REQ_POWER_STATE, 0),
545 ps0);
546 break;
547 case SND_SOC_DAPM_PRE_PMD:
548 regmap_write(rt712->regmap,
549 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
550 RT712_SDCA_CTL_REQ_POWER_STATE, 0),
551 ps3);
552 break;
553 }
554 return 0;
555 }
556
557 static const struct snd_soc_dapm_widget rt712_sdca_dmic_dapm_widgets[] = {
558 SND_SOC_DAPM_INPUT("DMIC1"),
559 SND_SOC_DAPM_INPUT("DMIC2"),
560
561 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
562 rt712_sdca_dmic_pde11_event,
563 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
564
565 SND_SOC_DAPM_ADC_E("FU 1E", NULL, SND_SOC_NOPM, 0, 0,
566 rt712_sdca_dmic_fu1e_event,
567 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
568 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
569 &rt712_sdca_dmic_adc25_mux),
570 SND_SOC_DAPM_MUX("ADC 26 Mux", SND_SOC_NOPM, 0, 0,
571 &rt712_sdca_dmic_adc26_mux),
572
573 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Capture", 0, SND_SOC_NOPM, 0, 0),
574 };
575
576 static const struct snd_soc_dapm_route rt712_sdca_dmic_audio_map[] = {
577 {"DP2TX", NULL, "FU 1E"},
578
579 {"FU 1E", NULL, "PDE 11"},
580 {"FU 1E", NULL, "ADC 25 Mux"},
581 {"FU 1E", NULL, "ADC 26 Mux"},
582 {"ADC 25 Mux", "DMIC1", "DMIC1"},
583 {"ADC 25 Mux", "DMIC2", "DMIC2"},
584 {"ADC 26 Mux", "DMIC1", "DMIC1"},
585 {"ADC 26 Mux", "DMIC2", "DMIC2"},
586 };
587
rt712_sdca_dmic_probe(struct snd_soc_component * component)588 static int rt712_sdca_dmic_probe(struct snd_soc_component *component)
589 {
590 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
591 int ret;
592
593 rt712->component = component;
594
595 if (!rt712->first_hw_init)
596 return 0;
597
598 ret = pm_runtime_resume(component->dev);
599 if (ret < 0 && ret != -EACCES)
600 return ret;
601
602 return 0;
603 }
604
605 static const struct snd_soc_component_driver soc_sdca_dev_rt712_dmic = {
606 .probe = rt712_sdca_dmic_probe,
607 .controls = rt712_sdca_dmic_snd_controls,
608 .num_controls = ARRAY_SIZE(rt712_sdca_dmic_snd_controls),
609 .dapm_widgets = rt712_sdca_dmic_dapm_widgets,
610 .num_dapm_widgets = ARRAY_SIZE(rt712_sdca_dmic_dapm_widgets),
611 .dapm_routes = rt712_sdca_dmic_audio_map,
612 .num_dapm_routes = ARRAY_SIZE(rt712_sdca_dmic_audio_map),
613 .endianness = 1,
614 };
615
rt712_sdca_dmic_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)616 static int rt712_sdca_dmic_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
617 int direction)
618 {
619 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
620
621 return 0;
622 }
623
rt712_sdca_dmic_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)624 static void rt712_sdca_dmic_shutdown(struct snd_pcm_substream *substream,
625 struct snd_soc_dai *dai)
626 {
627 snd_soc_dai_set_dma_data(dai, substream, NULL);
628 }
629
rt712_sdca_dmic_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)630 static int rt712_sdca_dmic_hw_params(struct snd_pcm_substream *substream,
631 struct snd_pcm_hw_params *params,
632 struct snd_soc_dai *dai)
633 {
634 struct snd_soc_component *component = dai->component;
635 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
636 struct sdw_stream_config stream_config = {0};
637 struct sdw_port_config port_config;
638 struct sdw_stream_runtime *sdw_stream;
639 int retval;
640 unsigned int sampling_rate;
641
642 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
643 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
644
645 if (!sdw_stream)
646 return -EINVAL;
647
648 if (!rt712->slave)
649 return -EINVAL;
650
651 /* SoundWire specific configuration */
652 snd_sdw_params_to_config(substream, params, &stream_config, &port_config);
653 port_config.num = 2;
654
655 retval = sdw_stream_add_slave(rt712->slave, &stream_config,
656 &port_config, 1, sdw_stream);
657 if (retval) {
658 dev_err(dai->dev, "%s: Unable to configure port\n", __func__);
659 return retval;
660 }
661
662 if (params_channels(params) > 4) {
663 dev_err(component->dev, "%s: Unsupported channels %d\n",
664 __func__, params_channels(params));
665 return -EINVAL;
666 }
667
668 /* sampling rate configuration */
669 switch (params_rate(params)) {
670 case 16000:
671 sampling_rate = RT712_SDCA_RATE_16000HZ;
672 break;
673 case 32000:
674 sampling_rate = RT712_SDCA_RATE_32000HZ;
675 break;
676 case 44100:
677 sampling_rate = RT712_SDCA_RATE_44100HZ;
678 break;
679 case 48000:
680 sampling_rate = RT712_SDCA_RATE_48000HZ;
681 break;
682 case 96000:
683 sampling_rate = RT712_SDCA_RATE_96000HZ;
684 break;
685 case 192000:
686 sampling_rate = RT712_SDCA_RATE_192000HZ;
687 break;
688 default:
689 dev_err(component->dev, "%s: Rate %d is not supported\n",
690 __func__, params_rate(params));
691 return -EINVAL;
692 }
693
694 /* set sampling frequency */
695 regmap_write(rt712->regmap,
696 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
697 sampling_rate);
698 regmap_write(rt712->regmap,
699 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
700 sampling_rate);
701
702 return 0;
703 }
704
rt712_sdca_dmic_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)705 static int rt712_sdca_dmic_hw_free(struct snd_pcm_substream *substream,
706 struct snd_soc_dai *dai)
707 {
708 struct snd_soc_component *component = dai->component;
709 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
710 struct sdw_stream_runtime *sdw_stream =
711 snd_soc_dai_get_dma_data(dai, substream);
712
713 if (!rt712->slave)
714 return -EINVAL;
715
716 sdw_stream_remove_slave(rt712->slave, sdw_stream);
717 return 0;
718 }
719
720 #define RT712_STEREO_RATES (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
721 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
722 #define RT712_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
723 SNDRV_PCM_FMTBIT_S24_LE)
724
725 static const struct snd_soc_dai_ops rt712_sdca_dmic_ops = {
726 .hw_params = rt712_sdca_dmic_hw_params,
727 .hw_free = rt712_sdca_dmic_hw_free,
728 .set_stream = rt712_sdca_dmic_set_sdw_stream,
729 .shutdown = rt712_sdca_dmic_shutdown,
730 };
731
732 static struct snd_soc_dai_driver rt712_sdca_dmic_dai[] = {
733 {
734 .name = "rt712-sdca-dmic-aif1",
735 .id = RT712_AIF1,
736 .capture = {
737 .stream_name = "DP2 Capture",
738 .channels_min = 1,
739 .channels_max = 4,
740 .rates = RT712_STEREO_RATES,
741 .formats = RT712_FORMATS,
742 },
743 .ops = &rt712_sdca_dmic_ops,
744 },
745 };
746
rt712_sdca_dmic_init(struct device * dev,struct regmap * regmap,struct regmap * mbq_regmap,struct sdw_slave * slave)747 static int rt712_sdca_dmic_init(struct device *dev, struct regmap *regmap,
748 struct regmap *mbq_regmap, struct sdw_slave *slave)
749 {
750 struct rt712_sdca_dmic_priv *rt712;
751 int ret;
752
753 rt712 = devm_kzalloc(dev, sizeof(*rt712), GFP_KERNEL);
754 if (!rt712)
755 return -ENOMEM;
756
757 dev_set_drvdata(dev, rt712);
758 rt712->slave = slave;
759 rt712->regmap = regmap;
760 rt712->mbq_regmap = mbq_regmap;
761
762 regcache_cache_only(rt712->regmap, true);
763 regcache_cache_only(rt712->mbq_regmap, true);
764
765 /*
766 * Mark hw_init to false
767 * HW init will be performed when device reports present
768 */
769 rt712->hw_init = false;
770 rt712->first_hw_init = false;
771 rt712->fu1e_dapm_mute = true;
772 rt712->fu1e_mixer_mute[0] = rt712->fu1e_mixer_mute[1] =
773 rt712->fu1e_mixer_mute[2] = rt712->fu1e_mixer_mute[3] = true;
774
775 ret = devm_snd_soc_register_component(dev,
776 &soc_sdca_dev_rt712_dmic,
777 rt712_sdca_dmic_dai,
778 ARRAY_SIZE(rt712_sdca_dmic_dai));
779 if (ret < 0)
780 return ret;
781
782 /* set autosuspend parameters */
783 pm_runtime_set_autosuspend_delay(dev, 3000);
784 pm_runtime_use_autosuspend(dev);
785
786 /* make sure the device does not suspend immediately */
787 pm_runtime_mark_last_busy(dev);
788
789 pm_runtime_enable(dev);
790
791 /* important note: the device is NOT tagged as 'active' and will remain
792 * 'suspended' until the hardware is enumerated/initialized. This is required
793 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently
794 * fail with -EACCESS because of race conditions between card creation and enumeration
795 */
796
797 dev_dbg(dev, "%s\n", __func__);
798
799 return 0;
800 }
801
802
rt712_sdca_dmic_update_status(struct sdw_slave * slave,enum sdw_slave_status status)803 static int rt712_sdca_dmic_update_status(struct sdw_slave *slave,
804 enum sdw_slave_status status)
805 {
806 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(&slave->dev);
807
808 if (status == SDW_SLAVE_UNATTACHED)
809 rt712->hw_init = false;
810
811 /*
812 * Perform initialization only if slave status is present and
813 * hw_init flag is false
814 */
815 if (rt712->hw_init || status != SDW_SLAVE_ATTACHED)
816 return 0;
817
818 /* perform I/O transfers required for Slave initialization */
819 return rt712_sdca_dmic_io_init(&slave->dev, slave);
820 }
821
rt712_sdca_dmic_read_prop(struct sdw_slave * slave)822 static int rt712_sdca_dmic_read_prop(struct sdw_slave *slave)
823 {
824 struct sdw_slave_prop *prop = &slave->prop;
825 int nval, i;
826 u32 bit;
827 unsigned long addr;
828 struct sdw_dpn_prop *dpn;
829
830 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
831 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
832
833 prop->paging_support = true;
834
835 /* first we need to allocate memory for set bits in port lists */
836 prop->source_ports = BIT(2); /* BITMAP: 00000100 */
837 prop->sink_ports = 0;
838
839 nval = hweight32(prop->source_ports);
840 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
841 sizeof(*prop->src_dpn_prop), GFP_KERNEL);
842 if (!prop->src_dpn_prop)
843 return -ENOMEM;
844
845 i = 0;
846 dpn = prop->src_dpn_prop;
847 addr = prop->source_ports;
848 for_each_set_bit(bit, &addr, 32) {
849 dpn[i].num = bit;
850 dpn[i].type = SDW_DPN_FULL;
851 dpn[i].simple_ch_prep_sm = true;
852 dpn[i].ch_prep_timeout = 10;
853 i++;
854 }
855
856 /* set the timeout values */
857 prop->clk_stop_timeout = 200;
858
859 /* wake-up event */
860 prop->wake_capable = 1;
861
862 return 0;
863 }
864
865 static const struct sdw_device_id rt712_sdca_dmic_id[] = {
866 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1712, 0x3, 0x1, 0),
867 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1713, 0x3, 0x1, 0),
868 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1716, 0x3, 0x1, 0),
869 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1717, 0x3, 0x1, 0),
870 {},
871 };
872 MODULE_DEVICE_TABLE(sdw, rt712_sdca_dmic_id);
873
rt712_sdca_dmic_dev_suspend(struct device * dev)874 static int rt712_sdca_dmic_dev_suspend(struct device *dev)
875 {
876 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
877
878 if (!rt712->hw_init)
879 return 0;
880
881 regcache_cache_only(rt712->regmap, true);
882 regcache_cache_only(rt712->mbq_regmap, true);
883
884 return 0;
885 }
886
rt712_sdca_dmic_dev_system_suspend(struct device * dev)887 static int rt712_sdca_dmic_dev_system_suspend(struct device *dev)
888 {
889 struct rt712_sdca_dmic_priv *rt712_sdca = dev_get_drvdata(dev);
890
891 if (!rt712_sdca->hw_init)
892 return 0;
893
894 return rt712_sdca_dmic_dev_suspend(dev);
895 }
896
897 #define RT712_PROBE_TIMEOUT 5000
898
rt712_sdca_dmic_dev_resume(struct device * dev)899 static int rt712_sdca_dmic_dev_resume(struct device *dev)
900 {
901 struct sdw_slave *slave = dev_to_sdw_dev(dev);
902 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
903 int ret;
904
905 if (!rt712->first_hw_init)
906 return 0;
907
908 ret = sdw_slave_wait_for_init(slave, RT712_PROBE_TIMEOUT);
909 if (ret) {
910 sdw_show_ping_status(slave->bus, true);
911 return ret;
912 }
913
914 regcache_cache_only(rt712->regmap, false);
915 ret = regcache_sync(rt712->regmap);
916 if (ret)
917 goto err_sync;
918
919 regcache_cache_only(rt712->mbq_regmap, false);
920 ret = regcache_sync(rt712->mbq_regmap);
921 if (ret)
922 goto err_sync;
923
924 return 0;
925
926 err_sync:
927 regcache_cache_only(rt712->regmap, true);
928 regcache_cache_only(rt712->mbq_regmap, true);
929 regcache_mark_dirty(rt712->regmap);
930 regcache_mark_dirty(rt712->mbq_regmap);
931 return ret;
932 }
933
934 static const struct dev_pm_ops rt712_sdca_dmic_pm = {
935 SYSTEM_SLEEP_PM_OPS(rt712_sdca_dmic_dev_system_suspend, rt712_sdca_dmic_dev_resume)
936 RUNTIME_PM_OPS(rt712_sdca_dmic_dev_suspend, rt712_sdca_dmic_dev_resume, NULL)
937 };
938
939
940 static const struct sdw_slave_ops rt712_sdca_dmic_slave_ops = {
941 .read_prop = rt712_sdca_dmic_read_prop,
942 .update_status = rt712_sdca_dmic_update_status,
943 };
944
rt712_sdca_dmic_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)945 static int rt712_sdca_dmic_sdw_probe(struct sdw_slave *slave,
946 const struct sdw_device_id *id)
947 {
948 struct regmap *regmap, *mbq_regmap;
949
950 /* Regmap Initialization */
951 mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt712_sdca_dmic_mbq_regmap);
952 if (IS_ERR(mbq_regmap))
953 return PTR_ERR(mbq_regmap);
954
955 regmap = devm_regmap_init_sdw(slave, &rt712_sdca_dmic_regmap);
956 if (IS_ERR(regmap))
957 return PTR_ERR(regmap);
958
959 return rt712_sdca_dmic_init(&slave->dev, regmap, mbq_regmap, slave);
960 }
961
rt712_sdca_dmic_sdw_remove(struct sdw_slave * slave)962 static void rt712_sdca_dmic_sdw_remove(struct sdw_slave *slave)
963 {
964 pm_runtime_disable(&slave->dev);
965 }
966
967 static struct sdw_driver rt712_sdca_dmic_sdw_driver = {
968 .driver = {
969 .name = "rt712-sdca-dmic",
970 .pm = pm_ptr(&rt712_sdca_dmic_pm),
971 },
972 .probe = rt712_sdca_dmic_sdw_probe,
973 .remove = rt712_sdca_dmic_sdw_remove,
974 .ops = &rt712_sdca_dmic_slave_ops,
975 .id_table = rt712_sdca_dmic_id,
976 };
977 module_sdw_driver(rt712_sdca_dmic_sdw_driver);
978
979 MODULE_DESCRIPTION("ASoC RT712 SDCA DMIC SDW driver");
980 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
981 MODULE_LICENSE("GPL");
982