1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt712-sdca-dmic.c -- rt712 SDCA DMIC ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8
9 #include <linux/module.h>
10 #include <linux/mod_devicetable.h>
11 #include <linux/pm_runtime.h>
12 #include <linux/soundwire/sdw_registers.h>
13 #include <linux/slab.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <sound/pcm_params.h>
17 #include <sound/tlv.h>
18 #include "rt712-sdca.h"
19 #include "rt712-sdca-dmic.h"
20
rt712_sdca_dmic_readable_register(struct device * dev,unsigned int reg)21 static bool rt712_sdca_dmic_readable_register(struct device *dev, unsigned int reg)
22 {
23 switch (reg) {
24 case 0x201a ... 0x201f:
25 case 0x2029 ... 0x202a:
26 case 0x202d ... 0x2034:
27 case 0x2230 ... 0x2232:
28 case 0x2f01 ... 0x2f0a:
29 case 0x2f35 ... 0x2f36:
30 case 0x2f52:
31 case 0x2f58 ... 0x2f59:
32 case 0x3201:
33 case 0x320c:
34 return true;
35 default:
36 return false;
37 }
38 }
39
rt712_sdca_dmic_volatile_register(struct device * dev,unsigned int reg)40 static bool rt712_sdca_dmic_volatile_register(struct device *dev, unsigned int reg)
41 {
42 switch (reg) {
43 case 0x201b:
44 case 0x201c:
45 case 0x201d:
46 case 0x201f:
47 case 0x202d ... 0x202f:
48 case 0x2230:
49 case 0x2f01:
50 case 0x2f35:
51 case 0x320c:
52 return true;
53 default:
54 return false;
55 }
56 }
57
rt712_sdca_dmic_mbq_readable_register(struct device * dev,unsigned int reg)58 static bool rt712_sdca_dmic_mbq_readable_register(struct device *dev, unsigned int reg)
59 {
60 switch (reg) {
61 case 0x2000000 ... 0x200008e:
62 case 0x5300000 ... 0x530000e:
63 case 0x5400000 ... 0x540000e:
64 case 0x5600000 ... 0x5600008:
65 case 0x5700000 ... 0x570000d:
66 case 0x5800000 ... 0x5800021:
67 case 0x5900000 ... 0x5900028:
68 case 0x5a00000 ... 0x5a00009:
69 case 0x5b00000 ... 0x5b00051:
70 case 0x5c00000 ... 0x5c0009a:
71 case 0x5d00000 ... 0x5d00009:
72 case 0x5f00000 ... 0x5f00030:
73 case 0x6100000 ... 0x6100068:
74 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01):
75 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02):
76 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03):
77 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04):
78 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01):
79 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02):
80 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03):
81 case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04):
82 return true;
83 default:
84 return false;
85 }
86 }
87
rt712_sdca_dmic_mbq_volatile_register(struct device * dev,unsigned int reg)88 static bool rt712_sdca_dmic_mbq_volatile_register(struct device *dev, unsigned int reg)
89 {
90 switch (reg) {
91 case 0x2000000:
92 case 0x200001a:
93 case 0x2000024:
94 case 0x2000046:
95 case 0x200008a:
96 case 0x5800000:
97 case 0x5800001:
98 case 0x6100008:
99 return true;
100 default:
101 return false;
102 }
103 }
104
105 static const struct regmap_config rt712_sdca_dmic_regmap = {
106 .reg_bits = 32,
107 .val_bits = 8,
108 .readable_reg = rt712_sdca_dmic_readable_register,
109 .volatile_reg = rt712_sdca_dmic_volatile_register,
110 .max_register = 0x40981300,
111 .reg_defaults = rt712_sdca_dmic_reg_defaults,
112 .num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_reg_defaults),
113 .cache_type = REGCACHE_MAPLE,
114 .use_single_read = true,
115 .use_single_write = true,
116 };
117
118 static const struct regmap_config rt712_sdca_dmic_mbq_regmap = {
119 .name = "sdw-mbq",
120 .reg_bits = 32,
121 .val_bits = 16,
122 .readable_reg = rt712_sdca_dmic_mbq_readable_register,
123 .volatile_reg = rt712_sdca_dmic_mbq_volatile_register,
124 .max_register = 0x40800f14,
125 .reg_defaults = rt712_sdca_dmic_mbq_defaults,
126 .num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_mbq_defaults),
127 .cache_type = REGCACHE_MAPLE,
128 .use_single_read = true,
129 .use_single_write = true,
130 };
131
rt712_sdca_dmic_index_write(struct rt712_sdca_dmic_priv * rt712,unsigned int nid,unsigned int reg,unsigned int value)132 static int rt712_sdca_dmic_index_write(struct rt712_sdca_dmic_priv *rt712,
133 unsigned int nid, unsigned int reg, unsigned int value)
134 {
135 int ret;
136 struct regmap *regmap = rt712->mbq_regmap;
137 unsigned int addr = (nid << 20) | reg;
138
139 ret = regmap_write(regmap, addr, value);
140 if (ret < 0)
141 dev_err(&rt712->slave->dev,
142 "%s: Failed to set private value: %06x <= %04x ret=%d\n",
143 __func__, addr, value, ret);
144
145 return ret;
146 }
147
rt712_sdca_dmic_index_read(struct rt712_sdca_dmic_priv * rt712,unsigned int nid,unsigned int reg,unsigned int * value)148 static int rt712_sdca_dmic_index_read(struct rt712_sdca_dmic_priv *rt712,
149 unsigned int nid, unsigned int reg, unsigned int *value)
150 {
151 int ret;
152 struct regmap *regmap = rt712->mbq_regmap;
153 unsigned int addr = (nid << 20) | reg;
154
155 ret = regmap_read(regmap, addr, value);
156 if (ret < 0)
157 dev_err(&rt712->slave->dev,
158 "%s: Failed to get private value: %06x => %04x ret=%d\n",
159 __func__, addr, *value, ret);
160
161 return ret;
162 }
163
rt712_sdca_dmic_index_update_bits(struct rt712_sdca_dmic_priv * rt712,unsigned int nid,unsigned int reg,unsigned int mask,unsigned int val)164 static int rt712_sdca_dmic_index_update_bits(struct rt712_sdca_dmic_priv *rt712,
165 unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val)
166 {
167 unsigned int tmp;
168 int ret;
169
170 ret = rt712_sdca_dmic_index_read(rt712, nid, reg, &tmp);
171 if (ret < 0)
172 return ret;
173
174 set_mask_bits(&tmp, mask, val);
175 return rt712_sdca_dmic_index_write(rt712, nid, reg, tmp);
176 }
177
rt712_sdca_dmic_io_init(struct device * dev,struct sdw_slave * slave)178 static int rt712_sdca_dmic_io_init(struct device *dev, struct sdw_slave *slave)
179 {
180 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
181
182 if (rt712->hw_init)
183 return 0;
184
185 regcache_cache_only(rt712->regmap, false);
186 regcache_cache_only(rt712->mbq_regmap, false);
187 if (rt712->first_hw_init) {
188 regcache_cache_bypass(rt712->regmap, true);
189 regcache_cache_bypass(rt712->mbq_regmap, true);
190 } else {
191 /*
192 * PM runtime status is marked as 'active' only when a Slave reports as Attached
193 */
194
195 /* update count of parent 'active' children */
196 pm_runtime_set_active(&slave->dev);
197 }
198
199 pm_runtime_get_noresume(&slave->dev);
200
201 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
202 RT712_ADC0A_08_PDE_FLOAT_CTL, 0x1112);
203 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
204 RT712_ADC0B_11_PDE_FLOAT_CTL, 0x1111);
205 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
206 RT712_DMIC1_2_PDE_FLOAT_CTL, 0x1111);
207 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
208 RT712_I2S_IN_OUT_PDE_FLOAT_CTL, 0x1155);
209 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
210 RT712_DMIC_ENT_FLOAT_CTL, 0x2626);
211 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
212 RT712_ADC_ENT_FLOAT_CTL, 0x1e19);
213 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
214 RT712_DMIC_GAIN_ENT_FLOAT_CTL0, 0x1515);
215 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
216 RT712_ADC_VOL_CH_FLOAT_CTL2, 0x0304);
217 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
218 RT712_DMIC_GAIN_ENT_FLOAT_CTL2, 0x0304);
219 rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
220 RT712_HDA_LEGACY_CONFIG_CTL0, 0x0050);
221 regmap_write(rt712->regmap,
222 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_IT26, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x01);
223 rt712_sdca_dmic_index_write(rt712, RT712_ULTRA_SOUND_DET,
224 RT712_ULTRA_SOUND_DETECTOR6, 0x3200);
225 regmap_write(rt712->regmap, RT712_RC_CAL, 0x23);
226 regmap_write(rt712->regmap, 0x2f52, 0x00);
227
228 if (rt712->first_hw_init) {
229 regcache_cache_bypass(rt712->regmap, false);
230 regcache_mark_dirty(rt712->regmap);
231 regcache_cache_bypass(rt712->mbq_regmap, false);
232 regcache_mark_dirty(rt712->mbq_regmap);
233 } else
234 rt712->first_hw_init = true;
235
236 /* Mark Slave initialization complete */
237 rt712->hw_init = true;
238
239 pm_runtime_mark_last_busy(&slave->dev);
240 pm_runtime_put_autosuspend(&slave->dev);
241
242 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
243 return 0;
244 }
245
rt712_sdca_dmic_set_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)246 static int rt712_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
247 struct snd_ctl_elem_value *ucontrol)
248 {
249 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
250 struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
251 struct rt712_sdca_dmic_kctrl_priv *p =
252 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
253 unsigned int regvalue, ctl, i;
254 unsigned int adc_vol_flag = 0;
255 const unsigned int interval_offset = 0xc0;
256
257 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
258 adc_vol_flag = 1;
259
260 /* check all channels */
261 for (i = 0; i < p->count; i++) {
262 regmap_read(rt712->mbq_regmap, p->reg_base + i, ®value);
263
264 if (!adc_vol_flag) /* boost gain */
265 ctl = regvalue / 0x0a00;
266 else /* ADC gain */
267 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset);
268
269 ucontrol->value.integer.value[i] = ctl;
270 }
271
272 return 0;
273 }
274
rt712_sdca_dmic_set_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)275 static int rt712_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
276 struct snd_ctl_elem_value *ucontrol)
277 {
278 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
279 struct rt712_sdca_dmic_kctrl_priv *p =
280 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
281 struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
282 unsigned int gain_val[4];
283 unsigned int i, adc_vol_flag = 0, changed = 0;
284 unsigned int regvalue[4];
285 const unsigned int interval_offset = 0xc0;
286 int err;
287
288 if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
289 adc_vol_flag = 1;
290
291 /* check all channels */
292 for (i = 0; i < p->count; i++) {
293 regmap_read(rt712->mbq_regmap, p->reg_base + i, ®value[i]);
294
295 gain_val[i] = ucontrol->value.integer.value[i];
296 if (gain_val[i] > p->max)
297 gain_val[i] = p->max;
298
299 if (!adc_vol_flag) /* boost gain */
300 gain_val[i] = gain_val[i] * 0x0a00;
301 else { /* ADC gain */
302 gain_val[i] = 0x1e00 - ((p->max - gain_val[i]) * interval_offset);
303 gain_val[i] &= 0xffff;
304 }
305
306 if (regvalue[i] != gain_val[i])
307 changed = 1;
308 }
309
310 if (!changed)
311 return 0;
312
313 for (i = 0; i < p->count; i++) {
314 err = regmap_write(rt712->mbq_regmap, p->reg_base + i, gain_val[i]);
315 if (err < 0)
316 dev_err(&rt712->slave->dev, "%s: 0x%08x can't be set\n",
317 __func__, p->reg_base + i);
318 }
319
320 return changed;
321 }
322
rt712_sdca_set_fu1e_capture_ctl(struct rt712_sdca_dmic_priv * rt712)323 static int rt712_sdca_set_fu1e_capture_ctl(struct rt712_sdca_dmic_priv *rt712)
324 {
325 int err, i;
326 unsigned int ch_mute;
327
328 for (i = 0; i < ARRAY_SIZE(rt712->fu1e_mixer_mute); i++) {
329 ch_mute = (rt712->fu1e_dapm_mute || rt712->fu1e_mixer_mute[i]) ? 0x01 : 0x00;
330 err = regmap_write(rt712->regmap,
331 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E,
332 RT712_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
333 if (err < 0)
334 return err;
335 }
336
337 return 0;
338 }
339
rt712_sdca_dmic_fu1e_capture_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)340 static int rt712_sdca_dmic_fu1e_capture_get(struct snd_kcontrol *kcontrol,
341 struct snd_ctl_elem_value *ucontrol)
342 {
343 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
344 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
345 struct rt712_sdca_dmic_kctrl_priv *p =
346 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
347 unsigned int i;
348
349 for (i = 0; i < p->count; i++)
350 ucontrol->value.integer.value[i] = !rt712->fu1e_mixer_mute[i];
351
352 return 0;
353 }
354
rt712_sdca_dmic_fu1e_capture_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)355 static int rt712_sdca_dmic_fu1e_capture_put(struct snd_kcontrol *kcontrol,
356 struct snd_ctl_elem_value *ucontrol)
357 {
358 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
359 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
360 struct rt712_sdca_dmic_kctrl_priv *p =
361 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
362 int err, changed = 0, i;
363
364 for (i = 0; i < p->count; i++) {
365 if (rt712->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
366 changed = 1;
367 rt712->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
368 }
369
370 err = rt712_sdca_set_fu1e_capture_ctl(rt712);
371 if (err < 0)
372 return err;
373
374 return changed;
375 }
376
rt712_sdca_fu_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)377 static int rt712_sdca_fu_info(struct snd_kcontrol *kcontrol,
378 struct snd_ctl_elem_info *uinfo)
379 {
380 struct rt712_sdca_dmic_kctrl_priv *p =
381 (struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
382
383 if (p->max == 1)
384 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
385 else
386 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
387 uinfo->count = p->count;
388 uinfo->value.integer.min = 0;
389 uinfo->value.integer.max = p->max;
390 return 0;
391 }
392
393 #define RT712_SDCA_PR_VALUE(xreg_base, xcount, xmax, xinvert) \
394 ((unsigned long)&(struct rt712_sdca_dmic_kctrl_priv) \
395 {.reg_base = xreg_base, .count = xcount, .max = xmax, \
396 .invert = xinvert})
397
398 #define RT712_SDCA_FU_CTRL(xname, reg_base, xmax, xinvert, xcount) \
399 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
400 .info = rt712_sdca_fu_info, \
401 .get = rt712_sdca_dmic_fu1e_capture_get, \
402 .put = rt712_sdca_dmic_fu1e_capture_put, \
403 .private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, xinvert)}
404
405 #define RT712_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
406 xhandler_put, xcount, xmax, tlv_array) \
407 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
408 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
409 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
410 .tlv.p = (tlv_array), \
411 .info = rt712_sdca_fu_info, \
412 .get = xhandler_get, .put = xhandler_put, \
413 .private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, 0) }
414
415 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
416 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
417
418 static const struct snd_kcontrol_new rt712_sdca_dmic_snd_controls[] = {
419 RT712_SDCA_FU_CTRL("FU1E Capture Switch",
420 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01),
421 1, 1, 4),
422 RT712_SDCA_EXT_TLV("FU1E Capture Volume",
423 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01),
424 rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 0x3f, in_vol_tlv),
425 RT712_SDCA_EXT_TLV("FU15 Boost Volume",
426 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01),
427 rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 3, mic_vol_tlv),
428 };
429
rt712_sdca_dmic_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)430 static int rt712_sdca_dmic_mux_get(struct snd_kcontrol *kcontrol,
431 struct snd_ctl_elem_value *ucontrol)
432 {
433 struct snd_soc_component *component =
434 snd_soc_dapm_kcontrol_component(kcontrol);
435 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
436 unsigned int val = 0, mask_sft;
437
438 if (strstr(ucontrol->id.name, "ADC 25 Mux"))
439 mask_sft = 8;
440 else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
441 mask_sft = 4;
442 else
443 return -EINVAL;
444
445 rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
446 RT712_HDA_LEGACY_MUX_CTL0, &val);
447
448 ucontrol->value.enumerated.item[0] = (val >> mask_sft) & 0x7;
449
450 return 0;
451 }
452
rt712_sdca_dmic_mux_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)453 static int rt712_sdca_dmic_mux_put(struct snd_kcontrol *kcontrol,
454 struct snd_ctl_elem_value *ucontrol)
455 {
456 struct snd_soc_component *component =
457 snd_soc_dapm_kcontrol_component(kcontrol);
458 struct snd_soc_dapm_context *dapm =
459 snd_soc_dapm_kcontrol_dapm(kcontrol);
460 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
461 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
462 unsigned int *item = ucontrol->value.enumerated.item;
463 unsigned int val, val2 = 0, change, mask_sft;
464
465 if (item[0] >= e->items)
466 return -EINVAL;
467
468 if (strstr(ucontrol->id.name, "ADC 25 Mux"))
469 mask_sft = 8;
470 else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
471 mask_sft = 4;
472 else
473 return -EINVAL;
474
475 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
476
477 rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
478 RT712_HDA_LEGACY_MUX_CTL0, &val2);
479 val2 = (0x7 << mask_sft) & val2;
480
481 if (val == val2)
482 change = 0;
483 else
484 change = 1;
485
486 if (change)
487 rt712_sdca_dmic_index_update_bits(rt712, RT712_VENDOR_HDA_CTL,
488 RT712_HDA_LEGACY_MUX_CTL0, 0x7 << mask_sft,
489 val << mask_sft);
490
491 snd_soc_dapm_mux_update_power(dapm, kcontrol,
492 item[0], e, NULL);
493
494 return change;
495 }
496
497 static const char * const adc_mux_text[] = {
498 "DMIC1",
499 "DMIC2",
500 };
501
502 static SOC_ENUM_SINGLE_DECL(
503 rt712_adc25_enum, SND_SOC_NOPM, 0, adc_mux_text);
504
505 static SOC_ENUM_SINGLE_DECL(
506 rt712_adc26_enum, SND_SOC_NOPM, 0, adc_mux_text);
507
508 static const struct snd_kcontrol_new rt712_sdca_dmic_adc25_mux =
509 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt712_adc25_enum,
510 rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
511
512 static const struct snd_kcontrol_new rt712_sdca_dmic_adc26_mux =
513 SOC_DAPM_ENUM_EXT("ADC 26 Mux", rt712_adc26_enum,
514 rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
515
rt712_sdca_dmic_fu1e_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)516 static int rt712_sdca_dmic_fu1e_event(struct snd_soc_dapm_widget *w,
517 struct snd_kcontrol *kcontrol, int event)
518 {
519 struct snd_soc_component *component =
520 snd_soc_dapm_to_component(w->dapm);
521 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
522
523 switch (event) {
524 case SND_SOC_DAPM_POST_PMU:
525 rt712->fu1e_dapm_mute = false;
526 rt712_sdca_set_fu1e_capture_ctl(rt712);
527 break;
528 case SND_SOC_DAPM_PRE_PMD:
529 rt712->fu1e_dapm_mute = true;
530 rt712_sdca_set_fu1e_capture_ctl(rt712);
531 break;
532 }
533 return 0;
534 }
535
rt712_sdca_dmic_pde11_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)536 static int rt712_sdca_dmic_pde11_event(struct snd_soc_dapm_widget *w,
537 struct snd_kcontrol *kcontrol, int event)
538 {
539 struct snd_soc_component *component =
540 snd_soc_dapm_to_component(w->dapm);
541 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
542 unsigned char ps0 = 0x0, ps3 = 0x3;
543
544 switch (event) {
545 case SND_SOC_DAPM_POST_PMU:
546 regmap_write(rt712->regmap,
547 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
548 RT712_SDCA_CTL_REQ_POWER_STATE, 0),
549 ps0);
550 break;
551 case SND_SOC_DAPM_PRE_PMD:
552 regmap_write(rt712->regmap,
553 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
554 RT712_SDCA_CTL_REQ_POWER_STATE, 0),
555 ps3);
556 break;
557 }
558 return 0;
559 }
560
561 static const struct snd_soc_dapm_widget rt712_sdca_dmic_dapm_widgets[] = {
562 SND_SOC_DAPM_INPUT("DMIC1"),
563 SND_SOC_DAPM_INPUT("DMIC2"),
564
565 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
566 rt712_sdca_dmic_pde11_event,
567 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
568
569 SND_SOC_DAPM_ADC_E("FU 1E", NULL, SND_SOC_NOPM, 0, 0,
570 rt712_sdca_dmic_fu1e_event,
571 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
572 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
573 &rt712_sdca_dmic_adc25_mux),
574 SND_SOC_DAPM_MUX("ADC 26 Mux", SND_SOC_NOPM, 0, 0,
575 &rt712_sdca_dmic_adc26_mux),
576
577 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Capture", 0, SND_SOC_NOPM, 0, 0),
578 };
579
580 static const struct snd_soc_dapm_route rt712_sdca_dmic_audio_map[] = {
581 {"DP2TX", NULL, "FU 1E"},
582
583 {"FU 1E", NULL, "PDE 11"},
584 {"FU 1E", NULL, "ADC 25 Mux"},
585 {"FU 1E", NULL, "ADC 26 Mux"},
586 {"ADC 25 Mux", "DMIC1", "DMIC1"},
587 {"ADC 25 Mux", "DMIC2", "DMIC2"},
588 {"ADC 26 Mux", "DMIC1", "DMIC1"},
589 {"ADC 26 Mux", "DMIC2", "DMIC2"},
590 };
591
rt712_sdca_dmic_probe(struct snd_soc_component * component)592 static int rt712_sdca_dmic_probe(struct snd_soc_component *component)
593 {
594 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
595 int ret;
596
597 rt712->component = component;
598
599 if (!rt712->first_hw_init)
600 return 0;
601
602 ret = pm_runtime_resume(component->dev);
603 if (ret < 0 && ret != -EACCES)
604 return ret;
605
606 return 0;
607 }
608
609 static const struct snd_soc_component_driver soc_sdca_dev_rt712_dmic = {
610 .probe = rt712_sdca_dmic_probe,
611 .controls = rt712_sdca_dmic_snd_controls,
612 .num_controls = ARRAY_SIZE(rt712_sdca_dmic_snd_controls),
613 .dapm_widgets = rt712_sdca_dmic_dapm_widgets,
614 .num_dapm_widgets = ARRAY_SIZE(rt712_sdca_dmic_dapm_widgets),
615 .dapm_routes = rt712_sdca_dmic_audio_map,
616 .num_dapm_routes = ARRAY_SIZE(rt712_sdca_dmic_audio_map),
617 .endianness = 1,
618 };
619
rt712_sdca_dmic_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)620 static int rt712_sdca_dmic_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
621 int direction)
622 {
623 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
624
625 return 0;
626 }
627
rt712_sdca_dmic_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)628 static void rt712_sdca_dmic_shutdown(struct snd_pcm_substream *substream,
629 struct snd_soc_dai *dai)
630 {
631 snd_soc_dai_set_dma_data(dai, substream, NULL);
632 }
633
rt712_sdca_dmic_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)634 static int rt712_sdca_dmic_hw_params(struct snd_pcm_substream *substream,
635 struct snd_pcm_hw_params *params,
636 struct snd_soc_dai *dai)
637 {
638 struct snd_soc_component *component = dai->component;
639 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
640 struct sdw_stream_config stream_config;
641 struct sdw_port_config port_config;
642 struct sdw_stream_runtime *sdw_stream;
643 int retval, num_channels;
644 unsigned int sampling_rate;
645
646 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
647 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
648
649 if (!sdw_stream)
650 return -EINVAL;
651
652 if (!rt712->slave)
653 return -EINVAL;
654
655 stream_config.frame_rate = params_rate(params);
656 stream_config.ch_count = params_channels(params);
657 stream_config.bps = snd_pcm_format_width(params_format(params));
658 stream_config.direction = SDW_DATA_DIR_TX;
659
660 num_channels = params_channels(params);
661 port_config.ch_mask = GENMASK(num_channels - 1, 0);
662 port_config.num = 2;
663
664 retval = sdw_stream_add_slave(rt712->slave, &stream_config,
665 &port_config, 1, sdw_stream);
666 if (retval) {
667 dev_err(dai->dev, "%s: Unable to configure port\n", __func__);
668 return retval;
669 }
670
671 if (params_channels(params) > 4) {
672 dev_err(component->dev, "%s: Unsupported channels %d\n",
673 __func__, params_channels(params));
674 return -EINVAL;
675 }
676
677 /* sampling rate configuration */
678 switch (params_rate(params)) {
679 case 16000:
680 sampling_rate = RT712_SDCA_RATE_16000HZ;
681 break;
682 case 32000:
683 sampling_rate = RT712_SDCA_RATE_32000HZ;
684 break;
685 case 44100:
686 sampling_rate = RT712_SDCA_RATE_44100HZ;
687 break;
688 case 48000:
689 sampling_rate = RT712_SDCA_RATE_48000HZ;
690 break;
691 case 96000:
692 sampling_rate = RT712_SDCA_RATE_96000HZ;
693 break;
694 case 192000:
695 sampling_rate = RT712_SDCA_RATE_192000HZ;
696 break;
697 default:
698 dev_err(component->dev, "%s: Rate %d is not supported\n",
699 __func__, params_rate(params));
700 return -EINVAL;
701 }
702
703 /* set sampling frequency */
704 regmap_write(rt712->regmap,
705 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
706 sampling_rate);
707 regmap_write(rt712->regmap,
708 SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
709 sampling_rate);
710
711 return 0;
712 }
713
rt712_sdca_dmic_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)714 static int rt712_sdca_dmic_hw_free(struct snd_pcm_substream *substream,
715 struct snd_soc_dai *dai)
716 {
717 struct snd_soc_component *component = dai->component;
718 struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
719 struct sdw_stream_runtime *sdw_stream =
720 snd_soc_dai_get_dma_data(dai, substream);
721
722 if (!rt712->slave)
723 return -EINVAL;
724
725 sdw_stream_remove_slave(rt712->slave, sdw_stream);
726 return 0;
727 }
728
729 #define RT712_STEREO_RATES (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
730 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
731 #define RT712_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
732 SNDRV_PCM_FMTBIT_S24_LE)
733
734 static const struct snd_soc_dai_ops rt712_sdca_dmic_ops = {
735 .hw_params = rt712_sdca_dmic_hw_params,
736 .hw_free = rt712_sdca_dmic_hw_free,
737 .set_stream = rt712_sdca_dmic_set_sdw_stream,
738 .shutdown = rt712_sdca_dmic_shutdown,
739 };
740
741 static struct snd_soc_dai_driver rt712_sdca_dmic_dai[] = {
742 {
743 .name = "rt712-sdca-dmic-aif1",
744 .id = RT712_AIF1,
745 .capture = {
746 .stream_name = "DP2 Capture",
747 .channels_min = 1,
748 .channels_max = 4,
749 .rates = RT712_STEREO_RATES,
750 .formats = RT712_FORMATS,
751 },
752 .ops = &rt712_sdca_dmic_ops,
753 },
754 };
755
rt712_sdca_dmic_init(struct device * dev,struct regmap * regmap,struct regmap * mbq_regmap,struct sdw_slave * slave)756 static int rt712_sdca_dmic_init(struct device *dev, struct regmap *regmap,
757 struct regmap *mbq_regmap, struct sdw_slave *slave)
758 {
759 struct rt712_sdca_dmic_priv *rt712;
760 int ret;
761
762 rt712 = devm_kzalloc(dev, sizeof(*rt712), GFP_KERNEL);
763 if (!rt712)
764 return -ENOMEM;
765
766 dev_set_drvdata(dev, rt712);
767 rt712->slave = slave;
768 rt712->regmap = regmap;
769 rt712->mbq_regmap = mbq_regmap;
770
771 regcache_cache_only(rt712->regmap, true);
772 regcache_cache_only(rt712->mbq_regmap, true);
773
774 /*
775 * Mark hw_init to false
776 * HW init will be performed when device reports present
777 */
778 rt712->hw_init = false;
779 rt712->first_hw_init = false;
780 rt712->fu1e_dapm_mute = true;
781 rt712->fu1e_mixer_mute[0] = rt712->fu1e_mixer_mute[1] =
782 rt712->fu1e_mixer_mute[2] = rt712->fu1e_mixer_mute[3] = true;
783
784 ret = devm_snd_soc_register_component(dev,
785 &soc_sdca_dev_rt712_dmic,
786 rt712_sdca_dmic_dai,
787 ARRAY_SIZE(rt712_sdca_dmic_dai));
788 if (ret < 0)
789 return ret;
790
791 /* set autosuspend parameters */
792 pm_runtime_set_autosuspend_delay(dev, 3000);
793 pm_runtime_use_autosuspend(dev);
794
795 /* make sure the device does not suspend immediately */
796 pm_runtime_mark_last_busy(dev);
797
798 pm_runtime_enable(dev);
799
800 /* important note: the device is NOT tagged as 'active' and will remain
801 * 'suspended' until the hardware is enumerated/initialized. This is required
802 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently
803 * fail with -EACCESS because of race conditions between card creation and enumeration
804 */
805
806 dev_dbg(dev, "%s\n", __func__);
807
808 return 0;
809 }
810
811
rt712_sdca_dmic_update_status(struct sdw_slave * slave,enum sdw_slave_status status)812 static int rt712_sdca_dmic_update_status(struct sdw_slave *slave,
813 enum sdw_slave_status status)
814 {
815 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(&slave->dev);
816
817 if (status == SDW_SLAVE_UNATTACHED)
818 rt712->hw_init = false;
819
820 /*
821 * Perform initialization only if slave status is present and
822 * hw_init flag is false
823 */
824 if (rt712->hw_init || status != SDW_SLAVE_ATTACHED)
825 return 0;
826
827 /* perform I/O transfers required for Slave initialization */
828 return rt712_sdca_dmic_io_init(&slave->dev, slave);
829 }
830
rt712_sdca_dmic_read_prop(struct sdw_slave * slave)831 static int rt712_sdca_dmic_read_prop(struct sdw_slave *slave)
832 {
833 struct sdw_slave_prop *prop = &slave->prop;
834 int nval, i;
835 u32 bit;
836 unsigned long addr;
837 struct sdw_dpn_prop *dpn;
838
839 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
840 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
841
842 prop->paging_support = true;
843
844 /* first we need to allocate memory for set bits in port lists */
845 prop->source_ports = BIT(2); /* BITMAP: 00000100 */
846 prop->sink_ports = 0;
847
848 nval = hweight32(prop->source_ports);
849 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
850 sizeof(*prop->src_dpn_prop), GFP_KERNEL);
851 if (!prop->src_dpn_prop)
852 return -ENOMEM;
853
854 i = 0;
855 dpn = prop->src_dpn_prop;
856 addr = prop->source_ports;
857 for_each_set_bit(bit, &addr, 32) {
858 dpn[i].num = bit;
859 dpn[i].type = SDW_DPN_FULL;
860 dpn[i].simple_ch_prep_sm = true;
861 dpn[i].ch_prep_timeout = 10;
862 i++;
863 }
864
865 /* set the timeout values */
866 prop->clk_stop_timeout = 200;
867
868 /* wake-up event */
869 prop->wake_capable = 1;
870
871 return 0;
872 }
873
874 static const struct sdw_device_id rt712_sdca_dmic_id[] = {
875 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1712, 0x3, 0x1, 0),
876 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1713, 0x3, 0x1, 0),
877 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1716, 0x3, 0x1, 0),
878 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1717, 0x3, 0x1, 0),
879 {},
880 };
881 MODULE_DEVICE_TABLE(sdw, rt712_sdca_dmic_id);
882
rt712_sdca_dmic_dev_suspend(struct device * dev)883 static int rt712_sdca_dmic_dev_suspend(struct device *dev)
884 {
885 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
886
887 if (!rt712->hw_init)
888 return 0;
889
890 regcache_cache_only(rt712->regmap, true);
891 regcache_cache_only(rt712->mbq_regmap, true);
892
893 return 0;
894 }
895
rt712_sdca_dmic_dev_system_suspend(struct device * dev)896 static int rt712_sdca_dmic_dev_system_suspend(struct device *dev)
897 {
898 struct rt712_sdca_dmic_priv *rt712_sdca = dev_get_drvdata(dev);
899
900 if (!rt712_sdca->hw_init)
901 return 0;
902
903 return rt712_sdca_dmic_dev_suspend(dev);
904 }
905
906 #define RT712_PROBE_TIMEOUT 5000
907
rt712_sdca_dmic_dev_resume(struct device * dev)908 static int rt712_sdca_dmic_dev_resume(struct device *dev)
909 {
910 struct sdw_slave *slave = dev_to_sdw_dev(dev);
911 struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
912 unsigned long time;
913
914 if (!rt712->first_hw_init)
915 return 0;
916
917 if (!slave->unattach_request)
918 goto regmap_sync;
919
920 time = wait_for_completion_timeout(&slave->initialization_complete,
921 msecs_to_jiffies(RT712_PROBE_TIMEOUT));
922 if (!time) {
923 dev_err(&slave->dev, "%s: Initialization not complete, timed out\n",
924 __func__);
925 sdw_show_ping_status(slave->bus, true);
926
927 return -ETIMEDOUT;
928 }
929
930 regmap_sync:
931 slave->unattach_request = 0;
932 regcache_cache_only(rt712->regmap, false);
933 regcache_sync(rt712->regmap);
934 regcache_cache_only(rt712->mbq_regmap, false);
935 regcache_sync(rt712->mbq_regmap);
936 return 0;
937 }
938
939 static const struct dev_pm_ops rt712_sdca_dmic_pm = {
940 SYSTEM_SLEEP_PM_OPS(rt712_sdca_dmic_dev_system_suspend, rt712_sdca_dmic_dev_resume)
941 RUNTIME_PM_OPS(rt712_sdca_dmic_dev_suspend, rt712_sdca_dmic_dev_resume, NULL)
942 };
943
944
945 static const struct sdw_slave_ops rt712_sdca_dmic_slave_ops = {
946 .read_prop = rt712_sdca_dmic_read_prop,
947 .update_status = rt712_sdca_dmic_update_status,
948 };
949
rt712_sdca_dmic_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)950 static int rt712_sdca_dmic_sdw_probe(struct sdw_slave *slave,
951 const struct sdw_device_id *id)
952 {
953 struct regmap *regmap, *mbq_regmap;
954
955 /* Regmap Initialization */
956 mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt712_sdca_dmic_mbq_regmap);
957 if (IS_ERR(mbq_regmap))
958 return PTR_ERR(mbq_regmap);
959
960 regmap = devm_regmap_init_sdw(slave, &rt712_sdca_dmic_regmap);
961 if (IS_ERR(regmap))
962 return PTR_ERR(regmap);
963
964 return rt712_sdca_dmic_init(&slave->dev, regmap, mbq_regmap, slave);
965 }
966
rt712_sdca_dmic_sdw_remove(struct sdw_slave * slave)967 static int rt712_sdca_dmic_sdw_remove(struct sdw_slave *slave)
968 {
969 pm_runtime_disable(&slave->dev);
970
971 return 0;
972 }
973
974 static struct sdw_driver rt712_sdca_dmic_sdw_driver = {
975 .driver = {
976 .name = "rt712-sdca-dmic",
977 .pm = pm_ptr(&rt712_sdca_dmic_pm),
978 },
979 .probe = rt712_sdca_dmic_sdw_probe,
980 .remove = rt712_sdca_dmic_sdw_remove,
981 .ops = &rt712_sdca_dmic_slave_ops,
982 .id_table = rt712_sdca_dmic_id,
983 };
984 module_sdw_driver(rt712_sdca_dmic_sdw_driver);
985
986 MODULE_DESCRIPTION("ASoC RT712 SDCA DMIC SDW driver");
987 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
988 MODULE_LICENSE("GPL");
989