1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * nct6775 - Driver for the hardware monitoring functionality of
4 * Nuvoton NCT677x Super-I/O chips
5 *
6 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 *
8 * Derived from w83627ehf driver
9 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
10 * Copyright (C) 2006 Yuan Mu (Winbond),
11 * Rudolf Marek <r.marek@assembler.cz>
12 * David Hubbard <david.c.hubbard@gmail.com>
13 * Daniel J Blueman <daniel.blueman@gmail.com>
14 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 *
16 * Shamelessly ripped from the w83627hf driver
17 * Copyright (C) 2003 Mark Studebaker
18 *
19 * Supports the following chips:
20 *
21 * Chip #vin #fan #pwm #temp chip IDs man ID
22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3
24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3
31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3
32 * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3
33 * (0xd451)
34 * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3
35 * (0xd429)
36 * nct5585d 14 7 7 2+6 0xd428 0xc1 0x5ca3
37 * nct6796d-s 18 7 7 6+2 0xd801 0xc1 0x5ca3
38 * nct6799d-r 18 7 7 6+2 0xd802 0xc1 0x5ca3
39 *
40 * #temp lists the number of monitored temperature sources (first value) plus
41 * the number of directly connectable temperature sensors (second value).
42 */
43
44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46 #undef DEFAULT_SYMBOL_NAMESPACE
47 #define DEFAULT_SYMBOL_NAMESPACE "HWMON_NCT6775"
48
49 #include <linux/module.h>
50 #include <linux/init.h>
51 #include <linux/slab.h>
52 #include <linux/jiffies.h>
53 #include <linux/hwmon.h>
54 #include <linux/hwmon-sysfs.h>
55 #include <linux/err.h>
56 #include <linux/mutex.h>
57 #include <linux/bitops.h>
58 #include <linux/nospec.h>
59 #include <linux/regmap.h>
60 #include "lm75.h"
61 #include "nct6775.h"
62
63 #define USE_ALTERNATE
64
65 /* used to set data->name = nct6775_device_names[data->sio_kind] */
66 static const char * const nct6775_device_names[] = {
67 [nct6106] = "nct6106",
68 [nct6116] = "nct6116",
69 [nct6775] = "nct6775",
70 [nct6776] = "nct6776",
71 [nct6779] = "nct6779",
72 [nct6791] = "nct6791",
73 [nct6792] = "nct6792",
74 [nct6793] = "nct6793",
75 [nct6795] = "nct6795",
76 [nct6796] = "nct6796",
77 [nct6797] = "nct6797",
78 [nct6798] = "nct6798",
79 [nct6799] = "nct6799",
80 };
81
82 /* Common and NCT6775 specific data */
83
84 /*
85 * Voltage min/max registers for nr=7..14 are in bank 5
86 * min/max: 15-17 for NCT6799 only
87 */
88
89 static const u16 NCT6775_REG_IN_MAX[] = {
90 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
91 0x55c, 0x55e, 0x560, 0x562, 0x564, 0x570, 0x572 };
92 static const u16 NCT6775_REG_IN_MIN[] = {
93 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
94 0x55d, 0x55f, 0x561, 0x563, 0x565, 0x571, 0x573 };
95 static const u16 NCT6775_REG_IN[] = {
96 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
97 };
98
99 #define NCT6775_REG_VBAT 0x5D
100 #define NCT6775_REG_DIODE 0x5E
101 #define NCT6775_DIODE_MASK 0x02
102
103 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
104
105 static const s8 NCT6775_ALARM_BITS[NUM_ALARM_BITS] = {
106 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */
107 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
108 6, 7, 11, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
109 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
110 12, -1, /* intr0-intr1 */
111 };
112
113 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
114
115 static const s8 NCT6775_BEEP_BITS[NUM_BEEP_BITS] = {
116 0, 1, 2, 3, 8, 9, 10, 16, 17, -1, -1, -1, /* in0-in11 */
117 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
118 6, 7, 11, 28, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
119 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
120 12, -1, 21 /* intr0-intr1, beep_en */
121 };
122
123 /* DC or PWM output fan configuration */
124 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
125 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
126
127 /* Advanced Fan control, some values are common for all fans */
128
129 static const u16 NCT6775_REG_TARGET[] = {
130 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 };
131 static const u16 NCT6775_REG_FAN_MODE[] = {
132 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 };
133 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
134 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 };
135 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
136 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 };
137 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
138 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 };
139 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
140 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 };
141 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
142 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
143
144 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
145 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 };
146 static const u16 NCT6775_REG_PWM[] = {
147 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 };
148 static const u16 NCT6775_REG_PWM_READ[] = {
149 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 };
150
151 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
152 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
153 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = {
154 0x641, 0x642, 0x643, 0x644 };
155 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { };
156
157 static const u16 NCT6775_REG_TEMP[] = {
158 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
159
160 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
161
162 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
163 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
164 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
165 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
166 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
167 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
168
169 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
170 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
171
172 static const u16 NCT6775_REG_TEMP_SEL[] = {
173 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 };
174
175 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
176 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
177 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
178 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
179 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
180 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
181 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
182 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
183 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
184 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
185
186 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
187
188 static const u16 NCT6775_REG_AUTO_TEMP[] = {
189 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 };
190 static const u16 NCT6775_REG_AUTO_PWM[] = {
191 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 };
192
193 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
194 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
195
196 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
197
198 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
199 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 };
200 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
201 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 };
202
203 static const char *const nct6775_temp_label[] = {
204 "",
205 "SYSTIN",
206 "CPUTIN",
207 "AUXTIN",
208 "AMD SB-TSI",
209 "PECI Agent 0",
210 "PECI Agent 1",
211 "PECI Agent 2",
212 "PECI Agent 3",
213 "PECI Agent 4",
214 "PECI Agent 5",
215 "PECI Agent 6",
216 "PECI Agent 7",
217 "PCH_CHIP_CPU_MAX_TEMP",
218 "PCH_CHIP_TEMP",
219 "PCH_CPU_TEMP",
220 "PCH_MCH_TEMP",
221 "PCH_DIM0_TEMP",
222 "PCH_DIM1_TEMP",
223 "PCH_DIM2_TEMP",
224 "PCH_DIM3_TEMP"
225 };
226
227 #define NCT6775_TEMP_MASK 0x001ffffe
228 #define NCT6775_VIRT_TEMP_MASK 0x00000000
229
230 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
231 [13] = 0x661,
232 [14] = 0x662,
233 [15] = 0x664,
234 };
235
236 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
237 [4] = 0xa00,
238 [5] = 0xa01,
239 [6] = 0xa02,
240 [7] = 0xa03,
241 [8] = 0xa04,
242 [9] = 0xa05,
243 [10] = 0xa06,
244 [11] = 0xa07
245 };
246
247 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 };
248
249 /* NCT6776 specific data */
250
251 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
252 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
253 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
254
255 static const s8 NCT6776_ALARM_BITS[NUM_ALARM_BITS] = {
256 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */
257 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
258 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
259 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
260 12, 9, /* intr0-intr1 */
261 };
262
263 /* 0xbf: nct6799 only */
264 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
265
266 static const s8 NCT6776_BEEP_BITS[NUM_BEEP_BITS] = {
267 0, 1, 2, 3, 4, 5, 6, 7, 8, -1, -1, -1, /* in0-in11 */
268 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
269 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
270 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
271 30, 31, 24 /* intr0-intr1, beep_en */
272 };
273
274 static const u16 NCT6776_REG_TOLERANCE_H[] = {
275 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c };
276
277 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0, 0 };
278 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0, 0 };
279
280 static const u16 NCT6776_REG_FAN_MIN[] = {
281 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };
282 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = {
283 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
284
285 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
286 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
287
288 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
289 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
290
291 static const char *const nct6776_temp_label[] = {
292 "",
293 "SYSTIN",
294 "CPUTIN",
295 "AUXTIN",
296 "SMBUSMASTER 0",
297 "SMBUSMASTER 1",
298 "SMBUSMASTER 2",
299 "SMBUSMASTER 3",
300 "SMBUSMASTER 4",
301 "SMBUSMASTER 5",
302 "SMBUSMASTER 6",
303 "SMBUSMASTER 7",
304 "PECI Agent 0",
305 "PECI Agent 1",
306 "PCH_CHIP_CPU_MAX_TEMP",
307 "PCH_CHIP_TEMP",
308 "PCH_CPU_TEMP",
309 "PCH_MCH_TEMP",
310 "PCH_DIM0_TEMP",
311 "PCH_DIM1_TEMP",
312 "PCH_DIM2_TEMP",
313 "PCH_DIM3_TEMP",
314 "BYTE_TEMP"
315 };
316
317 #define NCT6776_TEMP_MASK 0x007ffffe
318 #define NCT6776_VIRT_TEMP_MASK 0x00000000
319
320 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
321 [14] = 0x401,
322 [15] = 0x402,
323 [16] = 0x404,
324 };
325
326 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
327 [11] = 0x709,
328 [12] = 0x70a,
329 };
330
331 static const u16 NCT6776_REG_TSI_TEMP[] = {
332 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 };
333
334 /* NCT6779 specific data */
335
336 /*
337 * 15-17 for NCT6799 only, register labels are:
338 * CPUVC, VIN1, AVSB, 3VCC, VIN0, VIN8, VIN4, 3VSB
339 * VBAT, VTT, VIN5, VIN6, VIN2, VIN3, VIN7, VIN9
340 * VHIF, VIN10
341 */
342 static const u16 NCT6779_REG_IN[] = {
343 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
344 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e, 0x48f,
345 0x470, 0x471};
346
347 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
348 0x459, 0x45A, 0x45B, 0x568 };
349
350 static const s8 NCT6779_ALARM_BITS[NUM_ALARM_BITS] = {
351 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */
352 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
353 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
354 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
355 12, 9, /* intr0-intr1 */
356 };
357
358 static const s8 NCT6779_BEEP_BITS[NUM_BEEP_BITS] = {
359 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */
360 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
361 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
362 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
363 30, 31, 24 /* intr0-intr1, beep_en */
364 };
365
366 static const u16 NCT6779_REG_FAN[] = {
367 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
368 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = {
369 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f };
370
371 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
372 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
373 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
374 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
375 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 };
376
377 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
378 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
379 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
380 0x18, 0x152 };
381 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
382 0x3a, 0x153 };
383 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
384 0x39, 0x155 };
385
386 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
387 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 };
388
389 static const char *const nct6779_temp_label[] = {
390 "",
391 "SYSTIN",
392 "CPUTIN",
393 "AUXTIN0",
394 "AUXTIN1",
395 "AUXTIN2",
396 "AUXTIN3",
397 "",
398 "SMBUSMASTER 0",
399 "SMBUSMASTER 1",
400 "SMBUSMASTER 2",
401 "SMBUSMASTER 3",
402 "SMBUSMASTER 4",
403 "SMBUSMASTER 5",
404 "SMBUSMASTER 6",
405 "SMBUSMASTER 7",
406 "PECI Agent 0",
407 "PECI Agent 1",
408 "PCH_CHIP_CPU_MAX_TEMP",
409 "PCH_CHIP_TEMP",
410 "PCH_CPU_TEMP",
411 "PCH_MCH_TEMP",
412 "PCH_DIM0_TEMP",
413 "PCH_DIM1_TEMP",
414 "PCH_DIM2_TEMP",
415 "PCH_DIM3_TEMP",
416 "BYTE_TEMP",
417 "",
418 "",
419 "",
420 "",
421 "Virtual_TEMP"
422 };
423
424 #define NCT6779_TEMP_MASK 0x07ffff7e
425 #define NCT6779_VIRT_TEMP_MASK 0x00000000
426 #define NCT6791_TEMP_MASK 0x87ffff7e
427 #define NCT6791_VIRT_TEMP_MASK 0x80000000
428
429 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
430 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
431 0, 0, 0, 0, 0, 0, 0, 0,
432 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
433 0x408, 0 };
434
435 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
436 [15] = 0x709,
437 [16] = 0x70a,
438 };
439
440 /* NCT6791 specific data */
441
442 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 };
443 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a };
444 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b };
445 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c };
446 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d };
447 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e };
448
449 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
450 0x459, 0x45A, 0x45B, 0x568, 0x45D };
451
452 static const s8 NCT6791_ALARM_BITS[NUM_ALARM_BITS] = {
453 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */
454 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
455 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
456 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
457 12, 9, /* intr0-intr1 */
458 };
459
460 /* NCT6792/NCT6793 specific data */
461
462 static const u16 NCT6792_REG_TEMP_MON[] = {
463 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
464 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
465 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
466
467 static const char *const nct6792_temp_label[] = {
468 "",
469 "SYSTIN",
470 "CPUTIN",
471 "AUXTIN0",
472 "AUXTIN1",
473 "AUXTIN2",
474 "AUXTIN3",
475 "",
476 "SMBUSMASTER 0",
477 "SMBUSMASTER 1",
478 "SMBUSMASTER 2",
479 "SMBUSMASTER 3",
480 "SMBUSMASTER 4",
481 "SMBUSMASTER 5",
482 "SMBUSMASTER 6",
483 "SMBUSMASTER 7",
484 "PECI Agent 0",
485 "PECI Agent 1",
486 "PCH_CHIP_CPU_MAX_TEMP",
487 "PCH_CHIP_TEMP",
488 "PCH_CPU_TEMP",
489 "PCH_MCH_TEMP",
490 "PCH_DIM0_TEMP",
491 "PCH_DIM1_TEMP",
492 "PCH_DIM2_TEMP",
493 "PCH_DIM3_TEMP",
494 "BYTE_TEMP",
495 "PECI Agent 0 Calibration",
496 "PECI Agent 1 Calibration",
497 "",
498 "",
499 "Virtual_TEMP"
500 };
501
502 #define NCT6792_TEMP_MASK 0x9fffff7e
503 #define NCT6792_VIRT_TEMP_MASK 0x80000000
504
505 static const char *const nct6793_temp_label[] = {
506 "",
507 "SYSTIN",
508 "CPUTIN",
509 "AUXTIN0",
510 "AUXTIN1",
511 "AUXTIN2",
512 "AUXTIN3",
513 "",
514 "SMBUSMASTER 0",
515 "SMBUSMASTER 1",
516 "",
517 "",
518 "",
519 "",
520 "",
521 "",
522 "PECI Agent 0",
523 "PECI Agent 1",
524 "PCH_CHIP_CPU_MAX_TEMP",
525 "PCH_CHIP_TEMP",
526 "PCH_CPU_TEMP",
527 "PCH_MCH_TEMP",
528 "Agent0 Dimm0 ",
529 "Agent0 Dimm1",
530 "Agent1 Dimm0",
531 "Agent1 Dimm1",
532 "BYTE_TEMP0",
533 "BYTE_TEMP1",
534 "PECI Agent 0 Calibration",
535 "PECI Agent 1 Calibration",
536 "",
537 "Virtual_TEMP"
538 };
539
540 #define NCT6793_TEMP_MASK 0xbfff037e
541 #define NCT6793_VIRT_TEMP_MASK 0x80000000
542
543 static const char *const nct6795_temp_label[] = {
544 "",
545 "SYSTIN",
546 "CPUTIN",
547 "AUXTIN0",
548 "AUXTIN1",
549 "AUXTIN2",
550 "AUXTIN3",
551 "",
552 "SMBUSMASTER 0",
553 "SMBUSMASTER 1",
554 "SMBUSMASTER 2",
555 "SMBUSMASTER 3",
556 "SMBUSMASTER 4",
557 "SMBUSMASTER 5",
558 "SMBUSMASTER 6",
559 "SMBUSMASTER 7",
560 "PECI Agent 0",
561 "PECI Agent 1",
562 "PCH_CHIP_CPU_MAX_TEMP",
563 "PCH_CHIP_TEMP",
564 "PCH_CPU_TEMP",
565 "PCH_MCH_TEMP",
566 "Agent0 Dimm0",
567 "Agent0 Dimm1",
568 "Agent1 Dimm0",
569 "Agent1 Dimm1",
570 "BYTE_TEMP0",
571 "BYTE_TEMP1",
572 "PECI Agent 0 Calibration",
573 "PECI Agent 1 Calibration",
574 "",
575 "Virtual_TEMP"
576 };
577
578 #define NCT6795_TEMP_MASK 0xbfffff7e
579 #define NCT6795_VIRT_TEMP_MASK 0x80000000
580
581 static const char *const nct6796_temp_label[] = {
582 "",
583 "SYSTIN",
584 "CPUTIN",
585 "AUXTIN0",
586 "AUXTIN1",
587 "AUXTIN2",
588 "AUXTIN3",
589 "AUXTIN4",
590 "SMBUSMASTER 0",
591 "SMBUSMASTER 1",
592 "Virtual_TEMP",
593 "Virtual_TEMP",
594 "",
595 "",
596 "",
597 "",
598 "PECI Agent 0",
599 "PECI Agent 1",
600 "PCH_CHIP_CPU_MAX_TEMP",
601 "PCH_CHIP_TEMP",
602 "PCH_CPU_TEMP",
603 "PCH_MCH_TEMP",
604 "Agent0 Dimm0",
605 "Agent0 Dimm1",
606 "Agent1 Dimm0",
607 "Agent1 Dimm1",
608 "BYTE_TEMP0",
609 "BYTE_TEMP1",
610 "PECI Agent 0 Calibration",
611 "PECI Agent 1 Calibration",
612 "",
613 "Virtual_TEMP"
614 };
615
616 #define NCT6796_TEMP_MASK 0xbfff0ffe
617 #define NCT6796_VIRT_TEMP_MASK 0x80000c00
618
619 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b };
620
621 static const u16 NCT6798_REG_TEMP[] = {
622 0x27, 0x150, 0x670, 0x672, 0x674, 0x676, 0x678, 0x67a};
623
624 static const u16 NCT6798_REG_TEMP_SOURCE[] = {
625 0x621, 0x622, 0xc26, 0xc27, 0xc28, 0xc29, 0xc2a, 0xc2b };
626
627 static const u16 NCT6798_REG_TEMP_MON[] = {
628 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d, 0x4a0 };
629 static const u16 NCT6798_REG_TEMP_OVER[] = {
630 0x39, 0x155, 0xc1a, 0xc1b, 0xc1c, 0xc1d, 0xc1e, 0xc1f };
631 static const u16 NCT6798_REG_TEMP_HYST[] = {
632 0x3a, 0x153, 0xc20, 0xc21, 0xc22, 0xc23, 0xc24, 0xc25 };
633
634 static const u16 NCT6798_REG_TEMP_CRIT[32] = {
635 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35, 0 };
636
637 static const u16 NCT6798_REG_TEMP_ALTERNATE[32] = {
638 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0,
639 0, 0, 0, 0, 0x4a2, 0, 0, 0,
640 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
641 0x408, 0x419, 0x41a, 0x4f4, 0x4f5 };
642
643 static const char *const nct6798_temp_label[] = {
644 "",
645 "SYSTIN",
646 "CPUTIN",
647 "AUXTIN0",
648 "AUXTIN1",
649 "AUXTIN2",
650 "AUXTIN3",
651 "AUXTIN4",
652 "SMBUSMASTER 0",
653 "SMBUSMASTER 1",
654 "Virtual_TEMP",
655 "Virtual_TEMP",
656 "",
657 "",
658 "",
659 "",
660 "PECI Agent 0",
661 "PECI Agent 1",
662 "PCH_CHIP_CPU_MAX_TEMP",
663 "PCH_CHIP_TEMP",
664 "PCH_CPU_TEMP",
665 "PCH_MCH_TEMP",
666 "Agent0 Dimm0",
667 "Agent0 Dimm1",
668 "Agent1 Dimm0",
669 "Agent1 Dimm1",
670 "BYTE_TEMP0",
671 "BYTE_TEMP1",
672 "PECI Agent 0 Calibration", /* undocumented */
673 "PECI Agent 1 Calibration", /* undocumented */
674 "",
675 "Virtual_TEMP"
676 };
677
678 #define NCT6798_TEMP_MASK 0xbfff0ffe
679 #define NCT6798_VIRT_TEMP_MASK 0x80000c00
680
681 static const u16 NCT6799_REG_ALARM[NUM_REG_ALARM] = {
682 0x459, 0x45A, 0x45B, 0x568, 0x45D, 0xc01 };
683
684 static const s8 NCT6799_ALARM_BITS[NUM_ALARM_BITS] = {
685 0, 1, 2, 3, 8, -1, 20, 16, 17, 24, 25, 26, /* in0-in11 */
686 27, 28, 29, 30, 31, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
687 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
688 4, 5, 40, 41, 42, 43, 44, -1, -1, -1, -1, -1, /* temp1-temp12 */
689 12, 9, /* intr0-intr1 */
690 };
691
692 static const s8 NCT6799_BEEP_BITS[NUM_BEEP_BITS] = {
693 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */
694 12, 13, 14, 15, 34, 35, -1, -1, -1, -1, -1, -1, /* in12-in23 */
695 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
696 16, 17, 18, 19, 20, 21, 22, 23, -1, -1, -1, -1, /* temp1-temp12 */
697 30, 31, 24 /* intr0-intr1, beep_en */
698 };
699
700 /* PECI Calibration only for NCT6799D, not NCT6796D-S */
701 static const char *const nct6799_temp_label[] = {
702 "",
703 "SYSTIN",
704 "CPUTIN",
705 "AUXTIN0",
706 "AUXTIN1",
707 "AUXTIN2",
708 "AUXTIN3",
709 "AUXTIN4",
710 "SMBUSMASTER 0",
711 "SMBUSMASTER 1",
712 "Virtual_TEMP",
713 "Virtual_TEMP",
714 "",
715 "AUXTIN5",
716 "",
717 "",
718 "PECI Agent 0",
719 "PECI Agent 1",
720 "PCH_CHIP_CPU_MAX_TEMP",
721 "PCH_CHIP_TEMP",
722 "PCH_CPU_TEMP",
723 "PCH_MCH_TEMP",
724 "Agent0 Dimm0",
725 "Agent0 Dimm1",
726 "Agent1 Dimm0",
727 "Agent1 Dimm1",
728 "BYTE_TEMP0",
729 "BYTE_TEMP1",
730 "PECI/TSI Agent 0 Calibration",
731 "PECI/TSI Agent 1 Calibration",
732 "",
733 "Virtual_TEMP"
734 };
735
736 #define NCT6799_TEMP_MASK 0xbfff2ffe
737 #define NCT6799_VIRT_TEMP_MASK 0x80000c00
738
739 /* NCT6102D/NCT6106D specific data */
740
741 #define NCT6106_REG_VBAT 0x318
742 #define NCT6106_REG_DIODE 0x319
743 #define NCT6106_DIODE_MASK 0x01
744
745 static const u16 NCT6106_REG_IN_MAX[] = {
746 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
747 static const u16 NCT6106_REG_IN_MIN[] = {
748 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
749 static const u16 NCT6106_REG_IN[] = {
750 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
751
752 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
753 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
754 static const u16 NCT6106_REG_TEMP_HYST[] = {
755 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
756 static const u16 NCT6106_REG_TEMP_OVER[] = {
757 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
758 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
759 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
760 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
761 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
762 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
763 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
764 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
765
766 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
767 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
768 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 };
769 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 };
770
771 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3, 0, 0 };
772 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04, 0, 0 };
773 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c, 0xd8, 0xd9 };
774 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
775 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
776 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
777
778 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
779 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
780 0x11b, 0x12b, 0x13b };
781
782 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
783 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
784 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
785
786 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
787 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
788 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
789 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
790 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
791 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
792
793 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
794
795 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188, 0, 0 };
796 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189, 0, 0 };
797 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a, 0, 0 };
798 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b, 0, 0 };
799 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c, 0, 0 };
800 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d, 0, 0 };
801
802 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
803 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
804
805 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
806 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
807
808 static const s8 NCT6106_ALARM_BITS[NUM_ALARM_BITS] = {
809 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */
810 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
811 32, 33, 34, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
812 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
813 48, -1, /* intr0-intr1 */
814 };
815
816 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
817 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
818
819 static const s8 NCT6106_BEEP_BITS[NUM_BEEP_BITS] = {
820 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */
821 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
822 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
823 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
824 34, -1, 32 /* intr0-intr1, beep_en */
825 };
826
827 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
828 [14] = 0x51,
829 [15] = 0x52,
830 [16] = 0x54,
831 };
832
833 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
834 [11] = 0x204,
835 [12] = 0x205,
836 };
837
838 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 };
839
840 /* NCT6112D/NCT6114D/NCT6116D specific data */
841
842 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 };
843 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 };
844 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 };
845 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 };
846
847 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 };
848 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 };
849 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 };
850
851 static const u16 NCT6116_REG_CRITICAL_TEMP[] = {
852 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa };
853 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = {
854 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab };
855
856 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = {
857 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac };
858 static const u16 NCT6116_REG_CRITICAL_PWM[] = {
859 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad };
860
861 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = {
862 0x114, 0x124, 0x134, 0x194, 0x1a4 };
863 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = {
864 0x115, 0x125, 0x135, 0x195, 0x1a5 };
865 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = {
866 0x116, 0x126, 0x136, 0x196, 0x1a6 };
867 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = {
868 0x117, 0x127, 0x137, 0x197, 0x1a7 };
869 static const u16 NCT6116_REG_FAN_STOP_TIME[] = {
870 0x118, 0x128, 0x138, 0x198, 0x1a8 };
871 static const u16 NCT6116_REG_TOLERANCE_H[] = {
872 0x112, 0x122, 0x132, 0x192, 0x1a2 };
873
874 static const u16 NCT6116_REG_TARGET[] = {
875 0x111, 0x121, 0x131, 0x191, 0x1a1 };
876
877 static const u16 NCT6116_REG_AUTO_TEMP[] = {
878 0x160, 0x170, 0x180, 0x1d0, 0x1e0 };
879 static const u16 NCT6116_REG_AUTO_PWM[] = {
880 0x164, 0x174, 0x184, 0x1d4, 0x1e4 };
881
882 static const s8 NCT6116_ALARM_BITS[NUM_ALARM_BITS] = {
883 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */
884 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
885 32, 33, 34, 35, 36, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
886 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
887 48, -1, /* intr0-intr1 */
888 };
889
890 static const s8 NCT6116_BEEP_BITS[NUM_BEEP_BITS] = {
891 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */
892 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */
893 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */
894 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */
895 34, -1, 32 /* intr0-intr1, beep_en */
896 };
897
898 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b };
899
reg_to_pwm_enable(int pwm,int mode)900 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
901 {
902 if (mode == 0 && pwm == 255)
903 return off;
904 return mode + 1;
905 }
906
pwm_enable_to_reg(enum pwm_enable mode)907 static int pwm_enable_to_reg(enum pwm_enable mode)
908 {
909 if (mode == off)
910 return 0;
911 return mode - 1;
912 }
913
914 /*
915 * Conversions
916 */
917
918 /* 1 is DC mode, output in ms */
step_time_from_reg(u8 reg,u8 mode)919 static unsigned int step_time_from_reg(u8 reg, u8 mode)
920 {
921 return mode ? 400 * reg : 100 * reg;
922 }
923
step_time_to_reg(unsigned int msec,u8 mode)924 static u8 step_time_to_reg(unsigned int msec, u8 mode)
925 {
926 return clamp_val((mode ? (msec + 200) / 400 :
927 (msec + 50) / 100), 1, 255);
928 }
929
fan_from_reg8(u16 reg,unsigned int divreg)930 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
931 {
932 if (reg == 0 || reg == 255)
933 return 0;
934 return 1350000U / (reg << divreg);
935 }
936
fan_from_reg13(u16 reg,unsigned int divreg)937 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
938 {
939 if ((reg & 0xff1f) == 0xff1f)
940 return 0;
941
942 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
943
944 if (reg == 0)
945 return 0;
946
947 return 1350000U / reg;
948 }
949
fan_from_reg16(u16 reg,unsigned int divreg)950 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
951 {
952 if (reg == 0 || reg == 0xffff)
953 return 0;
954
955 /*
956 * Even though the registers are 16 bit wide, the fan divisor
957 * still applies.
958 */
959 return 1350000U / (reg << divreg);
960 }
961
fan_from_reg_rpm(u16 reg,unsigned int divreg)962 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
963 {
964 return reg;
965 }
966
fan_to_reg(u32 fan,unsigned int divreg)967 static u16 fan_to_reg(u32 fan, unsigned int divreg)
968 {
969 if (!fan)
970 return 0;
971
972 return (1350000U / fan) >> divreg;
973 }
974
975 static inline unsigned int
div_from_reg(u8 reg)976 div_from_reg(u8 reg)
977 {
978 return BIT(reg);
979 }
980
981 /*
982 * Some of the voltage inputs have internal scaling, the tables below
983 * contain 8 (the ADC LSB in mV) * scaling factor * 100
984 */
985 static const u16 scale_in[15] = {
986 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
987 800, 800
988 };
989
990 /*
991 * NCT6798 scaling:
992 * CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT, VTT, IN5, IN6, IN2,
993 * IN3, IN7, IN9, VHIF, IN10
994 * 15-17 for NCT6799 only
995 */
996 static const u16 scale_in_6798[NUM_IN] = {
997 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800,
998 800, 800, 800, 1600, 800
999 };
1000
in_from_reg(u8 reg,u8 nr,const u16 * scales)1001 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales)
1002 {
1003 return DIV_ROUND_CLOSEST(reg * scales[nr], 100);
1004 }
1005
in_to_reg(u32 val,u8 nr,const u16 * scales)1006 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scales)
1007 {
1008 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255);
1009 }
1010
1011 /* TSI temperatures are in 8.3 format */
tsi_temp_from_reg(unsigned int reg)1012 static inline unsigned int tsi_temp_from_reg(unsigned int reg)
1013 {
1014 return (reg >> 5) * 125;
1015 }
1016
1017 /*
1018 * Data structures and manipulation thereof
1019 */
1020
1021 struct sensor_device_template {
1022 struct device_attribute dev_attr;
1023 union {
1024 struct {
1025 u8 nr;
1026 u8 index;
1027 } s;
1028 int index;
1029 } u;
1030 bool s2; /* true if both index and nr are used */
1031 };
1032
1033 struct sensor_device_attr_u {
1034 union {
1035 struct sensor_device_attribute a1;
1036 struct sensor_device_attribute_2 a2;
1037 } u;
1038 char name[32];
1039 };
1040
1041 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
1042 .attr = {.name = _template, .mode = _mode }, \
1043 .show = _show, \
1044 .store = _store, \
1045 }
1046
1047 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1048 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1049 .u.index = _index, \
1050 .s2 = false }
1051
1052 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1053 _nr, _index) \
1054 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1055 .u.s.index = _index, \
1056 .u.s.nr = _nr, \
1057 .s2 = true }
1058
1059 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1060 static struct sensor_device_template sensor_dev_template_##_name \
1061 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
1062 _index)
1063
1064 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
1065 _nr, _index) \
1066 static struct sensor_device_template sensor_dev_template_##_name \
1067 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1068 _nr, _index)
1069
1070 struct sensor_template_group {
1071 struct sensor_device_template **templates;
1072 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1073 int base;
1074 };
1075
nct6775_add_template_attr_group(struct device * dev,struct nct6775_data * data,const struct sensor_template_group * tg,int repeat)1076 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data,
1077 const struct sensor_template_group *tg, int repeat)
1078 {
1079 struct attribute_group *group;
1080 struct sensor_device_attr_u *su;
1081 struct sensor_device_attribute *a;
1082 struct sensor_device_attribute_2 *a2;
1083 struct attribute **attrs;
1084 struct sensor_device_template **t;
1085 int i, count;
1086
1087 if (repeat <= 0)
1088 return -EINVAL;
1089
1090 t = tg->templates;
1091 for (count = 0; *t; t++, count++)
1092 ;
1093
1094 if (count == 0)
1095 return -EINVAL;
1096
1097 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1098 if (group == NULL)
1099 return -ENOMEM;
1100
1101 attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs),
1102 GFP_KERNEL);
1103 if (attrs == NULL)
1104 return -ENOMEM;
1105
1106 su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)),
1107 GFP_KERNEL);
1108 if (su == NULL)
1109 return -ENOMEM;
1110
1111 group->attrs = attrs;
1112 group->is_visible = tg->is_visible;
1113
1114 for (i = 0; i < repeat; i++) {
1115 t = tg->templates;
1116 while (*t != NULL) {
1117 snprintf(su->name, sizeof(su->name),
1118 (*t)->dev_attr.attr.name, tg->base + i);
1119 if ((*t)->s2) {
1120 a2 = &su->u.a2;
1121 sysfs_attr_init(&a2->dev_attr.attr);
1122 a2->dev_attr.attr.name = su->name;
1123 a2->nr = (*t)->u.s.nr + i;
1124 a2->index = (*t)->u.s.index;
1125 a2->dev_attr.attr.mode =
1126 (*t)->dev_attr.attr.mode;
1127 a2->dev_attr.show = (*t)->dev_attr.show;
1128 a2->dev_attr.store = (*t)->dev_attr.store;
1129 *attrs = &a2->dev_attr.attr;
1130 } else {
1131 a = &su->u.a1;
1132 sysfs_attr_init(&a->dev_attr.attr);
1133 a->dev_attr.attr.name = su->name;
1134 a->index = (*t)->u.index + i;
1135 a->dev_attr.attr.mode =
1136 (*t)->dev_attr.attr.mode;
1137 a->dev_attr.show = (*t)->dev_attr.show;
1138 a->dev_attr.store = (*t)->dev_attr.store;
1139 *attrs = &a->dev_attr.attr;
1140 }
1141 attrs++;
1142 su++;
1143 t++;
1144 }
1145 }
1146
1147 return nct6775_add_attr_group(data, group);
1148 }
1149
nct6775_reg_is_word_sized(struct nct6775_data * data,u16 reg)1150 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg)
1151 {
1152 switch (data->kind) {
1153 case nct6106:
1154 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1155 (reg >= 0x59 && reg < 0x69 && (reg & 1)) ||
1156 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1157 reg == 0x111 || reg == 0x121 || reg == 0x131;
1158 case nct6116:
1159 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1160 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b ||
1161 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 ||
1162 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 ||
1163 reg == 0x191 || reg == 0x1a1;
1164 case nct6775:
1165 return (((reg & 0xff00) == 0x100 ||
1166 (reg & 0xff00) == 0x200) &&
1167 ((reg & 0x00ff) == 0x50 ||
1168 (reg & 0x00ff) == 0x53 ||
1169 (reg & 0x00ff) == 0x55)) ||
1170 (reg & 0xfff0) == 0x630 ||
1171 reg == 0x640 || reg == 0x642 ||
1172 reg == 0x662 || reg == 0x669 ||
1173 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1174 reg == 0x73 || reg == 0x75 || reg == 0x77;
1175 case nct6776:
1176 return (((reg & 0xff00) == 0x100 ||
1177 (reg & 0xff00) == 0x200) &&
1178 ((reg & 0x00ff) == 0x50 ||
1179 (reg & 0x00ff) == 0x53 ||
1180 (reg & 0x00ff) == 0x55)) ||
1181 (reg & 0xfff0) == 0x630 ||
1182 reg == 0x402 ||
1183 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1184 reg == 0x640 || reg == 0x642 ||
1185 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1186 reg == 0x73 || reg == 0x75 || reg == 0x77;
1187 case nct6779:
1188 case nct6791:
1189 case nct6792:
1190 case nct6793:
1191 case nct6795:
1192 case nct6796:
1193 case nct6797:
1194 case nct6798:
1195 case nct6799:
1196 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1197 (reg & 0xfff0) == 0x4c0 ||
1198 reg == 0x402 ||
1199 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1200 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1201 reg == 0x640 || reg == 0x642 || reg == 0x64a ||
1202 reg == 0x64c ||
1203 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1204 reg == 0x7b || reg == 0x7d;
1205 }
1206 return false;
1207 }
1208 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized);
1209
1210 /* We left-align 8-bit temperature values to make the code simpler */
nct6775_read_temp(struct nct6775_data * data,u16 reg,u16 * val)1211 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val)
1212 {
1213 int err;
1214
1215 err = nct6775_read_value(data, reg, val);
1216 if (err)
1217 return err;
1218
1219 if (!nct6775_reg_is_word_sized(data, reg))
1220 *val <<= 8;
1221
1222 return 0;
1223 }
1224
1225 /* This function assumes that the caller holds data->update_lock */
nct6775_write_fan_div(struct nct6775_data * data,int nr)1226 static int nct6775_write_fan_div(struct nct6775_data *data, int nr)
1227 {
1228 u16 reg;
1229 int err;
1230 u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2;
1231 unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */
1232
1233 err = nct6775_read_value(data, fandiv_reg, ®);
1234 if (err)
1235 return err;
1236 reg &= 0x70 >> oddshift;
1237 reg |= (data->fan_div[nr] & 0x7) << oddshift;
1238 return nct6775_write_value(data, fandiv_reg, reg);
1239 }
1240
nct6775_write_fan_div_common(struct nct6775_data * data,int nr)1241 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1242 {
1243 if (data->kind == nct6775)
1244 return nct6775_write_fan_div(data, nr);
1245 return 0;
1246 }
1247
nct6775_update_fan_div(struct nct6775_data * data)1248 static int nct6775_update_fan_div(struct nct6775_data *data)
1249 {
1250 int err;
1251 u16 i;
1252
1253 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i);
1254 if (err)
1255 return err;
1256 data->fan_div[0] = i & 0x7;
1257 data->fan_div[1] = (i & 0x70) >> 4;
1258 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i);
1259 if (err)
1260 return err;
1261 data->fan_div[2] = i & 0x7;
1262 if (data->has_fan & BIT(3))
1263 data->fan_div[3] = (i & 0x70) >> 4;
1264
1265 return 0;
1266 }
1267
nct6775_update_fan_div_common(struct nct6775_data * data)1268 static int nct6775_update_fan_div_common(struct nct6775_data *data)
1269 {
1270 if (data->kind == nct6775)
1271 return nct6775_update_fan_div(data);
1272 return 0;
1273 }
1274
nct6775_init_fan_div(struct nct6775_data * data)1275 static int nct6775_init_fan_div(struct nct6775_data *data)
1276 {
1277 int i, err;
1278
1279 err = nct6775_update_fan_div_common(data);
1280 if (err)
1281 return err;
1282
1283 /*
1284 * For all fans, start with highest divider value if the divider
1285 * register is not initialized. This ensures that we get a
1286 * reading from the fan count register, even if it is not optimal.
1287 * We'll compute a better divider later on.
1288 */
1289 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1290 if (!(data->has_fan & BIT(i)))
1291 continue;
1292 if (data->fan_div[i] == 0) {
1293 data->fan_div[i] = 7;
1294 err = nct6775_write_fan_div_common(data, i);
1295 if (err)
1296 return err;
1297 }
1298 }
1299
1300 return 0;
1301 }
1302
nct6775_init_fan_common(struct device * dev,struct nct6775_data * data)1303 static int nct6775_init_fan_common(struct device *dev,
1304 struct nct6775_data *data)
1305 {
1306 int i, err;
1307 u16 reg;
1308
1309 if (data->has_fan_div) {
1310 err = nct6775_init_fan_div(data);
1311 if (err)
1312 return err;
1313 }
1314
1315 /*
1316 * If fan_min is not set (0), set it to 0xff to disable it. This
1317 * prevents the unnecessary warning when fanX_min is reported as 0.
1318 */
1319 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1320 if (data->has_fan_min & BIT(i)) {
1321 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®);
1322 if (err)
1323 return err;
1324 if (!reg) {
1325 err = nct6775_write_value(data, data->REG_FAN_MIN[i],
1326 data->has_fan_div ? 0xff : 0xff1f);
1327 if (err)
1328 return err;
1329 }
1330 }
1331 }
1332
1333 return 0;
1334 }
1335
nct6775_select_fan_div(struct device * dev,struct nct6775_data * data,int nr,u16 reg)1336 static int nct6775_select_fan_div(struct device *dev,
1337 struct nct6775_data *data, int nr, u16 reg)
1338 {
1339 int err;
1340 u8 fan_div = data->fan_div[nr];
1341 u16 fan_min;
1342
1343 if (!data->has_fan_div)
1344 return 0;
1345
1346 /*
1347 * If we failed to measure the fan speed, or the reported value is not
1348 * in the optimal range, and the clock divider can be modified,
1349 * let's try that for next time.
1350 */
1351 if (reg == 0x00 && fan_div < 0x07)
1352 fan_div++;
1353 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1354 fan_div--;
1355
1356 if (fan_div != data->fan_div[nr]) {
1357 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1358 nr + 1, div_from_reg(data->fan_div[nr]),
1359 div_from_reg(fan_div));
1360
1361 /* Preserve min limit if possible */
1362 if (data->has_fan_min & BIT(nr)) {
1363 fan_min = data->fan_min[nr];
1364 if (fan_div > data->fan_div[nr]) {
1365 if (fan_min != 255 && fan_min > 1)
1366 fan_min >>= 1;
1367 } else {
1368 if (fan_min != 255) {
1369 fan_min <<= 1;
1370 if (fan_min > 254)
1371 fan_min = 254;
1372 }
1373 }
1374 if (fan_min != data->fan_min[nr]) {
1375 data->fan_min[nr] = fan_min;
1376 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min);
1377 if (err)
1378 return err;
1379 }
1380 }
1381 data->fan_div[nr] = fan_div;
1382 err = nct6775_write_fan_div_common(data, nr);
1383 if (err)
1384 return err;
1385 }
1386
1387 return 0;
1388 }
1389
nct6775_update_pwm(struct device * dev)1390 static int nct6775_update_pwm(struct device *dev)
1391 {
1392 struct nct6775_data *data = dev_get_drvdata(dev);
1393 int i, j, err;
1394 u16 fanmodecfg, reg;
1395 bool duty_is_dc;
1396
1397 for (i = 0; i < data->pwm_num; i++) {
1398 if (!(data->has_pwm & BIT(i)))
1399 continue;
1400
1401 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®);
1402 if (err)
1403 return err;
1404 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]);
1405 data->pwm_mode[i] = !duty_is_dc;
1406
1407 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg);
1408 if (err)
1409 return err;
1410 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1411 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1412 err = nct6775_read_value(data, data->REG_PWM[j][i], ®);
1413 if (err)
1414 return err;
1415 data->pwm[j][i] = reg;
1416 }
1417 }
1418
1419 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1420 (fanmodecfg >> 4) & 7);
1421
1422 if (!data->temp_tolerance[0][i] ||
1423 data->pwm_enable[i] != speed_cruise)
1424 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1425 if (!data->target_speed_tolerance[i] ||
1426 data->pwm_enable[i] == speed_cruise) {
1427 u8 t = fanmodecfg & 0x0f;
1428
1429 if (data->REG_TOLERANCE_H) {
1430 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1431 if (err)
1432 return err;
1433 t |= (reg & 0x70) >> 1;
1434 }
1435 data->target_speed_tolerance[i] = t;
1436 }
1437
1438 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®);
1439 if (err)
1440 return err;
1441 data->temp_tolerance[1][i] = reg;
1442
1443 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®);
1444 if (err)
1445 return err;
1446 data->pwm_temp_sel[i] = reg & 0x1f;
1447 /* If fan can stop, report floor as 0 */
1448 if (reg & 0x80)
1449 data->pwm[2][i] = 0;
1450
1451 if (!data->REG_WEIGHT_TEMP_SEL[i])
1452 continue;
1453
1454 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®);
1455 if (err)
1456 return err;
1457 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1458 /* If weight is disabled, report weight source as 0 */
1459 if (!(reg & 0x80))
1460 data->pwm_weight_temp_sel[i] = 0;
1461
1462 /* Weight temp data */
1463 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1464 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®);
1465 if (err)
1466 return err;
1467 data->weight_temp[j][i] = reg;
1468 }
1469 }
1470
1471 return 0;
1472 }
1473
nct6775_update_pwm_limits(struct device * dev)1474 static int nct6775_update_pwm_limits(struct device *dev)
1475 {
1476 struct nct6775_data *data = dev_get_drvdata(dev);
1477 int i, j, err;
1478 u16 reg, reg_t;
1479
1480 for (i = 0; i < data->pwm_num; i++) {
1481 if (!(data->has_pwm & BIT(i)))
1482 continue;
1483
1484 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1485 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®);
1486 if (err)
1487 return err;
1488 data->fan_time[j][i] = reg;
1489 }
1490
1491 err = nct6775_read_value(data, data->REG_TARGET[i], ®_t);
1492 if (err)
1493 return err;
1494
1495 /* Update only in matching mode or if never updated */
1496 if (!data->target_temp[i] ||
1497 data->pwm_enable[i] == thermal_cruise)
1498 data->target_temp[i] = reg_t & data->target_temp_mask;
1499 if (!data->target_speed[i] ||
1500 data->pwm_enable[i] == speed_cruise) {
1501 if (data->REG_TOLERANCE_H) {
1502 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1503 if (err)
1504 return err;
1505 reg_t |= (reg & 0x0f) << 8;
1506 }
1507 data->target_speed[i] = reg_t;
1508 }
1509
1510 for (j = 0; j < data->auto_pwm_num; j++) {
1511 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®);
1512 if (err)
1513 return err;
1514 data->auto_pwm[i][j] = reg;
1515
1516 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®);
1517 if (err)
1518 return err;
1519 data->auto_temp[i][j] = reg;
1520 }
1521
1522 /* critical auto_pwm temperature data */
1523 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®);
1524 if (err)
1525 return err;
1526 data->auto_temp[i][data->auto_pwm_num] = reg;
1527
1528 switch (data->kind) {
1529 case nct6775:
1530 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®);
1531 if (err)
1532 return err;
1533 data->auto_pwm[i][data->auto_pwm_num] =
1534 (reg & 0x02) ? 0xff : 0x00;
1535 break;
1536 case nct6776:
1537 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1538 break;
1539 case nct6106:
1540 case nct6116:
1541 case nct6779:
1542 case nct6791:
1543 case nct6792:
1544 case nct6793:
1545 case nct6795:
1546 case nct6796:
1547 case nct6797:
1548 case nct6798:
1549 case nct6799:
1550 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®);
1551 if (err)
1552 return err;
1553 if (reg & data->CRITICAL_PWM_ENABLE_MASK) {
1554 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®);
1555 if (err)
1556 return err;
1557 } else {
1558 reg = 0xff;
1559 }
1560 data->auto_pwm[i][data->auto_pwm_num] = reg;
1561 break;
1562 }
1563 }
1564
1565 return 0;
1566 }
1567
nct6775_update_device(struct device * dev)1568 struct nct6775_data *nct6775_update_device(struct device *dev)
1569 {
1570 struct nct6775_data *data = dev_get_drvdata(dev);
1571 int i, j, err = 0;
1572 u16 reg;
1573
1574 mutex_lock(&data->update_lock);
1575
1576 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1577 || !data->valid) {
1578 /* Fan clock dividers */
1579 err = nct6775_update_fan_div_common(data);
1580 if (err)
1581 goto out;
1582
1583 /* Measured voltages and limits */
1584 for (i = 0; i < data->in_num; i++) {
1585 if (!(data->have_in & BIT(i)))
1586 continue;
1587
1588 err = nct6775_read_value(data, data->REG_VIN[i], ®);
1589 if (err)
1590 goto out;
1591 data->in[i][0] = reg;
1592
1593 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®);
1594 if (err)
1595 goto out;
1596 data->in[i][1] = reg;
1597
1598 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®);
1599 if (err)
1600 goto out;
1601 data->in[i][2] = reg;
1602 }
1603
1604 /* Measured fan speeds and limits */
1605 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1606 if (!(data->has_fan & BIT(i)))
1607 continue;
1608
1609 err = nct6775_read_value(data, data->REG_FAN[i], ®);
1610 if (err)
1611 goto out;
1612 data->rpm[i] = data->fan_from_reg(reg,
1613 data->fan_div[i]);
1614
1615 if (data->has_fan_min & BIT(i)) {
1616 u16 tmp;
1617
1618 err = nct6775_read_value(data, data->REG_FAN_MIN[i], &tmp);
1619 if (err)
1620 goto out;
1621 data->fan_min[i] = tmp;
1622 }
1623
1624 if (data->REG_FAN_PULSES[i]) {
1625 u16 tmp;
1626
1627 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], &tmp);
1628 if (err)
1629 goto out;
1630 data->fan_pulses[i] = (tmp >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1631 }
1632
1633 err = nct6775_select_fan_div(dev, data, i, reg);
1634 if (err)
1635 goto out;
1636 }
1637
1638 err = nct6775_update_pwm(dev);
1639 if (err)
1640 goto out;
1641
1642 err = nct6775_update_pwm_limits(dev);
1643 if (err)
1644 goto out;
1645
1646 /* Measured temperatures and limits */
1647 for (i = 0; i < NUM_TEMP; i++) {
1648 if (!(data->have_temp & BIT(i)))
1649 continue;
1650 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1651 if (data->reg_temp[j][i]) {
1652 err = nct6775_read_temp(data, data->reg_temp[j][i], ®);
1653 if (err)
1654 goto out;
1655 data->temp[j][i] = reg;
1656 }
1657 }
1658 if (i >= NUM_TEMP_FIXED ||
1659 !(data->have_temp_fixed & BIT(i)))
1660 continue;
1661 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®);
1662 if (err)
1663 goto out;
1664 data->temp_offset[i] = reg;
1665 }
1666
1667 for (i = 0; i < NUM_TSI_TEMP; i++) {
1668 if (!(data->have_tsi_temp & BIT(i)))
1669 continue;
1670 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®);
1671 if (err)
1672 goto out;
1673 data->tsi_temp[i] = reg;
1674 }
1675
1676 data->alarms = 0;
1677 for (i = 0; i < NUM_REG_ALARM; i++) {
1678 u16 alarm;
1679
1680 if (!data->REG_ALARM[i])
1681 continue;
1682 err = nct6775_read_value(data, data->REG_ALARM[i], &alarm);
1683 if (err)
1684 goto out;
1685 data->alarms |= ((u64)alarm) << (i << 3);
1686 }
1687
1688 data->beeps = 0;
1689 for (i = 0; i < NUM_REG_BEEP; i++) {
1690 u16 beep;
1691
1692 if (!data->REG_BEEP[i])
1693 continue;
1694 err = nct6775_read_value(data, data->REG_BEEP[i], &beep);
1695 if (err)
1696 goto out;
1697 data->beeps |= ((u64)beep) << (i << 3);
1698 }
1699
1700 data->last_updated = jiffies;
1701 data->valid = true;
1702 }
1703 out:
1704 mutex_unlock(&data->update_lock);
1705 return err ? ERR_PTR(err) : data;
1706 }
1707 EXPORT_SYMBOL_GPL(nct6775_update_device);
1708
1709 /*
1710 * Sysfs callback functions
1711 */
1712 static ssize_t
show_in_reg(struct device * dev,struct device_attribute * attr,char * buf)1713 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1714 {
1715 struct nct6775_data *data = nct6775_update_device(dev);
1716 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1717 int index = sattr->index;
1718 int nr = sattr->nr;
1719
1720 if (IS_ERR(data))
1721 return PTR_ERR(data);
1722
1723 return sysfs_emit(buf, "%ld\n",
1724 in_from_reg(data->in[nr][index], nr, data->scale_in));
1725 }
1726
1727 static ssize_t
store_in_reg(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1728 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1729 size_t count)
1730 {
1731 struct nct6775_data *data = dev_get_drvdata(dev);
1732 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1733 int index = sattr->index;
1734 int nr = sattr->nr;
1735 unsigned long val;
1736 int err;
1737
1738 err = kstrtoul(buf, 10, &val);
1739 if (err < 0)
1740 return err;
1741 mutex_lock(&data->update_lock);
1742 data->in[nr][index] = in_to_reg(val, nr, data->scale_in);
1743 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]);
1744 mutex_unlock(&data->update_lock);
1745 return err ? : count;
1746 }
1747
1748 ssize_t
nct6775_show_alarm(struct device * dev,struct device_attribute * attr,char * buf)1749 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1750 {
1751 struct nct6775_data *data = nct6775_update_device(dev);
1752 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1753 int nr;
1754
1755 if (IS_ERR(data))
1756 return PTR_ERR(data);
1757
1758 nr = data->ALARM_BITS[sattr->index];
1759 return sysfs_emit(buf, "%u\n",
1760 (unsigned int)((data->alarms >> nr) & 0x01));
1761 }
1762 EXPORT_SYMBOL_GPL(nct6775_show_alarm);
1763
find_temp_source(struct nct6775_data * data,int index,int count)1764 static int find_temp_source(struct nct6775_data *data, int index, int count)
1765 {
1766 int source = data->temp_src[index];
1767 int nr, err;
1768
1769 for (nr = 0; nr < count; nr++) {
1770 u16 src;
1771
1772 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src);
1773 if (err)
1774 return err;
1775 if ((src & 0x1f) == source)
1776 return nr;
1777 }
1778 return -ENODEV;
1779 }
1780
1781 static ssize_t
show_temp_alarm(struct device * dev,struct device_attribute * attr,char * buf)1782 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1783 {
1784 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1785 struct nct6775_data *data = nct6775_update_device(dev);
1786 unsigned int alarm = 0;
1787 int nr;
1788
1789 if (IS_ERR(data))
1790 return PTR_ERR(data);
1791
1792 /*
1793 * For temperatures, there is no fixed mapping from registers to alarm
1794 * bits. Alarm bits are determined by the temperature source mapping.
1795 */
1796 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1797 if (nr >= 0) {
1798 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1799
1800 alarm = (data->alarms >> bit) & 0x01;
1801 }
1802 return sysfs_emit(buf, "%u\n", alarm);
1803 }
1804
1805 ssize_t
nct6775_show_beep(struct device * dev,struct device_attribute * attr,char * buf)1806 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1807 {
1808 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1809 struct nct6775_data *data = nct6775_update_device(dev);
1810 int nr;
1811
1812 if (IS_ERR(data))
1813 return PTR_ERR(data);
1814
1815 nr = data->BEEP_BITS[sattr->index];
1816
1817 return sysfs_emit(buf, "%u\n",
1818 (unsigned int)((data->beeps >> nr) & 0x01));
1819 }
1820 EXPORT_SYMBOL_GPL(nct6775_show_beep);
1821
1822 ssize_t
nct6775_store_beep(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1823 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1824 {
1825 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1826 struct nct6775_data *data = dev_get_drvdata(dev);
1827 int nr = data->BEEP_BITS[sattr->index];
1828 int regindex = nr >> 3;
1829 unsigned long val;
1830 int err;
1831
1832 err = kstrtoul(buf, 10, &val);
1833 if (err < 0)
1834 return err;
1835 if (val > 1)
1836 return -EINVAL;
1837
1838 mutex_lock(&data->update_lock);
1839 if (val)
1840 data->beeps |= (1ULL << nr);
1841 else
1842 data->beeps &= ~(1ULL << nr);
1843 err = nct6775_write_value(data, data->REG_BEEP[regindex],
1844 (data->beeps >> (regindex << 3)) & 0xff);
1845 mutex_unlock(&data->update_lock);
1846 return err ? : count;
1847 }
1848 EXPORT_SYMBOL_GPL(nct6775_store_beep);
1849
1850 static ssize_t
show_temp_beep(struct device * dev,struct device_attribute * attr,char * buf)1851 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1852 {
1853 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1854 struct nct6775_data *data = nct6775_update_device(dev);
1855 unsigned int beep = 0;
1856 int nr;
1857
1858 if (IS_ERR(data))
1859 return PTR_ERR(data);
1860
1861 /*
1862 * For temperatures, there is no fixed mapping from registers to beep
1863 * enable bits. Beep enable bits are determined by the temperature
1864 * source mapping.
1865 */
1866 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1867 if (nr >= 0) {
1868 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1869
1870 beep = (data->beeps >> bit) & 0x01;
1871 }
1872 return sysfs_emit(buf, "%u\n", beep);
1873 }
1874
1875 static ssize_t
store_temp_beep(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1876 store_temp_beep(struct device *dev, struct device_attribute *attr,
1877 const char *buf, size_t count)
1878 {
1879 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1880 struct nct6775_data *data = dev_get_drvdata(dev);
1881 int nr, bit, regindex;
1882 unsigned long val;
1883 int err;
1884
1885 err = kstrtoul(buf, 10, &val);
1886 if (err < 0)
1887 return err;
1888 if (val > 1)
1889 return -EINVAL;
1890
1891 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1892 if (nr < 0)
1893 return nr;
1894
1895 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1896 regindex = bit >> 3;
1897
1898 mutex_lock(&data->update_lock);
1899 if (val)
1900 data->beeps |= (1ULL << bit);
1901 else
1902 data->beeps &= ~(1ULL << bit);
1903 err = nct6775_write_value(data, data->REG_BEEP[regindex],
1904 (data->beeps >> (regindex << 3)) & 0xff);
1905 mutex_unlock(&data->update_lock);
1906
1907 return err ? : count;
1908 }
1909
nct6775_in_is_visible(struct kobject * kobj,struct attribute * attr,int index)1910 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1911 struct attribute *attr, int index)
1912 {
1913 struct device *dev = kobj_to_dev(kobj);
1914 struct nct6775_data *data = dev_get_drvdata(dev);
1915 int in = index / 5; /* voltage index */
1916 int nr = index % 5; /* attribute index */
1917
1918 if (nr == 1 && data->ALARM_BITS[in] == -1)
1919 return 0;
1920
1921 if (!(data->have_in & BIT(in)))
1922 return 0;
1923
1924 return nct6775_attr_mode(data, attr);
1925 }
1926
1927 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0);
1928 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0);
1929 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0);
1930 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1);
1931 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2);
1932
1933 /*
1934 * nct6775_in_is_visible uses the index into the following array
1935 * to determine if attributes should be created or not.
1936 * Any change in order or content must be matched.
1937 */
1938 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1939 &sensor_dev_template_in_input,
1940 &sensor_dev_template_in_alarm,
1941 &sensor_dev_template_in_beep,
1942 &sensor_dev_template_in_min,
1943 &sensor_dev_template_in_max,
1944 NULL
1945 };
1946
1947 static const struct sensor_template_group nct6775_in_template_group = {
1948 .templates = nct6775_attributes_in_template,
1949 .is_visible = nct6775_in_is_visible,
1950 };
1951
1952 static ssize_t
show_fan(struct device * dev,struct device_attribute * attr,char * buf)1953 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1954 {
1955 struct nct6775_data *data = nct6775_update_device(dev);
1956 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1957 int nr = sattr->index;
1958
1959 if (IS_ERR(data))
1960 return PTR_ERR(data);
1961
1962 return sysfs_emit(buf, "%d\n", data->rpm[nr]);
1963 }
1964
1965 static ssize_t
show_fan_min(struct device * dev,struct device_attribute * attr,char * buf)1966 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1967 {
1968 struct nct6775_data *data = nct6775_update_device(dev);
1969 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1970 int nr = sattr->index;
1971
1972 if (IS_ERR(data))
1973 return PTR_ERR(data);
1974
1975 return sysfs_emit(buf, "%d\n",
1976 data->fan_from_reg_min(data->fan_min[nr],
1977 data->fan_div[nr]));
1978 }
1979
1980 static ssize_t
show_fan_div(struct device * dev,struct device_attribute * attr,char * buf)1981 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1982 {
1983 struct nct6775_data *data = nct6775_update_device(dev);
1984 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1985 int nr = sattr->index;
1986
1987 if (IS_ERR(data))
1988 return PTR_ERR(data);
1989
1990 return sysfs_emit(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1991 }
1992
1993 static ssize_t
store_fan_min(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1994 store_fan_min(struct device *dev, struct device_attribute *attr,
1995 const char *buf, size_t count)
1996 {
1997 struct nct6775_data *data = dev_get_drvdata(dev);
1998 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1999 int nr = sattr->index;
2000 unsigned long val;
2001 unsigned int reg;
2002 u8 new_div;
2003 int err;
2004
2005 err = kstrtoul(buf, 10, &val);
2006 if (err < 0)
2007 return err;
2008
2009 mutex_lock(&data->update_lock);
2010 if (!data->has_fan_div) {
2011 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
2012 if (!val) {
2013 val = 0xff1f;
2014 } else {
2015 if (val > 1350000U)
2016 val = 135000U;
2017 val = 1350000U / val;
2018 val = (val & 0x1f) | ((val << 3) & 0xff00);
2019 }
2020 data->fan_min[nr] = val;
2021 goto write_min; /* Leave fan divider alone */
2022 }
2023 if (!val) {
2024 /* No min limit, alarm disabled */
2025 data->fan_min[nr] = 255;
2026 new_div = data->fan_div[nr]; /* No change */
2027 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
2028 goto write_div;
2029 }
2030 reg = 1350000U / val;
2031 if (reg >= 128 * 255) {
2032 /*
2033 * Speed below this value cannot possibly be represented,
2034 * even with the highest divider (128)
2035 */
2036 data->fan_min[nr] = 254;
2037 new_div = 7; /* 128 == BIT(7) */
2038 dev_warn(dev,
2039 "fan%u low limit %lu below minimum %u, set to minimum\n",
2040 nr + 1, val, data->fan_from_reg_min(254, 7));
2041 } else if (!reg) {
2042 /*
2043 * Speed above this value cannot possibly be represented,
2044 * even with the lowest divider (1)
2045 */
2046 data->fan_min[nr] = 1;
2047 new_div = 0; /* 1 == BIT(0) */
2048 dev_warn(dev,
2049 "fan%u low limit %lu above maximum %u, set to maximum\n",
2050 nr + 1, val, data->fan_from_reg_min(1, 0));
2051 } else {
2052 /*
2053 * Automatically pick the best divider, i.e. the one such
2054 * that the min limit will correspond to a register value
2055 * in the 96..192 range
2056 */
2057 new_div = 0;
2058 while (reg > 192 && new_div < 7) {
2059 reg >>= 1;
2060 new_div++;
2061 }
2062 data->fan_min[nr] = reg;
2063 }
2064
2065 write_div:
2066 /*
2067 * Write both the fan clock divider (if it changed) and the new
2068 * fan min (unconditionally)
2069 */
2070 if (new_div != data->fan_div[nr]) {
2071 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2072 nr + 1, div_from_reg(data->fan_div[nr]),
2073 div_from_reg(new_div));
2074 data->fan_div[nr] = new_div;
2075 err = nct6775_write_fan_div_common(data, nr);
2076 if (err)
2077 goto write_min;
2078 /* Give the chip time to sample a new speed value */
2079 data->last_updated = jiffies;
2080 }
2081
2082 write_min:
2083 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2084 mutex_unlock(&data->update_lock);
2085
2086 return err ? : count;
2087 }
2088
2089 static ssize_t
show_fan_pulses(struct device * dev,struct device_attribute * attr,char * buf)2090 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2091 {
2092 struct nct6775_data *data = nct6775_update_device(dev);
2093 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2094 int p;
2095
2096 if (IS_ERR(data))
2097 return PTR_ERR(data);
2098
2099 p = data->fan_pulses[sattr->index];
2100 return sysfs_emit(buf, "%d\n", p ? : 4);
2101 }
2102
2103 static ssize_t
store_fan_pulses(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2104 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2105 const char *buf, size_t count)
2106 {
2107 struct nct6775_data *data = dev_get_drvdata(dev);
2108 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2109 int nr = sattr->index;
2110 unsigned long val;
2111 int err;
2112 u16 reg;
2113
2114 err = kstrtoul(buf, 10, &val);
2115 if (err < 0)
2116 return err;
2117
2118 if (val > 4)
2119 return -EINVAL;
2120
2121 mutex_lock(&data->update_lock);
2122 data->fan_pulses[nr] = val & 3;
2123 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®);
2124 if (err)
2125 goto out;
2126 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2127 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2128 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2129 out:
2130 mutex_unlock(&data->update_lock);
2131
2132 return err ? : count;
2133 }
2134
nct6775_fan_is_visible(struct kobject * kobj,struct attribute * attr,int index)2135 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2136 struct attribute *attr, int index)
2137 {
2138 struct device *dev = kobj_to_dev(kobj);
2139 struct nct6775_data *data = dev_get_drvdata(dev);
2140 int fan = index / 6; /* fan index */
2141 int nr = index % 6; /* attribute index */
2142
2143 if (!(data->has_fan & BIT(fan)))
2144 return 0;
2145
2146 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2147 return 0;
2148 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2149 return 0;
2150 if (nr == 3 && !data->REG_FAN_PULSES[fan])
2151 return 0;
2152 if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2153 return 0;
2154 if (nr == 5 && data->kind != nct6775)
2155 return 0;
2156
2157 return nct6775_attr_mode(data, attr);
2158 }
2159
2160 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0);
2161 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE);
2162 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep,
2163 nct6775_store_beep, FAN_ALARM_BASE);
2164 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0);
2165 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0);
2166 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0);
2167
2168 /*
2169 * nct6775_fan_is_visible uses the index into the following array
2170 * to determine if attributes should be created or not.
2171 * Any change in order or content must be matched.
2172 */
2173 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2174 &sensor_dev_template_fan_input,
2175 &sensor_dev_template_fan_alarm, /* 1 */
2176 &sensor_dev_template_fan_beep, /* 2 */
2177 &sensor_dev_template_fan_pulses,
2178 &sensor_dev_template_fan_min, /* 4 */
2179 &sensor_dev_template_fan_div, /* 5 */
2180 NULL
2181 };
2182
2183 static const struct sensor_template_group nct6775_fan_template_group = {
2184 .templates = nct6775_attributes_fan_template,
2185 .is_visible = nct6775_fan_is_visible,
2186 .base = 1,
2187 };
2188
2189 static ssize_t
show_temp_label(struct device * dev,struct device_attribute * attr,char * buf)2190 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2191 {
2192 struct nct6775_data *data = nct6775_update_device(dev);
2193 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2194 int nr = sattr->index;
2195
2196 if (IS_ERR(data))
2197 return PTR_ERR(data);
2198
2199 return sysfs_emit(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2200 }
2201
2202 static ssize_t
show_temp(struct device * dev,struct device_attribute * attr,char * buf)2203 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2204 {
2205 struct nct6775_data *data = nct6775_update_device(dev);
2206 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2207 int nr = sattr->nr;
2208 int index = sattr->index;
2209
2210 if (IS_ERR(data))
2211 return PTR_ERR(data);
2212
2213 return sysfs_emit(buf, "%d\n",
2214 LM75_TEMP_FROM_REG(data->temp[index][nr]));
2215 }
2216
2217 static ssize_t
store_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2218 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2219 size_t count)
2220 {
2221 struct nct6775_data *data = dev_get_drvdata(dev);
2222 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2223 int nr = sattr->nr;
2224 int index = sattr->index;
2225 int err;
2226 long val;
2227
2228 err = kstrtol(buf, 10, &val);
2229 if (err < 0)
2230 return err;
2231
2232 mutex_lock(&data->update_lock);
2233 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2234 err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]);
2235 mutex_unlock(&data->update_lock);
2236 return err ? : count;
2237 }
2238
2239 static ssize_t
show_temp_offset(struct device * dev,struct device_attribute * attr,char * buf)2240 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2241 {
2242 struct nct6775_data *data = nct6775_update_device(dev);
2243 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2244
2245 if (IS_ERR(data))
2246 return PTR_ERR(data);
2247
2248 return sysfs_emit(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2249 }
2250
2251 static ssize_t
store_temp_offset(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2252 store_temp_offset(struct device *dev, struct device_attribute *attr,
2253 const char *buf, size_t count)
2254 {
2255 struct nct6775_data *data = dev_get_drvdata(dev);
2256 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2257 int nr = sattr->index;
2258 long val;
2259 int err;
2260
2261 err = kstrtol(buf, 10, &val);
2262 if (err < 0)
2263 return err;
2264
2265 val = DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), 1000);
2266
2267 mutex_lock(&data->update_lock);
2268 data->temp_offset[nr] = val;
2269 err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2270 mutex_unlock(&data->update_lock);
2271
2272 return err ? : count;
2273 }
2274
2275 static ssize_t
show_temp_type(struct device * dev,struct device_attribute * attr,char * buf)2276 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2277 {
2278 struct nct6775_data *data = nct6775_update_device(dev);
2279 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2280 int nr = sattr->index;
2281
2282 if (IS_ERR(data))
2283 return PTR_ERR(data);
2284
2285 return sysfs_emit(buf, "%d\n", (int)data->temp_type[nr]);
2286 }
2287
2288 static ssize_t
store_temp_type(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2289 store_temp_type(struct device *dev, struct device_attribute *attr,
2290 const char *buf, size_t count)
2291 {
2292 struct nct6775_data *data = nct6775_update_device(dev);
2293 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2294 int nr = sattr->index;
2295 unsigned long val;
2296 int err;
2297 u8 vbit, dbit;
2298 u16 vbat, diode;
2299
2300 if (IS_ERR(data))
2301 return PTR_ERR(data);
2302
2303 err = kstrtoul(buf, 10, &val);
2304 if (err < 0)
2305 return err;
2306
2307 if (val != 1 && val != 3 && val != 4)
2308 return -EINVAL;
2309
2310 mutex_lock(&data->update_lock);
2311
2312 data->temp_type[nr] = val;
2313 vbit = 0x02 << nr;
2314 dbit = data->DIODE_MASK << nr;
2315
2316 err = nct6775_read_value(data, data->REG_VBAT, &vbat);
2317 if (err)
2318 goto out;
2319 vbat &= ~vbit;
2320
2321 err = nct6775_read_value(data, data->REG_DIODE, &diode);
2322 if (err)
2323 goto out;
2324 diode &= ~dbit;
2325
2326 switch (val) {
2327 case 1: /* CPU diode (diode, current mode) */
2328 vbat |= vbit;
2329 diode |= dbit;
2330 break;
2331 case 3: /* diode, voltage mode */
2332 vbat |= dbit;
2333 break;
2334 case 4: /* thermistor */
2335 break;
2336 }
2337 err = nct6775_write_value(data, data->REG_VBAT, vbat);
2338 if (err)
2339 goto out;
2340 err = nct6775_write_value(data, data->REG_DIODE, diode);
2341 out:
2342 mutex_unlock(&data->update_lock);
2343 return err ? : count;
2344 }
2345
nct6775_temp_is_visible(struct kobject * kobj,struct attribute * attr,int index)2346 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2347 struct attribute *attr, int index)
2348 {
2349 struct device *dev = kobj_to_dev(kobj);
2350 struct nct6775_data *data = dev_get_drvdata(dev);
2351 int temp = index / 10; /* temp index */
2352 int nr = index % 10; /* attribute index */
2353
2354 if (!(data->have_temp & BIT(temp)))
2355 return 0;
2356
2357 if (nr == 1 && !data->temp_label)
2358 return 0;
2359
2360 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2361 return 0; /* alarm */
2362
2363 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2364 return 0; /* beep */
2365
2366 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2367 return 0;
2368
2369 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2370 return 0;
2371
2372 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2373 return 0;
2374
2375 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2376 return 0;
2377
2378 /* offset and type only apply to fixed sensors */
2379 if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2380 return 0;
2381
2382 return nct6775_attr_mode(data, attr);
2383 }
2384
2385 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0);
2386 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0);
2387 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1);
2388 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2);
2389 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3);
2390 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4);
2391 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0);
2392 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0);
2393 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0);
2394 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0);
2395
2396 /*
2397 * nct6775_temp_is_visible uses the index into the following array
2398 * to determine if attributes should be created or not.
2399 * Any change in order or content must be matched.
2400 */
2401 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2402 &sensor_dev_template_temp_input,
2403 &sensor_dev_template_temp_label,
2404 &sensor_dev_template_temp_alarm, /* 2 */
2405 &sensor_dev_template_temp_beep, /* 3 */
2406 &sensor_dev_template_temp_max, /* 4 */
2407 &sensor_dev_template_temp_max_hyst, /* 5 */
2408 &sensor_dev_template_temp_crit, /* 6 */
2409 &sensor_dev_template_temp_lcrit, /* 7 */
2410 &sensor_dev_template_temp_offset, /* 8 */
2411 &sensor_dev_template_temp_type, /* 9 */
2412 NULL
2413 };
2414
2415 static const struct sensor_template_group nct6775_temp_template_group = {
2416 .templates = nct6775_attributes_temp_template,
2417 .is_visible = nct6775_temp_is_visible,
2418 .base = 1,
2419 };
2420
show_tsi_temp(struct device * dev,struct device_attribute * attr,char * buf)2421 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf)
2422 {
2423 struct nct6775_data *data = nct6775_update_device(dev);
2424 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2425
2426 if (IS_ERR(data))
2427 return PTR_ERR(data);
2428
2429 return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index]));
2430 }
2431
show_tsi_temp_label(struct device * dev,struct device_attribute * attr,char * buf)2432 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2433 {
2434 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2435
2436 return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index);
2437 }
2438
2439 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0);
2440 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0);
2441
nct6775_tsi_temp_is_visible(struct kobject * kobj,struct attribute * attr,int index)2442 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr,
2443 int index)
2444 {
2445 struct device *dev = kobj_to_dev(kobj);
2446 struct nct6775_data *data = dev_get_drvdata(dev);
2447 int temp = index / 2;
2448
2449 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0;
2450 }
2451
2452 /*
2453 * The index calculation in nct6775_tsi_temp_is_visible() must be kept in
2454 * sync with the size of this array.
2455 */
2456 static struct sensor_device_template *nct6775_tsi_temp_template[] = {
2457 &sensor_dev_template_tsi_temp_input,
2458 &sensor_dev_template_tsi_temp_label,
2459 NULL
2460 };
2461
2462 static ssize_t
show_pwm_mode(struct device * dev,struct device_attribute * attr,char * buf)2463 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2464 {
2465 struct nct6775_data *data = nct6775_update_device(dev);
2466 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2467
2468 if (IS_ERR(data))
2469 return PTR_ERR(data);
2470
2471 return sysfs_emit(buf, "%d\n", data->pwm_mode[sattr->index]);
2472 }
2473
2474 static ssize_t
store_pwm_mode(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2475 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2476 const char *buf, size_t count)
2477 {
2478 struct nct6775_data *data = dev_get_drvdata(dev);
2479 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2480 int nr = sattr->index;
2481 unsigned long val;
2482 int err;
2483 u16 reg;
2484
2485 err = kstrtoul(buf, 10, &val);
2486 if (err < 0)
2487 return err;
2488
2489 if (val > 1)
2490 return -EINVAL;
2491
2492 /* Setting DC mode (0) is not supported for all chips/channels */
2493 if (data->REG_PWM_MODE[nr] == 0) {
2494 if (!val)
2495 return -EINVAL;
2496 return count;
2497 }
2498
2499 mutex_lock(&data->update_lock);
2500 data->pwm_mode[nr] = val;
2501 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®);
2502 if (err)
2503 goto out;
2504 reg &= ~data->PWM_MODE_MASK[nr];
2505 if (!val)
2506 reg |= data->PWM_MODE_MASK[nr];
2507 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2508 out:
2509 mutex_unlock(&data->update_lock);
2510 return err ? : count;
2511 }
2512
2513 static ssize_t
show_pwm(struct device * dev,struct device_attribute * attr,char * buf)2514 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2515 {
2516 struct nct6775_data *data = nct6775_update_device(dev);
2517 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2518 int nr = sattr->nr;
2519 int index = sattr->index;
2520 int err;
2521 u16 pwm;
2522
2523 if (IS_ERR(data))
2524 return PTR_ERR(data);
2525
2526 /*
2527 * For automatic fan control modes, show current pwm readings.
2528 * Otherwise, show the configured value.
2529 */
2530 if (index == 0 && data->pwm_enable[nr] > manual) {
2531 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm);
2532 if (err)
2533 return err;
2534 } else {
2535 pwm = data->pwm[index][nr];
2536 }
2537
2538 return sysfs_emit(buf, "%d\n", pwm);
2539 }
2540
2541 static ssize_t
store_pwm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2542 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2543 size_t count)
2544 {
2545 struct nct6775_data *data = dev_get_drvdata(dev);
2546 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2547 int nr = sattr->nr;
2548 int index = sattr->index;
2549 unsigned long val;
2550 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2551 int maxval[7]
2552 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2553 int err;
2554 u16 reg;
2555
2556 /*
2557 * The fan control mode should be set to manual if the user wants to adjust
2558 * the fan speed. Otherwise, it will fail to set.
2559 */
2560 if (index == 0 && data->pwm_enable[nr] > manual)
2561 return -EBUSY;
2562
2563 err = kstrtoul(buf, 10, &val);
2564 if (err < 0)
2565 return err;
2566 val = clamp_val(val, minval[index], maxval[index]);
2567
2568 mutex_lock(&data->update_lock);
2569 data->pwm[index][nr] = val;
2570 err = nct6775_write_value(data, data->REG_PWM[index][nr], val);
2571 if (err)
2572 goto out;
2573 if (index == 2) { /* floor: disable if val == 0 */
2574 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2575 if (err)
2576 goto out;
2577 reg &= 0x7f;
2578 if (val)
2579 reg |= 0x80;
2580 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2581 }
2582 out:
2583 mutex_unlock(&data->update_lock);
2584 return err ? : count;
2585 }
2586
2587 /* Returns 0 if OK, -EINVAL otherwise */
check_trip_points(struct nct6775_data * data,int nr)2588 static int check_trip_points(struct nct6775_data *data, int nr)
2589 {
2590 int i;
2591
2592 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2593 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2594 return -EINVAL;
2595 }
2596 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2597 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2598 return -EINVAL;
2599 }
2600 /* validate critical temperature and pwm if enabled (pwm > 0) */
2601 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2602 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2603 data->auto_temp[nr][data->auto_pwm_num] ||
2604 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2605 data->auto_pwm[nr][data->auto_pwm_num])
2606 return -EINVAL;
2607 }
2608 return 0;
2609 }
2610
pwm_update_registers(struct nct6775_data * data,int nr)2611 static int pwm_update_registers(struct nct6775_data *data, int nr)
2612 {
2613 u16 reg;
2614 int err;
2615
2616 switch (data->pwm_enable[nr]) {
2617 case off:
2618 case manual:
2619 break;
2620 case speed_cruise:
2621 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2622 if (err)
2623 return err;
2624 reg = (reg & ~data->tolerance_mask) |
2625 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2626 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2627 if (err)
2628 return err;
2629 err = nct6775_write_value(data, data->REG_TARGET[nr],
2630 data->target_speed[nr] & 0xff);
2631 if (err)
2632 return err;
2633 if (data->REG_TOLERANCE_H) {
2634 reg = (data->target_speed[nr] >> 8) & 0x0f;
2635 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2636 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg);
2637 if (err)
2638 return err;
2639 }
2640 break;
2641 case thermal_cruise:
2642 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]);
2643 if (err)
2644 return err;
2645 fallthrough;
2646 default:
2647 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2648 if (err)
2649 return err;
2650 reg = (reg & ~data->tolerance_mask) |
2651 data->temp_tolerance[0][nr];
2652 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2653 if (err)
2654 return err;
2655 break;
2656 }
2657
2658 return 0;
2659 }
2660
2661 static ssize_t
show_pwm_enable(struct device * dev,struct device_attribute * attr,char * buf)2662 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2663 {
2664 struct nct6775_data *data = nct6775_update_device(dev);
2665 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2666
2667 if (IS_ERR(data))
2668 return PTR_ERR(data);
2669
2670 return sysfs_emit(buf, "%d\n", data->pwm_enable[sattr->index]);
2671 }
2672
2673 static ssize_t
store_pwm_enable(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2674 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2675 const char *buf, size_t count)
2676 {
2677 struct nct6775_data *data = dev_get_drvdata(dev);
2678 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2679 int nr = sattr->index;
2680 unsigned long val;
2681 int err;
2682 u16 reg;
2683
2684 err = kstrtoul(buf, 10, &val);
2685 if (err < 0)
2686 return err;
2687
2688 if (val > sf4)
2689 return -EINVAL;
2690
2691 if (val == sf3 && data->kind != nct6775)
2692 return -EINVAL;
2693
2694 if (val == sf4 && check_trip_points(data, nr)) {
2695 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2696 dev_err(dev, "Adjust trip points and try again\n");
2697 return -EINVAL;
2698 }
2699
2700 mutex_lock(&data->update_lock);
2701 data->pwm_enable[nr] = val;
2702 if (val == off) {
2703 /*
2704 * turn off pwm control: select manual mode, set pwm to maximum
2705 */
2706 data->pwm[0][nr] = 255;
2707 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2708 if (err)
2709 goto out;
2710 }
2711 err = pwm_update_registers(data, nr);
2712 if (err)
2713 goto out;
2714 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2715 if (err)
2716 goto out;
2717 reg &= 0x0f;
2718 reg |= pwm_enable_to_reg(val) << 4;
2719 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2720 out:
2721 mutex_unlock(&data->update_lock);
2722 return err ? : count;
2723 }
2724
2725 static ssize_t
show_pwm_temp_sel_common(struct nct6775_data * data,char * buf,int src)2726 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2727 {
2728 int i, sel = 0;
2729
2730 for (i = 0; i < NUM_TEMP; i++) {
2731 if (!(data->have_temp & BIT(i)))
2732 continue;
2733 if (src == data->temp_src[i]) {
2734 sel = i + 1;
2735 break;
2736 }
2737 }
2738
2739 return sysfs_emit(buf, "%d\n", sel);
2740 }
2741
2742 static ssize_t
show_pwm_temp_sel(struct device * dev,struct device_attribute * attr,char * buf)2743 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2744 {
2745 struct nct6775_data *data = nct6775_update_device(dev);
2746 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2747 int index = sattr->index;
2748
2749 if (IS_ERR(data))
2750 return PTR_ERR(data);
2751
2752 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2753 }
2754
2755 static ssize_t
store_pwm_temp_sel(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2756 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2757 const char *buf, size_t count)
2758 {
2759 struct nct6775_data *data = nct6775_update_device(dev);
2760 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2761 int nr = sattr->index;
2762 unsigned long val;
2763 int err, src;
2764 u16 reg;
2765
2766 if (IS_ERR(data))
2767 return PTR_ERR(data);
2768
2769 err = kstrtoul(buf, 10, &val);
2770 if (err < 0)
2771 return err;
2772 if (val == 0 || val > NUM_TEMP)
2773 return -EINVAL;
2774 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
2775 return -EINVAL;
2776
2777 mutex_lock(&data->update_lock);
2778 src = data->temp_src[val - 1];
2779 data->pwm_temp_sel[nr] = src;
2780 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2781 if (err)
2782 goto out;
2783 reg &= 0xe0;
2784 reg |= src;
2785 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2786 out:
2787 mutex_unlock(&data->update_lock);
2788
2789 return err ? : count;
2790 }
2791
2792 static ssize_t
show_pwm_weight_temp_sel(struct device * dev,struct device_attribute * attr,char * buf)2793 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2794 char *buf)
2795 {
2796 struct nct6775_data *data = nct6775_update_device(dev);
2797 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2798 int index = sattr->index;
2799
2800 if (IS_ERR(data))
2801 return PTR_ERR(data);
2802
2803 return show_pwm_temp_sel_common(data, buf,
2804 data->pwm_weight_temp_sel[index]);
2805 }
2806
2807 static ssize_t
store_pwm_weight_temp_sel(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2808 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2809 const char *buf, size_t count)
2810 {
2811 struct nct6775_data *data = nct6775_update_device(dev);
2812 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2813 int nr = sattr->index;
2814 unsigned long val;
2815 int err, src;
2816 u16 reg;
2817
2818 if (IS_ERR(data))
2819 return PTR_ERR(data);
2820
2821 err = kstrtoul(buf, 10, &val);
2822 if (err < 0)
2823 return err;
2824 if (val > NUM_TEMP)
2825 return -EINVAL;
2826 val = array_index_nospec(val, NUM_TEMP + 1);
2827 if (val && (!(data->have_temp & BIT(val - 1)) ||
2828 !data->temp_src[val - 1]))
2829 return -EINVAL;
2830
2831 mutex_lock(&data->update_lock);
2832 if (val) {
2833 src = data->temp_src[val - 1];
2834 data->pwm_weight_temp_sel[nr] = src;
2835 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2836 if (err)
2837 goto out;
2838 reg &= 0xe0;
2839 reg |= (src | 0x80);
2840 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2841 } else {
2842 data->pwm_weight_temp_sel[nr] = 0;
2843 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2844 if (err)
2845 goto out;
2846 reg &= 0x7f;
2847 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2848 }
2849 out:
2850 mutex_unlock(&data->update_lock);
2851
2852 return err ? : count;
2853 }
2854
2855 static ssize_t
show_target_temp(struct device * dev,struct device_attribute * attr,char * buf)2856 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2857 {
2858 struct nct6775_data *data = nct6775_update_device(dev);
2859 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2860
2861 if (IS_ERR(data))
2862 return PTR_ERR(data);
2863
2864 return sysfs_emit(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2865 }
2866
2867 static ssize_t
store_target_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2868 store_target_temp(struct device *dev, struct device_attribute *attr,
2869 const char *buf, size_t count)
2870 {
2871 struct nct6775_data *data = dev_get_drvdata(dev);
2872 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2873 int nr = sattr->index;
2874 unsigned long val;
2875 int err;
2876
2877 err = kstrtoul(buf, 10, &val);
2878 if (err < 0)
2879 return err;
2880
2881 val = DIV_ROUND_CLOSEST(clamp_val(val, 0, data->target_temp_mask * 1000), 1000);
2882
2883 mutex_lock(&data->update_lock);
2884 data->target_temp[nr] = val;
2885 err = pwm_update_registers(data, nr);
2886 mutex_unlock(&data->update_lock);
2887 return err ? : count;
2888 }
2889
2890 static ssize_t
show_target_speed(struct device * dev,struct device_attribute * attr,char * buf)2891 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2892 {
2893 struct nct6775_data *data = nct6775_update_device(dev);
2894 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2895 int nr = sattr->index;
2896
2897 if (IS_ERR(data))
2898 return PTR_ERR(data);
2899
2900 return sysfs_emit(buf, "%d\n",
2901 fan_from_reg16(data->target_speed[nr],
2902 data->fan_div[nr]));
2903 }
2904
2905 static ssize_t
store_target_speed(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2906 store_target_speed(struct device *dev, struct device_attribute *attr,
2907 const char *buf, size_t count)
2908 {
2909 struct nct6775_data *data = dev_get_drvdata(dev);
2910 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2911 int nr = sattr->index;
2912 unsigned long val;
2913 int err;
2914 u16 speed;
2915
2916 err = kstrtoul(buf, 10, &val);
2917 if (err < 0)
2918 return err;
2919
2920 val = clamp_val(val, 0, 1350000U);
2921 speed = fan_to_reg(val, data->fan_div[nr]);
2922
2923 mutex_lock(&data->update_lock);
2924 data->target_speed[nr] = speed;
2925 err = pwm_update_registers(data, nr);
2926 mutex_unlock(&data->update_lock);
2927 return err ? : count;
2928 }
2929
2930 static ssize_t
show_temp_tolerance(struct device * dev,struct device_attribute * attr,char * buf)2931 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2932 char *buf)
2933 {
2934 struct nct6775_data *data = nct6775_update_device(dev);
2935 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2936 int nr = sattr->nr;
2937 int index = sattr->index;
2938
2939 if (IS_ERR(data))
2940 return PTR_ERR(data);
2941
2942 return sysfs_emit(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2943 }
2944
2945 static ssize_t
store_temp_tolerance(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2946 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2947 const char *buf, size_t count)
2948 {
2949 struct nct6775_data *data = dev_get_drvdata(dev);
2950 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2951 int nr = sattr->nr;
2952 int index = sattr->index;
2953 unsigned long val;
2954 int err;
2955
2956 err = kstrtoul(buf, 10, &val);
2957 if (err < 0)
2958 return err;
2959
2960 /* Limit tolerance as needed */
2961 val = DIV_ROUND_CLOSEST(clamp_val(val, 0, data->tolerance_mask * 1000), 1000);
2962
2963 mutex_lock(&data->update_lock);
2964 data->temp_tolerance[index][nr] = val;
2965 if (index)
2966 err = pwm_update_registers(data, nr);
2967 else
2968 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val);
2969 mutex_unlock(&data->update_lock);
2970 return err ? : count;
2971 }
2972
2973 /*
2974 * Fan speed tolerance is a tricky beast, since the associated register is
2975 * a tick counter, but the value is reported and configured as rpm.
2976 * Compute resulting low and high rpm values and report the difference.
2977 * A fan speed tolerance only makes sense if a fan target speed has been
2978 * configured, so only display values other than 0 if that is the case.
2979 */
2980 static ssize_t
show_speed_tolerance(struct device * dev,struct device_attribute * attr,char * buf)2981 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2982 char *buf)
2983 {
2984 struct nct6775_data *data = nct6775_update_device(dev);
2985 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2986 int nr = sattr->index;
2987 int target, tolerance = 0;
2988
2989 if (IS_ERR(data))
2990 return PTR_ERR(data);
2991
2992 target = data->target_speed[nr];
2993
2994 if (target) {
2995 int low = target - data->target_speed_tolerance[nr];
2996 int high = target + data->target_speed_tolerance[nr];
2997
2998 if (low <= 0)
2999 low = 1;
3000 if (high > 0xffff)
3001 high = 0xffff;
3002 if (high < low)
3003 high = low;
3004
3005 tolerance = (fan_from_reg16(low, data->fan_div[nr])
3006 - fan_from_reg16(high, data->fan_div[nr])) / 2;
3007 }
3008
3009 return sysfs_emit(buf, "%d\n", tolerance);
3010 }
3011
3012 static ssize_t
store_speed_tolerance(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3013 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
3014 const char *buf, size_t count)
3015 {
3016 struct nct6775_data *data = dev_get_drvdata(dev);
3017 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3018 int nr = sattr->index;
3019 unsigned long val;
3020 int err;
3021 int low, high;
3022
3023 err = kstrtoul(buf, 10, &val);
3024 if (err < 0)
3025 return err;
3026
3027 high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val;
3028 low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val;
3029 if (low <= 0)
3030 low = 1;
3031 if (high < low)
3032 high = low;
3033
3034 val = (fan_to_reg(low, data->fan_div[nr]) -
3035 fan_to_reg(high, data->fan_div[nr])) / 2;
3036
3037 /* Limit tolerance as needed */
3038 val = clamp_val(val, 0, data->speed_tolerance_limit);
3039
3040 mutex_lock(&data->update_lock);
3041 data->target_speed_tolerance[nr] = val;
3042 err = pwm_update_registers(data, nr);
3043 mutex_unlock(&data->update_lock);
3044 return err ? : count;
3045 }
3046
3047 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0);
3048 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0);
3049 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0);
3050 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0);
3051 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0);
3052 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0);
3053 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance,
3054 store_speed_tolerance, 0);
3055
3056 /* Smart Fan registers */
3057
3058 static ssize_t
show_weight_temp(struct device * dev,struct device_attribute * attr,char * buf)3059 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
3060 {
3061 struct nct6775_data *data = nct6775_update_device(dev);
3062 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3063 int nr = sattr->nr;
3064 int index = sattr->index;
3065
3066 if (IS_ERR(data))
3067 return PTR_ERR(data);
3068
3069 return sysfs_emit(buf, "%d\n", data->weight_temp[index][nr] * 1000);
3070 }
3071
3072 static ssize_t
store_weight_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3073 store_weight_temp(struct device *dev, struct device_attribute *attr,
3074 const char *buf, size_t count)
3075 {
3076 struct nct6775_data *data = dev_get_drvdata(dev);
3077 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3078 int nr = sattr->nr;
3079 int index = sattr->index;
3080 unsigned long val;
3081 int err;
3082
3083 err = kstrtoul(buf, 10, &val);
3084 if (err < 0)
3085 return err;
3086
3087 val = DIV_ROUND_CLOSEST(clamp_val(val, 0, 255000), 1000);
3088
3089 mutex_lock(&data->update_lock);
3090 data->weight_temp[index][nr] = val;
3091 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
3092 mutex_unlock(&data->update_lock);
3093 return err ? : count;
3094 }
3095
3096 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644,
3097 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
3098 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
3099 0644, show_weight_temp, store_weight_temp, 0, 0);
3100 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
3101 0644, show_weight_temp, store_weight_temp, 0, 1);
3102 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
3103 0644, show_weight_temp, store_weight_temp, 0, 2);
3104 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5);
3105 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6);
3106
3107 static ssize_t
show_fan_time(struct device * dev,struct device_attribute * attr,char * buf)3108 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
3109 {
3110 struct nct6775_data *data = nct6775_update_device(dev);
3111 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3112 int nr = sattr->nr;
3113 int index = sattr->index;
3114
3115 if (IS_ERR(data))
3116 return PTR_ERR(data);
3117
3118 return sysfs_emit(buf, "%d\n",
3119 step_time_from_reg(data->fan_time[index][nr],
3120 data->pwm_mode[nr]));
3121 }
3122
3123 static ssize_t
store_fan_time(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3124 store_fan_time(struct device *dev, struct device_attribute *attr,
3125 const char *buf, size_t count)
3126 {
3127 struct nct6775_data *data = dev_get_drvdata(dev);
3128 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3129 int nr = sattr->nr;
3130 int index = sattr->index;
3131 unsigned long val;
3132 int err;
3133
3134 err = kstrtoul(buf, 10, &val);
3135 if (err < 0)
3136 return err;
3137
3138 val = step_time_to_reg(val, data->pwm_mode[nr]);
3139 mutex_lock(&data->update_lock);
3140 data->fan_time[index][nr] = val;
3141 err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
3142 mutex_unlock(&data->update_lock);
3143 return err ? : count;
3144 }
3145
3146 static ssize_t
show_auto_pwm(struct device * dev,struct device_attribute * attr,char * buf)3147 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
3148 {
3149 struct nct6775_data *data = nct6775_update_device(dev);
3150 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3151
3152 if (IS_ERR(data))
3153 return PTR_ERR(data);
3154
3155 return sysfs_emit(buf, "%d\n",
3156 data->auto_pwm[sattr->nr][sattr->index]);
3157 }
3158
3159 static ssize_t
store_auto_pwm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3160 store_auto_pwm(struct device *dev, struct device_attribute *attr,
3161 const char *buf, size_t count)
3162 {
3163 struct nct6775_data *data = dev_get_drvdata(dev);
3164 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3165 int nr = sattr->nr;
3166 int point = sattr->index;
3167 unsigned long val;
3168 int err;
3169 u16 reg;
3170
3171 err = kstrtoul(buf, 10, &val);
3172 if (err < 0)
3173 return err;
3174 if (val > 255)
3175 return -EINVAL;
3176
3177 if (point == data->auto_pwm_num) {
3178 if (data->kind != nct6775 && !val)
3179 return -EINVAL;
3180 if (data->kind != nct6779 && val)
3181 val = 0xff;
3182 }
3183
3184 mutex_lock(&data->update_lock);
3185 data->auto_pwm[nr][point] = val;
3186 if (point < data->auto_pwm_num) {
3187 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point),
3188 data->auto_pwm[nr][point]);
3189 } else {
3190 switch (data->kind) {
3191 case nct6775:
3192 /* disable if needed (pwm == 0) */
3193 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®);
3194 if (err)
3195 break;
3196 if (val)
3197 reg |= 0x02;
3198 else
3199 reg &= ~0x02;
3200 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg);
3201 break;
3202 case nct6776:
3203 break; /* always enabled, nothing to do */
3204 case nct6106:
3205 case nct6116:
3206 case nct6779:
3207 case nct6791:
3208 case nct6792:
3209 case nct6793:
3210 case nct6795:
3211 case nct6796:
3212 case nct6797:
3213 case nct6798:
3214 case nct6799:
3215 err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val);
3216 if (err)
3217 break;
3218 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®);
3219 if (err)
3220 break;
3221 if (val == 255)
3222 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3223 else
3224 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3225 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg);
3226 break;
3227 }
3228 }
3229 mutex_unlock(&data->update_lock);
3230 return err ? : count;
3231 }
3232
3233 static ssize_t
show_auto_temp(struct device * dev,struct device_attribute * attr,char * buf)3234 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3235 {
3236 struct nct6775_data *data = nct6775_update_device(dev);
3237 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3238 int nr = sattr->nr;
3239 int point = sattr->index;
3240
3241 if (IS_ERR(data))
3242 return PTR_ERR(data);
3243
3244 /*
3245 * We don't know for sure if the temperature is signed or unsigned.
3246 * Assume it is unsigned.
3247 */
3248 return sysfs_emit(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3249 }
3250
3251 static ssize_t
store_auto_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3252 store_auto_temp(struct device *dev, struct device_attribute *attr,
3253 const char *buf, size_t count)
3254 {
3255 struct nct6775_data *data = dev_get_drvdata(dev);
3256 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3257 int nr = sattr->nr;
3258 int point = sattr->index;
3259 unsigned long val;
3260 int err;
3261
3262 err = kstrtoul(buf, 10, &val);
3263 if (err)
3264 return err;
3265 if (val > 255000)
3266 return -EINVAL;
3267
3268 mutex_lock(&data->update_lock);
3269 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3270 if (point < data->auto_pwm_num) {
3271 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point),
3272 data->auto_temp[nr][point]);
3273 } else {
3274 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3275 data->auto_temp[nr][point]);
3276 }
3277 mutex_unlock(&data->update_lock);
3278 return err ? : count;
3279 }
3280
nct6775_pwm_is_visible(struct kobject * kobj,struct attribute * attr,int index)3281 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3282 struct attribute *attr, int index)
3283 {
3284 struct device *dev = kobj_to_dev(kobj);
3285 struct nct6775_data *data = dev_get_drvdata(dev);
3286 int pwm = index / 36; /* pwm index */
3287 int nr = index % 36; /* attribute index */
3288
3289 if (!(data->has_pwm & BIT(pwm)))
3290 return 0;
3291
3292 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
3293 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3294 return 0;
3295 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3296 return 0;
3297 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3298 return 0;
3299 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3300 return 0;
3301
3302 if (nr >= 22 && nr <= 35) { /* auto point */
3303 int api = (nr - 22) / 2; /* auto point index */
3304
3305 if (api > data->auto_pwm_num)
3306 return 0;
3307 }
3308 return nct6775_attr_mode(data, attr);
3309 }
3310
3311 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0);
3312 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644,
3313 show_fan_time, store_fan_time, 0, 1);
3314 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644,
3315 show_fan_time, store_fan_time, 0, 2);
3316 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1);
3317 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2);
3318 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644,
3319 show_temp_tolerance, store_temp_tolerance, 0, 0);
3320 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3321 0644, show_temp_tolerance, store_temp_tolerance, 0, 1);
3322
3323 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3);
3324
3325 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4);
3326
3327 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3328 0644, show_auto_pwm, store_auto_pwm, 0, 0);
3329 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3330 0644, show_auto_temp, store_auto_temp, 0, 0);
3331
3332 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3333 0644, show_auto_pwm, store_auto_pwm, 0, 1);
3334 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3335 0644, show_auto_temp, store_auto_temp, 0, 1);
3336
3337 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3338 0644, show_auto_pwm, store_auto_pwm, 0, 2);
3339 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3340 0644, show_auto_temp, store_auto_temp, 0, 2);
3341
3342 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3343 0644, show_auto_pwm, store_auto_pwm, 0, 3);
3344 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3345 0644, show_auto_temp, store_auto_temp, 0, 3);
3346
3347 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3348 0644, show_auto_pwm, store_auto_pwm, 0, 4);
3349 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3350 0644, show_auto_temp, store_auto_temp, 0, 4);
3351
3352 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3353 0644, show_auto_pwm, store_auto_pwm, 0, 5);
3354 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3355 0644, show_auto_temp, store_auto_temp, 0, 5);
3356
3357 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3358 0644, show_auto_pwm, store_auto_pwm, 0, 6);
3359 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3360 0644, show_auto_temp, store_auto_temp, 0, 6);
3361
3362 /*
3363 * nct6775_pwm_is_visible uses the index into the following array
3364 * to determine if attributes should be created or not.
3365 * Any change in order or content must be matched.
3366 */
3367 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3368 &sensor_dev_template_pwm,
3369 &sensor_dev_template_pwm_mode,
3370 &sensor_dev_template_pwm_enable,
3371 &sensor_dev_template_pwm_temp_sel,
3372 &sensor_dev_template_pwm_temp_tolerance,
3373 &sensor_dev_template_pwm_crit_temp_tolerance,
3374 &sensor_dev_template_pwm_target_temp,
3375 &sensor_dev_template_fan_target,
3376 &sensor_dev_template_fan_tolerance,
3377 &sensor_dev_template_pwm_stop_time,
3378 &sensor_dev_template_pwm_step_up_time,
3379 &sensor_dev_template_pwm_step_down_time,
3380 &sensor_dev_template_pwm_start,
3381 &sensor_dev_template_pwm_floor,
3382 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3383 &sensor_dev_template_pwm_weight_temp_step,
3384 &sensor_dev_template_pwm_weight_temp_step_tol,
3385 &sensor_dev_template_pwm_weight_temp_step_base,
3386 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3387 &sensor_dev_template_pwm_max, /* 19 */
3388 &sensor_dev_template_pwm_step, /* 20 */
3389 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3390 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3391 &sensor_dev_template_pwm_auto_point1_temp,
3392 &sensor_dev_template_pwm_auto_point2_pwm,
3393 &sensor_dev_template_pwm_auto_point2_temp,
3394 &sensor_dev_template_pwm_auto_point3_pwm,
3395 &sensor_dev_template_pwm_auto_point3_temp,
3396 &sensor_dev_template_pwm_auto_point4_pwm,
3397 &sensor_dev_template_pwm_auto_point4_temp,
3398 &sensor_dev_template_pwm_auto_point5_pwm,
3399 &sensor_dev_template_pwm_auto_point5_temp,
3400 &sensor_dev_template_pwm_auto_point6_pwm,
3401 &sensor_dev_template_pwm_auto_point6_temp,
3402 &sensor_dev_template_pwm_auto_point7_pwm,
3403 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3404
3405 NULL
3406 };
3407
3408 static const struct sensor_template_group nct6775_pwm_template_group = {
3409 .templates = nct6775_attributes_pwm_template,
3410 .is_visible = nct6775_pwm_is_visible,
3411 .base = 1,
3412 };
3413
nct6775_init_device(struct nct6775_data * data)3414 static inline int nct6775_init_device(struct nct6775_data *data)
3415 {
3416 int i, err;
3417 u16 tmp, diode;
3418
3419 /* Start monitoring if needed */
3420 if (data->REG_CONFIG) {
3421 err = nct6775_read_value(data, data->REG_CONFIG, &tmp);
3422 if (err)
3423 return err;
3424 if (!(tmp & 0x01)) {
3425 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3426 if (err)
3427 return err;
3428 }
3429 }
3430
3431 /* Enable temperature sensors if needed */
3432 for (i = 0; i < NUM_TEMP; i++) {
3433 if (!(data->have_temp & BIT(i)))
3434 continue;
3435 if (!data->reg_temp_config[i])
3436 continue;
3437 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp);
3438 if (err)
3439 return err;
3440 if (tmp & 0x01) {
3441 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe);
3442 if (err)
3443 return err;
3444 }
3445 }
3446
3447 /* Enable VBAT monitoring if needed */
3448 err = nct6775_read_value(data, data->REG_VBAT, &tmp);
3449 if (err)
3450 return err;
3451 if (!(tmp & 0x01)) {
3452 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3453 if (err)
3454 return err;
3455 }
3456
3457 err = nct6775_read_value(data, data->REG_DIODE, &diode);
3458 if (err)
3459 return err;
3460
3461 for (i = 0; i < data->temp_fixed_num; i++) {
3462 if (!(data->have_temp_fixed & BIT(i)))
3463 continue;
3464 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3465 data->temp_type[i]
3466 = 3 - ((diode >> i) & data->DIODE_MASK);
3467 else /* thermistor */
3468 data->temp_type[i] = 4;
3469 }
3470
3471 return 0;
3472 }
3473
add_temp_sensors(struct nct6775_data * data,const u16 * regp,int * available,int * mask)3474 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3475 int *available, int *mask)
3476 {
3477 int i, err;
3478 u16 src;
3479
3480 for (i = 0; i < data->pwm_num && *available; i++) {
3481 int index;
3482
3483 if (!regp[i])
3484 continue;
3485 err = nct6775_read_value(data, regp[i], &src);
3486 if (err)
3487 return err;
3488 src &= 0x1f;
3489 if (!src || (*mask & BIT(src)))
3490 continue;
3491 if (!(data->temp_mask & BIT(src)))
3492 continue;
3493
3494 index = __ffs(*available);
3495 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3496 if (err)
3497 return err;
3498 *available &= ~BIT(index);
3499 *mask |= BIT(src);
3500 }
3501
3502 return 0;
3503 }
3504
nct6775_probe(struct device * dev,struct nct6775_data * data,const struct regmap_config * regmapcfg)3505 int nct6775_probe(struct device *dev, struct nct6775_data *data,
3506 const struct regmap_config *regmapcfg)
3507 {
3508 int i, s, err = 0;
3509 int mask, available;
3510 u16 src;
3511 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3512 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3513 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3514 int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp;
3515 int num_reg_temp_config;
3516 struct device *hwmon_dev;
3517 struct sensor_template_group tsi_temp_tg;
3518
3519 data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg);
3520 if (IS_ERR(data->regmap))
3521 return PTR_ERR(data->regmap);
3522
3523 mutex_init(&data->update_lock);
3524 data->name = nct6775_device_names[data->kind];
3525 data->bank = 0xff; /* Force initial bank selection */
3526 data->scale_in = scale_in;
3527
3528 switch (data->kind) {
3529 case nct6106:
3530 data->in_num = 9;
3531 data->pwm_num = 3;
3532 data->auto_pwm_num = 4;
3533 data->temp_fixed_num = 3;
3534 data->num_temp_alarms = 6;
3535 data->num_temp_beeps = 6;
3536
3537 data->fan_from_reg = fan_from_reg13;
3538 data->fan_from_reg_min = fan_from_reg13;
3539
3540 data->temp_label = nct6776_temp_label;
3541 data->temp_mask = NCT6776_TEMP_MASK;
3542 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3543
3544 data->REG_VBAT = NCT6106_REG_VBAT;
3545 data->REG_DIODE = NCT6106_REG_DIODE;
3546 data->DIODE_MASK = NCT6106_DIODE_MASK;
3547 data->REG_VIN = NCT6106_REG_IN;
3548 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3549 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3550 data->REG_TARGET = NCT6106_REG_TARGET;
3551 data->REG_FAN = NCT6106_REG_FAN;
3552 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3553 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3554 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3555 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3556 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3557 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3558 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3559 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H;
3560 data->REG_PWM[0] = NCT6116_REG_PWM;
3561 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3562 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3563 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3564 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3565 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3566 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3567 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3568 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3569 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3570 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3571 data->REG_CRITICAL_TEMP_TOLERANCE
3572 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3573 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3574 data->CRITICAL_PWM_ENABLE_MASK
3575 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3576 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3577 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3578 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3579 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3580 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3581 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3582 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3583 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3584 data->REG_ALARM = NCT6106_REG_ALARM;
3585 data->ALARM_BITS = NCT6106_ALARM_BITS;
3586 data->REG_BEEP = NCT6106_REG_BEEP;
3587 data->BEEP_BITS = NCT6106_BEEP_BITS;
3588 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP;
3589
3590 reg_temp = NCT6106_REG_TEMP;
3591 reg_temp_mon = NCT6106_REG_TEMP_MON;
3592 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3593 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3594 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP);
3595 reg_temp_over = NCT6106_REG_TEMP_OVER;
3596 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3597 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3598 num_reg_temp_config = ARRAY_SIZE(NCT6106_REG_TEMP_CONFIG);
3599 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3600 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3601 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3602 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3603
3604 break;
3605 case nct6116:
3606 data->in_num = 9;
3607 data->pwm_num = 5;
3608 data->auto_pwm_num = 4;
3609 data->temp_fixed_num = 3;
3610 data->num_temp_alarms = 3;
3611 data->num_temp_beeps = 3;
3612
3613 data->fan_from_reg = fan_from_reg13;
3614 data->fan_from_reg_min = fan_from_reg13;
3615
3616 data->temp_label = nct6776_temp_label;
3617 data->temp_mask = NCT6776_TEMP_MASK;
3618 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3619
3620 data->REG_VBAT = NCT6106_REG_VBAT;
3621 data->REG_DIODE = NCT6106_REG_DIODE;
3622 data->DIODE_MASK = NCT6106_DIODE_MASK;
3623 data->REG_VIN = NCT6106_REG_IN;
3624 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3625 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3626 data->REG_TARGET = NCT6116_REG_TARGET;
3627 data->REG_FAN = NCT6116_REG_FAN;
3628 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE;
3629 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN;
3630 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES;
3631 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT;
3632 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME;
3633 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME;
3634 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME;
3635 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H;
3636 data->REG_PWM[0] = NCT6116_REG_PWM;
3637 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT;
3638 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT;
3639 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3640 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3641 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3642 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3643 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3644 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP;
3645 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM;
3646 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP;
3647 data->REG_CRITICAL_TEMP_TOLERANCE
3648 = NCT6116_REG_CRITICAL_TEMP_TOLERANCE;
3649 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE;
3650 data->CRITICAL_PWM_ENABLE_MASK
3651 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3652 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM;
3653 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3654 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3655 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3656 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3657 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3658 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3659 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3660 data->REG_ALARM = NCT6106_REG_ALARM;
3661 data->ALARM_BITS = NCT6116_ALARM_BITS;
3662 data->REG_BEEP = NCT6106_REG_BEEP;
3663 data->BEEP_BITS = NCT6116_BEEP_BITS;
3664 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP;
3665
3666 reg_temp = NCT6106_REG_TEMP;
3667 reg_temp_mon = NCT6106_REG_TEMP_MON;
3668 num_reg_temp = 3;
3669 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3670 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP);
3671 reg_temp_over = NCT6106_REG_TEMP_OVER;
3672 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3673 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3674 num_reg_temp_config = 3;
3675 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3676 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3677 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3678 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3679
3680 break;
3681 case nct6775:
3682 data->in_num = 9;
3683 data->pwm_num = 3;
3684 data->auto_pwm_num = 6;
3685 data->has_fan_div = true;
3686 data->temp_fixed_num = 3;
3687 data->num_temp_alarms = 3;
3688 data->num_temp_beeps = 3;
3689
3690 data->ALARM_BITS = NCT6775_ALARM_BITS;
3691 data->BEEP_BITS = NCT6775_BEEP_BITS;
3692
3693 data->fan_from_reg = fan_from_reg16;
3694 data->fan_from_reg_min = fan_from_reg8;
3695 data->target_temp_mask = 0x7f;
3696 data->tolerance_mask = 0x0f;
3697 data->speed_tolerance_limit = 15;
3698
3699 data->temp_label = nct6775_temp_label;
3700 data->temp_mask = NCT6775_TEMP_MASK;
3701 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK;
3702
3703 data->REG_CONFIG = NCT6775_REG_CONFIG;
3704 data->REG_VBAT = NCT6775_REG_VBAT;
3705 data->REG_DIODE = NCT6775_REG_DIODE;
3706 data->DIODE_MASK = NCT6775_DIODE_MASK;
3707 data->REG_VIN = NCT6775_REG_IN;
3708 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3709 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3710 data->REG_TARGET = NCT6775_REG_TARGET;
3711 data->REG_FAN = NCT6775_REG_FAN;
3712 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3713 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3714 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3715 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3716 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3717 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3718 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3719 data->REG_PWM[0] = NCT6775_REG_PWM;
3720 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3721 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3722 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3723 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3724 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3725 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3726 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3727 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3728 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3729 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3730 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3731 data->REG_CRITICAL_TEMP_TOLERANCE
3732 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3733 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3734 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3735 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3736 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3737 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3738 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3739 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3740 data->REG_ALARM = NCT6775_REG_ALARM;
3741 data->REG_BEEP = NCT6775_REG_BEEP;
3742 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP;
3743
3744 reg_temp = NCT6775_REG_TEMP;
3745 reg_temp_mon = NCT6775_REG_TEMP_MON;
3746 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3747 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3748 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP);
3749 reg_temp_over = NCT6775_REG_TEMP_OVER;
3750 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3751 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3752 num_reg_temp_config = ARRAY_SIZE(NCT6775_REG_TEMP_CONFIG);
3753 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3754 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3755
3756 break;
3757 case nct6776:
3758 data->in_num = 9;
3759 data->pwm_num = 3;
3760 data->auto_pwm_num = 4;
3761 data->has_fan_div = false;
3762 data->temp_fixed_num = 3;
3763 data->num_temp_alarms = 3;
3764 data->num_temp_beeps = 6;
3765
3766 data->ALARM_BITS = NCT6776_ALARM_BITS;
3767 data->BEEP_BITS = NCT6776_BEEP_BITS;
3768
3769 data->fan_from_reg = fan_from_reg13;
3770 data->fan_from_reg_min = fan_from_reg13;
3771 data->target_temp_mask = 0xff;
3772 data->tolerance_mask = 0x07;
3773 data->speed_tolerance_limit = 63;
3774
3775 data->temp_label = nct6776_temp_label;
3776 data->temp_mask = NCT6776_TEMP_MASK;
3777 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3778
3779 data->REG_CONFIG = NCT6775_REG_CONFIG;
3780 data->REG_VBAT = NCT6775_REG_VBAT;
3781 data->REG_DIODE = NCT6775_REG_DIODE;
3782 data->DIODE_MASK = NCT6775_DIODE_MASK;
3783 data->REG_VIN = NCT6775_REG_IN;
3784 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3785 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3786 data->REG_TARGET = NCT6775_REG_TARGET;
3787 data->REG_FAN = NCT6775_REG_FAN;
3788 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3789 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3790 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3791 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3792 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3793 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3794 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3795 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3796 data->REG_PWM[0] = NCT6775_REG_PWM;
3797 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3798 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3799 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3800 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3801 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3802 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3803 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3804 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3805 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3806 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3807 data->REG_CRITICAL_TEMP_TOLERANCE
3808 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3809 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3810 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3811 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3812 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3813 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3814 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3815 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3816 data->REG_ALARM = NCT6775_REG_ALARM;
3817 data->REG_BEEP = NCT6776_REG_BEEP;
3818 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3819
3820 reg_temp = NCT6775_REG_TEMP;
3821 reg_temp_mon = NCT6775_REG_TEMP_MON;
3822 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3823 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3824 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3825 reg_temp_over = NCT6775_REG_TEMP_OVER;
3826 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3827 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3828 num_reg_temp_config = ARRAY_SIZE(NCT6776_REG_TEMP_CONFIG);
3829 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3830 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3831
3832 break;
3833 case nct6779:
3834 data->in_num = 15;
3835 data->pwm_num = 5;
3836 data->auto_pwm_num = 4;
3837 data->has_fan_div = false;
3838 data->temp_fixed_num = 6;
3839 data->num_temp_alarms = 2;
3840 data->num_temp_beeps = 2;
3841
3842 data->ALARM_BITS = NCT6779_ALARM_BITS;
3843 data->BEEP_BITS = NCT6779_BEEP_BITS;
3844
3845 data->fan_from_reg = fan_from_reg_rpm;
3846 data->fan_from_reg_min = fan_from_reg13;
3847 data->target_temp_mask = 0xff;
3848 data->tolerance_mask = 0x07;
3849 data->speed_tolerance_limit = 63;
3850
3851 data->temp_label = nct6779_temp_label;
3852 data->temp_mask = NCT6779_TEMP_MASK;
3853 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK;
3854
3855 data->REG_CONFIG = NCT6775_REG_CONFIG;
3856 data->REG_VBAT = NCT6775_REG_VBAT;
3857 data->REG_DIODE = NCT6775_REG_DIODE;
3858 data->DIODE_MASK = NCT6775_DIODE_MASK;
3859 data->REG_VIN = NCT6779_REG_IN;
3860 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3861 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3862 data->REG_TARGET = NCT6775_REG_TARGET;
3863 data->REG_FAN = NCT6779_REG_FAN;
3864 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3865 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3866 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3867 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3868 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3869 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3870 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3871 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3872 data->REG_PWM[0] = NCT6775_REG_PWM;
3873 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3874 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3875 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3876 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3877 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3878 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3879 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3880 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3881 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3882 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3883 data->REG_CRITICAL_TEMP_TOLERANCE
3884 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3885 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3886 data->CRITICAL_PWM_ENABLE_MASK
3887 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3888 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3889 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3890 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3891 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3892 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3893 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3894 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3895 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3896 data->REG_ALARM = NCT6779_REG_ALARM;
3897 data->REG_BEEP = NCT6776_REG_BEEP;
3898 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3899
3900 reg_temp = NCT6779_REG_TEMP;
3901 reg_temp_mon = NCT6779_REG_TEMP_MON;
3902 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3903 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3904 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3905 reg_temp_over = NCT6779_REG_TEMP_OVER;
3906 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3907 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3908 num_reg_temp_config = ARRAY_SIZE(NCT6779_REG_TEMP_CONFIG);
3909 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3910 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3911
3912 break;
3913 case nct6791:
3914 case nct6792:
3915 case nct6793:
3916 case nct6795:
3917 case nct6796:
3918 case nct6797:
3919 data->in_num = 15;
3920 data->pwm_num = (data->kind == nct6796 ||
3921 data->kind == nct6797) ? 7 : 6;
3922 data->auto_pwm_num = 4;
3923 data->has_fan_div = false;
3924 data->temp_fixed_num = 6;
3925 data->num_temp_alarms = 2;
3926 data->num_temp_beeps = 2;
3927
3928 data->ALARM_BITS = NCT6791_ALARM_BITS;
3929 data->BEEP_BITS = NCT6779_BEEP_BITS;
3930
3931 data->fan_from_reg = fan_from_reg_rpm;
3932 data->fan_from_reg_min = fan_from_reg13;
3933 data->target_temp_mask = 0xff;
3934 data->tolerance_mask = 0x07;
3935 data->speed_tolerance_limit = 63;
3936
3937 switch (data->kind) {
3938 default:
3939 case nct6791:
3940 data->temp_label = nct6779_temp_label;
3941 data->temp_mask = NCT6791_TEMP_MASK;
3942 data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK;
3943 break;
3944 case nct6792:
3945 data->temp_label = nct6792_temp_label;
3946 data->temp_mask = NCT6792_TEMP_MASK;
3947 data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK;
3948 break;
3949 case nct6793:
3950 data->temp_label = nct6793_temp_label;
3951 data->temp_mask = NCT6793_TEMP_MASK;
3952 data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK;
3953 break;
3954 case nct6795:
3955 case nct6797:
3956 data->temp_label = nct6795_temp_label;
3957 data->temp_mask = NCT6795_TEMP_MASK;
3958 data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK;
3959 break;
3960 case nct6796:
3961 data->temp_label = nct6796_temp_label;
3962 data->temp_mask = NCT6796_TEMP_MASK;
3963 data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK;
3964 break;
3965 }
3966
3967 data->REG_CONFIG = NCT6775_REG_CONFIG;
3968 data->REG_VBAT = NCT6775_REG_VBAT;
3969 data->REG_DIODE = NCT6775_REG_DIODE;
3970 data->DIODE_MASK = NCT6775_DIODE_MASK;
3971 data->REG_VIN = NCT6779_REG_IN;
3972 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3973 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3974 data->REG_TARGET = NCT6775_REG_TARGET;
3975 data->REG_FAN = NCT6779_REG_FAN;
3976 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3977 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3978 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3979 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3980 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3981 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3982 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3983 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3984 data->REG_PWM[0] = NCT6775_REG_PWM;
3985 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3986 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3987 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3988 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3989 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3990 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3991 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3992 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3993 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3994 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3995 data->REG_CRITICAL_TEMP_TOLERANCE
3996 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3997 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3998 data->CRITICAL_PWM_ENABLE_MASK
3999 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
4000 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
4001 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
4002 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
4003 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4004 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
4005 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
4006 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
4007 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
4008 data->REG_ALARM = NCT6791_REG_ALARM;
4009 if (data->kind == nct6791)
4010 data->REG_BEEP = NCT6776_REG_BEEP;
4011 else
4012 data->REG_BEEP = NCT6792_REG_BEEP;
4013 switch (data->kind) {
4014 case nct6791:
4015 case nct6792:
4016 case nct6793:
4017 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
4018 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
4019 break;
4020 case nct6795:
4021 case nct6796:
4022 case nct6797:
4023 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
4024 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
4025 break;
4026 default:
4027 num_reg_tsi_temp = 0;
4028 break;
4029 }
4030
4031 reg_temp = NCT6779_REG_TEMP;
4032 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
4033 if (data->kind == nct6791) {
4034 reg_temp_mon = NCT6779_REG_TEMP_MON;
4035 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
4036 } else {
4037 reg_temp_mon = NCT6792_REG_TEMP_MON;
4038 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
4039 }
4040 reg_temp_over = NCT6779_REG_TEMP_OVER;
4041 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
4042 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4043 num_reg_temp_config = ARRAY_SIZE(NCT6779_REG_TEMP_CONFIG);
4044 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
4045 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
4046
4047 break;
4048 case nct6798:
4049 case nct6799:
4050 data->in_num = data->kind == nct6799 ? 18 : 15;
4051 data->scale_in = scale_in_6798;
4052 data->pwm_num = 7;
4053 data->auto_pwm_num = 4;
4054 data->has_fan_div = false;
4055 data->temp_fixed_num = 6;
4056 data->num_temp_alarms = 7;
4057 data->num_temp_beeps = 8;
4058
4059 data->ALARM_BITS = NCT6799_ALARM_BITS;
4060 data->BEEP_BITS = NCT6799_BEEP_BITS;
4061
4062 data->fan_from_reg = fan_from_reg_rpm;
4063 data->fan_from_reg_min = fan_from_reg13;
4064 data->target_temp_mask = 0xff;
4065 data->tolerance_mask = 0x07;
4066 data->speed_tolerance_limit = 63;
4067
4068 switch (data->kind) {
4069 default:
4070 case nct6798:
4071 data->temp_label = nct6798_temp_label;
4072 data->temp_mask = NCT6798_TEMP_MASK;
4073 data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK;
4074 break;
4075 case nct6799:
4076 data->temp_label = nct6799_temp_label;
4077 data->temp_mask = NCT6799_TEMP_MASK;
4078 data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK;
4079 break;
4080 }
4081
4082 data->REG_CONFIG = NCT6775_REG_CONFIG;
4083 data->REG_VBAT = NCT6775_REG_VBAT;
4084 data->REG_DIODE = NCT6775_REG_DIODE;
4085 data->DIODE_MASK = NCT6775_DIODE_MASK;
4086 data->REG_VIN = NCT6779_REG_IN;
4087 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
4088 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
4089 data->REG_TARGET = NCT6775_REG_TARGET;
4090 data->REG_FAN = NCT6779_REG_FAN;
4091 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
4092 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
4093 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
4094 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
4095 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
4096 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
4097 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
4098 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
4099 data->REG_PWM[0] = NCT6775_REG_PWM;
4100 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
4101 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
4102 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
4103 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
4104 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
4105 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
4106 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
4107 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
4108 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
4109 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
4110 data->REG_CRITICAL_TEMP_TOLERANCE = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
4111 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
4112 data->CRITICAL_PWM_ENABLE_MASK = NCT6779_CRITICAL_PWM_ENABLE_MASK;
4113 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
4114 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
4115 data->REG_TEMP_SOURCE = NCT6798_REG_TEMP_SOURCE;
4116 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4117 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
4118 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
4119 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
4120 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
4121 data->REG_ALARM = NCT6799_REG_ALARM;
4122 data->REG_BEEP = NCT6792_REG_BEEP;
4123 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
4124 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
4125
4126 reg_temp = NCT6798_REG_TEMP;
4127 num_reg_temp = ARRAY_SIZE(NCT6798_REG_TEMP);
4128 reg_temp_mon = NCT6798_REG_TEMP_MON;
4129 num_reg_temp_mon = ARRAY_SIZE(NCT6798_REG_TEMP_MON);
4130 reg_temp_over = NCT6798_REG_TEMP_OVER;
4131 reg_temp_hyst = NCT6798_REG_TEMP_HYST;
4132 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4133 num_reg_temp_config = ARRAY_SIZE(NCT6779_REG_TEMP_CONFIG);
4134 reg_temp_alternate = NCT6798_REG_TEMP_ALTERNATE;
4135 reg_temp_crit = NCT6798_REG_TEMP_CRIT;
4136
4137 break;
4138 default:
4139 return -ENODEV;
4140 }
4141 data->have_in = BIT(data->in_num) - 1;
4142 data->have_temp = 0;
4143
4144 /*
4145 * On some boards, not all available temperature sources are monitored,
4146 * even though some of the monitoring registers are unused.
4147 * Get list of unused monitoring registers, then detect if any fan
4148 * controls are configured to use unmonitored temperature sources.
4149 * If so, assign the unmonitored temperature sources to available
4150 * monitoring registers.
4151 */
4152 mask = 0;
4153 available = 0;
4154 for (i = 0; i < num_reg_temp; i++) {
4155 if (reg_temp[i] == 0)
4156 continue;
4157
4158 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
4159 if (err)
4160 return err;
4161 src &= 0x1f;
4162 if (!src || (mask & BIT(src)))
4163 available |= BIT(i);
4164
4165 mask |= BIT(src);
4166 }
4167
4168 /*
4169 * Now find unmonitored temperature registers and enable monitoring
4170 * if additional monitoring registers are available.
4171 */
4172 err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
4173 if (err)
4174 return err;
4175 err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
4176 if (err)
4177 return err;
4178
4179 mask = 0;
4180 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
4181 for (i = 0; i < num_reg_temp; i++) {
4182 if (reg_temp[i] == 0)
4183 continue;
4184
4185 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
4186 if (err)
4187 return err;
4188 src &= 0x1f;
4189 if (!src || (mask & BIT(src)))
4190 continue;
4191
4192 if (!(data->temp_mask & BIT(src))) {
4193 dev_info(dev,
4194 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4195 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4196 continue;
4197 }
4198
4199 mask |= BIT(src);
4200
4201 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4202 if (src <= data->temp_fixed_num) {
4203 data->have_temp |= BIT(src - 1);
4204 data->have_temp_fixed |= BIT(src - 1);
4205 data->reg_temp[0][src - 1] = reg_temp[i];
4206 data->reg_temp[1][src - 1] = reg_temp_over[i];
4207 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4208 if (reg_temp_crit_h && reg_temp_crit_h[i])
4209 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4210 else if (reg_temp_crit[src - 1])
4211 data->reg_temp[3][src - 1]
4212 = reg_temp_crit[src - 1];
4213 if (reg_temp_crit_l && reg_temp_crit_l[i])
4214 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4215 if (i < num_reg_temp_config)
4216 data->reg_temp_config[src - 1] = reg_temp_config[i];
4217 data->temp_src[src - 1] = src;
4218 continue;
4219 }
4220
4221 if (s >= NUM_TEMP)
4222 continue;
4223
4224 /* Use dynamic index for other sources */
4225 data->have_temp |= BIT(s);
4226 data->reg_temp[0][s] = reg_temp[i];
4227 data->reg_temp[1][s] = reg_temp_over[i];
4228 data->reg_temp[2][s] = reg_temp_hyst[i];
4229 if (i < num_reg_temp_config)
4230 data->reg_temp_config[s] = reg_temp_config[i];
4231 if (reg_temp_crit_h && reg_temp_crit_h[i])
4232 data->reg_temp[3][s] = reg_temp_crit_h[i];
4233 else if (reg_temp_crit[src - 1])
4234 data->reg_temp[3][s] = reg_temp_crit[src - 1];
4235 if (reg_temp_crit_l && reg_temp_crit_l[i])
4236 data->reg_temp[4][s] = reg_temp_crit_l[i];
4237
4238 data->temp_src[s] = src;
4239 s++;
4240 }
4241
4242 /*
4243 * Repeat with temperatures used for fan control.
4244 * This set of registers does not support limits.
4245 */
4246 for (i = 0; i < num_reg_temp_mon; i++) {
4247 if (reg_temp_mon[i] == 0)
4248 continue;
4249
4250 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src);
4251 if (err)
4252 return err;
4253 src &= 0x1f;
4254 if (!src)
4255 continue;
4256
4257 if (!(data->temp_mask & BIT(src))) {
4258 dev_info(dev,
4259 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4260 src, i, data->REG_TEMP_SEL[i],
4261 reg_temp_mon[i]);
4262 continue;
4263 }
4264
4265 /*
4266 * For virtual temperature sources, the 'virtual' temperature
4267 * for each fan reflects a different temperature, and there
4268 * are no duplicates.
4269 */
4270 if (!(data->virt_temp_mask & BIT(src))) {
4271 if (mask & BIT(src))
4272 continue;
4273 mask |= BIT(src);
4274 }
4275
4276 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4277 if (src <= data->temp_fixed_num) {
4278 if (data->have_temp & BIT(src - 1))
4279 continue;
4280 data->have_temp |= BIT(src - 1);
4281 data->have_temp_fixed |= BIT(src - 1);
4282 data->reg_temp[0][src - 1] = reg_temp_mon[i];
4283 data->temp_src[src - 1] = src;
4284 continue;
4285 }
4286
4287 if (s >= NUM_TEMP)
4288 continue;
4289
4290 /* Use dynamic index for other sources */
4291 data->have_temp |= BIT(s);
4292 data->reg_temp[0][s] = reg_temp_mon[i];
4293 data->temp_src[s] = src;
4294 s++;
4295 }
4296
4297 #ifdef USE_ALTERNATE
4298 /*
4299 * Go through the list of alternate temp registers and enable
4300 * if possible.
4301 * The temperature is already monitored if the respective bit in <mask>
4302 * is set.
4303 */
4304 for (i = 0; i < 31; i++) {
4305 if (!(data->temp_mask & BIT(i + 1)))
4306 continue;
4307 if (!reg_temp_alternate[i])
4308 continue;
4309 if (mask & BIT(i + 1))
4310 continue;
4311 if (i < data->temp_fixed_num) {
4312 if (data->have_temp & BIT(i))
4313 continue;
4314 data->have_temp |= BIT(i);
4315 data->have_temp_fixed |= BIT(i);
4316 data->reg_temp[0][i] = reg_temp_alternate[i];
4317 if (i < num_reg_temp) {
4318 data->reg_temp[1][i] = reg_temp_over[i];
4319 data->reg_temp[2][i] = reg_temp_hyst[i];
4320 }
4321 data->temp_src[i] = i + 1;
4322 continue;
4323 }
4324
4325 if (s >= NUM_TEMP) /* Abort if no more space */
4326 break;
4327
4328 data->have_temp |= BIT(s);
4329 data->reg_temp[0][s] = reg_temp_alternate[i];
4330 data->temp_src[s] = i + 1;
4331 s++;
4332 }
4333 #endif /* USE_ALTERNATE */
4334
4335 /* Check which TSIx_TEMP registers are active */
4336 for (i = 0; i < num_reg_tsi_temp; i++) {
4337 u16 tmp;
4338
4339 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp);
4340 if (err)
4341 return err;
4342 if (tmp)
4343 data->have_tsi_temp |= BIT(i);
4344 }
4345
4346 /* Initialize the chip */
4347 err = nct6775_init_device(data);
4348 if (err)
4349 return err;
4350
4351 if (data->driver_init) {
4352 err = data->driver_init(data);
4353 if (err)
4354 return err;
4355 }
4356
4357 /* Read fan clock dividers immediately */
4358 err = nct6775_init_fan_common(dev, data);
4359 if (err)
4360 return err;
4361
4362 /* Register sysfs hooks */
4363 err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group,
4364 data->pwm_num);
4365 if (err)
4366 return err;
4367
4368 err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group,
4369 fls(data->have_in));
4370 if (err)
4371 return err;
4372
4373 err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group,
4374 fls(data->has_fan));
4375 if (err)
4376 return err;
4377
4378 err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group,
4379 fls(data->have_temp));
4380 if (err)
4381 return err;
4382
4383 if (data->have_tsi_temp) {
4384 tsi_temp_tg.templates = nct6775_tsi_temp_template;
4385 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible;
4386 tsi_temp_tg.base = fls(data->have_temp) + 1;
4387 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg,
4388 fls(data->have_tsi_temp));
4389 if (err)
4390 return err;
4391 }
4392
4393 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4394 data, data->groups);
4395 return PTR_ERR_OR_ZERO(hwmon_dev);
4396 }
4397 EXPORT_SYMBOL_GPL(nct6775_probe);
4398
4399 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4400 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips");
4401 MODULE_LICENSE("GPL");
4402