Home
last modified time | relevance | path

Searched defs:reg_name (Results 1 – 25 of 151) sorted by relevance

1234567

/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h37 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name) argument
39 #define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT argument
41 #define FD_MASK(reg_name, field) reg_name##__##field##_MASK argument
47 #define FN(reg_name, field) FD(reg_name##__##field) argument
58 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
61 #define REG_SET(reg_name, initial_val, field, val) \ argument
85 #define REG_UPDATE_N(reg_name, n, ...)\ argument
88 #define REG_UPDATE(reg_name, field, val) \ argument
111 #define REG_GET(reg_name, field, val) \ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
H A Dhw_factory_dcn32.c59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
101 #define SF_DDC(reg_name, field_name, post_fix)\ argument
169 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
H A Dhw_translate_dcn32.c53 #define REG(reg_name)\ argument
55 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_factory_dcn30.c66 #define REG(reg_name)\ argument
69 #define SF_HPD(reg_name, field_name, post_fix)\ argument
72 #define REGI(reg_name, block, id)\ argument
76 #define SF(reg_name, field_name, post_fix)\ argument
109 #define SF_DDC(reg_name, field_name, post_fix)\ argument
165 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
H A Dhw_translate_dcn30.c60 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_factory_dcn21.c57 #define REG(reg_name)\ argument
60 #define SF_HPD(reg_name, field_name, post_fix)\ argument
63 #define REGI(reg_name, block, id)\ argument
67 #define SF(reg_name, field_name, post_fix)\ argument
99 #define SF_DDC(reg_name, field_name, post_fix)\ argument
139 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
H A Dhw_translate_dcn21.c55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_factory_dcn20.c59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
102 #define SF_DDC(reg_name, field_name, post_fix)\ argument
158 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
H A Dhw_translate_dcn20.c55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn401/
H A Dhw_factory_dcn401.c39 #define REG(reg_name)\ argument
42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
45 #define REGI(reg_name, block, id)\ argument
49 #define SF(reg_name, field_name, post_fix)\ argument
81 #define SF_DDC(reg_name, field_name, post_fix)\ argument
161 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
H A Dhw_translate_dcn401.c28 #define REG(reg_name)\ argument
30 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_factory_dcn315.c63 #define REG(reg_name)\ argument
66 #define SF_HPD(reg_name, field_name, post_fix)\ argument
69 #define REGI(reg_name, block, id)\ argument
73 #define SF(reg_name, field_name, post_fix)\ argument
105 #define SF_DDC(reg_name, field_name, post_fix)\ argument
157 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_factory_dce120.c46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
50 #define SF_HPD(reg_name, field_name, post_fix)\ argument
60 #define REG(reg_name)\ argument
63 #define REGI(reg_name, block, id)\ argument
96 #define SF_DDC(reg_name, field_name, post_fix)\ argument
H A Dhw_translate_dce120.c51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c47 #define SF_HPD(reg_name, field_name, post_fix)\ argument
57 #define REG(reg_name)\ argument
60 #define REGI(reg_name, block, id)\ argument
92 #define SF_DDC(reg_name, field_name, post_fix)\ argument
128 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
H A Dhw_translate_dcn10.c51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/
H A Dhw_factory_dce110.c42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
45 #define REG(reg_name)\ argument
48 #define REGI(reg_name, block, id)\ argument
79 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn321/
H A Ddcn321_dio_link_encoder.c50 #define FN(reg_name, field_name) \ argument
56 #define AUX_REG_READ(reg_name) \ argument
59 #define AUX_REG_WRITE(reg_name, val) \ argument
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn30/
H A Ddcn30_dio_link_encoder.c44 #define FN(reg_name, field_name) \ argument
211 #define AUX_REG_READ(reg_name) \ argument
214 #define AUX_REG_WRITE(reg_name, val) \ argument
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_panel_cntl.h32 #define DCE_PANEL_CNTL_SR(reg_name, block)\ argument
45 #define DCN_PANEL_CNTL_SR(reg_name, block)\ argument
59 #define DCE_PANEL_CNTL_SF(reg_name, field_name, post_fix)\ argument
/linux/drivers/media/i2c/ccs/
H A Dccs-reg-access.h33 #define ccs_read(sensor, reg_name, val) \ argument
36 #define ccs_write(sensor, reg_name, val) \ argument
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn32/
H A Ddcn32_dio_link_encoder.c53 #define FN(reg_name, field_name) \ argument
59 #define AUX_REG_READ(reg_name) \ argument
62 #define AUX_REG_WRITE(reg_name, val) \ argument
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn401/
H A Ddcn401_dio_link_encoder.c52 #define FN(reg_name, field_name) \ argument
58 #define AUX_REG_READ(reg_name) \ argument
61 #define AUX_REG_WRITE(reg_name, val) \ argument
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_dwb.h34 #define SR(reg_name)\ argument
38 #define SRI(reg_name, block, id)\ argument
43 #define SRII(reg_name, block, id)\ argument
47 #define SF(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn301/
H A Ddcn301_hubbub.c37 #define FN(reg_name, field_name) \ argument
47 #define FN(reg_name, field_name) \ argument

1234567