1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct mall_stream_config { 42 /* MALL stream config to indicate if the stream is phantom or not. 43 * We will use a phantom stream to indicate that the pipe is phantom. 44 */ 45 enum mall_stream_type type; 46 struct dc_stream_state *paired_stream; // master / slave stream 47 }; 48 49 struct dc_stream_status { 50 int primary_otg_inst; 51 int stream_enc_inst; 52 53 /** 54 * @plane_count: Total of planes attached to a single stream 55 */ 56 int plane_count; 57 int audio_inst; 58 struct timing_sync_info timing_sync_info; 59 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 60 bool is_abm_supported; 61 struct mall_stream_config mall_stream_config; 62 bool fpo_in_use; 63 }; 64 65 enum hubp_dmdata_mode { 66 DMDATA_SW_MODE, 67 DMDATA_HW_MODE 68 }; 69 70 struct dc_dmdata_attributes { 71 /* Specifies whether dynamic meta data will be updated by software 72 * or has to be fetched by hardware (DMA mode) 73 */ 74 enum hubp_dmdata_mode dmdata_mode; 75 /* Specifies if current dynamic meta data is to be used only for the current frame */ 76 bool dmdata_repeat; 77 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 78 uint32_t dmdata_size; 79 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 80 bool dmdata_updated; 81 /* If hardware mode is used, the base address where DMDATA surface is located */ 82 PHYSICAL_ADDRESS_LOC address; 83 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 84 bool dmdata_qos_mode; 85 /* If qos_mode = 1, this is the QOS value to be used: */ 86 uint32_t dmdata_qos_level; 87 /* Specifies the value in unit of REFCLK cycles to be added to the 88 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 89 */ 90 uint32_t dmdata_dl_delta; 91 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 92 uint32_t *dmdata_sw_data; 93 }; 94 95 struct dc_writeback_info { 96 bool wb_enabled; 97 int dwb_pipe_inst; 98 struct dc_dwb_params dwb_params; 99 struct mcif_buf_params mcif_buf_params; 100 struct mcif_warmup_params mcif_warmup_params; 101 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 102 struct dc_plane_state *writeback_source_plane; 103 /* source MPCC instance. for use by internally by dc */ 104 int mpcc_inst; 105 }; 106 107 struct dc_writeback_update { 108 unsigned int num_wb_info; 109 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 110 }; 111 112 enum vertical_interrupt_ref_point { 113 START_V_UPDATE = 0, 114 START_V_SYNC, 115 INVALID_POINT 116 117 //For now, only v_update interrupt is used. 118 //START_V_BLANK, 119 //START_V_ACTIVE 120 }; 121 122 struct periodic_interrupt_config { 123 enum vertical_interrupt_ref_point ref_point; 124 int lines_offset; 125 }; 126 127 struct dc_mst_stream_bw_update { 128 bool is_increase; // is bandwidth reduced or increased 129 uint32_t mst_stream_bw; // new mst bandwidth in kbps 130 }; 131 132 union stream_update_flags { 133 struct { 134 uint32_t scaling:1; 135 uint32_t out_tf:1; 136 uint32_t out_csc:1; 137 uint32_t abm_level:1; 138 uint32_t dpms_off:1; 139 uint32_t gamut_remap:1; 140 uint32_t wb_update:1; 141 uint32_t dsc_changed : 1; 142 uint32_t mst_bw : 1; 143 uint32_t crtc_timing_adjust : 1; 144 uint32_t fams_changed : 1; 145 uint32_t scaler_sharpener : 1; 146 } bits; 147 148 uint32_t raw; 149 }; 150 151 struct test_pattern { 152 enum dp_test_pattern type; 153 enum dp_test_pattern_color_space color_space; 154 struct link_training_settings const *p_link_settings; 155 unsigned char const *p_custom_pattern; 156 unsigned int cust_pattern_size; 157 }; 158 159 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR) 160 161 struct dc_stream_debug_options { 162 char force_odm_combine_segments; 163 /* 164 * When force_odm_combine_segments is non zero, allow dc to 165 * temporarily transition to ODM bypass when minimal transition state 166 * is required to prevent visual glitches showing on the screen 167 */ 168 char allow_transition_for_forced_odm; 169 }; 170 171 #define LUMINANCE_DATA_TABLE_SIZE 10 172 173 struct luminance_data { 174 bool is_valid; 175 int refresh_rate_hz[LUMINANCE_DATA_TABLE_SIZE]; 176 int luminance_millinits[LUMINANCE_DATA_TABLE_SIZE]; 177 int flicker_criteria_milli_nits_GAMING; 178 int flicker_criteria_milli_nits_STATIC; 179 int nominal_refresh_rate; 180 int dm_max_decrease_from_nominal; 181 }; 182 183 struct dc_stream_state { 184 // sink is deprecated, new code should not reference 185 // this pointer 186 struct dc_sink *sink; 187 188 struct dc_link *link; 189 /* For dynamic link encoder assignment, update the link encoder assigned to 190 * a stream via the volatile dc_state rather than the static dc_link. 191 */ 192 struct link_encoder *link_enc; 193 struct dc_stream_debug_options debug; 194 struct dc_panel_patch sink_patches; 195 struct dc_crtc_timing timing; 196 struct dc_crtc_timing_adjust adjust; 197 struct dc_info_packet vrr_infopacket; 198 struct dc_info_packet vsc_infopacket; 199 struct dc_info_packet vsp_infopacket; 200 struct dc_info_packet hfvsif_infopacket; 201 struct dc_info_packet vtem_infopacket; 202 struct dc_info_packet adaptive_sync_infopacket; 203 uint8_t dsc_packed_pps[128]; 204 struct rect src; /* composition area */ 205 struct rect dst; /* stream addressable area */ 206 207 struct audio_info audio_info; 208 209 struct dc_info_packet hdr_static_metadata; 210 PHYSICAL_ADDRESS_LOC dmdata_address; 211 bool use_dynamic_meta; 212 213 struct dc_transfer_func out_transfer_func; 214 struct colorspace_transform gamut_remap_matrix; 215 struct dc_csc_transform csc_color_matrix; 216 217 enum dc_color_space output_color_space; 218 enum display_content_type content_type; 219 enum dc_dither_option dither_option; 220 221 enum view_3d_format view_format; 222 223 bool use_vsc_sdp_for_colorimetry; 224 bool ignore_msa_timing_param; 225 226 /** 227 * @allow_freesync: 228 * 229 * It say if Freesync is enabled or not. 230 */ 231 bool allow_freesync; 232 233 /** 234 * @vrr_active_variable: 235 * 236 * It describes if VRR is in use. 237 */ 238 bool vrr_active_variable; 239 bool freesync_on_desktop; 240 bool vrr_active_fixed; 241 242 bool converter_disable_audio; 243 uint8_t qs_bit; 244 uint8_t qy_bit; 245 246 /* TODO: custom INFO packets */ 247 /* TODO: ABM info (DMCU) */ 248 /* TODO: CEA VIC */ 249 250 /* DMCU info */ 251 unsigned int abm_level; 252 253 struct periodic_interrupt_config periodic_interrupt; 254 255 /* from core_stream struct */ 256 struct dc_context *ctx; 257 258 /* used by DCP and FMT */ 259 struct bit_depth_reduction_params bit_depth_params; 260 struct clamping_and_pixel_encoding_params clamping; 261 262 int phy_pix_clk; 263 enum signal_type signal; 264 bool dpms_off; 265 266 void *dm_stream_context; 267 268 struct dc_cursor_attributes cursor_attributes; 269 struct dc_cursor_position cursor_position; 270 bool hw_cursor_req; 271 272 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 273 274 /* from stream struct */ 275 struct kref refcount; 276 277 struct crtc_trigger_info triggered_crtc_reset; 278 279 /* writeback */ 280 unsigned int num_wb_info; 281 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 282 const struct dc_transfer_func *func_shaper; 283 const struct dc_3dlut *lut3d_func; 284 /* Computed state bits */ 285 bool mode_changed : 1; 286 287 /* Output from DC when stream state is committed or altered 288 * DC may only access these values during: 289 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 290 * values may not change outside of those calls 291 */ 292 struct { 293 // For interrupt management, some hardware instance 294 // offsets need to be exposed to DM 295 uint8_t otg_offset; 296 } out; 297 298 bool apply_edp_fast_boot_optimization; 299 bool apply_seamless_boot_optimization; 300 uint32_t apply_boot_odm_mode; 301 302 uint32_t stream_id; 303 304 struct test_pattern test_pattern; 305 union stream_update_flags update_flags; 306 307 bool has_non_synchronizable_pclk; 308 bool vblank_synchronized; 309 bool is_phantom; 310 311 struct luminance_data lumin_data; 312 bool scaler_sharpener_update; 313 }; 314 315 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 316 317 struct dc_stream_update { 318 struct dc_stream_state *stream; 319 320 struct rect src; 321 struct rect dst; 322 struct dc_transfer_func *out_transfer_func; 323 struct dc_info_packet *hdr_static_metadata; 324 unsigned int *abm_level; 325 326 struct periodic_interrupt_config *periodic_interrupt; 327 328 struct dc_info_packet *vrr_infopacket; 329 struct dc_info_packet *vsc_infopacket; 330 struct dc_info_packet *vsp_infopacket; 331 struct dc_info_packet *hfvsif_infopacket; 332 struct dc_info_packet *vtem_infopacket; 333 struct dc_info_packet *adaptive_sync_infopacket; 334 bool *dpms_off; 335 bool integer_scaling_update; 336 bool *allow_freesync; 337 bool *vrr_active_variable; 338 bool *vrr_active_fixed; 339 340 struct colorspace_transform *gamut_remap; 341 enum dc_color_space *output_color_space; 342 enum dc_dither_option *dither_option; 343 344 struct dc_csc_transform *output_csc_transform; 345 346 struct dc_writeback_update *wb_update; 347 struct dc_dsc_config *dsc_config; 348 struct dc_mst_stream_bw_update *mst_bw_update; 349 struct dc_transfer_func *func_shaper; 350 struct dc_3dlut *lut3d_func; 351 352 struct test_pattern *pending_test_pattern; 353 struct dc_crtc_timing_adjust *crtc_timing_adjust; 354 355 struct dc_cursor_attributes *cursor_attributes; 356 struct dc_cursor_position *cursor_position; 357 bool *hw_cursor_req; 358 bool *scaler_sharpener_update; 359 }; 360 361 bool dc_is_stream_unchanged( 362 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 363 bool dc_is_stream_scaling_unchanged( 364 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 365 366 /* 367 * Setup stream attributes if no stream updates are provided 368 * there will be no impact on the stream parameters 369 * 370 * Set up surface attributes and associate to a stream 371 * The surfaces parameter is an absolute set of all surface active for the stream. 372 * If no surfaces are provided, the stream will be blanked; no memory read. 373 * Any flip related attribute changes must be done through this interface. 374 * 375 * After this call: 376 * Surfaces attributes are programmed and configured to be composed into stream. 377 * This does not trigger a flip. No surface address is programmed. 378 * 379 */ 380 bool dc_update_planes_and_stream(struct dc *dc, 381 struct dc_surface_update *surface_updates, int surface_count, 382 struct dc_stream_state *dc_stream, 383 struct dc_stream_update *stream_update); 384 385 /* 386 * Set up surface attributes and associate to a stream 387 * The surfaces parameter is an absolute set of all surface active for the stream. 388 * If no surfaces are provided, the stream will be blanked; no memory read. 389 * Any flip related attribute changes must be done through this interface. 390 * 391 * After this call: 392 * Surfaces attributes are programmed and configured to be composed into stream. 393 * This does not trigger a flip. No surface address is programmed. 394 */ 395 void dc_commit_updates_for_stream(struct dc *dc, 396 struct dc_surface_update *srf_updates, 397 int surface_count, 398 struct dc_stream_state *stream, 399 struct dc_stream_update *stream_update, 400 struct dc_state *state); 401 /* 402 * Log the current stream state. 403 */ 404 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 405 406 uint8_t dc_get_current_stream_count(struct dc *dc); 407 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 408 409 /* 410 * Return the current frame counter. 411 */ 412 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 413 414 /* 415 * Send dp sdp message. 416 */ 417 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 418 const uint8_t *custom_sdp_message, 419 unsigned int sdp_message_size); 420 421 /* TODO: Return parsed values rather than direct register read 422 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 423 * being refactored properly to be dce-specific 424 */ 425 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 426 uint32_t *v_blank_start, 427 uint32_t *v_blank_end, 428 uint32_t *h_position, 429 uint32_t *v_position); 430 431 bool dc_stream_add_writeback(struct dc *dc, 432 struct dc_stream_state *stream, 433 struct dc_writeback_info *wb_info); 434 435 bool dc_stream_fc_disable_writeback(struct dc *dc, 436 struct dc_stream_state *stream, 437 uint32_t dwb_pipe_inst); 438 439 bool dc_stream_remove_writeback(struct dc *dc, 440 struct dc_stream_state *stream, 441 uint32_t dwb_pipe_inst); 442 443 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 444 struct dc_state *state, 445 struct dc_stream_state *stream); 446 447 bool dc_stream_warmup_writeback(struct dc *dc, 448 int num_dwb, 449 struct dc_writeback_info *wb_info); 450 451 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 452 453 bool dc_stream_set_dynamic_metadata(struct dc *dc, 454 struct dc_stream_state *stream, 455 struct dc_dmdata_attributes *dmdata_attr); 456 457 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 458 459 /* 460 * Enable stereo when commit_streams is not required, 461 * for example, frame alternate. 462 */ 463 void dc_enable_stereo( 464 struct dc *dc, 465 struct dc_state *context, 466 struct dc_stream_state *streams[], 467 uint8_t stream_count); 468 469 /* Triggers multi-stream synchronization. */ 470 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 471 472 enum surface_update_type dc_check_update_surfaces_for_stream( 473 struct dc *dc, 474 struct dc_surface_update *updates, 475 int surface_count, 476 struct dc_stream_update *stream_update, 477 const struct dc_stream_status *stream_status); 478 479 /** 480 * Create a new default stream for the requested sink 481 */ 482 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 483 484 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 485 486 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 487 488 void dc_stream_retain(struct dc_stream_state *dc_stream); 489 void dc_stream_release(struct dc_stream_state *dc_stream); 490 491 struct dc_stream_status *dc_stream_get_status( 492 struct dc_stream_state *dc_stream); 493 494 /******************************************************************************* 495 * Cursor interfaces - To manages the cursor within a stream 496 ******************************************************************************/ 497 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 498 499 void program_cursor_attributes( 500 struct dc *dc, 501 struct dc_stream_state *stream); 502 503 void program_cursor_position( 504 struct dc *dc, 505 struct dc_stream_state *stream); 506 507 bool dc_stream_set_cursor_attributes( 508 struct dc_stream_state *stream, 509 const struct dc_cursor_attributes *attributes); 510 511 bool dc_stream_program_cursor_attributes( 512 struct dc_stream_state *stream, 513 const struct dc_cursor_attributes *attributes); 514 515 bool dc_stream_set_cursor_position( 516 struct dc_stream_state *stream, 517 const struct dc_cursor_position *position); 518 519 bool dc_stream_program_cursor_position( 520 struct dc_stream_state *stream, 521 const struct dc_cursor_position *position); 522 523 524 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 525 struct dc_stream_state *stream, 526 struct dc_crtc_timing_adjust *adjust); 527 528 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 529 struct dc_stream_state *stream, 530 uint32_t *refresh_rate); 531 532 bool dc_stream_get_crtc_position(struct dc *dc, 533 struct dc_stream_state **stream, 534 int num_streams, 535 unsigned int *v_pos, 536 unsigned int *nom_v_pos); 537 538 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 539 bool dc_stream_forward_crc_window(struct dc_stream_state *stream, 540 struct rect *rect, 541 bool is_stop); 542 #endif 543 544 bool dc_stream_configure_crc(struct dc *dc, 545 struct dc_stream_state *stream, 546 struct crc_params *crc_window, 547 bool enable, 548 bool continuous); 549 550 bool dc_stream_get_crc(struct dc *dc, 551 struct dc_stream_state *stream, 552 uint32_t *r_cr, 553 uint32_t *g_y, 554 uint32_t *b_cb); 555 556 void dc_stream_set_static_screen_params(struct dc *dc, 557 struct dc_stream_state **stream, 558 int num_streams, 559 const struct dc_static_screen_params *params); 560 561 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 562 enum dc_dynamic_expansion option); 563 564 void dc_stream_set_dither_option(struct dc_stream_state *stream, 565 enum dc_dither_option option); 566 567 bool dc_stream_set_gamut_remap(struct dc *dc, 568 const struct dc_stream_state *stream); 569 570 bool dc_stream_program_csc_matrix(struct dc *dc, 571 struct dc_stream_state *stream); 572 573 bool dc_stream_get_crtc_position(struct dc *dc, 574 struct dc_stream_state **stream, 575 int num_streams, 576 unsigned int *v_pos, 577 unsigned int *nom_v_pos); 578 579 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 580 581 void dc_dmub_update_dirty_rect(struct dc *dc, 582 int surface_count, 583 struct dc_stream_state *stream, 584 struct dc_surface_update *srf_updates, 585 struct dc_state *context); 586 #endif /* DC_STREAM_H_ */ 587