1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Bluetooth Software UART Qualcomm protocol 4 * 5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management 6 * protocol extension to H4. 7 * 8 * Copyright (C) 2007 Texas Instruments, Inc. 9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. 10 * 11 * Acknowledgements: 12 * This file is based on hci_ll.c, which was... 13 * Written by Ohad Ben-Cohen <ohad@bencohen.org> 14 * which was in turn based on hci_h4.c, which was written 15 * by Maxim Krasnyansky and Marcel Holtmann. 16 */ 17 18 #include <linux/kernel.h> 19 #include <linux/clk.h> 20 #include <linux/completion.h> 21 #include <linux/debugfs.h> 22 #include <linux/delay.h> 23 #include <linux/devcoredump.h> 24 #include <linux/device.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/module.h> 27 #include <linux/of.h> 28 #include <linux/acpi.h> 29 #include <linux/platform_device.h> 30 #include <linux/pwrseq/consumer.h> 31 #include <linux/regulator/consumer.h> 32 #include <linux/serdev.h> 33 #include <linux/string_choices.h> 34 #include <linux/mutex.h> 35 #include <linux/unaligned.h> 36 37 #include <net/bluetooth/bluetooth.h> 38 #include <net/bluetooth/hci_core.h> 39 40 #include "hci_uart.h" 41 #include "btqca.h" 42 43 /* HCI_IBS protocol messages */ 44 #define HCI_IBS_SLEEP_IND 0xFE 45 #define HCI_IBS_WAKE_IND 0xFD 46 #define HCI_IBS_WAKE_ACK 0xFC 47 #define HCI_MAX_IBS_SIZE 10 48 49 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 50 #define IBS_BTSOC_TX_IDLE_TIMEOUT msecs_to_jiffies(200) 51 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 52 #define CMD_TRANS_TIMEOUT msecs_to_jiffies(100) 53 #define MEMDUMP_TIMEOUT msecs_to_jiffies(8000) 54 #define FW_DOWNLOAD_TIMEOUT msecs_to_jiffies(3000) 55 #define IBS_DISABLE_SSR_TIMEOUT (MEMDUMP_TIMEOUT + FW_DOWNLOAD_TIMEOUT) 56 57 /* susclk rate */ 58 #define SUSCLK_RATE_32KHZ 32768 59 60 /* Controller debug log header */ 61 #define QCA_DEBUG_HANDLE 0x2EDC 62 63 /* max retry count when init fails */ 64 #define MAX_INIT_RETRIES 3 65 66 /* Controller dump header */ 67 #define QCA_SSR_DUMP_HANDLE 0x0108 68 #define QCA_DUMP_PACKET_SIZE 255 69 #define QCA_LAST_SEQUENCE_NUM 0xFFFF 70 #define QCA_CRASHBYTE_PACKET_LEN 1096 71 #define QCA_MEMDUMP_BYTE 0xFB 72 73 enum qca_flags { 74 QCA_IBS_DISABLED, 75 QCA_DROP_VENDOR_EVENT, 76 QCA_SUSPENDING, 77 QCA_MEMDUMP_COLLECTION, 78 QCA_HW_ERROR_EVENT, 79 QCA_SSR_TRIGGERED, 80 QCA_BT_OFF, 81 QCA_ROM_FW, 82 QCA_DEBUGFS_CREATED, 83 }; 84 85 enum qca_capabilities { 86 QCA_CAP_WIDEBAND_SPEECH = BIT(0), 87 QCA_CAP_VALID_LE_STATES = BIT(1), 88 QCA_CAP_HFP_HW_OFFLOAD = BIT(2), 89 }; 90 91 /* HCI_IBS transmit side sleep protocol states */ 92 enum tx_ibs_states { 93 HCI_IBS_TX_ASLEEP, 94 HCI_IBS_TX_WAKING, 95 HCI_IBS_TX_AWAKE, 96 }; 97 98 /* HCI_IBS receive side sleep protocol states */ 99 enum rx_states { 100 HCI_IBS_RX_ASLEEP, 101 HCI_IBS_RX_AWAKE, 102 }; 103 104 /* HCI_IBS transmit and receive side clock state vote */ 105 enum hci_ibs_clock_state_vote { 106 HCI_IBS_VOTE_STATS_UPDATE, 107 HCI_IBS_TX_VOTE_CLOCK_ON, 108 HCI_IBS_TX_VOTE_CLOCK_OFF, 109 HCI_IBS_RX_VOTE_CLOCK_ON, 110 HCI_IBS_RX_VOTE_CLOCK_OFF, 111 }; 112 113 /* Controller memory dump states */ 114 enum qca_memdump_states { 115 QCA_MEMDUMP_IDLE, 116 QCA_MEMDUMP_COLLECTING, 117 QCA_MEMDUMP_COLLECTED, 118 QCA_MEMDUMP_TIMEOUT, 119 }; 120 121 struct qca_memdump_info { 122 u32 current_seq_no; 123 u32 received_dump; 124 u32 ram_dump_size; 125 }; 126 127 struct qca_memdump_event_hdr { 128 __u8 evt; 129 __u8 plen; 130 __u16 opcode; 131 __le16 seq_no; 132 __u8 reserved; 133 } __packed; 134 135 136 struct qca_dump_size { 137 __le32 dump_size; 138 } __packed; 139 140 struct qca_data { 141 struct hci_uart *hu; 142 struct sk_buff *rx_skb; 143 struct sk_buff_head txq; 144 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ 145 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */ 146 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ 147 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ 148 u8 rx_ibs_state; /* HCI_IBS receive side power state */ 149 bool tx_vote; /* Clock must be on for TX */ 150 bool rx_vote; /* Clock must be on for RX */ 151 struct timer_list tx_idle_timer; 152 u32 tx_idle_delay; 153 struct timer_list wake_retrans_timer; 154 u32 wake_retrans; 155 struct workqueue_struct *workqueue; 156 struct work_struct ws_awake_rx; 157 struct work_struct ws_awake_device; 158 struct work_struct ws_rx_vote_off; 159 struct work_struct ws_tx_vote_off; 160 struct work_struct ctrl_memdump_evt; 161 struct delayed_work ctrl_memdump_timeout; 162 struct qca_memdump_info *qca_memdump; 163 unsigned long flags; 164 struct completion drop_ev_comp; 165 wait_queue_head_t suspend_wait_q; 166 enum qca_memdump_states memdump_state; 167 struct mutex hci_memdump_lock; 168 169 u16 fw_version; 170 u16 controller_id; 171 /* For debugging purpose */ 172 u64 ibs_sent_wacks; 173 u64 ibs_sent_slps; 174 u64 ibs_sent_wakes; 175 u64 ibs_recv_wacks; 176 u64 ibs_recv_slps; 177 u64 ibs_recv_wakes; 178 u64 vote_last_jif; 179 u32 vote_on_ms; 180 u32 vote_off_ms; 181 u64 tx_votes_on; 182 u64 rx_votes_on; 183 u64 tx_votes_off; 184 u64 rx_votes_off; 185 u64 votes_on; 186 u64 votes_off; 187 }; 188 189 enum qca_speed_type { 190 QCA_INIT_SPEED = 1, 191 QCA_OPER_SPEED 192 }; 193 194 /* 195 * Voltage regulator information required for configuring the 196 * QCA Bluetooth chipset 197 */ 198 struct qca_vreg { 199 const char *name; 200 unsigned int load_uA; 201 }; 202 203 struct qca_device_data { 204 enum qca_btsoc_type soc_type; 205 struct qca_vreg *vregs; 206 size_t num_vregs; 207 uint32_t capabilities; 208 }; 209 210 /* 211 * Platform data for the QCA Bluetooth power driver. 212 */ 213 struct qca_power { 214 struct device *dev; 215 struct regulator_bulk_data *vreg_bulk; 216 int num_vregs; 217 bool vregs_on; 218 struct pwrseq_desc *pwrseq; 219 }; 220 221 struct qca_serdev { 222 struct hci_uart serdev_hu; 223 struct gpio_desc *bt_en; 224 struct gpio_desc *sw_ctrl; 225 struct clk *susclk; 226 enum qca_btsoc_type btsoc_type; 227 struct qca_power *bt_power; 228 u32 init_speed; 229 u32 oper_speed; 230 bool bdaddr_property_broken; 231 bool support_hfp_hw_offload; 232 const char *firmware_name[2]; 233 }; 234 235 static int qca_regulator_enable(struct qca_serdev *qcadev); 236 static void qca_regulator_disable(struct qca_serdev *qcadev); 237 static void qca_power_off(struct hci_uart *hu); 238 static void qca_controller_memdump(struct work_struct *work); 239 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb); 240 241 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) 242 { 243 enum qca_btsoc_type soc_type; 244 245 if (hu->serdev) { 246 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 247 248 soc_type = qsd->btsoc_type; 249 } else { 250 soc_type = QCA_ROME; 251 } 252 253 return soc_type; 254 } 255 256 static const char *qca_get_firmware_name(struct hci_uart *hu) 257 { 258 if (hu->serdev) { 259 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 260 261 return qsd->firmware_name[0]; 262 } else { 263 return NULL; 264 } 265 } 266 267 static const char *qca_get_rampatch_name(struct hci_uart *hu) 268 { 269 if (hu->serdev) { 270 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 271 272 return qsd->firmware_name[1]; 273 } else { 274 return NULL; 275 } 276 } 277 278 static void __serial_clock_on(struct tty_struct *tty) 279 { 280 /* TODO: Some chipset requires to enable UART clock on client 281 * side to save power consumption or manual work is required. 282 * Please put your code to control UART clock here if needed 283 */ 284 } 285 286 static void __serial_clock_off(struct tty_struct *tty) 287 { 288 /* TODO: Some chipset requires to disable UART clock on client 289 * side to save power consumption or manual work is required. 290 * Please put your code to control UART clock off here if needed 291 */ 292 } 293 294 /* serial_clock_vote needs to be called with the ibs lock held */ 295 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) 296 { 297 struct qca_data *qca = hu->priv; 298 unsigned int diff; 299 300 bool old_vote = (qca->tx_vote | qca->rx_vote); 301 bool new_vote; 302 303 switch (vote) { 304 case HCI_IBS_VOTE_STATS_UPDATE: 305 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 306 307 if (old_vote) 308 qca->vote_off_ms += diff; 309 else 310 qca->vote_on_ms += diff; 311 return; 312 313 case HCI_IBS_TX_VOTE_CLOCK_ON: 314 qca->tx_vote = true; 315 qca->tx_votes_on++; 316 break; 317 318 case HCI_IBS_RX_VOTE_CLOCK_ON: 319 qca->rx_vote = true; 320 qca->rx_votes_on++; 321 break; 322 323 case HCI_IBS_TX_VOTE_CLOCK_OFF: 324 qca->tx_vote = false; 325 qca->tx_votes_off++; 326 break; 327 328 case HCI_IBS_RX_VOTE_CLOCK_OFF: 329 qca->rx_vote = false; 330 qca->rx_votes_off++; 331 break; 332 333 default: 334 BT_ERR("Voting irregularity"); 335 return; 336 } 337 338 new_vote = qca->rx_vote | qca->tx_vote; 339 340 if (new_vote != old_vote) { 341 if (new_vote) 342 __serial_clock_on(hu->tty); 343 else 344 __serial_clock_off(hu->tty); 345 346 BT_DBG("Vote serial clock %s(%s)", str_true_false(new_vote), 347 str_true_false(vote)); 348 349 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 350 351 if (new_vote) { 352 qca->votes_on++; 353 qca->vote_off_ms += diff; 354 } else { 355 qca->votes_off++; 356 qca->vote_on_ms += diff; 357 } 358 qca->vote_last_jif = jiffies; 359 } 360 } 361 362 /* Builds and sends an HCI_IBS command packet. 363 * These are very simple packets with only 1 cmd byte. 364 */ 365 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) 366 { 367 int err = 0; 368 struct sk_buff *skb = NULL; 369 struct qca_data *qca = hu->priv; 370 371 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); 372 373 skb = bt_skb_alloc(1, GFP_ATOMIC); 374 if (!skb) { 375 BT_ERR("Failed to allocate memory for HCI_IBS packet"); 376 return -ENOMEM; 377 } 378 379 /* Assign HCI_IBS type */ 380 skb_put_u8(skb, cmd); 381 382 skb_queue_tail(&qca->txq, skb); 383 384 return err; 385 } 386 387 static void qca_wq_awake_device(struct work_struct *work) 388 { 389 struct qca_data *qca = container_of(work, struct qca_data, 390 ws_awake_device); 391 struct hci_uart *hu = qca->hu; 392 unsigned long retrans_delay; 393 unsigned long flags; 394 395 BT_DBG("hu %p wq awake device", hu); 396 397 /* Vote for serial clock */ 398 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); 399 400 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 401 402 /* Send wake indication to device */ 403 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) 404 BT_ERR("Failed to send WAKE to device"); 405 406 qca->ibs_sent_wakes++; 407 408 /* Start retransmit timer */ 409 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 410 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 411 412 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 413 414 /* Actually send the packets */ 415 hci_uart_tx_wakeup(hu); 416 } 417 418 static void qca_wq_awake_rx(struct work_struct *work) 419 { 420 struct qca_data *qca = container_of(work, struct qca_data, 421 ws_awake_rx); 422 struct hci_uart *hu = qca->hu; 423 unsigned long flags; 424 425 BT_DBG("hu %p wq awake rx", hu); 426 427 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); 428 429 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 430 qca->rx_ibs_state = HCI_IBS_RX_AWAKE; 431 432 /* Always acknowledge device wake up, 433 * sending IBS message doesn't count as TX ON. 434 */ 435 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) 436 BT_ERR("Failed to acknowledge device wake up"); 437 438 qca->ibs_sent_wacks++; 439 440 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 441 442 /* Actually send the packets */ 443 hci_uart_tx_wakeup(hu); 444 } 445 446 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) 447 { 448 struct qca_data *qca = container_of(work, struct qca_data, 449 ws_rx_vote_off); 450 struct hci_uart *hu = qca->hu; 451 452 BT_DBG("hu %p rx clock vote off", hu); 453 454 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); 455 } 456 457 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) 458 { 459 struct qca_data *qca = container_of(work, struct qca_data, 460 ws_tx_vote_off); 461 struct hci_uart *hu = qca->hu; 462 463 BT_DBG("hu %p tx clock vote off", hu); 464 465 /* Run HCI tx handling unlocked */ 466 hci_uart_tx_wakeup(hu); 467 468 /* Now that message queued to tty driver, vote for tty clocks off. 469 * It is up to the tty driver to pend the clocks off until tx done. 470 */ 471 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 472 } 473 474 static void hci_ibs_tx_idle_timeout(struct timer_list *t) 475 { 476 struct qca_data *qca = timer_container_of(qca, t, tx_idle_timer); 477 struct hci_uart *hu = qca->hu; 478 unsigned long flags; 479 480 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); 481 482 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 483 flags, SINGLE_DEPTH_NESTING); 484 485 switch (qca->tx_ibs_state) { 486 case HCI_IBS_TX_AWAKE: 487 /* TX_IDLE, go to SLEEP */ 488 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { 489 BT_ERR("Failed to send SLEEP to device"); 490 break; 491 } 492 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 493 qca->ibs_sent_slps++; 494 queue_work(qca->workqueue, &qca->ws_tx_vote_off); 495 break; 496 497 case HCI_IBS_TX_ASLEEP: 498 case HCI_IBS_TX_WAKING: 499 default: 500 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 501 break; 502 } 503 504 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 505 } 506 507 static void hci_ibs_wake_retrans_timeout(struct timer_list *t) 508 { 509 struct qca_data *qca = timer_container_of(qca, t, wake_retrans_timer); 510 struct hci_uart *hu = qca->hu; 511 unsigned long flags, retrans_delay; 512 bool retransmit = false; 513 514 BT_DBG("hu %p wake retransmit timeout in %d state", 515 hu, qca->tx_ibs_state); 516 517 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 518 flags, SINGLE_DEPTH_NESTING); 519 520 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */ 521 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 522 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 523 return; 524 } 525 526 switch (qca->tx_ibs_state) { 527 case HCI_IBS_TX_WAKING: 528 /* No WAKE_ACK, retransmit WAKE */ 529 retransmit = true; 530 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { 531 BT_ERR("Failed to acknowledge device wake up"); 532 break; 533 } 534 qca->ibs_sent_wakes++; 535 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 536 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 537 break; 538 539 case HCI_IBS_TX_ASLEEP: 540 case HCI_IBS_TX_AWAKE: 541 default: 542 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 543 break; 544 } 545 546 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 547 548 if (retransmit) 549 hci_uart_tx_wakeup(hu); 550 } 551 552 553 static void qca_controller_memdump_timeout(struct work_struct *work) 554 { 555 struct qca_data *qca = container_of(work, struct qca_data, 556 ctrl_memdump_timeout.work); 557 struct hci_uart *hu = qca->hu; 558 559 mutex_lock(&qca->hci_memdump_lock); 560 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 561 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 562 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 563 /* Inject hw error event to reset the device 564 * and driver. 565 */ 566 hci_reset_dev(hu->hdev); 567 } 568 } 569 570 mutex_unlock(&qca->hci_memdump_lock); 571 } 572 573 574 /* Initialize protocol */ 575 static int qca_open(struct hci_uart *hu) 576 { 577 struct qca_serdev *qcadev; 578 struct qca_data *qca; 579 580 BT_DBG("hu %p qca_open", hu); 581 582 if (!hci_uart_has_flow_control(hu)) 583 return -EOPNOTSUPP; 584 585 qca = kzalloc_obj(*qca); 586 if (!qca) 587 return -ENOMEM; 588 589 skb_queue_head_init(&qca->txq); 590 skb_queue_head_init(&qca->tx_wait_q); 591 skb_queue_head_init(&qca->rx_memdump_q); 592 spin_lock_init(&qca->hci_ibs_lock); 593 mutex_init(&qca->hci_memdump_lock); 594 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); 595 if (!qca->workqueue) { 596 BT_ERR("QCA Workqueue not initialized properly"); 597 kfree(qca); 598 return -ENOMEM; 599 } 600 601 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); 602 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); 603 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); 604 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); 605 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump); 606 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout, 607 qca_controller_memdump_timeout); 608 init_waitqueue_head(&qca->suspend_wait_q); 609 610 qca->hu = hu; 611 init_completion(&qca->drop_ev_comp); 612 613 /* Assume we start with both sides asleep -- extra wakes OK */ 614 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 615 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 616 617 qca->vote_last_jif = jiffies; 618 619 hu->priv = qca; 620 621 if (hu->serdev) { 622 qcadev = serdev_device_get_drvdata(hu->serdev); 623 624 switch (qcadev->btsoc_type) { 625 case QCA_WCN3950: 626 case QCA_WCN3988: 627 case QCA_WCN3990: 628 case QCA_WCN3991: 629 case QCA_WCN3998: 630 case QCA_WCN6750: 631 hu->init_speed = qcadev->init_speed; 632 break; 633 634 default: 635 break; 636 } 637 638 if (qcadev->oper_speed) 639 hu->oper_speed = qcadev->oper_speed; 640 } 641 642 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); 643 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; 644 645 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); 646 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS; 647 648 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", 649 qca->tx_idle_delay, qca->wake_retrans); 650 651 return 0; 652 } 653 654 static void qca_debugfs_init(struct hci_dev *hdev) 655 { 656 struct hci_uart *hu = hci_get_drvdata(hdev); 657 struct qca_data *qca = hu->priv; 658 struct dentry *ibs_dir; 659 umode_t mode; 660 661 if (!hdev->debugfs) 662 return; 663 664 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags)) 665 return; 666 667 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); 668 669 /* read only */ 670 mode = 0444; 671 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); 672 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); 673 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, 674 &qca->ibs_sent_slps); 675 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, 676 &qca->ibs_sent_wakes); 677 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, 678 &qca->ibs_sent_wacks); 679 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, 680 &qca->ibs_recv_slps); 681 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, 682 &qca->ibs_recv_wakes); 683 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, 684 &qca->ibs_recv_wacks); 685 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); 686 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); 687 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); 688 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); 689 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); 690 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); 691 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); 692 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); 693 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); 694 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); 695 696 /* read/write */ 697 mode = 0644; 698 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); 699 debugfs_create_u32("tx_idle_delay", mode, ibs_dir, 700 &qca->tx_idle_delay); 701 } 702 703 /* Flush protocol data */ 704 static int qca_flush(struct hci_uart *hu) 705 { 706 struct qca_data *qca = hu->priv; 707 708 BT_DBG("hu %p qca flush", hu); 709 710 skb_queue_purge(&qca->tx_wait_q); 711 skb_queue_purge(&qca->txq); 712 713 return 0; 714 } 715 716 /* Close protocol */ 717 static int qca_close(struct hci_uart *hu) 718 { 719 struct qca_data *qca = hu->priv; 720 721 BT_DBG("hu %p qca close", hu); 722 723 /* BT core skips qca_hci_shutdown() which calls qca_power_off() on rmmod */ 724 if (!test_bit(QCA_BT_OFF, &qca->flags)) 725 qca_power_off(hu); 726 727 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); 728 729 skb_queue_purge(&qca->tx_wait_q); 730 skb_queue_purge(&qca->txq); 731 skb_queue_purge(&qca->rx_memdump_q); 732 /* 733 * Shut the timers down so they can't be rearmed when 734 * destroy_workqueue() drains pending work which in turn might try 735 * to arm a timer. After shutdown rearm attempts are silently 736 * ignored by the timer core code. 737 */ 738 timer_shutdown_sync(&qca->tx_idle_timer); 739 timer_shutdown_sync(&qca->wake_retrans_timer); 740 destroy_workqueue(qca->workqueue); 741 qca->hu = NULL; 742 743 kfree_skb(qca->rx_skb); 744 745 hu->priv = NULL; 746 747 kfree(qca); 748 749 return 0; 750 } 751 752 /* Called upon a wake-up-indication from the device. 753 */ 754 static void device_want_to_wakeup(struct hci_uart *hu) 755 { 756 unsigned long flags; 757 struct qca_data *qca = hu->priv; 758 759 BT_DBG("hu %p want to wake up", hu); 760 761 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 762 763 qca->ibs_recv_wakes++; 764 765 /* Don't wake the rx up when suspending. */ 766 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 767 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 768 return; 769 } 770 771 switch (qca->rx_ibs_state) { 772 case HCI_IBS_RX_ASLEEP: 773 /* Make sure clock is on - we may have turned clock off since 774 * receiving the wake up indicator awake rx clock. 775 */ 776 queue_work(qca->workqueue, &qca->ws_awake_rx); 777 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 778 return; 779 780 case HCI_IBS_RX_AWAKE: 781 /* Always acknowledge device wake up, 782 * sending IBS message doesn't count as TX ON. 783 */ 784 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { 785 BT_ERR("Failed to acknowledge device wake up"); 786 break; 787 } 788 qca->ibs_sent_wacks++; 789 break; 790 791 default: 792 /* Any other state is illegal */ 793 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", 794 qca->rx_ibs_state); 795 break; 796 } 797 798 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 799 800 /* Actually send the packets */ 801 hci_uart_tx_wakeup(hu); 802 } 803 804 /* Called upon a sleep-indication from the device. 805 */ 806 static void device_want_to_sleep(struct hci_uart *hu) 807 { 808 unsigned long flags; 809 struct qca_data *qca = hu->priv; 810 811 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); 812 813 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 814 815 qca->ibs_recv_slps++; 816 817 switch (qca->rx_ibs_state) { 818 case HCI_IBS_RX_AWAKE: 819 /* Update state */ 820 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 821 /* Vote off rx clock under workqueue */ 822 queue_work(qca->workqueue, &qca->ws_rx_vote_off); 823 break; 824 825 case HCI_IBS_RX_ASLEEP: 826 break; 827 828 default: 829 /* Any other state is illegal */ 830 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", 831 qca->rx_ibs_state); 832 break; 833 } 834 835 wake_up_interruptible(&qca->suspend_wait_q); 836 837 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 838 } 839 840 /* Called upon wake-up-acknowledgement from the device 841 */ 842 static void device_woke_up(struct hci_uart *hu) 843 { 844 unsigned long flags, idle_delay; 845 struct qca_data *qca = hu->priv; 846 struct sk_buff *skb = NULL; 847 848 BT_DBG("hu %p woke up", hu); 849 850 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 851 852 qca->ibs_recv_wacks++; 853 854 /* Don't react to the wake-up-acknowledgment when suspending. */ 855 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 856 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 857 return; 858 } 859 860 switch (qca->tx_ibs_state) { 861 case HCI_IBS_TX_AWAKE: 862 /* Expect one if we send 2 WAKEs */ 863 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", 864 qca->tx_ibs_state); 865 break; 866 867 case HCI_IBS_TX_WAKING: 868 /* Send pending packets */ 869 while ((skb = skb_dequeue(&qca->tx_wait_q))) 870 skb_queue_tail(&qca->txq, skb); 871 872 /* Switch timers and change state to HCI_IBS_TX_AWAKE */ 873 timer_delete(&qca->wake_retrans_timer); 874 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 875 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 876 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 877 break; 878 879 case HCI_IBS_TX_ASLEEP: 880 default: 881 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", 882 qca->tx_ibs_state); 883 break; 884 } 885 886 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 887 888 /* Actually send the packets */ 889 hci_uart_tx_wakeup(hu); 890 } 891 892 /* Enqueue frame for transmission (padding, crc, etc) may be called from 893 * two simultaneous tasklets. 894 */ 895 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) 896 { 897 unsigned long flags = 0, idle_delay; 898 struct qca_data *qca = hu->priv; 899 900 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, 901 qca->tx_ibs_state); 902 903 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 904 /* As SSR is in progress, ignore the packets */ 905 bt_dev_dbg(hu->hdev, "SSR is in progress"); 906 kfree_skb(skb); 907 return 0; 908 } 909 910 /* Prepend skb with frame type */ 911 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); 912 913 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 914 915 /* Don't go to sleep in middle of patch download or 916 * Out-Of-Band(GPIOs control) sleep is selected. 917 * Don't wake the device up when suspending. 918 */ 919 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 920 test_bit(QCA_SUSPENDING, &qca->flags)) { 921 skb_queue_tail(&qca->txq, skb); 922 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 923 return 0; 924 } 925 926 /* Act according to current state */ 927 switch (qca->tx_ibs_state) { 928 case HCI_IBS_TX_AWAKE: 929 BT_DBG("Device awake, sending normally"); 930 skb_queue_tail(&qca->txq, skb); 931 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 932 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 933 break; 934 935 case HCI_IBS_TX_ASLEEP: 936 BT_DBG("Device asleep, waking up and queueing packet"); 937 /* Save packet for later */ 938 skb_queue_tail(&qca->tx_wait_q, skb); 939 940 qca->tx_ibs_state = HCI_IBS_TX_WAKING; 941 /* Schedule a work queue to wake up device */ 942 queue_work(qca->workqueue, &qca->ws_awake_device); 943 break; 944 945 case HCI_IBS_TX_WAKING: 946 BT_DBG("Device waking up, queueing packet"); 947 /* Transient state; just keep packet for later */ 948 skb_queue_tail(&qca->tx_wait_q, skb); 949 break; 950 951 default: 952 BT_ERR("Illegal tx state: %d (losing packet)", 953 qca->tx_ibs_state); 954 dev_kfree_skb_irq(skb); 955 break; 956 } 957 958 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 959 960 return 0; 961 } 962 963 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) 964 { 965 struct hci_uart *hu = hci_get_drvdata(hdev); 966 967 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); 968 969 device_want_to_sleep(hu); 970 971 kfree_skb(skb); 972 return 0; 973 } 974 975 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) 976 { 977 struct hci_uart *hu = hci_get_drvdata(hdev); 978 979 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); 980 981 device_want_to_wakeup(hu); 982 983 kfree_skb(skb); 984 return 0; 985 } 986 987 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) 988 { 989 struct hci_uart *hu = hci_get_drvdata(hdev); 990 991 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); 992 993 device_woke_up(hu); 994 995 kfree_skb(skb); 996 return 0; 997 } 998 999 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) 1000 { 1001 /* We receive debug logs from chip as an ACL packets. 1002 * Instead of sending the data to ACL to decode the 1003 * received data, we are pushing them to the above layers 1004 * as a diagnostic packet. 1005 */ 1006 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) 1007 return hci_recv_diag(hdev, skb); 1008 1009 return hci_recv_frame(hdev, skb); 1010 } 1011 1012 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb) 1013 { 1014 struct hci_uart *hu = hci_get_drvdata(hdev); 1015 struct qca_data *qca = hu->priv; 1016 char buf[80]; 1017 1018 snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n", 1019 qca->controller_id); 1020 skb_put_data(skb, buf, strlen(buf)); 1021 1022 snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n", 1023 qca->fw_version); 1024 skb_put_data(skb, buf, strlen(buf)); 1025 1026 snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n"); 1027 skb_put_data(skb, buf, strlen(buf)); 1028 1029 snprintf(buf, sizeof(buf), "Driver: %s\n", 1030 hu->serdev ? hu->serdev->dev.driver->name : "hci_ldisc_qca"); 1031 skb_put_data(skb, buf, strlen(buf)); 1032 } 1033 1034 static void qca_controller_memdump(struct work_struct *work) 1035 { 1036 struct qca_data *qca = container_of(work, struct qca_data, 1037 ctrl_memdump_evt); 1038 struct hci_uart *hu = qca->hu; 1039 struct sk_buff *skb; 1040 struct qca_memdump_event_hdr *cmd_hdr; 1041 struct qca_memdump_info *qca_memdump = qca->qca_memdump; 1042 struct qca_dump_size *dump; 1043 u16 seq_no; 1044 u32 rx_size; 1045 int ret = 0; 1046 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1047 1048 while ((skb = skb_dequeue(&qca->rx_memdump_q))) { 1049 1050 mutex_lock(&qca->hci_memdump_lock); 1051 /* Skip processing the received packets if timeout detected 1052 * or memdump collection completed. 1053 */ 1054 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1055 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1056 mutex_unlock(&qca->hci_memdump_lock); 1057 return; 1058 } 1059 1060 if (!qca_memdump) { 1061 qca_memdump = kzalloc_obj(*qca_memdump, GFP_ATOMIC); 1062 if (!qca_memdump) { 1063 mutex_unlock(&qca->hci_memdump_lock); 1064 return; 1065 } 1066 1067 qca->qca_memdump = qca_memdump; 1068 } 1069 1070 qca->memdump_state = QCA_MEMDUMP_COLLECTING; 1071 cmd_hdr = (void *) skb->data; 1072 seq_no = __le16_to_cpu(cmd_hdr->seq_no); 1073 skb_pull(skb, sizeof(struct qca_memdump_event_hdr)); 1074 1075 if (!seq_no) { 1076 1077 /* This is the first frame of memdump packet from 1078 * the controller, Disable IBS to receive dump 1079 * with out any interruption, ideally time required for 1080 * the controller to send the dump is 8 seconds. let us 1081 * start timer to handle this asynchronous activity. 1082 */ 1083 set_bit(QCA_IBS_DISABLED, &qca->flags); 1084 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1085 dump = (void *) skb->data; 1086 qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size); 1087 if (!(qca_memdump->ram_dump_size)) { 1088 bt_dev_err(hu->hdev, "Rx invalid memdump size"); 1089 kfree(qca_memdump); 1090 qca->qca_memdump = NULL; 1091 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1092 clear_and_wake_up_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1093 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1094 kfree_skb(skb); 1095 mutex_unlock(&qca->hci_memdump_lock); 1096 return; 1097 } 1098 1099 queue_delayed_work(qca->workqueue, 1100 &qca->ctrl_memdump_timeout, 1101 MEMDUMP_TIMEOUT); 1102 skb_pull(skb, sizeof(qca_memdump->ram_dump_size)); 1103 qca_memdump->current_seq_no = 0; 1104 qca_memdump->received_dump = 0; 1105 ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size); 1106 bt_dev_info(hu->hdev, "hci_devcd_init Return:%d", 1107 ret); 1108 if (ret < 0) { 1109 kfree(qca->qca_memdump); 1110 qca->qca_memdump = NULL; 1111 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1112 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1113 clear_and_wake_up_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1114 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1115 mutex_unlock(&qca->hci_memdump_lock); 1116 return; 1117 } 1118 1119 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u", 1120 qca_memdump->ram_dump_size); 1121 1122 } 1123 1124 /* If sequence no 0 is missed then there is no point in 1125 * accepting the other sequences. 1126 */ 1127 if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 1128 bt_dev_err(hu->hdev, "QCA: Discarding other packets"); 1129 kfree(qca_memdump); 1130 kfree_skb(skb); 1131 mutex_unlock(&qca->hci_memdump_lock); 1132 return; 1133 } 1134 /* There could be chance of missing some packets from 1135 * the controller. In such cases let us store the dummy 1136 * packets in the buffer. 1137 */ 1138 /* For QCA6390, controller does not lost packets but 1139 * sequence number field of packet sometimes has error 1140 * bits, so skip this checking for missing packet. 1141 */ 1142 while ((seq_no > qca_memdump->current_seq_no + 1) && 1143 (soc_type != QCA_QCA6390) && 1144 seq_no != QCA_LAST_SEQUENCE_NUM) { 1145 bt_dev_err(hu->hdev, "QCA controller missed packet:%d", 1146 qca_memdump->current_seq_no); 1147 rx_size = qca_memdump->received_dump; 1148 rx_size += QCA_DUMP_PACKET_SIZE; 1149 if (rx_size > qca_memdump->ram_dump_size) { 1150 bt_dev_err(hu->hdev, 1151 "QCA memdump received %d, no space for missed packet", 1152 qca_memdump->received_dump); 1153 break; 1154 } 1155 hci_devcd_append_pattern(hu->hdev, 0x00, 1156 QCA_DUMP_PACKET_SIZE); 1157 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE; 1158 qca_memdump->current_seq_no++; 1159 } 1160 1161 rx_size = qca_memdump->received_dump + skb->len; 1162 if (rx_size <= qca_memdump->ram_dump_size) { 1163 if ((seq_no != QCA_LAST_SEQUENCE_NUM) && 1164 (seq_no != qca_memdump->current_seq_no)) { 1165 bt_dev_err(hu->hdev, 1166 "QCA memdump unexpected packet %d", 1167 seq_no); 1168 } 1169 bt_dev_dbg(hu->hdev, 1170 "QCA memdump packet %d with length %d", 1171 seq_no, skb->len); 1172 hci_devcd_append(hu->hdev, skb); 1173 qca_memdump->current_seq_no += 1; 1174 qca_memdump->received_dump = rx_size; 1175 } else { 1176 bt_dev_err(hu->hdev, 1177 "QCA memdump received no space for packet %d", 1178 qca_memdump->current_seq_no); 1179 } 1180 1181 if (seq_no == QCA_LAST_SEQUENCE_NUM) { 1182 bt_dev_info(hu->hdev, 1183 "QCA memdump Done, received %d, total %d", 1184 qca_memdump->received_dump, 1185 qca_memdump->ram_dump_size); 1186 hci_devcd_complete(hu->hdev); 1187 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1188 kfree(qca->qca_memdump); 1189 qca->qca_memdump = NULL; 1190 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1191 clear_and_wake_up_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1192 } 1193 1194 mutex_unlock(&qca->hci_memdump_lock); 1195 } 1196 1197 } 1198 1199 static int qca_controller_memdump_event(struct hci_dev *hdev, 1200 struct sk_buff *skb) 1201 { 1202 struct hci_uart *hu = hci_get_drvdata(hdev); 1203 struct qca_data *qca = hu->priv; 1204 1205 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1206 skb_queue_tail(&qca->rx_memdump_q, skb); 1207 queue_work(qca->workqueue, &qca->ctrl_memdump_evt); 1208 1209 return 0; 1210 } 1211 1212 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) 1213 { 1214 struct hci_uart *hu = hci_get_drvdata(hdev); 1215 struct qca_data *qca = hu->priv; 1216 1217 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { 1218 struct hci_event_hdr *hdr = (void *)skb->data; 1219 1220 /* For the WCN3990 the vendor command for a baudrate change 1221 * isn't sent as synchronous HCI command, because the 1222 * controller sends the corresponding vendor event with the 1223 * new baudrate. The event is received and properly decoded 1224 * after changing the baudrate of the host port. It needs to 1225 * be dropped, otherwise it can be misinterpreted as 1226 * response to a later firmware download command (also a 1227 * vendor command). 1228 */ 1229 1230 if (hdr->evt == HCI_EV_VENDOR) 1231 complete(&qca->drop_ev_comp); 1232 1233 kfree_skb(skb); 1234 1235 return 0; 1236 } 1237 /* We receive chip memory dump as an event packet, With a dedicated 1238 * handler followed by a hardware error event. When this event is 1239 * received we store dump into a file before closing hci. This 1240 * dump will help in triaging the issues. 1241 */ 1242 if ((skb->data[0] == HCI_VENDOR_PKT) && 1243 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE)) 1244 return qca_controller_memdump_event(hdev, skb); 1245 1246 return hci_recv_frame(hdev, skb); 1247 } 1248 1249 #define QCA_IBS_SLEEP_IND_EVENT \ 1250 .type = HCI_IBS_SLEEP_IND, \ 1251 .hlen = 0, \ 1252 .loff = 0, \ 1253 .lsize = 0, \ 1254 .maxlen = HCI_MAX_IBS_SIZE 1255 1256 #define QCA_IBS_WAKE_IND_EVENT \ 1257 .type = HCI_IBS_WAKE_IND, \ 1258 .hlen = 0, \ 1259 .loff = 0, \ 1260 .lsize = 0, \ 1261 .maxlen = HCI_MAX_IBS_SIZE 1262 1263 #define QCA_IBS_WAKE_ACK_EVENT \ 1264 .type = HCI_IBS_WAKE_ACK, \ 1265 .hlen = 0, \ 1266 .loff = 0, \ 1267 .lsize = 0, \ 1268 .maxlen = HCI_MAX_IBS_SIZE 1269 1270 static const struct h4_recv_pkt qca_recv_pkts[] = { 1271 { H4_RECV_ACL, .recv = qca_recv_acl_data }, 1272 { H4_RECV_SCO, .recv = hci_recv_frame }, 1273 { H4_RECV_EVENT, .recv = qca_recv_event }, 1274 { H4_RECV_ISO, .recv = hci_recv_frame }, 1275 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, 1276 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, 1277 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, 1278 }; 1279 1280 static int qca_recv(struct hci_uart *hu, const void *data, int count) 1281 { 1282 struct qca_data *qca = hu->priv; 1283 1284 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 1285 return -EUNATCH; 1286 1287 qca->rx_skb = h4_recv_buf(hu, qca->rx_skb, data, count, 1288 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); 1289 if (IS_ERR(qca->rx_skb)) { 1290 int err = PTR_ERR(qca->rx_skb); 1291 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); 1292 qca->rx_skb = NULL; 1293 return err; 1294 } 1295 1296 return count; 1297 } 1298 1299 static struct sk_buff *qca_dequeue(struct hci_uart *hu) 1300 { 1301 struct qca_data *qca = hu->priv; 1302 1303 return skb_dequeue(&qca->txq); 1304 } 1305 1306 static uint8_t qca_get_baudrate_value(int speed) 1307 { 1308 switch (speed) { 1309 case 9600: 1310 return QCA_BAUDRATE_9600; 1311 case 19200: 1312 return QCA_BAUDRATE_19200; 1313 case 38400: 1314 return QCA_BAUDRATE_38400; 1315 case 57600: 1316 return QCA_BAUDRATE_57600; 1317 case 115200: 1318 return QCA_BAUDRATE_115200; 1319 case 230400: 1320 return QCA_BAUDRATE_230400; 1321 case 460800: 1322 return QCA_BAUDRATE_460800; 1323 case 500000: 1324 return QCA_BAUDRATE_500000; 1325 case 921600: 1326 return QCA_BAUDRATE_921600; 1327 case 1000000: 1328 return QCA_BAUDRATE_1000000; 1329 case 2000000: 1330 return QCA_BAUDRATE_2000000; 1331 case 3000000: 1332 return QCA_BAUDRATE_3000000; 1333 case 3200000: 1334 return QCA_BAUDRATE_3200000; 1335 case 3500000: 1336 return QCA_BAUDRATE_3500000; 1337 default: 1338 return QCA_BAUDRATE_115200; 1339 } 1340 } 1341 1342 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) 1343 { 1344 struct hci_uart *hu = hci_get_drvdata(hdev); 1345 struct qca_data *qca = hu->priv; 1346 struct sk_buff *skb; 1347 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; 1348 1349 if (baudrate > QCA_BAUDRATE_3200000) 1350 return -EINVAL; 1351 1352 cmd[4] = baudrate; 1353 1354 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); 1355 if (!skb) { 1356 bt_dev_err(hdev, "Failed to allocate baudrate packet"); 1357 return -ENOMEM; 1358 } 1359 1360 /* Assign commands to change baudrate and packet type. */ 1361 skb_put_data(skb, cmd, sizeof(cmd)); 1362 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1363 1364 skb_queue_tail(&qca->txq, skb); 1365 hci_uart_tx_wakeup(hu); 1366 1367 /* Wait for the baudrate change request to be sent */ 1368 1369 while (!skb_queue_empty(&qca->txq)) 1370 usleep_range(100, 200); 1371 1372 if (hu->serdev) 1373 serdev_device_wait_until_sent(hu->serdev, 1374 CMD_TRANS_TIMEOUT); 1375 1376 /* Give the controller time to process the request */ 1377 switch (qca_soc_type(hu)) { 1378 case QCA_WCN3950: 1379 case QCA_WCN3988: 1380 case QCA_WCN3990: 1381 case QCA_WCN3991: 1382 case QCA_WCN3998: 1383 case QCA_WCN6750: 1384 case QCA_WCN6855: 1385 case QCA_WCN7850: 1386 usleep_range(1000, 10000); 1387 break; 1388 1389 default: 1390 msleep(300); 1391 } 1392 1393 return 0; 1394 } 1395 1396 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) 1397 { 1398 if (hu->serdev) 1399 serdev_device_set_baudrate(hu->serdev, speed); 1400 else 1401 hci_uart_set_baudrate(hu, speed); 1402 } 1403 1404 static int qca_send_power_pulse(struct hci_uart *hu, bool on) 1405 { 1406 int timeout = CMD_TRANS_TIMEOUT; 1407 int ret; 1408 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; 1409 1410 /* These power pulses are single byte command which are sent 1411 * at required baudrate to wcn3990. On wcn3990, we have an external 1412 * circuit at Tx pin which decodes the pulse sent at specific baudrate. 1413 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT 1414 * and also we use the same power inputs to turn on and off for 1415 * Wi-Fi/BT. Powering up the power sources will not enable BT, until 1416 * we send a power on pulse at 115200 bps. This algorithm will help to 1417 * save power. Disabling hardware flow control is mandatory while 1418 * sending power pulses to SoC. 1419 */ 1420 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); 1421 1422 serdev_device_write_flush(hu->serdev); 1423 hci_uart_set_flow_control(hu, true); 1424 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 1425 if (ret < 0) { 1426 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); 1427 return ret; 1428 } 1429 1430 serdev_device_wait_until_sent(hu->serdev, timeout); 1431 hci_uart_set_flow_control(hu, false); 1432 1433 /* Give to controller time to boot/shutdown */ 1434 if (on) 1435 msleep(100); 1436 else 1437 usleep_range(1000, 10000); 1438 1439 return 0; 1440 } 1441 1442 static unsigned int qca_get_speed(struct hci_uart *hu, 1443 enum qca_speed_type speed_type) 1444 { 1445 unsigned int speed = 0; 1446 1447 if (speed_type == QCA_INIT_SPEED) { 1448 if (hu->init_speed) 1449 speed = hu->init_speed; 1450 else if (hu->proto->init_speed) 1451 speed = hu->proto->init_speed; 1452 } else { 1453 if (hu->oper_speed) 1454 speed = hu->oper_speed; 1455 else if (hu->proto->oper_speed) 1456 speed = hu->proto->oper_speed; 1457 } 1458 1459 return speed; 1460 } 1461 1462 static int qca_check_speeds(struct hci_uart *hu) 1463 { 1464 switch (qca_soc_type(hu)) { 1465 case QCA_WCN3950: 1466 case QCA_WCN3988: 1467 case QCA_WCN3990: 1468 case QCA_WCN3991: 1469 case QCA_WCN3998: 1470 case QCA_WCN6750: 1471 case QCA_WCN6855: 1472 case QCA_WCN7850: 1473 if (!qca_get_speed(hu, QCA_INIT_SPEED) && 1474 !qca_get_speed(hu, QCA_OPER_SPEED)) 1475 return -EINVAL; 1476 break; 1477 1478 default: 1479 if (!qca_get_speed(hu, QCA_INIT_SPEED) || 1480 !qca_get_speed(hu, QCA_OPER_SPEED)) 1481 return -EINVAL; 1482 } 1483 1484 return 0; 1485 } 1486 1487 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) 1488 { 1489 unsigned int speed, qca_baudrate; 1490 struct qca_data *qca = hu->priv; 1491 int ret = 0; 1492 1493 if (speed_type == QCA_INIT_SPEED) { 1494 speed = qca_get_speed(hu, QCA_INIT_SPEED); 1495 if (speed) 1496 host_set_baudrate(hu, speed); 1497 } else { 1498 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1499 1500 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1501 if (!speed) 1502 return 0; 1503 1504 /* Disable flow control for wcn3990 to deassert RTS while 1505 * changing the baudrate of chip and host. 1506 */ 1507 switch (soc_type) { 1508 case QCA_WCN3950: 1509 case QCA_WCN3988: 1510 case QCA_WCN3990: 1511 case QCA_WCN3991: 1512 case QCA_WCN3998: 1513 case QCA_WCN6750: 1514 case QCA_WCN6855: 1515 case QCA_WCN7850: 1516 hci_uart_set_flow_control(hu, true); 1517 break; 1518 1519 default: 1520 break; 1521 } 1522 1523 switch (soc_type) { 1524 case QCA_WCN3990: 1525 reinit_completion(&qca->drop_ev_comp); 1526 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1527 break; 1528 1529 default: 1530 break; 1531 } 1532 1533 qca_baudrate = qca_get_baudrate_value(speed); 1534 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); 1535 ret = qca_set_baudrate(hu->hdev, qca_baudrate); 1536 if (ret) 1537 goto error; 1538 1539 host_set_baudrate(hu, speed); 1540 1541 error: 1542 switch (soc_type) { 1543 case QCA_WCN3950: 1544 case QCA_WCN3988: 1545 case QCA_WCN3990: 1546 case QCA_WCN3991: 1547 case QCA_WCN3998: 1548 case QCA_WCN6750: 1549 case QCA_WCN6855: 1550 case QCA_WCN7850: 1551 hci_uart_set_flow_control(hu, false); 1552 break; 1553 1554 default: 1555 break; 1556 } 1557 1558 switch (soc_type) { 1559 case QCA_WCN3990: 1560 /* Wait for the controller to send the vendor event 1561 * for the baudrate change command. 1562 */ 1563 if (!wait_for_completion_timeout(&qca->drop_ev_comp, 1564 msecs_to_jiffies(100))) { 1565 bt_dev_err(hu->hdev, 1566 "Failed to change controller baudrate\n"); 1567 ret = -ETIMEDOUT; 1568 } 1569 1570 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1571 break; 1572 1573 default: 1574 break; 1575 } 1576 } 1577 1578 return ret; 1579 } 1580 1581 static int qca_send_crashbuffer(struct hci_uart *hu) 1582 { 1583 struct qca_data *qca = hu->priv; 1584 struct sk_buff *skb; 1585 1586 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL); 1587 if (!skb) { 1588 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet"); 1589 return -ENOMEM; 1590 } 1591 1592 /* We forcefully crash the controller, by sending 0xfb byte for 1593 * 1024 times. We also might have chance of losing data, To be 1594 * on safer side we send 1096 bytes to the SoC. 1595 */ 1596 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE, 1597 QCA_CRASHBYTE_PACKET_LEN); 1598 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1599 bt_dev_info(hu->hdev, "crash the soc to collect controller dump"); 1600 skb_queue_tail(&qca->txq, skb); 1601 hci_uart_tx_wakeup(hu); 1602 1603 return 0; 1604 } 1605 1606 static void qca_wait_for_dump_collection(struct hci_dev *hdev) 1607 { 1608 struct hci_uart *hu = hci_get_drvdata(hdev); 1609 struct qca_data *qca = hu->priv; 1610 1611 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION, 1612 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT); 1613 1614 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1615 } 1616 1617 static void qca_hw_error(struct hci_dev *hdev, u8 code) 1618 { 1619 struct hci_uart *hu = hci_get_drvdata(hdev); 1620 struct qca_data *qca = hu->priv; 1621 1622 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1623 set_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1624 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state); 1625 1626 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1627 /* If hardware error event received for other than QCA 1628 * soc memory dump event, then we need to crash the SOC 1629 * and wait here for 8 seconds to get the dump packets. 1630 * This will block main thread to be on hold until we 1631 * collect dump. 1632 */ 1633 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1634 qca_send_crashbuffer(hu); 1635 qca_wait_for_dump_collection(hdev); 1636 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1637 /* Let us wait here until memory dump collected or 1638 * memory dump timer expired. 1639 */ 1640 bt_dev_info(hdev, "waiting for dump to complete"); 1641 qca_wait_for_dump_collection(hdev); 1642 } 1643 1644 mutex_lock(&qca->hci_memdump_lock); 1645 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1646 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout"); 1647 hci_devcd_abort(hu->hdev); 1648 if (qca->qca_memdump) { 1649 kfree(qca->qca_memdump); 1650 qca->qca_memdump = NULL; 1651 } 1652 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1653 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1654 } 1655 mutex_unlock(&qca->hci_memdump_lock); 1656 1657 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1658 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1659 cancel_work_sync(&qca->ctrl_memdump_evt); 1660 skb_queue_purge(&qca->rx_memdump_q); 1661 } 1662 1663 /* 1664 * If the BT chip's bt_en pin is connected to a 3.3V power supply via 1665 * hardware and always stays high, driver cannot control the bt_en pin. 1666 * As a result, during SSR (SubSystem Restart), QCA_SSR_TRIGGERED and 1667 * QCA_IBS_DISABLED flags cannot be cleared, which leads to a reset 1668 * command timeout. 1669 * Add an msleep delay to ensure controller completes the SSR process. 1670 * 1671 * Host will not download the firmware after SSR, controller to remain 1672 * in the IBS_WAKE state, and the host needs to synchronize with it 1673 * 1674 * Since the bluetooth chip has been reset, clear the memdump state. 1675 */ 1676 if (!hci_test_quirk(hu->hdev, HCI_QUIRK_NON_PERSISTENT_SETUP)) { 1677 /* 1678 * When the SSR (SubSystem Restart) duration exceeds 2 seconds, 1679 * it triggers host tx_idle_delay, which sets host TX state 1680 * to sleep. Reset tx_idle_timer after SSR to prevent 1681 * host enter TX IBS_Sleep mode. 1682 */ 1683 mod_timer(&qca->tx_idle_timer, jiffies + 1684 msecs_to_jiffies(qca->tx_idle_delay)); 1685 1686 /* Wait for the controller to load the rampatch and NVM. */ 1687 msleep(100); 1688 1689 clear_bit(QCA_SSR_TRIGGERED, &qca->flags); 1690 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1691 1692 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 1693 qca->memdump_state = QCA_MEMDUMP_IDLE; 1694 } 1695 1696 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1697 } 1698 1699 static void qca_reset(struct hci_dev *hdev) 1700 { 1701 struct hci_uart *hu = hci_get_drvdata(hdev); 1702 struct qca_data *qca = hu->priv; 1703 1704 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1705 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1706 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1707 qca_send_crashbuffer(hu); 1708 qca_wait_for_dump_collection(hdev); 1709 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1710 /* Let us wait here until memory dump collected or 1711 * memory dump timer expired. 1712 */ 1713 bt_dev_info(hdev, "waiting for dump to complete"); 1714 qca_wait_for_dump_collection(hdev); 1715 } 1716 1717 mutex_lock(&qca->hci_memdump_lock); 1718 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1719 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1720 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 1721 /* Inject hw error event to reset the device 1722 * and driver. 1723 */ 1724 hci_reset_dev(hu->hdev); 1725 } 1726 } 1727 mutex_unlock(&qca->hci_memdump_lock); 1728 } 1729 1730 static bool qca_wakeup(struct hci_dev *hdev) 1731 { 1732 struct hci_uart *hu = hci_get_drvdata(hdev); 1733 bool wakeup; 1734 1735 if (!hu->serdev) 1736 return true; 1737 1738 /* BT SoC attached through the serial bus is handled by the serdev driver. 1739 * So we need to use the device handle of the serdev driver to get the 1740 * status of device may wakeup. 1741 */ 1742 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev); 1743 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup); 1744 1745 return wakeup; 1746 } 1747 1748 static int qca_port_reopen(struct hci_uart *hu) 1749 { 1750 int ret; 1751 1752 /* Now the device is in ready state to communicate with host. 1753 * To sync host with device we need to reopen port. 1754 * Without this, we will have RTS and CTS synchronization 1755 * issues. 1756 */ 1757 serdev_device_close(hu->serdev); 1758 ret = serdev_device_open(hu->serdev); 1759 if (ret) { 1760 bt_dev_err(hu->hdev, "failed to open port"); 1761 return ret; 1762 } 1763 1764 hci_uart_set_flow_control(hu, false); 1765 1766 return 0; 1767 } 1768 1769 static int qca_regulator_init(struct hci_uart *hu) 1770 { 1771 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1772 struct qca_serdev *qcadev; 1773 int ret; 1774 bool sw_ctrl_state; 1775 1776 /* Check for vregs status, may be hci down has turned 1777 * off the voltage regulator. 1778 */ 1779 qcadev = serdev_device_get_drvdata(hu->serdev); 1780 1781 if (!qcadev->bt_power->vregs_on) { 1782 serdev_device_close(hu->serdev); 1783 ret = qca_regulator_enable(qcadev); 1784 if (ret) 1785 return ret; 1786 1787 ret = serdev_device_open(hu->serdev); 1788 if (ret) { 1789 bt_dev_err(hu->hdev, "failed to open port"); 1790 return ret; 1791 } 1792 } 1793 1794 switch (soc_type) { 1795 case QCA_WCN3950: 1796 case QCA_WCN3988: 1797 case QCA_WCN3990: 1798 case QCA_WCN3991: 1799 case QCA_WCN3998: 1800 /* Forcefully enable wcn399x to enter in to boot mode. */ 1801 host_set_baudrate(hu, 2400); 1802 ret = qca_send_power_pulse(hu, false); 1803 if (ret) 1804 return ret; 1805 break; 1806 1807 default: 1808 break; 1809 } 1810 1811 /* For wcn6750 need to enable gpio bt_en */ 1812 if (qcadev->bt_en) { 1813 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1814 msleep(50); 1815 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1816 msleep(50); 1817 if (qcadev->sw_ctrl) { 1818 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 1819 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 1820 } 1821 } 1822 1823 qca_set_speed(hu, QCA_INIT_SPEED); 1824 1825 switch (soc_type) { 1826 case QCA_WCN3950: 1827 case QCA_WCN3988: 1828 case QCA_WCN3990: 1829 case QCA_WCN3991: 1830 case QCA_WCN3998: 1831 ret = qca_send_power_pulse(hu, true); 1832 if (ret) 1833 return ret; 1834 break; 1835 1836 default: 1837 break; 1838 } 1839 1840 return qca_port_reopen(hu); 1841 } 1842 1843 static int qca_power_on(struct hci_dev *hdev) 1844 { 1845 struct hci_uart *hu = hci_get_drvdata(hdev); 1846 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1847 struct qca_serdev *qcadev; 1848 struct qca_data *qca = hu->priv; 1849 int ret = 0; 1850 1851 /* Non-serdev device usually is powered by external power 1852 * and don't need additional action in driver for power on 1853 */ 1854 if (!hu->serdev) 1855 return 0; 1856 1857 switch (soc_type) { 1858 case QCA_QCA6390: 1859 case QCA_WCN3950: 1860 case QCA_WCN3988: 1861 case QCA_WCN3990: 1862 case QCA_WCN3991: 1863 case QCA_WCN3998: 1864 case QCA_WCN6750: 1865 case QCA_WCN6855: 1866 case QCA_WCN7850: 1867 ret = qca_regulator_init(hu); 1868 break; 1869 1870 default: 1871 qcadev = serdev_device_get_drvdata(hu->serdev); 1872 if (qcadev->bt_en) { 1873 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1874 /* Controller needs time to bootup. */ 1875 msleep(150); 1876 } 1877 } 1878 1879 clear_bit(QCA_BT_OFF, &qca->flags); 1880 return ret; 1881 } 1882 1883 static void hci_coredump_qca(struct hci_dev *hdev) 1884 { 1885 int err; 1886 static const u8 param[] = { 0x26 }; 1887 1888 err = __hci_cmd_send(hdev, 0xfc0c, 1, param); 1889 if (err < 0) 1890 bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err); 1891 } 1892 1893 static int qca_get_data_path_id(struct hci_dev *hdev, __u8 *data_path_id) 1894 { 1895 /* QCA uses 1 as non-HCI data path id for HFP */ 1896 *data_path_id = 1; 1897 return 0; 1898 } 1899 1900 static int qca_configure_hfp_offload(struct hci_dev *hdev) 1901 { 1902 bt_dev_info(hdev, "HFP non-HCI data transport is supported"); 1903 hdev->get_data_path_id = qca_get_data_path_id; 1904 /* Do not need to send HCI_Configure_Data_Path to configure non-HCI 1905 * data transport path for QCA controllers, so set below field as NULL. 1906 */ 1907 hdev->get_codec_config_data = NULL; 1908 return 0; 1909 } 1910 1911 static int qca_setup(struct hci_uart *hu) 1912 { 1913 struct hci_dev *hdev = hu->hdev; 1914 struct qca_data *qca = hu->priv; 1915 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; 1916 unsigned int retries = 0; 1917 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1918 const char *firmware_name = qca_get_firmware_name(hu); 1919 const char *rampatch_name = qca_get_rampatch_name(hu); 1920 int ret; 1921 struct qca_btsoc_version ver; 1922 struct qca_serdev *qcadev = NULL; 1923 const char *soc_name; 1924 1925 if (hu->serdev) 1926 qcadev = serdev_device_get_drvdata(hu->serdev); 1927 1928 ret = qca_check_speeds(hu); 1929 if (ret) 1930 return ret; 1931 1932 clear_bit(QCA_ROM_FW, &qca->flags); 1933 /* Patch downloading has to be done without IBS mode */ 1934 set_bit(QCA_IBS_DISABLED, &qca->flags); 1935 1936 /* Enable controller to do both LE scan and BR/EDR inquiry 1937 * simultaneously. 1938 */ 1939 hci_set_quirk(hdev, HCI_QUIRK_SIMULTANEOUS_DISCOVERY); 1940 1941 switch (soc_type) { 1942 case QCA_QCA2066: 1943 soc_name = "qca2066"; 1944 break; 1945 1946 case QCA_WCN3950: 1947 case QCA_WCN3988: 1948 case QCA_WCN3990: 1949 case QCA_WCN3991: 1950 case QCA_WCN3998: 1951 soc_name = "wcn399x"; 1952 break; 1953 1954 case QCA_WCN6750: 1955 soc_name = "wcn6750"; 1956 break; 1957 1958 case QCA_WCN6855: 1959 soc_name = "wcn6855"; 1960 break; 1961 1962 case QCA_WCN7850: 1963 soc_name = "wcn7850"; 1964 break; 1965 1966 default: 1967 soc_name = "ROME/QCA6390"; 1968 } 1969 bt_dev_info(hdev, "setting up %s", soc_name); 1970 1971 qca->memdump_state = QCA_MEMDUMP_IDLE; 1972 1973 retry: 1974 ret = qca_power_on(hdev); 1975 if (ret) 1976 goto out; 1977 1978 clear_bit(QCA_SSR_TRIGGERED, &qca->flags); 1979 1980 switch (soc_type) { 1981 case QCA_WCN3950: 1982 case QCA_WCN3988: 1983 case QCA_WCN3990: 1984 case QCA_WCN3991: 1985 case QCA_WCN3998: 1986 case QCA_WCN6750: 1987 case QCA_WCN6855: 1988 case QCA_WCN7850: 1989 if (qcadev && qcadev->bdaddr_property_broken) 1990 hci_set_quirk(hdev, HCI_QUIRK_BDADDR_PROPERTY_BROKEN); 1991 1992 hci_set_aosp_capable(hdev); 1993 1994 ret = qca_read_soc_version(hdev, &ver, soc_type); 1995 if (ret) 1996 goto out; 1997 break; 1998 1999 default: 2000 qca_set_speed(hu, QCA_INIT_SPEED); 2001 } 2002 2003 /* Setup user speed if needed */ 2004 speed = qca_get_speed(hu, QCA_OPER_SPEED); 2005 if (speed) { 2006 ret = qca_set_speed(hu, QCA_OPER_SPEED); 2007 if (ret) 2008 goto out; 2009 2010 qca_baudrate = qca_get_baudrate_value(speed); 2011 } 2012 2013 switch (soc_type) { 2014 case QCA_WCN3950: 2015 case QCA_WCN3988: 2016 case QCA_WCN3990: 2017 case QCA_WCN3991: 2018 case QCA_WCN3998: 2019 case QCA_WCN6750: 2020 case QCA_WCN6855: 2021 case QCA_WCN7850: 2022 break; 2023 2024 default: 2025 /* Get QCA version information */ 2026 ret = qca_read_soc_version(hdev, &ver, soc_type); 2027 if (ret) 2028 goto out; 2029 } 2030 2031 /* Setup patch / NVM configurations */ 2032 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver, 2033 firmware_name, rampatch_name); 2034 if (!ret) { 2035 clear_bit(QCA_IBS_DISABLED, &qca->flags); 2036 qca_debugfs_init(hdev); 2037 hu->hdev->hw_error = qca_hw_error; 2038 hu->hdev->reset = qca_reset; 2039 if (hu->serdev) { 2040 if (device_can_wakeup(hu->serdev->ctrl->dev.parent)) 2041 hu->hdev->wakeup = qca_wakeup; 2042 } 2043 } else if (ret == -ENOENT) { 2044 /* No patch/nvm-config found, run with original fw/config */ 2045 set_bit(QCA_ROM_FW, &qca->flags); 2046 ret = 0; 2047 } else if (ret == -EAGAIN) { 2048 /* 2049 * Userspace firmware loader will return -EAGAIN in case no 2050 * patch/nvm-config is found, so run with original fw/config. 2051 */ 2052 set_bit(QCA_ROM_FW, &qca->flags); 2053 ret = 0; 2054 } 2055 2056 out: 2057 if (ret) { 2058 qca_power_off(hu); 2059 2060 if (retries < MAX_INIT_RETRIES) { 2061 bt_dev_warn(hdev, "Retry BT power ON:%d", retries); 2062 if (hu->serdev) { 2063 serdev_device_close(hu->serdev); 2064 ret = serdev_device_open(hu->serdev); 2065 if (ret) { 2066 bt_dev_err(hdev, "failed to open port"); 2067 return ret; 2068 } 2069 } 2070 retries++; 2071 goto retry; 2072 } 2073 return ret; 2074 } 2075 2076 /* Setup bdaddr */ 2077 if (soc_type == QCA_ROME) 2078 hu->hdev->set_bdaddr = qca_set_bdaddr_rome; 2079 else 2080 hu->hdev->set_bdaddr = qca_set_bdaddr; 2081 2082 if (qcadev && qcadev->support_hfp_hw_offload) 2083 qca_configure_hfp_offload(hdev); 2084 2085 qca->fw_version = le16_to_cpu(ver.patch_ver); 2086 qca->controller_id = le16_to_cpu(ver.rom_ver); 2087 hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL); 2088 2089 return ret; 2090 } 2091 2092 static const struct hci_uart_proto qca_proto = { 2093 .id = HCI_UART_QCA, 2094 .name = "QCA", 2095 .manufacturer = 29, 2096 .init_speed = 115200, 2097 .oper_speed = 3000000, 2098 .open = qca_open, 2099 .close = qca_close, 2100 .flush = qca_flush, 2101 .setup = qca_setup, 2102 .recv = qca_recv, 2103 .enqueue = qca_enqueue, 2104 .dequeue = qca_dequeue, 2105 }; 2106 2107 static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = { 2108 .soc_type = QCA_QCA2066, 2109 .num_vregs = 0, 2110 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES | 2111 QCA_CAP_HFP_HW_OFFLOAD, 2112 }; 2113 2114 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = { 2115 .soc_type = QCA_QCA6390, 2116 .num_vregs = 0, 2117 }; 2118 2119 static const struct qca_device_data qca_soc_data_wcn3950 __maybe_unused = { 2120 .soc_type = QCA_WCN3950, 2121 .vregs = (struct qca_vreg []) { 2122 { "vddio", 15000 }, 2123 { "vddxo", 60000 }, 2124 { "vddrf", 155000 }, 2125 { "vddch0", 585000 }, 2126 }, 2127 .num_vregs = 4, 2128 }; 2129 2130 static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = { 2131 .soc_type = QCA_WCN3988, 2132 .vregs = (struct qca_vreg []) { 2133 { "vddio", 15000 }, 2134 { "vddxo", 80000 }, 2135 { "vddrf", 300000 }, 2136 { "vddch0", 450000 }, 2137 }, 2138 .num_vregs = 4, 2139 }; 2140 2141 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = { 2142 .soc_type = QCA_WCN3990, 2143 .vregs = (struct qca_vreg []) { 2144 { "vddio", 15000 }, 2145 { "vddxo", 80000 }, 2146 { "vddrf", 300000 }, 2147 { "vddch0", 450000 }, 2148 }, 2149 .num_vregs = 4, 2150 }; 2151 2152 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = { 2153 .soc_type = QCA_WCN3991, 2154 .vregs = (struct qca_vreg []) { 2155 { "vddio", 15000 }, 2156 { "vddxo", 80000 }, 2157 { "vddrf", 300000 }, 2158 { "vddch0", 450000 }, 2159 }, 2160 .num_vregs = 4, 2161 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2162 }; 2163 2164 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = { 2165 .soc_type = QCA_WCN3998, 2166 .vregs = (struct qca_vreg []) { 2167 { "vddio", 10000 }, 2168 { "vddxo", 80000 }, 2169 { "vddrf", 300000 }, 2170 { "vddch0", 450000 }, 2171 }, 2172 .num_vregs = 4, 2173 }; 2174 2175 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = { 2176 .soc_type = QCA_WCN6750, 2177 .vregs = (struct qca_vreg []) { 2178 { "vddio", 5000 }, 2179 { "vddaon", 26000 }, 2180 { "vddbtcxmx", 126000 }, 2181 { "vddrfacmn", 12500 }, 2182 { "vddrfa0p8", 102000 }, 2183 { "vddrfa1p7", 302000 }, 2184 { "vddrfa1p2", 257000 }, 2185 { "vddrfa2p2", 1700000 }, 2186 { "vddasd", 200 }, 2187 }, 2188 .num_vregs = 9, 2189 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2190 }; 2191 2192 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = { 2193 .soc_type = QCA_WCN6855, 2194 .vregs = (struct qca_vreg []) { 2195 { "vddio", 5000 }, 2196 { "vddbtcxmx", 126000 }, 2197 { "vddrfacmn", 12500 }, 2198 { "vddrfa0p8", 102000 }, 2199 { "vddrfa1p7", 302000 }, 2200 { "vddrfa1p2", 257000 }, 2201 }, 2202 .num_vregs = 6, 2203 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES | 2204 QCA_CAP_HFP_HW_OFFLOAD, 2205 }; 2206 2207 static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = { 2208 .soc_type = QCA_WCN7850, 2209 .vregs = (struct qca_vreg []) { 2210 { "vddio", 5000 }, 2211 { "vddaon", 26000 }, 2212 { "vdddig", 126000 }, 2213 { "vddrfa0p8", 102000 }, 2214 { "vddrfa1p2", 257000 }, 2215 { "vddrfa1p9", 302000 }, 2216 }, 2217 .num_vregs = 6, 2218 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES | 2219 QCA_CAP_HFP_HW_OFFLOAD, 2220 }; 2221 2222 static void qca_power_off(struct hci_uart *hu) 2223 { 2224 struct qca_serdev *qcadev; 2225 struct qca_data *qca = hu->priv; 2226 unsigned long flags; 2227 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2228 bool sw_ctrl_state; 2229 struct qca_power *power; 2230 2231 /* From this point we go into power off state. But serial port is 2232 * still open, stop queueing the IBS data and flush all the buffered 2233 * data in skb's. 2234 */ 2235 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 2236 set_bit(QCA_IBS_DISABLED, &qca->flags); 2237 qca_flush(hu); 2238 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2239 2240 /* Non-serdev device usually is powered by external power 2241 * and don't need additional action in driver for power down 2242 */ 2243 if (!hu->serdev) 2244 return; 2245 2246 qcadev = serdev_device_get_drvdata(hu->serdev); 2247 power = qcadev->bt_power; 2248 2249 switch (soc_type) { 2250 case QCA_WCN3988: 2251 case QCA_WCN3990: 2252 case QCA_WCN3991: 2253 case QCA_WCN3998: 2254 host_set_baudrate(hu, 2400); 2255 qca_send_power_pulse(hu, false); 2256 break; 2257 default: 2258 break; 2259 } 2260 2261 if (power && power->pwrseq) { 2262 pwrseq_power_off(power->pwrseq); 2263 set_bit(QCA_BT_OFF, &qca->flags); 2264 return; 2265 } 2266 2267 switch (soc_type) { 2268 case QCA_WCN3988: 2269 case QCA_WCN3990: 2270 case QCA_WCN3991: 2271 case QCA_WCN3998: 2272 qca_regulator_disable(qcadev); 2273 break; 2274 2275 case QCA_WCN6750: 2276 case QCA_WCN6855: 2277 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2278 msleep(100); 2279 qca_regulator_disable(qcadev); 2280 if (qcadev->sw_ctrl) { 2281 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 2282 BT_DBG("SW_CTRL is %d", sw_ctrl_state); 2283 } 2284 break; 2285 2286 default: 2287 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2288 } 2289 2290 set_bit(QCA_BT_OFF, &qca->flags); 2291 } 2292 2293 static int qca_hci_shutdown(struct hci_dev *hdev) 2294 { 2295 struct hci_uart *hu = hci_get_drvdata(hdev); 2296 struct qca_data *qca = hu->priv; 2297 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2298 2299 hu->hdev->hw_error = NULL; 2300 hu->hdev->reset = NULL; 2301 2302 timer_delete_sync(&qca->wake_retrans_timer); 2303 timer_delete_sync(&qca->tx_idle_timer); 2304 2305 /* Stop sending shutdown command if soc crashes. */ 2306 if (soc_type != QCA_ROME 2307 && qca->memdump_state == QCA_MEMDUMP_IDLE) { 2308 qca_send_pre_shutdown_cmd(hdev); 2309 usleep_range(8000, 10000); 2310 } 2311 2312 qca_power_off(hu); 2313 return 0; 2314 } 2315 2316 static int qca_regulator_enable(struct qca_serdev *qcadev) 2317 { 2318 struct qca_power *power = qcadev->bt_power; 2319 int ret; 2320 2321 if (power->pwrseq) 2322 return pwrseq_power_on(power->pwrseq); 2323 2324 /* Already enabled */ 2325 if (power->vregs_on) 2326 return 0; 2327 2328 BT_DBG("enabling %d regulators)", power->num_vregs); 2329 2330 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk); 2331 if (ret) 2332 return ret; 2333 2334 power->vregs_on = true; 2335 2336 ret = clk_prepare_enable(qcadev->susclk); 2337 if (ret) 2338 qca_regulator_disable(qcadev); 2339 2340 return ret; 2341 } 2342 2343 static void qca_regulator_disable(struct qca_serdev *qcadev) 2344 { 2345 struct qca_power *power; 2346 2347 if (!qcadev) 2348 return; 2349 2350 power = qcadev->bt_power; 2351 2352 /* Already disabled? */ 2353 if (!power->vregs_on) 2354 return; 2355 2356 regulator_bulk_disable(power->num_vregs, power->vreg_bulk); 2357 power->vregs_on = false; 2358 2359 clk_disable_unprepare(qcadev->susclk); 2360 } 2361 2362 static int qca_init_regulators(struct qca_power *qca, 2363 const struct qca_vreg *vregs, size_t num_vregs) 2364 { 2365 struct regulator_bulk_data *bulk; 2366 int ret; 2367 int i; 2368 2369 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL); 2370 if (!bulk) 2371 return -ENOMEM; 2372 2373 for (i = 0; i < num_vregs; i++) 2374 bulk[i].supply = vregs[i].name; 2375 2376 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk); 2377 if (ret < 0) 2378 return ret; 2379 2380 for (i = 0; i < num_vregs; i++) { 2381 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA); 2382 if (ret) 2383 return ret; 2384 } 2385 2386 qca->vreg_bulk = bulk; 2387 qca->num_vregs = num_vregs; 2388 2389 return 0; 2390 } 2391 2392 static int qca_serdev_probe(struct serdev_device *serdev) 2393 { 2394 struct qca_serdev *qcadev; 2395 struct hci_dev *hdev; 2396 const struct qca_device_data *data; 2397 int err; 2398 bool power_ctrl_enabled = true; 2399 2400 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); 2401 if (!qcadev) 2402 return -ENOMEM; 2403 2404 qcadev->serdev_hu.serdev = serdev; 2405 data = device_get_match_data(&serdev->dev); 2406 serdev_device_set_drvdata(serdev, qcadev); 2407 device_property_read_string_array(&serdev->dev, "firmware-name", 2408 qcadev->firmware_name, ARRAY_SIZE(qcadev->firmware_name)); 2409 device_property_read_u32(&serdev->dev, "max-speed", 2410 &qcadev->oper_speed); 2411 if (!qcadev->oper_speed) 2412 BT_DBG("UART will pick default operating speed"); 2413 2414 qcadev->bdaddr_property_broken = device_property_read_bool(&serdev->dev, 2415 "qcom,local-bd-address-broken"); 2416 2417 if (data) 2418 qcadev->btsoc_type = data->soc_type; 2419 else 2420 qcadev->btsoc_type = QCA_ROME; 2421 2422 switch (qcadev->btsoc_type) { 2423 case QCA_QCA6390: 2424 case QCA_WCN3950: 2425 case QCA_WCN3988: 2426 case QCA_WCN3990: 2427 case QCA_WCN3991: 2428 case QCA_WCN3998: 2429 case QCA_WCN6750: 2430 case QCA_WCN6855: 2431 case QCA_WCN7850: 2432 qcadev->bt_power = devm_kzalloc(&serdev->dev, 2433 sizeof(struct qca_power), 2434 GFP_KERNEL); 2435 if (!qcadev->bt_power) 2436 return -ENOMEM; 2437 break; 2438 default: 2439 break; 2440 } 2441 2442 switch (qcadev->btsoc_type) { 2443 case QCA_WCN3950: 2444 case QCA_WCN3988: 2445 case QCA_WCN3990: 2446 case QCA_WCN3991: 2447 case QCA_WCN3998: 2448 case QCA_WCN6750: 2449 case QCA_WCN6855: 2450 case QCA_WCN7850: 2451 if (!device_property_present(&serdev->dev, "enable-gpios")) { 2452 /* 2453 * Backward compatibility with old DT sources. If the 2454 * node doesn't have the 'enable-gpios' property then 2455 * let's use the power sequencer. Otherwise, let's 2456 * drive everything ourselves. 2457 */ 2458 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev, 2459 "bluetooth"); 2460 2461 /* 2462 * Some modules have BT_EN enabled via a hardware pull-up, 2463 * meaning it is not defined in the DTS and is not controlled 2464 * through the power sequence. In such cases, fall through 2465 * to follow the legacy flow. 2466 */ 2467 if (IS_ERR(qcadev->bt_power->pwrseq)) 2468 qcadev->bt_power->pwrseq = NULL; 2469 else 2470 break; 2471 } 2472 2473 qcadev->bt_power->dev = &serdev->dev; 2474 err = qca_init_regulators(qcadev->bt_power, data->vregs, 2475 data->num_vregs); 2476 if (err) { 2477 BT_ERR("Failed to init regulators:%d", err); 2478 return err; 2479 } 2480 2481 qcadev->bt_power->vregs_on = false; 2482 2483 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2484 GPIOD_OUT_LOW); 2485 if (IS_ERR(qcadev->bt_en)) 2486 return dev_err_probe(&serdev->dev, 2487 PTR_ERR(qcadev->bt_en), 2488 "failed to acquire BT_EN gpio\n"); 2489 2490 if (!qcadev->bt_en && 2491 (data->soc_type == QCA_WCN6750 || 2492 data->soc_type == QCA_WCN6855 || 2493 data->soc_type == QCA_WCN7850)) 2494 power_ctrl_enabled = false; 2495 2496 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl", 2497 GPIOD_IN); 2498 if (IS_ERR(qcadev->sw_ctrl) && 2499 (data->soc_type == QCA_WCN6750 || 2500 data->soc_type == QCA_WCN6855 || 2501 data->soc_type == QCA_WCN7850)) { 2502 dev_err(&serdev->dev, "failed to acquire SW_CTRL gpio\n"); 2503 return PTR_ERR(qcadev->sw_ctrl); 2504 } 2505 2506 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2507 if (IS_ERR(qcadev->susclk)) { 2508 dev_err(&serdev->dev, "failed to acquire clk\n"); 2509 return PTR_ERR(qcadev->susclk); 2510 } 2511 break; 2512 2513 case QCA_QCA6390: 2514 if (dev_of_node(&serdev->dev)) { 2515 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev, 2516 "bluetooth"); 2517 if (IS_ERR(qcadev->bt_power->pwrseq)) 2518 return PTR_ERR(qcadev->bt_power->pwrseq); 2519 break; 2520 } 2521 fallthrough; 2522 2523 default: 2524 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2525 GPIOD_OUT_LOW); 2526 if (IS_ERR(qcadev->bt_en)) { 2527 dev_err(&serdev->dev, "failed to acquire enable gpio\n"); 2528 return PTR_ERR(qcadev->bt_en); 2529 } 2530 2531 if (!qcadev->bt_en) 2532 power_ctrl_enabled = false; 2533 2534 qcadev->susclk = devm_clk_get_optional_enabled_with_rate( 2535 &serdev->dev, NULL, SUSCLK_RATE_32KHZ); 2536 if (IS_ERR(qcadev->susclk)) { 2537 dev_warn(&serdev->dev, "failed to acquire clk\n"); 2538 return PTR_ERR(qcadev->susclk); 2539 } 2540 } 2541 2542 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2543 if (err) { 2544 BT_ERR("serdev registration failed"); 2545 return err; 2546 } 2547 2548 hdev = qcadev->serdev_hu.hdev; 2549 2550 if (power_ctrl_enabled) { 2551 hci_set_quirk(hdev, HCI_QUIRK_NON_PERSISTENT_SETUP); 2552 hdev->shutdown = qca_hci_shutdown; 2553 } 2554 2555 if (data) { 2556 /* Wideband speech support must be set per driver since it can't 2557 * be queried via hci. Same with the valid le states quirk. 2558 */ 2559 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH) 2560 hci_set_quirk(hdev, 2561 HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED); 2562 2563 if (!(data->capabilities & QCA_CAP_VALID_LE_STATES)) 2564 hci_set_quirk(hdev, HCI_QUIRK_BROKEN_LE_STATES); 2565 2566 if (data->capabilities & QCA_CAP_HFP_HW_OFFLOAD) 2567 qcadev->support_hfp_hw_offload = true; 2568 } 2569 2570 return 0; 2571 } 2572 2573 static void qca_serdev_remove(struct serdev_device *serdev) 2574 { 2575 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2576 struct qca_power *power = qcadev->bt_power; 2577 2578 switch (qcadev->btsoc_type) { 2579 case QCA_WCN3988: 2580 case QCA_WCN3990: 2581 case QCA_WCN3991: 2582 case QCA_WCN3998: 2583 case QCA_WCN6750: 2584 case QCA_WCN6855: 2585 case QCA_WCN7850: 2586 if (power->vregs_on) 2587 qca_power_off(&qcadev->serdev_hu); 2588 break; 2589 default: 2590 break; 2591 } 2592 2593 hci_uart_unregister_device(&qcadev->serdev_hu); 2594 } 2595 2596 static void qca_serdev_shutdown(struct serdev_device *serdev) 2597 { 2598 int ret; 2599 int timeout = CMD_TRANS_TIMEOUT; 2600 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2601 struct hci_uart *hu = &qcadev->serdev_hu; 2602 struct hci_dev *hdev = hu->hdev; 2603 const u8 ibs_wake_cmd[] = { 0xFD }; 2604 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 }; 2605 2606 if (qcadev->btsoc_type == QCA_QCA6390) { 2607 /* The purpose of sending the VSC is to reset SOC into a initial 2608 * state and the state will ensure next hdev->setup() success. 2609 * if HCI_QUIRK_NON_PERSISTENT_SETUP is set, it means that 2610 * hdev->setup() can do its job regardless of SoC state, so 2611 * don't need to send the VSC. 2612 * if HCI_SETUP is set, it means that hdev->setup() was never 2613 * invoked and the SOC is already in the initial state, so 2614 * don't also need to send the VSC. 2615 */ 2616 if (hci_test_quirk(hdev, HCI_QUIRK_NON_PERSISTENT_SETUP) || 2617 hci_dev_test_flag(hdev, HCI_SETUP)) 2618 return; 2619 2620 /* The serdev must be in open state when control logic arrives 2621 * here, so also fix the use-after-free issue caused by that 2622 * the serdev is flushed or wrote after it is closed. 2623 */ 2624 serdev_device_write_flush(serdev); 2625 ret = serdev_device_write_buf(serdev, ibs_wake_cmd, 2626 sizeof(ibs_wake_cmd)); 2627 if (ret < 0) { 2628 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret); 2629 return; 2630 } 2631 serdev_device_wait_until_sent(serdev, timeout); 2632 usleep_range(8000, 10000); 2633 2634 serdev_device_write_flush(serdev); 2635 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd, 2636 sizeof(edl_reset_soc_cmd)); 2637 if (ret < 0) { 2638 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret); 2639 return; 2640 } 2641 serdev_device_wait_until_sent(serdev, timeout); 2642 usleep_range(8000, 10000); 2643 } 2644 } 2645 2646 static int __maybe_unused qca_suspend(struct device *dev) 2647 { 2648 struct serdev_device *serdev = to_serdev_device(dev); 2649 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2650 struct hci_uart *hu = &qcadev->serdev_hu; 2651 struct qca_data *qca = hu->priv; 2652 unsigned long flags; 2653 bool tx_pending = false; 2654 int ret = 0; 2655 u8 cmd; 2656 unsigned long wait_timeout = 0; 2657 2658 set_bit(QCA_SUSPENDING, &qca->flags); 2659 2660 /* if BT SoC is running with default firmware then it does not 2661 * support in-band sleep 2662 */ 2663 if (test_bit(QCA_ROM_FW, &qca->flags)) 2664 return 0; 2665 2666 /* During SSR after memory dump collection, controller will be 2667 * powered off and then powered on.If controller is powered off 2668 * during SSR then we should wait until SSR is completed. 2669 */ 2670 if (test_bit(QCA_BT_OFF, &qca->flags) && 2671 !test_bit(QCA_SSR_TRIGGERED, &qca->flags)) 2672 return 0; 2673 2674 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 2675 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 2676 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ? 2677 IBS_DISABLE_SSR_TIMEOUT : 2678 FW_DOWNLOAD_TIMEOUT; 2679 2680 /* QCA_IBS_DISABLED flag is set to true, During FW download 2681 * and during memory dump collection. It is reset to false, 2682 * After FW download complete. 2683 */ 2684 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED, 2685 TASK_UNINTERRUPTIBLE, wait_timeout); 2686 2687 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) { 2688 bt_dev_err(hu->hdev, "SSR or FW download time out"); 2689 ret = -ETIMEDOUT; 2690 goto error; 2691 } 2692 } 2693 2694 cancel_work_sync(&qca->ws_awake_device); 2695 cancel_work_sync(&qca->ws_awake_rx); 2696 2697 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 2698 flags, SINGLE_DEPTH_NESTING); 2699 2700 switch (qca->tx_ibs_state) { 2701 case HCI_IBS_TX_WAKING: 2702 timer_delete(&qca->wake_retrans_timer); 2703 fallthrough; 2704 case HCI_IBS_TX_AWAKE: 2705 timer_delete(&qca->tx_idle_timer); 2706 2707 serdev_device_write_flush(hu->serdev); 2708 cmd = HCI_IBS_SLEEP_IND; 2709 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 2710 2711 if (ret < 0) { 2712 BT_ERR("Failed to send SLEEP to device"); 2713 break; 2714 } 2715 2716 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 2717 qca->ibs_sent_slps++; 2718 tx_pending = true; 2719 break; 2720 2721 case HCI_IBS_TX_ASLEEP: 2722 break; 2723 2724 default: 2725 BT_ERR("Spurious tx state %d", qca->tx_ibs_state); 2726 ret = -EINVAL; 2727 break; 2728 } 2729 2730 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2731 2732 if (ret < 0) 2733 goto error; 2734 2735 if (tx_pending) { 2736 serdev_device_wait_until_sent(hu->serdev, 2737 CMD_TRANS_TIMEOUT); 2738 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 2739 } 2740 2741 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going 2742 * to sleep, so that the packet does not wake the system later. 2743 */ 2744 ret = wait_event_interruptible_timeout(qca->suspend_wait_q, 2745 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP, 2746 IBS_BTSOC_TX_IDLE_TIMEOUT); 2747 if (ret == 0) { 2748 ret = -ETIMEDOUT; 2749 goto error; 2750 } 2751 2752 return 0; 2753 2754 error: 2755 clear_bit(QCA_SUSPENDING, &qca->flags); 2756 2757 return ret; 2758 } 2759 2760 static int __maybe_unused qca_resume(struct device *dev) 2761 { 2762 struct serdev_device *serdev = to_serdev_device(dev); 2763 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2764 struct hci_uart *hu = &qcadev->serdev_hu; 2765 struct qca_data *qca = hu->priv; 2766 2767 clear_bit(QCA_SUSPENDING, &qca->flags); 2768 2769 return 0; 2770 } 2771 2772 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume); 2773 2774 #ifdef CONFIG_OF 2775 static const struct of_device_id qca_bluetooth_of_match[] = { 2776 { .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066}, 2777 { .compatible = "qcom,qca6174-bt" }, 2778 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390}, 2779 { .compatible = "qcom,qca9377-bt" }, 2780 { .compatible = "qcom,wcn3950-bt", .data = &qca_soc_data_wcn3950}, 2781 { .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988}, 2782 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, 2783 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991}, 2784 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, 2785 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750}, 2786 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855}, 2787 { .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850}, 2788 { /* sentinel */ } 2789 }; 2790 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); 2791 #endif 2792 2793 #ifdef CONFIG_ACPI 2794 static const struct acpi_device_id qca_bluetooth_acpi_match[] = { 2795 { "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 }, 2796 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2797 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2798 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2799 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2800 { }, 2801 }; 2802 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match); 2803 #endif 2804 2805 #ifdef CONFIG_DEV_COREDUMP 2806 static void hciqca_coredump(struct device *dev) 2807 { 2808 struct serdev_device *serdev = to_serdev_device(dev); 2809 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2810 struct hci_uart *hu = &qcadev->serdev_hu; 2811 struct hci_dev *hdev = hu->hdev; 2812 2813 if (hdev->dump.coredump) 2814 hdev->dump.coredump(hdev); 2815 } 2816 #endif 2817 2818 static struct serdev_device_driver qca_serdev_driver = { 2819 .probe = qca_serdev_probe, 2820 .remove = qca_serdev_remove, 2821 .shutdown = qca_serdev_shutdown, 2822 .driver = { 2823 .name = "hci_uart_qca", 2824 .of_match_table = of_match_ptr(qca_bluetooth_of_match), 2825 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match), 2826 .pm = &qca_pm_ops, 2827 #ifdef CONFIG_DEV_COREDUMP 2828 .coredump = hciqca_coredump, 2829 #endif 2830 }, 2831 }; 2832 2833 int __init qca_init(void) 2834 { 2835 serdev_device_driver_register(&qca_serdev_driver); 2836 2837 return hci_uart_register_proto(&qca_proto); 2838 } 2839 2840 int __exit qca_deinit(void) 2841 { 2842 serdev_device_driver_unregister(&qca_serdev_driver); 2843 2844 return hci_uart_unregister_proto(&qca_proto); 2845 } 2846