1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Bluetooth Software UART Qualcomm protocol
4 *
5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
6 * protocol extension to H4.
7 *
8 * Copyright (C) 2007 Texas Instruments, Inc.
9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
10 *
11 * Acknowledgements:
12 * This file is based on hci_ll.c, which was...
13 * Written by Ohad Ben-Cohen <ohad@bencohen.org>
14 * which was in turn based on hci_h4.c, which was written
15 * by Maxim Krasnyansky and Marcel Holtmann.
16 */
17
18 #include <linux/kernel.h>
19 #include <linux/clk.h>
20 #include <linux/completion.h>
21 #include <linux/debugfs.h>
22 #include <linux/delay.h>
23 #include <linux/devcoredump.h>
24 #include <linux/device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of.h>
29 #include <linux/acpi.h>
30 #include <linux/platform_device.h>
31 #include <linux/pwrseq/consumer.h>
32 #include <linux/regulator/consumer.h>
33 #include <linux/serdev.h>
34 #include <linux/string_choices.h>
35 #include <linux/mutex.h>
36 #include <linux/unaligned.h>
37
38 #include <net/bluetooth/bluetooth.h>
39 #include <net/bluetooth/hci_core.h>
40
41 #include "hci_uart.h"
42 #include "btqca.h"
43
44 /* HCI_IBS protocol messages */
45 #define HCI_IBS_SLEEP_IND 0xFE
46 #define HCI_IBS_WAKE_IND 0xFD
47 #define HCI_IBS_WAKE_ACK 0xFC
48 #define HCI_MAX_IBS_SIZE 10
49
50 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100
51 #define IBS_BTSOC_TX_IDLE_TIMEOUT msecs_to_jiffies(200)
52 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000
53 #define CMD_TRANS_TIMEOUT msecs_to_jiffies(100)
54 #define MEMDUMP_TIMEOUT msecs_to_jiffies(8000)
55 #define FW_DOWNLOAD_TIMEOUT msecs_to_jiffies(3000)
56 #define IBS_DISABLE_SSR_TIMEOUT (MEMDUMP_TIMEOUT + FW_DOWNLOAD_TIMEOUT)
57
58 /* susclk rate */
59 #define SUSCLK_RATE_32KHZ 32768
60
61 /* Controller debug log header */
62 #define QCA_DEBUG_HANDLE 0x2EDC
63
64 /* max retry count when init fails */
65 #define MAX_INIT_RETRIES 3
66
67 /* Controller dump header */
68 #define QCA_SSR_DUMP_HANDLE 0x0108
69 #define QCA_DUMP_PACKET_SIZE 255
70 #define QCA_LAST_SEQUENCE_NUM 0xFFFF
71 #define QCA_CRASHBYTE_PACKET_LEN 1096
72 #define QCA_MEMDUMP_BYTE 0xFB
73
74 enum qca_flags {
75 QCA_IBS_DISABLED,
76 QCA_DROP_VENDOR_EVENT,
77 QCA_SUSPENDING,
78 QCA_MEMDUMP_COLLECTION,
79 QCA_HW_ERROR_EVENT,
80 QCA_SSR_TRIGGERED,
81 QCA_BT_OFF,
82 QCA_ROM_FW,
83 QCA_DEBUGFS_CREATED,
84 };
85
86 enum qca_capabilities {
87 QCA_CAP_WIDEBAND_SPEECH = BIT(0),
88 QCA_CAP_VALID_LE_STATES = BIT(1),
89 QCA_CAP_HFP_HW_OFFLOAD = BIT(2),
90 };
91
92 /* HCI_IBS transmit side sleep protocol states */
93 enum tx_ibs_states {
94 HCI_IBS_TX_ASLEEP,
95 HCI_IBS_TX_WAKING,
96 HCI_IBS_TX_AWAKE,
97 };
98
99 /* HCI_IBS receive side sleep protocol states */
100 enum rx_states {
101 HCI_IBS_RX_ASLEEP,
102 HCI_IBS_RX_AWAKE,
103 };
104
105 /* HCI_IBS transmit and receive side clock state vote */
106 enum hci_ibs_clock_state_vote {
107 HCI_IBS_VOTE_STATS_UPDATE,
108 HCI_IBS_TX_VOTE_CLOCK_ON,
109 HCI_IBS_TX_VOTE_CLOCK_OFF,
110 HCI_IBS_RX_VOTE_CLOCK_ON,
111 HCI_IBS_RX_VOTE_CLOCK_OFF,
112 };
113
114 /* Controller memory dump states */
115 enum qca_memdump_states {
116 QCA_MEMDUMP_IDLE,
117 QCA_MEMDUMP_COLLECTING,
118 QCA_MEMDUMP_COLLECTED,
119 QCA_MEMDUMP_TIMEOUT,
120 };
121
122 struct qca_memdump_info {
123 u32 current_seq_no;
124 u32 received_dump;
125 u32 ram_dump_size;
126 };
127
128 struct qca_memdump_event_hdr {
129 __u8 evt;
130 __u8 plen;
131 __u16 opcode;
132 __le16 seq_no;
133 __u8 reserved;
134 } __packed;
135
136
137 struct qca_dump_size {
138 __le32 dump_size;
139 } __packed;
140
141 struct qca_data {
142 struct hci_uart *hu;
143 struct sk_buff *rx_skb;
144 struct sk_buff_head txq;
145 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */
146 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */
147 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
148 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
149 u8 rx_ibs_state; /* HCI_IBS receive side power state */
150 bool tx_vote; /* Clock must be on for TX */
151 bool rx_vote; /* Clock must be on for RX */
152 struct timer_list tx_idle_timer;
153 u32 tx_idle_delay;
154 struct timer_list wake_retrans_timer;
155 u32 wake_retrans;
156 struct workqueue_struct *workqueue;
157 struct work_struct ws_awake_rx;
158 struct work_struct ws_awake_device;
159 struct work_struct ws_rx_vote_off;
160 struct work_struct ws_tx_vote_off;
161 struct work_struct ctrl_memdump_evt;
162 struct delayed_work ctrl_memdump_timeout;
163 struct qca_memdump_info *qca_memdump;
164 unsigned long flags;
165 struct completion drop_ev_comp;
166 wait_queue_head_t suspend_wait_q;
167 enum qca_memdump_states memdump_state;
168 struct mutex hci_memdump_lock;
169
170 u16 fw_version;
171 u16 controller_id;
172 /* For debugging purpose */
173 u64 ibs_sent_wacks;
174 u64 ibs_sent_slps;
175 u64 ibs_sent_wakes;
176 u64 ibs_recv_wacks;
177 u64 ibs_recv_slps;
178 u64 ibs_recv_wakes;
179 u64 vote_last_jif;
180 u32 vote_on_ms;
181 u32 vote_off_ms;
182 u64 tx_votes_on;
183 u64 rx_votes_on;
184 u64 tx_votes_off;
185 u64 rx_votes_off;
186 u64 votes_on;
187 u64 votes_off;
188 };
189
190 enum qca_speed_type {
191 QCA_INIT_SPEED = 1,
192 QCA_OPER_SPEED
193 };
194
195 /*
196 * Voltage regulator information required for configuring the
197 * QCA Bluetooth chipset
198 */
199 struct qca_vreg {
200 const char *name;
201 unsigned int load_uA;
202 };
203
204 struct qca_device_data {
205 enum qca_btsoc_type soc_type;
206 struct qca_vreg *vregs;
207 size_t num_vregs;
208 uint32_t capabilities;
209 };
210
211 /*
212 * Platform data for the QCA Bluetooth power driver.
213 */
214 struct qca_power {
215 struct device *dev;
216 struct regulator_bulk_data *vreg_bulk;
217 int num_vregs;
218 bool vregs_on;
219 struct pwrseq_desc *pwrseq;
220 };
221
222 struct qca_serdev {
223 struct hci_uart serdev_hu;
224 struct gpio_desc *bt_en;
225 struct gpio_desc *sw_ctrl;
226 struct clk *susclk;
227 enum qca_btsoc_type btsoc_type;
228 struct qca_power *bt_power;
229 u32 init_speed;
230 u32 oper_speed;
231 bool bdaddr_property_broken;
232 bool support_hfp_hw_offload;
233 const char *firmware_name[2];
234 };
235
236 static int qca_regulator_enable(struct qca_serdev *qcadev);
237 static void qca_regulator_disable(struct qca_serdev *qcadev);
238 static void qca_power_off(struct hci_uart *hu);
239 static void qca_controller_memdump(struct work_struct *work);
240 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb);
241
qca_soc_type(struct hci_uart * hu)242 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
243 {
244 enum qca_btsoc_type soc_type;
245
246 if (hu->serdev) {
247 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
248
249 soc_type = qsd->btsoc_type;
250 } else {
251 soc_type = QCA_ROME;
252 }
253
254 return soc_type;
255 }
256
qca_get_firmware_name(struct hci_uart * hu)257 static const char *qca_get_firmware_name(struct hci_uart *hu)
258 {
259 if (hu->serdev) {
260 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
261
262 return qsd->firmware_name[0];
263 } else {
264 return NULL;
265 }
266 }
267
qca_get_rampatch_name(struct hci_uart * hu)268 static const char *qca_get_rampatch_name(struct hci_uart *hu)
269 {
270 if (hu->serdev) {
271 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
272
273 return qsd->firmware_name[1];
274 } else {
275 return NULL;
276 }
277 }
278
__serial_clock_on(struct tty_struct * tty)279 static void __serial_clock_on(struct tty_struct *tty)
280 {
281 /* TODO: Some chipset requires to enable UART clock on client
282 * side to save power consumption or manual work is required.
283 * Please put your code to control UART clock here if needed
284 */
285 }
286
__serial_clock_off(struct tty_struct * tty)287 static void __serial_clock_off(struct tty_struct *tty)
288 {
289 /* TODO: Some chipset requires to disable UART clock on client
290 * side to save power consumption or manual work is required.
291 * Please put your code to control UART clock off here if needed
292 */
293 }
294
295 /* serial_clock_vote needs to be called with the ibs lock held */
serial_clock_vote(unsigned long vote,struct hci_uart * hu)296 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
297 {
298 struct qca_data *qca = hu->priv;
299 unsigned int diff;
300
301 bool old_vote = (qca->tx_vote | qca->rx_vote);
302 bool new_vote;
303
304 switch (vote) {
305 case HCI_IBS_VOTE_STATS_UPDATE:
306 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
307
308 if (old_vote)
309 qca->vote_off_ms += diff;
310 else
311 qca->vote_on_ms += diff;
312 return;
313
314 case HCI_IBS_TX_VOTE_CLOCK_ON:
315 qca->tx_vote = true;
316 qca->tx_votes_on++;
317 break;
318
319 case HCI_IBS_RX_VOTE_CLOCK_ON:
320 qca->rx_vote = true;
321 qca->rx_votes_on++;
322 break;
323
324 case HCI_IBS_TX_VOTE_CLOCK_OFF:
325 qca->tx_vote = false;
326 qca->tx_votes_off++;
327 break;
328
329 case HCI_IBS_RX_VOTE_CLOCK_OFF:
330 qca->rx_vote = false;
331 qca->rx_votes_off++;
332 break;
333
334 default:
335 BT_ERR("Voting irregularity");
336 return;
337 }
338
339 new_vote = qca->rx_vote | qca->tx_vote;
340
341 if (new_vote != old_vote) {
342 if (new_vote)
343 __serial_clock_on(hu->tty);
344 else
345 __serial_clock_off(hu->tty);
346
347 BT_DBG("Vote serial clock %s(%s)", str_true_false(new_vote),
348 str_true_false(vote));
349
350 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
351
352 if (new_vote) {
353 qca->votes_on++;
354 qca->vote_off_ms += diff;
355 } else {
356 qca->votes_off++;
357 qca->vote_on_ms += diff;
358 }
359 qca->vote_last_jif = jiffies;
360 }
361 }
362
363 /* Builds and sends an HCI_IBS command packet.
364 * These are very simple packets with only 1 cmd byte.
365 */
send_hci_ibs_cmd(u8 cmd,struct hci_uart * hu)366 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
367 {
368 int err = 0;
369 struct sk_buff *skb = NULL;
370 struct qca_data *qca = hu->priv;
371
372 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
373
374 skb = bt_skb_alloc(1, GFP_ATOMIC);
375 if (!skb) {
376 BT_ERR("Failed to allocate memory for HCI_IBS packet");
377 return -ENOMEM;
378 }
379
380 /* Assign HCI_IBS type */
381 skb_put_u8(skb, cmd);
382
383 skb_queue_tail(&qca->txq, skb);
384
385 return err;
386 }
387
qca_wq_awake_device(struct work_struct * work)388 static void qca_wq_awake_device(struct work_struct *work)
389 {
390 struct qca_data *qca = container_of(work, struct qca_data,
391 ws_awake_device);
392 struct hci_uart *hu = qca->hu;
393 unsigned long retrans_delay;
394 unsigned long flags;
395
396 BT_DBG("hu %p wq awake device", hu);
397
398 /* Vote for serial clock */
399 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
400
401 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
402
403 /* Send wake indication to device */
404 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
405 BT_ERR("Failed to send WAKE to device");
406
407 qca->ibs_sent_wakes++;
408
409 /* Start retransmit timer */
410 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
411 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
412
413 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
414
415 /* Actually send the packets */
416 hci_uart_tx_wakeup(hu);
417 }
418
qca_wq_awake_rx(struct work_struct * work)419 static void qca_wq_awake_rx(struct work_struct *work)
420 {
421 struct qca_data *qca = container_of(work, struct qca_data,
422 ws_awake_rx);
423 struct hci_uart *hu = qca->hu;
424 unsigned long flags;
425
426 BT_DBG("hu %p wq awake rx", hu);
427
428 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
429
430 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
431 qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
432
433 /* Always acknowledge device wake up,
434 * sending IBS message doesn't count as TX ON.
435 */
436 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
437 BT_ERR("Failed to acknowledge device wake up");
438
439 qca->ibs_sent_wacks++;
440
441 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
442
443 /* Actually send the packets */
444 hci_uart_tx_wakeup(hu);
445 }
446
qca_wq_serial_rx_clock_vote_off(struct work_struct * work)447 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
448 {
449 struct qca_data *qca = container_of(work, struct qca_data,
450 ws_rx_vote_off);
451 struct hci_uart *hu = qca->hu;
452
453 BT_DBG("hu %p rx clock vote off", hu);
454
455 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
456 }
457
qca_wq_serial_tx_clock_vote_off(struct work_struct * work)458 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
459 {
460 struct qca_data *qca = container_of(work, struct qca_data,
461 ws_tx_vote_off);
462 struct hci_uart *hu = qca->hu;
463
464 BT_DBG("hu %p tx clock vote off", hu);
465
466 /* Run HCI tx handling unlocked */
467 hci_uart_tx_wakeup(hu);
468
469 /* Now that message queued to tty driver, vote for tty clocks off.
470 * It is up to the tty driver to pend the clocks off until tx done.
471 */
472 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
473 }
474
hci_ibs_tx_idle_timeout(struct timer_list * t)475 static void hci_ibs_tx_idle_timeout(struct timer_list *t)
476 {
477 struct qca_data *qca = timer_container_of(qca, t, tx_idle_timer);
478 struct hci_uart *hu = qca->hu;
479 unsigned long flags;
480
481 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
482
483 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
484 flags, SINGLE_DEPTH_NESTING);
485
486 switch (qca->tx_ibs_state) {
487 case HCI_IBS_TX_AWAKE:
488 /* TX_IDLE, go to SLEEP */
489 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
490 BT_ERR("Failed to send SLEEP to device");
491 break;
492 }
493 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
494 qca->ibs_sent_slps++;
495 queue_work(qca->workqueue, &qca->ws_tx_vote_off);
496 break;
497
498 case HCI_IBS_TX_ASLEEP:
499 case HCI_IBS_TX_WAKING:
500 default:
501 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
502 break;
503 }
504
505 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
506 }
507
hci_ibs_wake_retrans_timeout(struct timer_list * t)508 static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
509 {
510 struct qca_data *qca = timer_container_of(qca, t, wake_retrans_timer);
511 struct hci_uart *hu = qca->hu;
512 unsigned long flags, retrans_delay;
513 bool retransmit = false;
514
515 BT_DBG("hu %p wake retransmit timeout in %d state",
516 hu, qca->tx_ibs_state);
517
518 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
519 flags, SINGLE_DEPTH_NESTING);
520
521 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
522 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
523 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
524 return;
525 }
526
527 switch (qca->tx_ibs_state) {
528 case HCI_IBS_TX_WAKING:
529 /* No WAKE_ACK, retransmit WAKE */
530 retransmit = true;
531 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
532 BT_ERR("Failed to acknowledge device wake up");
533 break;
534 }
535 qca->ibs_sent_wakes++;
536 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
537 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
538 break;
539
540 case HCI_IBS_TX_ASLEEP:
541 case HCI_IBS_TX_AWAKE:
542 default:
543 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
544 break;
545 }
546
547 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
548
549 if (retransmit)
550 hci_uart_tx_wakeup(hu);
551 }
552
553
qca_controller_memdump_timeout(struct work_struct * work)554 static void qca_controller_memdump_timeout(struct work_struct *work)
555 {
556 struct qca_data *qca = container_of(work, struct qca_data,
557 ctrl_memdump_timeout.work);
558 struct hci_uart *hu = qca->hu;
559
560 mutex_lock(&qca->hci_memdump_lock);
561 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
562 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
563 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
564 /* Inject hw error event to reset the device
565 * and driver.
566 */
567 hci_reset_dev(hu->hdev);
568 }
569 }
570
571 mutex_unlock(&qca->hci_memdump_lock);
572 }
573
574
575 /* Initialize protocol */
qca_open(struct hci_uart * hu)576 static int qca_open(struct hci_uart *hu)
577 {
578 struct qca_serdev *qcadev;
579 struct qca_data *qca;
580
581 BT_DBG("hu %p qca_open", hu);
582
583 if (!hci_uart_has_flow_control(hu))
584 return -EOPNOTSUPP;
585
586 qca = kzalloc_obj(*qca);
587 if (!qca)
588 return -ENOMEM;
589
590 skb_queue_head_init(&qca->txq);
591 skb_queue_head_init(&qca->tx_wait_q);
592 skb_queue_head_init(&qca->rx_memdump_q);
593 spin_lock_init(&qca->hci_ibs_lock);
594 mutex_init(&qca->hci_memdump_lock);
595 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
596 if (!qca->workqueue) {
597 BT_ERR("QCA Workqueue not initialized properly");
598 kfree(qca);
599 return -ENOMEM;
600 }
601
602 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
603 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
604 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
605 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
606 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
607 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
608 qca_controller_memdump_timeout);
609 init_waitqueue_head(&qca->suspend_wait_q);
610
611 qca->hu = hu;
612 init_completion(&qca->drop_ev_comp);
613
614 /* Assume we start with both sides asleep -- extra wakes OK */
615 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
616 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
617
618 qca->vote_last_jif = jiffies;
619
620 hu->priv = qca;
621
622 if (hu->serdev) {
623 qcadev = serdev_device_get_drvdata(hu->serdev);
624
625 switch (qcadev->btsoc_type) {
626 case QCA_WCN3950:
627 case QCA_WCN3988:
628 case QCA_WCN3990:
629 case QCA_WCN3991:
630 case QCA_WCN3998:
631 case QCA_WCN6750:
632 hu->init_speed = qcadev->init_speed;
633 break;
634
635 default:
636 break;
637 }
638
639 if (qcadev->oper_speed)
640 hu->oper_speed = qcadev->oper_speed;
641 }
642
643 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
644 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
645
646 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
647 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
648
649 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
650 qca->tx_idle_delay, qca->wake_retrans);
651
652 return 0;
653 }
654
qca_debugfs_init(struct hci_dev * hdev)655 static void qca_debugfs_init(struct hci_dev *hdev)
656 {
657 struct hci_uart *hu = hci_get_drvdata(hdev);
658 struct qca_data *qca = hu->priv;
659 struct dentry *ibs_dir;
660 umode_t mode;
661
662 if (!hdev->debugfs)
663 return;
664
665 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags))
666 return;
667
668 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
669
670 /* read only */
671 mode = 0444;
672 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
673 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
674 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
675 &qca->ibs_sent_slps);
676 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
677 &qca->ibs_sent_wakes);
678 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
679 &qca->ibs_sent_wacks);
680 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
681 &qca->ibs_recv_slps);
682 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
683 &qca->ibs_recv_wakes);
684 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
685 &qca->ibs_recv_wacks);
686 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
687 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
688 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
689 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
690 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
691 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
692 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
693 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
694 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
695 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
696
697 /* read/write */
698 mode = 0644;
699 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
700 debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
701 &qca->tx_idle_delay);
702 }
703
704 /* Flush protocol data */
qca_flush(struct hci_uart * hu)705 static int qca_flush(struct hci_uart *hu)
706 {
707 struct qca_data *qca = hu->priv;
708
709 BT_DBG("hu %p qca flush", hu);
710
711 skb_queue_purge(&qca->tx_wait_q);
712 skb_queue_purge(&qca->txq);
713
714 return 0;
715 }
716
717 /* Close protocol */
qca_close(struct hci_uart * hu)718 static int qca_close(struct hci_uart *hu)
719 {
720 struct qca_data *qca = hu->priv;
721
722 BT_DBG("hu %p qca close", hu);
723
724 /* BT core skips qca_hci_shutdown() which calls qca_power_off() on rmmod */
725 if (!test_bit(QCA_BT_OFF, &qca->flags))
726 qca_power_off(hu);
727
728 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
729
730 skb_queue_purge(&qca->tx_wait_q);
731 skb_queue_purge(&qca->txq);
732 skb_queue_purge(&qca->rx_memdump_q);
733 /*
734 * Shut the timers down so they can't be rearmed when
735 * destroy_workqueue() drains pending work which in turn might try
736 * to arm a timer. After shutdown rearm attempts are silently
737 * ignored by the timer core code.
738 */
739 timer_shutdown_sync(&qca->tx_idle_timer);
740 timer_shutdown_sync(&qca->wake_retrans_timer);
741 destroy_workqueue(qca->workqueue);
742 qca->hu = NULL;
743
744 kfree_skb(qca->rx_skb);
745
746 hu->priv = NULL;
747
748 kfree(qca);
749
750 return 0;
751 }
752
753 /* Called upon a wake-up-indication from the device.
754 */
device_want_to_wakeup(struct hci_uart * hu)755 static void device_want_to_wakeup(struct hci_uart *hu)
756 {
757 unsigned long flags;
758 struct qca_data *qca = hu->priv;
759
760 BT_DBG("hu %p want to wake up", hu);
761
762 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
763
764 qca->ibs_recv_wakes++;
765
766 /* Don't wake the rx up when suspending. */
767 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
768 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
769 return;
770 }
771
772 switch (qca->rx_ibs_state) {
773 case HCI_IBS_RX_ASLEEP:
774 /* Make sure clock is on - we may have turned clock off since
775 * receiving the wake up indicator awake rx clock.
776 */
777 queue_work(qca->workqueue, &qca->ws_awake_rx);
778 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
779 return;
780
781 case HCI_IBS_RX_AWAKE:
782 /* Always acknowledge device wake up,
783 * sending IBS message doesn't count as TX ON.
784 */
785 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
786 BT_ERR("Failed to acknowledge device wake up");
787 break;
788 }
789 qca->ibs_sent_wacks++;
790 break;
791
792 default:
793 /* Any other state is illegal */
794 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
795 qca->rx_ibs_state);
796 break;
797 }
798
799 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
800
801 /* Actually send the packets */
802 hci_uart_tx_wakeup(hu);
803 }
804
805 /* Called upon a sleep-indication from the device.
806 */
device_want_to_sleep(struct hci_uart * hu)807 static void device_want_to_sleep(struct hci_uart *hu)
808 {
809 unsigned long flags;
810 struct qca_data *qca = hu->priv;
811
812 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
813
814 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
815
816 qca->ibs_recv_slps++;
817
818 switch (qca->rx_ibs_state) {
819 case HCI_IBS_RX_AWAKE:
820 /* Update state */
821 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
822 /* Vote off rx clock under workqueue */
823 queue_work(qca->workqueue, &qca->ws_rx_vote_off);
824 break;
825
826 case HCI_IBS_RX_ASLEEP:
827 break;
828
829 default:
830 /* Any other state is illegal */
831 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
832 qca->rx_ibs_state);
833 break;
834 }
835
836 wake_up_interruptible(&qca->suspend_wait_q);
837
838 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
839 }
840
841 /* Called upon wake-up-acknowledgement from the device
842 */
device_woke_up(struct hci_uart * hu)843 static void device_woke_up(struct hci_uart *hu)
844 {
845 unsigned long flags, idle_delay;
846 struct qca_data *qca = hu->priv;
847 struct sk_buff *skb = NULL;
848
849 BT_DBG("hu %p woke up", hu);
850
851 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
852
853 qca->ibs_recv_wacks++;
854
855 /* Don't react to the wake-up-acknowledgment when suspending. */
856 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
857 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
858 return;
859 }
860
861 switch (qca->tx_ibs_state) {
862 case HCI_IBS_TX_AWAKE:
863 /* Expect one if we send 2 WAKEs */
864 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
865 qca->tx_ibs_state);
866 break;
867
868 case HCI_IBS_TX_WAKING:
869 /* Send pending packets */
870 while ((skb = skb_dequeue(&qca->tx_wait_q)))
871 skb_queue_tail(&qca->txq, skb);
872
873 /* Switch timers and change state to HCI_IBS_TX_AWAKE */
874 timer_delete(&qca->wake_retrans_timer);
875 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
876 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
877 qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
878 break;
879
880 case HCI_IBS_TX_ASLEEP:
881 default:
882 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
883 qca->tx_ibs_state);
884 break;
885 }
886
887 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
888
889 /* Actually send the packets */
890 hci_uart_tx_wakeup(hu);
891 }
892
893 /* Enqueue frame for transmission (padding, crc, etc) may be called from
894 * two simultaneous tasklets.
895 */
qca_enqueue(struct hci_uart * hu,struct sk_buff * skb)896 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
897 {
898 unsigned long flags = 0, idle_delay;
899 struct qca_data *qca = hu->priv;
900
901 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
902 qca->tx_ibs_state);
903
904 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
905 /* As SSR is in progress, ignore the packets */
906 bt_dev_dbg(hu->hdev, "SSR is in progress");
907 kfree_skb(skb);
908 return 0;
909 }
910
911 /* Prepend skb with frame type */
912 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
913
914 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
915
916 /* Don't go to sleep in middle of patch download or
917 * Out-Of-Band(GPIOs control) sleep is selected.
918 * Don't wake the device up when suspending.
919 */
920 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
921 test_bit(QCA_SUSPENDING, &qca->flags)) {
922 skb_queue_tail(&qca->txq, skb);
923 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
924 return 0;
925 }
926
927 /* Act according to current state */
928 switch (qca->tx_ibs_state) {
929 case HCI_IBS_TX_AWAKE:
930 BT_DBG("Device awake, sending normally");
931 skb_queue_tail(&qca->txq, skb);
932 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
933 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
934 break;
935
936 case HCI_IBS_TX_ASLEEP:
937 BT_DBG("Device asleep, waking up and queueing packet");
938 /* Save packet for later */
939 skb_queue_tail(&qca->tx_wait_q, skb);
940
941 qca->tx_ibs_state = HCI_IBS_TX_WAKING;
942 /* Schedule a work queue to wake up device */
943 queue_work(qca->workqueue, &qca->ws_awake_device);
944 break;
945
946 case HCI_IBS_TX_WAKING:
947 BT_DBG("Device waking up, queueing packet");
948 /* Transient state; just keep packet for later */
949 skb_queue_tail(&qca->tx_wait_q, skb);
950 break;
951
952 default:
953 BT_ERR("Illegal tx state: %d (losing packet)",
954 qca->tx_ibs_state);
955 dev_kfree_skb_irq(skb);
956 break;
957 }
958
959 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
960
961 return 0;
962 }
963
qca_ibs_sleep_ind(struct hci_dev * hdev,struct sk_buff * skb)964 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
965 {
966 struct hci_uart *hu = hci_get_drvdata(hdev);
967
968 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
969
970 device_want_to_sleep(hu);
971
972 kfree_skb(skb);
973 return 0;
974 }
975
qca_ibs_wake_ind(struct hci_dev * hdev,struct sk_buff * skb)976 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
977 {
978 struct hci_uart *hu = hci_get_drvdata(hdev);
979
980 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
981
982 device_want_to_wakeup(hu);
983
984 kfree_skb(skb);
985 return 0;
986 }
987
qca_ibs_wake_ack(struct hci_dev * hdev,struct sk_buff * skb)988 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
989 {
990 struct hci_uart *hu = hci_get_drvdata(hdev);
991
992 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
993
994 device_woke_up(hu);
995
996 kfree_skb(skb);
997 return 0;
998 }
999
qca_recv_acl_data(struct hci_dev * hdev,struct sk_buff * skb)1000 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
1001 {
1002 /* We receive debug logs from chip as an ACL packets.
1003 * Instead of sending the data to ACL to decode the
1004 * received data, we are pushing them to the above layers
1005 * as a diagnostic packet.
1006 */
1007 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
1008 return hci_recv_diag(hdev, skb);
1009
1010 return hci_recv_frame(hdev, skb);
1011 }
1012
qca_dmp_hdr(struct hci_dev * hdev,struct sk_buff * skb)1013 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb)
1014 {
1015 struct hci_uart *hu = hci_get_drvdata(hdev);
1016 struct qca_data *qca = hu->priv;
1017 char buf[80];
1018
1019 snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n",
1020 qca->controller_id);
1021 skb_put_data(skb, buf, strlen(buf));
1022
1023 snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n",
1024 qca->fw_version);
1025 skb_put_data(skb, buf, strlen(buf));
1026
1027 snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n");
1028 skb_put_data(skb, buf, strlen(buf));
1029
1030 snprintf(buf, sizeof(buf), "Driver: %s\n",
1031 hu->serdev->dev.driver->name);
1032 skb_put_data(skb, buf, strlen(buf));
1033 }
1034
qca_controller_memdump(struct work_struct * work)1035 static void qca_controller_memdump(struct work_struct *work)
1036 {
1037 struct qca_data *qca = container_of(work, struct qca_data,
1038 ctrl_memdump_evt);
1039 struct hci_uart *hu = qca->hu;
1040 struct sk_buff *skb;
1041 struct qca_memdump_event_hdr *cmd_hdr;
1042 struct qca_memdump_info *qca_memdump = qca->qca_memdump;
1043 struct qca_dump_size *dump;
1044 u16 seq_no;
1045 u32 rx_size;
1046 int ret = 0;
1047 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1048
1049 while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
1050
1051 mutex_lock(&qca->hci_memdump_lock);
1052 /* Skip processing the received packets if timeout detected
1053 * or memdump collection completed.
1054 */
1055 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1056 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1057 mutex_unlock(&qca->hci_memdump_lock);
1058 return;
1059 }
1060
1061 if (!qca_memdump) {
1062 qca_memdump = kzalloc_obj(*qca_memdump, GFP_ATOMIC);
1063 if (!qca_memdump) {
1064 mutex_unlock(&qca->hci_memdump_lock);
1065 return;
1066 }
1067
1068 qca->qca_memdump = qca_memdump;
1069 }
1070
1071 qca->memdump_state = QCA_MEMDUMP_COLLECTING;
1072 cmd_hdr = (void *) skb->data;
1073 seq_no = __le16_to_cpu(cmd_hdr->seq_no);
1074 skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
1075
1076 if (!seq_no) {
1077
1078 /* This is the first frame of memdump packet from
1079 * the controller, Disable IBS to receive dump
1080 * with out any interruption, ideally time required for
1081 * the controller to send the dump is 8 seconds. let us
1082 * start timer to handle this asynchronous activity.
1083 */
1084 set_bit(QCA_IBS_DISABLED, &qca->flags);
1085 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1086 dump = (void *) skb->data;
1087 qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size);
1088 if (!(qca_memdump->ram_dump_size)) {
1089 bt_dev_err(hu->hdev, "Rx invalid memdump size");
1090 kfree(qca_memdump);
1091 kfree_skb(skb);
1092 mutex_unlock(&qca->hci_memdump_lock);
1093 return;
1094 }
1095
1096 queue_delayed_work(qca->workqueue,
1097 &qca->ctrl_memdump_timeout,
1098 MEMDUMP_TIMEOUT);
1099 skb_pull(skb, sizeof(qca_memdump->ram_dump_size));
1100 qca_memdump->current_seq_no = 0;
1101 qca_memdump->received_dump = 0;
1102 ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size);
1103 bt_dev_info(hu->hdev, "hci_devcd_init Return:%d",
1104 ret);
1105 if (ret < 0) {
1106 kfree(qca->qca_memdump);
1107 qca->qca_memdump = NULL;
1108 qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1109 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1110 clear_and_wake_up_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1111 clear_bit(QCA_IBS_DISABLED, &qca->flags);
1112 mutex_unlock(&qca->hci_memdump_lock);
1113 return;
1114 }
1115
1116 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
1117 qca_memdump->ram_dump_size);
1118
1119 }
1120
1121 /* If sequence no 0 is missed then there is no point in
1122 * accepting the other sequences.
1123 */
1124 if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
1125 bt_dev_err(hu->hdev, "QCA: Discarding other packets");
1126 kfree(qca_memdump);
1127 kfree_skb(skb);
1128 mutex_unlock(&qca->hci_memdump_lock);
1129 return;
1130 }
1131 /* There could be chance of missing some packets from
1132 * the controller. In such cases let us store the dummy
1133 * packets in the buffer.
1134 */
1135 /* For QCA6390, controller does not lost packets but
1136 * sequence number field of packet sometimes has error
1137 * bits, so skip this checking for missing packet.
1138 */
1139 while ((seq_no > qca_memdump->current_seq_no + 1) &&
1140 (soc_type != QCA_QCA6390) &&
1141 seq_no != QCA_LAST_SEQUENCE_NUM) {
1142 bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
1143 qca_memdump->current_seq_no);
1144 rx_size = qca_memdump->received_dump;
1145 rx_size += QCA_DUMP_PACKET_SIZE;
1146 if (rx_size > qca_memdump->ram_dump_size) {
1147 bt_dev_err(hu->hdev,
1148 "QCA memdump received %d, no space for missed packet",
1149 qca_memdump->received_dump);
1150 break;
1151 }
1152 hci_devcd_append_pattern(hu->hdev, 0x00,
1153 QCA_DUMP_PACKET_SIZE);
1154 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
1155 qca_memdump->current_seq_no++;
1156 }
1157
1158 rx_size = qca_memdump->received_dump + skb->len;
1159 if (rx_size <= qca_memdump->ram_dump_size) {
1160 if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
1161 (seq_no != qca_memdump->current_seq_no)) {
1162 bt_dev_err(hu->hdev,
1163 "QCA memdump unexpected packet %d",
1164 seq_no);
1165 }
1166 bt_dev_dbg(hu->hdev,
1167 "QCA memdump packet %d with length %d",
1168 seq_no, skb->len);
1169 hci_devcd_append(hu->hdev, skb);
1170 qca_memdump->current_seq_no += 1;
1171 qca_memdump->received_dump = rx_size;
1172 } else {
1173 bt_dev_err(hu->hdev,
1174 "QCA memdump received no space for packet %d",
1175 qca_memdump->current_seq_no);
1176 }
1177
1178 if (seq_no == QCA_LAST_SEQUENCE_NUM) {
1179 bt_dev_info(hu->hdev,
1180 "QCA memdump Done, received %d, total %d",
1181 qca_memdump->received_dump,
1182 qca_memdump->ram_dump_size);
1183 hci_devcd_complete(hu->hdev);
1184 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1185 kfree(qca->qca_memdump);
1186 qca->qca_memdump = NULL;
1187 qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1188 clear_and_wake_up_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1189 }
1190
1191 mutex_unlock(&qca->hci_memdump_lock);
1192 }
1193
1194 }
1195
qca_controller_memdump_event(struct hci_dev * hdev,struct sk_buff * skb)1196 static int qca_controller_memdump_event(struct hci_dev *hdev,
1197 struct sk_buff *skb)
1198 {
1199 struct hci_uart *hu = hci_get_drvdata(hdev);
1200 struct qca_data *qca = hu->priv;
1201
1202 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1203 skb_queue_tail(&qca->rx_memdump_q, skb);
1204 queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
1205
1206 return 0;
1207 }
1208
qca_recv_event(struct hci_dev * hdev,struct sk_buff * skb)1209 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
1210 {
1211 struct hci_uart *hu = hci_get_drvdata(hdev);
1212 struct qca_data *qca = hu->priv;
1213
1214 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
1215 struct hci_event_hdr *hdr = (void *)skb->data;
1216
1217 /* For the WCN3990 the vendor command for a baudrate change
1218 * isn't sent as synchronous HCI command, because the
1219 * controller sends the corresponding vendor event with the
1220 * new baudrate. The event is received and properly decoded
1221 * after changing the baudrate of the host port. It needs to
1222 * be dropped, otherwise it can be misinterpreted as
1223 * response to a later firmware download command (also a
1224 * vendor command).
1225 */
1226
1227 if (hdr->evt == HCI_EV_VENDOR)
1228 complete(&qca->drop_ev_comp);
1229
1230 kfree_skb(skb);
1231
1232 return 0;
1233 }
1234 /* We receive chip memory dump as an event packet, With a dedicated
1235 * handler followed by a hardware error event. When this event is
1236 * received we store dump into a file before closing hci. This
1237 * dump will help in triaging the issues.
1238 */
1239 if ((skb->data[0] == HCI_VENDOR_PKT) &&
1240 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
1241 return qca_controller_memdump_event(hdev, skb);
1242
1243 return hci_recv_frame(hdev, skb);
1244 }
1245
1246 #define QCA_IBS_SLEEP_IND_EVENT \
1247 .type = HCI_IBS_SLEEP_IND, \
1248 .hlen = 0, \
1249 .loff = 0, \
1250 .lsize = 0, \
1251 .maxlen = HCI_MAX_IBS_SIZE
1252
1253 #define QCA_IBS_WAKE_IND_EVENT \
1254 .type = HCI_IBS_WAKE_IND, \
1255 .hlen = 0, \
1256 .loff = 0, \
1257 .lsize = 0, \
1258 .maxlen = HCI_MAX_IBS_SIZE
1259
1260 #define QCA_IBS_WAKE_ACK_EVENT \
1261 .type = HCI_IBS_WAKE_ACK, \
1262 .hlen = 0, \
1263 .loff = 0, \
1264 .lsize = 0, \
1265 .maxlen = HCI_MAX_IBS_SIZE
1266
1267 static const struct h4_recv_pkt qca_recv_pkts[] = {
1268 { H4_RECV_ACL, .recv = qca_recv_acl_data },
1269 { H4_RECV_SCO, .recv = hci_recv_frame },
1270 { H4_RECV_EVENT, .recv = qca_recv_event },
1271 { H4_RECV_ISO, .recv = hci_recv_frame },
1272 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind },
1273 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack },
1274 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
1275 };
1276
qca_recv(struct hci_uart * hu,const void * data,int count)1277 static int qca_recv(struct hci_uart *hu, const void *data, int count)
1278 {
1279 struct qca_data *qca = hu->priv;
1280
1281 if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
1282 return -EUNATCH;
1283
1284 qca->rx_skb = h4_recv_buf(hu, qca->rx_skb, data, count,
1285 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
1286 if (IS_ERR(qca->rx_skb)) {
1287 int err = PTR_ERR(qca->rx_skb);
1288 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
1289 qca->rx_skb = NULL;
1290 return err;
1291 }
1292
1293 return count;
1294 }
1295
qca_dequeue(struct hci_uart * hu)1296 static struct sk_buff *qca_dequeue(struct hci_uart *hu)
1297 {
1298 struct qca_data *qca = hu->priv;
1299
1300 return skb_dequeue(&qca->txq);
1301 }
1302
qca_get_baudrate_value(int speed)1303 static uint8_t qca_get_baudrate_value(int speed)
1304 {
1305 switch (speed) {
1306 case 9600:
1307 return QCA_BAUDRATE_9600;
1308 case 19200:
1309 return QCA_BAUDRATE_19200;
1310 case 38400:
1311 return QCA_BAUDRATE_38400;
1312 case 57600:
1313 return QCA_BAUDRATE_57600;
1314 case 115200:
1315 return QCA_BAUDRATE_115200;
1316 case 230400:
1317 return QCA_BAUDRATE_230400;
1318 case 460800:
1319 return QCA_BAUDRATE_460800;
1320 case 500000:
1321 return QCA_BAUDRATE_500000;
1322 case 921600:
1323 return QCA_BAUDRATE_921600;
1324 case 1000000:
1325 return QCA_BAUDRATE_1000000;
1326 case 2000000:
1327 return QCA_BAUDRATE_2000000;
1328 case 3000000:
1329 return QCA_BAUDRATE_3000000;
1330 case 3200000:
1331 return QCA_BAUDRATE_3200000;
1332 case 3500000:
1333 return QCA_BAUDRATE_3500000;
1334 default:
1335 return QCA_BAUDRATE_115200;
1336 }
1337 }
1338
qca_set_baudrate(struct hci_dev * hdev,uint8_t baudrate)1339 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
1340 {
1341 struct hci_uart *hu = hci_get_drvdata(hdev);
1342 struct qca_data *qca = hu->priv;
1343 struct sk_buff *skb;
1344 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
1345
1346 if (baudrate > QCA_BAUDRATE_3200000)
1347 return -EINVAL;
1348
1349 cmd[4] = baudrate;
1350
1351 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
1352 if (!skb) {
1353 bt_dev_err(hdev, "Failed to allocate baudrate packet");
1354 return -ENOMEM;
1355 }
1356
1357 /* Assign commands to change baudrate and packet type. */
1358 skb_put_data(skb, cmd, sizeof(cmd));
1359 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1360
1361 skb_queue_tail(&qca->txq, skb);
1362 hci_uart_tx_wakeup(hu);
1363
1364 /* Wait for the baudrate change request to be sent */
1365
1366 while (!skb_queue_empty(&qca->txq))
1367 usleep_range(100, 200);
1368
1369 if (hu->serdev)
1370 serdev_device_wait_until_sent(hu->serdev,
1371 CMD_TRANS_TIMEOUT);
1372
1373 /* Give the controller time to process the request */
1374 switch (qca_soc_type(hu)) {
1375 case QCA_WCN3950:
1376 case QCA_WCN3988:
1377 case QCA_WCN3990:
1378 case QCA_WCN3991:
1379 case QCA_WCN3998:
1380 case QCA_WCN6750:
1381 case QCA_WCN6855:
1382 case QCA_WCN7850:
1383 usleep_range(1000, 10000);
1384 break;
1385
1386 default:
1387 msleep(300);
1388 }
1389
1390 return 0;
1391 }
1392
host_set_baudrate(struct hci_uart * hu,unsigned int speed)1393 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1394 {
1395 if (hu->serdev)
1396 serdev_device_set_baudrate(hu->serdev, speed);
1397 else
1398 hci_uart_set_baudrate(hu, speed);
1399 }
1400
qca_send_power_pulse(struct hci_uart * hu,bool on)1401 static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1402 {
1403 int timeout = CMD_TRANS_TIMEOUT;
1404 int ret;
1405 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1406
1407 /* These power pulses are single byte command which are sent
1408 * at required baudrate to wcn3990. On wcn3990, we have an external
1409 * circuit at Tx pin which decodes the pulse sent at specific baudrate.
1410 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1411 * and also we use the same power inputs to turn on and off for
1412 * Wi-Fi/BT. Powering up the power sources will not enable BT, until
1413 * we send a power on pulse at 115200 bps. This algorithm will help to
1414 * save power. Disabling hardware flow control is mandatory while
1415 * sending power pulses to SoC.
1416 */
1417 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1418
1419 serdev_device_write_flush(hu->serdev);
1420 hci_uart_set_flow_control(hu, true);
1421 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1422 if (ret < 0) {
1423 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1424 return ret;
1425 }
1426
1427 serdev_device_wait_until_sent(hu->serdev, timeout);
1428 hci_uart_set_flow_control(hu, false);
1429
1430 /* Give to controller time to boot/shutdown */
1431 if (on)
1432 msleep(100);
1433 else
1434 usleep_range(1000, 10000);
1435
1436 return 0;
1437 }
1438
qca_get_speed(struct hci_uart * hu,enum qca_speed_type speed_type)1439 static unsigned int qca_get_speed(struct hci_uart *hu,
1440 enum qca_speed_type speed_type)
1441 {
1442 unsigned int speed = 0;
1443
1444 if (speed_type == QCA_INIT_SPEED) {
1445 if (hu->init_speed)
1446 speed = hu->init_speed;
1447 else if (hu->proto->init_speed)
1448 speed = hu->proto->init_speed;
1449 } else {
1450 if (hu->oper_speed)
1451 speed = hu->oper_speed;
1452 else if (hu->proto->oper_speed)
1453 speed = hu->proto->oper_speed;
1454 }
1455
1456 return speed;
1457 }
1458
qca_check_speeds(struct hci_uart * hu)1459 static int qca_check_speeds(struct hci_uart *hu)
1460 {
1461 switch (qca_soc_type(hu)) {
1462 case QCA_WCN3950:
1463 case QCA_WCN3988:
1464 case QCA_WCN3990:
1465 case QCA_WCN3991:
1466 case QCA_WCN3998:
1467 case QCA_WCN6750:
1468 case QCA_WCN6855:
1469 case QCA_WCN7850:
1470 if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1471 !qca_get_speed(hu, QCA_OPER_SPEED))
1472 return -EINVAL;
1473 break;
1474
1475 default:
1476 if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
1477 !qca_get_speed(hu, QCA_OPER_SPEED))
1478 return -EINVAL;
1479 }
1480
1481 return 0;
1482 }
1483
qca_set_speed(struct hci_uart * hu,enum qca_speed_type speed_type)1484 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1485 {
1486 unsigned int speed, qca_baudrate;
1487 struct qca_data *qca = hu->priv;
1488 int ret = 0;
1489
1490 if (speed_type == QCA_INIT_SPEED) {
1491 speed = qca_get_speed(hu, QCA_INIT_SPEED);
1492 if (speed)
1493 host_set_baudrate(hu, speed);
1494 } else {
1495 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1496
1497 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1498 if (!speed)
1499 return 0;
1500
1501 /* Disable flow control for wcn3990 to deassert RTS while
1502 * changing the baudrate of chip and host.
1503 */
1504 switch (soc_type) {
1505 case QCA_WCN3950:
1506 case QCA_WCN3988:
1507 case QCA_WCN3990:
1508 case QCA_WCN3991:
1509 case QCA_WCN3998:
1510 case QCA_WCN6750:
1511 case QCA_WCN6855:
1512 case QCA_WCN7850:
1513 hci_uart_set_flow_control(hu, true);
1514 break;
1515
1516 default:
1517 break;
1518 }
1519
1520 switch (soc_type) {
1521 case QCA_WCN3990:
1522 reinit_completion(&qca->drop_ev_comp);
1523 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1524 break;
1525
1526 default:
1527 break;
1528 }
1529
1530 qca_baudrate = qca_get_baudrate_value(speed);
1531 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1532 ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1533 if (ret)
1534 goto error;
1535
1536 host_set_baudrate(hu, speed);
1537
1538 error:
1539 switch (soc_type) {
1540 case QCA_WCN3950:
1541 case QCA_WCN3988:
1542 case QCA_WCN3990:
1543 case QCA_WCN3991:
1544 case QCA_WCN3998:
1545 case QCA_WCN6750:
1546 case QCA_WCN6855:
1547 case QCA_WCN7850:
1548 hci_uart_set_flow_control(hu, false);
1549 break;
1550
1551 default:
1552 break;
1553 }
1554
1555 switch (soc_type) {
1556 case QCA_WCN3990:
1557 /* Wait for the controller to send the vendor event
1558 * for the baudrate change command.
1559 */
1560 if (!wait_for_completion_timeout(&qca->drop_ev_comp,
1561 msecs_to_jiffies(100))) {
1562 bt_dev_err(hu->hdev,
1563 "Failed to change controller baudrate\n");
1564 ret = -ETIMEDOUT;
1565 }
1566
1567 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1568 break;
1569
1570 default:
1571 break;
1572 }
1573 }
1574
1575 return ret;
1576 }
1577
qca_send_crashbuffer(struct hci_uart * hu)1578 static int qca_send_crashbuffer(struct hci_uart *hu)
1579 {
1580 struct qca_data *qca = hu->priv;
1581 struct sk_buff *skb;
1582
1583 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
1584 if (!skb) {
1585 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
1586 return -ENOMEM;
1587 }
1588
1589 /* We forcefully crash the controller, by sending 0xfb byte for
1590 * 1024 times. We also might have chance of losing data, To be
1591 * on safer side we send 1096 bytes to the SoC.
1592 */
1593 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
1594 QCA_CRASHBYTE_PACKET_LEN);
1595 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1596 bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
1597 skb_queue_tail(&qca->txq, skb);
1598 hci_uart_tx_wakeup(hu);
1599
1600 return 0;
1601 }
1602
qca_wait_for_dump_collection(struct hci_dev * hdev)1603 static void qca_wait_for_dump_collection(struct hci_dev *hdev)
1604 {
1605 struct hci_uart *hu = hci_get_drvdata(hdev);
1606 struct qca_data *qca = hu->priv;
1607
1608 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
1609 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT);
1610
1611 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1612 }
1613
qca_hw_error(struct hci_dev * hdev,u8 code)1614 static void qca_hw_error(struct hci_dev *hdev, u8 code)
1615 {
1616 struct hci_uart *hu = hci_get_drvdata(hdev);
1617 struct qca_data *qca = hu->priv;
1618
1619 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1620 set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1621 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
1622
1623 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1624 /* If hardware error event received for other than QCA
1625 * soc memory dump event, then we need to crash the SOC
1626 * and wait here for 8 seconds to get the dump packets.
1627 * This will block main thread to be on hold until we
1628 * collect dump.
1629 */
1630 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1631 qca_send_crashbuffer(hu);
1632 qca_wait_for_dump_collection(hdev);
1633 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1634 /* Let us wait here until memory dump collected or
1635 * memory dump timer expired.
1636 */
1637 bt_dev_info(hdev, "waiting for dump to complete");
1638 qca_wait_for_dump_collection(hdev);
1639 }
1640
1641 mutex_lock(&qca->hci_memdump_lock);
1642 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1643 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
1644 hci_devcd_abort(hu->hdev);
1645 if (qca->qca_memdump) {
1646 kfree(qca->qca_memdump);
1647 qca->qca_memdump = NULL;
1648 }
1649 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1650 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1651 }
1652 mutex_unlock(&qca->hci_memdump_lock);
1653
1654 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1655 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1656 cancel_work_sync(&qca->ctrl_memdump_evt);
1657 skb_queue_purge(&qca->rx_memdump_q);
1658 }
1659
1660 /*
1661 * If the BT chip's bt_en pin is connected to a 3.3V power supply via
1662 * hardware and always stays high, driver cannot control the bt_en pin.
1663 * As a result, during SSR (SubSystem Restart), QCA_SSR_TRIGGERED and
1664 * QCA_IBS_DISABLED flags cannot be cleared, which leads to a reset
1665 * command timeout.
1666 * Add an msleep delay to ensure controller completes the SSR process.
1667 *
1668 * Host will not download the firmware after SSR, controller to remain
1669 * in the IBS_WAKE state, and the host needs to synchronize with it
1670 *
1671 * Since the bluetooth chip has been reset, clear the memdump state.
1672 */
1673 if (!hci_test_quirk(hu->hdev, HCI_QUIRK_NON_PERSISTENT_SETUP)) {
1674 /*
1675 * When the SSR (SubSystem Restart) duration exceeds 2 seconds,
1676 * it triggers host tx_idle_delay, which sets host TX state
1677 * to sleep. Reset tx_idle_timer after SSR to prevent
1678 * host enter TX IBS_Sleep mode.
1679 */
1680 mod_timer(&qca->tx_idle_timer, jiffies +
1681 msecs_to_jiffies(qca->tx_idle_delay));
1682
1683 /* Controller reset completion time is 50ms */
1684 msleep(50);
1685
1686 clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
1687 clear_bit(QCA_IBS_DISABLED, &qca->flags);
1688
1689 qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
1690 qca->memdump_state = QCA_MEMDUMP_IDLE;
1691 }
1692
1693 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1694 }
1695
qca_reset(struct hci_dev * hdev)1696 static void qca_reset(struct hci_dev *hdev)
1697 {
1698 struct hci_uart *hu = hci_get_drvdata(hdev);
1699 struct qca_data *qca = hu->priv;
1700
1701 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1702 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1703 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1704 qca_send_crashbuffer(hu);
1705 qca_wait_for_dump_collection(hdev);
1706 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1707 /* Let us wait here until memory dump collected or
1708 * memory dump timer expired.
1709 */
1710 bt_dev_info(hdev, "waiting for dump to complete");
1711 qca_wait_for_dump_collection(hdev);
1712 }
1713
1714 mutex_lock(&qca->hci_memdump_lock);
1715 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1716 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1717 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
1718 /* Inject hw error event to reset the device
1719 * and driver.
1720 */
1721 hci_reset_dev(hu->hdev);
1722 }
1723 }
1724 mutex_unlock(&qca->hci_memdump_lock);
1725 }
1726
qca_wakeup(struct hci_dev * hdev)1727 static bool qca_wakeup(struct hci_dev *hdev)
1728 {
1729 struct hci_uart *hu = hci_get_drvdata(hdev);
1730 bool wakeup;
1731
1732 if (!hu->serdev)
1733 return true;
1734
1735 /* BT SoC attached through the serial bus is handled by the serdev driver.
1736 * So we need to use the device handle of the serdev driver to get the
1737 * status of device may wakeup.
1738 */
1739 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev);
1740 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup);
1741
1742 return wakeup;
1743 }
1744
qca_port_reopen(struct hci_uart * hu)1745 static int qca_port_reopen(struct hci_uart *hu)
1746 {
1747 int ret;
1748
1749 /* Now the device is in ready state to communicate with host.
1750 * To sync host with device we need to reopen port.
1751 * Without this, we will have RTS and CTS synchronization
1752 * issues.
1753 */
1754 serdev_device_close(hu->serdev);
1755 ret = serdev_device_open(hu->serdev);
1756 if (ret) {
1757 bt_dev_err(hu->hdev, "failed to open port");
1758 return ret;
1759 }
1760
1761 hci_uart_set_flow_control(hu, false);
1762
1763 return 0;
1764 }
1765
qca_regulator_init(struct hci_uart * hu)1766 static int qca_regulator_init(struct hci_uart *hu)
1767 {
1768 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1769 struct qca_serdev *qcadev;
1770 int ret;
1771 bool sw_ctrl_state;
1772
1773 /* Check for vregs status, may be hci down has turned
1774 * off the voltage regulator.
1775 */
1776 qcadev = serdev_device_get_drvdata(hu->serdev);
1777
1778 if (!qcadev->bt_power->vregs_on) {
1779 serdev_device_close(hu->serdev);
1780 ret = qca_regulator_enable(qcadev);
1781 if (ret)
1782 return ret;
1783
1784 ret = serdev_device_open(hu->serdev);
1785 if (ret) {
1786 bt_dev_err(hu->hdev, "failed to open port");
1787 return ret;
1788 }
1789 }
1790
1791 switch (soc_type) {
1792 case QCA_WCN3950:
1793 case QCA_WCN3988:
1794 case QCA_WCN3990:
1795 case QCA_WCN3991:
1796 case QCA_WCN3998:
1797 /* Forcefully enable wcn399x to enter in to boot mode. */
1798 host_set_baudrate(hu, 2400);
1799 ret = qca_send_power_pulse(hu, false);
1800 if (ret)
1801 return ret;
1802 break;
1803
1804 default:
1805 break;
1806 }
1807
1808 /* For wcn6750 need to enable gpio bt_en */
1809 if (qcadev->bt_en) {
1810 gpiod_set_value_cansleep(qcadev->bt_en, 0);
1811 msleep(50);
1812 gpiod_set_value_cansleep(qcadev->bt_en, 1);
1813 msleep(50);
1814 if (qcadev->sw_ctrl) {
1815 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
1816 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
1817 }
1818 }
1819
1820 qca_set_speed(hu, QCA_INIT_SPEED);
1821
1822 switch (soc_type) {
1823 case QCA_WCN3950:
1824 case QCA_WCN3988:
1825 case QCA_WCN3990:
1826 case QCA_WCN3991:
1827 case QCA_WCN3998:
1828 ret = qca_send_power_pulse(hu, true);
1829 if (ret)
1830 return ret;
1831 break;
1832
1833 default:
1834 break;
1835 }
1836
1837 return qca_port_reopen(hu);
1838 }
1839
qca_power_on(struct hci_dev * hdev)1840 static int qca_power_on(struct hci_dev *hdev)
1841 {
1842 struct hci_uart *hu = hci_get_drvdata(hdev);
1843 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1844 struct qca_serdev *qcadev;
1845 struct qca_data *qca = hu->priv;
1846 int ret = 0;
1847
1848 /* Non-serdev device usually is powered by external power
1849 * and don't need additional action in driver for power on
1850 */
1851 if (!hu->serdev)
1852 return 0;
1853
1854 switch (soc_type) {
1855 case QCA_QCA6390:
1856 case QCA_WCN3950:
1857 case QCA_WCN3988:
1858 case QCA_WCN3990:
1859 case QCA_WCN3991:
1860 case QCA_WCN3998:
1861 case QCA_WCN6750:
1862 case QCA_WCN6855:
1863 case QCA_WCN7850:
1864 ret = qca_regulator_init(hu);
1865 break;
1866
1867 default:
1868 qcadev = serdev_device_get_drvdata(hu->serdev);
1869 if (qcadev->bt_en) {
1870 gpiod_set_value_cansleep(qcadev->bt_en, 1);
1871 /* Controller needs time to bootup. */
1872 msleep(150);
1873 }
1874 }
1875
1876 clear_bit(QCA_BT_OFF, &qca->flags);
1877 return ret;
1878 }
1879
hci_coredump_qca(struct hci_dev * hdev)1880 static void hci_coredump_qca(struct hci_dev *hdev)
1881 {
1882 int err;
1883 static const u8 param[] = { 0x26 };
1884
1885 err = __hci_cmd_send(hdev, 0xfc0c, 1, param);
1886 if (err < 0)
1887 bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err);
1888 }
1889
qca_get_data_path_id(struct hci_dev * hdev,__u8 * data_path_id)1890 static int qca_get_data_path_id(struct hci_dev *hdev, __u8 *data_path_id)
1891 {
1892 /* QCA uses 1 as non-HCI data path id for HFP */
1893 *data_path_id = 1;
1894 return 0;
1895 }
1896
qca_configure_hfp_offload(struct hci_dev * hdev)1897 static int qca_configure_hfp_offload(struct hci_dev *hdev)
1898 {
1899 bt_dev_info(hdev, "HFP non-HCI data transport is supported");
1900 hdev->get_data_path_id = qca_get_data_path_id;
1901 /* Do not need to send HCI_Configure_Data_Path to configure non-HCI
1902 * data transport path for QCA controllers, so set below field as NULL.
1903 */
1904 hdev->get_codec_config_data = NULL;
1905 return 0;
1906 }
1907
qca_setup(struct hci_uart * hu)1908 static int qca_setup(struct hci_uart *hu)
1909 {
1910 struct hci_dev *hdev = hu->hdev;
1911 struct qca_data *qca = hu->priv;
1912 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1913 unsigned int retries = 0;
1914 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1915 const char *firmware_name = qca_get_firmware_name(hu);
1916 const char *rampatch_name = qca_get_rampatch_name(hu);
1917 int ret;
1918 struct qca_btsoc_version ver;
1919 struct qca_serdev *qcadev = serdev_device_get_drvdata(hu->serdev);
1920 const char *soc_name;
1921
1922 ret = qca_check_speeds(hu);
1923 if (ret)
1924 return ret;
1925
1926 clear_bit(QCA_ROM_FW, &qca->flags);
1927 /* Patch downloading has to be done without IBS mode */
1928 set_bit(QCA_IBS_DISABLED, &qca->flags);
1929
1930 /* Enable controller to do both LE scan and BR/EDR inquiry
1931 * simultaneously.
1932 */
1933 hci_set_quirk(hdev, HCI_QUIRK_SIMULTANEOUS_DISCOVERY);
1934
1935 switch (soc_type) {
1936 case QCA_QCA2066:
1937 soc_name = "qca2066";
1938 break;
1939
1940 case QCA_WCN3950:
1941 case QCA_WCN3988:
1942 case QCA_WCN3990:
1943 case QCA_WCN3991:
1944 case QCA_WCN3998:
1945 soc_name = "wcn399x";
1946 break;
1947
1948 case QCA_WCN6750:
1949 soc_name = "wcn6750";
1950 break;
1951
1952 case QCA_WCN6855:
1953 soc_name = "wcn6855";
1954 break;
1955
1956 case QCA_WCN7850:
1957 soc_name = "wcn7850";
1958 break;
1959
1960 default:
1961 soc_name = "ROME/QCA6390";
1962 }
1963 bt_dev_info(hdev, "setting up %s", soc_name);
1964
1965 qca->memdump_state = QCA_MEMDUMP_IDLE;
1966
1967 retry:
1968 ret = qca_power_on(hdev);
1969 if (ret)
1970 goto out;
1971
1972 clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
1973
1974 switch (soc_type) {
1975 case QCA_WCN3950:
1976 case QCA_WCN3988:
1977 case QCA_WCN3990:
1978 case QCA_WCN3991:
1979 case QCA_WCN3998:
1980 case QCA_WCN6750:
1981 case QCA_WCN6855:
1982 case QCA_WCN7850:
1983 if (qcadev->bdaddr_property_broken)
1984 hci_set_quirk(hdev, HCI_QUIRK_BDADDR_PROPERTY_BROKEN);
1985
1986 hci_set_aosp_capable(hdev);
1987
1988 ret = qca_read_soc_version(hdev, &ver, soc_type);
1989 if (ret)
1990 goto out;
1991 break;
1992
1993 default:
1994 qca_set_speed(hu, QCA_INIT_SPEED);
1995 }
1996
1997 /* Setup user speed if needed */
1998 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1999 if (speed) {
2000 ret = qca_set_speed(hu, QCA_OPER_SPEED);
2001 if (ret)
2002 goto out;
2003
2004 qca_baudrate = qca_get_baudrate_value(speed);
2005 }
2006
2007 switch (soc_type) {
2008 case QCA_WCN3950:
2009 case QCA_WCN3988:
2010 case QCA_WCN3990:
2011 case QCA_WCN3991:
2012 case QCA_WCN3998:
2013 case QCA_WCN6750:
2014 case QCA_WCN6855:
2015 case QCA_WCN7850:
2016 break;
2017
2018 default:
2019 /* Get QCA version information */
2020 ret = qca_read_soc_version(hdev, &ver, soc_type);
2021 if (ret)
2022 goto out;
2023 }
2024
2025 /* Setup patch / NVM configurations */
2026 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver,
2027 firmware_name, rampatch_name);
2028 if (!ret) {
2029 clear_bit(QCA_IBS_DISABLED, &qca->flags);
2030 qca_debugfs_init(hdev);
2031 hu->hdev->hw_error = qca_hw_error;
2032 hu->hdev->reset = qca_reset;
2033 if (hu->serdev) {
2034 if (device_can_wakeup(hu->serdev->ctrl->dev.parent))
2035 hu->hdev->wakeup = qca_wakeup;
2036 }
2037 } else if (ret == -ENOENT) {
2038 /* No patch/nvm-config found, run with original fw/config */
2039 set_bit(QCA_ROM_FW, &qca->flags);
2040 ret = 0;
2041 } else if (ret == -EAGAIN) {
2042 /*
2043 * Userspace firmware loader will return -EAGAIN in case no
2044 * patch/nvm-config is found, so run with original fw/config.
2045 */
2046 set_bit(QCA_ROM_FW, &qca->flags);
2047 ret = 0;
2048 }
2049
2050 out:
2051 if (ret) {
2052 qca_power_off(hu);
2053
2054 if (retries < MAX_INIT_RETRIES) {
2055 bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
2056 if (hu->serdev) {
2057 serdev_device_close(hu->serdev);
2058 ret = serdev_device_open(hu->serdev);
2059 if (ret) {
2060 bt_dev_err(hdev, "failed to open port");
2061 return ret;
2062 }
2063 }
2064 retries++;
2065 goto retry;
2066 }
2067 return ret;
2068 }
2069
2070 /* Setup bdaddr */
2071 if (soc_type == QCA_ROME)
2072 hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
2073 else
2074 hu->hdev->set_bdaddr = qca_set_bdaddr;
2075
2076 if (qcadev->support_hfp_hw_offload)
2077 qca_configure_hfp_offload(hdev);
2078
2079 qca->fw_version = le16_to_cpu(ver.patch_ver);
2080 qca->controller_id = le16_to_cpu(ver.rom_ver);
2081 hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL);
2082
2083 return ret;
2084 }
2085
2086 static const struct hci_uart_proto qca_proto = {
2087 .id = HCI_UART_QCA,
2088 .name = "QCA",
2089 .manufacturer = 29,
2090 .init_speed = 115200,
2091 .oper_speed = 3000000,
2092 .open = qca_open,
2093 .close = qca_close,
2094 .flush = qca_flush,
2095 .setup = qca_setup,
2096 .recv = qca_recv,
2097 .enqueue = qca_enqueue,
2098 .dequeue = qca_dequeue,
2099 };
2100
2101 static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = {
2102 .soc_type = QCA_QCA2066,
2103 .num_vregs = 0,
2104 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES |
2105 QCA_CAP_HFP_HW_OFFLOAD,
2106 };
2107
2108 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = {
2109 .soc_type = QCA_QCA6390,
2110 .num_vregs = 0,
2111 };
2112
2113 static const struct qca_device_data qca_soc_data_wcn3950 __maybe_unused = {
2114 .soc_type = QCA_WCN3950,
2115 .vregs = (struct qca_vreg []) {
2116 { "vddio", 15000 },
2117 { "vddxo", 60000 },
2118 { "vddrf", 155000 },
2119 { "vddch0", 585000 },
2120 },
2121 .num_vregs = 4,
2122 };
2123
2124 static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = {
2125 .soc_type = QCA_WCN3988,
2126 .vregs = (struct qca_vreg []) {
2127 { "vddio", 15000 },
2128 { "vddxo", 80000 },
2129 { "vddrf", 300000 },
2130 { "vddch0", 450000 },
2131 },
2132 .num_vregs = 4,
2133 };
2134
2135 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = {
2136 .soc_type = QCA_WCN3990,
2137 .vregs = (struct qca_vreg []) {
2138 { "vddio", 15000 },
2139 { "vddxo", 80000 },
2140 { "vddrf", 300000 },
2141 { "vddch0", 450000 },
2142 },
2143 .num_vregs = 4,
2144 };
2145
2146 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = {
2147 .soc_type = QCA_WCN3991,
2148 .vregs = (struct qca_vreg []) {
2149 { "vddio", 15000 },
2150 { "vddxo", 80000 },
2151 { "vddrf", 300000 },
2152 { "vddch0", 450000 },
2153 },
2154 .num_vregs = 4,
2155 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2156 };
2157
2158 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = {
2159 .soc_type = QCA_WCN3998,
2160 .vregs = (struct qca_vreg []) {
2161 { "vddio", 10000 },
2162 { "vddxo", 80000 },
2163 { "vddrf", 300000 },
2164 { "vddch0", 450000 },
2165 },
2166 .num_vregs = 4,
2167 };
2168
2169 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = {
2170 .soc_type = QCA_WCN6750,
2171 .vregs = (struct qca_vreg []) {
2172 { "vddio", 5000 },
2173 { "vddaon", 26000 },
2174 { "vddbtcxmx", 126000 },
2175 { "vddrfacmn", 12500 },
2176 { "vddrfa0p8", 102000 },
2177 { "vddrfa1p7", 302000 },
2178 { "vddrfa1p2", 257000 },
2179 { "vddrfa2p2", 1700000 },
2180 { "vddasd", 200 },
2181 },
2182 .num_vregs = 9,
2183 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2184 };
2185
2186 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = {
2187 .soc_type = QCA_WCN6855,
2188 .vregs = (struct qca_vreg []) {
2189 { "vddio", 5000 },
2190 { "vddbtcxmx", 126000 },
2191 { "vddrfacmn", 12500 },
2192 { "vddrfa0p8", 102000 },
2193 { "vddrfa1p7", 302000 },
2194 { "vddrfa1p2", 257000 },
2195 },
2196 .num_vregs = 6,
2197 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES |
2198 QCA_CAP_HFP_HW_OFFLOAD,
2199 };
2200
2201 static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = {
2202 .soc_type = QCA_WCN7850,
2203 .vregs = (struct qca_vreg []) {
2204 { "vddio", 5000 },
2205 { "vddaon", 26000 },
2206 { "vdddig", 126000 },
2207 { "vddrfa0p8", 102000 },
2208 { "vddrfa1p2", 257000 },
2209 { "vddrfa1p9", 302000 },
2210 },
2211 .num_vregs = 6,
2212 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES |
2213 QCA_CAP_HFP_HW_OFFLOAD,
2214 };
2215
qca_power_off(struct hci_uart * hu)2216 static void qca_power_off(struct hci_uart *hu)
2217 {
2218 struct qca_serdev *qcadev;
2219 struct qca_data *qca = hu->priv;
2220 unsigned long flags;
2221 enum qca_btsoc_type soc_type = qca_soc_type(hu);
2222 bool sw_ctrl_state;
2223 struct qca_power *power;
2224
2225 /* From this point we go into power off state. But serial port is
2226 * still open, stop queueing the IBS data and flush all the buffered
2227 * data in skb's.
2228 */
2229 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
2230 set_bit(QCA_IBS_DISABLED, &qca->flags);
2231 qca_flush(hu);
2232 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2233
2234 /* Non-serdev device usually is powered by external power
2235 * and don't need additional action in driver for power down
2236 */
2237 if (!hu->serdev)
2238 return;
2239
2240 qcadev = serdev_device_get_drvdata(hu->serdev);
2241 power = qcadev->bt_power;
2242
2243 switch (soc_type) {
2244 case QCA_WCN3988:
2245 case QCA_WCN3990:
2246 case QCA_WCN3991:
2247 case QCA_WCN3998:
2248 host_set_baudrate(hu, 2400);
2249 qca_send_power_pulse(hu, false);
2250 break;
2251 default:
2252 break;
2253 }
2254
2255 if (power && power->pwrseq) {
2256 pwrseq_power_off(power->pwrseq);
2257 set_bit(QCA_BT_OFF, &qca->flags);
2258 return;
2259 }
2260
2261 switch (soc_type) {
2262 case QCA_WCN3988:
2263 case QCA_WCN3990:
2264 case QCA_WCN3991:
2265 case QCA_WCN3998:
2266 qca_regulator_disable(qcadev);
2267 break;
2268
2269 case QCA_WCN6750:
2270 case QCA_WCN6855:
2271 gpiod_set_value_cansleep(qcadev->bt_en, 0);
2272 msleep(100);
2273 qca_regulator_disable(qcadev);
2274 if (qcadev->sw_ctrl) {
2275 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
2276 BT_DBG("SW_CTRL is %d", sw_ctrl_state);
2277 }
2278 break;
2279
2280 default:
2281 gpiod_set_value_cansleep(qcadev->bt_en, 0);
2282 }
2283
2284 set_bit(QCA_BT_OFF, &qca->flags);
2285 }
2286
qca_hci_shutdown(struct hci_dev * hdev)2287 static int qca_hci_shutdown(struct hci_dev *hdev)
2288 {
2289 struct hci_uart *hu = hci_get_drvdata(hdev);
2290 struct qca_data *qca = hu->priv;
2291 enum qca_btsoc_type soc_type = qca_soc_type(hu);
2292
2293 hu->hdev->hw_error = NULL;
2294 hu->hdev->reset = NULL;
2295
2296 timer_delete_sync(&qca->wake_retrans_timer);
2297 timer_delete_sync(&qca->tx_idle_timer);
2298
2299 /* Stop sending shutdown command if soc crashes. */
2300 if (soc_type != QCA_ROME
2301 && qca->memdump_state == QCA_MEMDUMP_IDLE) {
2302 qca_send_pre_shutdown_cmd(hdev);
2303 usleep_range(8000, 10000);
2304 }
2305
2306 qca_power_off(hu);
2307 return 0;
2308 }
2309
qca_regulator_enable(struct qca_serdev * qcadev)2310 static int qca_regulator_enable(struct qca_serdev *qcadev)
2311 {
2312 struct qca_power *power = qcadev->bt_power;
2313 int ret;
2314
2315 if (power->pwrseq)
2316 return pwrseq_power_on(power->pwrseq);
2317
2318 /* Already enabled */
2319 if (power->vregs_on)
2320 return 0;
2321
2322 BT_DBG("enabling %d regulators)", power->num_vregs);
2323
2324 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
2325 if (ret)
2326 return ret;
2327
2328 power->vregs_on = true;
2329
2330 ret = clk_prepare_enable(qcadev->susclk);
2331 if (ret)
2332 qca_regulator_disable(qcadev);
2333
2334 return ret;
2335 }
2336
qca_regulator_disable(struct qca_serdev * qcadev)2337 static void qca_regulator_disable(struct qca_serdev *qcadev)
2338 {
2339 struct qca_power *power;
2340
2341 if (!qcadev)
2342 return;
2343
2344 power = qcadev->bt_power;
2345
2346 /* Already disabled? */
2347 if (!power->vregs_on)
2348 return;
2349
2350 regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
2351 power->vregs_on = false;
2352
2353 clk_disable_unprepare(qcadev->susclk);
2354 }
2355
qca_init_regulators(struct qca_power * qca,const struct qca_vreg * vregs,size_t num_vregs)2356 static int qca_init_regulators(struct qca_power *qca,
2357 const struct qca_vreg *vregs, size_t num_vregs)
2358 {
2359 struct regulator_bulk_data *bulk;
2360 int ret;
2361 int i;
2362
2363 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
2364 if (!bulk)
2365 return -ENOMEM;
2366
2367 for (i = 0; i < num_vregs; i++)
2368 bulk[i].supply = vregs[i].name;
2369
2370 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
2371 if (ret < 0)
2372 return ret;
2373
2374 for (i = 0; i < num_vregs; i++) {
2375 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
2376 if (ret)
2377 return ret;
2378 }
2379
2380 qca->vreg_bulk = bulk;
2381 qca->num_vregs = num_vregs;
2382
2383 return 0;
2384 }
2385
qca_serdev_probe(struct serdev_device * serdev)2386 static int qca_serdev_probe(struct serdev_device *serdev)
2387 {
2388 struct qca_serdev *qcadev;
2389 struct hci_dev *hdev;
2390 const struct qca_device_data *data;
2391 int err;
2392 bool power_ctrl_enabled = true;
2393
2394 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
2395 if (!qcadev)
2396 return -ENOMEM;
2397
2398 qcadev->serdev_hu.serdev = serdev;
2399 data = device_get_match_data(&serdev->dev);
2400 serdev_device_set_drvdata(serdev, qcadev);
2401 device_property_read_string_array(&serdev->dev, "firmware-name",
2402 qcadev->firmware_name, ARRAY_SIZE(qcadev->firmware_name));
2403 device_property_read_u32(&serdev->dev, "max-speed",
2404 &qcadev->oper_speed);
2405 if (!qcadev->oper_speed)
2406 BT_DBG("UART will pick default operating speed");
2407
2408 qcadev->bdaddr_property_broken = device_property_read_bool(&serdev->dev,
2409 "qcom,local-bd-address-broken");
2410
2411 if (data)
2412 qcadev->btsoc_type = data->soc_type;
2413 else
2414 qcadev->btsoc_type = QCA_ROME;
2415
2416 switch (qcadev->btsoc_type) {
2417 case QCA_QCA6390:
2418 case QCA_WCN3950:
2419 case QCA_WCN3988:
2420 case QCA_WCN3990:
2421 case QCA_WCN3991:
2422 case QCA_WCN3998:
2423 case QCA_WCN6750:
2424 case QCA_WCN6855:
2425 case QCA_WCN7850:
2426 qcadev->bt_power = devm_kzalloc(&serdev->dev,
2427 sizeof(struct qca_power),
2428 GFP_KERNEL);
2429 if (!qcadev->bt_power)
2430 return -ENOMEM;
2431 break;
2432 default:
2433 break;
2434 }
2435
2436 switch (qcadev->btsoc_type) {
2437 case QCA_WCN3950:
2438 case QCA_WCN3988:
2439 case QCA_WCN3990:
2440 case QCA_WCN3991:
2441 case QCA_WCN3998:
2442 case QCA_WCN6750:
2443 case QCA_WCN6855:
2444 case QCA_WCN7850:
2445 if (!device_property_present(&serdev->dev, "enable-gpios")) {
2446 /*
2447 * Backward compatibility with old DT sources. If the
2448 * node doesn't have the 'enable-gpios' property then
2449 * let's use the power sequencer. Otherwise, let's
2450 * drive everything ourselves.
2451 */
2452 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev,
2453 "bluetooth");
2454
2455 /*
2456 * Some modules have BT_EN enabled via a hardware pull-up,
2457 * meaning it is not defined in the DTS and is not controlled
2458 * through the power sequence. In such cases, fall through
2459 * to follow the legacy flow.
2460 */
2461 if (IS_ERR(qcadev->bt_power->pwrseq))
2462 qcadev->bt_power->pwrseq = NULL;
2463 else
2464 break;
2465 }
2466
2467 qcadev->bt_power->dev = &serdev->dev;
2468 err = qca_init_regulators(qcadev->bt_power, data->vregs,
2469 data->num_vregs);
2470 if (err) {
2471 BT_ERR("Failed to init regulators:%d", err);
2472 return err;
2473 }
2474
2475 qcadev->bt_power->vregs_on = false;
2476
2477 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2478 GPIOD_OUT_LOW);
2479 if (IS_ERR(qcadev->bt_en))
2480 return dev_err_probe(&serdev->dev,
2481 PTR_ERR(qcadev->bt_en),
2482 "failed to acquire BT_EN gpio\n");
2483
2484 if (!qcadev->bt_en &&
2485 (data->soc_type == QCA_WCN6750 ||
2486 data->soc_type == QCA_WCN6855 ||
2487 data->soc_type == QCA_WCN7850))
2488 power_ctrl_enabled = false;
2489
2490 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl",
2491 GPIOD_IN);
2492 if (IS_ERR(qcadev->sw_ctrl) &&
2493 (data->soc_type == QCA_WCN6750 ||
2494 data->soc_type == QCA_WCN6855 ||
2495 data->soc_type == QCA_WCN7850)) {
2496 dev_err(&serdev->dev, "failed to acquire SW_CTRL gpio\n");
2497 return PTR_ERR(qcadev->sw_ctrl);
2498 }
2499
2500 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2501 if (IS_ERR(qcadev->susclk)) {
2502 dev_err(&serdev->dev, "failed to acquire clk\n");
2503 return PTR_ERR(qcadev->susclk);
2504 }
2505 break;
2506
2507 case QCA_QCA6390:
2508 if (dev_of_node(&serdev->dev)) {
2509 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev,
2510 "bluetooth");
2511 if (IS_ERR(qcadev->bt_power->pwrseq))
2512 return PTR_ERR(qcadev->bt_power->pwrseq);
2513 break;
2514 }
2515 fallthrough;
2516
2517 default:
2518 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2519 GPIOD_OUT_LOW);
2520 if (IS_ERR(qcadev->bt_en)) {
2521 dev_err(&serdev->dev, "failed to acquire enable gpio\n");
2522 return PTR_ERR(qcadev->bt_en);
2523 }
2524
2525 if (!qcadev->bt_en)
2526 power_ctrl_enabled = false;
2527
2528 qcadev->susclk = devm_clk_get_optional_enabled_with_rate(
2529 &serdev->dev, NULL, SUSCLK_RATE_32KHZ);
2530 if (IS_ERR(qcadev->susclk)) {
2531 dev_warn(&serdev->dev, "failed to acquire clk\n");
2532 return PTR_ERR(qcadev->susclk);
2533 }
2534 }
2535
2536 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2537 if (err) {
2538 BT_ERR("serdev registration failed");
2539 return err;
2540 }
2541
2542 hdev = qcadev->serdev_hu.hdev;
2543
2544 if (power_ctrl_enabled) {
2545 hci_set_quirk(hdev, HCI_QUIRK_NON_PERSISTENT_SETUP);
2546 hdev->shutdown = qca_hci_shutdown;
2547 }
2548
2549 if (data) {
2550 /* Wideband speech support must be set per driver since it can't
2551 * be queried via hci. Same with the valid le states quirk.
2552 */
2553 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
2554 hci_set_quirk(hdev,
2555 HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED);
2556
2557 if (!(data->capabilities & QCA_CAP_VALID_LE_STATES))
2558 hci_set_quirk(hdev, HCI_QUIRK_BROKEN_LE_STATES);
2559
2560 if (data->capabilities & QCA_CAP_HFP_HW_OFFLOAD)
2561 qcadev->support_hfp_hw_offload = true;
2562 }
2563
2564 return 0;
2565 }
2566
qca_serdev_remove(struct serdev_device * serdev)2567 static void qca_serdev_remove(struct serdev_device *serdev)
2568 {
2569 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2570 struct qca_power *power = qcadev->bt_power;
2571
2572 switch (qcadev->btsoc_type) {
2573 case QCA_WCN3988:
2574 case QCA_WCN3990:
2575 case QCA_WCN3991:
2576 case QCA_WCN3998:
2577 case QCA_WCN6750:
2578 case QCA_WCN6855:
2579 case QCA_WCN7850:
2580 if (power->vregs_on)
2581 qca_power_off(&qcadev->serdev_hu);
2582 break;
2583 default:
2584 break;
2585 }
2586
2587 hci_uart_unregister_device(&qcadev->serdev_hu);
2588 }
2589
qca_serdev_shutdown(struct serdev_device * serdev)2590 static void qca_serdev_shutdown(struct serdev_device *serdev)
2591 {
2592 int ret;
2593 int timeout = CMD_TRANS_TIMEOUT;
2594 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2595 struct hci_uart *hu = &qcadev->serdev_hu;
2596 struct hci_dev *hdev = hu->hdev;
2597 const u8 ibs_wake_cmd[] = { 0xFD };
2598 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
2599
2600 if (qcadev->btsoc_type == QCA_QCA6390) {
2601 /* The purpose of sending the VSC is to reset SOC into a initial
2602 * state and the state will ensure next hdev->setup() success.
2603 * if HCI_QUIRK_NON_PERSISTENT_SETUP is set, it means that
2604 * hdev->setup() can do its job regardless of SoC state, so
2605 * don't need to send the VSC.
2606 * if HCI_SETUP is set, it means that hdev->setup() was never
2607 * invoked and the SOC is already in the initial state, so
2608 * don't also need to send the VSC.
2609 */
2610 if (hci_test_quirk(hdev, HCI_QUIRK_NON_PERSISTENT_SETUP) ||
2611 hci_dev_test_flag(hdev, HCI_SETUP))
2612 return;
2613
2614 /* The serdev must be in open state when control logic arrives
2615 * here, so also fix the use-after-free issue caused by that
2616 * the serdev is flushed or wrote after it is closed.
2617 */
2618 serdev_device_write_flush(serdev);
2619 ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
2620 sizeof(ibs_wake_cmd));
2621 if (ret < 0) {
2622 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
2623 return;
2624 }
2625 serdev_device_wait_until_sent(serdev, timeout);
2626 usleep_range(8000, 10000);
2627
2628 serdev_device_write_flush(serdev);
2629 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
2630 sizeof(edl_reset_soc_cmd));
2631 if (ret < 0) {
2632 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
2633 return;
2634 }
2635 serdev_device_wait_until_sent(serdev, timeout);
2636 usleep_range(8000, 10000);
2637 }
2638 }
2639
qca_suspend(struct device * dev)2640 static int __maybe_unused qca_suspend(struct device *dev)
2641 {
2642 struct serdev_device *serdev = to_serdev_device(dev);
2643 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2644 struct hci_uart *hu = &qcadev->serdev_hu;
2645 struct qca_data *qca = hu->priv;
2646 unsigned long flags;
2647 bool tx_pending = false;
2648 int ret = 0;
2649 u8 cmd;
2650 unsigned long wait_timeout = 0;
2651
2652 set_bit(QCA_SUSPENDING, &qca->flags);
2653
2654 /* if BT SoC is running with default firmware then it does not
2655 * support in-band sleep
2656 */
2657 if (test_bit(QCA_ROM_FW, &qca->flags))
2658 return 0;
2659
2660 /* During SSR after memory dump collection, controller will be
2661 * powered off and then powered on.If controller is powered off
2662 * during SSR then we should wait until SSR is completed.
2663 */
2664 if (test_bit(QCA_BT_OFF, &qca->flags) &&
2665 !test_bit(QCA_SSR_TRIGGERED, &qca->flags))
2666 return 0;
2667
2668 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
2669 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
2670 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
2671 IBS_DISABLE_SSR_TIMEOUT :
2672 FW_DOWNLOAD_TIMEOUT;
2673
2674 /* QCA_IBS_DISABLED flag is set to true, During FW download
2675 * and during memory dump collection. It is reset to false,
2676 * After FW download complete.
2677 */
2678 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED,
2679 TASK_UNINTERRUPTIBLE, wait_timeout);
2680
2681 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
2682 bt_dev_err(hu->hdev, "SSR or FW download time out");
2683 ret = -ETIMEDOUT;
2684 goto error;
2685 }
2686 }
2687
2688 cancel_work_sync(&qca->ws_awake_device);
2689 cancel_work_sync(&qca->ws_awake_rx);
2690
2691 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
2692 flags, SINGLE_DEPTH_NESTING);
2693
2694 switch (qca->tx_ibs_state) {
2695 case HCI_IBS_TX_WAKING:
2696 timer_delete(&qca->wake_retrans_timer);
2697 fallthrough;
2698 case HCI_IBS_TX_AWAKE:
2699 timer_delete(&qca->tx_idle_timer);
2700
2701 serdev_device_write_flush(hu->serdev);
2702 cmd = HCI_IBS_SLEEP_IND;
2703 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
2704
2705 if (ret < 0) {
2706 BT_ERR("Failed to send SLEEP to device");
2707 break;
2708 }
2709
2710 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
2711 qca->ibs_sent_slps++;
2712 tx_pending = true;
2713 break;
2714
2715 case HCI_IBS_TX_ASLEEP:
2716 break;
2717
2718 default:
2719 BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
2720 ret = -EINVAL;
2721 break;
2722 }
2723
2724 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2725
2726 if (ret < 0)
2727 goto error;
2728
2729 if (tx_pending) {
2730 serdev_device_wait_until_sent(hu->serdev,
2731 CMD_TRANS_TIMEOUT);
2732 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
2733 }
2734
2735 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
2736 * to sleep, so that the packet does not wake the system later.
2737 */
2738 ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
2739 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
2740 IBS_BTSOC_TX_IDLE_TIMEOUT);
2741 if (ret == 0) {
2742 ret = -ETIMEDOUT;
2743 goto error;
2744 }
2745
2746 return 0;
2747
2748 error:
2749 clear_bit(QCA_SUSPENDING, &qca->flags);
2750
2751 return ret;
2752 }
2753
qca_resume(struct device * dev)2754 static int __maybe_unused qca_resume(struct device *dev)
2755 {
2756 struct serdev_device *serdev = to_serdev_device(dev);
2757 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2758 struct hci_uart *hu = &qcadev->serdev_hu;
2759 struct qca_data *qca = hu->priv;
2760
2761 clear_bit(QCA_SUSPENDING, &qca->flags);
2762
2763 return 0;
2764 }
2765
2766 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
2767
2768 #ifdef CONFIG_OF
2769 static const struct of_device_id qca_bluetooth_of_match[] = {
2770 { .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066},
2771 { .compatible = "qcom,qca6174-bt" },
2772 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
2773 { .compatible = "qcom,qca9377-bt" },
2774 { .compatible = "qcom,wcn3950-bt", .data = &qca_soc_data_wcn3950},
2775 { .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988},
2776 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
2777 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
2778 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
2779 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750},
2780 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855},
2781 { .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850},
2782 { /* sentinel */ }
2783 };
2784 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
2785 #endif
2786
2787 #ifdef CONFIG_ACPI
2788 static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
2789 { "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 },
2790 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2791 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2792 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2793 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2794 { },
2795 };
2796 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
2797 #endif
2798
2799 #ifdef CONFIG_DEV_COREDUMP
hciqca_coredump(struct device * dev)2800 static void hciqca_coredump(struct device *dev)
2801 {
2802 struct serdev_device *serdev = to_serdev_device(dev);
2803 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2804 struct hci_uart *hu = &qcadev->serdev_hu;
2805 struct hci_dev *hdev = hu->hdev;
2806
2807 if (hdev->dump.coredump)
2808 hdev->dump.coredump(hdev);
2809 }
2810 #endif
2811
2812 static struct serdev_device_driver qca_serdev_driver = {
2813 .probe = qca_serdev_probe,
2814 .remove = qca_serdev_remove,
2815 .shutdown = qca_serdev_shutdown,
2816 .driver = {
2817 .name = "hci_uart_qca",
2818 .of_match_table = of_match_ptr(qca_bluetooth_of_match),
2819 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
2820 .pm = &qca_pm_ops,
2821 #ifdef CONFIG_DEV_COREDUMP
2822 .coredump = hciqca_coredump,
2823 #endif
2824 },
2825 };
2826
qca_init(void)2827 int __init qca_init(void)
2828 {
2829 serdev_device_driver_register(&qca_serdev_driver);
2830
2831 return hci_uart_register_proto(&qca_proto);
2832 }
2833
qca_deinit(void)2834 int __exit qca_deinit(void)
2835 {
2836 serdev_device_driver_unregister(&qca_serdev_driver);
2837
2838 return hci_uart_unregister_proto(&qca_proto);
2839 }
2840