1 // SPDX-License-Identifier: GPL-2.0
2 /* Microchip KSZ PTP Implementation
3 *
4 * Copyright (C) 2020 ARRI Lighting
5 * Copyright (C) 2022 Microchip Technology Inc.
6 */
7
8 #include <linux/dsa/ksz_common.h>
9 #include <linux/irq.h>
10 #include <linux/irqdomain.h>
11 #include <linux/kernel.h>
12 #include <linux/ptp_classify.h>
13 #include <linux/ptp_clock_kernel.h>
14
15 #include "ksz_common.h"
16 #include "ksz_ptp.h"
17 #include "ksz_ptp_reg.h"
18
19 #define ptp_caps_to_data(d) container_of((d), struct ksz_ptp_data, caps)
20 #define ptp_data_to_ksz_dev(d) container_of((d), struct ksz_device, ptp_data)
21 #define work_to_xmit_work(w) \
22 container_of((w), struct ksz_deferred_xmit_work, work)
23
24 /* Sub-nanoseconds-adj,max * sub-nanoseconds / 40ns * 1ns
25 * = (2^30-1) * (2 ^ 32) / 40 ns * 1 ns = 6249999
26 */
27 #define KSZ_MAX_DRIFT_CORR 6249999
28 #define KSZ_MAX_PULSE_WIDTH 125000000LL
29
30 #define KSZ_PTP_INC_NS 40ULL /* HW clock is incremented every 40 ns (by 40) */
31 #define KSZ_PTP_SUBNS_BITS 32
32
33 #define KSZ_PTP_INT_START 13
34
35 /*
36 * PTP interrupt bit is the bit 12 of the 16-bits ISR/IER. But ksz_common.c only
37 * accesses the high-byte of these registers so the PTP interrupt bit becomes 4.
38 */
39 #define KSZ8463_SRC_PTP_INT 4
40 #define KSZ8463_PTP_PORT1_INT_START 12
41 #define KSZ8463_PTP_PORT2_INT_START 14
42 #define KSZ8463_PTP_INT_START KSZ8463_PTP_PORT1_INT_START
43
ksz_ptp_tou_gpio(struct ksz_device * dev)44 static int ksz_ptp_tou_gpio(struct ksz_device *dev)
45 {
46 int ret;
47
48 if (!is_lan937x(dev))
49 return 0;
50
51 ret = ksz_rmw32(dev, REG_PTP_CTRL_STAT__4, GPIO_OUT,
52 GPIO_OUT);
53 if (ret)
54 return ret;
55
56 ret = ksz_rmw32(dev, REG_SW_GLOBAL_LED_OVR__4, LED_OVR_1 | LED_OVR_2,
57 LED_OVR_1 | LED_OVR_2);
58 if (ret)
59 return ret;
60
61 return ksz_rmw32(dev, REG_SW_GLOBAL_LED_SRC__4,
62 LED_SRC_PTP_GPIO_1 | LED_SRC_PTP_GPIO_2,
63 LED_SRC_PTP_GPIO_1 | LED_SRC_PTP_GPIO_2);
64 }
65
ksz_ptp_tou_reset(struct ksz_device * dev,u8 unit)66 static int ksz_ptp_tou_reset(struct ksz_device *dev, u8 unit)
67 {
68 u32 data;
69 int ret;
70
71 /* Reset trigger unit (clears TRIGGER_EN, but not GPIOSTATx) */
72 ret = ksz_rmw32(dev, REG_PTP_CTRL_STAT__4, TRIG_RESET, TRIG_RESET);
73
74 data = FIELD_PREP(TRIG_DONE_M, BIT(unit));
75 ret = ksz_write32(dev, REG_PTP_TRIG_STATUS__4, data);
76 if (ret)
77 return ret;
78
79 data = FIELD_PREP(TRIG_INT_M, BIT(unit));
80 ret = ksz_write32(dev, REG_PTP_INT_STATUS__4, data);
81 if (ret)
82 return ret;
83
84 /* Clear reset and set GPIO direction */
85 return ksz_rmw32(dev, REG_PTP_CTRL_STAT__4, (TRIG_RESET | TRIG_ENABLE),
86 0);
87 }
88
ksz_ptp_tou_pulse_verify(u64 pulse_ns)89 static int ksz_ptp_tou_pulse_verify(u64 pulse_ns)
90 {
91 u32 data;
92
93 if (pulse_ns & 0x3)
94 return -EINVAL;
95
96 data = (pulse_ns / 8);
97 if (!FIELD_FIT(TRIG_PULSE_WIDTH_M, data))
98 return -ERANGE;
99
100 return 0;
101 }
102
ksz_ptp_tou_target_time_set(struct ksz_device * dev,struct timespec64 const * ts)103 static int ksz_ptp_tou_target_time_set(struct ksz_device *dev,
104 struct timespec64 const *ts)
105 {
106 int ret;
107
108 /* Hardware has only 32 bit */
109 if ((ts->tv_sec & 0xffffffff) != ts->tv_sec)
110 return -EINVAL;
111
112 ret = ksz_write32(dev, REG_TRIG_TARGET_NANOSEC, ts->tv_nsec);
113 if (ret)
114 return ret;
115
116 ret = ksz_write32(dev, REG_TRIG_TARGET_SEC, ts->tv_sec);
117 if (ret)
118 return ret;
119
120 return 0;
121 }
122
ksz_ptp_tou_start(struct ksz_device * dev,u8 unit)123 static int ksz_ptp_tou_start(struct ksz_device *dev, u8 unit)
124 {
125 u32 data;
126 int ret;
127
128 ret = ksz_rmw32(dev, REG_PTP_CTRL_STAT__4, TRIG_ENABLE, TRIG_ENABLE);
129 if (ret)
130 return ret;
131
132 /* Check error flag:
133 * - the ACTIVE flag is NOT cleared an error!
134 */
135 ret = ksz_read32(dev, REG_PTP_TRIG_STATUS__4, &data);
136 if (ret)
137 return ret;
138
139 if (FIELD_GET(TRIG_ERROR_M, data) & (1 << unit)) {
140 dev_err(dev->dev, "%s: Trigger unit%d error!\n", __func__,
141 unit);
142 ret = -EIO;
143 /* Unit will be reset on next access */
144 return ret;
145 }
146
147 return 0;
148 }
149
ksz_ptp_configure_perout(struct ksz_device * dev,u32 cycle_width_ns,u32 pulse_width_ns,struct timespec64 const * target_time,u8 index)150 static int ksz_ptp_configure_perout(struct ksz_device *dev,
151 u32 cycle_width_ns, u32 pulse_width_ns,
152 struct timespec64 const *target_time,
153 u8 index)
154 {
155 u32 data;
156 int ret;
157
158 data = FIELD_PREP(TRIG_NOTIFY, 1) |
159 FIELD_PREP(TRIG_GPO_M, index) |
160 FIELD_PREP(TRIG_PATTERN_M, TRIG_POS_PERIOD);
161 ret = ksz_write32(dev, REG_TRIG_CTRL__4, data);
162 if (ret)
163 return ret;
164
165 ret = ksz_write32(dev, REG_TRIG_CYCLE_WIDTH, cycle_width_ns);
166 if (ret)
167 return ret;
168
169 /* Set cycle count 0 - Infinite */
170 ret = ksz_rmw32(dev, REG_TRIG_CYCLE_CNT, TRIG_CYCLE_CNT_M, 0);
171 if (ret)
172 return ret;
173
174 data = (pulse_width_ns / 8);
175 ret = ksz_write32(dev, REG_TRIG_PULSE_WIDTH__4, data);
176 if (ret)
177 return ret;
178
179 ret = ksz_ptp_tou_target_time_set(dev, target_time);
180 if (ret)
181 return ret;
182
183 return 0;
184 }
185
ksz_ptp_enable_perout(struct ksz_device * dev,struct ptp_perout_request const * request,int on)186 static int ksz_ptp_enable_perout(struct ksz_device *dev,
187 struct ptp_perout_request const *request,
188 int on)
189 {
190 struct ksz_ptp_data *ptp_data = &dev->ptp_data;
191 u64 req_pulse_width_ns;
192 u64 cycle_width_ns;
193 u64 pulse_width_ns;
194 int pin = 0;
195 u32 data32;
196 int ret;
197
198 if (request->flags & ~PTP_PEROUT_DUTY_CYCLE)
199 return -EOPNOTSUPP;
200
201 if (ptp_data->tou_mode != KSZ_PTP_TOU_PEROUT &&
202 ptp_data->tou_mode != KSZ_PTP_TOU_IDLE)
203 return -EBUSY;
204
205 pin = ptp_find_pin(ptp_data->clock, PTP_PF_PEROUT, request->index);
206 if (pin < 0)
207 return -EINVAL;
208
209 data32 = FIELD_PREP(PTP_GPIO_INDEX, pin) |
210 FIELD_PREP(PTP_TOU_INDEX, request->index);
211 ret = ksz_rmw32(dev, REG_PTP_UNIT_INDEX__4,
212 PTP_GPIO_INDEX | PTP_TOU_INDEX, data32);
213 if (ret)
214 return ret;
215
216 ret = ksz_ptp_tou_reset(dev, request->index);
217 if (ret)
218 return ret;
219
220 if (!on) {
221 ptp_data->tou_mode = KSZ_PTP_TOU_IDLE;
222 return 0;
223 }
224
225 ptp_data->perout_target_time_first.tv_sec = request->start.sec;
226 ptp_data->perout_target_time_first.tv_nsec = request->start.nsec;
227
228 ptp_data->perout_period.tv_sec = request->period.sec;
229 ptp_data->perout_period.tv_nsec = request->period.nsec;
230
231 cycle_width_ns = timespec64_to_ns(&ptp_data->perout_period);
232 if ((cycle_width_ns & TRIG_CYCLE_WIDTH_M) != cycle_width_ns)
233 return -EINVAL;
234
235 if (request->flags & PTP_PEROUT_DUTY_CYCLE) {
236 pulse_width_ns = request->on.sec * NSEC_PER_SEC +
237 request->on.nsec;
238 } else {
239 /* Use a duty cycle of 50%. Maximum pulse width supported by the
240 * hardware is a little bit more than 125 ms.
241 */
242 req_pulse_width_ns = (request->period.sec * NSEC_PER_SEC +
243 request->period.nsec) / 2;
244 pulse_width_ns = min_t(u64, req_pulse_width_ns,
245 KSZ_MAX_PULSE_WIDTH);
246 }
247
248 ret = ksz_ptp_tou_pulse_verify(pulse_width_ns);
249 if (ret)
250 return ret;
251
252 ret = ksz_ptp_configure_perout(dev, cycle_width_ns, pulse_width_ns,
253 &ptp_data->perout_target_time_first,
254 pin);
255 if (ret)
256 return ret;
257
258 ret = ksz_ptp_tou_gpio(dev);
259 if (ret)
260 return ret;
261
262 ret = ksz_ptp_tou_start(dev, request->index);
263 if (ret)
264 return ret;
265
266 ptp_data->tou_mode = KSZ_PTP_TOU_PEROUT;
267
268 return 0;
269 }
270
ksz_ptp_enable_mode(struct ksz_device * dev)271 static int ksz_ptp_enable_mode(struct ksz_device *dev)
272 {
273 struct ksz_tagger_data *tagger_data = ksz_tagger_data(dev->ds);
274 struct ksz_ptp_data *ptp_data = &dev->ptp_data;
275 const u16 *regs = dev->info->regs;
276 struct ksz_port *prt;
277 struct dsa_port *dp;
278 bool tag_en = false;
279
280 dsa_switch_for_each_user_port(dp, dev->ds) {
281 prt = &dev->ports[dp->index];
282 if (prt->hwts_tx_en || prt->hwts_rx_en) {
283 tag_en = true;
284 break;
285 }
286 }
287
288 if (tag_en) {
289 ptp_schedule_worker(ptp_data->clock, 0);
290 } else {
291 ptp_cancel_worker_sync(ptp_data->clock);
292 }
293
294 tagger_data->hwtstamp_set_state(dev->ds, tag_en);
295
296 return ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_ENABLE,
297 tag_en ? PTP_ENABLE : 0);
298 }
299
ksz8463_get_ts_info(struct dsa_switch * ds,int port,struct kernel_ethtool_ts_info * ts)300 int ksz8463_get_ts_info(struct dsa_switch *ds, int port,
301 struct kernel_ethtool_ts_info *ts)
302 {
303 struct ksz_device *dev = ds->priv;
304 struct ksz_ptp_data *ptp_data;
305
306 ptp_data = &dev->ptp_data;
307
308 if (!ptp_data->clock)
309 return -ENODEV;
310
311 ts->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
312 SOF_TIMESTAMPING_RX_HARDWARE |
313 SOF_TIMESTAMPING_RAW_HARDWARE;
314
315 ts->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
316
317 ts->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
318 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
319
320 ts->phc_index = ptp_clock_index(ptp_data->clock);
321
322 return 0;
323 }
324
325 /* The function is return back the capability of timestamping feature when
326 * requested through ethtool -T <interface> utility
327 */
ksz_get_ts_info(struct dsa_switch * ds,int port,struct kernel_ethtool_ts_info * ts)328 int ksz_get_ts_info(struct dsa_switch *ds, int port, struct kernel_ethtool_ts_info *ts)
329 {
330 struct ksz_device *dev = ds->priv;
331 struct ksz_ptp_data *ptp_data;
332
333 ptp_data = &dev->ptp_data;
334
335 if (!ptp_data->clock)
336 return -ENODEV;
337
338 ts->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
339 SOF_TIMESTAMPING_RX_HARDWARE |
340 SOF_TIMESTAMPING_RAW_HARDWARE;
341
342 ts->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ONESTEP_P2P);
343
344 if (is_lan937x(dev))
345 ts->tx_types |= BIT(HWTSTAMP_TX_ON);
346
347 ts->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
348 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
349 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
350 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
351
352 ts->phc_index = ptp_clock_index(ptp_data->clock);
353
354 return 0;
355 }
356
ksz_hwtstamp_get(struct dsa_switch * ds,int port,struct kernel_hwtstamp_config * config)357 int ksz_hwtstamp_get(struct dsa_switch *ds, int port,
358 struct kernel_hwtstamp_config *config)
359 {
360 struct ksz_device *dev = ds->priv;
361 struct ksz_port *prt;
362
363 prt = &dev->ports[port];
364 *config = prt->tstamp_config;
365
366 return 0;
367 }
368
ksz8463_set_hwtstamp_config(struct ksz_device * dev,struct ksz_port * prt,struct kernel_hwtstamp_config * config)369 static int ksz8463_set_hwtstamp_config(struct ksz_device *dev,
370 struct ksz_port *prt,
371 struct kernel_hwtstamp_config *config)
372 {
373 const u16 *regs = dev->info->regs;
374 int ret;
375
376 if (config->flags)
377 return -EINVAL;
378
379 switch (config->tx_type) {
380 case HWTSTAMP_TX_OFF:
381 prt->ptpmsg_irq[KSZ8463_SYNC_MSG].ts_en = false;
382 prt->ptpmsg_irq[KSZ8463_XDREQ_PDRES_MSG].ts_en = false;
383 prt->hwts_tx_en = false;
384 break;
385 case HWTSTAMP_TX_ON:
386 prt->ptpmsg_irq[KSZ8463_SYNC_MSG].ts_en = true;
387 prt->ptpmsg_irq[KSZ8463_XDREQ_PDRES_MSG].ts_en = true;
388 prt->hwts_tx_en = true;
389
390 ret = ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_1STEP, 0);
391 if (ret)
392 return ret;
393
394 break;
395 default:
396 return -ERANGE;
397 }
398
399 switch (config->rx_filter) {
400 case HWTSTAMP_FILTER_NONE:
401 prt->hwts_rx_en = false;
402 break;
403 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
404 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
405 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
406 prt->hwts_rx_en = true;
407 break;
408 default:
409 config->rx_filter = HWTSTAMP_FILTER_NONE;
410 return -ERANGE;
411 }
412
413 return ksz_ptp_enable_mode(dev);
414 }
415
ksz8463_hwtstamp_set(struct dsa_switch * ds,int port,struct kernel_hwtstamp_config * config,struct netlink_ext_ack * extack)416 int ksz8463_hwtstamp_set(struct dsa_switch *ds, int port,
417 struct kernel_hwtstamp_config *config,
418 struct netlink_ext_ack *extack)
419 {
420 struct ksz_device *dev = ds->priv;
421 struct ksz_port *prt;
422 int ret;
423
424 prt = &dev->ports[port];
425
426 ret = ksz8463_set_hwtstamp_config(dev, prt, config);
427 if (ret)
428 return ret;
429
430 prt->tstamp_config = *config;
431
432 return 0;
433 }
434
ksz_set_hwtstamp_config(struct ksz_device * dev,struct ksz_port * prt,struct kernel_hwtstamp_config * config)435 static int ksz_set_hwtstamp_config(struct ksz_device *dev,
436 struct ksz_port *prt,
437 struct kernel_hwtstamp_config *config)
438 {
439 const u16 *regs = dev->info->regs;
440 int ret;
441
442 if (config->flags)
443 return -EINVAL;
444
445 switch (config->tx_type) {
446 case HWTSTAMP_TX_OFF:
447 prt->ptpmsg_irq[KSZ_SYNC_MSG].ts_en = false;
448 prt->ptpmsg_irq[KSZ_XDREQ_MSG].ts_en = false;
449 prt->ptpmsg_irq[KSZ_PDRES_MSG].ts_en = false;
450 prt->hwts_tx_en = false;
451 break;
452 case HWTSTAMP_TX_ONESTEP_P2P:
453 prt->ptpmsg_irq[KSZ_SYNC_MSG].ts_en = false;
454 prt->ptpmsg_irq[KSZ_XDREQ_MSG].ts_en = true;
455 prt->ptpmsg_irq[KSZ_PDRES_MSG].ts_en = false;
456 prt->hwts_tx_en = true;
457
458 ret = ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_1STEP, PTP_1STEP);
459 if (ret)
460 return ret;
461
462 break;
463 case HWTSTAMP_TX_ON:
464 if (!is_lan937x(dev))
465 return -ERANGE;
466
467 prt->ptpmsg_irq[KSZ_SYNC_MSG].ts_en = true;
468 prt->ptpmsg_irq[KSZ_XDREQ_MSG].ts_en = true;
469 prt->ptpmsg_irq[KSZ_PDRES_MSG].ts_en = true;
470 prt->hwts_tx_en = true;
471
472 ret = ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_1STEP, 0);
473 if (ret)
474 return ret;
475
476 break;
477 default:
478 return -ERANGE;
479 }
480
481 switch (config->rx_filter) {
482 case HWTSTAMP_FILTER_NONE:
483 prt->hwts_rx_en = false;
484 break;
485 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
486 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
487 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
488 prt->hwts_rx_en = true;
489 break;
490 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
491 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
492 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
493 prt->hwts_rx_en = true;
494 break;
495 case HWTSTAMP_FILTER_PTP_V2_EVENT:
496 case HWTSTAMP_FILTER_PTP_V2_SYNC:
497 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
498 prt->hwts_rx_en = true;
499 break;
500 default:
501 config->rx_filter = HWTSTAMP_FILTER_NONE;
502 return -ERANGE;
503 }
504
505 return ksz_ptp_enable_mode(dev);
506 }
507
ksz_hwtstamp_set(struct dsa_switch * ds,int port,struct kernel_hwtstamp_config * config,struct netlink_ext_ack * extack)508 int ksz_hwtstamp_set(struct dsa_switch *ds, int port,
509 struct kernel_hwtstamp_config *config,
510 struct netlink_ext_ack *extack)
511 {
512 struct ksz_device *dev = ds->priv;
513 struct ksz_port *prt;
514 int ret;
515
516 prt = &dev->ports[port];
517
518 ret = ksz_set_hwtstamp_config(dev, prt, config);
519 if (ret)
520 return ret;
521
522 prt->tstamp_config = *config;
523
524 return 0;
525 }
526
ksz_tstamp_reconstruct(struct ksz_device * dev,ktime_t tstamp)527 static ktime_t ksz_tstamp_reconstruct(struct ksz_device *dev, ktime_t tstamp)
528 {
529 struct timespec64 ptp_clock_time;
530 struct ksz_ptp_data *ptp_data;
531 struct timespec64 diff;
532 struct timespec64 ts;
533
534 ptp_data = &dev->ptp_data;
535 ts = ktime_to_timespec64(tstamp);
536
537 spin_lock_bh(&ptp_data->clock_lock);
538 ptp_clock_time = ptp_data->clock_time;
539 spin_unlock_bh(&ptp_data->clock_lock);
540
541 /* calculate full time from partial time stamp */
542 ts.tv_sec = (ptp_clock_time.tv_sec & ~3) | ts.tv_sec;
543
544 /* find nearest possible point in time */
545 diff = timespec64_sub(ts, ptp_clock_time);
546 if (diff.tv_sec > 2)
547 ts.tv_sec -= 4;
548 else if (diff.tv_sec < -2)
549 ts.tv_sec += 4;
550
551 return timespec64_to_ktime(ts);
552 }
553
ksz_port_rxtstamp(struct dsa_switch * ds,int port,struct sk_buff * skb,unsigned int type)554 bool ksz_port_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb,
555 unsigned int type)
556 {
557 struct skb_shared_hwtstamps *hwtstamps = skb_hwtstamps(skb);
558 struct ksz_device *dev = ds->priv;
559 struct ptp_header *ptp_hdr;
560 struct ksz_port *prt;
561 u8 ptp_msg_type;
562 ktime_t tstamp;
563 s64 correction;
564
565 prt = &dev->ports[port];
566
567 tstamp = KSZ_SKB_CB(skb)->tstamp;
568 memset(hwtstamps, 0, sizeof(*hwtstamps));
569 hwtstamps->hwtstamp = ksz_tstamp_reconstruct(dev, tstamp);
570
571 if (prt->tstamp_config.tx_type != HWTSTAMP_TX_ONESTEP_P2P)
572 goto out;
573
574 ptp_hdr = ptp_parse_header(skb, type);
575 if (!ptp_hdr)
576 goto out;
577
578 ptp_msg_type = ptp_get_msgtype(ptp_hdr, type);
579 if (ptp_msg_type != PTP_MSGTYPE_PDELAY_REQ)
580 goto out;
581
582 /* Only subtract the partial time stamp from the correction field. When
583 * the hardware adds the egress time stamp to the correction field of
584 * the PDelay_Resp message on tx, also only the partial time stamp will
585 * be added.
586 */
587 correction = (s64)get_unaligned_be64(&ptp_hdr->correction);
588 correction -= ktime_to_ns(tstamp) << 16;
589
590 ptp_header_update_correction(skb, type, ptp_hdr, correction);
591
592 out:
593 return false;
594 }
595
ksz_port_txtstamp(struct dsa_switch * ds,int port,struct sk_buff * skb)596 void ksz_port_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
597 {
598 struct ksz_device *dev = ds->priv;
599 struct ptp_header *hdr;
600 struct sk_buff *clone;
601 struct ksz_port *prt;
602 unsigned int type;
603 u8 ptp_msg_type;
604
605 prt = &dev->ports[port];
606
607 if (!prt->hwts_tx_en)
608 return;
609
610 type = ptp_classify_raw(skb);
611 if (type == PTP_CLASS_NONE)
612 return;
613
614 hdr = ptp_parse_header(skb, type);
615 if (!hdr)
616 return;
617
618 ptp_msg_type = ptp_get_msgtype(hdr, type);
619
620 switch (ptp_msg_type) {
621 case PTP_MSGTYPE_SYNC:
622 if (prt->tstamp_config.tx_type == HWTSTAMP_TX_ONESTEP_P2P)
623 return;
624 break;
625 case PTP_MSGTYPE_PDELAY_REQ:
626 break;
627 case PTP_MSGTYPE_PDELAY_RESP:
628 if (prt->tstamp_config.tx_type == HWTSTAMP_TX_ONESTEP_P2P) {
629 KSZ_SKB_CB(skb)->ptp_type = type;
630 KSZ_SKB_CB(skb)->update_correction = true;
631 return;
632 }
633 break;
634
635 default:
636 return;
637 }
638
639 clone = skb_clone_sk(skb);
640 if (!clone)
641 return;
642
643 /* caching the value to be used in tag_ksz.c */
644 KSZ_SKB_CB(skb)->clone = clone;
645 }
646
ksz_ptp_txtstamp_skb(struct ksz_device * dev,struct ksz_port * prt,struct sk_buff * skb)647 static void ksz_ptp_txtstamp_skb(struct ksz_device *dev,
648 struct ksz_port *prt, struct sk_buff *skb)
649 {
650 struct skb_shared_hwtstamps hwtstamps = {};
651 int ret;
652
653 /* timeout must include DSA conduit to transmit data, tstamp latency,
654 * IRQ latency and time for reading the time stamp.
655 */
656 ret = wait_for_completion_timeout(&prt->tstamp_msg_comp,
657 msecs_to_jiffies(100));
658 if (!ret)
659 return;
660
661 hwtstamps.hwtstamp = prt->tstamp_msg;
662 skb_complete_tx_timestamp(skb, &hwtstamps);
663 }
664
ksz8463_set_pdelayresp_flag(struct ksz_port * prt,struct sk_buff * skb)665 static void ksz8463_set_pdelayresp_flag(struct ksz_port *prt,
666 struct sk_buff *skb)
667 {
668 struct ptp_header *hdr;
669 unsigned int type;
670 u8 ptp_msg_type;
671
672 if (!ksz_is_ksz8463(prt->ksz_dev))
673 return;
674
675 if (skb_linearize(skb))
676 return;
677
678 type = ptp_classify_raw(skb);
679 if (type == PTP_CLASS_NONE)
680 return;
681
682 hdr = ptp_parse_header(skb, type);
683 if (!hdr)
684 return;
685
686 ptp_msg_type = ptp_get_msgtype(hdr, type);
687 prt->last_tx_is_pdelayresp = (ptp_msg_type == PTP_MSGTYPE_PDELAY_RESP);
688 }
689
ksz_port_deferred_xmit(struct kthread_work * work)690 void ksz_port_deferred_xmit(struct kthread_work *work)
691 {
692 struct ksz_deferred_xmit_work *xmit_work = work_to_xmit_work(work);
693 struct sk_buff *clone, *skb = xmit_work->skb;
694 struct dsa_switch *ds = xmit_work->dp->ds;
695 struct ksz_device *dev = ds->priv;
696 struct ksz_port *prt;
697
698 prt = &dev->ports[xmit_work->dp->index];
699
700 clone = KSZ_SKB_CB(skb)->clone;
701
702 skb_shinfo(clone)->tx_flags |= SKBTX_IN_PROGRESS;
703
704 reinit_completion(&prt->tstamp_msg_comp);
705
706 ksz8463_set_pdelayresp_flag(prt, skb);
707
708 dsa_enqueue_skb(skb, skb->dev);
709
710 ksz_ptp_txtstamp_skb(dev, prt, clone);
711
712 kfree(xmit_work);
713 }
714
_ksz_ptp_gettime(struct ksz_device * dev,struct timespec64 * ts)715 static int _ksz_ptp_gettime(struct ksz_device *dev, struct timespec64 *ts)
716 {
717 const u16 *regs = dev->info->regs;
718 u32 nanoseconds;
719 u32 seconds;
720 u8 phase;
721 int ret;
722
723 /* Copy current PTP clock into shadow registers and read */
724 ret = ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_READ_TIME, PTP_READ_TIME);
725 if (ret)
726 return ret;
727
728 ret = ksz_read8(dev, regs[PTP_RTC_SUB_NANOSEC], &phase);
729 if (ret)
730 return ret;
731
732 ret = ksz_read32(dev, regs[PTP_RTC_NANOSEC], &nanoseconds);
733 if (ret)
734 return ret;
735
736 ret = ksz_read32(dev, regs[PTP_RTC_SEC], &seconds);
737 if (ret)
738 return ret;
739
740 ts->tv_sec = seconds;
741 ts->tv_nsec = nanoseconds + phase * 8;
742
743 return 0;
744 }
745
ksz_ptp_gettime(struct ptp_clock_info * ptp,struct timespec64 * ts)746 static int ksz_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
747 {
748 struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
749 struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
750 int ret;
751
752 mutex_lock(&ptp_data->lock);
753 ret = _ksz_ptp_gettime(dev, ts);
754 mutex_unlock(&ptp_data->lock);
755
756 return ret;
757 }
758
ksz_ptp_restart_perout(struct ksz_device * dev)759 static int ksz_ptp_restart_perout(struct ksz_device *dev)
760 {
761 struct ksz_ptp_data *ptp_data = &dev->ptp_data;
762 s64 now_ns, first_ns, period_ns, next_ns;
763 struct ptp_perout_request request;
764 struct timespec64 next;
765 struct timespec64 now;
766 unsigned int count;
767 int ret;
768
769 dev_info(dev->dev, "Restarting periodic output signal\n");
770
771 ret = _ksz_ptp_gettime(dev, &now);
772 if (ret)
773 return ret;
774
775 now_ns = timespec64_to_ns(&now);
776 first_ns = timespec64_to_ns(&ptp_data->perout_target_time_first);
777
778 /* Calculate next perout event based on start time and period */
779 period_ns = timespec64_to_ns(&ptp_data->perout_period);
780
781 if (first_ns < now_ns) {
782 count = div_u64(now_ns - first_ns, period_ns);
783 next_ns = first_ns + count * period_ns;
784 } else {
785 next_ns = first_ns;
786 }
787
788 /* Ensure 100 ms guard time prior next event */
789 while (next_ns < now_ns + 100000000)
790 next_ns += period_ns;
791
792 /* Restart periodic output signal */
793 next = ns_to_timespec64(next_ns);
794 request.start.sec = next.tv_sec;
795 request.start.nsec = next.tv_nsec;
796 request.period.sec = ptp_data->perout_period.tv_sec;
797 request.period.nsec = ptp_data->perout_period.tv_nsec;
798 request.index = 0;
799 request.flags = 0;
800
801 return ksz_ptp_enable_perout(dev, &request, 1);
802 }
803
ksz_ptp_settime(struct ptp_clock_info * ptp,const struct timespec64 * ts)804 static int ksz_ptp_settime(struct ptp_clock_info *ptp,
805 const struct timespec64 *ts)
806 {
807 struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
808 struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
809 const u16 *regs = dev->info->regs;
810 int ret;
811
812 mutex_lock(&ptp_data->lock);
813
814 /* Write to shadow registers and Load PTP clock */
815 ret = ksz_write16(dev, regs[PTP_RTC_SUB_NANOSEC], PTP_RTC_0NS);
816 if (ret)
817 goto unlock;
818
819 ret = ksz_write32(dev, regs[PTP_RTC_NANOSEC], ts->tv_nsec);
820 if (ret)
821 goto unlock;
822
823 ret = ksz_write32(dev, regs[PTP_RTC_SEC], ts->tv_sec);
824 if (ret)
825 goto unlock;
826
827 ret = ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_LOAD_TIME, PTP_LOAD_TIME);
828 if (ret)
829 goto unlock;
830
831 switch (ptp_data->tou_mode) {
832 case KSZ_PTP_TOU_IDLE:
833 break;
834
835 case KSZ_PTP_TOU_PEROUT:
836 ret = ksz_ptp_restart_perout(dev);
837 if (ret)
838 goto unlock;
839
840 break;
841 }
842
843 spin_lock_bh(&ptp_data->clock_lock);
844 ptp_data->clock_time = *ts;
845 spin_unlock_bh(&ptp_data->clock_lock);
846
847 unlock:
848 mutex_unlock(&ptp_data->lock);
849
850 return ret;
851 }
852
ksz_ptp_adjfine(struct ptp_clock_info * ptp,long scaled_ppm)853 static int ksz_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
854 {
855 struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
856 struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
857 const u16 *regs = dev->info->regs;
858 u64 base, adj;
859 bool negative;
860 u32 data32;
861 int ret;
862
863 mutex_lock(&ptp_data->lock);
864
865 if (scaled_ppm) {
866 base = KSZ_PTP_INC_NS << KSZ_PTP_SUBNS_BITS;
867 negative = diff_by_scaled_ppm(base, scaled_ppm, &adj);
868
869 data32 = (u32)adj;
870 data32 &= PTP_SUBNANOSEC_M;
871 if (!negative)
872 data32 |= PTP_RATE_DIR;
873
874 ret = ksz_write32(dev, regs[PTP_SUBNANOSEC_RATE], data32);
875 if (ret)
876 goto unlock;
877
878 ret = ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_CLK_ADJ_ENABLE,
879 PTP_CLK_ADJ_ENABLE);
880 if (ret)
881 goto unlock;
882 } else {
883 ret = ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_CLK_ADJ_ENABLE, 0);
884 if (ret)
885 goto unlock;
886 }
887
888 unlock:
889 mutex_unlock(&ptp_data->lock);
890 return ret;
891 }
892
ksz_ptp_adjtime(struct ptp_clock_info * ptp,s64 delta)893 static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
894 {
895 struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
896 struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
897 struct timespec64 delta64 = ns_to_timespec64(delta);
898 const u16 *regs = dev->info->regs;
899 s32 sec, nsec;
900 u16 data16;
901 int ret;
902
903 mutex_lock(&ptp_data->lock);
904
905 /* do not use ns_to_timespec64(),
906 * both sec and nsec are subtracted by hw
907 */
908 sec = div_s64_rem(delta, NSEC_PER_SEC, &nsec);
909
910 ret = ksz_write32(dev, regs[PTP_RTC_NANOSEC], abs(nsec));
911 if (ret)
912 goto unlock;
913
914 ret = ksz_write32(dev, regs[PTP_RTC_SEC], abs(sec));
915 if (ret)
916 goto unlock;
917
918 ret = ksz_read16(dev, regs[PTP_CLK_CTRL], &data16);
919 if (ret)
920 goto unlock;
921
922 data16 |= PTP_STEP_ADJ;
923
924 /* PTP_STEP_DIR -- 0: subtract, 1: add */
925 if (delta < 0)
926 data16 &= ~PTP_STEP_DIR;
927 else
928 data16 |= PTP_STEP_DIR;
929
930 ret = ksz_write16(dev, regs[PTP_CLK_CTRL], data16);
931 if (ret)
932 goto unlock;
933
934 switch (ptp_data->tou_mode) {
935 case KSZ_PTP_TOU_IDLE:
936 break;
937
938 case KSZ_PTP_TOU_PEROUT:
939 ret = ksz_ptp_restart_perout(dev);
940 if (ret)
941 goto unlock;
942
943 break;
944 }
945
946 spin_lock_bh(&ptp_data->clock_lock);
947 ptp_data->clock_time = timespec64_add(ptp_data->clock_time, delta64);
948 spin_unlock_bh(&ptp_data->clock_lock);
949
950 unlock:
951 mutex_unlock(&ptp_data->lock);
952 return ret;
953 }
954
ksz_ptp_enable(struct ptp_clock_info * ptp,struct ptp_clock_request * req,int on)955 static int ksz_ptp_enable(struct ptp_clock_info *ptp,
956 struct ptp_clock_request *req, int on)
957 {
958 struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
959 struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
960 int ret;
961
962 switch (req->type) {
963 case PTP_CLK_REQ_PEROUT:
964 mutex_lock(&ptp_data->lock);
965 ret = ksz_ptp_enable_perout(dev, &req->perout, on);
966 mutex_unlock(&ptp_data->lock);
967 break;
968 default:
969 return -EOPNOTSUPP;
970 }
971
972 return ret;
973 }
974
ksz_ptp_verify_pin(struct ptp_clock_info * ptp,unsigned int pin,enum ptp_pin_function func,unsigned int chan)975 static int ksz_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,
976 enum ptp_pin_function func, unsigned int chan)
977 {
978 int ret = 0;
979
980 switch (func) {
981 case PTP_PF_NONE:
982 case PTP_PF_PEROUT:
983 break;
984 default:
985 ret = -1;
986 break;
987 }
988
989 return ret;
990 }
991
992 /* Function is pointer to the do_aux_work in the ptp_clock capability */
ksz_ptp_do_aux_work(struct ptp_clock_info * ptp)993 static long ksz_ptp_do_aux_work(struct ptp_clock_info *ptp)
994 {
995 struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);
996 struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);
997 struct timespec64 ts;
998 int ret;
999
1000 mutex_lock(&ptp_data->lock);
1001 ret = _ksz_ptp_gettime(dev, &ts);
1002 if (ret)
1003 goto out;
1004
1005 spin_lock_bh(&ptp_data->clock_lock);
1006 ptp_data->clock_time = ts;
1007 spin_unlock_bh(&ptp_data->clock_lock);
1008
1009 out:
1010 mutex_unlock(&ptp_data->lock);
1011
1012 return HZ; /* reschedule in 1 second */
1013 }
1014
ksz_ptp_start_clock(struct ksz_device * dev)1015 static int ksz_ptp_start_clock(struct ksz_device *dev)
1016 {
1017 struct ksz_ptp_data *ptp_data = &dev->ptp_data;
1018 const u16 *regs = dev->info->regs;
1019 int ret;
1020
1021 ret = ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_CLK_ENABLE, PTP_CLK_ENABLE);
1022 if (ret)
1023 return ret;
1024
1025 ptp_data->clock_time.tv_sec = 0;
1026 ptp_data->clock_time.tv_nsec = 0;
1027
1028 return 0;
1029 }
1030
ksz_ptp_clock_register(struct dsa_switch * ds)1031 int ksz_ptp_clock_register(struct dsa_switch *ds)
1032 {
1033 struct ksz_device *dev = ds->priv;
1034 const u16 *regs = dev->info->regs;
1035 struct ksz_ptp_data *ptp_data;
1036 int ret;
1037 u8 i;
1038
1039 ptp_data = &dev->ptp_data;
1040 mutex_init(&ptp_data->lock);
1041 spin_lock_init(&ptp_data->clock_lock);
1042
1043 ptp_data->caps.owner = THIS_MODULE;
1044 snprintf(ptp_data->caps.name, 16, "Microchip Clock");
1045 ptp_data->caps.max_adj = KSZ_MAX_DRIFT_CORR;
1046 ptp_data->caps.gettime64 = ksz_ptp_gettime;
1047 ptp_data->caps.settime64 = ksz_ptp_settime;
1048 ptp_data->caps.adjfine = ksz_ptp_adjfine;
1049 ptp_data->caps.adjtime = ksz_ptp_adjtime;
1050 ptp_data->caps.do_aux_work = ksz_ptp_do_aux_work;
1051 ptp_data->caps.enable = ksz_ptp_enable;
1052 ptp_data->caps.verify = ksz_ptp_verify_pin;
1053 ptp_data->caps.n_pins = KSZ_PTP_N_GPIO;
1054 ptp_data->caps.n_per_out = 3;
1055
1056 ret = ksz_ptp_start_clock(dev);
1057 if (ret)
1058 return ret;
1059
1060 for (i = 0; i < KSZ_PTP_N_GPIO; i++) {
1061 struct ptp_pin_desc *ptp_pin = &ptp_data->pin_config[i];
1062
1063 snprintf(ptp_pin->name,
1064 sizeof(ptp_pin->name), "ksz_ptp_pin_%02d", i);
1065 ptp_pin->index = i;
1066 ptp_pin->func = PTP_PF_NONE;
1067 }
1068
1069 ptp_data->caps.pin_config = ptp_data->pin_config;
1070
1071 /* Currently only P2P mode is supported. When 802_1AS bit is set, it
1072 * forwards all PTP packets to host port and none to other ports.
1073 */
1074 ret = ksz_rmw16(dev, regs[PTP_MSG_CONF1],
1075 PTP_TC_P2P | PTP_802_1AS | PTP_ETH_ENABLE,
1076 PTP_TC_P2P | PTP_802_1AS | PTP_ETH_ENABLE);
1077 if (ret)
1078 return ret;
1079
1080 ptp_data->clock = ptp_clock_register(&ptp_data->caps, dev->dev);
1081 if (IS_ERR_OR_NULL(ptp_data->clock))
1082 return PTR_ERR(ptp_data->clock);
1083
1084 return 0;
1085 }
1086
ksz_ptp_clock_unregister(struct dsa_switch * ds)1087 void ksz_ptp_clock_unregister(struct dsa_switch *ds)
1088 {
1089 struct ksz_device *dev = ds->priv;
1090 struct ksz_ptp_data *ptp_data;
1091
1092 ptp_data = &dev->ptp_data;
1093
1094 if (ptp_data->clock)
1095 ptp_clock_unregister(ptp_data->clock);
1096 }
1097
ksz_read_ts(struct ksz_port * port,u16 reg,u32 * ts)1098 static int ksz_read_ts(struct ksz_port *port, u16 reg, u32 *ts)
1099 {
1100 u16 ts_reg = reg;
1101
1102 /**
1103 * On KSZ8463 DREQ and DRESP timestamps share one interrupt line
1104 * so we have to check the nature of the latest event sent to know
1105 * where the timestamp is located
1106 */
1107 if (ksz_is_ksz8463(port->ksz_dev)) {
1108 const struct ksz_dev_ops *ops = port->ksz_dev->dev_ops;
1109
1110 if (port->last_tx_is_pdelayresp &&
1111 ts_reg == ops->get_port_addr(port->num, KSZ8463_REG_PORT_DREQ_TS))
1112 ts_reg += KSZ8463_DRESP_TS_OFFSET;
1113 }
1114
1115 return ksz_read32(port->ksz_dev, ts_reg, ts);
1116 }
1117
ksz_ptp_msg_thread_fn(int irq,void * dev_id)1118 static irqreturn_t ksz_ptp_msg_thread_fn(int irq, void *dev_id)
1119 {
1120 struct ksz_ptp_irq *ptpmsg_irq = dev_id;
1121 struct ksz_device *dev;
1122 struct ksz_port *port;
1123 u32 tstamp_raw;
1124 ktime_t tstamp;
1125 int ret;
1126
1127 port = ptpmsg_irq->port;
1128 dev = port->ksz_dev;
1129
1130 if (ptpmsg_irq->ts_en) {
1131 ret = ksz_read_ts(port, ptpmsg_irq->ts_reg, &tstamp_raw);
1132 if (ret)
1133 return IRQ_NONE;
1134
1135 tstamp = ksz_decode_tstamp(tstamp_raw);
1136
1137 port->tstamp_msg = ksz_tstamp_reconstruct(dev, tstamp);
1138
1139 complete(&port->tstamp_msg_comp);
1140 }
1141
1142 return IRQ_HANDLED;
1143 }
1144
ksz_ptp_irq_thread_fn(int irq,void * dev_id)1145 static irqreturn_t ksz_ptp_irq_thread_fn(int irq, void *dev_id)
1146 {
1147 struct ksz_irq *ptpirq = dev_id;
1148 unsigned int nhandled = 0;
1149 struct ksz_device *dev;
1150 unsigned int sub_irq;
1151 u16 data;
1152 int ret;
1153 u8 n;
1154
1155 dev = ptpirq->dev;
1156
1157 ret = ksz_read16(dev, ptpirq->reg_status, &data);
1158 if (ret)
1159 goto out;
1160
1161 /* Clear the interrupts W1C */
1162 ret = ksz_write16(dev, ptpirq->reg_status, data);
1163 if (ret)
1164 return IRQ_NONE;
1165
1166 for (n = 0; n < ptpirq->nirqs; ++n) {
1167 if (data & BIT(n + ptpirq->irq0_offset)) {
1168 sub_irq = irq_find_mapping(ptpirq->domain, n);
1169 handle_nested_irq(sub_irq);
1170 ++nhandled;
1171 }
1172 }
1173
1174 out:
1175 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
1176 }
1177
ksz_ptp_irq_mask(struct irq_data * d)1178 static void ksz_ptp_irq_mask(struct irq_data *d)
1179 {
1180 struct ksz_irq *kirq = irq_data_get_irq_chip_data(d);
1181
1182 kirq->masked &= ~BIT(d->hwirq + kirq->irq0_offset);
1183 }
1184
ksz_ptp_irq_unmask(struct irq_data * d)1185 static void ksz_ptp_irq_unmask(struct irq_data *d)
1186 {
1187 struct ksz_irq *kirq = irq_data_get_irq_chip_data(d);
1188
1189 kirq->masked |= BIT(d->hwirq + kirq->irq0_offset);
1190 }
1191
ksz_ptp_irq_bus_lock(struct irq_data * d)1192 static void ksz_ptp_irq_bus_lock(struct irq_data *d)
1193 {
1194 struct ksz_irq *kirq = irq_data_get_irq_chip_data(d);
1195
1196 mutex_lock(&kirq->dev->lock_irq);
1197 }
1198
ksz_ptp_irq_bus_sync_unlock(struct irq_data * d)1199 static void ksz_ptp_irq_bus_sync_unlock(struct irq_data *d)
1200 {
1201 struct ksz_irq *kirq = irq_data_get_irq_chip_data(d);
1202 struct ksz_device *dev = kirq->dev;
1203 int ret;
1204
1205 ret = ksz_write16(dev, kirq->reg_mask, kirq->masked);
1206 if (ret)
1207 dev_err(dev->dev, "failed to change IRQ mask\n");
1208
1209 mutex_unlock(&dev->lock_irq);
1210 }
1211
1212 static const struct irq_chip ksz_ptp_irq_chip = {
1213 .name = "ksz-irq",
1214 .irq_mask = ksz_ptp_irq_mask,
1215 .irq_unmask = ksz_ptp_irq_unmask,
1216 .irq_bus_lock = ksz_ptp_irq_bus_lock,
1217 .irq_bus_sync_unlock = ksz_ptp_irq_bus_sync_unlock,
1218 };
1219
ksz_ptp_irq_domain_map(struct irq_domain * d,unsigned int irq,irq_hw_number_t hwirq)1220 static int ksz_ptp_irq_domain_map(struct irq_domain *d,
1221 unsigned int irq, irq_hw_number_t hwirq)
1222 {
1223 irq_set_chip_data(irq, d->host_data);
1224 irq_set_chip_and_handler(irq, &ksz_ptp_irq_chip, handle_level_irq);
1225 irq_set_noprobe(irq);
1226
1227 return 0;
1228 }
1229
1230 static const struct irq_domain_ops ksz_ptp_irq_domain_ops = {
1231 .map = ksz_ptp_irq_domain_map,
1232 .xlate = irq_domain_xlate_twocell,
1233 };
1234
ksz_ptp_msg_irq_free(struct ksz_port * port,u8 n)1235 static void ksz_ptp_msg_irq_free(struct ksz_port *port, u8 n)
1236 {
1237 struct ksz_ptp_irq *ptpmsg_irq;
1238
1239 ptpmsg_irq = &port->ptpmsg_irq[n];
1240
1241 free_irq(ptpmsg_irq->num, ptpmsg_irq);
1242 irq_dispose_mapping(ptpmsg_irq->num);
1243 }
1244
ksz_ptp_msg_irq_setup(struct ksz_port * port,u8 n)1245 static int ksz_ptp_msg_irq_setup(struct ksz_port *port, u8 n)
1246 {
1247 static const u16 ts_reg[] = {
1248 REG_PTP_PORT_PDRESP_TS, REG_PTP_PORT_XDELAY_TS,
1249 REG_PTP_PORT_SYNC_TS
1250 };
1251 static const char * const name[] = {"pdresp-msg", "xdreq-msg",
1252 "sync-msg"};
1253 const struct ksz_dev_ops *ops = port->ksz_dev->dev_ops;
1254 struct ksz_irq *ptpirq = &port->ptpirq;
1255 struct ksz_ptp_irq *ptpmsg_irq;
1256 int ret;
1257
1258 ptpmsg_irq = &port->ptpmsg_irq[n];
1259 ptpmsg_irq->num = irq_create_mapping(ptpirq->domain, n);
1260 if (!ptpmsg_irq->num)
1261 return -EINVAL;
1262
1263 ptpmsg_irq->port = port;
1264 ptpmsg_irq->ts_reg = ops->get_port_addr(port->num, ts_reg[n]);
1265
1266 strscpy(ptpmsg_irq->name, name[n]);
1267
1268 ret = request_threaded_irq(ptpmsg_irq->num, NULL,
1269 ksz_ptp_msg_thread_fn, IRQF_ONESHOT,
1270 ptpmsg_irq->name, ptpmsg_irq);
1271 if (ret)
1272 irq_dispose_mapping(ptpmsg_irq->num);
1273
1274 return ret;
1275 }
1276
ksz8463_ptp_port_irq_setup(struct ksz_irq * ptpirq,struct ksz_port * port,int hw_irq)1277 static int ksz8463_ptp_port_irq_setup(struct ksz_irq *ptpirq,
1278 struct ksz_port *port, int hw_irq)
1279 {
1280 u16 ts_reg[] = {KSZ8463_REG_PORT_SYNC_TS, KSZ8463_REG_PORT_DREQ_TS};
1281 static const char * const name[] = {"sync-msg", "delay-msg"};
1282 const struct ksz_dev_ops *ops = port->ksz_dev->dev_ops;
1283 struct ksz_ptp_irq *ptpmsg_irq;
1284 int ret;
1285 int i;
1286
1287 init_completion(&port->tstamp_msg_comp);
1288
1289 for (i = 0; i < 2; i++) {
1290 ptpmsg_irq = &port->ptpmsg_irq[i];
1291 ptpmsg_irq->num = irq_create_mapping(ptpirq->domain,
1292 hw_irq + i);
1293 if (!ptpmsg_irq->num) {
1294 ret = -EINVAL;
1295 goto release_msg_irq;
1296 }
1297
1298 ptpmsg_irq->port = port;
1299 ptpmsg_irq->ts_reg = ops->get_port_addr(port->num, ts_reg[i]);
1300
1301 strscpy(ptpmsg_irq->name, name[i]);
1302
1303 ret = request_threaded_irq(ptpmsg_irq->num, NULL,
1304 ksz_ptp_msg_thread_fn, IRQF_ONESHOT,
1305 ptpmsg_irq->name, ptpmsg_irq);
1306 if (ret) {
1307 irq_dispose_mapping(ptpmsg_irq->num);
1308 goto release_msg_irq;
1309 }
1310 }
1311
1312 return 0;
1313
1314 release_msg_irq:
1315 while (i--)
1316 ksz_ptp_msg_irq_free(port, i);
1317
1318 return ret;
1319 }
1320
ksz8463_ptp_port_irq_teardown(struct ksz_port * port)1321 static void ksz8463_ptp_port_irq_teardown(struct ksz_port *port)
1322 {
1323 int i;
1324
1325 for (i = 0; i < 2; i++)
1326 ksz_ptp_msg_irq_free(port, i);
1327 }
1328
ksz8463_ptp_irq_setup(struct dsa_switch * ds)1329 int ksz8463_ptp_irq_setup(struct dsa_switch *ds)
1330 {
1331 struct ksz_device *dev = ds->priv;
1332 struct ksz_port *port1, *port2;
1333 struct ksz_irq *ptpirq;
1334 int ret;
1335
1336 port1 = &dev->ports[0];
1337 port2 = &dev->ports[1];
1338 ptpirq = &port1->ptpirq;
1339
1340 ptpirq->irq_num = irq_find_mapping(dev->girq.domain,
1341 KSZ8463_SRC_PTP_INT);
1342 if (!ptpirq->irq_num)
1343 return -EINVAL;
1344
1345 ptpirq->dev = dev;
1346 ptpirq->nirqs = 4;
1347 ptpirq->reg_mask = KSZ8463_PTP_TS_IER;
1348 ptpirq->reg_status = KSZ8463_PTP_TS_ISR;
1349 ptpirq->irq0_offset = KSZ8463_PTP_INT_START;
1350 snprintf(ptpirq->name, sizeof(ptpirq->name), "ptp-irq");
1351
1352 ptpirq->domain = irq_domain_create_linear(dev_fwnode(dev->dev),
1353 ptpirq->nirqs,
1354 &ksz_ptp_irq_domain_ops,
1355 ptpirq);
1356 if (!ptpirq->domain)
1357 return -ENOMEM;
1358
1359 ret = ksz8463_ptp_port_irq_setup(ptpirq, port1,
1360 KSZ8463_PTP_PORT1_INT_START - KSZ8463_PTP_INT_START);
1361 if (ret)
1362 goto release_domain;
1363
1364 ret = ksz8463_ptp_port_irq_setup(ptpirq, port2,
1365 KSZ8463_PTP_PORT2_INT_START - KSZ8463_PTP_INT_START);
1366 if (ret)
1367 goto free_port1;
1368
1369 ret = request_threaded_irq(ptpirq->irq_num, NULL, ksz_ptp_irq_thread_fn,
1370 IRQF_ONESHOT, ptpirq->name, ptpirq);
1371 if (ret)
1372 goto free_port2;
1373
1374 return 0;
1375
1376 free_port2:
1377 ksz8463_ptp_port_irq_teardown(port2);
1378 free_port1:
1379 ksz8463_ptp_port_irq_teardown(port1);
1380 release_domain:
1381 irq_domain_remove(ptpirq->domain);
1382
1383 return ret;
1384 }
1385
ksz8463_ptp_irq_free(struct dsa_switch * ds)1386 void ksz8463_ptp_irq_free(struct dsa_switch *ds)
1387 {
1388 struct ksz_device *dev = ds->priv;
1389 struct ksz_port *port1 = &dev->ports[0];
1390 struct ksz_port *port2 = &dev->ports[1];
1391 struct ksz_irq *ptpirq = &port1->ptpirq;
1392
1393 free_irq(ptpirq->irq_num, ptpirq);
1394 ksz8463_ptp_port_irq_teardown(port2);
1395 ksz8463_ptp_port_irq_teardown(port1);
1396 irq_domain_remove(ptpirq->domain);
1397 }
1398
ksz_ptp_irq_setup(struct dsa_switch * ds,u8 p)1399 int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p)
1400 {
1401 struct ksz_device *dev = ds->priv;
1402 const struct ksz_dev_ops *ops = dev->dev_ops;
1403 struct ksz_port *port = &dev->ports[p];
1404 struct ksz_irq *ptpirq = &port->ptpirq;
1405 int irq;
1406 int ret;
1407
1408 ptpirq->dev = dev;
1409 ptpirq->masked = 0;
1410 ptpirq->nirqs = 3;
1411 ptpirq->reg_mask = ops->get_port_addr(p, REG_PTP_PORT_TX_INT_ENABLE__2);
1412 ptpirq->reg_status = ops->get_port_addr(p,
1413 REG_PTP_PORT_TX_INT_STATUS__2);
1414 ptpirq->irq0_offset = KSZ_PTP_INT_START;
1415
1416 snprintf(ptpirq->name, sizeof(ptpirq->name), "ptp-irq-%d", p);
1417
1418 init_completion(&port->tstamp_msg_comp);
1419
1420 ptpirq->domain = irq_domain_create_linear(dev_fwnode(dev->dev), ptpirq->nirqs,
1421 &ksz_ptp_irq_domain_ops, ptpirq);
1422 if (!ptpirq->domain)
1423 return -ENOMEM;
1424
1425 ptpirq->irq_num = irq_find_mapping(port->pirq.domain, PORT_SRC_PTP_INT);
1426 if (!ptpirq->irq_num) {
1427 ret = -EINVAL;
1428 goto out;
1429 }
1430
1431 ret = request_threaded_irq(ptpirq->irq_num, NULL, ksz_ptp_irq_thread_fn,
1432 IRQF_ONESHOT, ptpirq->name, ptpirq);
1433 if (ret)
1434 goto out;
1435
1436 for (irq = 0; irq < ptpirq->nirqs; irq++) {
1437 ret = ksz_ptp_msg_irq_setup(port, irq);
1438 if (ret)
1439 goto out_ptp_msg;
1440 }
1441
1442 return 0;
1443
1444 out_ptp_msg:
1445 free_irq(ptpirq->irq_num, ptpirq);
1446 while (irq--) {
1447 free_irq(port->ptpmsg_irq[irq].num, &port->ptpmsg_irq[irq]);
1448 irq_dispose_mapping(port->ptpmsg_irq[irq].num);
1449 }
1450 out:
1451 irq_domain_remove(ptpirq->domain);
1452
1453 return ret;
1454 }
1455
ksz_ptp_irq_free(struct dsa_switch * ds,u8 p)1456 void ksz_ptp_irq_free(struct dsa_switch *ds, u8 p)
1457 {
1458 struct ksz_device *dev = ds->priv;
1459 struct ksz_port *port = &dev->ports[p];
1460 struct ksz_irq *ptpirq = &port->ptpirq;
1461 u8 n;
1462
1463 for (n = 0; n < ptpirq->nirqs; n++)
1464 ksz_ptp_msg_irq_free(port, n);
1465
1466 free_irq(ptpirq->irq_num, ptpirq);
1467 irq_dispose_mapping(ptpirq->irq_num);
1468
1469 irq_domain_remove(ptpirq->domain);
1470 }
1471
1472 MODULE_AUTHOR("Christian Eggers <ceggers@arri.de>");
1473 MODULE_AUTHOR("Arun Ramadoss <arun.ramadoss@microchip.com>");
1474 MODULE_DESCRIPTION("PTP support for KSZ switch");
1475 MODULE_LICENSE("GPL");
1476