1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Texas Instruments ICSSG Ethernet Driver
4 *
5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
6 *
7 */
8
9 #include <linux/bitops.h>
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/dma/ti-cppi5.h>
14 #include <linux/etherdevice.h>
15 #include <linux/genalloc.h>
16 #include <linux/if_hsr.h>
17 #include <linux/if_vlan.h>
18 #include <linux/interrupt.h>
19 #include <linux/kernel.h>
20 #include <linux/mfd/syscon.h>
21 #include <linux/module.h>
22 #include <linux/of.h>
23 #include <linux/of_mdio.h>
24 #include <linux/of_net.h>
25 #include <linux/platform_device.h>
26 #include <linux/phy.h>
27 #include <linux/property.h>
28 #include <linux/remoteproc/pruss.h>
29 #include <linux/regmap.h>
30 #include <linux/remoteproc.h>
31 #include <net/switchdev.h>
32
33 #include "icssg_prueth.h"
34 #include "icssg_mii_rt.h"
35 #include "icssg_switchdev.h"
36 #include "../k3-cppi-desc-pool.h"
37
38 #define PRUETH_MODULE_DESCRIPTION "PRUSS ICSSG Ethernet driver"
39
40 #define DEFAULT_VID 1
41 #define DEFAULT_PORT_MASK 1
42 #define DEFAULT_UNTAG_MASK 1
43
44 #define NETIF_PRUETH_HSR_OFFLOAD_FEATURES (NETIF_F_HW_HSR_FWD | \
45 NETIF_F_HW_HSR_DUP | \
46 NETIF_F_HW_HSR_TAG_INS | \
47 NETIF_F_HW_HSR_TAG_RM)
48
49 /* CTRLMMR_ICSSG_RGMII_CTRL register bits */
50 #define ICSSG_CTRL_RGMII_ID_MODE BIT(24)
51
emac_get_tx_ts(struct prueth_emac * emac,struct emac_tx_ts_response * rsp)52 static int emac_get_tx_ts(struct prueth_emac *emac,
53 struct emac_tx_ts_response *rsp)
54 {
55 struct prueth *prueth = emac->prueth;
56 int slice = prueth_emac_slice(emac);
57 int addr;
58
59 addr = icssg_queue_pop(prueth, slice == 0 ?
60 ICSSG_TS_POP_SLICE0 : ICSSG_TS_POP_SLICE1);
61 if (addr < 0)
62 return addr;
63
64 memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp));
65 /* return buffer back for to pool */
66 icssg_queue_push(prueth, slice == 0 ?
67 ICSSG_TS_PUSH_SLICE0 : ICSSG_TS_PUSH_SLICE1, addr);
68
69 return 0;
70 }
71
tx_ts_work(struct prueth_emac * emac)72 static void tx_ts_work(struct prueth_emac *emac)
73 {
74 struct skb_shared_hwtstamps ssh;
75 struct emac_tx_ts_response tsr;
76 struct sk_buff *skb;
77 int ret = 0;
78 u32 hi_sw;
79 u64 ns;
80
81 /* There may be more than one pending requests */
82 while (1) {
83 ret = emac_get_tx_ts(emac, &tsr);
84 if (ret) /* nothing more */
85 break;
86
87 if (tsr.cookie >= PRUETH_MAX_TX_TS_REQUESTS ||
88 !emac->tx_ts_skb[tsr.cookie]) {
89 netdev_err(emac->ndev, "Invalid TX TS cookie 0x%x\n",
90 tsr.cookie);
91 break;
92 }
93
94 skb = emac->tx_ts_skb[tsr.cookie];
95 emac->tx_ts_skb[tsr.cookie] = NULL; /* free slot */
96 if (!skb) {
97 netdev_err(emac->ndev, "Driver Bug! got NULL skb\n");
98 break;
99 }
100
101 hi_sw = readl(emac->prueth->shram.va +
102 TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET);
103 ns = icssg_ts_to_ns(hi_sw, tsr.hi_ts, tsr.lo_ts,
104 IEP_DEFAULT_CYCLE_TIME_NS);
105
106 memset(&ssh, 0, sizeof(ssh));
107 ssh.hwtstamp = ns_to_ktime(ns);
108
109 skb_tstamp_tx(skb, &ssh);
110 dev_consume_skb_any(skb);
111
112 if (atomic_dec_and_test(&emac->tx_ts_pending)) /* no more? */
113 break;
114 }
115 }
116
prueth_tx_ts_irq(int irq,void * dev_id)117 static irqreturn_t prueth_tx_ts_irq(int irq, void *dev_id)
118 {
119 struct prueth_emac *emac = dev_id;
120
121 /* currently only TX timestamp is being returned */
122 tx_ts_work(emac);
123
124 return IRQ_HANDLED;
125 }
126
127 static struct icssg_firmwares icssg_hsr_firmwares[] = {
128 {
129 .pru = "ti-pruss/am65x-sr2-pru0-pruhsr-fw.elf",
130 .rtu = "ti-pruss/am65x-sr2-rtu0-pruhsr-fw.elf",
131 .txpru = "ti-pruss/am65x-sr2-txpru0-pruhsr-fw.elf",
132 },
133 {
134 .pru = "ti-pruss/am65x-sr2-pru1-pruhsr-fw.elf",
135 .rtu = "ti-pruss/am65x-sr2-rtu1-pruhsr-fw.elf",
136 .txpru = "ti-pruss/am65x-sr2-txpru1-pruhsr-fw.elf",
137 }
138 };
139
140 static struct icssg_firmwares icssg_switch_firmwares[] = {
141 {
142 .pru = "ti-pruss/am65x-sr2-pru0-prusw-fw.elf",
143 .rtu = "ti-pruss/am65x-sr2-rtu0-prusw-fw.elf",
144 .txpru = "ti-pruss/am65x-sr2-txpru0-prusw-fw.elf",
145 },
146 {
147 .pru = "ti-pruss/am65x-sr2-pru1-prusw-fw.elf",
148 .rtu = "ti-pruss/am65x-sr2-rtu1-prusw-fw.elf",
149 .txpru = "ti-pruss/am65x-sr2-txpru1-prusw-fw.elf",
150 }
151 };
152
153 static struct icssg_firmwares icssg_emac_firmwares[] = {
154 {
155 .pru = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
156 .rtu = "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
157 .txpru = "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
158 },
159 {
160 .pru = "ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
161 .rtu = "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
162 .txpru = "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf",
163 }
164 };
165
prueth_emac_start(struct prueth * prueth,struct prueth_emac * emac)166 static int prueth_emac_start(struct prueth *prueth, struct prueth_emac *emac)
167 {
168 struct icssg_firmwares *firmwares;
169 struct device *dev = prueth->dev;
170 int slice, ret;
171
172 if (prueth->is_switch_mode)
173 firmwares = icssg_switch_firmwares;
174 else if (prueth->is_hsr_offload_mode)
175 firmwares = icssg_hsr_firmwares;
176 else
177 firmwares = icssg_emac_firmwares;
178
179 slice = prueth_emac_slice(emac);
180 if (slice < 0) {
181 netdev_err(emac->ndev, "invalid port\n");
182 return -EINVAL;
183 }
184
185 ret = icssg_config(prueth, emac, slice);
186 if (ret)
187 return ret;
188
189 ret = rproc_set_firmware(prueth->pru[slice], firmwares[slice].pru);
190 ret = rproc_boot(prueth->pru[slice]);
191 if (ret) {
192 dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret);
193 return -EINVAL;
194 }
195
196 ret = rproc_set_firmware(prueth->rtu[slice], firmwares[slice].rtu);
197 ret = rproc_boot(prueth->rtu[slice]);
198 if (ret) {
199 dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret);
200 goto halt_pru;
201 }
202
203 ret = rproc_set_firmware(prueth->txpru[slice], firmwares[slice].txpru);
204 ret = rproc_boot(prueth->txpru[slice]);
205 if (ret) {
206 dev_err(dev, "failed to boot TX_PRU%d: %d\n", slice, ret);
207 goto halt_rtu;
208 }
209
210 emac->fw_running = 1;
211 return 0;
212
213 halt_rtu:
214 rproc_shutdown(prueth->rtu[slice]);
215
216 halt_pru:
217 rproc_shutdown(prueth->pru[slice]);
218
219 return ret;
220 }
221
222 /* called back by PHY layer if there is change in link state of hw port*/
emac_adjust_link(struct net_device * ndev)223 static void emac_adjust_link(struct net_device *ndev)
224 {
225 struct prueth_emac *emac = netdev_priv(ndev);
226 struct phy_device *phydev = ndev->phydev;
227 struct prueth *prueth = emac->prueth;
228 bool new_state = false;
229 unsigned long flags;
230
231 if (phydev->link) {
232 /* check the mode of operation - full/half duplex */
233 if (phydev->duplex != emac->duplex) {
234 new_state = true;
235 emac->duplex = phydev->duplex;
236 }
237 if (phydev->speed != emac->speed) {
238 new_state = true;
239 emac->speed = phydev->speed;
240 }
241 if (!emac->link) {
242 new_state = true;
243 emac->link = 1;
244 }
245 } else if (emac->link) {
246 new_state = true;
247 emac->link = 0;
248
249 /* f/w should support 100 & 1000 */
250 emac->speed = SPEED_1000;
251
252 /* half duplex may not be supported by f/w */
253 emac->duplex = DUPLEX_FULL;
254 }
255
256 if (new_state) {
257 phy_print_status(phydev);
258
259 /* update RGMII and MII configuration based on PHY negotiated
260 * values
261 */
262 if (emac->link) {
263 if (emac->duplex == DUPLEX_HALF)
264 icssg_config_half_duplex(emac);
265 /* Set the RGMII cfg for gig en and full duplex */
266 icssg_update_rgmii_cfg(prueth->miig_rt, emac);
267
268 /* update the Tx IPG based on 100M/1G speed */
269 spin_lock_irqsave(&emac->lock, flags);
270 icssg_config_ipg(emac);
271 spin_unlock_irqrestore(&emac->lock, flags);
272 icssg_config_set_speed(emac);
273 icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD);
274
275 } else {
276 icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE);
277 }
278 }
279
280 if (emac->link) {
281 /* reactivate the transmit queue */
282 netif_tx_wake_all_queues(ndev);
283 } else {
284 netif_tx_stop_all_queues(ndev);
285 prueth_cleanup_tx_ts(emac);
286 }
287 }
288
emac_rx_timer_callback(struct hrtimer * timer)289 static enum hrtimer_restart emac_rx_timer_callback(struct hrtimer *timer)
290 {
291 struct prueth_emac *emac =
292 container_of(timer, struct prueth_emac, rx_hrtimer);
293 int rx_flow = PRUETH_RX_FLOW_DATA;
294
295 enable_irq(emac->rx_chns.irq[rx_flow]);
296 return HRTIMER_NORESTART;
297 }
298
emac_phy_connect(struct prueth_emac * emac)299 static int emac_phy_connect(struct prueth_emac *emac)
300 {
301 struct prueth *prueth = emac->prueth;
302 struct net_device *ndev = emac->ndev;
303 /* connect PHY */
304 ndev->phydev = of_phy_connect(emac->ndev, emac->phy_node,
305 &emac_adjust_link, 0,
306 emac->phy_if);
307 if (!ndev->phydev) {
308 dev_err(prueth->dev, "couldn't connect to phy %s\n",
309 emac->phy_node->full_name);
310 return -ENODEV;
311 }
312
313 if (!emac->half_duplex) {
314 dev_dbg(prueth->dev, "half duplex mode is not supported\n");
315 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
316 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);
317 }
318
319 /* remove unsupported modes */
320 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
321 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Pause_BIT);
322 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Asym_Pause_BIT);
323
324 if (emac->phy_if == PHY_INTERFACE_MODE_MII)
325 phy_set_max_speed(ndev->phydev, SPEED_100);
326
327 return 0;
328 }
329
prueth_iep_gettime(void * clockops_data,struct ptp_system_timestamp * sts)330 static u64 prueth_iep_gettime(void *clockops_data, struct ptp_system_timestamp *sts)
331 {
332 u32 hi_rollover_count, hi_rollover_count_r;
333 struct prueth_emac *emac = clockops_data;
334 struct prueth *prueth = emac->prueth;
335 void __iomem *fw_hi_r_count_addr;
336 void __iomem *fw_count_hi_addr;
337 u32 iepcount_hi, iepcount_hi_r;
338 unsigned long flags;
339 u32 iepcount_lo;
340 u64 ts = 0;
341
342 fw_count_hi_addr = prueth->shram.va + TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET;
343 fw_hi_r_count_addr = prueth->shram.va + TIMESYNC_FW_WC_HI_ROLLOVER_COUNT_OFFSET;
344
345 local_irq_save(flags);
346 do {
347 iepcount_hi = icss_iep_get_count_hi(emac->iep);
348 iepcount_hi += readl(fw_count_hi_addr);
349 hi_rollover_count = readl(fw_hi_r_count_addr);
350 ptp_read_system_prets(sts);
351 iepcount_lo = icss_iep_get_count_low(emac->iep);
352 ptp_read_system_postts(sts);
353
354 iepcount_hi_r = icss_iep_get_count_hi(emac->iep);
355 iepcount_hi_r += readl(fw_count_hi_addr);
356 hi_rollover_count_r = readl(fw_hi_r_count_addr);
357 } while ((iepcount_hi_r != iepcount_hi) ||
358 (hi_rollover_count != hi_rollover_count_r));
359 local_irq_restore(flags);
360
361 ts = ((u64)hi_rollover_count) << 23 | iepcount_hi;
362 ts = ts * (u64)IEP_DEFAULT_CYCLE_TIME_NS + iepcount_lo;
363
364 return ts;
365 }
366
prueth_iep_settime(void * clockops_data,u64 ns)367 static void prueth_iep_settime(void *clockops_data, u64 ns)
368 {
369 struct icssg_setclock_desc __iomem *sc_descp;
370 struct prueth_emac *emac = clockops_data;
371 struct icssg_setclock_desc sc_desc;
372 u64 cyclecount;
373 u32 cycletime;
374 int timeout;
375
376 if (!emac->fw_running)
377 return;
378
379 sc_descp = emac->prueth->shram.va + TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET;
380
381 cycletime = IEP_DEFAULT_CYCLE_TIME_NS;
382 cyclecount = ns / cycletime;
383
384 memset(&sc_desc, 0, sizeof(sc_desc));
385 sc_desc.margin = cycletime - 1000;
386 sc_desc.cyclecounter0_set = cyclecount & GENMASK(31, 0);
387 sc_desc.cyclecounter1_set = (cyclecount & GENMASK(63, 32)) >> 32;
388 sc_desc.iepcount_set = ns % cycletime;
389 /* Count from 0 to (cycle time) - emac->iep->def_inc */
390 sc_desc.CMP0_current = cycletime - emac->iep->def_inc;
391
392 memcpy_toio(sc_descp, &sc_desc, sizeof(sc_desc));
393
394 writeb(1, &sc_descp->request);
395
396 timeout = 5; /* fw should take 2-3 ms */
397 while (timeout--) {
398 if (readb(&sc_descp->acknowledgment))
399 return;
400
401 usleep_range(500, 1000);
402 }
403
404 dev_err(emac->prueth->dev, "settime timeout\n");
405 }
406
prueth_perout_enable(void * clockops_data,struct ptp_perout_request * req,int on,u64 * cmp)407 static int prueth_perout_enable(void *clockops_data,
408 struct ptp_perout_request *req, int on,
409 u64 *cmp)
410 {
411 struct prueth_emac *emac = clockops_data;
412 u32 reduction_factor = 0, offset = 0;
413 struct timespec64 ts;
414 u64 ns_period;
415
416 if (!on)
417 return 0;
418
419 /* Any firmware specific stuff for PPS/PEROUT handling */
420 ts.tv_sec = req->period.sec;
421 ts.tv_nsec = req->period.nsec;
422 ns_period = timespec64_to_ns(&ts);
423
424 /* f/w doesn't support period less than cycle time */
425 if (ns_period < IEP_DEFAULT_CYCLE_TIME_NS)
426 return -ENXIO;
427
428 reduction_factor = ns_period / IEP_DEFAULT_CYCLE_TIME_NS;
429 offset = ns_period % IEP_DEFAULT_CYCLE_TIME_NS;
430
431 /* f/w requires at least 1uS within a cycle so CMP
432 * can trigger after SYNC is enabled
433 */
434 if (offset < 5 * NSEC_PER_USEC)
435 offset = 5 * NSEC_PER_USEC;
436
437 /* if offset is close to cycle time then we will miss
438 * the CMP event for last tick when IEP rolls over.
439 * In normal mode, IEP tick is 4ns.
440 * In slow compensation it could be 0ns or 8ns at
441 * every slow compensation cycle.
442 */
443 if (offset > IEP_DEFAULT_CYCLE_TIME_NS - 8)
444 offset = IEP_DEFAULT_CYCLE_TIME_NS - 8;
445
446 /* we're in shadow mode so need to set upper 32-bits */
447 *cmp = (u64)offset << 32;
448
449 writel(reduction_factor, emac->prueth->shram.va +
450 TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET);
451
452 writel(0, emac->prueth->shram.va +
453 TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET);
454
455 return 0;
456 }
457
458 const struct icss_iep_clockops prueth_iep_clockops = {
459 .settime = prueth_iep_settime,
460 .gettime = prueth_iep_gettime,
461 .perout_enable = prueth_perout_enable,
462 };
463
icssg_prueth_add_mcast(struct net_device * ndev,const u8 * addr)464 static int icssg_prueth_add_mcast(struct net_device *ndev, const u8 *addr)
465 {
466 struct prueth_emac *emac = netdev_priv(ndev);
467 int port_mask = BIT(emac->port_id);
468
469 port_mask |= icssg_fdb_lookup(emac, addr, 0);
470 icssg_fdb_add_del(emac, addr, 0, port_mask, true);
471 icssg_vtbl_modify(emac, 0, port_mask, port_mask, true);
472
473 return 0;
474 }
475
icssg_prueth_del_mcast(struct net_device * ndev,const u8 * addr)476 static int icssg_prueth_del_mcast(struct net_device *ndev, const u8 *addr)
477 {
478 struct prueth_emac *emac = netdev_priv(ndev);
479 int port_mask = BIT(emac->port_id);
480 int other_port_mask;
481
482 other_port_mask = port_mask ^ icssg_fdb_lookup(emac, addr, 0);
483
484 icssg_fdb_add_del(emac, addr, 0, port_mask, false);
485 icssg_vtbl_modify(emac, 0, port_mask, port_mask, false);
486
487 if (other_port_mask) {
488 icssg_fdb_add_del(emac, addr, 0, other_port_mask, true);
489 icssg_vtbl_modify(emac, 0, other_port_mask, other_port_mask, true);
490 }
491
492 return 0;
493 }
494
icssg_prueth_hsr_add_mcast(struct net_device * ndev,const u8 * addr)495 static int icssg_prueth_hsr_add_mcast(struct net_device *ndev, const u8 *addr)
496 {
497 struct prueth_emac *emac = netdev_priv(ndev);
498 struct prueth *prueth = emac->prueth;
499
500 icssg_fdb_add_del(emac, addr, prueth->default_vlan,
501 ICSSG_FDB_ENTRY_P0_MEMBERSHIP |
502 ICSSG_FDB_ENTRY_P1_MEMBERSHIP |
503 ICSSG_FDB_ENTRY_P2_MEMBERSHIP |
504 ICSSG_FDB_ENTRY_BLOCK, true);
505
506 icssg_vtbl_modify(emac, emac->port_vlan, BIT(emac->port_id),
507 BIT(emac->port_id), true);
508 return 0;
509 }
510
icssg_prueth_hsr_del_mcast(struct net_device * ndev,const u8 * addr)511 static int icssg_prueth_hsr_del_mcast(struct net_device *ndev, const u8 *addr)
512 {
513 struct prueth_emac *emac = netdev_priv(ndev);
514 struct prueth *prueth = emac->prueth;
515
516 icssg_fdb_add_del(emac, addr, prueth->default_vlan,
517 ICSSG_FDB_ENTRY_P0_MEMBERSHIP |
518 ICSSG_FDB_ENTRY_P1_MEMBERSHIP |
519 ICSSG_FDB_ENTRY_P2_MEMBERSHIP |
520 ICSSG_FDB_ENTRY_BLOCK, false);
521
522 return 0;
523 }
524
525 /**
526 * emac_ndo_open - EMAC device open
527 * @ndev: network adapter device
528 *
529 * Called when system wants to start the interface.
530 *
531 * Return: 0 for a successful open, or appropriate error code
532 */
emac_ndo_open(struct net_device * ndev)533 static int emac_ndo_open(struct net_device *ndev)
534 {
535 struct prueth_emac *emac = netdev_priv(ndev);
536 int ret, i, num_data_chn = emac->tx_ch_num;
537 struct prueth *prueth = emac->prueth;
538 int slice = prueth_emac_slice(emac);
539 struct device *dev = prueth->dev;
540 int max_rx_flows;
541 int rx_flow;
542
543 /* clear SMEM and MSMC settings for all slices */
544 if (!prueth->emacs_initialized) {
545 memset_io(prueth->msmcram.va, 0, prueth->msmcram.size);
546 memset_io(prueth->shram.va, 0, ICSSG_CONFIG_OFFSET_SLICE1 * PRUETH_NUM_MACS);
547 }
548
549 /* set h/w MAC as user might have re-configured */
550 ether_addr_copy(emac->mac_addr, ndev->dev_addr);
551
552 icssg_class_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr);
553 icssg_class_default(prueth->miig_rt, slice, 0, false);
554 icssg_ft1_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr);
555
556 /* Notify the stack of the actual queue counts. */
557 ret = netif_set_real_num_tx_queues(ndev, num_data_chn);
558 if (ret) {
559 dev_err(dev, "cannot set real number of tx queues\n");
560 return ret;
561 }
562
563 init_completion(&emac->cmd_complete);
564 ret = prueth_init_tx_chns(emac);
565 if (ret) {
566 dev_err(dev, "failed to init tx channel: %d\n", ret);
567 return ret;
568 }
569
570 max_rx_flows = PRUETH_MAX_RX_FLOWS;
571 ret = prueth_init_rx_chns(emac, &emac->rx_chns, "rx",
572 max_rx_flows, PRUETH_MAX_RX_DESC);
573 if (ret) {
574 dev_err(dev, "failed to init rx channel: %d\n", ret);
575 goto cleanup_tx;
576 }
577
578 ret = prueth_ndev_add_tx_napi(emac);
579 if (ret)
580 goto cleanup_rx;
581
582 /* we use only the highest priority flow for now i.e. @irq[3] */
583 rx_flow = PRUETH_RX_FLOW_DATA;
584 ret = request_irq(emac->rx_chns.irq[rx_flow], prueth_rx_irq,
585 IRQF_TRIGGER_HIGH, dev_name(dev), emac);
586 if (ret) {
587 dev_err(dev, "unable to request RX IRQ\n");
588 goto cleanup_napi;
589 }
590
591 /* reset and start PRU firmware */
592 ret = prueth_emac_start(prueth, emac);
593 if (ret)
594 goto free_rx_irq;
595
596 icssg_mii_update_mtu(prueth->mii_rt, slice, ndev->max_mtu);
597
598 if (!prueth->emacs_initialized) {
599 ret = icss_iep_init(emac->iep, &prueth_iep_clockops,
600 emac, IEP_DEFAULT_CYCLE_TIME_NS);
601 }
602
603 ret = request_threaded_irq(emac->tx_ts_irq, NULL, prueth_tx_ts_irq,
604 IRQF_ONESHOT, dev_name(dev), emac);
605 if (ret)
606 goto stop;
607
608 /* Prepare RX */
609 ret = prueth_prepare_rx_chan(emac, &emac->rx_chns, PRUETH_MAX_PKT_SIZE);
610 if (ret)
611 goto free_tx_ts_irq;
612
613 ret = k3_udma_glue_enable_rx_chn(emac->rx_chns.rx_chn);
614 if (ret)
615 goto reset_rx_chn;
616
617 for (i = 0; i < emac->tx_ch_num; i++) {
618 ret = k3_udma_glue_enable_tx_chn(emac->tx_chns[i].tx_chn);
619 if (ret)
620 goto reset_tx_chan;
621 }
622
623 /* Enable NAPI in Tx and Rx direction */
624 for (i = 0; i < emac->tx_ch_num; i++)
625 napi_enable(&emac->tx_chns[i].napi_tx);
626 napi_enable(&emac->napi_rx);
627
628 /* start PHY */
629 phy_start(ndev->phydev);
630
631 prueth->emacs_initialized++;
632
633 queue_work(system_long_wq, &emac->stats_work.work);
634
635 return 0;
636
637 reset_tx_chan:
638 /* Since interface is not yet up, there is wouldn't be
639 * any SKB for completion. So set false to free_skb
640 */
641 prueth_reset_tx_chan(emac, i, false);
642 reset_rx_chn:
643 prueth_reset_rx_chan(&emac->rx_chns, max_rx_flows, false);
644 free_tx_ts_irq:
645 free_irq(emac->tx_ts_irq, emac);
646 stop:
647 prueth_emac_stop(emac);
648 free_rx_irq:
649 free_irq(emac->rx_chns.irq[rx_flow], emac);
650 cleanup_napi:
651 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num);
652 cleanup_rx:
653 prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows);
654 cleanup_tx:
655 prueth_cleanup_tx_chns(emac);
656
657 return ret;
658 }
659
660 /**
661 * emac_ndo_stop - EMAC device stop
662 * @ndev: network adapter device
663 *
664 * Called when system wants to stop or down the interface.
665 *
666 * Return: Always 0 (Success)
667 */
emac_ndo_stop(struct net_device * ndev)668 static int emac_ndo_stop(struct net_device *ndev)
669 {
670 struct prueth_emac *emac = netdev_priv(ndev);
671 struct prueth *prueth = emac->prueth;
672 int rx_flow = PRUETH_RX_FLOW_DATA;
673 int max_rx_flows;
674 int ret, i;
675
676 /* inform the upper layers. */
677 netif_tx_stop_all_queues(ndev);
678
679 /* block packets from wire */
680 if (ndev->phydev)
681 phy_stop(ndev->phydev);
682
683 icssg_class_disable(prueth->miig_rt, prueth_emac_slice(emac));
684
685 if (emac->prueth->is_hsr_offload_mode)
686 __dev_mc_unsync(ndev, icssg_prueth_hsr_del_mcast);
687 else
688 __dev_mc_unsync(ndev, icssg_prueth_del_mcast);
689
690 atomic_set(&emac->tdown_cnt, emac->tx_ch_num);
691 /* ensure new tdown_cnt value is visible */
692 smp_mb__after_atomic();
693 /* tear down and disable UDMA channels */
694 reinit_completion(&emac->tdown_complete);
695 for (i = 0; i < emac->tx_ch_num; i++)
696 k3_udma_glue_tdown_tx_chn(emac->tx_chns[i].tx_chn, false);
697
698 ret = wait_for_completion_timeout(&emac->tdown_complete,
699 msecs_to_jiffies(1000));
700 if (!ret)
701 netdev_err(ndev, "tx teardown timeout\n");
702
703 prueth_reset_tx_chan(emac, emac->tx_ch_num, true);
704 for (i = 0; i < emac->tx_ch_num; i++) {
705 napi_disable(&emac->tx_chns[i].napi_tx);
706 hrtimer_cancel(&emac->tx_chns[i].tx_hrtimer);
707 }
708
709 max_rx_flows = PRUETH_MAX_RX_FLOWS;
710 k3_udma_glue_tdown_rx_chn(emac->rx_chns.rx_chn, true);
711
712 prueth_reset_rx_chan(&emac->rx_chns, max_rx_flows, true);
713
714 napi_disable(&emac->napi_rx);
715 hrtimer_cancel(&emac->rx_hrtimer);
716
717 cancel_work_sync(&emac->rx_mode_work);
718
719 /* Destroying the queued work in ndo_stop() */
720 cancel_delayed_work_sync(&emac->stats_work);
721
722 if (prueth->emacs_initialized == 1)
723 icss_iep_exit(emac->iep);
724
725 /* stop PRUs */
726 prueth_emac_stop(emac);
727
728 free_irq(emac->tx_ts_irq, emac);
729
730 free_irq(emac->rx_chns.irq[rx_flow], emac);
731 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num);
732
733 prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows);
734 prueth_cleanup_tx_chns(emac);
735
736 prueth->emacs_initialized--;
737
738 return 0;
739 }
740
emac_ndo_set_rx_mode_work(struct work_struct * work)741 static void emac_ndo_set_rx_mode_work(struct work_struct *work)
742 {
743 struct prueth_emac *emac = container_of(work, struct prueth_emac, rx_mode_work);
744 struct net_device *ndev = emac->ndev;
745 bool promisc, allmulti;
746
747 if (!netif_running(ndev))
748 return;
749
750 promisc = ndev->flags & IFF_PROMISC;
751 allmulti = ndev->flags & IFF_ALLMULTI;
752 icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_DISABLE);
753 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_DISABLE);
754
755 if (promisc) {
756 icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_ENABLE);
757 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE);
758 return;
759 }
760
761 if (allmulti) {
762 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE);
763 return;
764 }
765
766 if (emac->prueth->is_hsr_offload_mode)
767 __dev_mc_sync(ndev, icssg_prueth_hsr_add_mcast,
768 icssg_prueth_hsr_del_mcast);
769 else
770 __dev_mc_sync(ndev, icssg_prueth_add_mcast,
771 icssg_prueth_del_mcast);
772 }
773
774 /**
775 * emac_ndo_set_rx_mode - EMAC set receive mode function
776 * @ndev: The EMAC network adapter
777 *
778 * Called when system wants to set the receive mode of the device.
779 *
780 */
emac_ndo_set_rx_mode(struct net_device * ndev)781 static void emac_ndo_set_rx_mode(struct net_device *ndev)
782 {
783 struct prueth_emac *emac = netdev_priv(ndev);
784
785 queue_work(emac->cmd_wq, &emac->rx_mode_work);
786 }
787
emac_ndo_fix_features(struct net_device * ndev,netdev_features_t features)788 static netdev_features_t emac_ndo_fix_features(struct net_device *ndev,
789 netdev_features_t features)
790 {
791 /* hsr tag insertion offload and hsr dup offload are tightly coupled in
792 * firmware implementation. Both these features need to be enabled /
793 * disabled together.
794 */
795 if (!(ndev->features & (NETIF_F_HW_HSR_DUP | NETIF_F_HW_HSR_TAG_INS)))
796 if ((features & NETIF_F_HW_HSR_DUP) ||
797 (features & NETIF_F_HW_HSR_TAG_INS))
798 features |= NETIF_F_HW_HSR_DUP |
799 NETIF_F_HW_HSR_TAG_INS;
800
801 if ((ndev->features & NETIF_F_HW_HSR_DUP) ||
802 (ndev->features & NETIF_F_HW_HSR_TAG_INS))
803 if (!(features & NETIF_F_HW_HSR_DUP) ||
804 !(features & NETIF_F_HW_HSR_TAG_INS))
805 features &= ~(NETIF_F_HW_HSR_DUP |
806 NETIF_F_HW_HSR_TAG_INS);
807
808 return features;
809 }
810
811 static const struct net_device_ops emac_netdev_ops = {
812 .ndo_open = emac_ndo_open,
813 .ndo_stop = emac_ndo_stop,
814 .ndo_start_xmit = icssg_ndo_start_xmit,
815 .ndo_set_mac_address = eth_mac_addr,
816 .ndo_validate_addr = eth_validate_addr,
817 .ndo_tx_timeout = icssg_ndo_tx_timeout,
818 .ndo_set_rx_mode = emac_ndo_set_rx_mode,
819 .ndo_eth_ioctl = icssg_ndo_ioctl,
820 .ndo_get_stats64 = icssg_ndo_get_stats64,
821 .ndo_get_phys_port_name = icssg_ndo_get_phys_port_name,
822 .ndo_fix_features = emac_ndo_fix_features,
823 };
824
prueth_netdev_init(struct prueth * prueth,struct device_node * eth_node)825 static int prueth_netdev_init(struct prueth *prueth,
826 struct device_node *eth_node)
827 {
828 int ret, num_tx_chn = PRUETH_MAX_TX_QUEUES;
829 struct prueth_emac *emac;
830 struct net_device *ndev;
831 enum prueth_port port;
832 const char *irq_name;
833 enum prueth_mac mac;
834
835 port = prueth_node_port(eth_node);
836 if (port == PRUETH_PORT_INVALID)
837 return -EINVAL;
838
839 mac = prueth_node_mac(eth_node);
840 if (mac == PRUETH_MAC_INVALID)
841 return -EINVAL;
842
843 ndev = alloc_etherdev_mq(sizeof(*emac), num_tx_chn);
844 if (!ndev)
845 return -ENOMEM;
846
847 emac = netdev_priv(ndev);
848 emac->prueth = prueth;
849 emac->ndev = ndev;
850 emac->port_id = port;
851 emac->cmd_wq = create_singlethread_workqueue("icssg_cmd_wq");
852 if (!emac->cmd_wq) {
853 ret = -ENOMEM;
854 goto free_ndev;
855 }
856 INIT_WORK(&emac->rx_mode_work, emac_ndo_set_rx_mode_work);
857
858 INIT_DELAYED_WORK(&emac->stats_work, icssg_stats_work_handler);
859
860 ret = pruss_request_mem_region(prueth->pruss,
861 port == PRUETH_PORT_MII0 ?
862 PRUSS_MEM_DRAM0 : PRUSS_MEM_DRAM1,
863 &emac->dram);
864 if (ret) {
865 dev_err(prueth->dev, "unable to get DRAM: %d\n", ret);
866 ret = -ENOMEM;
867 goto free_wq;
868 }
869
870 emac->tx_ch_num = 1;
871
872 irq_name = "tx_ts0";
873 if (emac->port_id == PRUETH_PORT_MII1)
874 irq_name = "tx_ts1";
875 emac->tx_ts_irq = platform_get_irq_byname_optional(prueth->pdev, irq_name);
876 if (emac->tx_ts_irq < 0) {
877 ret = dev_err_probe(prueth->dev, emac->tx_ts_irq, "could not get tx_ts_irq\n");
878 goto free;
879 }
880
881 SET_NETDEV_DEV(ndev, prueth->dev);
882 spin_lock_init(&emac->lock);
883 mutex_init(&emac->cmd_lock);
884
885 emac->phy_node = of_parse_phandle(eth_node, "phy-handle", 0);
886 if (!emac->phy_node && !of_phy_is_fixed_link(eth_node)) {
887 dev_err(prueth->dev, "couldn't find phy-handle\n");
888 ret = -ENODEV;
889 goto free;
890 } else if (of_phy_is_fixed_link(eth_node)) {
891 ret = of_phy_register_fixed_link(eth_node);
892 if (ret) {
893 ret = dev_err_probe(prueth->dev, ret,
894 "failed to register fixed-link phy\n");
895 goto free;
896 }
897
898 emac->phy_node = eth_node;
899 }
900
901 ret = of_get_phy_mode(eth_node, &emac->phy_if);
902 if (ret) {
903 dev_err(prueth->dev, "could not get phy-mode property\n");
904 goto free;
905 }
906
907 if (emac->phy_if != PHY_INTERFACE_MODE_MII &&
908 !phy_interface_mode_is_rgmii(emac->phy_if)) {
909 dev_err(prueth->dev, "PHY mode unsupported %s\n", phy_modes(emac->phy_if));
910 ret = -EINVAL;
911 goto free;
912 }
913
914 /* AM65 SR2.0 has TX Internal delay always enabled by hardware
915 * and it is not possible to disable TX Internal delay. The below
916 * switch case block describes how we handle different phy modes
917 * based on hardware restriction.
918 */
919 switch (emac->phy_if) {
920 case PHY_INTERFACE_MODE_RGMII_ID:
921 emac->phy_if = PHY_INTERFACE_MODE_RGMII_RXID;
922 break;
923 case PHY_INTERFACE_MODE_RGMII_TXID:
924 emac->phy_if = PHY_INTERFACE_MODE_RGMII;
925 break;
926 case PHY_INTERFACE_MODE_RGMII:
927 case PHY_INTERFACE_MODE_RGMII_RXID:
928 dev_err(prueth->dev, "RGMII mode without TX delay is not supported");
929 ret = -EINVAL;
930 goto free;
931 default:
932 break;
933 }
934
935 /* get mac address from DT and set private and netdev addr */
936 ret = of_get_ethdev_address(eth_node, ndev);
937 if (!is_valid_ether_addr(ndev->dev_addr)) {
938 eth_hw_addr_random(ndev);
939 dev_warn(prueth->dev, "port %d: using random MAC addr: %pM\n",
940 port, ndev->dev_addr);
941 }
942 ether_addr_copy(emac->mac_addr, ndev->dev_addr);
943
944 ndev->dev.of_node = eth_node;
945 ndev->min_mtu = PRUETH_MIN_PKT_SIZE;
946 ndev->max_mtu = PRUETH_MAX_MTU;
947 ndev->netdev_ops = &emac_netdev_ops;
948 ndev->ethtool_ops = &icssg_ethtool_ops;
949 ndev->hw_features = NETIF_F_SG;
950 ndev->features = ndev->hw_features;
951 ndev->hw_features |= NETIF_PRUETH_HSR_OFFLOAD_FEATURES;
952
953 netif_napi_add(ndev, &emac->napi_rx, icssg_napi_rx_poll);
954 hrtimer_init(&emac->rx_hrtimer, CLOCK_MONOTONIC,
955 HRTIMER_MODE_REL_PINNED);
956 emac->rx_hrtimer.function = &emac_rx_timer_callback;
957 prueth->emac[mac] = emac;
958
959 return 0;
960
961 free:
962 pruss_release_mem_region(prueth->pruss, &emac->dram);
963 free_wq:
964 destroy_workqueue(emac->cmd_wq);
965 free_ndev:
966 emac->ndev = NULL;
967 prueth->emac[mac] = NULL;
968 free_netdev(ndev);
969
970 return ret;
971 }
972
prueth_dev_check(const struct net_device * ndev)973 bool prueth_dev_check(const struct net_device *ndev)
974 {
975 if (ndev->netdev_ops == &emac_netdev_ops && netif_running(ndev)) {
976 struct prueth_emac *emac = netdev_priv(ndev);
977
978 return emac->prueth->is_switch_mode;
979 }
980
981 return false;
982 }
983
prueth_offload_fwd_mark_update(struct prueth * prueth)984 static void prueth_offload_fwd_mark_update(struct prueth *prueth)
985 {
986 int set_val = 0;
987 int i;
988
989 if (prueth->br_members == (BIT(PRUETH_PORT_MII0) | BIT(PRUETH_PORT_MII1)))
990 set_val = 1;
991
992 dev_dbg(prueth->dev, "set offload_fwd_mark %d\n", set_val);
993
994 for (i = PRUETH_MAC0; i < PRUETH_NUM_MACS; i++) {
995 struct prueth_emac *emac = prueth->emac[i];
996
997 if (!emac || !emac->ndev)
998 continue;
999
1000 emac->offload_fwd_mark = set_val;
1001 }
1002 }
1003
prueth_emac_restart(struct prueth * prueth)1004 static void prueth_emac_restart(struct prueth *prueth)
1005 {
1006 struct prueth_emac *emac0 = prueth->emac[PRUETH_MAC0];
1007 struct prueth_emac *emac1 = prueth->emac[PRUETH_MAC1];
1008
1009 /* Detach the net_device for both PRUeth ports*/
1010 if (netif_running(emac0->ndev))
1011 netif_device_detach(emac0->ndev);
1012 if (netif_running(emac1->ndev))
1013 netif_device_detach(emac1->ndev);
1014
1015 /* Disable both PRUeth ports */
1016 icssg_set_port_state(emac0, ICSSG_EMAC_PORT_DISABLE);
1017 icssg_set_port_state(emac1, ICSSG_EMAC_PORT_DISABLE);
1018
1019 /* Stop both pru cores for both PRUeth ports*/
1020 prueth_emac_stop(emac0);
1021 prueth->emacs_initialized--;
1022 prueth_emac_stop(emac1);
1023 prueth->emacs_initialized--;
1024
1025 /* Start both pru cores for both PRUeth ports */
1026 prueth_emac_start(prueth, emac0);
1027 prueth->emacs_initialized++;
1028 prueth_emac_start(prueth, emac1);
1029 prueth->emacs_initialized++;
1030
1031 /* Enable forwarding for both PRUeth ports */
1032 icssg_set_port_state(emac0, ICSSG_EMAC_PORT_FORWARD);
1033 icssg_set_port_state(emac1, ICSSG_EMAC_PORT_FORWARD);
1034
1035 /* Attache net_device for both PRUeth ports */
1036 netif_device_attach(emac0->ndev);
1037 netif_device_attach(emac1->ndev);
1038 }
1039
icssg_change_mode(struct prueth * prueth)1040 static void icssg_change_mode(struct prueth *prueth)
1041 {
1042 struct prueth_emac *emac;
1043 int mac;
1044
1045 prueth_emac_restart(prueth);
1046
1047 for (mac = PRUETH_MAC0; mac < PRUETH_NUM_MACS; mac++) {
1048 emac = prueth->emac[mac];
1049 if (prueth->is_hsr_offload_mode) {
1050 if (emac->ndev->features & NETIF_F_HW_HSR_TAG_RM)
1051 icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_ENABLE);
1052 else
1053 icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_DISABLE);
1054 }
1055
1056 if (netif_running(emac->ndev)) {
1057 icssg_fdb_add_del(emac, eth_stp_addr, prueth->default_vlan,
1058 ICSSG_FDB_ENTRY_P0_MEMBERSHIP |
1059 ICSSG_FDB_ENTRY_P1_MEMBERSHIP |
1060 ICSSG_FDB_ENTRY_P2_MEMBERSHIP |
1061 ICSSG_FDB_ENTRY_BLOCK,
1062 true);
1063 icssg_vtbl_modify(emac, emac->port_vlan | DEFAULT_VID,
1064 BIT(emac->port_id) | DEFAULT_PORT_MASK,
1065 BIT(emac->port_id) | DEFAULT_UNTAG_MASK,
1066 true);
1067 if (prueth->is_hsr_offload_mode)
1068 icssg_vtbl_modify(emac, DEFAULT_VID,
1069 DEFAULT_PORT_MASK,
1070 DEFAULT_UNTAG_MASK, true);
1071 icssg_set_pvid(prueth, emac->port_vlan, emac->port_id);
1072 if (prueth->is_switch_mode)
1073 icssg_set_port_state(emac, ICSSG_EMAC_PORT_VLAN_AWARE_ENABLE);
1074 }
1075 }
1076 }
1077
prueth_netdevice_port_link(struct net_device * ndev,struct net_device * br_ndev,struct netlink_ext_ack * extack)1078 static int prueth_netdevice_port_link(struct net_device *ndev,
1079 struct net_device *br_ndev,
1080 struct netlink_ext_ack *extack)
1081 {
1082 struct prueth_emac *emac = netdev_priv(ndev);
1083 struct prueth *prueth = emac->prueth;
1084 int err;
1085
1086 if (!prueth->br_members) {
1087 prueth->hw_bridge_dev = br_ndev;
1088 } else {
1089 /* This is adding the port to a second bridge, this is
1090 * unsupported
1091 */
1092 if (prueth->hw_bridge_dev != br_ndev)
1093 return -EOPNOTSUPP;
1094 }
1095
1096 err = switchdev_bridge_port_offload(br_ndev, ndev, emac,
1097 &prueth->prueth_switchdev_nb,
1098 &prueth->prueth_switchdev_bl_nb,
1099 false, extack);
1100 if (err)
1101 return err;
1102
1103 prueth->br_members |= BIT(emac->port_id);
1104
1105 if (!prueth->is_switch_mode) {
1106 if (prueth->br_members & BIT(PRUETH_PORT_MII0) &&
1107 prueth->br_members & BIT(PRUETH_PORT_MII1)) {
1108 prueth->is_switch_mode = true;
1109 prueth->default_vlan = 1;
1110 emac->port_vlan = prueth->default_vlan;
1111 icssg_change_mode(prueth);
1112 }
1113 }
1114
1115 prueth_offload_fwd_mark_update(prueth);
1116
1117 return NOTIFY_DONE;
1118 }
1119
prueth_netdevice_port_unlink(struct net_device * ndev)1120 static void prueth_netdevice_port_unlink(struct net_device *ndev)
1121 {
1122 struct prueth_emac *emac = netdev_priv(ndev);
1123 struct prueth *prueth = emac->prueth;
1124
1125 prueth->br_members &= ~BIT(emac->port_id);
1126
1127 if (prueth->is_switch_mode) {
1128 prueth->is_switch_mode = false;
1129 emac->port_vlan = 0;
1130 prueth_emac_restart(prueth);
1131 }
1132
1133 prueth_offload_fwd_mark_update(prueth);
1134
1135 if (!prueth->br_members)
1136 prueth->hw_bridge_dev = NULL;
1137 }
1138
prueth_hsr_port_link(struct net_device * ndev)1139 static int prueth_hsr_port_link(struct net_device *ndev)
1140 {
1141 struct prueth_emac *emac = netdev_priv(ndev);
1142 struct prueth *prueth = emac->prueth;
1143 struct prueth_emac *emac0;
1144 struct prueth_emac *emac1;
1145
1146 emac0 = prueth->emac[PRUETH_MAC0];
1147 emac1 = prueth->emac[PRUETH_MAC1];
1148
1149 if (prueth->is_switch_mode)
1150 return -EOPNOTSUPP;
1151
1152 prueth->hsr_members |= BIT(emac->port_id);
1153 if (!prueth->is_hsr_offload_mode) {
1154 if (prueth->hsr_members & BIT(PRUETH_PORT_MII0) &&
1155 prueth->hsr_members & BIT(PRUETH_PORT_MII1)) {
1156 if (!(emac0->ndev->features &
1157 NETIF_PRUETH_HSR_OFFLOAD_FEATURES) &&
1158 !(emac1->ndev->features &
1159 NETIF_PRUETH_HSR_OFFLOAD_FEATURES))
1160 return -EOPNOTSUPP;
1161 prueth->is_hsr_offload_mode = true;
1162 prueth->default_vlan = 1;
1163 emac0->port_vlan = prueth->default_vlan;
1164 emac1->port_vlan = prueth->default_vlan;
1165 icssg_change_mode(prueth);
1166 netdev_dbg(ndev, "Enabling HSR offload mode\n");
1167 }
1168 }
1169
1170 return 0;
1171 }
1172
prueth_hsr_port_unlink(struct net_device * ndev)1173 static void prueth_hsr_port_unlink(struct net_device *ndev)
1174 {
1175 struct prueth_emac *emac = netdev_priv(ndev);
1176 struct prueth *prueth = emac->prueth;
1177 struct prueth_emac *emac0;
1178 struct prueth_emac *emac1;
1179
1180 emac0 = prueth->emac[PRUETH_MAC0];
1181 emac1 = prueth->emac[PRUETH_MAC1];
1182
1183 prueth->hsr_members &= ~BIT(emac->port_id);
1184 if (prueth->is_hsr_offload_mode) {
1185 prueth->is_hsr_offload_mode = false;
1186 emac0->port_vlan = 0;
1187 emac1->port_vlan = 0;
1188 prueth->hsr_dev = NULL;
1189 prueth_emac_restart(prueth);
1190 netdev_dbg(ndev, "Disabling HSR Offload mode\n");
1191 }
1192 }
1193
1194 /* netdev notifier */
prueth_netdevice_event(struct notifier_block * unused,unsigned long event,void * ptr)1195 static int prueth_netdevice_event(struct notifier_block *unused,
1196 unsigned long event, void *ptr)
1197 {
1198 struct netlink_ext_ack *extack = netdev_notifier_info_to_extack(ptr);
1199 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
1200 struct netdev_notifier_changeupper_info *info;
1201 struct prueth_emac *emac = netdev_priv(ndev);
1202 struct prueth *prueth = emac->prueth;
1203 int ret = NOTIFY_DONE;
1204
1205 if (ndev->netdev_ops != &emac_netdev_ops)
1206 return NOTIFY_DONE;
1207
1208 switch (event) {
1209 case NETDEV_CHANGEUPPER:
1210 info = ptr;
1211
1212 if ((ndev->features & NETIF_PRUETH_HSR_OFFLOAD_FEATURES) &&
1213 is_hsr_master(info->upper_dev)) {
1214 if (info->linking) {
1215 if (!prueth->hsr_dev) {
1216 prueth->hsr_dev = info->upper_dev;
1217 icssg_class_set_host_mac_addr(prueth->miig_rt,
1218 prueth->hsr_dev->dev_addr);
1219 } else {
1220 if (prueth->hsr_dev != info->upper_dev) {
1221 netdev_dbg(ndev, "Both interfaces must be linked to same upper device\n");
1222 return -EOPNOTSUPP;
1223 }
1224 }
1225 prueth_hsr_port_link(ndev);
1226 } else {
1227 prueth_hsr_port_unlink(ndev);
1228 }
1229 }
1230
1231 if (netif_is_bridge_master(info->upper_dev)) {
1232 if (info->linking)
1233 ret = prueth_netdevice_port_link(ndev, info->upper_dev, extack);
1234 else
1235 prueth_netdevice_port_unlink(ndev);
1236 }
1237 break;
1238 default:
1239 return NOTIFY_DONE;
1240 }
1241
1242 return notifier_from_errno(ret);
1243 }
1244
prueth_register_notifiers(struct prueth * prueth)1245 static int prueth_register_notifiers(struct prueth *prueth)
1246 {
1247 int ret = 0;
1248
1249 prueth->prueth_netdevice_nb.notifier_call = &prueth_netdevice_event;
1250 ret = register_netdevice_notifier(&prueth->prueth_netdevice_nb);
1251 if (ret) {
1252 dev_err(prueth->dev, "can't register netdevice notifier\n");
1253 return ret;
1254 }
1255
1256 ret = prueth_switchdev_register_notifiers(prueth);
1257 if (ret)
1258 unregister_netdevice_notifier(&prueth->prueth_netdevice_nb);
1259
1260 return ret;
1261 }
1262
prueth_unregister_notifiers(struct prueth * prueth)1263 static void prueth_unregister_notifiers(struct prueth *prueth)
1264 {
1265 prueth_switchdev_unregister_notifiers(prueth);
1266 unregister_netdevice_notifier(&prueth->prueth_netdevice_nb);
1267 }
1268
prueth_probe(struct platform_device * pdev)1269 static int prueth_probe(struct platform_device *pdev)
1270 {
1271 struct device_node *eth_node, *eth_ports_node;
1272 struct device_node *eth0_node = NULL;
1273 struct device_node *eth1_node = NULL;
1274 struct genpool_data_align gp_data = {
1275 .align = SZ_64K,
1276 };
1277 struct device *dev = &pdev->dev;
1278 struct device_node *np;
1279 struct prueth *prueth;
1280 struct pruss *pruss;
1281 u32 msmc_ram_size;
1282 int i, ret;
1283
1284 np = dev->of_node;
1285
1286 prueth = devm_kzalloc(dev, sizeof(*prueth), GFP_KERNEL);
1287 if (!prueth)
1288 return -ENOMEM;
1289
1290 dev_set_drvdata(dev, prueth);
1291 prueth->pdev = pdev;
1292 prueth->pdata = *(const struct prueth_pdata *)device_get_match_data(dev);
1293
1294 prueth->dev = dev;
1295 eth_ports_node = of_get_child_by_name(np, "ethernet-ports");
1296 if (!eth_ports_node)
1297 return -ENOENT;
1298
1299 for_each_child_of_node(eth_ports_node, eth_node) {
1300 u32 reg;
1301
1302 if (strcmp(eth_node->name, "port"))
1303 continue;
1304 ret = of_property_read_u32(eth_node, "reg", ®);
1305 if (ret < 0) {
1306 dev_err(dev, "%pOF error reading port_id %d\n",
1307 eth_node, ret);
1308 }
1309
1310 of_node_get(eth_node);
1311
1312 if (reg == 0) {
1313 eth0_node = eth_node;
1314 if (!of_device_is_available(eth0_node)) {
1315 of_node_put(eth0_node);
1316 eth0_node = NULL;
1317 }
1318 } else if (reg == 1) {
1319 eth1_node = eth_node;
1320 if (!of_device_is_available(eth1_node)) {
1321 of_node_put(eth1_node);
1322 eth1_node = NULL;
1323 }
1324 } else {
1325 dev_err(dev, "port reg should be 0 or 1\n");
1326 }
1327 }
1328
1329 of_node_put(eth_ports_node);
1330
1331 /* At least one node must be present and available else we fail */
1332 if (!eth0_node && !eth1_node) {
1333 dev_err(dev, "neither port0 nor port1 node available\n");
1334 return -ENODEV;
1335 }
1336
1337 if (eth0_node == eth1_node) {
1338 dev_err(dev, "port0 and port1 can't have same reg\n");
1339 of_node_put(eth0_node);
1340 return -ENODEV;
1341 }
1342
1343 prueth->eth_node[PRUETH_MAC0] = eth0_node;
1344 prueth->eth_node[PRUETH_MAC1] = eth1_node;
1345
1346 prueth->miig_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-g-rt");
1347 if (IS_ERR(prueth->miig_rt)) {
1348 dev_err(dev, "couldn't get ti,mii-g-rt syscon regmap\n");
1349 return -ENODEV;
1350 }
1351
1352 prueth->mii_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-rt");
1353 if (IS_ERR(prueth->mii_rt)) {
1354 dev_err(dev, "couldn't get ti,mii-rt syscon regmap\n");
1355 return -ENODEV;
1356 }
1357
1358 prueth->pa_stats = syscon_regmap_lookup_by_phandle(np, "ti,pa-stats");
1359 if (IS_ERR(prueth->pa_stats)) {
1360 dev_err(dev, "couldn't get ti,pa-stats syscon regmap\n");
1361 prueth->pa_stats = NULL;
1362 }
1363
1364 if (eth0_node) {
1365 ret = prueth_get_cores(prueth, ICSS_SLICE0, false);
1366 if (ret)
1367 goto put_cores;
1368 }
1369
1370 if (eth1_node) {
1371 ret = prueth_get_cores(prueth, ICSS_SLICE1, false);
1372 if (ret)
1373 goto put_cores;
1374 }
1375
1376 pruss = pruss_get(eth0_node ?
1377 prueth->pru[ICSS_SLICE0] : prueth->pru[ICSS_SLICE1]);
1378 if (IS_ERR(pruss)) {
1379 ret = PTR_ERR(pruss);
1380 dev_err(dev, "unable to get pruss handle\n");
1381 goto put_cores;
1382 }
1383
1384 prueth->pruss = pruss;
1385
1386 ret = pruss_request_mem_region(pruss, PRUSS_MEM_SHRD_RAM2,
1387 &prueth->shram);
1388 if (ret) {
1389 dev_err(dev, "unable to get PRUSS SHRD RAM2: %d\n", ret);
1390 goto put_pruss;
1391 }
1392
1393 prueth->sram_pool = of_gen_pool_get(np, "sram", 0);
1394 if (!prueth->sram_pool) {
1395 dev_err(dev, "unable to get SRAM pool\n");
1396 ret = -ENODEV;
1397
1398 goto put_mem;
1399 }
1400
1401 msmc_ram_size = MSMC_RAM_SIZE;
1402 prueth->is_switchmode_supported = prueth->pdata.switch_mode;
1403 if (prueth->is_switchmode_supported)
1404 msmc_ram_size = MSMC_RAM_SIZE_SWITCH_MODE;
1405
1406 /* NOTE: FW bug needs buffer base to be 64KB aligned */
1407 prueth->msmcram.va =
1408 (void __iomem *)gen_pool_alloc_algo(prueth->sram_pool,
1409 msmc_ram_size,
1410 gen_pool_first_fit_align,
1411 &gp_data);
1412
1413 if (!prueth->msmcram.va) {
1414 ret = -ENOMEM;
1415 dev_err(dev, "unable to allocate MSMC resource\n");
1416 goto put_mem;
1417 }
1418 prueth->msmcram.pa = gen_pool_virt_to_phys(prueth->sram_pool,
1419 (unsigned long)prueth->msmcram.va);
1420 prueth->msmcram.size = msmc_ram_size;
1421 memset_io(prueth->msmcram.va, 0, msmc_ram_size);
1422 dev_dbg(dev, "sram: pa %llx va %p size %zx\n", prueth->msmcram.pa,
1423 prueth->msmcram.va, prueth->msmcram.size);
1424
1425 prueth->iep0 = icss_iep_get_idx(np, 0);
1426 if (IS_ERR(prueth->iep0)) {
1427 ret = dev_err_probe(dev, PTR_ERR(prueth->iep0), "iep0 get failed\n");
1428 prueth->iep0 = NULL;
1429 goto free_pool;
1430 }
1431
1432 prueth->iep1 = icss_iep_get_idx(np, 1);
1433 if (IS_ERR(prueth->iep1)) {
1434 ret = dev_err_probe(dev, PTR_ERR(prueth->iep1), "iep1 get failed\n");
1435 goto put_iep0;
1436 }
1437
1438 if (prueth->pdata.quirk_10m_link_issue) {
1439 /* Enable IEP1 for FW in 64bit mode as W/A for 10M FD link detect issue under TX
1440 * traffic.
1441 */
1442 icss_iep_init_fw(prueth->iep1);
1443 }
1444
1445 spin_lock_init(&prueth->vtbl_lock);
1446 /* setup netdev interfaces */
1447 if (eth0_node) {
1448 ret = prueth_netdev_init(prueth, eth0_node);
1449 if (ret) {
1450 dev_err_probe(dev, ret, "netdev init %s failed\n",
1451 eth0_node->name);
1452 goto exit_iep;
1453 }
1454
1455 prueth->emac[PRUETH_MAC0]->half_duplex =
1456 of_property_read_bool(eth0_node, "ti,half-duplex-capable");
1457
1458 prueth->emac[PRUETH_MAC0]->iep = prueth->iep0;
1459 }
1460
1461 if (eth1_node) {
1462 ret = prueth_netdev_init(prueth, eth1_node);
1463 if (ret) {
1464 dev_err_probe(dev, ret, "netdev init %s failed\n",
1465 eth1_node->name);
1466 goto netdev_exit;
1467 }
1468
1469 prueth->emac[PRUETH_MAC1]->half_duplex =
1470 of_property_read_bool(eth1_node, "ti,half-duplex-capable");
1471
1472 prueth->emac[PRUETH_MAC1]->iep = prueth->iep0;
1473 }
1474
1475 /* register the network devices */
1476 if (eth0_node) {
1477 ret = register_netdev(prueth->emac[PRUETH_MAC0]->ndev);
1478 if (ret) {
1479 dev_err(dev, "can't register netdev for port MII0");
1480 goto netdev_exit;
1481 }
1482
1483 prueth->registered_netdevs[PRUETH_MAC0] = prueth->emac[PRUETH_MAC0]->ndev;
1484
1485 ret = emac_phy_connect(prueth->emac[PRUETH_MAC0]);
1486 if (ret) {
1487 dev_err(dev,
1488 "can't connect to MII0 PHY, error -%d", ret);
1489 goto netdev_unregister;
1490 }
1491 phy_attached_info(prueth->emac[PRUETH_MAC0]->ndev->phydev);
1492 }
1493
1494 if (eth1_node) {
1495 ret = register_netdev(prueth->emac[PRUETH_MAC1]->ndev);
1496 if (ret) {
1497 dev_err(dev, "can't register netdev for port MII1");
1498 goto netdev_unregister;
1499 }
1500
1501 prueth->registered_netdevs[PRUETH_MAC1] = prueth->emac[PRUETH_MAC1]->ndev;
1502 ret = emac_phy_connect(prueth->emac[PRUETH_MAC1]);
1503 if (ret) {
1504 dev_err(dev,
1505 "can't connect to MII1 PHY, error %d", ret);
1506 goto netdev_unregister;
1507 }
1508 phy_attached_info(prueth->emac[PRUETH_MAC1]->ndev->phydev);
1509 }
1510
1511 if (prueth->is_switchmode_supported) {
1512 ret = prueth_register_notifiers(prueth);
1513 if (ret)
1514 goto netdev_unregister;
1515
1516 sprintf(prueth->switch_id, "%s", dev_name(dev));
1517 }
1518
1519 dev_info(dev, "TI PRU ethernet driver initialized: %s EMAC mode\n",
1520 (!eth0_node || !eth1_node) ? "single" : "dual");
1521
1522 if (eth1_node)
1523 of_node_put(eth1_node);
1524 if (eth0_node)
1525 of_node_put(eth0_node);
1526 return 0;
1527
1528 netdev_unregister:
1529 for (i = 0; i < PRUETH_NUM_MACS; i++) {
1530 if (!prueth->registered_netdevs[i])
1531 continue;
1532 if (prueth->emac[i]->ndev->phydev) {
1533 phy_disconnect(prueth->emac[i]->ndev->phydev);
1534 prueth->emac[i]->ndev->phydev = NULL;
1535 }
1536 unregister_netdev(prueth->registered_netdevs[i]);
1537 }
1538
1539 netdev_exit:
1540 for (i = 0; i < PRUETH_NUM_MACS; i++) {
1541 eth_node = prueth->eth_node[i];
1542 if (!eth_node)
1543 continue;
1544
1545 prueth_netdev_exit(prueth, eth_node);
1546 }
1547
1548 exit_iep:
1549 if (prueth->pdata.quirk_10m_link_issue)
1550 icss_iep_exit_fw(prueth->iep1);
1551 icss_iep_put(prueth->iep1);
1552
1553 put_iep0:
1554 icss_iep_put(prueth->iep0);
1555 prueth->iep0 = NULL;
1556 prueth->iep1 = NULL;
1557
1558 free_pool:
1559 gen_pool_free(prueth->sram_pool,
1560 (unsigned long)prueth->msmcram.va, msmc_ram_size);
1561
1562 put_mem:
1563 pruss_release_mem_region(prueth->pruss, &prueth->shram);
1564
1565 put_pruss:
1566 pruss_put(prueth->pruss);
1567
1568 put_cores:
1569 if (eth1_node) {
1570 prueth_put_cores(prueth, ICSS_SLICE1);
1571 of_node_put(eth1_node);
1572 }
1573
1574 if (eth0_node) {
1575 prueth_put_cores(prueth, ICSS_SLICE0);
1576 of_node_put(eth0_node);
1577 }
1578
1579 return ret;
1580 }
1581
prueth_remove(struct platform_device * pdev)1582 static void prueth_remove(struct platform_device *pdev)
1583 {
1584 struct prueth *prueth = platform_get_drvdata(pdev);
1585 struct device_node *eth_node;
1586 int i;
1587
1588 prueth_unregister_notifiers(prueth);
1589
1590 for (i = 0; i < PRUETH_NUM_MACS; i++) {
1591 if (!prueth->registered_netdevs[i])
1592 continue;
1593 phy_stop(prueth->emac[i]->ndev->phydev);
1594 phy_disconnect(prueth->emac[i]->ndev->phydev);
1595 prueth->emac[i]->ndev->phydev = NULL;
1596 unregister_netdev(prueth->registered_netdevs[i]);
1597 }
1598
1599 for (i = 0; i < PRUETH_NUM_MACS; i++) {
1600 eth_node = prueth->eth_node[i];
1601 if (!eth_node)
1602 continue;
1603
1604 prueth_netdev_exit(prueth, eth_node);
1605 }
1606
1607 if (prueth->pdata.quirk_10m_link_issue)
1608 icss_iep_exit_fw(prueth->iep1);
1609
1610 icss_iep_put(prueth->iep1);
1611 icss_iep_put(prueth->iep0);
1612
1613 gen_pool_free(prueth->sram_pool,
1614 (unsigned long)prueth->msmcram.va,
1615 MSMC_RAM_SIZE);
1616
1617 pruss_release_mem_region(prueth->pruss, &prueth->shram);
1618
1619 pruss_put(prueth->pruss);
1620
1621 if (prueth->eth_node[PRUETH_MAC1])
1622 prueth_put_cores(prueth, ICSS_SLICE1);
1623
1624 if (prueth->eth_node[PRUETH_MAC0])
1625 prueth_put_cores(prueth, ICSS_SLICE0);
1626 }
1627
1628 static const struct prueth_pdata am654_icssg_pdata = {
1629 .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
1630 .quirk_10m_link_issue = 1,
1631 .switch_mode = 1,
1632 };
1633
1634 static const struct prueth_pdata am64x_icssg_pdata = {
1635 .fdqring_mode = K3_RINGACC_RING_MODE_RING,
1636 .quirk_10m_link_issue = 1,
1637 .switch_mode = 1,
1638 };
1639
1640 static const struct of_device_id prueth_dt_match[] = {
1641 { .compatible = "ti,am654-icssg-prueth", .data = &am654_icssg_pdata },
1642 { .compatible = "ti,am642-icssg-prueth", .data = &am64x_icssg_pdata },
1643 { /* sentinel */ }
1644 };
1645 MODULE_DEVICE_TABLE(of, prueth_dt_match);
1646
1647 static struct platform_driver prueth_driver = {
1648 .probe = prueth_probe,
1649 .remove_new = prueth_remove,
1650 .driver = {
1651 .name = "icssg-prueth",
1652 .of_match_table = prueth_dt_match,
1653 .pm = &prueth_dev_pm_ops,
1654 },
1655 };
1656 module_platform_driver(prueth_driver);
1657
1658 MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
1659 MODULE_AUTHOR("Md Danish Anwar <danishanwar@ti.com>");
1660 MODULE_DESCRIPTION("PRUSS ICSSG Ethernet Driver");
1661 MODULE_LICENSE("GPL");
1662