xref: /linux/arch/x86/kernel/acpi/cppc.c (revision 3fd6c59042dbba50391e30862beac979491145fe)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * cppc.c: CPPC Interface for x86
4  * Copyright (c) 2016, Intel Corporation.
5  */
6 
7 #include <acpi/cppc_acpi.h>
8 #include <asm/msr.h>
9 #include <asm/processor.h>
10 #include <asm/topology.h>
11 
12 #define CPPC_HIGHEST_PERF_PERFORMANCE	196
13 #define CPPC_HIGHEST_PERF_PREFCORE	166
14 
15 enum amd_pref_core {
16 	AMD_PREF_CORE_UNKNOWN = 0,
17 	AMD_PREF_CORE_SUPPORTED,
18 	AMD_PREF_CORE_UNSUPPORTED,
19 };
20 static enum amd_pref_core amd_pref_core_detected;
21 static u64 boost_numerator;
22 
23 /* Refer to drivers/acpi/cppc_acpi.c for the description of functions */
24 
cpc_supported_by_cpu(void)25 bool cpc_supported_by_cpu(void)
26 {
27 	switch (boot_cpu_data.x86_vendor) {
28 	case X86_VENDOR_AMD:
29 	case X86_VENDOR_HYGON:
30 		if (boot_cpu_data.x86 == 0x19 && ((boot_cpu_data.x86_model <= 0x0f) ||
31 		    (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f)))
32 			return true;
33 		else if (boot_cpu_data.x86 == 0x17 &&
34 			 boot_cpu_data.x86_model >= 0x30 && boot_cpu_data.x86_model <= 0x7f)
35 			return true;
36 		return boot_cpu_has(X86_FEATURE_CPPC);
37 	}
38 	return false;
39 }
40 
cpc_ffh_supported(void)41 bool cpc_ffh_supported(void)
42 {
43 	return true;
44 }
45 
cpc_read_ffh(int cpunum,struct cpc_reg * reg,u64 * val)46 int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
47 {
48 	int err;
49 
50 	err = rdmsrl_safe_on_cpu(cpunum, reg->address, val);
51 	if (!err) {
52 		u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
53 				       reg->bit_offset);
54 
55 		*val &= mask;
56 		*val >>= reg->bit_offset;
57 	}
58 	return err;
59 }
60 
cpc_write_ffh(int cpunum,struct cpc_reg * reg,u64 val)61 int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
62 {
63 	u64 rd_val;
64 	int err;
65 
66 	err = rdmsrl_safe_on_cpu(cpunum, reg->address, &rd_val);
67 	if (!err) {
68 		u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
69 				       reg->bit_offset);
70 
71 		val <<= reg->bit_offset;
72 		val &= mask;
73 		rd_val &= ~mask;
74 		rd_val |= val;
75 		err = wrmsrl_safe_on_cpu(cpunum, reg->address, rd_val);
76 	}
77 	return err;
78 }
79 
amd_set_max_freq_ratio(void)80 static void amd_set_max_freq_ratio(void)
81 {
82 	struct cppc_perf_caps perf_caps;
83 	u64 numerator, nominal_perf;
84 	u64 perf_ratio;
85 	int rc;
86 
87 	rc = cppc_get_perf_caps(0, &perf_caps);
88 	if (rc) {
89 		pr_warn("Could not retrieve perf counters (%d)\n", rc);
90 		return;
91 	}
92 
93 	rc = amd_get_boost_ratio_numerator(0, &numerator);
94 	if (rc) {
95 		pr_warn("Could not retrieve highest performance (%d)\n", rc);
96 		return;
97 	}
98 	nominal_perf = perf_caps.nominal_perf;
99 
100 	if (!nominal_perf) {
101 		pr_warn("Could not retrieve nominal performance\n");
102 		return;
103 	}
104 
105 	/* midpoint between max_boost and max_P */
106 	perf_ratio = (div_u64(numerator * SCHED_CAPACITY_SCALE, nominal_perf) + SCHED_CAPACITY_SCALE) >> 1;
107 
108 	freq_invariance_set_perf_ratio(perf_ratio, false);
109 }
110 
111 static DEFINE_MUTEX(freq_invariance_lock);
112 
init_freq_invariance_cppc(void)113 static inline void init_freq_invariance_cppc(void)
114 {
115 	static bool init_done;
116 
117 	if (!cpu_feature_enabled(X86_FEATURE_APERFMPERF))
118 		return;
119 
120 	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
121 		return;
122 
123 	mutex_lock(&freq_invariance_lock);
124 	if (!init_done)
125 		amd_set_max_freq_ratio();
126 	init_done = true;
127 	mutex_unlock(&freq_invariance_lock);
128 }
129 
acpi_processor_init_invariance_cppc(void)130 void acpi_processor_init_invariance_cppc(void)
131 {
132 	init_freq_invariance_cppc();
133 }
134 
135 /*
136  * Get the highest performance register value.
137  * @cpu: CPU from which to get highest performance.
138  * @highest_perf: Return address for highest performance value.
139  *
140  * Return: 0 for success, negative error code otherwise.
141  */
amd_get_highest_perf(unsigned int cpu,u32 * highest_perf)142 int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf)
143 {
144 	u64 val;
145 	int ret;
146 
147 	if (cpu_feature_enabled(X86_FEATURE_CPPC)) {
148 		ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &val);
149 		if (ret)
150 			goto out;
151 
152 		val = AMD_CPPC_HIGHEST_PERF(val);
153 	} else {
154 		ret = cppc_get_highest_perf(cpu, &val);
155 		if (ret)
156 			goto out;
157 	}
158 
159 	WRITE_ONCE(*highest_perf, (u32)val);
160 out:
161 	return ret;
162 }
163 EXPORT_SYMBOL_GPL(amd_get_highest_perf);
164 
165 /**
166  * amd_detect_prefcore: Detect if CPUs in the system support preferred cores
167  * @detected: Output variable for the result of the detection.
168  *
169  * Determine whether CPUs in the system support preferred cores. On systems
170  * that support preferred cores, different highest perf values will be found
171  * on different cores. On other systems, the highest perf value will be the
172  * same on all cores.
173  *
174  * The result of the detection will be stored in the 'detected' parameter.
175  *
176  * Return: 0 for success, negative error code otherwise
177  */
amd_detect_prefcore(bool * detected)178 int amd_detect_prefcore(bool *detected)
179 {
180 	int cpu, count = 0;
181 	u64 highest_perf[2] = {0};
182 
183 	if (WARN_ON(!detected))
184 		return -EINVAL;
185 
186 	switch (amd_pref_core_detected) {
187 	case AMD_PREF_CORE_SUPPORTED:
188 		*detected = true;
189 		return 0;
190 	case AMD_PREF_CORE_UNSUPPORTED:
191 		*detected = false;
192 		return 0;
193 	default:
194 		break;
195 	}
196 
197 	for_each_present_cpu(cpu) {
198 		u32 tmp;
199 		int ret;
200 
201 		ret = amd_get_highest_perf(cpu, &tmp);
202 		if (ret)
203 			return ret;
204 
205 		if (!count || (count == 1 && tmp != highest_perf[0]))
206 			highest_perf[count++] = tmp;
207 
208 		if (count == 2)
209 			break;
210 	}
211 
212 	*detected = (count == 2);
213 	boost_numerator = highest_perf[0];
214 
215 	amd_pref_core_detected = *detected ? AMD_PREF_CORE_SUPPORTED :
216 					     AMD_PREF_CORE_UNSUPPORTED;
217 
218 	pr_debug("AMD CPPC preferred core is %ssupported (highest perf: 0x%llx)\n",
219 		 *detected ? "" : "un", highest_perf[0]);
220 
221 	return 0;
222 }
223 EXPORT_SYMBOL_GPL(amd_detect_prefcore);
224 
225 /**
226  * amd_get_boost_ratio_numerator: Get the numerator to use for boost ratio calculation
227  * @cpu: CPU to get numerator for.
228  * @numerator: Output variable for numerator.
229  *
230  * Determine the numerator to use for calculating the boost ratio on
231  * a CPU. On systems that support preferred cores, this will be a hardcoded
232  * value. On other systems this will the highest performance register value.
233  *
234  * If booting the system with amd-pstate enabled but preferred cores disabled then
235  * the correct boost numerator will be returned to match hardware capabilities
236  * even if the preferred cores scheduling hints are not enabled.
237  *
238  * Return: 0 for success, negative error code otherwise.
239  */
amd_get_boost_ratio_numerator(unsigned int cpu,u64 * numerator)240 int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator)
241 {
242 	enum x86_topology_cpu_type core_type = get_topology_cpu_type(&cpu_data(cpu));
243 	bool prefcore;
244 	int ret;
245 	u32 tmp;
246 
247 	ret = amd_detect_prefcore(&prefcore);
248 	if (ret)
249 		return ret;
250 
251 	/* without preferred cores, return the highest perf register value */
252 	if (!prefcore) {
253 		*numerator = boost_numerator;
254 		return 0;
255 	}
256 
257 	/*
258 	 * For AMD CPUs with Family ID 19H and Model ID range 0x70 to 0x7f,
259 	 * the highest performance level is set to 196.
260 	 * https://bugzilla.kernel.org/show_bug.cgi?id=218759
261 	 */
262 	if (cpu_feature_enabled(X86_FEATURE_ZEN4)) {
263 		switch (boot_cpu_data.x86_model) {
264 		case 0x70 ... 0x7f:
265 			*numerator = CPPC_HIGHEST_PERF_PERFORMANCE;
266 			return 0;
267 		default:
268 			break;
269 		}
270 	}
271 
272 	/* detect if running on heterogeneous design */
273 	if (cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES)) {
274 		switch (core_type) {
275 		case TOPO_CPU_TYPE_UNKNOWN:
276 			pr_warn("Undefined core type found for cpu %d\n", cpu);
277 			break;
278 		case TOPO_CPU_TYPE_PERFORMANCE:
279 			/* use the max scale for performance cores */
280 			*numerator = CPPC_HIGHEST_PERF_PERFORMANCE;
281 			return 0;
282 		case TOPO_CPU_TYPE_EFFICIENCY:
283 			/* use the highest perf value for efficiency cores */
284 			ret = amd_get_highest_perf(cpu, &tmp);
285 			if (ret)
286 				return ret;
287 			*numerator = tmp;
288 			return 0;
289 		}
290 	}
291 
292 	*numerator = CPPC_HIGHEST_PERF_PREFCORE;
293 
294 	return 0;
295 }
296 EXPORT_SYMBOL_GPL(amd_get_boost_ratio_numerator);
297