xref: /linux/arch/x86/include/asm/kvm_host.h (revision d07b43284ab356daf7ec5ae1858a16c1c7b6adab)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Kernel-based Virtual Machine driver for Linux
4  *
5  * This header defines architecture specific interfaces, x86 version
6  */
7 
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
10 
11 #include <linux/types.h>
12 #include <linux/mm.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18 #include <linux/workqueue.h>
19 
20 #include <linux/kvm.h>
21 #include <linux/kvm_para.h>
22 #include <linux/kvm_types.h>
23 #include <linux/perf_event.h>
24 #include <linux/pvclock_gtod.h>
25 #include <linux/clocksource.h>
26 #include <linux/irqbypass.h>
27 #include <linux/hyperv.h>
28 #include <linux/kfifo.h>
29 
30 #include <asm/apic.h>
31 #include <asm/pvclock-abi.h>
32 #include <asm/desc.h>
33 #include <asm/mtrr.h>
34 #include <asm/msr-index.h>
35 #include <asm/asm.h>
36 #include <asm/kvm_page_track.h>
37 #include <asm/kvm_vcpu_regs.h>
38 #include <asm/hyperv-tlfs.h>
39 
40 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
41 
42 /*
43  * CONFIG_KVM_MAX_NR_VCPUS is defined iff CONFIG_KVM!=n, provide a dummy max if
44  * KVM is disabled (arbitrarily use the default from CONFIG_KVM_MAX_NR_VCPUS).
45  */
46 #ifdef CONFIG_KVM_MAX_NR_VCPUS
47 #define KVM_MAX_VCPUS CONFIG_KVM_MAX_NR_VCPUS
48 #else
49 #define KVM_MAX_VCPUS 1024
50 #endif
51 
52 /*
53  * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
54  * might be larger than the actual number of VCPUs because the
55  * APIC ID encodes CPU topology information.
56  *
57  * In the worst case, we'll need less than one extra bit for the
58  * Core ID, and less than one extra bit for the Package (Die) ID,
59  * so ratio of 4 should be enough.
60  */
61 #define KVM_VCPU_ID_RATIO 4
62 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
63 
64 /* memory slots that are not exposed to userspace */
65 #define KVM_INTERNAL_MEM_SLOTS 3
66 
67 #define KVM_HALT_POLL_NS_DEFAULT 200000
68 
69 #define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
70 
71 #define KVM_DIRTY_LOG_MANUAL_CAPS   (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
72 					KVM_DIRTY_LOG_INITIALLY_SET)
73 
74 #define KVM_BUS_LOCK_DETECTION_VALID_MODE	(KVM_BUS_LOCK_DETECTION_OFF | \
75 						 KVM_BUS_LOCK_DETECTION_EXIT)
76 
77 #define KVM_X86_NOTIFY_VMEXIT_VALID_BITS	(KVM_X86_NOTIFY_VMEXIT_ENABLED | \
78 						 KVM_X86_NOTIFY_VMEXIT_USER)
79 
80 /* x86-specific vcpu->requests bit members */
81 #define KVM_REQ_MIGRATE_TIMER		KVM_ARCH_REQ(0)
82 #define KVM_REQ_REPORT_TPR_ACCESS	KVM_ARCH_REQ(1)
83 #define KVM_REQ_TRIPLE_FAULT		KVM_ARCH_REQ(2)
84 #define KVM_REQ_MMU_SYNC		KVM_ARCH_REQ(3)
85 #define KVM_REQ_CLOCK_UPDATE		KVM_ARCH_REQ(4)
86 #define KVM_REQ_LOAD_MMU_PGD		KVM_ARCH_REQ(5)
87 #define KVM_REQ_EVENT			KVM_ARCH_REQ(6)
88 #define KVM_REQ_APF_HALT		KVM_ARCH_REQ(7)
89 #define KVM_REQ_STEAL_UPDATE		KVM_ARCH_REQ(8)
90 #define KVM_REQ_NMI			KVM_ARCH_REQ(9)
91 #define KVM_REQ_PMU			KVM_ARCH_REQ(10)
92 #define KVM_REQ_PMI			KVM_ARCH_REQ(11)
93 #ifdef CONFIG_KVM_SMM
94 #define KVM_REQ_SMI			KVM_ARCH_REQ(12)
95 #endif
96 #define KVM_REQ_MASTERCLOCK_UPDATE	KVM_ARCH_REQ(13)
97 #define KVM_REQ_MCLOCK_INPROGRESS \
98 	KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
99 #define KVM_REQ_SCAN_IOAPIC \
100 	KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
101 #define KVM_REQ_GLOBAL_CLOCK_UPDATE	KVM_ARCH_REQ(16)
102 #define KVM_REQ_APIC_PAGE_RELOAD \
103 	KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
104 #define KVM_REQ_HV_CRASH		KVM_ARCH_REQ(18)
105 #define KVM_REQ_IOAPIC_EOI_EXIT		KVM_ARCH_REQ(19)
106 #define KVM_REQ_HV_RESET		KVM_ARCH_REQ(20)
107 #define KVM_REQ_HV_EXIT			KVM_ARCH_REQ(21)
108 #define KVM_REQ_HV_STIMER		KVM_ARCH_REQ(22)
109 #define KVM_REQ_LOAD_EOI_EXITMAP	KVM_ARCH_REQ(23)
110 #define KVM_REQ_GET_NESTED_STATE_PAGES	KVM_ARCH_REQ(24)
111 #define KVM_REQ_APICV_UPDATE \
112 	KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
113 #define KVM_REQ_TLB_FLUSH_CURRENT	KVM_ARCH_REQ(26)
114 #define KVM_REQ_TLB_FLUSH_GUEST \
115 	KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
116 #define KVM_REQ_APF_READY		KVM_ARCH_REQ(28)
117 #define KVM_REQ_MSR_FILTER_CHANGED	KVM_ARCH_REQ(29)
118 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
119 	KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
120 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \
121 	KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
122 #define KVM_REQ_HV_TLB_FLUSH \
123 	KVM_ARCH_REQ_FLAGS(32, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
124 #define KVM_REQ_UPDATE_PROTECTED_GUEST_STATE	KVM_ARCH_REQ(34)
125 
126 #define CR0_RESERVED_BITS                                               \
127 	(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
128 			  | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
129 			  | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
130 
131 #define CR4_RESERVED_BITS                                               \
132 	(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
133 			  | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
134 			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
135 			  | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
136 			  | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
137 			  | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP \
138 			  | X86_CR4_LAM_SUP))
139 
140 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
141 
142 
143 
144 #define INVALID_PAGE (~(hpa_t)0)
145 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
146 
147 /* KVM Hugepage definitions for x86 */
148 #define KVM_MAX_HUGEPAGE_LEVEL	PG_LEVEL_1G
149 #define KVM_NR_PAGE_SIZES	(KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
150 #define KVM_HPAGE_GFN_SHIFT(x)	(((x) - 1) * 9)
151 #define KVM_HPAGE_SHIFT(x)	(PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
152 #define KVM_HPAGE_SIZE(x)	(1UL << KVM_HPAGE_SHIFT(x))
153 #define KVM_HPAGE_MASK(x)	(~(KVM_HPAGE_SIZE(x) - 1))
154 #define KVM_PAGES_PER_HPAGE(x)	(KVM_HPAGE_SIZE(x) / PAGE_SIZE)
155 
156 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
157 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
158 #define KVM_MMU_HASH_SHIFT 12
159 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
160 #define KVM_MIN_FREE_MMU_PAGES 5
161 #define KVM_REFILL_PAGES 25
162 #define KVM_MAX_CPUID_ENTRIES 256
163 #define KVM_NR_VAR_MTRR 8
164 
165 #define ASYNC_PF_PER_VCPU 64
166 
167 enum kvm_reg {
168 	VCPU_REGS_RAX = __VCPU_REGS_RAX,
169 	VCPU_REGS_RCX = __VCPU_REGS_RCX,
170 	VCPU_REGS_RDX = __VCPU_REGS_RDX,
171 	VCPU_REGS_RBX = __VCPU_REGS_RBX,
172 	VCPU_REGS_RSP = __VCPU_REGS_RSP,
173 	VCPU_REGS_RBP = __VCPU_REGS_RBP,
174 	VCPU_REGS_RSI = __VCPU_REGS_RSI,
175 	VCPU_REGS_RDI = __VCPU_REGS_RDI,
176 #ifdef CONFIG_X86_64
177 	VCPU_REGS_R8  = __VCPU_REGS_R8,
178 	VCPU_REGS_R9  = __VCPU_REGS_R9,
179 	VCPU_REGS_R10 = __VCPU_REGS_R10,
180 	VCPU_REGS_R11 = __VCPU_REGS_R11,
181 	VCPU_REGS_R12 = __VCPU_REGS_R12,
182 	VCPU_REGS_R13 = __VCPU_REGS_R13,
183 	VCPU_REGS_R14 = __VCPU_REGS_R14,
184 	VCPU_REGS_R15 = __VCPU_REGS_R15,
185 #endif
186 	VCPU_REGS_RIP,
187 	NR_VCPU_REGS,
188 
189 	VCPU_EXREG_PDPTR = NR_VCPU_REGS,
190 	VCPU_EXREG_CR0,
191 	VCPU_EXREG_CR3,
192 	VCPU_EXREG_CR4,
193 	VCPU_EXREG_RFLAGS,
194 	VCPU_EXREG_SEGMENTS,
195 	VCPU_EXREG_EXIT_INFO_1,
196 	VCPU_EXREG_EXIT_INFO_2,
197 };
198 
199 enum {
200 	VCPU_SREG_ES,
201 	VCPU_SREG_CS,
202 	VCPU_SREG_SS,
203 	VCPU_SREG_DS,
204 	VCPU_SREG_FS,
205 	VCPU_SREG_GS,
206 	VCPU_SREG_TR,
207 	VCPU_SREG_LDTR,
208 };
209 
210 enum exit_fastpath_completion {
211 	EXIT_FASTPATH_NONE,
212 	EXIT_FASTPATH_REENTER_GUEST,
213 	EXIT_FASTPATH_EXIT_HANDLED,
214 };
215 typedef enum exit_fastpath_completion fastpath_t;
216 
217 struct x86_emulate_ctxt;
218 struct x86_exception;
219 union kvm_smram;
220 enum x86_intercept;
221 enum x86_intercept_stage;
222 
223 #define KVM_NR_DB_REGS	4
224 
225 #define DR6_BUS_LOCK   (1 << 11)
226 #define DR6_BD		(1 << 13)
227 #define DR6_BS		(1 << 14)
228 #define DR6_BT		(1 << 15)
229 #define DR6_RTM		(1 << 16)
230 /*
231  * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
232  * We can regard all the bits in DR6_FIXED_1 as active_low bits;
233  * they will never be 0 for now, but when they are defined
234  * in the future it will require no code change.
235  *
236  * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
237  */
238 #define DR6_ACTIVE_LOW	0xffff0ff0
239 #define DR6_VOLATILE	0x0001e80f
240 #define DR6_FIXED_1	(DR6_ACTIVE_LOW & ~DR6_VOLATILE)
241 
242 #define DR7_BP_EN_MASK	0x000000ff
243 #define DR7_GE		(1 << 9)
244 #define DR7_GD		(1 << 13)
245 #define DR7_FIXED_1	0x00000400
246 #define DR7_VOLATILE	0xffff2bff
247 
248 #define KVM_GUESTDBG_VALID_MASK \
249 	(KVM_GUESTDBG_ENABLE | \
250 	KVM_GUESTDBG_SINGLESTEP | \
251 	KVM_GUESTDBG_USE_HW_BP | \
252 	KVM_GUESTDBG_USE_SW_BP | \
253 	KVM_GUESTDBG_INJECT_BP | \
254 	KVM_GUESTDBG_INJECT_DB | \
255 	KVM_GUESTDBG_BLOCKIRQ)
256 
257 #define PFERR_PRESENT_MASK	BIT(0)
258 #define PFERR_WRITE_MASK	BIT(1)
259 #define PFERR_USER_MASK		BIT(2)
260 #define PFERR_RSVD_MASK		BIT(3)
261 #define PFERR_FETCH_MASK	BIT(4)
262 #define PFERR_PK_MASK		BIT(5)
263 #define PFERR_SGX_MASK		BIT(15)
264 #define PFERR_GUEST_RMP_MASK	BIT_ULL(31)
265 #define PFERR_GUEST_FINAL_MASK	BIT_ULL(32)
266 #define PFERR_GUEST_PAGE_MASK	BIT_ULL(33)
267 #define PFERR_GUEST_ENC_MASK	BIT_ULL(34)
268 #define PFERR_GUEST_SIZEM_MASK	BIT_ULL(35)
269 #define PFERR_GUEST_VMPL_MASK	BIT_ULL(36)
270 
271 /*
272  * IMPLICIT_ACCESS is a KVM-defined flag used to correctly perform SMAP checks
273  * when emulating instructions that triggers implicit access.
274  */
275 #define PFERR_IMPLICIT_ACCESS	BIT_ULL(48)
276 /*
277  * PRIVATE_ACCESS is a KVM-defined flag us to indicate that a fault occurred
278  * when the guest was accessing private memory.
279  */
280 #define PFERR_PRIVATE_ACCESS   BIT_ULL(49)
281 #define PFERR_SYNTHETIC_MASK   (PFERR_IMPLICIT_ACCESS | PFERR_PRIVATE_ACCESS)
282 
283 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK |	\
284 				 PFERR_WRITE_MASK |		\
285 				 PFERR_PRESENT_MASK)
286 
287 /* apic attention bits */
288 #define KVM_APIC_CHECK_VAPIC	0
289 /*
290  * The following bit is set with PV-EOI, unset on EOI.
291  * We detect PV-EOI changes by guest by comparing
292  * this bit with PV-EOI in guest memory.
293  * See the implementation in apic_update_pv_eoi.
294  */
295 #define KVM_APIC_PV_EOI_PENDING	1
296 
297 struct kvm_kernel_irq_routing_entry;
298 
299 /*
300  * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
301  * also includes TDP pages) to determine whether or not a page can be used in
302  * the given MMU context.  This is a subset of the overall kvm_cpu_role to
303  * minimize the size of kvm_memory_slot.arch.gfn_write_track, i.e. allows
304  * allocating 2 bytes per gfn instead of 4 bytes per gfn.
305  *
306  * Upper-level shadow pages having gptes are tracked for write-protection via
307  * gfn_write_track.  As above, gfn_write_track is a 16 bit counter, so KVM must
308  * not create more than 2^16-1 upper-level shadow pages at a single gfn,
309  * otherwise gfn_write_track will overflow and explosions will ensue.
310  *
311  * A unique shadow page (SP) for a gfn is created if and only if an existing SP
312  * cannot be reused.  The ability to reuse a SP is tracked by its role, which
313  * incorporates various mode bits and properties of the SP.  Roughly speaking,
314  * the number of unique SPs that can theoretically be created is 2^n, where n
315  * is the number of bits that are used to compute the role.
316  *
317  * But, even though there are 19 bits in the mask below, not all combinations
318  * of modes and flags are possible:
319  *
320  *   - invalid shadow pages are not accounted, so the bits are effectively 18
321  *
322  *   - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging);
323  *     execonly and ad_disabled are only used for nested EPT which has
324  *     has_4_byte_gpte=0.  Therefore, 2 bits are always unused.
325  *
326  *   - the 4 bits of level are effectively limited to the values 2/3/4/5,
327  *     as 4k SPs are not tracked (allowed to go unsync).  In addition non-PAE
328  *     paging has exactly one upper level, making level completely redundant
329  *     when has_4_byte_gpte=1.
330  *
331  *   - on top of this, smep_andnot_wp and smap_andnot_wp are only set if
332  *     cr0_wp=0, therefore these three bits only give rise to 5 possibilities.
333  *
334  * Therefore, the maximum number of possible upper-level shadow pages for a
335  * single gfn is a bit less than 2^13.
336  */
337 union kvm_mmu_page_role {
338 	u32 word;
339 	struct {
340 		unsigned level:4;
341 		unsigned has_4_byte_gpte:1;
342 		unsigned quadrant:2;
343 		unsigned direct:1;
344 		unsigned access:3;
345 		unsigned invalid:1;
346 		unsigned efer_nx:1;
347 		unsigned cr0_wp:1;
348 		unsigned smep_andnot_wp:1;
349 		unsigned smap_andnot_wp:1;
350 		unsigned ad_disabled:1;
351 		unsigned guest_mode:1;
352 		unsigned passthrough:1;
353 		unsigned :5;
354 
355 		/*
356 		 * This is left at the top of the word so that
357 		 * kvm_memslots_for_spte_role can extract it with a
358 		 * simple shift.  While there is room, give it a whole
359 		 * byte so it is also faster to load it from memory.
360 		 */
361 		unsigned smm:8;
362 	};
363 };
364 
365 /*
366  * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
367  * relevant to the current MMU configuration.   When loading CR0, CR4, or EFER,
368  * including on nested transitions, if nothing in the full role changes then
369  * MMU re-configuration can be skipped. @valid bit is set on first usage so we
370  * don't treat all-zero structure as valid data.
371  *
372  * The properties that are tracked in the extended role but not the page role
373  * are for things that either (a) do not affect the validity of the shadow page
374  * or (b) are indirectly reflected in the shadow page's role.  For example,
375  * CR4.PKE only affects permission checks for software walks of the guest page
376  * tables (because KVM doesn't support Protection Keys with shadow paging), and
377  * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
378  *
379  * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
380  * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
381  * SMAP, but the MMU's permission checks for software walks need to be SMEP and
382  * SMAP aware regardless of CR0.WP.
383  */
384 union kvm_mmu_extended_role {
385 	u32 word;
386 	struct {
387 		unsigned int valid:1;
388 		unsigned int execonly:1;
389 		unsigned int cr4_pse:1;
390 		unsigned int cr4_pke:1;
391 		unsigned int cr4_smap:1;
392 		unsigned int cr4_smep:1;
393 		unsigned int cr4_la57:1;
394 		unsigned int efer_lma:1;
395 	};
396 };
397 
398 union kvm_cpu_role {
399 	u64 as_u64;
400 	struct {
401 		union kvm_mmu_page_role base;
402 		union kvm_mmu_extended_role ext;
403 	};
404 };
405 
406 struct kvm_rmap_head {
407 	unsigned long val;
408 };
409 
410 struct kvm_pio_request {
411 	unsigned long linear_rip;
412 	unsigned long count;
413 	int in;
414 	int port;
415 	int size;
416 };
417 
418 #define PT64_ROOT_MAX_LEVEL 5
419 
420 struct rsvd_bits_validate {
421 	u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
422 	u64 bad_mt_xwr;
423 };
424 
425 struct kvm_mmu_root_info {
426 	gpa_t pgd;
427 	hpa_t hpa;
428 };
429 
430 #define KVM_MMU_ROOT_INFO_INVALID \
431 	((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
432 
433 #define KVM_MMU_NUM_PREV_ROOTS 3
434 
435 #define KVM_MMU_ROOT_CURRENT		BIT(0)
436 #define KVM_MMU_ROOT_PREVIOUS(i)	BIT(1+i)
437 #define KVM_MMU_ROOTS_ALL		(BIT(1 + KVM_MMU_NUM_PREV_ROOTS) - 1)
438 
439 #define KVM_HAVE_MMU_RWLOCK
440 
441 struct kvm_mmu_page;
442 struct kvm_page_fault;
443 
444 /*
445  * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
446  * and 2-level 32-bit).  The kvm_mmu structure abstracts the details of the
447  * current mmu mode.
448  */
449 struct kvm_mmu {
450 	unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
451 	u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
452 	int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault);
453 	void (*inject_page_fault)(struct kvm_vcpu *vcpu,
454 				  struct x86_exception *fault);
455 	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
456 			    gpa_t gva_or_gpa, u64 access,
457 			    struct x86_exception *exception);
458 	int (*sync_spte)(struct kvm_vcpu *vcpu,
459 			 struct kvm_mmu_page *sp, int i);
460 	struct kvm_mmu_root_info root;
461 	union kvm_cpu_role cpu_role;
462 	union kvm_mmu_page_role root_role;
463 
464 	/*
465 	* The pkru_mask indicates if protection key checks are needed.  It
466 	* consists of 16 domains indexed by page fault error code bits [4:1],
467 	* with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
468 	* Each domain has 2 bits which are ANDed with AD and WD from PKRU.
469 	*/
470 	u32 pkru_mask;
471 
472 	struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
473 
474 	/*
475 	 * Bitmap; bit set = permission fault
476 	 * Byte index: page fault error code [4:1]
477 	 * Bit index: pte permissions in ACC_* format
478 	 */
479 	u8 permissions[16];
480 
481 	u64 *pae_root;
482 	u64 *pml4_root;
483 	u64 *pml5_root;
484 
485 	/*
486 	 * check zero bits on shadow page table entries, these
487 	 * bits include not only hardware reserved bits but also
488 	 * the bits spte never used.
489 	 */
490 	struct rsvd_bits_validate shadow_zero_check;
491 
492 	struct rsvd_bits_validate guest_rsvd_check;
493 
494 	u64 pdptrs[4]; /* pae */
495 };
496 
497 enum pmc_type {
498 	KVM_PMC_GP = 0,
499 	KVM_PMC_FIXED,
500 };
501 
502 struct kvm_pmc {
503 	enum pmc_type type;
504 	u8 idx;
505 	bool is_paused;
506 	bool intr;
507 	/*
508 	 * Base value of the PMC counter, relative to the *consumed* count in
509 	 * the associated perf_event.  This value includes counter updates from
510 	 * the perf_event and emulated_count since the last time the counter
511 	 * was reprogrammed, but it is *not* the current value as seen by the
512 	 * guest or userspace.
513 	 *
514 	 * The count is relative to the associated perf_event so that KVM
515 	 * doesn't need to reprogram the perf_event every time the guest writes
516 	 * to the counter.
517 	 */
518 	u64 counter;
519 	/*
520 	 * PMC events triggered by KVM emulation that haven't been fully
521 	 * processed, i.e. haven't undergone overflow detection.
522 	 */
523 	u64 emulated_counter;
524 	u64 eventsel;
525 	struct perf_event *perf_event;
526 	struct kvm_vcpu *vcpu;
527 	/*
528 	 * only for creating or reusing perf_event,
529 	 * eventsel value for general purpose counters,
530 	 * ctrl value for fixed counters.
531 	 */
532 	u64 current_config;
533 };
534 
535 /* More counters may conflict with other existing Architectural MSRs */
536 #define KVM_MAX(a, b)	((a) >= (b) ? (a) : (b))
537 #define KVM_MAX_NR_INTEL_GP_COUNTERS	8
538 #define KVM_MAX_NR_AMD_GP_COUNTERS	6
539 #define KVM_MAX_NR_GP_COUNTERS		KVM_MAX(KVM_MAX_NR_INTEL_GP_COUNTERS, \
540 						KVM_MAX_NR_AMD_GP_COUNTERS)
541 
542 #define KVM_MAX_NR_INTEL_FIXED_COUTNERS	3
543 #define KVM_MAX_NR_AMD_FIXED_COUTNERS	0
544 #define KVM_MAX_NR_FIXED_COUNTERS	KVM_MAX(KVM_MAX_NR_INTEL_FIXED_COUTNERS, \
545 						KVM_MAX_NR_AMD_FIXED_COUTNERS)
546 
547 struct kvm_pmu {
548 	u8 version;
549 	unsigned nr_arch_gp_counters;
550 	unsigned nr_arch_fixed_counters;
551 	unsigned available_event_types;
552 	u64 fixed_ctr_ctrl;
553 	u64 fixed_ctr_ctrl_rsvd;
554 	u64 global_ctrl;
555 	u64 global_status;
556 	u64 counter_bitmask[2];
557 	u64 global_ctrl_rsvd;
558 	u64 global_status_rsvd;
559 	u64 reserved_bits;
560 	u64 raw_event_mask;
561 	struct kvm_pmc gp_counters[KVM_MAX_NR_GP_COUNTERS];
562 	struct kvm_pmc fixed_counters[KVM_MAX_NR_FIXED_COUNTERS];
563 
564 	/*
565 	 * Overlay the bitmap with a 64-bit atomic so that all bits can be
566 	 * set in a single access, e.g. to reprogram all counters when the PMU
567 	 * filter changes.
568 	 */
569 	union {
570 		DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
571 		atomic64_t __reprogram_pmi;
572 	};
573 	DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
574 	DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
575 
576 	u64 ds_area;
577 	u64 pebs_enable;
578 	u64 pebs_enable_rsvd;
579 	u64 pebs_data_cfg;
580 	u64 pebs_data_cfg_rsvd;
581 
582 	/*
583 	 * If a guest counter is cross-mapped to host counter with different
584 	 * index, its PEBS capability will be temporarily disabled.
585 	 *
586 	 * The user should make sure that this mask is updated
587 	 * after disabling interrupts and before perf_guest_get_msrs();
588 	 */
589 	u64 host_cross_mapped_mask;
590 
591 	/*
592 	 * The gate to release perf_events not marked in
593 	 * pmc_in_use only once in a vcpu time slice.
594 	 */
595 	bool need_cleanup;
596 
597 	/*
598 	 * The total number of programmed perf_events and it helps to avoid
599 	 * redundant check before cleanup if guest don't use vPMU at all.
600 	 */
601 	u8 event_count;
602 };
603 
604 struct kvm_pmu_ops;
605 
606 enum {
607 	KVM_DEBUGREG_BP_ENABLED = 1,
608 	KVM_DEBUGREG_WONT_EXIT = 2,
609 };
610 
611 struct kvm_mtrr {
612 	u64 var[KVM_NR_VAR_MTRR * 2];
613 	u64 fixed_64k;
614 	u64 fixed_16k[2];
615 	u64 fixed_4k[8];
616 	u64 deftype;
617 };
618 
619 /* Hyper-V SynIC timer */
620 struct kvm_vcpu_hv_stimer {
621 	struct hrtimer timer;
622 	int index;
623 	union hv_stimer_config config;
624 	u64 count;
625 	u64 exp_time;
626 	struct hv_message msg;
627 	bool msg_pending;
628 };
629 
630 /* Hyper-V synthetic interrupt controller (SynIC)*/
631 struct kvm_vcpu_hv_synic {
632 	u64 version;
633 	u64 control;
634 	u64 msg_page;
635 	u64 evt_page;
636 	atomic64_t sint[HV_SYNIC_SINT_COUNT];
637 	atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
638 	DECLARE_BITMAP(auto_eoi_bitmap, 256);
639 	DECLARE_BITMAP(vec_bitmap, 256);
640 	bool active;
641 	bool dont_zero_synic_pages;
642 };
643 
644 /* The maximum number of entries on the TLB flush fifo. */
645 #define KVM_HV_TLB_FLUSH_FIFO_SIZE (16)
646 /*
647  * Note: the following 'magic' entry is made up by KVM to avoid putting
648  * anything besides GVA on the TLB flush fifo. It is theoretically possible
649  * to observe a request to flush 4095 PFNs starting from 0xfffffffffffff000
650  * which will look identical. KVM's action to 'flush everything' instead of
651  * flushing these particular addresses is, however, fully legitimate as
652  * flushing more than requested is always OK.
653  */
654 #define KVM_HV_TLB_FLUSHALL_ENTRY  ((u64)-1)
655 
656 enum hv_tlb_flush_fifos {
657 	HV_L1_TLB_FLUSH_FIFO,
658 	HV_L2_TLB_FLUSH_FIFO,
659 	HV_NR_TLB_FLUSH_FIFOS,
660 };
661 
662 struct kvm_vcpu_hv_tlb_flush_fifo {
663 	spinlock_t write_lock;
664 	DECLARE_KFIFO(entries, u64, KVM_HV_TLB_FLUSH_FIFO_SIZE);
665 };
666 
667 /* Hyper-V per vcpu emulation context */
668 struct kvm_vcpu_hv {
669 	struct kvm_vcpu *vcpu;
670 	u32 vp_index;
671 	u64 hv_vapic;
672 	s64 runtime_offset;
673 	struct kvm_vcpu_hv_synic synic;
674 	struct kvm_hyperv_exit exit;
675 	struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
676 	DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
677 	bool enforce_cpuid;
678 	struct {
679 		u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */
680 		u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */
681 		u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */
682 		u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
683 		u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
684 		u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
685 		u32 nested_eax; /* HYPERV_CPUID_NESTED_FEATURES.EAX */
686 		u32 nested_ebx; /* HYPERV_CPUID_NESTED_FEATURES.EBX */
687 	} cpuid_cache;
688 
689 	struct kvm_vcpu_hv_tlb_flush_fifo tlb_flush_fifo[HV_NR_TLB_FLUSH_FIFOS];
690 
691 	/* Preallocated buffer for handling hypercalls passing sparse vCPU set */
692 	u64 sparse_banks[HV_MAX_SPARSE_VCPU_BANKS];
693 
694 	struct hv_vp_assist_page vp_assist_page;
695 
696 	struct {
697 		u64 pa_page_gpa;
698 		u64 vm_id;
699 		u32 vp_id;
700 	} nested;
701 };
702 
703 struct kvm_hypervisor_cpuid {
704 	u32 base;
705 	u32 limit;
706 };
707 
708 #ifdef CONFIG_KVM_XEN
709 /* Xen HVM per vcpu emulation context */
710 struct kvm_vcpu_xen {
711 	u64 hypercall_rip;
712 	u32 current_runstate;
713 	u8 upcall_vector;
714 	struct gfn_to_pfn_cache vcpu_info_cache;
715 	struct gfn_to_pfn_cache vcpu_time_info_cache;
716 	struct gfn_to_pfn_cache runstate_cache;
717 	struct gfn_to_pfn_cache runstate2_cache;
718 	u64 last_steal;
719 	u64 runstate_entry_time;
720 	u64 runstate_times[4];
721 	unsigned long evtchn_pending_sel;
722 	u32 vcpu_id; /* The Xen / ACPI vCPU ID */
723 	u32 timer_virq;
724 	u64 timer_expires; /* In guest epoch */
725 	atomic_t timer_pending;
726 	struct hrtimer timer;
727 	int poll_evtchn;
728 	struct timer_list poll_timer;
729 	struct kvm_hypervisor_cpuid cpuid;
730 };
731 #endif
732 
733 struct kvm_queued_exception {
734 	bool pending;
735 	bool injected;
736 	bool has_error_code;
737 	u8 vector;
738 	u32 error_code;
739 	unsigned long payload;
740 	bool has_payload;
741 };
742 
743 struct kvm_vcpu_arch {
744 	/*
745 	 * rip and regs accesses must go through
746 	 * kvm_{register,rip}_{read,write} functions.
747 	 */
748 	unsigned long regs[NR_VCPU_REGS];
749 	u32 regs_avail;
750 	u32 regs_dirty;
751 
752 	unsigned long cr0;
753 	unsigned long cr0_guest_owned_bits;
754 	unsigned long cr2;
755 	unsigned long cr3;
756 	unsigned long cr4;
757 	unsigned long cr4_guest_owned_bits;
758 	unsigned long cr4_guest_rsvd_bits;
759 	unsigned long cr8;
760 	u32 host_pkru;
761 	u32 pkru;
762 	u32 hflags;
763 	u64 efer;
764 	u64 apic_base;
765 	struct kvm_lapic *apic;    /* kernel irqchip context */
766 	bool load_eoi_exitmap_pending;
767 	DECLARE_BITMAP(ioapic_handled_vectors, 256);
768 	unsigned long apic_attention;
769 	int32_t apic_arb_prio;
770 	int mp_state;
771 	u64 ia32_misc_enable_msr;
772 	u64 smbase;
773 	u64 smi_count;
774 	bool at_instruction_boundary;
775 	bool tpr_access_reporting;
776 	bool xfd_no_write_intercept;
777 	u64 ia32_xss;
778 	u64 microcode_version;
779 	u64 arch_capabilities;
780 	u64 perf_capabilities;
781 
782 	/*
783 	 * Paging state of the vcpu
784 	 *
785 	 * If the vcpu runs in guest mode with two level paging this still saves
786 	 * the paging mode of the l1 guest. This context is always used to
787 	 * handle faults.
788 	 */
789 	struct kvm_mmu *mmu;
790 
791 	/* Non-nested MMU for L1 */
792 	struct kvm_mmu root_mmu;
793 
794 	/* L1 MMU when running nested */
795 	struct kvm_mmu guest_mmu;
796 
797 	/*
798 	 * Paging state of an L2 guest (used for nested npt)
799 	 *
800 	 * This context will save all necessary information to walk page tables
801 	 * of an L2 guest. This context is only initialized for page table
802 	 * walking and not for faulting since we never handle l2 page faults on
803 	 * the host.
804 	 */
805 	struct kvm_mmu nested_mmu;
806 
807 	/*
808 	 * Pointer to the mmu context currently used for
809 	 * gva_to_gpa translations.
810 	 */
811 	struct kvm_mmu *walk_mmu;
812 
813 	struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
814 	struct kvm_mmu_memory_cache mmu_shadow_page_cache;
815 	struct kvm_mmu_memory_cache mmu_shadowed_info_cache;
816 	struct kvm_mmu_memory_cache mmu_page_header_cache;
817 
818 	/*
819 	 * QEMU userspace and the guest each have their own FPU state.
820 	 * In vcpu_run, we switch between the user and guest FPU contexts.
821 	 * While running a VCPU, the VCPU thread will have the guest FPU
822 	 * context.
823 	 *
824 	 * Note that while the PKRU state lives inside the fpu registers,
825 	 * it is switched out separately at VMENTER and VMEXIT time. The
826 	 * "guest_fpstate" state here contains the guest FPU context, with the
827 	 * host PRKU bits.
828 	 */
829 	struct fpu_guest guest_fpu;
830 
831 	u64 xcr0;
832 	u64 guest_supported_xcr0;
833 
834 	struct kvm_pio_request pio;
835 	void *pio_data;
836 	void *sev_pio_data;
837 	unsigned sev_pio_count;
838 
839 	u8 event_exit_inst_len;
840 
841 	bool exception_from_userspace;
842 
843 	/* Exceptions to be injected to the guest. */
844 	struct kvm_queued_exception exception;
845 	/* Exception VM-Exits to be synthesized to L1. */
846 	struct kvm_queued_exception exception_vmexit;
847 
848 	struct kvm_queued_interrupt {
849 		bool injected;
850 		bool soft;
851 		u8 nr;
852 	} interrupt;
853 
854 	int halt_request; /* real mode on Intel only */
855 
856 	int cpuid_nent;
857 	struct kvm_cpuid_entry2 *cpuid_entries;
858 	struct kvm_hypervisor_cpuid kvm_cpuid;
859 	bool is_amd_compatible;
860 
861 	/*
862 	 * FIXME: Drop this macro and use KVM_NR_GOVERNED_FEATURES directly
863 	 * when "struct kvm_vcpu_arch" is no longer defined in an
864 	 * arch/x86/include/asm header.  The max is mostly arbitrary, i.e.
865 	 * can be increased as necessary.
866 	 */
867 #define KVM_MAX_NR_GOVERNED_FEATURES BITS_PER_LONG
868 
869 	/*
870 	 * Track whether or not the guest is allowed to use features that are
871 	 * governed by KVM, where "governed" means KVM needs to manage state
872 	 * and/or explicitly enable the feature in hardware.  Typically, but
873 	 * not always, governed features can be used by the guest if and only
874 	 * if both KVM and userspace want to expose the feature to the guest.
875 	 */
876 	struct {
877 		DECLARE_BITMAP(enabled, KVM_MAX_NR_GOVERNED_FEATURES);
878 	} governed_features;
879 
880 	u64 reserved_gpa_bits;
881 	int maxphyaddr;
882 
883 	/* emulate context */
884 
885 	struct x86_emulate_ctxt *emulate_ctxt;
886 	bool emulate_regs_need_sync_to_vcpu;
887 	bool emulate_regs_need_sync_from_vcpu;
888 	int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
889 
890 	gpa_t time;
891 	struct pvclock_vcpu_time_info hv_clock;
892 	unsigned int hw_tsc_khz;
893 	struct gfn_to_pfn_cache pv_time;
894 	/* set guest stopped flag in pvclock flags field */
895 	bool pvclock_set_guest_stopped_request;
896 
897 	struct {
898 		u8 preempted;
899 		u64 msr_val;
900 		u64 last_steal;
901 		struct gfn_to_hva_cache cache;
902 	} st;
903 
904 	u64 l1_tsc_offset;
905 	u64 tsc_offset; /* current tsc offset */
906 	u64 last_guest_tsc;
907 	u64 last_host_tsc;
908 	u64 tsc_offset_adjustment;
909 	u64 this_tsc_nsec;
910 	u64 this_tsc_write;
911 	u64 this_tsc_generation;
912 	bool tsc_catchup;
913 	bool tsc_always_catchup;
914 	s8 virtual_tsc_shift;
915 	u32 virtual_tsc_mult;
916 	u32 virtual_tsc_khz;
917 	s64 ia32_tsc_adjust_msr;
918 	u64 msr_ia32_power_ctl;
919 	u64 l1_tsc_scaling_ratio;
920 	u64 tsc_scaling_ratio; /* current scaling ratio */
921 
922 	atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
923 	/* Number of NMIs pending injection, not including hardware vNMIs. */
924 	unsigned int nmi_pending;
925 	bool nmi_injected;    /* Trying to inject an NMI this entry */
926 	bool smi_pending;    /* SMI queued after currently running handler */
927 	u8 handling_intr_from_guest;
928 
929 	struct kvm_mtrr mtrr_state;
930 	u64 pat;
931 
932 	unsigned switch_db_regs;
933 	unsigned long db[KVM_NR_DB_REGS];
934 	unsigned long dr6;
935 	unsigned long dr7;
936 	unsigned long eff_db[KVM_NR_DB_REGS];
937 	unsigned long guest_debug_dr7;
938 	u64 msr_platform_info;
939 	u64 msr_misc_features_enables;
940 
941 	u64 mcg_cap;
942 	u64 mcg_status;
943 	u64 mcg_ctl;
944 	u64 mcg_ext_ctl;
945 	u64 *mce_banks;
946 	u64 *mci_ctl2_banks;
947 
948 	/* Cache MMIO info */
949 	u64 mmio_gva;
950 	unsigned mmio_access;
951 	gfn_t mmio_gfn;
952 	u64 mmio_gen;
953 
954 	struct kvm_pmu pmu;
955 
956 	/* used for guest single stepping over the given code position */
957 	unsigned long singlestep_rip;
958 
959 #ifdef CONFIG_KVM_HYPERV
960 	bool hyperv_enabled;
961 	struct kvm_vcpu_hv *hyperv;
962 #endif
963 #ifdef CONFIG_KVM_XEN
964 	struct kvm_vcpu_xen xen;
965 #endif
966 	cpumask_var_t wbinvd_dirty_mask;
967 
968 	unsigned long last_retry_eip;
969 	unsigned long last_retry_addr;
970 
971 	struct {
972 		bool halted;
973 		gfn_t gfns[ASYNC_PF_PER_VCPU];
974 		struct gfn_to_hva_cache data;
975 		u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
976 		u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
977 		u16 vec;
978 		u32 id;
979 		bool send_user_only;
980 		u32 host_apf_flags;
981 		bool delivery_as_pf_vmexit;
982 		bool pageready_pending;
983 	} apf;
984 
985 	/* OSVW MSRs (AMD only) */
986 	struct {
987 		u64 length;
988 		u64 status;
989 	} osvw;
990 
991 	struct {
992 		u64 msr_val;
993 		struct gfn_to_hva_cache data;
994 	} pv_eoi;
995 
996 	u64 msr_kvm_poll_control;
997 
998 	/* pv related host specific info */
999 	struct {
1000 		bool pv_unhalted;
1001 	} pv;
1002 
1003 	int pending_ioapic_eoi;
1004 	int pending_external_vector;
1005 
1006 	/* be preempted when it's in kernel-mode(cpl=0) */
1007 	bool preempted_in_kernel;
1008 
1009 	/* Flush the L1 Data cache for L1TF mitigation on VMENTER */
1010 	bool l1tf_flush_l1d;
1011 
1012 	/* Host CPU on which VM-entry was most recently attempted */
1013 	int last_vmentry_cpu;
1014 
1015 	/* AMD MSRC001_0015 Hardware Configuration */
1016 	u64 msr_hwcr;
1017 
1018 	/* pv related cpuid info */
1019 	struct {
1020 		/*
1021 		 * value of the eax register in the KVM_CPUID_FEATURES CPUID
1022 		 * leaf.
1023 		 */
1024 		u32 features;
1025 
1026 		/*
1027 		 * indicates whether pv emulation should be disabled if features
1028 		 * are not present in the guest's cpuid
1029 		 */
1030 		bool enforce;
1031 	} pv_cpuid;
1032 
1033 	/* Protected Guests */
1034 	bool guest_state_protected;
1035 
1036 	/*
1037 	 * Set when PDPTS were loaded directly by the userspace without
1038 	 * reading the guest memory
1039 	 */
1040 	bool pdptrs_from_userspace;
1041 
1042 #if IS_ENABLED(CONFIG_HYPERV)
1043 	hpa_t hv_root_tdp;
1044 #endif
1045 };
1046 
1047 struct kvm_lpage_info {
1048 	int disallow_lpage;
1049 };
1050 
1051 struct kvm_arch_memory_slot {
1052 	struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
1053 	struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
1054 	unsigned short *gfn_write_track;
1055 };
1056 
1057 /*
1058  * Track the mode of the optimized logical map, as the rules for decoding the
1059  * destination vary per mode.  Enabling the optimized logical map requires all
1060  * software-enabled local APIs to be in the same mode, each addressable APIC to
1061  * be mapped to only one MDA, and each MDA to map to at most one APIC.
1062  */
1063 enum kvm_apic_logical_mode {
1064 	/* All local APICs are software disabled. */
1065 	KVM_APIC_MODE_SW_DISABLED,
1066 	/* All software enabled local APICs in xAPIC cluster addressing mode. */
1067 	KVM_APIC_MODE_XAPIC_CLUSTER,
1068 	/* All software enabled local APICs in xAPIC flat addressing mode. */
1069 	KVM_APIC_MODE_XAPIC_FLAT,
1070 	/* All software enabled local APICs in x2APIC mode. */
1071 	KVM_APIC_MODE_X2APIC,
1072 	/*
1073 	 * Optimized map disabled, e.g. not all local APICs in the same logical
1074 	 * mode, same logical ID assigned to multiple APICs, etc.
1075 	 */
1076 	KVM_APIC_MODE_MAP_DISABLED,
1077 };
1078 
1079 struct kvm_apic_map {
1080 	struct rcu_head rcu;
1081 	enum kvm_apic_logical_mode logical_mode;
1082 	u32 max_apic_id;
1083 	union {
1084 		struct kvm_lapic *xapic_flat_map[8];
1085 		struct kvm_lapic *xapic_cluster_map[16][4];
1086 	};
1087 	struct kvm_lapic *phys_map[];
1088 };
1089 
1090 /* Hyper-V synthetic debugger (SynDbg)*/
1091 struct kvm_hv_syndbg {
1092 	struct {
1093 		u64 control;
1094 		u64 status;
1095 		u64 send_page;
1096 		u64 recv_page;
1097 		u64 pending_page;
1098 	} control;
1099 	u64 options;
1100 };
1101 
1102 /* Current state of Hyper-V TSC page clocksource */
1103 enum hv_tsc_page_status {
1104 	/* TSC page was not set up or disabled */
1105 	HV_TSC_PAGE_UNSET = 0,
1106 	/* TSC page MSR was written by the guest, update pending */
1107 	HV_TSC_PAGE_GUEST_CHANGED,
1108 	/* TSC page update was triggered from the host side */
1109 	HV_TSC_PAGE_HOST_CHANGED,
1110 	/* TSC page was properly set up and is currently active  */
1111 	HV_TSC_PAGE_SET,
1112 	/* TSC page was set up with an inaccessible GPA */
1113 	HV_TSC_PAGE_BROKEN,
1114 };
1115 
1116 #ifdef CONFIG_KVM_HYPERV
1117 /* Hyper-V emulation context */
1118 struct kvm_hv {
1119 	struct mutex hv_lock;
1120 	u64 hv_guest_os_id;
1121 	u64 hv_hypercall;
1122 	u64 hv_tsc_page;
1123 	enum hv_tsc_page_status hv_tsc_page_status;
1124 
1125 	/* Hyper-v based guest crash (NT kernel bugcheck) parameters */
1126 	u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
1127 	u64 hv_crash_ctl;
1128 
1129 	struct ms_hyperv_tsc_page tsc_ref;
1130 
1131 	struct idr conn_to_evt;
1132 
1133 	u64 hv_reenlightenment_control;
1134 	u64 hv_tsc_emulation_control;
1135 	u64 hv_tsc_emulation_status;
1136 	u64 hv_invtsc_control;
1137 
1138 	/* How many vCPUs have VP index != vCPU index */
1139 	atomic_t num_mismatched_vp_indexes;
1140 
1141 	/*
1142 	 * How many SynICs use 'AutoEOI' feature
1143 	 * (protected by arch.apicv_update_lock)
1144 	 */
1145 	unsigned int synic_auto_eoi_used;
1146 
1147 	struct kvm_hv_syndbg hv_syndbg;
1148 
1149 	bool xsaves_xsavec_checked;
1150 };
1151 #endif
1152 
1153 struct msr_bitmap_range {
1154 	u32 flags;
1155 	u32 nmsrs;
1156 	u32 base;
1157 	unsigned long *bitmap;
1158 };
1159 
1160 #ifdef CONFIG_KVM_XEN
1161 /* Xen emulation context */
1162 struct kvm_xen {
1163 	struct mutex xen_lock;
1164 	u32 xen_version;
1165 	bool long_mode;
1166 	bool runstate_update_flag;
1167 	u8 upcall_vector;
1168 	struct gfn_to_pfn_cache shinfo_cache;
1169 	struct idr evtchn_ports;
1170 	unsigned long poll_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)];
1171 };
1172 #endif
1173 
1174 enum kvm_irqchip_mode {
1175 	KVM_IRQCHIP_NONE,
1176 	KVM_IRQCHIP_KERNEL,       /* created with KVM_CREATE_IRQCHIP */
1177 	KVM_IRQCHIP_SPLIT,        /* created with KVM_CAP_SPLIT_IRQCHIP */
1178 };
1179 
1180 struct kvm_x86_msr_filter {
1181 	u8 count;
1182 	bool default_allow:1;
1183 	struct msr_bitmap_range ranges[16];
1184 };
1185 
1186 struct kvm_x86_pmu_event_filter {
1187 	__u32 action;
1188 	__u32 nevents;
1189 	__u32 fixed_counter_bitmap;
1190 	__u32 flags;
1191 	__u32 nr_includes;
1192 	__u32 nr_excludes;
1193 	__u64 *includes;
1194 	__u64 *excludes;
1195 	__u64 events[];
1196 };
1197 
1198 enum kvm_apicv_inhibit {
1199 
1200 	/********************************************************************/
1201 	/* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1202 	/********************************************************************/
1203 
1204 	/*
1205 	 * APIC acceleration is disabled by a module parameter
1206 	 * and/or not supported in hardware.
1207 	 */
1208 	APICV_INHIBIT_REASON_DISABLED,
1209 
1210 	/*
1211 	 * APIC acceleration is inhibited because AutoEOI feature is
1212 	 * being used by a HyperV guest.
1213 	 */
1214 	APICV_INHIBIT_REASON_HYPERV,
1215 
1216 	/*
1217 	 * APIC acceleration is inhibited because the userspace didn't yet
1218 	 * enable the kernel/split irqchip.
1219 	 */
1220 	APICV_INHIBIT_REASON_ABSENT,
1221 
1222 	/* APIC acceleration is inhibited because KVM_GUESTDBG_BLOCKIRQ
1223 	 * (out of band, debug measure of blocking all interrupts on this vCPU)
1224 	 * was enabled, to avoid AVIC/APICv bypassing it.
1225 	 */
1226 	APICV_INHIBIT_REASON_BLOCKIRQ,
1227 
1228 	/*
1229 	 * APICv is disabled because not all vCPUs have a 1:1 mapping between
1230 	 * APIC ID and vCPU, _and_ KVM is not applying its x2APIC hotplug hack.
1231 	 */
1232 	APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED,
1233 
1234 	/*
1235 	 * For simplicity, the APIC acceleration is inhibited
1236 	 * first time either APIC ID or APIC base are changed by the guest
1237 	 * from their reset values.
1238 	 */
1239 	APICV_INHIBIT_REASON_APIC_ID_MODIFIED,
1240 	APICV_INHIBIT_REASON_APIC_BASE_MODIFIED,
1241 
1242 	/******************************************************/
1243 	/* INHIBITs that are relevant only to the AMD's AVIC. */
1244 	/******************************************************/
1245 
1246 	/*
1247 	 * AVIC is inhibited on a vCPU because it runs a nested guest.
1248 	 *
1249 	 * This is needed because unlike APICv, the peers of this vCPU
1250 	 * cannot use the doorbell mechanism to signal interrupts via AVIC when
1251 	 * a vCPU runs nested.
1252 	 */
1253 	APICV_INHIBIT_REASON_NESTED,
1254 
1255 	/*
1256 	 * On SVM, the wait for the IRQ window is implemented with pending vIRQ,
1257 	 * which cannot be injected when the AVIC is enabled, thus AVIC
1258 	 * is inhibited while KVM waits for IRQ window.
1259 	 */
1260 	APICV_INHIBIT_REASON_IRQWIN,
1261 
1262 	/*
1263 	 * PIT (i8254) 're-inject' mode, relies on EOI intercept,
1264 	 * which AVIC doesn't support for edge triggered interrupts.
1265 	 */
1266 	APICV_INHIBIT_REASON_PIT_REINJ,
1267 
1268 	/*
1269 	 * AVIC is disabled because SEV doesn't support it.
1270 	 */
1271 	APICV_INHIBIT_REASON_SEV,
1272 
1273 	/*
1274 	 * AVIC is disabled because not all vCPUs with a valid LDR have a 1:1
1275 	 * mapping between logical ID and vCPU.
1276 	 */
1277 	APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED,
1278 
1279 	NR_APICV_INHIBIT_REASONS,
1280 };
1281 
1282 #define __APICV_INHIBIT_REASON(reason)			\
1283 	{ BIT(APICV_INHIBIT_REASON_##reason), #reason }
1284 
1285 #define APICV_INHIBIT_REASONS				\
1286 	__APICV_INHIBIT_REASON(DISABLED),		\
1287 	__APICV_INHIBIT_REASON(HYPERV),			\
1288 	__APICV_INHIBIT_REASON(ABSENT),			\
1289 	__APICV_INHIBIT_REASON(BLOCKIRQ),		\
1290 	__APICV_INHIBIT_REASON(PHYSICAL_ID_ALIASED),	\
1291 	__APICV_INHIBIT_REASON(APIC_ID_MODIFIED),	\
1292 	__APICV_INHIBIT_REASON(APIC_BASE_MODIFIED),	\
1293 	__APICV_INHIBIT_REASON(NESTED),			\
1294 	__APICV_INHIBIT_REASON(IRQWIN),			\
1295 	__APICV_INHIBIT_REASON(PIT_REINJ),		\
1296 	__APICV_INHIBIT_REASON(SEV),			\
1297 	__APICV_INHIBIT_REASON(LOGICAL_ID_ALIASED)
1298 
1299 struct kvm_arch {
1300 	unsigned long n_used_mmu_pages;
1301 	unsigned long n_requested_mmu_pages;
1302 	unsigned long n_max_mmu_pages;
1303 	unsigned int indirect_shadow_pages;
1304 	u8 mmu_valid_gen;
1305 	u8 vm_type;
1306 	bool has_private_mem;
1307 	bool has_protected_state;
1308 	bool pre_fault_allowed;
1309 	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
1310 	struct list_head active_mmu_pages;
1311 	struct list_head zapped_obsolete_pages;
1312 	/*
1313 	 * A list of kvm_mmu_page structs that, if zapped, could possibly be
1314 	 * replaced by an NX huge page.  A shadow page is on this list if its
1315 	 * existence disallows an NX huge page (nx_huge_page_disallowed is set)
1316 	 * and there are no other conditions that prevent a huge page, e.g.
1317 	 * the backing host page is huge, dirtly logging is not enabled for its
1318 	 * memslot, etc...  Note, zapping shadow pages on this list doesn't
1319 	 * guarantee an NX huge page will be created in its stead, e.g. if the
1320 	 * guest attempts to execute from the region then KVM obviously can't
1321 	 * create an NX huge page (without hanging the guest).
1322 	 */
1323 	struct list_head possible_nx_huge_pages;
1324 #ifdef CONFIG_KVM_EXTERNAL_WRITE_TRACKING
1325 	struct kvm_page_track_notifier_head track_notifier_head;
1326 #endif
1327 	/*
1328 	 * Protects marking pages unsync during page faults, as TDP MMU page
1329 	 * faults only take mmu_lock for read.  For simplicity, the unsync
1330 	 * pages lock is always taken when marking pages unsync regardless of
1331 	 * whether mmu_lock is held for read or write.
1332 	 */
1333 	spinlock_t mmu_unsync_pages_lock;
1334 
1335 	u64 shadow_mmio_value;
1336 
1337 	struct iommu_domain *iommu_domain;
1338 	bool iommu_noncoherent;
1339 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1340 	atomic_t noncoherent_dma_count;
1341 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1342 	atomic_t assigned_device_count;
1343 	struct kvm_pic *vpic;
1344 	struct kvm_ioapic *vioapic;
1345 	struct kvm_pit *vpit;
1346 	atomic_t vapics_in_nmi_mode;
1347 	struct mutex apic_map_lock;
1348 	struct kvm_apic_map __rcu *apic_map;
1349 	atomic_t apic_map_dirty;
1350 
1351 	bool apic_access_memslot_enabled;
1352 	bool apic_access_memslot_inhibited;
1353 
1354 	/* Protects apicv_inhibit_reasons */
1355 	struct rw_semaphore apicv_update_lock;
1356 	unsigned long apicv_inhibit_reasons;
1357 
1358 	gpa_t wall_clock;
1359 
1360 	bool mwait_in_guest;
1361 	bool hlt_in_guest;
1362 	bool pause_in_guest;
1363 	bool cstate_in_guest;
1364 
1365 	unsigned long irq_sources_bitmap;
1366 	s64 kvmclock_offset;
1367 
1368 	/*
1369 	 * This also protects nr_vcpus_matched_tsc which is read from a
1370 	 * preemption-disabled region, so it must be a raw spinlock.
1371 	 */
1372 	raw_spinlock_t tsc_write_lock;
1373 	u64 last_tsc_nsec;
1374 	u64 last_tsc_write;
1375 	u32 last_tsc_khz;
1376 	u64 last_tsc_offset;
1377 	u64 cur_tsc_nsec;
1378 	u64 cur_tsc_write;
1379 	u64 cur_tsc_offset;
1380 	u64 cur_tsc_generation;
1381 	int nr_vcpus_matched_tsc;
1382 
1383 	u32 default_tsc_khz;
1384 	bool user_set_tsc;
1385 	u64 apic_bus_cycle_ns;
1386 
1387 	seqcount_raw_spinlock_t pvclock_sc;
1388 	bool use_master_clock;
1389 	u64 master_kernel_ns;
1390 	u64 master_cycle_now;
1391 	struct delayed_work kvmclock_update_work;
1392 	struct delayed_work kvmclock_sync_work;
1393 
1394 	struct kvm_xen_hvm_config xen_hvm_config;
1395 
1396 	/* reads protected by irq_srcu, writes by irq_lock */
1397 	struct hlist_head mask_notifier_list;
1398 
1399 #ifdef CONFIG_KVM_HYPERV
1400 	struct kvm_hv hyperv;
1401 #endif
1402 
1403 #ifdef CONFIG_KVM_XEN
1404 	struct kvm_xen xen;
1405 #endif
1406 
1407 	bool backwards_tsc_observed;
1408 	bool boot_vcpu_runs_old_kvmclock;
1409 	u32 bsp_vcpu_id;
1410 
1411 	u64 disabled_quirks;
1412 
1413 	enum kvm_irqchip_mode irqchip_mode;
1414 	u8 nr_reserved_ioapic_pins;
1415 
1416 	bool disabled_lapic_found;
1417 
1418 	bool x2apic_format;
1419 	bool x2apic_broadcast_quirk_disabled;
1420 
1421 	bool guest_can_read_msr_platform_info;
1422 	bool exception_payload_enabled;
1423 
1424 	bool triple_fault_event;
1425 
1426 	bool bus_lock_detection_enabled;
1427 	bool enable_pmu;
1428 
1429 	u32 notify_window;
1430 	u32 notify_vmexit_flags;
1431 	/*
1432 	 * If exit_on_emulation_error is set, and the in-kernel instruction
1433 	 * emulator fails to emulate an instruction, allow userspace
1434 	 * the opportunity to look at it.
1435 	 */
1436 	bool exit_on_emulation_error;
1437 
1438 	/* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1439 	u32 user_space_msr_mask;
1440 	struct kvm_x86_msr_filter __rcu *msr_filter;
1441 
1442 	u32 hypercall_exit_enabled;
1443 
1444 	/* Guest can access the SGX PROVISIONKEY. */
1445 	bool sgx_provisioning_allowed;
1446 
1447 	struct kvm_x86_pmu_event_filter __rcu *pmu_event_filter;
1448 	struct task_struct *nx_huge_page_recovery_thread;
1449 
1450 #ifdef CONFIG_X86_64
1451 	/* The number of TDP MMU pages across all roots. */
1452 	atomic64_t tdp_mmu_pages;
1453 
1454 	/*
1455 	 * List of struct kvm_mmu_pages being used as roots.
1456 	 * All struct kvm_mmu_pages in the list should have
1457 	 * tdp_mmu_page set.
1458 	 *
1459 	 * For reads, this list is protected by:
1460 	 *	the MMU lock in read mode + RCU or
1461 	 *	the MMU lock in write mode
1462 	 *
1463 	 * For writes, this list is protected by tdp_mmu_pages_lock; see
1464 	 * below for the details.
1465 	 *
1466 	 * Roots will remain in the list until their tdp_mmu_root_count
1467 	 * drops to zero, at which point the thread that decremented the
1468 	 * count to zero should removed the root from the list and clean
1469 	 * it up, freeing the root after an RCU grace period.
1470 	 */
1471 	struct list_head tdp_mmu_roots;
1472 
1473 	/*
1474 	 * Protects accesses to the following fields when the MMU lock
1475 	 * is held in read mode:
1476 	 *  - tdp_mmu_roots (above)
1477 	 *  - the link field of kvm_mmu_page structs used by the TDP MMU
1478 	 *  - possible_nx_huge_pages;
1479 	 *  - the possible_nx_huge_page_link field of kvm_mmu_page structs used
1480 	 *    by the TDP MMU
1481 	 * Because the lock is only taken within the MMU lock, strictly
1482 	 * speaking it is redundant to acquire this lock when the thread
1483 	 * holds the MMU lock in write mode.  However it often simplifies
1484 	 * the code to do so.
1485 	 */
1486 	spinlock_t tdp_mmu_pages_lock;
1487 #endif /* CONFIG_X86_64 */
1488 
1489 	/*
1490 	 * If set, at least one shadow root has been allocated. This flag
1491 	 * is used as one input when determining whether certain memslot
1492 	 * related allocations are necessary.
1493 	 */
1494 	bool shadow_root_allocated;
1495 
1496 #ifdef CONFIG_KVM_EXTERNAL_WRITE_TRACKING
1497 	/*
1498 	 * If set, the VM has (or had) an external write tracking user, and
1499 	 * thus all write tracking metadata has been allocated, even if KVM
1500 	 * itself isn't using write tracking.
1501 	 */
1502 	bool external_write_tracking_enabled;
1503 #endif
1504 
1505 #if IS_ENABLED(CONFIG_HYPERV)
1506 	hpa_t	hv_root_tdp;
1507 	spinlock_t hv_root_tdp_lock;
1508 	struct hv_partition_assist_pg *hv_pa_pg;
1509 #endif
1510 	/*
1511 	 * VM-scope maximum vCPU ID. Used to determine the size of structures
1512 	 * that increase along with the maximum vCPU ID, in which case, using
1513 	 * the global KVM_MAX_VCPU_IDS may lead to significant memory waste.
1514 	 */
1515 	u32 max_vcpu_ids;
1516 
1517 	bool disable_nx_huge_pages;
1518 
1519 	/*
1520 	 * Memory caches used to allocate shadow pages when performing eager
1521 	 * page splitting. No need for a shadowed_info_cache since eager page
1522 	 * splitting only allocates direct shadow pages.
1523 	 *
1524 	 * Protected by kvm->slots_lock.
1525 	 */
1526 	struct kvm_mmu_memory_cache split_shadow_page_cache;
1527 	struct kvm_mmu_memory_cache split_page_header_cache;
1528 
1529 	/*
1530 	 * Memory cache used to allocate pte_list_desc structs while splitting
1531 	 * huge pages. In the worst case, to split one huge page, 512
1532 	 * pte_list_desc structs are needed to add each lower level leaf sptep
1533 	 * to the rmap plus 1 to extend the parent_ptes rmap of the lower level
1534 	 * page table.
1535 	 *
1536 	 * Protected by kvm->slots_lock.
1537 	 */
1538 #define SPLIT_DESC_CACHE_MIN_NR_OBJECTS (SPTE_ENT_PER_PAGE + 1)
1539 	struct kvm_mmu_memory_cache split_desc_cache;
1540 };
1541 
1542 struct kvm_vm_stat {
1543 	struct kvm_vm_stat_generic generic;
1544 	u64 mmu_shadow_zapped;
1545 	u64 mmu_pte_write;
1546 	u64 mmu_pde_zapped;
1547 	u64 mmu_flooded;
1548 	u64 mmu_recycled;
1549 	u64 mmu_cache_miss;
1550 	u64 mmu_unsync;
1551 	union {
1552 		struct {
1553 			atomic64_t pages_4k;
1554 			atomic64_t pages_2m;
1555 			atomic64_t pages_1g;
1556 		};
1557 		atomic64_t pages[KVM_NR_PAGE_SIZES];
1558 	};
1559 	u64 nx_lpage_splits;
1560 	u64 max_mmu_page_hash_collisions;
1561 	u64 max_mmu_rmap_size;
1562 };
1563 
1564 struct kvm_vcpu_stat {
1565 	struct kvm_vcpu_stat_generic generic;
1566 	u64 pf_taken;
1567 	u64 pf_fixed;
1568 	u64 pf_emulate;
1569 	u64 pf_spurious;
1570 	u64 pf_fast;
1571 	u64 pf_mmio_spte_created;
1572 	u64 pf_guest;
1573 	u64 tlb_flush;
1574 	u64 invlpg;
1575 
1576 	u64 exits;
1577 	u64 io_exits;
1578 	u64 mmio_exits;
1579 	u64 signal_exits;
1580 	u64 irq_window_exits;
1581 	u64 nmi_window_exits;
1582 	u64 l1d_flush;
1583 	u64 halt_exits;
1584 	u64 request_irq_exits;
1585 	u64 irq_exits;
1586 	u64 host_state_reload;
1587 	u64 fpu_reload;
1588 	u64 insn_emulation;
1589 	u64 insn_emulation_fail;
1590 	u64 hypercalls;
1591 	u64 irq_injections;
1592 	u64 nmi_injections;
1593 	u64 req_event;
1594 	u64 nested_run;
1595 	u64 directed_yield_attempted;
1596 	u64 directed_yield_successful;
1597 	u64 preemption_reported;
1598 	u64 preemption_other;
1599 	u64 guest_mode;
1600 	u64 notify_window_exits;
1601 };
1602 
1603 struct x86_instruction_info;
1604 
1605 struct msr_data {
1606 	bool host_initiated;
1607 	u32 index;
1608 	u64 data;
1609 };
1610 
1611 struct kvm_lapic_irq {
1612 	u32 vector;
1613 	u16 delivery_mode;
1614 	u16 dest_mode;
1615 	bool level;
1616 	u16 trig_mode;
1617 	u32 shorthand;
1618 	u32 dest_id;
1619 	bool msi_redir_hint;
1620 };
1621 
kvm_lapic_irq_dest_mode(bool dest_mode_logical)1622 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1623 {
1624 	return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1625 }
1626 
1627 struct kvm_x86_ops {
1628 	const char *name;
1629 
1630 	int (*check_processor_compatibility)(void);
1631 
1632 	int (*hardware_enable)(void);
1633 	void (*hardware_disable)(void);
1634 	void (*hardware_unsetup)(void);
1635 	bool (*has_emulated_msr)(struct kvm *kvm, u32 index);
1636 	void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1637 
1638 	unsigned int vm_size;
1639 	int (*vm_init)(struct kvm *kvm);
1640 	void (*vm_destroy)(struct kvm *kvm);
1641 
1642 	/* Create, but do not attach this VCPU */
1643 	int (*vcpu_precreate)(struct kvm *kvm);
1644 	int (*vcpu_create)(struct kvm_vcpu *vcpu);
1645 	void (*vcpu_free)(struct kvm_vcpu *vcpu);
1646 	void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1647 
1648 	void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu);
1649 	void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1650 	void (*vcpu_put)(struct kvm_vcpu *vcpu);
1651 
1652 	void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1653 	int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1654 	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1655 	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1656 	void (*get_segment)(struct kvm_vcpu *vcpu,
1657 			    struct kvm_segment *var, int seg);
1658 	int (*get_cpl)(struct kvm_vcpu *vcpu);
1659 	void (*set_segment)(struct kvm_vcpu *vcpu,
1660 			    struct kvm_segment *var, int seg);
1661 	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1662 	bool (*is_valid_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1663 	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1664 	void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1665 	bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1666 	void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1667 	int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1668 	void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1669 	void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1670 	void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1671 	void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1672 	void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1673 	void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1674 	void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1675 	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1676 	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1677 	bool (*get_if_flag)(struct kvm_vcpu *vcpu);
1678 
1679 	void (*flush_tlb_all)(struct kvm_vcpu *vcpu);
1680 	void (*flush_tlb_current)(struct kvm_vcpu *vcpu);
1681 #if IS_ENABLED(CONFIG_HYPERV)
1682 	int  (*flush_remote_tlbs)(struct kvm *kvm);
1683 	int  (*flush_remote_tlbs_range)(struct kvm *kvm, gfn_t gfn,
1684 					gfn_t nr_pages);
1685 #endif
1686 
1687 	/*
1688 	 * Flush any TLB entries associated with the given GVA.
1689 	 * Does not need to flush GPA->HPA mappings.
1690 	 * Can potentially get non-canonical addresses through INVLPGs, which
1691 	 * the implementation may choose to ignore if appropriate.
1692 	 */
1693 	void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1694 
1695 	/*
1696 	 * Flush any TLB entries created by the guest.  Like tlb_flush_gva(),
1697 	 * does not need to flush GPA->HPA mappings.
1698 	 */
1699 	void (*flush_tlb_guest)(struct kvm_vcpu *vcpu);
1700 
1701 	int (*vcpu_pre_run)(struct kvm_vcpu *vcpu);
1702 	enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu,
1703 						  bool force_immediate_exit);
1704 	int (*handle_exit)(struct kvm_vcpu *vcpu,
1705 		enum exit_fastpath_completion exit_fastpath);
1706 	int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1707 	void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1708 	void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1709 	u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1710 	void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1711 				unsigned char *hypercall_addr);
1712 	void (*inject_irq)(struct kvm_vcpu *vcpu, bool reinjected);
1713 	void (*inject_nmi)(struct kvm_vcpu *vcpu);
1714 	void (*inject_exception)(struct kvm_vcpu *vcpu);
1715 	void (*cancel_injection)(struct kvm_vcpu *vcpu);
1716 	int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1717 	int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1718 	bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1719 	void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1720 	/* Whether or not a virtual NMI is pending in hardware. */
1721 	bool (*is_vnmi_pending)(struct kvm_vcpu *vcpu);
1722 	/*
1723 	 * Attempt to pend a virtual NMI in hardware.  Returns %true on success
1724 	 * to allow using static_call_ret0 as the fallback.
1725 	 */
1726 	bool (*set_vnmi_pending)(struct kvm_vcpu *vcpu);
1727 	void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1728 	void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1729 	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1730 	const unsigned long required_apicv_inhibits;
1731 	bool allow_apicv_in_x2apic_without_x2apic_virtualization;
1732 	void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1733 	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1734 	void (*hwapic_isr_update)(int isr);
1735 	void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1736 	void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1737 	void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1738 	void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode,
1739 				  int trig_mode, int vector);
1740 	int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1741 	int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1742 	int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1743 	u8 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1744 
1745 	void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa,
1746 			     int root_level);
1747 
1748 	bool (*has_wbinvd_exit)(void);
1749 
1750 	u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);
1751 	u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);
1752 	void (*write_tsc_offset)(struct kvm_vcpu *vcpu);
1753 	void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu);
1754 
1755 	/*
1756 	 * Retrieve somewhat arbitrary exit information.  Intended to
1757 	 * be used only from within tracepoints or error paths.
1758 	 */
1759 	void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason,
1760 			      u64 *info1, u64 *info2,
1761 			      u32 *exit_int_info, u32 *exit_int_info_err_code);
1762 
1763 	int (*check_intercept)(struct kvm_vcpu *vcpu,
1764 			       struct x86_instruction_info *info,
1765 			       enum x86_intercept_stage stage,
1766 			       struct x86_exception *exception);
1767 	void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1768 
1769 	/*
1770 	 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer.  A zero
1771 	 * value indicates CPU dirty logging is unsupported or disabled.
1772 	 */
1773 	int cpu_dirty_log_size;
1774 	void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);
1775 
1776 	const struct kvm_x86_nested_ops *nested_ops;
1777 
1778 	void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1779 	void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1780 
1781 	int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq,
1782 			      uint32_t guest_irq, bool set);
1783 	void (*pi_start_assignment)(struct kvm *kvm);
1784 	void (*apicv_pre_state_restore)(struct kvm_vcpu *vcpu);
1785 	void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1786 	bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1787 
1788 	int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1789 			    bool *expired);
1790 	void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1791 
1792 	void (*setup_mce)(struct kvm_vcpu *vcpu);
1793 
1794 #ifdef CONFIG_KVM_SMM
1795 	int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1796 	int (*enter_smm)(struct kvm_vcpu *vcpu, union kvm_smram *smram);
1797 	int (*leave_smm)(struct kvm_vcpu *vcpu, const union kvm_smram *smram);
1798 	void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1799 #endif
1800 
1801 	int (*dev_get_attr)(u32 group, u64 attr, u64 *val);
1802 	int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp);
1803 	int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1804 	int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1805 	int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1806 	int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1807 	void (*guest_memory_reclaimed)(struct kvm *kvm);
1808 
1809 	int (*get_msr_feature)(struct kvm_msr_entry *entry);
1810 
1811 	int (*check_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
1812 					 void *insn, int insn_len);
1813 
1814 	bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1815 	int (*enable_l2_tlb_flush)(struct kvm_vcpu *vcpu);
1816 
1817 	void (*migrate_timers)(struct kvm_vcpu *vcpu);
1818 	void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1819 	int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
1820 
1821 	void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
1822 
1823 	/*
1824 	 * Returns vCPU specific APICv inhibit reasons
1825 	 */
1826 	unsigned long (*vcpu_get_apicv_inhibit_reasons)(struct kvm_vcpu *vcpu);
1827 
1828 	gva_t (*get_untagged_addr)(struct kvm_vcpu *vcpu, gva_t gva, unsigned int flags);
1829 	void *(*alloc_apic_backing_page)(struct kvm_vcpu *vcpu);
1830 	int (*gmem_prepare)(struct kvm *kvm, kvm_pfn_t pfn, gfn_t gfn, int max_order);
1831 	void (*gmem_invalidate)(kvm_pfn_t start, kvm_pfn_t end);
1832 	int (*private_max_mapping_level)(struct kvm *kvm, kvm_pfn_t pfn);
1833 };
1834 
1835 struct kvm_x86_nested_ops {
1836 	void (*leave_nested)(struct kvm_vcpu *vcpu);
1837 	bool (*is_exception_vmexit)(struct kvm_vcpu *vcpu, u8 vector,
1838 				    u32 error_code);
1839 	int (*check_events)(struct kvm_vcpu *vcpu);
1840 	bool (*has_events)(struct kvm_vcpu *vcpu, bool for_injection);
1841 	void (*triple_fault)(struct kvm_vcpu *vcpu);
1842 	int (*get_state)(struct kvm_vcpu *vcpu,
1843 			 struct kvm_nested_state __user *user_kvm_nested_state,
1844 			 unsigned user_data_size);
1845 	int (*set_state)(struct kvm_vcpu *vcpu,
1846 			 struct kvm_nested_state __user *user_kvm_nested_state,
1847 			 struct kvm_nested_state *kvm_state);
1848 	bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1849 	int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1850 
1851 	int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1852 			    uint16_t *vmcs_version);
1853 	uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1854 	void (*hv_inject_synthetic_vmexit_post_tlb_flush)(struct kvm_vcpu *vcpu);
1855 };
1856 
1857 struct kvm_x86_init_ops {
1858 	int (*hardware_setup)(void);
1859 	unsigned int (*handle_intel_pt_intr)(void);
1860 
1861 	struct kvm_x86_ops *runtime_ops;
1862 	struct kvm_pmu_ops *pmu_ops;
1863 };
1864 
1865 struct kvm_arch_async_pf {
1866 	u32 token;
1867 	gfn_t gfn;
1868 	unsigned long cr3;
1869 	bool direct_map;
1870 	u64 error_code;
1871 };
1872 
1873 extern u32 __read_mostly kvm_nr_uret_msrs;
1874 extern bool __read_mostly allow_smaller_maxphyaddr;
1875 extern bool __read_mostly enable_apicv;
1876 extern struct kvm_x86_ops kvm_x86_ops;
1877 
1878 #define kvm_x86_call(func) static_call(kvm_x86_##func)
1879 #define kvm_pmu_call(func) static_call(kvm_x86_pmu_##func)
1880 
1881 #define KVM_X86_OP(func) \
1882 	DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1883 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
1884 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
1885 #include <asm/kvm-x86-ops.h>
1886 
1887 int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops);
1888 void kvm_x86_vendor_exit(void);
1889 
1890 #define __KVM_HAVE_ARCH_VM_ALLOC
kvm_arch_alloc_vm(void)1891 static inline struct kvm *kvm_arch_alloc_vm(void)
1892 {
1893 	return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1894 }
1895 
1896 #define __KVM_HAVE_ARCH_VM_FREE
1897 void kvm_arch_free_vm(struct kvm *kvm);
1898 
1899 #if IS_ENABLED(CONFIG_HYPERV)
1900 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS
kvm_arch_flush_remote_tlbs(struct kvm * kvm)1901 static inline int kvm_arch_flush_remote_tlbs(struct kvm *kvm)
1902 {
1903 	if (kvm_x86_ops.flush_remote_tlbs &&
1904 	    !kvm_x86_call(flush_remote_tlbs)(kvm))
1905 		return 0;
1906 	else
1907 		return -ENOTSUPP;
1908 }
1909 
1910 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE
kvm_arch_flush_remote_tlbs_range(struct kvm * kvm,gfn_t gfn,u64 nr_pages)1911 static inline int kvm_arch_flush_remote_tlbs_range(struct kvm *kvm, gfn_t gfn,
1912 						   u64 nr_pages)
1913 {
1914 	if (!kvm_x86_ops.flush_remote_tlbs_range)
1915 		return -EOPNOTSUPP;
1916 
1917 	return kvm_x86_call(flush_remote_tlbs_range)(kvm, gfn, nr_pages);
1918 }
1919 #endif /* CONFIG_HYPERV */
1920 
1921 enum kvm_intr_type {
1922 	/* Values are arbitrary, but must be non-zero. */
1923 	KVM_HANDLING_IRQ = 1,
1924 	KVM_HANDLING_NMI,
1925 };
1926 
1927 /* Enable perf NMI and timer modes to work, and minimise false positives. */
1928 #define kvm_arch_pmi_in_guest(vcpu) \
1929 	((vcpu) && (vcpu)->arch.handling_intr_from_guest && \
1930 	 (!!in_nmi() == ((vcpu)->arch.handling_intr_from_guest == KVM_HANDLING_NMI)))
1931 
1932 void __init kvm_mmu_x86_module_init(void);
1933 int kvm_mmu_vendor_module_init(void);
1934 void kvm_mmu_vendor_module_exit(void);
1935 
1936 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1937 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1938 void kvm_mmu_init_vm(struct kvm *kvm);
1939 void kvm_mmu_uninit_vm(struct kvm *kvm);
1940 
1941 void kvm_mmu_init_memslot_memory_attributes(struct kvm *kvm,
1942 					    struct kvm_memory_slot *slot);
1943 
1944 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);
1945 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1946 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1947 				      const struct kvm_memory_slot *memslot,
1948 				      int start_level);
1949 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
1950 				       const struct kvm_memory_slot *memslot,
1951 				       int target_level);
1952 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
1953 				  const struct kvm_memory_slot *memslot,
1954 				  u64 start, u64 end,
1955 				  int target_level);
1956 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1957 				   const struct kvm_memory_slot *memslot);
1958 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1959 				   const struct kvm_memory_slot *memslot);
1960 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1961 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1962 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end);
1963 
1964 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
1965 
1966 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1967 			  const void *val, int bytes);
1968 
1969 struct kvm_irq_mask_notifier {
1970 	void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1971 	int irq;
1972 	struct hlist_node link;
1973 };
1974 
1975 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1976 				    struct kvm_irq_mask_notifier *kimn);
1977 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1978 				      struct kvm_irq_mask_notifier *kimn);
1979 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1980 			     bool mask);
1981 
1982 extern bool tdp_enabled;
1983 
1984 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1985 
1986 /*
1987  * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1988  *			userspace I/O) to indicate that the emulation context
1989  *			should be reused as is, i.e. skip initialization of
1990  *			emulation context, instruction fetch and decode.
1991  *
1992  * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1993  *		      Indicates that only select instructions (tagged with
1994  *		      EmulateOnUD) should be emulated (to minimize the emulator
1995  *		      attack surface).  See also EMULTYPE_TRAP_UD_FORCED.
1996  *
1997  * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1998  *		   decode the instruction length.  For use *only* by
1999  *		   kvm_x86_ops.skip_emulated_instruction() implementations if
2000  *		   EMULTYPE_COMPLETE_USER_EXIT is not set.
2001  *
2002  * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
2003  *			     retry native execution under certain conditions,
2004  *			     Can only be set in conjunction with EMULTYPE_PF.
2005  *
2006  * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
2007  *			     triggered by KVM's magic "force emulation" prefix,
2008  *			     which is opt in via module param (off by default).
2009  *			     Bypasses EmulateOnUD restriction despite emulating
2010  *			     due to an intercepted #UD (see EMULTYPE_TRAP_UD).
2011  *			     Used to test the full emulator from userspace.
2012  *
2013  * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
2014  *			backdoor emulation, which is opt in via module param.
2015  *			VMware backdoor emulation handles select instructions
2016  *			and reinjects the #GP for all other cases.
2017  *
2018  * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
2019  *		 case the CR2/GPA value pass on the stack is valid.
2020  *
2021  * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility
2022  *				 state and inject single-step #DBs after skipping
2023  *				 an instruction (after completing userspace I/O).
2024  *
2025  * EMULTYPE_WRITE_PF_TO_SP - Set when emulating an intercepted page fault that
2026  *			     is attempting to write a gfn that contains one or
2027  *			     more of the PTEs used to translate the write itself,
2028  *			     and the owning page table is being shadowed by KVM.
2029  *			     If emulation of the faulting instruction fails and
2030  *			     this flag is set, KVM will exit to userspace instead
2031  *			     of retrying emulation as KVM cannot make forward
2032  *			     progress.
2033  *
2034  *			     If emulation fails for a write to guest page tables,
2035  *			     KVM unprotects (zaps) the shadow page for the target
2036  *			     gfn and resumes the guest to retry the non-emulatable
2037  *			     instruction (on hardware).  Unprotecting the gfn
2038  *			     doesn't allow forward progress for a self-changing
2039  *			     access because doing so also zaps the translation for
2040  *			     the gfn, i.e. retrying the instruction will hit a
2041  *			     !PRESENT fault, which results in a new shadow page
2042  *			     and sends KVM back to square one.
2043  */
2044 #define EMULTYPE_NO_DECODE	    (1 << 0)
2045 #define EMULTYPE_TRAP_UD	    (1 << 1)
2046 #define EMULTYPE_SKIP		    (1 << 2)
2047 #define EMULTYPE_ALLOW_RETRY_PF	    (1 << 3)
2048 #define EMULTYPE_TRAP_UD_FORCED	    (1 << 4)
2049 #define EMULTYPE_VMWARE_GP	    (1 << 5)
2050 #define EMULTYPE_PF		    (1 << 6)
2051 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7)
2052 #define EMULTYPE_WRITE_PF_TO_SP	    (1 << 8)
2053 
2054 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
2055 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
2056 					void *insn, int insn_len);
2057 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu,
2058 					  u64 *data, u8 ndata);
2059 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu);
2060 
2061 void kvm_enable_efer_bits(u64);
2062 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
2063 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
2064 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
2065 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
2066 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
2067 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
2068 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu);
2069 int kvm_emulate_invd(struct kvm_vcpu *vcpu);
2070 int kvm_emulate_mwait(struct kvm_vcpu *vcpu);
2071 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu);
2072 int kvm_emulate_monitor(struct kvm_vcpu *vcpu);
2073 
2074 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
2075 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
2076 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
2077 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu);
2078 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu);
2079 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
2080 
2081 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
2082 void kvm_set_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
2083 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
2084 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
2085 
2086 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
2087 		    int reason, bool has_error_code, u32 error_code);
2088 
2089 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
2090 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
2091 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
2092 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
2093 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
2094 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2095 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
2096 unsigned long kvm_get_dr(struct kvm_vcpu *vcpu, int dr);
2097 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
2098 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
2099 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu);
2100 
2101 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
2102 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
2103 
2104 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
2105 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
2106 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu);
2107 
2108 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
2109 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
2110 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
2111 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
2112 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
2113 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
2114 void kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
2115 				    struct x86_exception *fault);
2116 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
2117 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
2118 
__kvm_irq_line_state(unsigned long * irq_state,int irq_source_id,int level)2119 static inline int __kvm_irq_line_state(unsigned long *irq_state,
2120 				       int irq_source_id, int level)
2121 {
2122 	/* Logical OR for level trig interrupt */
2123 	if (level)
2124 		__set_bit(irq_source_id, irq_state);
2125 	else
2126 		__clear_bit(irq_source_id, irq_state);
2127 
2128 	return !!(*irq_state);
2129 }
2130 
2131 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
2132 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
2133 
2134 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
2135 int kvm_get_nr_pending_nmis(struct kvm_vcpu *vcpu);
2136 
2137 void kvm_update_dr7(struct kvm_vcpu *vcpu);
2138 
2139 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
2140 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
2141 			ulong roots_to_free);
2142 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu);
2143 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
2144 			      struct x86_exception *exception);
2145 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
2146 			       struct x86_exception *exception);
2147 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
2148 				struct x86_exception *exception);
2149 
2150 bool kvm_apicv_activated(struct kvm *kvm);
2151 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu);
2152 void __kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
2153 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2154 				      enum kvm_apicv_inhibit reason, bool set);
2155 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2156 				    enum kvm_apicv_inhibit reason, bool set);
2157 
kvm_set_apicv_inhibit(struct kvm * kvm,enum kvm_apicv_inhibit reason)2158 static inline void kvm_set_apicv_inhibit(struct kvm *kvm,
2159 					 enum kvm_apicv_inhibit reason)
2160 {
2161 	kvm_set_or_clear_apicv_inhibit(kvm, reason, true);
2162 }
2163 
kvm_clear_apicv_inhibit(struct kvm * kvm,enum kvm_apicv_inhibit reason)2164 static inline void kvm_clear_apicv_inhibit(struct kvm *kvm,
2165 					   enum kvm_apicv_inhibit reason)
2166 {
2167 	kvm_set_or_clear_apicv_inhibit(kvm, reason, false);
2168 }
2169 
2170 unsigned long __kvm_emulate_hypercall(struct kvm_vcpu *vcpu, unsigned long nr,
2171 				      unsigned long a0, unsigned long a1,
2172 				      unsigned long a2, unsigned long a3,
2173 				      int op_64_bit, int cpl);
2174 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
2175 
2176 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
2177 		       void *insn, int insn_len);
2178 void kvm_mmu_print_sptes(struct kvm_vcpu *vcpu, gpa_t gpa, const char *msg);
2179 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
2180 void kvm_mmu_invalidate_addr(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
2181 			     u64 addr, unsigned long roots);
2182 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
2183 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd);
2184 
2185 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
2186 		       int tdp_max_root_level, int tdp_huge_page_level);
2187 
2188 
2189 #ifdef CONFIG_KVM_PRIVATE_MEM
2190 #define kvm_arch_has_private_mem(kvm) ((kvm)->arch.has_private_mem)
2191 #else
2192 #define kvm_arch_has_private_mem(kvm) false
2193 #endif
2194 
2195 #define kvm_arch_has_readonly_mem(kvm) (!(kvm)->arch.has_protected_state)
2196 
kvm_read_ldt(void)2197 static inline u16 kvm_read_ldt(void)
2198 {
2199 	u16 ldt;
2200 	asm("sldt %0" : "=g"(ldt));
2201 	return ldt;
2202 }
2203 
kvm_load_ldt(u16 sel)2204 static inline void kvm_load_ldt(u16 sel)
2205 {
2206 	asm("lldt %0" : : "rm"(sel));
2207 }
2208 
2209 #ifdef CONFIG_X86_64
read_msr(unsigned long msr)2210 static inline unsigned long read_msr(unsigned long msr)
2211 {
2212 	u64 value;
2213 
2214 	rdmsrl(msr, value);
2215 	return value;
2216 }
2217 #endif
2218 
kvm_inject_gp(struct kvm_vcpu * vcpu,u32 error_code)2219 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
2220 {
2221 	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
2222 }
2223 
2224 #define TSS_IOPB_BASE_OFFSET 0x66
2225 #define TSS_BASE_SIZE 0x68
2226 #define TSS_IOPB_SIZE (65536 / 8)
2227 #define TSS_REDIRECTION_SIZE (256 / 8)
2228 #define RMODE_TSS_SIZE							\
2229 	(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
2230 
2231 enum {
2232 	TASK_SWITCH_CALL = 0,
2233 	TASK_SWITCH_IRET = 1,
2234 	TASK_SWITCH_JMP = 2,
2235 	TASK_SWITCH_GATE = 3,
2236 };
2237 
2238 #define HF_GUEST_MASK		(1 << 0) /* VCPU is in guest-mode */
2239 
2240 #ifdef CONFIG_KVM_SMM
2241 #define HF_SMM_MASK		(1 << 1)
2242 #define HF_SMM_INSIDE_NMI_MASK	(1 << 2)
2243 
2244 # define KVM_MAX_NR_ADDRESS_SPACES	2
2245 /* SMM is currently unsupported for guests with private memory. */
2246 # define kvm_arch_nr_memslot_as_ids(kvm) (kvm_arch_has_private_mem(kvm) ? 1 : 2)
2247 # define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
2248 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
2249 #else
2250 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, 0)
2251 #endif
2252 
2253 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
2254 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
2255 int kvm_cpu_has_extint(struct kvm_vcpu *v);
2256 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
2257 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
2258 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
2259 
2260 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
2261 		    unsigned long ipi_bitmap_high, u32 min,
2262 		    unsigned long icr, int op_64_bit);
2263 
2264 int kvm_add_user_return_msr(u32 msr);
2265 int kvm_find_user_return_msr(u32 msr);
2266 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
2267 
kvm_is_supported_user_return_msr(u32 msr)2268 static inline bool kvm_is_supported_user_return_msr(u32 msr)
2269 {
2270 	return kvm_find_user_return_msr(msr) >= 0;
2271 }
2272 
2273 u64 kvm_scale_tsc(u64 tsc, u64 ratio);
2274 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
2275 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier);
2276 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier);
2277 
2278 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
2279 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
2280 
2281 void kvm_make_scan_ioapic_request(struct kvm *kvm);
2282 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
2283 				       unsigned long *vcpu_bitmap);
2284 
2285 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
2286 				     struct kvm_async_pf *work);
2287 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
2288 				 struct kvm_async_pf *work);
2289 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
2290 			       struct kvm_async_pf *work);
2291 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
2292 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
2293 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
2294 
2295 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
2296 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
2297 
2298 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
2299 				     u32 size);
2300 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
2301 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
2302 
2303 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
2304 			     struct kvm_vcpu **dest_vcpu);
2305 
2306 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
2307 		     struct kvm_lapic_irq *irq);
2308 
kvm_irq_is_postable(struct kvm_lapic_irq * irq)2309 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
2310 {
2311 	/* We can only post Fixed and LowPrio IRQs */
2312 	return (irq->delivery_mode == APIC_DM_FIXED ||
2313 		irq->delivery_mode == APIC_DM_LOWEST);
2314 }
2315 
kvm_arch_vcpu_blocking(struct kvm_vcpu * vcpu)2316 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
2317 {
2318 	kvm_x86_call(vcpu_blocking)(vcpu);
2319 }
2320 
kvm_arch_vcpu_unblocking(struct kvm_vcpu * vcpu)2321 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
2322 {
2323 	kvm_x86_call(vcpu_unblocking)(vcpu);
2324 }
2325 
kvm_cpu_get_apicid(int mps_cpu)2326 static inline int kvm_cpu_get_apicid(int mps_cpu)
2327 {
2328 #ifdef CONFIG_X86_LOCAL_APIC
2329 	return default_cpu_present_to_apicid(mps_cpu);
2330 #else
2331 	WARN_ON_ONCE(1);
2332 	return BAD_APICID;
2333 #endif
2334 }
2335 
2336 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);
2337 
2338 #define KVM_CLOCK_VALID_FLAGS						\
2339 	(KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
2340 
2341 #define KVM_X86_VALID_QUIRKS			\
2342 	(KVM_X86_QUIRK_LINT0_REENABLED |	\
2343 	 KVM_X86_QUIRK_CD_NW_CLEARED |		\
2344 	 KVM_X86_QUIRK_LAPIC_MMIO_HOLE |	\
2345 	 KVM_X86_QUIRK_OUT_7E_INC_RIP |		\
2346 	 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT |	\
2347 	 KVM_X86_QUIRK_FIX_HYPERCALL_INSN |	\
2348 	 KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS)
2349 
2350 /*
2351  * KVM previously used a u32 field in kvm_run to indicate the hypercall was
2352  * initiated from long mode. KVM now sets bit 0 to indicate long mode, but the
2353  * remaining 31 lower bits must be 0 to preserve ABI.
2354  */
2355 #define KVM_EXIT_HYPERCALL_MBZ		GENMASK_ULL(31, 1)
2356 
2357 #endif /* _ASM_X86_KVM_HOST_H */
2358