1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries. 4 */ 5 6/dts-v1/; 7#include "sparx5_pcb_common.dtsi" 8 9/{ 10 gpio-restart { 11 compatible = "gpio-restart"; 12 gpios = <&gpio 37 GPIO_ACTIVE_LOW>; 13 priority = <200>; 14 }; 15 16 i2c0_imux: i2c-mux-0 { 17 compatible = "i2c-mux-pinctrl"; 18 #address-cells = <1>; 19 #size-cells = <0>; 20 i2c-parent = <&i2c0>; 21 }; 22 23 i2c0_emux: i2c-mux-1 { 24 compatible = "i2c-mux-gpio"; 25 #address-cells = <1>; 26 #size-cells = <0>; 27 i2c-parent = <&i2c0>; 28 }; 29 30 leds { 31 compatible = "gpio-leds"; 32 led-0 { 33 label = "twr0:green"; 34 gpios = <&sgpio_out0 8 0 GPIO_ACTIVE_LOW>; 35 }; 36 led-1 { 37 label = "twr0:yellow"; 38 gpios = <&sgpio_out0 8 1 GPIO_ACTIVE_LOW>; 39 }; 40 led-2 { 41 label = "twr1:green"; 42 gpios = <&sgpio_out0 9 0 GPIO_ACTIVE_LOW>; 43 }; 44 led-3 { 45 label = "twr1:yellow"; 46 gpios = <&sgpio_out0 9 1 GPIO_ACTIVE_LOW>; 47 }; 48 led-4 { 49 label = "twr2:green"; 50 gpios = <&sgpio_out0 10 0 GPIO_ACTIVE_LOW>; 51 }; 52 led-5 { 53 label = "twr2:yellow"; 54 gpios = <&sgpio_out0 10 1 GPIO_ACTIVE_LOW>; 55 }; 56 led-6 { 57 label = "twr3:green"; 58 gpios = <&sgpio_out0 11 0 GPIO_ACTIVE_LOW>; 59 }; 60 led-7 { 61 label = "twr3:yellow"; 62 gpios = <&sgpio_out0 11 1 GPIO_ACTIVE_LOW>; 63 }; 64 led-8 { 65 label = "eth12:green"; 66 gpios = <&sgpio_out0 12 0 GPIO_ACTIVE_HIGH>; 67 default-state = "off"; 68 }; 69 led-9 { 70 label = "eth12:yellow"; 71 gpios = <&sgpio_out0 12 1 GPIO_ACTIVE_HIGH>; 72 default-state = "off"; 73 }; 74 led-10 { 75 label = "eth13:green"; 76 gpios = <&sgpio_out0 13 0 GPIO_ACTIVE_HIGH>; 77 default-state = "off"; 78 }; 79 led-11 { 80 label = "eth13:yellow"; 81 gpios = <&sgpio_out0 13 1 GPIO_ACTIVE_HIGH>; 82 default-state = "off"; 83 }; 84 led-12 { 85 label = "eth14:green"; 86 gpios = <&sgpio_out0 14 0 GPIO_ACTIVE_HIGH>; 87 default-state = "off"; 88 }; 89 led-13 { 90 label = "eth14:yellow"; 91 gpios = <&sgpio_out0 14 1 GPIO_ACTIVE_HIGH>; 92 default-state = "off"; 93 }; 94 led-14 { 95 label = "eth15:green"; 96 gpios = <&sgpio_out0 15 0 GPIO_ACTIVE_HIGH>; 97 default-state = "off"; 98 }; 99 led-15 { 100 label = "eth15:yellow"; 101 gpios = <&sgpio_out0 15 1 GPIO_ACTIVE_HIGH>; 102 default-state = "off"; 103 }; 104 led-16 { 105 label = "eth48:green"; 106 gpios = <&sgpio_out1 16 0 GPIO_ACTIVE_HIGH>; 107 default-state = "off"; 108 }; 109 led-17 { 110 label = "eth48:yellow"; 111 gpios = <&sgpio_out1 16 1 GPIO_ACTIVE_HIGH>; 112 default-state = "off"; 113 }; 114 led-18 { 115 label = "eth49:green"; 116 gpios = <&sgpio_out1 17 0 GPIO_ACTIVE_HIGH>; 117 default-state = "off"; 118 }; 119 led-19 { 120 label = "eth49:yellow"; 121 gpios = <&sgpio_out1 17 1 GPIO_ACTIVE_HIGH>; 122 default-state = "off"; 123 }; 124 led-20 { 125 label = "eth50:green"; 126 gpios = <&sgpio_out1 18 0 GPIO_ACTIVE_HIGH>; 127 default-state = "off"; 128 }; 129 led-21 { 130 label = "eth50:yellow"; 131 gpios = <&sgpio_out1 18 1 GPIO_ACTIVE_HIGH>; 132 default-state = "off"; 133 }; 134 led-22 { 135 label = "eth51:green"; 136 gpios = <&sgpio_out1 19 0 GPIO_ACTIVE_HIGH>; 137 default-state = "off"; 138 }; 139 led-23 { 140 label = "eth51:yellow"; 141 gpios = <&sgpio_out1 19 1 GPIO_ACTIVE_HIGH>; 142 default-state = "off"; 143 }; 144 led-24 { 145 label = "eth52:green"; 146 gpios = <&sgpio_out1 20 0 GPIO_ACTIVE_HIGH>; 147 default-state = "off"; 148 }; 149 led-25 { 150 label = "eth52:yellow"; 151 gpios = <&sgpio_out1 20 1 GPIO_ACTIVE_HIGH>; 152 default-state = "off"; 153 }; 154 led-26 { 155 label = "eth53:green"; 156 gpios = <&sgpio_out1 21 0 GPIO_ACTIVE_HIGH>; 157 default-state = "off"; 158 }; 159 led-27 { 160 label = "eth53:yellow"; 161 gpios = <&sgpio_out1 21 1 GPIO_ACTIVE_HIGH>; 162 default-state = "off"; 163 }; 164 led-28 { 165 label = "eth54:green"; 166 gpios = <&sgpio_out1 22 0 GPIO_ACTIVE_HIGH>; 167 default-state = "off"; 168 }; 169 led-29 { 170 label = "eth54:yellow"; 171 gpios = <&sgpio_out1 22 1 GPIO_ACTIVE_HIGH>; 172 default-state = "off"; 173 }; 174 led-30 { 175 label = "eth55:green"; 176 gpios = <&sgpio_out1 23 0 GPIO_ACTIVE_HIGH>; 177 default-state = "off"; 178 }; 179 led-31 { 180 label = "eth55:yellow"; 181 gpios = <&sgpio_out1 23 1 GPIO_ACTIVE_HIGH>; 182 default-state = "off"; 183 }; 184 led-32 { 185 label = "eth56:green"; 186 gpios = <&sgpio_out1 24 0 GPIO_ACTIVE_HIGH>; 187 default-state = "off"; 188 }; 189 led-33 { 190 label = "eth56:yellow"; 191 gpios = <&sgpio_out1 24 1 GPIO_ACTIVE_HIGH>; 192 default-state = "off"; 193 }; 194 led-34 { 195 label = "eth57:green"; 196 gpios = <&sgpio_out1 25 0 GPIO_ACTIVE_HIGH>; 197 default-state = "off"; 198 }; 199 led-35 { 200 label = "eth57:yellow"; 201 gpios = <&sgpio_out1 25 1 GPIO_ACTIVE_HIGH>; 202 default-state = "off"; 203 }; 204 led-36 { 205 label = "eth58:green"; 206 gpios = <&sgpio_out1 26 0 GPIO_ACTIVE_HIGH>; 207 default-state = "off"; 208 }; 209 led-37 { 210 label = "eth58:yellow"; 211 gpios = <&sgpio_out1 26 1 GPIO_ACTIVE_HIGH>; 212 default-state = "off"; 213 }; 214 led-38 { 215 label = "eth59:green"; 216 gpios = <&sgpio_out1 27 0 GPIO_ACTIVE_HIGH>; 217 default-state = "off"; 218 }; 219 led-39 { 220 label = "eth59:yellow"; 221 gpios = <&sgpio_out1 27 1 GPIO_ACTIVE_HIGH>; 222 default-state = "off"; 223 }; 224 led-40 { 225 label = "eth60:green"; 226 gpios = <&sgpio_out1 28 0 GPIO_ACTIVE_HIGH>; 227 default-state = "off"; 228 }; 229 led-41 { 230 label = "eth60:yellow"; 231 gpios = <&sgpio_out1 28 1 GPIO_ACTIVE_HIGH>; 232 default-state = "off"; 233 }; 234 led-42 { 235 label = "eth61:green"; 236 gpios = <&sgpio_out1 29 0 GPIO_ACTIVE_HIGH>; 237 default-state = "off"; 238 }; 239 led-43 { 240 label = "eth61:yellow"; 241 gpios = <&sgpio_out1 29 1 GPIO_ACTIVE_HIGH>; 242 default-state = "off"; 243 }; 244 led-44 { 245 label = "eth62:green"; 246 gpios = <&sgpio_out1 30 0 GPIO_ACTIVE_HIGH>; 247 default-state = "off"; 248 }; 249 led-45 { 250 label = "eth62:yellow"; 251 gpios = <&sgpio_out1 30 1 GPIO_ACTIVE_HIGH>; 252 default-state = "off"; 253 }; 254 led-46 { 255 label = "eth63:green"; 256 gpios = <&sgpio_out1 31 0 GPIO_ACTIVE_HIGH>; 257 default-state = "off"; 258 }; 259 led-47 { 260 label = "eth63:yellow"; 261 gpios = <&sgpio_out1 31 1 GPIO_ACTIVE_HIGH>; 262 default-state = "off"; 263 }; 264 }; 265 266 sfp_eth12: sfp-eth12 { 267 compatible = "sff,sfp"; 268 i2c-bus = <&i2c_sfp1>; 269 tx-disable-gpios = <&sgpio_out2 11 1 GPIO_ACTIVE_LOW>; 270 los-gpios = <&sgpio_in2 11 1 GPIO_ACTIVE_HIGH>; 271 mod-def0-gpios = <&sgpio_in2 11 2 GPIO_ACTIVE_LOW>; 272 tx-fault-gpios = <&sgpio_in2 12 0 GPIO_ACTIVE_HIGH>; 273 }; 274 275 sfp_eth13: sfp-eth13 { 276 compatible = "sff,sfp"; 277 i2c-bus = <&i2c_sfp2>; 278 tx-disable-gpios = <&sgpio_out2 12 1 GPIO_ACTIVE_LOW>; 279 los-gpios = <&sgpio_in2 12 1 GPIO_ACTIVE_HIGH>; 280 mod-def0-gpios = <&sgpio_in2 12 2 GPIO_ACTIVE_LOW>; 281 tx-fault-gpios = <&sgpio_in2 13 0 GPIO_ACTIVE_HIGH>; 282 }; 283 284 sfp_eth14: sfp-eth14 { 285 compatible = "sff,sfp"; 286 i2c-bus = <&i2c_sfp3>; 287 tx-disable-gpios = <&sgpio_out2 13 1 GPIO_ACTIVE_LOW>; 288 los-gpios = <&sgpio_in2 13 1 GPIO_ACTIVE_HIGH>; 289 mod-def0-gpios = <&sgpio_in2 13 2 GPIO_ACTIVE_LOW>; 290 tx-fault-gpios = <&sgpio_in2 14 0 GPIO_ACTIVE_HIGH>; 291 }; 292 293 sfp_eth15: sfp-eth15 { 294 compatible = "sff,sfp"; 295 i2c-bus = <&i2c_sfp4>; 296 tx-disable-gpios = <&sgpio_out2 14 1 GPIO_ACTIVE_LOW>; 297 los-gpios = <&sgpio_in2 14 1 GPIO_ACTIVE_HIGH>; 298 mod-def0-gpios = <&sgpio_in2 14 2 GPIO_ACTIVE_LOW>; 299 tx-fault-gpios = <&sgpio_in2 15 0 GPIO_ACTIVE_HIGH>; 300 }; 301 302 sfp_eth48: sfp-eth48 { 303 compatible = "sff,sfp"; 304 i2c-bus = <&i2c_sfp5>; 305 tx-disable-gpios = <&sgpio_out2 15 1 GPIO_ACTIVE_LOW>; 306 los-gpios = <&sgpio_in2 15 1 GPIO_ACTIVE_HIGH>; 307 mod-def0-gpios = <&sgpio_in2 15 2 GPIO_ACTIVE_LOW>; 308 tx-fault-gpios = <&sgpio_in2 16 0 GPIO_ACTIVE_HIGH>; 309 }; 310 311 sfp_eth49: sfp-eth49 { 312 compatible = "sff,sfp"; 313 i2c-bus = <&i2c_sfp6>; 314 tx-disable-gpios = <&sgpio_out2 16 1 GPIO_ACTIVE_LOW>; 315 los-gpios = <&sgpio_in2 16 1 GPIO_ACTIVE_HIGH>; 316 mod-def0-gpios = <&sgpio_in2 16 2 GPIO_ACTIVE_LOW>; 317 tx-fault-gpios = <&sgpio_in2 17 0 GPIO_ACTIVE_HIGH>; 318 }; 319 320 sfp_eth50: sfp-eth50 { 321 compatible = "sff,sfp"; 322 i2c-bus = <&i2c_sfp7>; 323 tx-disable-gpios = <&sgpio_out2 17 1 GPIO_ACTIVE_LOW>; 324 los-gpios = <&sgpio_in2 17 1 GPIO_ACTIVE_HIGH>; 325 mod-def0-gpios = <&sgpio_in2 17 2 GPIO_ACTIVE_LOW>; 326 tx-fault-gpios = <&sgpio_in2 18 0 GPIO_ACTIVE_HIGH>; 327 }; 328 329 sfp_eth51: sfp-eth51 { 330 compatible = "sff,sfp"; 331 i2c-bus = <&i2c_sfp8>; 332 tx-disable-gpios = <&sgpio_out2 18 1 GPIO_ACTIVE_LOW>; 333 los-gpios = <&sgpio_in2 18 1 GPIO_ACTIVE_HIGH>; 334 mod-def0-gpios = <&sgpio_in2 18 2 GPIO_ACTIVE_LOW>; 335 tx-fault-gpios = <&sgpio_in2 19 0 GPIO_ACTIVE_HIGH>; 336 }; 337 338 sfp_eth52: sfp-eth52 { 339 compatible = "sff,sfp"; 340 i2c-bus = <&i2c_sfp9>; 341 tx-disable-gpios = <&sgpio_out2 19 1 GPIO_ACTIVE_LOW>; 342 los-gpios = <&sgpio_in2 19 1 GPIO_ACTIVE_HIGH>; 343 mod-def0-gpios = <&sgpio_in2 19 2 GPIO_ACTIVE_LOW>; 344 tx-fault-gpios = <&sgpio_in2 20 0 GPIO_ACTIVE_HIGH>; 345 }; 346 347 sfp_eth53: sfp-eth53 { 348 compatible = "sff,sfp"; 349 i2c-bus = <&i2c_sfp10>; 350 tx-disable-gpios = <&sgpio_out2 20 1 GPIO_ACTIVE_LOW>; 351 los-gpios = <&sgpio_in2 20 1 GPIO_ACTIVE_HIGH>; 352 mod-def0-gpios = <&sgpio_in2 20 2 GPIO_ACTIVE_LOW>; 353 tx-fault-gpios = <&sgpio_in2 21 0 GPIO_ACTIVE_HIGH>; 354 }; 355 356 sfp_eth54: sfp-eth54 { 357 compatible = "sff,sfp"; 358 i2c-bus = <&i2c_sfp11>; 359 tx-disable-gpios = <&sgpio_out2 21 1 GPIO_ACTIVE_LOW>; 360 los-gpios = <&sgpio_in2 21 1 GPIO_ACTIVE_HIGH>; 361 mod-def0-gpios = <&sgpio_in2 21 2 GPIO_ACTIVE_LOW>; 362 tx-fault-gpios = <&sgpio_in2 22 0 GPIO_ACTIVE_HIGH>; 363 }; 364 365 sfp_eth55: sfp-eth55 { 366 compatible = "sff,sfp"; 367 i2c-bus = <&i2c_sfp12>; 368 tx-disable-gpios = <&sgpio_out2 22 1 GPIO_ACTIVE_LOW>; 369 los-gpios = <&sgpio_in2 22 1 GPIO_ACTIVE_HIGH>; 370 mod-def0-gpios = <&sgpio_in2 22 2 GPIO_ACTIVE_LOW>; 371 tx-fault-gpios = <&sgpio_in2 23 0 GPIO_ACTIVE_HIGH>; 372 }; 373 374 sfp_eth56: sfp-eth56 { 375 compatible = "sff,sfp"; 376 i2c-bus = <&i2c_sfp13>; 377 tx-disable-gpios = <&sgpio_out2 23 1 GPIO_ACTIVE_LOW>; 378 los-gpios = <&sgpio_in2 23 1 GPIO_ACTIVE_HIGH>; 379 mod-def0-gpios = <&sgpio_in2 23 2 GPIO_ACTIVE_LOW>; 380 tx-fault-gpios = <&sgpio_in2 24 0 GPIO_ACTIVE_HIGH>; 381 }; 382 383 sfp_eth57: sfp-eth57 { 384 compatible = "sff,sfp"; 385 i2c-bus = <&i2c_sfp14>; 386 tx-disable-gpios = <&sgpio_out2 24 1 GPIO_ACTIVE_LOW>; 387 los-gpios = <&sgpio_in2 24 1 GPIO_ACTIVE_HIGH>; 388 mod-def0-gpios = <&sgpio_in2 24 2 GPIO_ACTIVE_LOW>; 389 tx-fault-gpios = <&sgpio_in2 25 0 GPIO_ACTIVE_HIGH>; 390 }; 391 392 sfp_eth58: sfp-eth58 { 393 compatible = "sff,sfp"; 394 i2c-bus = <&i2c_sfp15>; 395 tx-disable-gpios = <&sgpio_out2 25 1 GPIO_ACTIVE_LOW>; 396 los-gpios = <&sgpio_in2 25 1 GPIO_ACTIVE_HIGH>; 397 mod-def0-gpios = <&sgpio_in2 25 2 GPIO_ACTIVE_LOW>; 398 tx-fault-gpios = <&sgpio_in2 26 0 GPIO_ACTIVE_HIGH>; 399 }; 400 401 sfp_eth59: sfp-eth59 { 402 compatible = "sff,sfp"; 403 i2c-bus = <&i2c_sfp16>; 404 tx-disable-gpios = <&sgpio_out2 26 1 GPIO_ACTIVE_LOW>; 405 los-gpios = <&sgpio_in2 26 1 GPIO_ACTIVE_HIGH>; 406 mod-def0-gpios = <&sgpio_in2 26 2 GPIO_ACTIVE_LOW>; 407 tx-fault-gpios = <&sgpio_in2 27 0 GPIO_ACTIVE_HIGH>; 408 }; 409 410 sfp_eth60: sfp-eth60 { 411 compatible = "sff,sfp"; 412 i2c-bus = <&i2c_sfp17>; 413 tx-disable-gpios = <&sgpio_out2 27 1 GPIO_ACTIVE_LOW>; 414 los-gpios = <&sgpio_in2 27 1 GPIO_ACTIVE_HIGH>; 415 mod-def0-gpios = <&sgpio_in2 27 2 GPIO_ACTIVE_LOW>; 416 tx-fault-gpios = <&sgpio_in2 28 0 GPIO_ACTIVE_HIGH>; 417 }; 418 419 sfp_eth61: sfp-eth61 { 420 compatible = "sff,sfp"; 421 i2c-bus = <&i2c_sfp18>; 422 tx-disable-gpios = <&sgpio_out2 28 1 GPIO_ACTIVE_LOW>; 423 los-gpios = <&sgpio_in2 28 1 GPIO_ACTIVE_HIGH>; 424 mod-def0-gpios = <&sgpio_in2 28 2 GPIO_ACTIVE_LOW>; 425 tx-fault-gpios = <&sgpio_in2 29 0 GPIO_ACTIVE_HIGH>; 426 }; 427 428 sfp_eth62: sfp-eth62 { 429 compatible = "sff,sfp"; 430 i2c-bus = <&i2c_sfp19>; 431 tx-disable-gpios = <&sgpio_out2 29 1 GPIO_ACTIVE_LOW>; 432 los-gpios = <&sgpio_in2 29 1 GPIO_ACTIVE_HIGH>; 433 mod-def0-gpios = <&sgpio_in2 29 2 GPIO_ACTIVE_LOW>; 434 tx-fault-gpios = <&sgpio_in2 30 0 GPIO_ACTIVE_HIGH>; 435 }; 436 437 sfp_eth63: sfp-eth63 { 438 compatible = "sff,sfp"; 439 i2c-bus = <&i2c_sfp20>; 440 tx-disable-gpios = <&sgpio_out2 30 1 GPIO_ACTIVE_LOW>; 441 los-gpios = <&sgpio_in2 30 1 GPIO_ACTIVE_HIGH>; 442 mod-def0-gpios = <&sgpio_in2 30 2 GPIO_ACTIVE_LOW>; 443 tx-fault-gpios = <&sgpio_in2 31 0 GPIO_ACTIVE_HIGH>; 444 }; 445}; 446 447&sgpio0 { 448 status = "okay"; 449 microchip,sgpio-port-ranges = <8 15>; 450 gpio@0 { 451 ngpios = <64>; 452 }; 453 gpio@1 { 454 ngpios = <64>; 455 }; 456}; 457 458&sgpio1 { 459 status = "okay"; 460 microchip,sgpio-port-ranges = <24 31>; 461 gpio@0 { 462 ngpios = <64>; 463 }; 464 gpio@1 { 465 ngpios = <64>; 466 }; 467}; 468 469&spi0 { 470 status = "okay"; 471 spi@0 { 472 compatible = "spi-mux"; 473 mux-controls = <&mux>; 474 #address-cells = <1>; 475 #size-cells = <0>; 476 reg = <0>; /* CS0 */ 477 flash@9 { 478 compatible = "jedec,spi-nor"; 479 spi-max-frequency = <8000000>; 480 reg = <0x9>; /* SPI */ 481 }; 482 }; 483}; 484 485&sgpio0 { 486 status = "okay"; 487 microchip,sgpio-port-ranges = <8 15>; 488 gpio@0 { 489 ngpios = <64>; 490 }; 491 gpio@1 { 492 ngpios = <64>; 493 }; 494}; 495 496&sgpio1 { 497 status = "okay"; 498 microchip,sgpio-port-ranges = <24 31>; 499 gpio@0 { 500 ngpios = <64>; 501 }; 502 gpio@1 { 503 ngpios = <64>; 504 }; 505}; 506 507&sgpio2 { 508 status = "okay"; 509 microchip,sgpio-port-ranges = <0 0>, <11 31>; 510}; 511 512&gpio { 513 i2cmux_pins_i: i2cmux-pins { 514 pins = "GPIO_16", "GPIO_17", "GPIO_18", "GPIO_19", 515 "GPIO_20", "GPIO_22", "GPIO_36", "GPIO_35", 516 "GPIO_50", "GPIO_51", "GPIO_56", "GPIO_57"; 517 function = "twi_scl_m"; 518 output-low; 519 }; 520 i2cmux_0: i2cmux-0-pins { 521 pins = "GPIO_16"; 522 function = "twi_scl_m"; 523 output-high; 524 }; 525 i2cmux_1: i2cmux-1-pins { 526 pins = "GPIO_17"; 527 function = "twi_scl_m"; 528 output-high; 529 }; 530 i2cmux_2: i2cmux-2-pins { 531 pins = "GPIO_18"; 532 function = "twi_scl_m"; 533 output-high; 534 }; 535 i2cmux_3: i2cmux-3-pins { 536 pins = "GPIO_19"; 537 function = "twi_scl_m"; 538 output-high; 539 }; 540 i2cmux_4: i2cmux-4-pins { 541 pins = "GPIO_20"; 542 function = "twi_scl_m"; 543 output-high; 544 }; 545 i2cmux_5: i2cmux-5-pins { 546 pins = "GPIO_22"; 547 function = "twi_scl_m"; 548 output-high; 549 }; 550 i2cmux_6: i2cmux-6-pins { 551 pins = "GPIO_36"; 552 function = "twi_scl_m"; 553 output-high; 554 }; 555 i2cmux_7: i2cmux-7-pins { 556 pins = "GPIO_35"; 557 function = "twi_scl_m"; 558 output-high; 559 }; 560 i2cmux_8: i2cmux-8-pins { 561 pins = "GPIO_50"; 562 function = "twi_scl_m"; 563 output-high; 564 }; 565 i2cmux_9: i2cmux-9-pins { 566 pins = "GPIO_51"; 567 function = "twi_scl_m"; 568 output-high; 569 }; 570 i2cmux_10: i2cmux-10-pins { 571 pins = "GPIO_56"; 572 function = "twi_scl_m"; 573 output-high; 574 }; 575 i2cmux_11: i2cmux-11-pins { 576 pins = "GPIO_57"; 577 function = "twi_scl_m"; 578 output-high; 579 }; 580}; 581 582&i2c0_imux { 583 pinctrl-names = 584 "i2c_sfp1", "i2c_sfp2", "i2c_sfp3", "i2c_sfp4", 585 "i2c_sfp5", "i2c_sfp6", "i2c_sfp7", "i2c_sfp8", 586 "i2c_sfp9", "i2c_sfp10", "i2c_sfp11", "i2c_sfp12", "idle"; 587 pinctrl-0 = <&i2cmux_0>; 588 pinctrl-1 = <&i2cmux_1>; 589 pinctrl-2 = <&i2cmux_2>; 590 pinctrl-3 = <&i2cmux_3>; 591 pinctrl-4 = <&i2cmux_4>; 592 pinctrl-5 = <&i2cmux_5>; 593 pinctrl-6 = <&i2cmux_6>; 594 pinctrl-7 = <&i2cmux_7>; 595 pinctrl-8 = <&i2cmux_8>; 596 pinctrl-9 = <&i2cmux_9>; 597 pinctrl-10 = <&i2cmux_10>; 598 pinctrl-11 = <&i2cmux_11>; 599 pinctrl-12 = <&i2cmux_pins_i>; 600 i2c_sfp1: i2c@0 { 601 reg = <0x0>; 602 #address-cells = <1>; 603 #size-cells = <0>; 604 }; 605 i2c_sfp2: i2c@1 { 606 reg = <0x1>; 607 #address-cells = <1>; 608 #size-cells = <0>; 609 }; 610 i2c_sfp3: i2c@2 { 611 reg = <0x2>; 612 #address-cells = <1>; 613 #size-cells = <0>; 614 }; 615 i2c_sfp4: i2c@3 { 616 reg = <0x3>; 617 #address-cells = <1>; 618 #size-cells = <0>; 619 }; 620 i2c_sfp5: i2c@4 { 621 reg = <0x4>; 622 #address-cells = <1>; 623 #size-cells = <0>; 624 }; 625 i2c_sfp6: i2c@5 { 626 reg = <0x5>; 627 #address-cells = <1>; 628 #size-cells = <0>; 629 }; 630 i2c_sfp7: i2c@6 { 631 reg = <0x6>; 632 #address-cells = <1>; 633 #size-cells = <0>; 634 }; 635 i2c_sfp8: i2c@7 { 636 reg = <0x7>; 637 #address-cells = <1>; 638 #size-cells = <0>; 639 }; 640 i2c_sfp9: i2c@8 { 641 reg = <0x8>; 642 #address-cells = <1>; 643 #size-cells = <0>; 644 }; 645 i2c_sfp10: i2c@9 { 646 reg = <0x9>; 647 #address-cells = <1>; 648 #size-cells = <0>; 649 }; 650 i2c_sfp11: i2c@a { 651 reg = <0xa>; 652 #address-cells = <1>; 653 #size-cells = <0>; 654 }; 655 i2c_sfp12: i2c@b { 656 reg = <0xb>; 657 #address-cells = <1>; 658 #size-cells = <0>; 659 }; 660}; 661 662&i2c0_emux { 663 mux-gpios = <&gpio 55 GPIO_ACTIVE_HIGH 664 &gpio 60 GPIO_ACTIVE_HIGH 665 &gpio 61 GPIO_ACTIVE_HIGH 666 &gpio 54 GPIO_ACTIVE_HIGH>; 667 idle-state = <0x8>; 668 i2c_sfp13: i2c@0 { 669 reg = <0x0>; 670 #address-cells = <1>; 671 #size-cells = <0>; 672 }; 673 i2c_sfp14: i2c@1 { 674 reg = <0x1>; 675 #address-cells = <1>; 676 #size-cells = <0>; 677 }; 678 i2c_sfp15: i2c@2 { 679 reg = <0x2>; 680 #address-cells = <1>; 681 #size-cells = <0>; 682 }; 683 i2c_sfp16: i2c@3 { 684 reg = <0x3>; 685 #address-cells = <1>; 686 #size-cells = <0>; 687 }; 688 i2c_sfp17: i2c@4 { 689 reg = <0x4>; 690 #address-cells = <1>; 691 #size-cells = <0>; 692 }; 693 i2c_sfp18: i2c@5 { 694 reg = <0x5>; 695 #address-cells = <1>; 696 #size-cells = <0>; 697 }; 698 i2c_sfp19: i2c@6 { 699 reg = <0x6>; 700 #address-cells = <1>; 701 #size-cells = <0>; 702 }; 703 i2c_sfp20: i2c@7 { 704 reg = <0x7>; 705 #address-cells = <1>; 706 #size-cells = <0>; 707 }; 708}; 709 710&mdio3 { 711 status = "okay"; 712 phy64: ethernet-phy@64 { 713 reg = <28>; 714 }; 715}; 716 717&switch { 718 ethernet-ports { 719 #address-cells = <1>; 720 #size-cells = <0>; 721 722 /* 10G SFPs */ 723 port12: port@12 { 724 reg = <12>; 725 microchip,bandwidth = <10000>; 726 phys = <&serdes 13>; 727 phy-mode = "10gbase-r"; 728 sfp = <&sfp_eth12>; 729 microchip,sd-sgpio = <301>; 730 managed = "in-band-status"; 731 }; 732 port13: port@13 { 733 reg = <13>; 734 /* Example: CU SFP, 1G speed */ 735 microchip,bandwidth = <10000>; 736 phys = <&serdes 14>; 737 phy-mode = "10gbase-r"; 738 sfp = <&sfp_eth13>; 739 microchip,sd-sgpio = <305>; 740 managed = "in-band-status"; 741 }; 742 port14: port@14 { 743 reg = <14>; 744 microchip,bandwidth = <10000>; 745 phys = <&serdes 15>; 746 phy-mode = "10gbase-r"; 747 sfp = <&sfp_eth14>; 748 microchip,sd-sgpio = <309>; 749 managed = "in-band-status"; 750 }; 751 port15: port@15 { 752 reg = <15>; 753 microchip,bandwidth = <10000>; 754 phys = <&serdes 16>; 755 phy-mode = "10gbase-r"; 756 sfp = <&sfp_eth15>; 757 microchip,sd-sgpio = <313>; 758 managed = "in-band-status"; 759 }; 760 port48: port@48 { 761 reg = <48>; 762 microchip,bandwidth = <10000>; 763 phys = <&serdes 17>; 764 phy-mode = "10gbase-r"; 765 sfp = <&sfp_eth48>; 766 microchip,sd-sgpio = <317>; 767 managed = "in-band-status"; 768 }; 769 port49: port@49 { 770 reg = <49>; 771 microchip,bandwidth = <10000>; 772 phys = <&serdes 18>; 773 phy-mode = "10gbase-r"; 774 sfp = <&sfp_eth49>; 775 microchip,sd-sgpio = <321>; 776 managed = "in-band-status"; 777 }; 778 port50: port@50 { 779 reg = <50>; 780 microchip,bandwidth = <10000>; 781 phys = <&serdes 19>; 782 phy-mode = "10gbase-r"; 783 sfp = <&sfp_eth50>; 784 microchip,sd-sgpio = <325>; 785 managed = "in-band-status"; 786 }; 787 port51: port@51 { 788 reg = <51>; 789 microchip,bandwidth = <10000>; 790 phys = <&serdes 20>; 791 phy-mode = "10gbase-r"; 792 sfp = <&sfp_eth51>; 793 microchip,sd-sgpio = <329>; 794 managed = "in-band-status"; 795 }; 796 port52: port@52 { 797 reg = <52>; 798 microchip,bandwidth = <10000>; 799 phys = <&serdes 21>; 800 phy-mode = "10gbase-r"; 801 sfp = <&sfp_eth52>; 802 microchip,sd-sgpio = <333>; 803 managed = "in-band-status"; 804 }; 805 port53: port@53 { 806 reg = <53>; 807 microchip,bandwidth = <10000>; 808 phys = <&serdes 22>; 809 phy-mode = "10gbase-r"; 810 sfp = <&sfp_eth53>; 811 microchip,sd-sgpio = <337>; 812 managed = "in-band-status"; 813 }; 814 port54: port@54 { 815 reg = <54>; 816 microchip,bandwidth = <10000>; 817 phys = <&serdes 23>; 818 phy-mode = "10gbase-r"; 819 sfp = <&sfp_eth54>; 820 microchip,sd-sgpio = <341>; 821 managed = "in-band-status"; 822 }; 823 port55: port@55 { 824 reg = <55>; 825 microchip,bandwidth = <10000>; 826 phys = <&serdes 24>; 827 phy-mode = "10gbase-r"; 828 sfp = <&sfp_eth55>; 829 microchip,sd-sgpio = <345>; 830 managed = "in-band-status"; 831 }; 832 /* 25G SFPs */ 833 port56: port@56 { 834 reg = <56>; 835 microchip,bandwidth = <10000>; 836 phys = <&serdes 25>; 837 phy-mode = "10gbase-r"; 838 sfp = <&sfp_eth56>; 839 microchip,sd-sgpio = <349>; 840 managed = "in-band-status"; 841 }; 842 port57: port@57 { 843 reg = <57>; 844 microchip,bandwidth = <10000>; 845 phys = <&serdes 26>; 846 phy-mode = "10gbase-r"; 847 sfp = <&sfp_eth57>; 848 microchip,sd-sgpio = <353>; 849 managed = "in-band-status"; 850 }; 851 port58: port@58 { 852 reg = <58>; 853 microchip,bandwidth = <10000>; 854 phys = <&serdes 27>; 855 phy-mode = "10gbase-r"; 856 sfp = <&sfp_eth58>; 857 microchip,sd-sgpio = <357>; 858 managed = "in-band-status"; 859 }; 860 port59: port@59 { 861 reg = <59>; 862 microchip,bandwidth = <10000>; 863 phys = <&serdes 28>; 864 phy-mode = "10gbase-r"; 865 sfp = <&sfp_eth59>; 866 microchip,sd-sgpio = <361>; 867 managed = "in-band-status"; 868 }; 869 port60: port@60 { 870 reg = <60>; 871 microchip,bandwidth = <10000>; 872 phys = <&serdes 29>; 873 phy-mode = "10gbase-r"; 874 sfp = <&sfp_eth60>; 875 microchip,sd-sgpio = <365>; 876 managed = "in-band-status"; 877 }; 878 port61: port@61 { 879 reg = <61>; 880 microchip,bandwidth = <10000>; 881 phys = <&serdes 30>; 882 phy-mode = "10gbase-r"; 883 sfp = <&sfp_eth61>; 884 microchip,sd-sgpio = <369>; 885 managed = "in-band-status"; 886 }; 887 port62: port@62 { 888 reg = <62>; 889 microchip,bandwidth = <10000>; 890 phys = <&serdes 31>; 891 phy-mode = "10gbase-r"; 892 sfp = <&sfp_eth62>; 893 microchip,sd-sgpio = <373>; 894 managed = "in-band-status"; 895 }; 896 port63: port@63 { 897 reg = <63>; 898 microchip,bandwidth = <10000>; 899 phys = <&serdes 32>; 900 phy-mode = "10gbase-r"; 901 sfp = <&sfp_eth63>; 902 microchip,sd-sgpio = <377>; 903 managed = "in-band-status"; 904 }; 905 /* Finally the Management interface */ 906 port64: port@64 { 907 reg = <64>; 908 microchip,bandwidth = <1000>; 909 phys = <&serdes 0>; 910 phy-handle = <&phy64>; 911 phy-mode = "sgmii"; 912 }; 913 }; 914}; 915