1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2015 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com 5 * 6 * Header for Exynos PMU Driver support 7 */ 8 9 #ifndef __EXYNOS_PMU_H 10 #define __EXYNOS_PMU_H 11 12 #include <linux/io.h> 13 14 #define PMU_TABLE_END (-1U) 15 16 struct regmap_access_table; 17 18 struct exynos_pmu_conf { 19 unsigned int offset; 20 u8 val[NUM_SYS_POWERDOWN]; 21 }; 22 23 /** 24 * struct exynos_pmu_data - of_device_id (match) data 25 * 26 * @pmu_config: Optional table detailing register writes for target system 27 * states: SYS_AFTR, SYS_LPA, SYS_SLEEP. 28 * @pmu_config_extra: Optional secondary table detailing additional register 29 * writes for target system states: SYS_AFTR, SYS_LPA, 30 * SYS_SLEEP. 31 * @pmu_secure: Whether or not PMU register writes need to be done via SMC call. 32 * @pmu_cpuhp: Whether or not extra handling is required for CPU hotplug and 33 * CPUidle outside of standard PSCI calls, due to non-compliant 34 * firmware. 35 * @pmu_init: Optional init function. 36 * @powerdown_conf: Optional callback before entering target system states: 37 * SYS_AFTR, SYS_LPA, SYS_SLEEP. This will be invoked before 38 * the registers from @pmu_config are written. 39 * @powerdown_conf_extra: Optional secondary callback before entering 40 * target system states: SYS_AFTR, SYS_LPA, SYS_SLEEP. 41 * This will be invoked after @pmu_config registers have 42 * been written. 43 * @rd_table: A table of readable register ranges in case a custom regmap is 44 * used (i.e. when @pmu_secure is @true). 45 * @wr_table: A table of writable register ranges in case a custom regmap is 46 * used (i.e. when @pmu_secure is @true). 47 */ 48 struct exynos_pmu_data { 49 const struct exynos_pmu_conf *pmu_config; 50 const struct exynos_pmu_conf *pmu_config_extra; 51 bool pmu_secure; 52 bool pmu_cpuhp; 53 54 void (*pmu_init)(void); 55 void (*powerdown_conf)(enum sys_powerdown); 56 void (*powerdown_conf_extra)(enum sys_powerdown); 57 58 const struct regmap_access_table *rd_table; 59 const struct regmap_access_table *wr_table; 60 }; 61 62 extern void __iomem *pmu_base_addr; 63 64 #ifdef CONFIG_EXYNOS_PMU_ARM_DRIVERS 65 /* list of all exported SoC specific data */ 66 extern const struct exynos_pmu_data exynos3250_pmu_data; 67 extern const struct exynos_pmu_data exynos4210_pmu_data; 68 extern const struct exynos_pmu_data exynos4212_pmu_data; 69 extern const struct exynos_pmu_data exynos4412_pmu_data; 70 extern const struct exynos_pmu_data exynos5250_pmu_data; 71 extern const struct exynos_pmu_data exynos5420_pmu_data; 72 #endif 73 extern const struct exynos_pmu_data gs101_pmu_data; 74 75 extern void pmu_raw_writel(u32 val, u32 offset); 76 extern u32 pmu_raw_readl(u32 offset); 77 78 int tensor_sec_reg_write(void *context, unsigned int reg, unsigned int val); 79 int tensor_sec_reg_read(void *context, unsigned int reg, unsigned int *val); 80 int tensor_sec_update_bits(void *context, unsigned int reg, unsigned int mask, 81 unsigned int val); 82 83 #endif /* __EXYNOS_PMU_H */ 84