xref: /linux/drivers/pinctrl/freescale/pinctrl-imx-scmi.c (revision bf4afc53b77aeaa48b5409da5c8da6bb4eff7f43)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * System Control and Power Interface (SCMI) Protocol based i.MX pinctrl driver
4  *
5  * Copyright 2024 NXP
6  */
7 
8 #include <linux/device.h>
9 #include <linux/err.h>
10 #include <linux/errno.h>
11 #include <linux/module.h>
12 #include <linux/mod_devicetable.h>
13 #include <linux/of.h>
14 #include <linux/scmi_protocol.h>
15 #include <linux/seq_file.h>
16 #include <linux/slab.h>
17 #include <linux/types.h>
18 
19 #include <linux/pinctrl/machine.h>
20 #include <linux/pinctrl/pinconf.h>
21 #include <linux/pinctrl/pinconf-generic.h>
22 #include <linux/pinctrl/pinctrl.h>
23 #include <linux/pinctrl/pinmux.h>
24 
25 #include "../pinctrl-utils.h"
26 #include "../core.h"
27 #include "../pinconf.h"
28 #include "../pinmux.h"
29 
30 #define DRV_NAME "scmi-pinctrl-imx"
31 
32 struct scmi_pinctrl_imx {
33 	struct device *dev;
34 	struct scmi_protocol_handle *ph;
35 	struct pinctrl_dev *pctldev;
36 	struct pinctrl_desc pctl_desc;
37 	const struct scmi_pinctrl_proto_ops *ops;
38 };
39 
40 /* SCMI pin control types, aligned with SCMI firmware */
41 #define IMX_SCMI_NUM_CFG	5
42 #define IMX_SCMI_PIN_MUX	192
43 #define IMX_SCMI_PIN_CONFIG	193
44 #define IMX_SCMI_PIN_DAISY_ID	194
45 #define IMX_SCMI_PIN_DAISY_CFG	195
46 #define IMX_SCMI_PIN_EXT	196
47 
48 #define IMX_SCMI_NO_PAD_CTL		BIT(31)
49 #define IMX_SCMI_PAD_SION		BIT(30)
50 #define IMX_SCMI_IOMUXC_CONFIG_SION	BIT(4)
51 
52 #define IMX_SCMI_PIN_SIZE	24
53 
54 #define IMX94_DAISY_OFF		0x608
55 #define IMX95_DAISY_OFF		0x408
56 #define IMX952_DAISY_OFF	0x460
57 
pinctrl_scmi_imx_dt_node_to_map(struct pinctrl_dev * pctldev,struct device_node * np,struct pinctrl_map ** map,unsigned int * num_maps)58 static int pinctrl_scmi_imx_dt_node_to_map(struct pinctrl_dev *pctldev,
59 					   struct device_node *np,
60 					   struct pinctrl_map **map,
61 					   unsigned int *num_maps)
62 {
63 	struct pinctrl_map *new_map;
64 	const __be32 *list;
65 	unsigned long *configs = NULL;
66 	unsigned long cfg[IMX_SCMI_NUM_CFG];
67 	int map_num, size, pin_size, pin_id, num_pins;
68 	int mux_reg, conf_reg, input_reg, mux_val, conf_val, input_val;
69 	int i, j;
70 	uint32_t ncfg;
71 	static uint32_t daisy_off;
72 
73 	if (!daisy_off) {
74 		if (of_machine_is_compatible("fsl,imx95")) {
75 			daisy_off = IMX95_DAISY_OFF;
76 		} else if (of_machine_is_compatible("fsl,imx94")) {
77 			daisy_off = IMX94_DAISY_OFF;
78 		} else if (of_machine_is_compatible("fsl,imx952")) {
79 			daisy_off = IMX952_DAISY_OFF;
80 		} else {
81 			dev_err(pctldev->dev, "platform not support scmi pinctrl\n");
82 			return -EINVAL;
83 		}
84 	}
85 
86 	list = of_get_property(np, "fsl,pins", &size);
87 	if (!list) {
88 		dev_err(pctldev->dev, "no fsl,pins property in node %pOF\n", np);
89 		return -EINVAL;
90 	}
91 
92 	pin_size = IMX_SCMI_PIN_SIZE;
93 
94 	if (!size || size % pin_size) {
95 		dev_err(pctldev->dev, "Invalid fsl,pins or pins property in node %pOF\n", np);
96 		return -EINVAL;
97 	}
98 
99 	num_pins = size / pin_size;
100 	map_num = num_pins;
101 
102 	new_map = kmalloc_objs(struct pinctrl_map, map_num);
103 	if (!new_map)
104 		return -ENOMEM;
105 
106 	*map = new_map;
107 	*num_maps = map_num;
108 
109 	/* create config map */
110 	for (i = 0; i < num_pins; i++) {
111 		j = 0;
112 		ncfg = IMX_SCMI_NUM_CFG;
113 		mux_reg = be32_to_cpu(*list++);
114 		conf_reg = be32_to_cpu(*list++);
115 		input_reg = be32_to_cpu(*list++);
116 		mux_val = be32_to_cpu(*list++);
117 		input_val = be32_to_cpu(*list++);
118 		conf_val = be32_to_cpu(*list++);
119 		if (conf_val & IMX_SCMI_PAD_SION)
120 			mux_val |= IMX_SCMI_IOMUXC_CONFIG_SION;
121 
122 		pin_id = mux_reg / 4;
123 
124 		cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_MUX, (mux_val & 0xFF));
125 
126 		if (mux_val & 0xFF00) {
127 			int ext_val = (mux_val & 0xFF00) >> 8;
128 
129 			cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_EXT, ext_val);
130 		} else
131 			ncfg--;
132 
133 		if (!conf_reg || (conf_val & IMX_SCMI_NO_PAD_CTL))
134 			ncfg--;
135 		else
136 			cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_CONFIG, conf_val);
137 
138 		if (!input_reg) {
139 			ncfg -= 2;
140 		} else {
141 			cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_DAISY_ID,
142 							    (input_reg - daisy_off) / 4);
143 			cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_DAISY_CFG, input_val);
144 		}
145 
146 		configs = kmemdup_array(cfg, ncfg, sizeof(unsigned long), GFP_KERNEL);
147 
148 		new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN;
149 		new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, pin_id);
150 		new_map[i].data.configs.configs = configs;
151 		new_map[i].data.configs.num_configs = ncfg;
152 	}
153 
154 	return 0;
155 }
156 
pinctrl_scmi_imx_dt_free_map(struct pinctrl_dev * pctldev,struct pinctrl_map * map,unsigned int num_maps)157 static void pinctrl_scmi_imx_dt_free_map(struct pinctrl_dev *pctldev,
158 					 struct pinctrl_map *map, unsigned int num_maps)
159 {
160 	kfree(map);
161 }
162 
163 static const struct pinctrl_ops pinctrl_scmi_imx_pinctrl_ops = {
164 	.get_groups_count = pinctrl_generic_get_group_count,
165 	.get_group_name = pinctrl_generic_get_group_name,
166 	.get_group_pins = pinctrl_generic_get_group_pins,
167 	.dt_node_to_map = pinctrl_scmi_imx_dt_node_to_map,
168 	.dt_free_map = pinctrl_scmi_imx_dt_free_map,
169 };
170 
pinctrl_scmi_imx_func_set_mux(struct pinctrl_dev * pctldev,unsigned int selector,unsigned int group)171 static int pinctrl_scmi_imx_func_set_mux(struct pinctrl_dev *pctldev,
172 					 unsigned int selector, unsigned int group)
173 {
174 	/*
175 	 * For i.MX SCMI PINCTRL , postpone the mux setting
176 	 * until config is set as they can be set together
177 	 * in one IPC call
178 	 */
179 	return 0;
180 }
181 
182 static const struct pinmux_ops pinctrl_scmi_imx_pinmux_ops = {
183 	.get_functions_count = pinmux_generic_get_function_count,
184 	.get_function_name = pinmux_generic_get_function_name,
185 	.get_function_groups = pinmux_generic_get_function_groups,
186 	.set_mux = pinctrl_scmi_imx_func_set_mux,
187 };
188 
pinctrl_scmi_imx_pinconf_get(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * config)189 static int pinctrl_scmi_imx_pinconf_get(struct pinctrl_dev *pctldev,
190 					unsigned int pin, unsigned long *config)
191 {
192 	int ret;
193 	struct scmi_pinctrl_imx *pmx = pinctrl_dev_get_drvdata(pctldev);
194 	u32 config_type, val;
195 
196 	if (!config)
197 		return -EINVAL;
198 
199 	config_type = pinconf_to_config_param(*config);
200 
201 	ret = pmx->ops->settings_get_one(pmx->ph, pin, PIN_TYPE, config_type, &val);
202 	/* Convert SCMI error code to PINCTRL expected error code */
203 	if (ret == -EOPNOTSUPP)
204 		return -ENOTSUPP;
205 	if (ret)
206 		return ret;
207 
208 	*config = pinconf_to_config_packed(config_type, val);
209 
210 	dev_dbg(pmx->dev, "pin:%s, conf:0x%x", pin_get_name(pctldev, pin), val);
211 
212 	return 0;
213 }
214 
pinctrl_scmi_imx_pinconf_set(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * configs,unsigned int num_configs)215 static int pinctrl_scmi_imx_pinconf_set(struct pinctrl_dev *pctldev,
216 					unsigned int pin,
217 					unsigned long *configs,
218 					unsigned int num_configs)
219 {
220 	struct scmi_pinctrl_imx *pmx = pinctrl_dev_get_drvdata(pctldev);
221 	enum scmi_pinctrl_conf_type config_type[IMX_SCMI_NUM_CFG];
222 	u32 config_value[IMX_SCMI_NUM_CFG];
223 	enum scmi_pinctrl_conf_type *p_config_type = config_type;
224 	u32 *p_config_value = config_value;
225 	int ret;
226 	int i;
227 
228 	if (!configs || !num_configs)
229 		return -EINVAL;
230 
231 	if (num_configs > IMX_SCMI_NUM_CFG) {
232 		dev_err(pmx->dev, "num_configs(%d) too large\n", num_configs);
233 		return -EINVAL;
234 	}
235 
236 	for (i = 0; i < num_configs; i++) {
237 		/* cast to avoid build warning */
238 		p_config_type[i] =
239 			(enum scmi_pinctrl_conf_type)pinconf_to_config_param(configs[i]);
240 		p_config_value[i] = pinconf_to_config_argument(configs[i]);
241 
242 		dev_dbg(pmx->dev, "pin: %u, type: %u, val: 0x%x\n",
243 			pin, p_config_type[i], p_config_value[i]);
244 	}
245 
246 	ret = pmx->ops->settings_conf(pmx->ph, pin, PIN_TYPE, num_configs,
247 				      p_config_type,  p_config_value);
248 	if (ret)
249 		dev_err(pmx->dev, "Error set config %d\n", ret);
250 
251 	return ret;
252 }
253 
pinctrl_scmi_imx_pinconf_dbg_show(struct pinctrl_dev * pctldev,struct seq_file * s,unsigned int pin_id)254 static void pinctrl_scmi_imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
255 					      struct seq_file *s, unsigned int pin_id)
256 {
257 	unsigned long config = pinconf_to_config_packed(IMX_SCMI_PIN_CONFIG, 0);
258 	int ret;
259 
260 	ret = pinctrl_scmi_imx_pinconf_get(pctldev, pin_id, &config);
261 	if (ret)
262 		config = 0;
263 	else
264 		config = pinconf_to_config_argument(config);
265 
266 	seq_printf(s, "0x%lx", config);
267 }
268 
269 static const struct pinconf_ops pinctrl_scmi_imx_pinconf_ops = {
270 	.pin_config_get = pinctrl_scmi_imx_pinconf_get,
271 	.pin_config_set = pinctrl_scmi_imx_pinconf_set,
272 	.pin_config_dbg_show = pinctrl_scmi_imx_pinconf_dbg_show,
273 };
274 
275 static int
scmi_pinctrl_imx_get_pins(struct scmi_pinctrl_imx * pmx,struct pinctrl_desc * desc)276 scmi_pinctrl_imx_get_pins(struct scmi_pinctrl_imx *pmx, struct pinctrl_desc *desc)
277 {
278 	struct pinctrl_pin_desc *pins;
279 	unsigned int npins;
280 	int ret, i;
281 
282 	npins = pmx->ops->count_get(pmx->ph, PIN_TYPE);
283 	pins = devm_kmalloc_array(pmx->dev, npins, sizeof(*pins), GFP_KERNEL);
284 	if (!pins)
285 		return -ENOMEM;
286 
287 	for (i = 0; i < npins; i++) {
288 		pins[i].number = i;
289 		/* no need free name, firmware driver handles it */
290 		ret = pmx->ops->name_get(pmx->ph, i, PIN_TYPE, &pins[i].name);
291 		if (ret)
292 			return dev_err_probe(pmx->dev, ret,
293 					     "Can't get name for pin %d", i);
294 	}
295 
296 	desc->npins = npins;
297 	desc->pins = pins;
298 	dev_dbg(pmx->dev, "got pins %u", npins);
299 
300 	return 0;
301 }
302 
303 static const char * const scmi_pinctrl_imx_allowlist[] = {
304 	"fsl,imx94",
305 	"fsl,imx95",
306 	"fsl,imx952",
307 	NULL
308 };
309 
scmi_pinctrl_imx_probe(struct scmi_device * sdev)310 static int scmi_pinctrl_imx_probe(struct scmi_device *sdev)
311 {
312 	struct device *dev = &sdev->dev;
313 	const struct scmi_handle *handle = sdev->handle;
314 	struct scmi_pinctrl_imx *pmx;
315 	struct scmi_protocol_handle *ph;
316 	const struct scmi_pinctrl_proto_ops *pinctrl_ops;
317 	int ret;
318 
319 	if (!handle)
320 		return -EINVAL;
321 
322 	if (!of_machine_compatible_match(scmi_pinctrl_imx_allowlist))
323 		return -ENODEV;
324 
325 	pinctrl_ops = handle->devm_protocol_get(sdev, SCMI_PROTOCOL_PINCTRL, &ph);
326 	if (IS_ERR(pinctrl_ops))
327 		return PTR_ERR(pinctrl_ops);
328 
329 	pmx = devm_kzalloc(dev, sizeof(*pmx), GFP_KERNEL);
330 	if (!pmx)
331 		return -ENOMEM;
332 
333 	pmx->ph = ph;
334 	pmx->ops = pinctrl_ops;
335 
336 	pmx->dev = dev;
337 	pmx->pctl_desc.name = DRV_NAME;
338 	pmx->pctl_desc.owner = THIS_MODULE;
339 	pmx->pctl_desc.pctlops = &pinctrl_scmi_imx_pinctrl_ops;
340 	pmx->pctl_desc.pmxops = &pinctrl_scmi_imx_pinmux_ops;
341 	pmx->pctl_desc.confops = &pinctrl_scmi_imx_pinconf_ops;
342 
343 	ret = scmi_pinctrl_imx_get_pins(pmx, &pmx->pctl_desc);
344 	if (ret)
345 		return ret;
346 
347 	pmx->dev = &sdev->dev;
348 
349 	ret = devm_pinctrl_register_and_init(dev, &pmx->pctl_desc, pmx,
350 					     &pmx->pctldev);
351 	if (ret)
352 		return dev_err_probe(dev, ret, "Failed to register pinctrl\n");
353 
354 	return pinctrl_enable(pmx->pctldev);
355 }
356 
357 static const struct scmi_device_id scmi_id_table[] = {
358 	{ SCMI_PROTOCOL_PINCTRL, "pinctrl-imx" },
359 	{ }
360 };
361 MODULE_DEVICE_TABLE(scmi, scmi_id_table);
362 
363 static struct scmi_driver scmi_pinctrl_imx_driver = {
364 	.name = DRV_NAME,
365 	.probe = scmi_pinctrl_imx_probe,
366 	.id_table = scmi_id_table,
367 };
368 module_scmi_driver(scmi_pinctrl_imx_driver);
369 
370 MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
371 MODULE_DESCRIPTION("i.MX SCMI pin controller driver");
372 MODULE_LICENSE("GPL");
373