1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * phylink models the MAC to optional PHY connection, supporting
4 * technologies such as SFP cages where the PHY is hot-pluggable.
5 *
6 * Copyright (C) 2015 Russell King
7 */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22
23 #include "sfp.h"
24 #include "swphy.h"
25
26 #define SUPPORTED_INTERFACES \
27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32
33 enum {
34 PHYLINK_DISABLE_STOPPED,
35 PHYLINK_DISABLE_LINK,
36 PHYLINK_DISABLE_MAC_WOL,
37
38 PCS_STATE_DOWN = 0,
39 PCS_STATE_STARTING,
40 PCS_STATE_STARTED,
41 };
42
43 /**
44 * struct phylink - internal data type for phylink
45 */
46 struct phylink {
47 /* private: */
48 struct net_device *netdev;
49 const struct phylink_mac_ops *mac_ops;
50 struct phylink_config *config;
51 struct phylink_pcs *pcs;
52 struct device *dev;
53 unsigned int old_link_state:1;
54
55 unsigned long phylink_disable_state; /* bitmask of disables */
56 struct phy_device *phydev;
57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
58 u8 cfg_link_an_mode; /* MLO_AN_xxx */
59 u8 cur_link_an_mode;
60 u8 link_port; /* The current non-phy ethtool port */
61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
62
63 /* The link configuration settings */
64 struct phylink_link_state link_config;
65
66 /* The current settings */
67 phy_interface_t cur_interface;
68
69 struct gpio_desc *link_gpio;
70 unsigned int link_irq;
71 struct timer_list link_poll;
72 void (*get_fixed_state)(struct net_device *dev,
73 struct phylink_link_state *s);
74
75 struct mutex state_mutex;
76 struct phylink_link_state phy_state;
77 struct work_struct resolve;
78 unsigned int pcs_neg_mode;
79 unsigned int pcs_state;
80
81 bool link_failed;
82
83 struct sfp_bus *sfp_bus;
84 bool sfp_may_have_phy;
85 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
86 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
87 u8 sfp_port;
88 };
89
90 #define phylink_printk(level, pl, fmt, ...) \
91 do { \
92 if ((pl)->config->type == PHYLINK_NETDEV) \
93 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
94 else if ((pl)->config->type == PHYLINK_DEV) \
95 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
96 } while (0)
97
98 #define phylink_err(pl, fmt, ...) \
99 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
100 #define phylink_warn(pl, fmt, ...) \
101 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
102 #define phylink_info(pl, fmt, ...) \
103 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
104 #if defined(CONFIG_DYNAMIC_DEBUG)
105 #define phylink_dbg(pl, fmt, ...) \
106 do { \
107 if ((pl)->config->type == PHYLINK_NETDEV) \
108 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
109 else if ((pl)->config->type == PHYLINK_DEV) \
110 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
111 } while (0)
112 #elif defined(DEBUG)
113 #define phylink_dbg(pl, fmt, ...) \
114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
115 #else
116 #define phylink_dbg(pl, fmt, ...) \
117 ({ \
118 if (0) \
119 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
120 })
121 #endif
122
123 static const phy_interface_t phylink_sfp_interface_preference[] = {
124 PHY_INTERFACE_MODE_25GBASER,
125 PHY_INTERFACE_MODE_USXGMII,
126 PHY_INTERFACE_MODE_10GBASER,
127 PHY_INTERFACE_MODE_5GBASER,
128 PHY_INTERFACE_MODE_2500BASEX,
129 PHY_INTERFACE_MODE_SGMII,
130 PHY_INTERFACE_MODE_1000BASEX,
131 PHY_INTERFACE_MODE_100BASEX,
132 };
133
134 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
135
136 /**
137 * phylink_set_port_modes() - set the port type modes in the ethtool mask
138 * @mask: ethtool link mode mask
139 *
140 * Sets all the port type modes in the ethtool mask. MAC drivers should
141 * use this in their 'validate' callback.
142 */
phylink_set_port_modes(unsigned long * mask)143 void phylink_set_port_modes(unsigned long *mask)
144 {
145 phylink_set(mask, TP);
146 phylink_set(mask, AUI);
147 phylink_set(mask, MII);
148 phylink_set(mask, FIBRE);
149 phylink_set(mask, BNC);
150 phylink_set(mask, Backplane);
151 }
152 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
153
phylink_is_empty_linkmode(const unsigned long * linkmode)154 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
155 {
156 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
157
158 phylink_set_port_modes(tmp);
159 phylink_set(tmp, Autoneg);
160 phylink_set(tmp, Pause);
161 phylink_set(tmp, Asym_Pause);
162
163 return linkmode_subset(linkmode, tmp);
164 }
165
phylink_an_mode_str(unsigned int mode)166 static const char *phylink_an_mode_str(unsigned int mode)
167 {
168 static const char *modestr[] = {
169 [MLO_AN_PHY] = "phy",
170 [MLO_AN_FIXED] = "fixed",
171 [MLO_AN_INBAND] = "inband",
172 };
173
174 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
175 }
176
phylink_interface_signal_rate(phy_interface_t interface)177 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
178 {
179 switch (interface) {
180 case PHY_INTERFACE_MODE_SGMII:
181 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
182 return 1250;
183 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
184 return 3125;
185 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
186 return 5156;
187 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
188 return 10313;
189 default:
190 return 0;
191 }
192 }
193
194 /**
195 * phylink_interface_max_speed() - get the maximum speed of a phy interface
196 * @interface: phy interface mode defined by &typedef phy_interface_t
197 *
198 * Determine the maximum speed of a phy interface. This is intended to help
199 * determine the correct speed to pass to the MAC when the phy is performing
200 * rate matching.
201 *
202 * Return: The maximum speed of @interface
203 */
phylink_interface_max_speed(phy_interface_t interface)204 static int phylink_interface_max_speed(phy_interface_t interface)
205 {
206 switch (interface) {
207 case PHY_INTERFACE_MODE_100BASEX:
208 case PHY_INTERFACE_MODE_REVRMII:
209 case PHY_INTERFACE_MODE_RMII:
210 case PHY_INTERFACE_MODE_SMII:
211 case PHY_INTERFACE_MODE_REVMII:
212 case PHY_INTERFACE_MODE_MII:
213 return SPEED_100;
214
215 case PHY_INTERFACE_MODE_TBI:
216 case PHY_INTERFACE_MODE_MOCA:
217 case PHY_INTERFACE_MODE_RTBI:
218 case PHY_INTERFACE_MODE_1000BASEX:
219 case PHY_INTERFACE_MODE_1000BASEKX:
220 case PHY_INTERFACE_MODE_TRGMII:
221 case PHY_INTERFACE_MODE_RGMII_TXID:
222 case PHY_INTERFACE_MODE_RGMII_RXID:
223 case PHY_INTERFACE_MODE_RGMII_ID:
224 case PHY_INTERFACE_MODE_RGMII:
225 case PHY_INTERFACE_MODE_PSGMII:
226 case PHY_INTERFACE_MODE_QSGMII:
227 case PHY_INTERFACE_MODE_QUSGMII:
228 case PHY_INTERFACE_MODE_SGMII:
229 case PHY_INTERFACE_MODE_GMII:
230 return SPEED_1000;
231
232 case PHY_INTERFACE_MODE_2500BASEX:
233 case PHY_INTERFACE_MODE_10G_QXGMII:
234 return SPEED_2500;
235
236 case PHY_INTERFACE_MODE_5GBASER:
237 return SPEED_5000;
238
239 case PHY_INTERFACE_MODE_XGMII:
240 case PHY_INTERFACE_MODE_RXAUI:
241 case PHY_INTERFACE_MODE_XAUI:
242 case PHY_INTERFACE_MODE_10GBASER:
243 case PHY_INTERFACE_MODE_10GKR:
244 case PHY_INTERFACE_MODE_USXGMII:
245 return SPEED_10000;
246
247 case PHY_INTERFACE_MODE_25GBASER:
248 return SPEED_25000;
249
250 case PHY_INTERFACE_MODE_XLGMII:
251 return SPEED_40000;
252
253 case PHY_INTERFACE_MODE_INTERNAL:
254 case PHY_INTERFACE_MODE_NA:
255 case PHY_INTERFACE_MODE_MAX:
256 /* No idea! Garbage in, unknown out */
257 return SPEED_UNKNOWN;
258 }
259
260 /* If we get here, someone forgot to add an interface mode above */
261 WARN_ON_ONCE(1);
262 return SPEED_UNKNOWN;
263 }
264
265 /**
266 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
267 * @linkmodes: ethtool linkmode mask (must be already initialised)
268 * @caps: bitmask of MAC capabilities
269 *
270 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
271 * supported by the @caps. @linkmodes must have been initialised previously.
272 */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)273 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
274 unsigned long caps)
275 {
276 if (caps & MAC_SYM_PAUSE)
277 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
278
279 if (caps & MAC_ASYM_PAUSE)
280 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
281
282 if (caps & MAC_10HD) {
283 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
284 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
285 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
286 }
287
288 if (caps & MAC_10FD) {
289 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
290 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
291 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
292 }
293
294 if (caps & MAC_100HD) {
295 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
296 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
297 }
298
299 if (caps & MAC_100FD) {
300 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
301 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
302 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
303 }
304
305 if (caps & MAC_1000HD)
306 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
307
308 if (caps & MAC_1000FD) {
309 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
310 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
311 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
312 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
313 }
314
315 if (caps & MAC_2500FD) {
316 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
317 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
318 }
319
320 if (caps & MAC_5000FD)
321 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
322
323 if (caps & MAC_10000FD) {
324 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
325 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
326 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
327 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
328 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
329 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
330 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
331 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
332 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
333 }
334
335 if (caps & MAC_25000FD) {
336 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
337 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
338 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
339 }
340
341 if (caps & MAC_40000FD) {
342 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
343 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
344 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
345 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
346 }
347
348 if (caps & MAC_50000FD) {
349 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
350 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
351 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
352 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
353 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
354 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
355 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
356 linkmodes);
357 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
358 }
359
360 if (caps & MAC_56000FD) {
361 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
362 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
363 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
364 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
365 }
366
367 if (caps & MAC_100000FD) {
368 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
369 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
370 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
371 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
372 linkmodes);
373 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
374 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
375 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
376 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
377 linkmodes);
378 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
379 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
380 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
381 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
382 linkmodes);
383 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
384 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
385 }
386
387 if (caps & MAC_200000FD) {
388 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
389 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
390 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
391 linkmodes);
392 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
393 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
394 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
395 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
396 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
397 linkmodes);
398 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
399 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
400 }
401
402 if (caps & MAC_400000FD) {
403 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
404 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
405 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
406 linkmodes);
407 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
408 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
409 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
410 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
411 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
412 linkmodes);
413 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
414 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
415 }
416 }
417
418 static struct {
419 unsigned long mask;
420 int speed;
421 unsigned int duplex;
422 } phylink_caps_params[] = {
423 { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
424 { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
425 { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
426 { MAC_56000FD, SPEED_56000, DUPLEX_FULL },
427 { MAC_50000FD, SPEED_50000, DUPLEX_FULL },
428 { MAC_40000FD, SPEED_40000, DUPLEX_FULL },
429 { MAC_25000FD, SPEED_25000, DUPLEX_FULL },
430 { MAC_20000FD, SPEED_20000, DUPLEX_FULL },
431 { MAC_10000FD, SPEED_10000, DUPLEX_FULL },
432 { MAC_5000FD, SPEED_5000, DUPLEX_FULL },
433 { MAC_2500FD, SPEED_2500, DUPLEX_FULL },
434 { MAC_1000FD, SPEED_1000, DUPLEX_FULL },
435 { MAC_1000HD, SPEED_1000, DUPLEX_HALF },
436 { MAC_100FD, SPEED_100, DUPLEX_FULL },
437 { MAC_100HD, SPEED_100, DUPLEX_HALF },
438 { MAC_10FD, SPEED_10, DUPLEX_FULL },
439 { MAC_10HD, SPEED_10, DUPLEX_HALF },
440 };
441
442 /**
443 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
444 * @config: pointer to a &struct phylink_config
445 * @max_speed: maximum speed
446 *
447 * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
448 * Any further motifications of config.mac_capabilities will override this.
449 */
phylink_limit_mac_speed(struct phylink_config * config,u32 max_speed)450 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
451 {
452 int i;
453
454 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
455 phylink_caps_params[i].speed > max_speed; i++)
456 config->mac_capabilities &= ~phylink_caps_params[i].mask;
457 }
458 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
459
460 /**
461 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
462 * @speed: the speed to search for
463 * @duplex: the duplex to search for
464 *
465 * Find the mac capability for a given speed and duplex.
466 *
467 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
468 * there were no matches.
469 */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)470 static unsigned long phylink_cap_from_speed_duplex(int speed,
471 unsigned int duplex)
472 {
473 int i;
474
475 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
476 if (speed == phylink_caps_params[i].speed &&
477 duplex == phylink_caps_params[i].duplex)
478 return phylink_caps_params[i].mask;
479 }
480
481 return 0;
482 }
483
484 /**
485 * phylink_get_capabilities() - get capabilities for a given MAC
486 * @interface: phy interface mode defined by &typedef phy_interface_t
487 * @mac_capabilities: bitmask of MAC capabilities
488 * @rate_matching: type of rate matching being performed
489 *
490 * Get the MAC capabilities that are supported by the @interface mode and
491 * @mac_capabilities.
492 */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)493 static unsigned long phylink_get_capabilities(phy_interface_t interface,
494 unsigned long mac_capabilities,
495 int rate_matching)
496 {
497 int max_speed = phylink_interface_max_speed(interface);
498 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
499 unsigned long matched_caps = 0;
500
501 switch (interface) {
502 case PHY_INTERFACE_MODE_USXGMII:
503 caps |= MAC_10000FD | MAC_5000FD;
504 fallthrough;
505
506 case PHY_INTERFACE_MODE_10G_QXGMII:
507 caps |= MAC_2500FD;
508 fallthrough;
509
510 case PHY_INTERFACE_MODE_RGMII_TXID:
511 case PHY_INTERFACE_MODE_RGMII_RXID:
512 case PHY_INTERFACE_MODE_RGMII_ID:
513 case PHY_INTERFACE_MODE_RGMII:
514 case PHY_INTERFACE_MODE_PSGMII:
515 case PHY_INTERFACE_MODE_QSGMII:
516 case PHY_INTERFACE_MODE_QUSGMII:
517 case PHY_INTERFACE_MODE_SGMII:
518 case PHY_INTERFACE_MODE_GMII:
519 caps |= MAC_1000HD | MAC_1000FD;
520 fallthrough;
521
522 case PHY_INTERFACE_MODE_REVRMII:
523 case PHY_INTERFACE_MODE_RMII:
524 case PHY_INTERFACE_MODE_SMII:
525 case PHY_INTERFACE_MODE_REVMII:
526 case PHY_INTERFACE_MODE_MII:
527 caps |= MAC_10HD | MAC_10FD;
528 fallthrough;
529
530 case PHY_INTERFACE_MODE_100BASEX:
531 caps |= MAC_100HD | MAC_100FD;
532 break;
533
534 case PHY_INTERFACE_MODE_TBI:
535 case PHY_INTERFACE_MODE_MOCA:
536 case PHY_INTERFACE_MODE_RTBI:
537 case PHY_INTERFACE_MODE_1000BASEX:
538 caps |= MAC_1000HD;
539 fallthrough;
540 case PHY_INTERFACE_MODE_1000BASEKX:
541 case PHY_INTERFACE_MODE_TRGMII:
542 caps |= MAC_1000FD;
543 break;
544
545 case PHY_INTERFACE_MODE_2500BASEX:
546 caps |= MAC_2500FD;
547 break;
548
549 case PHY_INTERFACE_MODE_5GBASER:
550 caps |= MAC_5000FD;
551 break;
552
553 case PHY_INTERFACE_MODE_XGMII:
554 case PHY_INTERFACE_MODE_RXAUI:
555 case PHY_INTERFACE_MODE_XAUI:
556 case PHY_INTERFACE_MODE_10GBASER:
557 case PHY_INTERFACE_MODE_10GKR:
558 caps |= MAC_10000FD;
559 break;
560
561 case PHY_INTERFACE_MODE_25GBASER:
562 caps |= MAC_25000FD;
563 break;
564
565 case PHY_INTERFACE_MODE_XLGMII:
566 caps |= MAC_40000FD;
567 break;
568
569 case PHY_INTERFACE_MODE_INTERNAL:
570 caps |= ~0;
571 break;
572
573 case PHY_INTERFACE_MODE_NA:
574 case PHY_INTERFACE_MODE_MAX:
575 break;
576 }
577
578 switch (rate_matching) {
579 case RATE_MATCH_OPEN_LOOP:
580 /* TODO */
581 fallthrough;
582 case RATE_MATCH_NONE:
583 matched_caps = 0;
584 break;
585 case RATE_MATCH_PAUSE: {
586 /* The MAC must support asymmetric pause towards the local
587 * device for this. We could allow just symmetric pause, but
588 * then we might have to renegotiate if the link partner
589 * doesn't support pause. This is because there's no way to
590 * accept pause frames without transmitting them if we only
591 * support symmetric pause.
592 */
593 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
594 !(mac_capabilities & MAC_ASYM_PAUSE))
595 break;
596
597 /* We can't adapt if the MAC doesn't support the interface's
598 * max speed at full duplex.
599 */
600 if (mac_capabilities &
601 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL))
602 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
603 break;
604 }
605 case RATE_MATCH_CRS:
606 /* The MAC must support half duplex at the interface's max
607 * speed.
608 */
609 if (mac_capabilities &
610 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
611 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
612 matched_caps &= mac_capabilities;
613 }
614 break;
615 }
616
617 return (caps & mac_capabilities) | matched_caps;
618 }
619
620 /**
621 * phylink_validate_mask_caps() - Restrict link modes based on caps
622 * @supported: ethtool bitmask for supported link modes.
623 * @state: pointer to a &struct phylink_link_state.
624 * @mac_capabilities: bitmask of MAC capabilities
625 *
626 * Calculate the supported link modes based on @mac_capabilities, and restrict
627 * @supported and @state based on that. Use this function if your capabiliies
628 * aren't constant, such as if they vary depending on the interface.
629 */
phylink_validate_mask_caps(unsigned long * supported,struct phylink_link_state * state,unsigned long mac_capabilities)630 static void phylink_validate_mask_caps(unsigned long *supported,
631 struct phylink_link_state *state,
632 unsigned long mac_capabilities)
633 {
634 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
635 unsigned long caps;
636
637 phylink_set_port_modes(mask);
638 phylink_set(mask, Autoneg);
639 caps = phylink_get_capabilities(state->interface, mac_capabilities,
640 state->rate_matching);
641 phylink_caps_to_linkmodes(mask, caps);
642
643 linkmode_and(supported, supported, mask);
644 linkmode_and(state->advertising, state->advertising, mask);
645 }
646
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)647 static int phylink_validate_mac_and_pcs(struct phylink *pl,
648 unsigned long *supported,
649 struct phylink_link_state *state)
650 {
651 struct phylink_pcs *pcs = NULL;
652 unsigned long capabilities;
653 int ret;
654
655 /* Get the PCS for this interface mode */
656 if (pl->mac_ops->mac_select_pcs) {
657 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
658 if (IS_ERR(pcs))
659 return PTR_ERR(pcs);
660 }
661
662 if (pcs) {
663 /* The PCS, if present, must be setup before phylink_create()
664 * has been called. If the ops is not initialised, print an
665 * error and backtrace rather than oopsing the kernel.
666 */
667 if (!pcs->ops) {
668 phylink_err(pl, "interface %s: uninitialised PCS\n",
669 phy_modes(state->interface));
670 dump_stack();
671 return -EINVAL;
672 }
673
674 /* Validate the link parameters with the PCS */
675 if (pcs->ops->pcs_validate) {
676 ret = pcs->ops->pcs_validate(pcs, supported, state);
677 if (ret < 0 || phylink_is_empty_linkmode(supported))
678 return -EINVAL;
679
680 /* Ensure the advertising mask is a subset of the
681 * supported mask.
682 */
683 linkmode_and(state->advertising, state->advertising,
684 supported);
685 }
686 }
687
688 /* Then validate the link parameters with the MAC */
689 if (pl->mac_ops->mac_get_caps)
690 capabilities = pl->mac_ops->mac_get_caps(pl->config,
691 state->interface);
692 else
693 capabilities = pl->config->mac_capabilities;
694
695 phylink_validate_mask_caps(supported, state, capabilities);
696
697 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
698 }
699
phylink_validate_one(struct phylink * pl,struct phy_device * phy,const unsigned long * supported,const struct phylink_link_state * state,phy_interface_t interface,unsigned long * accum_supported,unsigned long * accum_advertising)700 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
701 const unsigned long *supported,
702 const struct phylink_link_state *state,
703 phy_interface_t interface,
704 unsigned long *accum_supported,
705 unsigned long *accum_advertising)
706 {
707 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
708 struct phylink_link_state tmp_state;
709
710 linkmode_copy(tmp_supported, supported);
711
712 tmp_state = *state;
713 tmp_state.interface = interface;
714
715 if (phy)
716 tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
717
718 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
719 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
720 interface, phy_modes(interface),
721 phy_rate_matching_to_str(tmp_state.rate_matching),
722 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
723
724 linkmode_or(accum_supported, accum_supported, tmp_supported);
725 linkmode_or(accum_advertising, accum_advertising,
726 tmp_state.advertising);
727 }
728 }
729
phylink_validate_mask(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)730 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
731 unsigned long *supported,
732 struct phylink_link_state *state,
733 const unsigned long *interfaces)
734 {
735 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
736 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
737 int interface;
738
739 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
740 phylink_validate_one(pl, phy, supported, state, interface,
741 all_s, all_adv);
742
743 linkmode_copy(supported, all_s);
744 linkmode_copy(state->advertising, all_adv);
745
746 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
747 }
748
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)749 static int phylink_validate(struct phylink *pl, unsigned long *supported,
750 struct phylink_link_state *state)
751 {
752 const unsigned long *interfaces = pl->config->supported_interfaces;
753
754 if (state->interface == PHY_INTERFACE_MODE_NA)
755 return phylink_validate_mask(pl, NULL, supported, state,
756 interfaces);
757
758 if (!test_bit(state->interface, interfaces))
759 return -EINVAL;
760
761 return phylink_validate_mac_and_pcs(pl, supported, state);
762 }
763
phylink_parse_fixedlink(struct phylink * pl,const struct fwnode_handle * fwnode)764 static int phylink_parse_fixedlink(struct phylink *pl,
765 const struct fwnode_handle *fwnode)
766 {
767 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
768 struct fwnode_handle *fixed_node;
769 const struct phy_setting *s;
770 struct gpio_desc *desc;
771 u32 speed;
772 int ret;
773
774 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
775 if (fixed_node) {
776 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
777
778 pl->link_config.speed = speed;
779 pl->link_config.duplex = DUPLEX_HALF;
780
781 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
782 pl->link_config.duplex = DUPLEX_FULL;
783
784 /* We treat the "pause" and "asym-pause" terminology as
785 * defining the link partner's ability.
786 */
787 if (fwnode_property_read_bool(fixed_node, "pause"))
788 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
789 pl->link_config.lp_advertising);
790 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
791 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
792 pl->link_config.lp_advertising);
793
794 if (ret == 0) {
795 desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
796 GPIOD_IN, "?");
797
798 if (!IS_ERR(desc))
799 pl->link_gpio = desc;
800 else if (desc == ERR_PTR(-EPROBE_DEFER))
801 ret = -EPROBE_DEFER;
802 }
803 fwnode_handle_put(fixed_node);
804
805 if (ret)
806 return ret;
807 } else {
808 u32 prop[5];
809
810 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
811 NULL, 0);
812 if (ret != ARRAY_SIZE(prop)) {
813 phylink_err(pl, "broken fixed-link?\n");
814 return -EINVAL;
815 }
816
817 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
818 prop, ARRAY_SIZE(prop));
819 if (!ret) {
820 pl->link_config.duplex = prop[1] ?
821 DUPLEX_FULL : DUPLEX_HALF;
822 pl->link_config.speed = prop[2];
823 if (prop[3])
824 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
825 pl->link_config.lp_advertising);
826 if (prop[4])
827 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
828 pl->link_config.lp_advertising);
829 }
830 }
831
832 if (pl->link_config.speed > SPEED_1000 &&
833 pl->link_config.duplex != DUPLEX_FULL)
834 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
835 pl->link_config.speed);
836
837 linkmode_fill(pl->supported);
838 linkmode_copy(pl->link_config.advertising, pl->supported);
839 phylink_validate(pl, pl->supported, &pl->link_config);
840
841 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
842 pl->supported, true);
843
844 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask);
845 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask);
846 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask);
847 linkmode_and(pl->supported, pl->supported, mask);
848
849 phylink_set(pl->supported, MII);
850
851 if (s) {
852 __set_bit(s->bit, pl->supported);
853 __set_bit(s->bit, pl->link_config.lp_advertising);
854 } else {
855 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
856 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
857 pl->link_config.speed);
858 }
859
860 linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
861 pl->supported);
862
863 pl->link_config.link = 1;
864 pl->link_config.an_complete = 1;
865
866 return 0;
867 }
868
phylink_parse_mode(struct phylink * pl,const struct fwnode_handle * fwnode)869 static int phylink_parse_mode(struct phylink *pl,
870 const struct fwnode_handle *fwnode)
871 {
872 struct fwnode_handle *dn;
873 const char *managed;
874 unsigned long caps;
875
876 if (pl->config->default_an_inband)
877 pl->cfg_link_an_mode = MLO_AN_INBAND;
878
879 dn = fwnode_get_named_child_node(fwnode, "fixed-link");
880 if (dn || fwnode_property_present(fwnode, "fixed-link"))
881 pl->cfg_link_an_mode = MLO_AN_FIXED;
882 fwnode_handle_put(dn);
883
884 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
885 strcmp(managed, "in-band-status") == 0)) {
886 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
887 phylink_err(pl,
888 "can't use both fixed-link and in-band-status\n");
889 return -EINVAL;
890 }
891
892 pl->cfg_link_an_mode = MLO_AN_INBAND;
893 }
894
895 if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
896 linkmode_zero(pl->supported);
897 phylink_set(pl->supported, MII);
898 phylink_set(pl->supported, Autoneg);
899 phylink_set(pl->supported, Asym_Pause);
900 phylink_set(pl->supported, Pause);
901
902 switch (pl->link_config.interface) {
903 case PHY_INTERFACE_MODE_SGMII:
904 case PHY_INTERFACE_MODE_PSGMII:
905 case PHY_INTERFACE_MODE_QSGMII:
906 case PHY_INTERFACE_MODE_QUSGMII:
907 case PHY_INTERFACE_MODE_RGMII:
908 case PHY_INTERFACE_MODE_RGMII_ID:
909 case PHY_INTERFACE_MODE_RGMII_RXID:
910 case PHY_INTERFACE_MODE_RGMII_TXID:
911 case PHY_INTERFACE_MODE_RTBI:
912 case PHY_INTERFACE_MODE_1000BASEX:
913 case PHY_INTERFACE_MODE_2500BASEX:
914 case PHY_INTERFACE_MODE_5GBASER:
915 case PHY_INTERFACE_MODE_25GBASER:
916 case PHY_INTERFACE_MODE_USXGMII:
917 case PHY_INTERFACE_MODE_10G_QXGMII:
918 case PHY_INTERFACE_MODE_10GKR:
919 case PHY_INTERFACE_MODE_10GBASER:
920 case PHY_INTERFACE_MODE_XLGMII:
921 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
922 caps = phylink_get_capabilities(pl->link_config.interface, caps,
923 RATE_MATCH_NONE);
924 phylink_caps_to_linkmodes(pl->supported, caps);
925 break;
926
927 default:
928 phylink_err(pl,
929 "incorrect link mode %s for in-band status\n",
930 phy_modes(pl->link_config.interface));
931 return -EINVAL;
932 }
933
934 linkmode_copy(pl->link_config.advertising, pl->supported);
935
936 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
937 phylink_err(pl,
938 "failed to validate link configuration for in-band status\n");
939 return -EINVAL;
940 }
941 }
942
943 return 0;
944 }
945
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)946 static void phylink_apply_manual_flow(struct phylink *pl,
947 struct phylink_link_state *state)
948 {
949 /* If autoneg is disabled, pause AN is also disabled */
950 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
951 state->advertising))
952 state->pause &= ~MLO_PAUSE_AN;
953
954 /* Manual configuration of pause modes */
955 if (!(pl->link_config.pause & MLO_PAUSE_AN))
956 state->pause = pl->link_config.pause;
957 }
958
phylink_resolve_an_pause(struct phylink_link_state * state)959 static void phylink_resolve_an_pause(struct phylink_link_state *state)
960 {
961 bool tx_pause, rx_pause;
962
963 if (state->duplex == DUPLEX_FULL) {
964 linkmode_resolve_pause(state->advertising,
965 state->lp_advertising,
966 &tx_pause, &rx_pause);
967 if (tx_pause)
968 state->pause |= MLO_PAUSE_TX;
969 if (rx_pause)
970 state->pause |= MLO_PAUSE_RX;
971 }
972 }
973
phylink_pcs_pre_config(struct phylink_pcs * pcs,phy_interface_t interface)974 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
975 phy_interface_t interface)
976 {
977 if (pcs && pcs->ops->pcs_pre_config)
978 pcs->ops->pcs_pre_config(pcs, interface);
979 }
980
phylink_pcs_post_config(struct phylink_pcs * pcs,phy_interface_t interface)981 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
982 phy_interface_t interface)
983 {
984 int err = 0;
985
986 if (pcs && pcs->ops->pcs_post_config)
987 err = pcs->ops->pcs_post_config(pcs, interface);
988
989 return err;
990 }
991
phylink_pcs_disable(struct phylink_pcs * pcs)992 static void phylink_pcs_disable(struct phylink_pcs *pcs)
993 {
994 if (pcs && pcs->ops->pcs_disable)
995 pcs->ops->pcs_disable(pcs);
996 }
997
phylink_pcs_enable(struct phylink_pcs * pcs)998 static int phylink_pcs_enable(struct phylink_pcs *pcs)
999 {
1000 int err = 0;
1001
1002 if (pcs && pcs->ops->pcs_enable)
1003 err = pcs->ops->pcs_enable(pcs);
1004
1005 return err;
1006 }
1007
phylink_pcs_config(struct phylink_pcs * pcs,unsigned int neg_mode,const struct phylink_link_state * state,bool permit_pause_to_mac)1008 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1009 const struct phylink_link_state *state,
1010 bool permit_pause_to_mac)
1011 {
1012 if (!pcs)
1013 return 0;
1014
1015 return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1016 state->advertising, permit_pause_to_mac);
1017 }
1018
phylink_pcs_link_up(struct phylink_pcs * pcs,unsigned int neg_mode,phy_interface_t interface,int speed,int duplex)1019 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1020 phy_interface_t interface, int speed,
1021 int duplex)
1022 {
1023 if (pcs && pcs->ops->pcs_link_up)
1024 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1025 }
1026
phylink_pcs_poll_stop(struct phylink * pl)1027 static void phylink_pcs_poll_stop(struct phylink *pl)
1028 {
1029 if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1030 del_timer(&pl->link_poll);
1031 }
1032
phylink_pcs_poll_start(struct phylink * pl)1033 static void phylink_pcs_poll_start(struct phylink *pl)
1034 {
1035 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1036 mod_timer(&pl->link_poll, jiffies + HZ);
1037 }
1038
phylink_pcs_pre_init(struct phylink * pl,struct phylink_pcs * pcs)1039 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
1040 {
1041 int ret = 0;
1042
1043 /* Signal to PCS driver that MAC requires RX clock for init */
1044 if (pl->config->mac_requires_rxc)
1045 pcs->rxc_always_on = true;
1046
1047 if (pcs->ops->pcs_pre_init)
1048 ret = pcs->ops->pcs_pre_init(pcs);
1049
1050 return ret;
1051 }
1052 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
1053
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)1054 static void phylink_mac_config(struct phylink *pl,
1055 const struct phylink_link_state *state)
1056 {
1057 struct phylink_link_state st = *state;
1058
1059 /* Stop drivers incorrectly using these */
1060 linkmode_zero(st.lp_advertising);
1061 st.speed = SPEED_UNKNOWN;
1062 st.duplex = DUPLEX_UNKNOWN;
1063 st.an_complete = false;
1064 st.link = false;
1065
1066 phylink_dbg(pl,
1067 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1068 __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1069 phy_modes(st.interface),
1070 phy_rate_matching_to_str(st.rate_matching),
1071 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1072 st.pause);
1073
1074 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
1075 }
1076
phylink_pcs_an_restart(struct phylink * pl)1077 static void phylink_pcs_an_restart(struct phylink *pl)
1078 {
1079 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1080 pl->link_config.advertising) &&
1081 phy_interface_mode_is_8023z(pl->link_config.interface) &&
1082 phylink_autoneg_inband(pl->cur_link_an_mode))
1083 pl->pcs->ops->pcs_an_restart(pl->pcs);
1084 }
1085
1086 /**
1087 * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1088 * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
1089 * @interface: interface mode to be used
1090 * @advertising: adertisement ethtool link mode mask
1091 *
1092 * Determines the negotiation mode to be used by the PCS, and returns
1093 * one of:
1094 *
1095 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1096 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1097 * will be used.
1098 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1099 * disabled
1100 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1101 *
1102 * Note: this is for cases where the PCS itself is involved in negotiation
1103 * (e.g. Clause 37, SGMII and similar) not Clause 73.
1104 */
phylink_pcs_neg_mode(unsigned int mode,phy_interface_t interface,const unsigned long * advertising)1105 static unsigned int phylink_pcs_neg_mode(unsigned int mode,
1106 phy_interface_t interface,
1107 const unsigned long *advertising)
1108 {
1109 unsigned int neg_mode;
1110
1111 switch (interface) {
1112 case PHY_INTERFACE_MODE_SGMII:
1113 case PHY_INTERFACE_MODE_QSGMII:
1114 case PHY_INTERFACE_MODE_QUSGMII:
1115 case PHY_INTERFACE_MODE_USXGMII:
1116 case PHY_INTERFACE_MODE_10G_QXGMII:
1117 /* These protocols are designed for use with a PHY which
1118 * communicates its negotiation result back to the MAC via
1119 * inband communication. Note: there exist PHYs that run
1120 * with SGMII but do not send the inband data.
1121 */
1122 if (!phylink_autoneg_inband(mode))
1123 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1124 else
1125 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1126 break;
1127
1128 case PHY_INTERFACE_MODE_1000BASEX:
1129 case PHY_INTERFACE_MODE_2500BASEX:
1130 /* 1000base-X is designed for use media-side for Fibre
1131 * connections, and thus the Autoneg bit needs to be
1132 * taken into account. We also do this for 2500base-X
1133 * as well, but drivers may not support this, so may
1134 * need to override this.
1135 */
1136 if (!phylink_autoneg_inband(mode))
1137 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1138 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1139 advertising))
1140 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1141 else
1142 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1143 break;
1144
1145 default:
1146 neg_mode = PHYLINK_PCS_NEG_NONE;
1147 break;
1148 }
1149
1150 return neg_mode;
1151 }
1152
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)1153 static void phylink_major_config(struct phylink *pl, bool restart,
1154 const struct phylink_link_state *state)
1155 {
1156 struct phylink_pcs *pcs = NULL;
1157 bool pcs_changed = false;
1158 unsigned int rate_kbd;
1159 unsigned int neg_mode;
1160 int err;
1161
1162 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1163
1164 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1165 state->interface,
1166 state->advertising);
1167
1168 if (pl->mac_ops->mac_select_pcs) {
1169 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1170 if (IS_ERR(pcs)) {
1171 phylink_err(pl,
1172 "mac_select_pcs unexpectedly failed: %pe\n",
1173 pcs);
1174 return;
1175 }
1176
1177 pcs_changed = pl->pcs != pcs;
1178 }
1179
1180 phylink_pcs_poll_stop(pl);
1181
1182 if (pl->mac_ops->mac_prepare) {
1183 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1184 state->interface);
1185 if (err < 0) {
1186 phylink_err(pl, "mac_prepare failed: %pe\n",
1187 ERR_PTR(err));
1188 return;
1189 }
1190 }
1191
1192 /* If we have a new PCS, switch to the new PCS after preparing the MAC
1193 * for the change.
1194 */
1195 if (pcs_changed) {
1196 phylink_pcs_disable(pl->pcs);
1197
1198 if (pl->pcs)
1199 pl->pcs->phylink = NULL;
1200
1201 pcs->phylink = pl;
1202
1203 pl->pcs = pcs;
1204 }
1205
1206 if (pl->pcs)
1207 phylink_pcs_pre_config(pl->pcs, state->interface);
1208
1209 phylink_mac_config(pl, state);
1210
1211 if (pl->pcs)
1212 phylink_pcs_post_config(pl->pcs, state->interface);
1213
1214 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1215 phylink_pcs_enable(pl->pcs);
1216
1217 neg_mode = pl->cur_link_an_mode;
1218 if (pl->pcs && pl->pcs->neg_mode)
1219 neg_mode = pl->pcs_neg_mode;
1220
1221 err = phylink_pcs_config(pl->pcs, neg_mode, state,
1222 !!(pl->link_config.pause & MLO_PAUSE_AN));
1223 if (err < 0)
1224 phylink_err(pl, "pcs_config failed: %pe\n",
1225 ERR_PTR(err));
1226 else if (err > 0)
1227 restart = true;
1228
1229 if (restart)
1230 phylink_pcs_an_restart(pl);
1231
1232 if (pl->mac_ops->mac_finish) {
1233 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1234 state->interface);
1235 if (err < 0)
1236 phylink_err(pl, "mac_finish failed: %pe\n",
1237 ERR_PTR(err));
1238 }
1239
1240 if (pl->sfp_bus) {
1241 rate_kbd = phylink_interface_signal_rate(state->interface);
1242 if (rate_kbd)
1243 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1244 }
1245
1246 phylink_pcs_poll_start(pl);
1247 }
1248
1249 /*
1250 * Reconfigure for a change of inband advertisement.
1251 * If we have a separate PCS, we only need to call its pcs_config() method,
1252 * and then restart AN if it indicates something changed. Otherwise, we do
1253 * the full MAC reconfiguration.
1254 */
phylink_change_inband_advert(struct phylink * pl)1255 static int phylink_change_inband_advert(struct phylink *pl)
1256 {
1257 unsigned int neg_mode;
1258 int ret;
1259
1260 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1261 return 0;
1262
1263 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1264 phylink_an_mode_str(pl->cur_link_an_mode),
1265 phy_modes(pl->link_config.interface),
1266 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1267 pl->link_config.pause);
1268
1269 /* Recompute the PCS neg mode */
1270 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1271 pl->link_config.interface,
1272 pl->link_config.advertising);
1273
1274 neg_mode = pl->cur_link_an_mode;
1275 if (pl->pcs->neg_mode)
1276 neg_mode = pl->pcs_neg_mode;
1277
1278 /* Modern PCS-based method; update the advert at the PCS, and
1279 * restart negotiation if the pcs_config() helper indicates that
1280 * the programmed advertisement has changed.
1281 */
1282 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1283 !!(pl->link_config.pause & MLO_PAUSE_AN));
1284 if (ret < 0)
1285 return ret;
1286
1287 if (ret > 0)
1288 phylink_pcs_an_restart(pl);
1289
1290 return 0;
1291 }
1292
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1293 static void phylink_mac_pcs_get_state(struct phylink *pl,
1294 struct phylink_link_state *state)
1295 {
1296 linkmode_copy(state->advertising, pl->link_config.advertising);
1297 linkmode_zero(state->lp_advertising);
1298 state->interface = pl->link_config.interface;
1299 state->rate_matching = pl->link_config.rate_matching;
1300 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1301 state->advertising)) {
1302 state->speed = SPEED_UNKNOWN;
1303 state->duplex = DUPLEX_UNKNOWN;
1304 state->pause = MLO_PAUSE_NONE;
1305 } else {
1306 state->speed = pl->link_config.speed;
1307 state->duplex = pl->link_config.duplex;
1308 state->pause = pl->link_config.pause;
1309 }
1310 state->an_complete = 0;
1311 state->link = 1;
1312
1313 if (pl->pcs)
1314 pl->pcs->ops->pcs_get_state(pl->pcs, state);
1315 else
1316 state->link = 0;
1317 }
1318
1319 /* The fixed state is... fixed except for the link state,
1320 * which may be determined by a GPIO or a callback.
1321 */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1322 static void phylink_get_fixed_state(struct phylink *pl,
1323 struct phylink_link_state *state)
1324 {
1325 *state = pl->link_config;
1326 if (pl->config->get_fixed_state)
1327 pl->config->get_fixed_state(pl->config, state);
1328 else if (pl->link_gpio)
1329 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1330
1331 state->pause = MLO_PAUSE_NONE;
1332 phylink_resolve_an_pause(state);
1333 }
1334
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1335 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1336 {
1337 struct phylink_link_state link_state;
1338
1339 switch (pl->cur_link_an_mode) {
1340 case MLO_AN_PHY:
1341 link_state = pl->phy_state;
1342 break;
1343
1344 case MLO_AN_FIXED:
1345 phylink_get_fixed_state(pl, &link_state);
1346 break;
1347
1348 case MLO_AN_INBAND:
1349 link_state = pl->link_config;
1350 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1351 link_state.pause = MLO_PAUSE_NONE;
1352 break;
1353
1354 default: /* can't happen */
1355 return;
1356 }
1357
1358 link_state.link = false;
1359
1360 phylink_apply_manual_flow(pl, &link_state);
1361 phylink_major_config(pl, force_restart, &link_state);
1362 }
1363
phylink_pause_to_str(int pause)1364 static const char *phylink_pause_to_str(int pause)
1365 {
1366 switch (pause & MLO_PAUSE_TXRX_MASK) {
1367 case MLO_PAUSE_TX | MLO_PAUSE_RX:
1368 return "rx/tx";
1369 case MLO_PAUSE_TX:
1370 return "tx";
1371 case MLO_PAUSE_RX:
1372 return "rx";
1373 default:
1374 return "off";
1375 }
1376 }
1377
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1378 static void phylink_link_up(struct phylink *pl,
1379 struct phylink_link_state link_state)
1380 {
1381 struct net_device *ndev = pl->netdev;
1382 unsigned int neg_mode;
1383 int speed, duplex;
1384 bool rx_pause;
1385
1386 speed = link_state.speed;
1387 duplex = link_state.duplex;
1388 rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1389
1390 switch (link_state.rate_matching) {
1391 case RATE_MATCH_PAUSE:
1392 /* The PHY is doing rate matchion from the media rate (in
1393 * the link_state) to the interface speed, and will send
1394 * pause frames to the MAC to limit its transmission speed.
1395 */
1396 speed = phylink_interface_max_speed(link_state.interface);
1397 duplex = DUPLEX_FULL;
1398 rx_pause = true;
1399 break;
1400
1401 case RATE_MATCH_CRS:
1402 /* The PHY is doing rate matchion from the media rate (in
1403 * the link_state) to the interface speed, and will cause
1404 * collisions to the MAC to limit its transmission speed.
1405 */
1406 speed = phylink_interface_max_speed(link_state.interface);
1407 duplex = DUPLEX_HALF;
1408 break;
1409 }
1410
1411 pl->cur_interface = link_state.interface;
1412
1413 neg_mode = pl->cur_link_an_mode;
1414 if (pl->pcs && pl->pcs->neg_mode)
1415 neg_mode = pl->pcs_neg_mode;
1416
1417 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1418 duplex);
1419
1420 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1421 pl->cur_interface, speed, duplex,
1422 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1423
1424 if (ndev)
1425 netif_carrier_on(ndev);
1426
1427 phylink_info(pl,
1428 "Link is Up - %s/%s - flow control %s\n",
1429 phy_speed_to_str(link_state.speed),
1430 phy_duplex_to_str(link_state.duplex),
1431 phylink_pause_to_str(link_state.pause));
1432 }
1433
phylink_link_down(struct phylink * pl)1434 static void phylink_link_down(struct phylink *pl)
1435 {
1436 struct net_device *ndev = pl->netdev;
1437
1438 if (ndev)
1439 netif_carrier_off(ndev);
1440 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1441 pl->cur_interface);
1442 phylink_info(pl, "Link is Down\n");
1443 }
1444
phylink_resolve(struct work_struct * w)1445 static void phylink_resolve(struct work_struct *w)
1446 {
1447 struct phylink *pl = container_of(w, struct phylink, resolve);
1448 struct phylink_link_state link_state;
1449 struct net_device *ndev = pl->netdev;
1450 bool mac_config = false;
1451 bool retrigger = false;
1452 bool cur_link_state;
1453
1454 mutex_lock(&pl->state_mutex);
1455 if (pl->netdev)
1456 cur_link_state = netif_carrier_ok(ndev);
1457 else
1458 cur_link_state = pl->old_link_state;
1459
1460 if (pl->phylink_disable_state) {
1461 pl->link_failed = false;
1462 link_state.link = false;
1463 } else if (pl->link_failed) {
1464 link_state.link = false;
1465 retrigger = true;
1466 } else if (pl->cur_link_an_mode == MLO_AN_FIXED) {
1467 phylink_get_fixed_state(pl, &link_state);
1468 mac_config = link_state.link;
1469 } else if (pl->cur_link_an_mode == MLO_AN_PHY) {
1470 link_state = pl->phy_state;
1471 mac_config = link_state.link;
1472 } else {
1473 phylink_mac_pcs_get_state(pl, &link_state);
1474
1475 /* The PCS may have a latching link-fail indicator. If the link
1476 * was up, bring the link down and re-trigger the resolve.
1477 * Otherwise, re-read the PCS state to get the current status
1478 * of the link.
1479 */
1480 if (!link_state.link) {
1481 if (cur_link_state)
1482 retrigger = true;
1483 else
1484 phylink_mac_pcs_get_state(pl, &link_state);
1485 }
1486
1487 /* If we have a phy, the "up" state is the union of both the
1488 * PHY and the MAC
1489 */
1490 if (pl->phydev)
1491 link_state.link &= pl->phy_state.link;
1492
1493 /* Only update if the PHY link is up */
1494 if (pl->phydev && pl->phy_state.link) {
1495 /* If the interface has changed, force a link down
1496 * event if the link isn't already down, and re-resolve.
1497 */
1498 if (link_state.interface != pl->phy_state.interface) {
1499 retrigger = true;
1500 link_state.link = false;
1501 }
1502
1503 link_state.interface = pl->phy_state.interface;
1504
1505 /* If we are doing rate matching, then the link
1506 * speed/duplex comes from the PHY
1507 */
1508 if (pl->phy_state.rate_matching) {
1509 link_state.rate_matching =
1510 pl->phy_state.rate_matching;
1511 link_state.speed = pl->phy_state.speed;
1512 link_state.duplex = pl->phy_state.duplex;
1513 }
1514
1515 /* If we have a PHY, we need to update with the PHY
1516 * flow control bits.
1517 */
1518 link_state.pause = pl->phy_state.pause;
1519 mac_config = true;
1520 }
1521 }
1522
1523 if (pl->cur_link_an_mode != MLO_AN_FIXED)
1524 phylink_apply_manual_flow(pl, &link_state);
1525
1526 if (mac_config) {
1527 if (link_state.interface != pl->link_config.interface) {
1528 /* The interface has changed, force the link down and
1529 * then reconfigure.
1530 */
1531 if (cur_link_state) {
1532 phylink_link_down(pl);
1533 cur_link_state = false;
1534 }
1535 phylink_major_config(pl, false, &link_state);
1536 pl->link_config.interface = link_state.interface;
1537 }
1538 }
1539
1540 if (link_state.link != cur_link_state) {
1541 pl->old_link_state = link_state.link;
1542 if (!link_state.link)
1543 phylink_link_down(pl);
1544 else
1545 phylink_link_up(pl, link_state);
1546 }
1547 if (!link_state.link && retrigger) {
1548 pl->link_failed = false;
1549 queue_work(system_power_efficient_wq, &pl->resolve);
1550 }
1551 mutex_unlock(&pl->state_mutex);
1552 }
1553
phylink_run_resolve(struct phylink * pl)1554 static void phylink_run_resolve(struct phylink *pl)
1555 {
1556 if (!pl->phylink_disable_state)
1557 queue_work(system_power_efficient_wq, &pl->resolve);
1558 }
1559
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1560 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1561 {
1562 unsigned long state = pl->phylink_disable_state;
1563
1564 set_bit(bit, &pl->phylink_disable_state);
1565 if (state == 0) {
1566 queue_work(system_power_efficient_wq, &pl->resolve);
1567 flush_work(&pl->resolve);
1568 }
1569 }
1570
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1571 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1572 {
1573 clear_bit(bit, &pl->phylink_disable_state);
1574 phylink_run_resolve(pl);
1575 }
1576
phylink_fixed_poll(struct timer_list * t)1577 static void phylink_fixed_poll(struct timer_list *t)
1578 {
1579 struct phylink *pl = container_of(t, struct phylink, link_poll);
1580
1581 mod_timer(t, jiffies + HZ);
1582
1583 phylink_run_resolve(pl);
1584 }
1585
1586 static const struct sfp_upstream_ops sfp_phylink_ops;
1587
phylink_register_sfp(struct phylink * pl,const struct fwnode_handle * fwnode)1588 static int phylink_register_sfp(struct phylink *pl,
1589 const struct fwnode_handle *fwnode)
1590 {
1591 struct sfp_bus *bus;
1592 int ret;
1593
1594 if (!fwnode)
1595 return 0;
1596
1597 bus = sfp_bus_find_fwnode(fwnode);
1598 if (IS_ERR(bus)) {
1599 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1600 return PTR_ERR(bus);
1601 }
1602
1603 pl->sfp_bus = bus;
1604
1605 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1606 sfp_bus_put(bus);
1607
1608 return ret;
1609 }
1610
1611 /**
1612 * phylink_set_fixed_link() - set the fixed link
1613 * @pl: a pointer to a &struct phylink returned from phylink_create()
1614 * @state: a pointer to a struct phylink_link_state.
1615 *
1616 * This function is used when the link parameters are known and do not change,
1617 * making it suitable for certain types of network connections.
1618 *
1619 * Returns: zero on success or negative error code.
1620 */
phylink_set_fixed_link(struct phylink * pl,const struct phylink_link_state * state)1621 int phylink_set_fixed_link(struct phylink *pl,
1622 const struct phylink_link_state *state)
1623 {
1624 const struct phy_setting *s;
1625 unsigned long *adv;
1626
1627 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1628 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1629 return -EINVAL;
1630
1631 s = phy_lookup_setting(state->speed, state->duplex,
1632 pl->supported, true);
1633 if (!s)
1634 return -EINVAL;
1635
1636 adv = pl->link_config.advertising;
1637 linkmode_zero(adv);
1638 linkmode_set_bit(s->bit, adv);
1639 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1640
1641 pl->link_config.speed = state->speed;
1642 pl->link_config.duplex = state->duplex;
1643 pl->link_config.link = 1;
1644 pl->link_config.an_complete = 1;
1645
1646 pl->cfg_link_an_mode = MLO_AN_FIXED;
1647 pl->cur_link_an_mode = pl->cfg_link_an_mode;
1648
1649 return 0;
1650 }
1651 EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1652
1653 /**
1654 * phylink_create() - create a phylink instance
1655 * @config: a pointer to the target &struct phylink_config
1656 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1657 * interface
1658 * @iface: the desired link mode defined by &typedef phy_interface_t
1659 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1660 *
1661 * Create a new phylink instance, and parse the link parameters found in @np.
1662 * This will parse in-band modes, fixed-link or SFP configuration.
1663 *
1664 * Note: the rtnl lock must not be held when calling this function.
1665 *
1666 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1667 * must use IS_ERR() to check for errors from this function.
1668 */
phylink_create(struct phylink_config * config,const struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1669 struct phylink *phylink_create(struct phylink_config *config,
1670 const struct fwnode_handle *fwnode,
1671 phy_interface_t iface,
1672 const struct phylink_mac_ops *mac_ops)
1673 {
1674 struct phylink *pl;
1675 int ret;
1676
1677 /* Validate the supplied configuration */
1678 if (phy_interface_empty(config->supported_interfaces)) {
1679 dev_err(config->dev,
1680 "phylink: error: empty supported_interfaces\n");
1681 return ERR_PTR(-EINVAL);
1682 }
1683
1684 pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1685 if (!pl)
1686 return ERR_PTR(-ENOMEM);
1687
1688 mutex_init(&pl->state_mutex);
1689 INIT_WORK(&pl->resolve, phylink_resolve);
1690
1691 pl->config = config;
1692 if (config->type == PHYLINK_NETDEV) {
1693 pl->netdev = to_net_dev(config->dev);
1694 netif_carrier_off(pl->netdev);
1695 } else if (config->type == PHYLINK_DEV) {
1696 pl->dev = config->dev;
1697 } else {
1698 kfree(pl);
1699 return ERR_PTR(-EINVAL);
1700 }
1701
1702 pl->phy_state.interface = iface;
1703 pl->link_interface = iface;
1704 if (iface == PHY_INTERFACE_MODE_MOCA)
1705 pl->link_port = PORT_BNC;
1706 else
1707 pl->link_port = PORT_MII;
1708 pl->link_config.interface = iface;
1709 pl->link_config.pause = MLO_PAUSE_AN;
1710 pl->link_config.speed = SPEED_UNKNOWN;
1711 pl->link_config.duplex = DUPLEX_UNKNOWN;
1712 pl->pcs_state = PCS_STATE_DOWN;
1713 pl->mac_ops = mac_ops;
1714 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1715 timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1716
1717 linkmode_fill(pl->supported);
1718 linkmode_copy(pl->link_config.advertising, pl->supported);
1719 phylink_validate(pl, pl->supported, &pl->link_config);
1720
1721 ret = phylink_parse_mode(pl, fwnode);
1722 if (ret < 0) {
1723 kfree(pl);
1724 return ERR_PTR(ret);
1725 }
1726
1727 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1728 ret = phylink_parse_fixedlink(pl, fwnode);
1729 if (ret < 0) {
1730 kfree(pl);
1731 return ERR_PTR(ret);
1732 }
1733 }
1734
1735 pl->cur_link_an_mode = pl->cfg_link_an_mode;
1736
1737 ret = phylink_register_sfp(pl, fwnode);
1738 if (ret < 0) {
1739 kfree(pl);
1740 return ERR_PTR(ret);
1741 }
1742
1743 return pl;
1744 }
1745 EXPORT_SYMBOL_GPL(phylink_create);
1746
1747 /**
1748 * phylink_destroy() - cleanup and destroy the phylink instance
1749 * @pl: a pointer to a &struct phylink returned from phylink_create()
1750 *
1751 * Destroy a phylink instance. Any PHY that has been attached must have been
1752 * cleaned up via phylink_disconnect_phy() prior to calling this function.
1753 *
1754 * Note: the rtnl lock must not be held when calling this function.
1755 */
phylink_destroy(struct phylink * pl)1756 void phylink_destroy(struct phylink *pl)
1757 {
1758 sfp_bus_del_upstream(pl->sfp_bus);
1759 if (pl->link_gpio)
1760 gpiod_put(pl->link_gpio);
1761
1762 cancel_work_sync(&pl->resolve);
1763 kfree(pl);
1764 }
1765 EXPORT_SYMBOL_GPL(phylink_destroy);
1766
1767 /**
1768 * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1769 * @pl: a pointer to a &struct phylink returned from phylink_create()
1770 *
1771 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1772 * no PHY is needed.
1773 *
1774 * Returns true if phylink will be expecting a PHY.
1775 */
phylink_expects_phy(struct phylink * pl)1776 bool phylink_expects_phy(struct phylink *pl)
1777 {
1778 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1779 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1780 phy_interface_mode_is_8023z(pl->link_config.interface)))
1781 return false;
1782 return true;
1783 }
1784 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1785
phylink_phy_change(struct phy_device * phydev,bool up)1786 static void phylink_phy_change(struct phy_device *phydev, bool up)
1787 {
1788 struct phylink *pl = phydev->phylink;
1789 bool tx_pause, rx_pause;
1790
1791 phy_get_pause(phydev, &tx_pause, &rx_pause);
1792
1793 mutex_lock(&pl->state_mutex);
1794 pl->phy_state.speed = phydev->speed;
1795 pl->phy_state.duplex = phydev->duplex;
1796 pl->phy_state.rate_matching = phydev->rate_matching;
1797 pl->phy_state.pause = MLO_PAUSE_NONE;
1798 if (tx_pause)
1799 pl->phy_state.pause |= MLO_PAUSE_TX;
1800 if (rx_pause)
1801 pl->phy_state.pause |= MLO_PAUSE_RX;
1802 pl->phy_state.interface = phydev->interface;
1803 pl->phy_state.link = up;
1804 if (!up)
1805 pl->link_failed = true;
1806 mutex_unlock(&pl->state_mutex);
1807
1808 phylink_run_resolve(pl);
1809
1810 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1811 phy_modes(phydev->interface),
1812 phy_speed_to_str(phydev->speed),
1813 phy_duplex_to_str(phydev->duplex),
1814 phy_rate_matching_to_str(phydev->rate_matching),
1815 phylink_pause_to_str(pl->phy_state.pause));
1816 }
1817
phylink_validate_phy(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state)1818 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
1819 unsigned long *supported,
1820 struct phylink_link_state *state)
1821 {
1822 DECLARE_PHY_INTERFACE_MASK(interfaces);
1823
1824 /* If the PHY provides a bitmap of the interfaces it will be using
1825 * depending on the negotiated media speeds, use this to validate
1826 * which ethtool link modes can be used.
1827 */
1828 if (!phy_interface_empty(phy->possible_interfaces)) {
1829 /* We only care about the union of the PHY's interfaces and
1830 * those which the host supports.
1831 */
1832 phy_interface_and(interfaces, phy->possible_interfaces,
1833 pl->config->supported_interfaces);
1834
1835 if (phy_interface_empty(interfaces)) {
1836 phylink_err(pl, "PHY has no common interfaces\n");
1837 return -EINVAL;
1838 }
1839
1840 if (phy_on_sfp(phy)) {
1841 /* If the PHY is on a SFP, limit the interfaces to
1842 * those that can be used with a SFP module.
1843 */
1844 phy_interface_and(interfaces, interfaces,
1845 phylink_sfp_interfaces);
1846
1847 if (phy_interface_empty(interfaces)) {
1848 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
1849 return -EINVAL;
1850 }
1851 }
1852
1853 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
1854 phydev_name(phy),
1855 (int)PHY_INTERFACE_MODE_MAX,
1856 phy->possible_interfaces,
1857 (int)PHY_INTERFACE_MODE_MAX, interfaces);
1858
1859 return phylink_validate_mask(pl, phy, supported, state,
1860 interfaces);
1861 }
1862
1863 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
1864 phydev_name(phy));
1865
1866 /* Check whether we would use rate matching for the proposed interface
1867 * mode.
1868 */
1869 state->rate_matching = phy_get_rate_matching(phy, state->interface);
1870
1871 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1872 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1873 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1874 * their Serdes is either unnecessary or not reasonable.
1875 *
1876 * For these which switch interface modes, we really need to know which
1877 * interface modes the PHY supports to properly work out which ethtool
1878 * linkmodes can be supported. For now, as a work-around, we validate
1879 * against all interface modes, which may lead to more ethtool link
1880 * modes being advertised than are actually supported.
1881 */
1882 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
1883 state->interface != PHY_INTERFACE_MODE_RXAUI &&
1884 state->interface != PHY_INTERFACE_MODE_XAUI &&
1885 state->interface != PHY_INTERFACE_MODE_USXGMII)
1886 state->interface = PHY_INTERFACE_MODE_NA;
1887
1888 return phylink_validate(pl, supported, state);
1889 }
1890
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1891 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1892 phy_interface_t interface)
1893 {
1894 struct phylink_link_state config;
1895 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1896 char *irq_str;
1897 int ret;
1898
1899 /*
1900 * This is the new way of dealing with flow control for PHYs,
1901 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1902 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1903 * using our validate call to the MAC, we rely upon the MAC
1904 * clearing the bits from both supported and advertising fields.
1905 */
1906 phy_support_asym_pause(phy);
1907
1908 memset(&config, 0, sizeof(config));
1909 linkmode_copy(supported, phy->supported);
1910 linkmode_copy(config.advertising, phy->advertising);
1911 config.interface = interface;
1912
1913 ret = phylink_validate_phy(pl, phy, supported, &config);
1914 if (ret) {
1915 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1916 phy_modes(config.interface),
1917 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1918 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1919 ERR_PTR(ret));
1920 return ret;
1921 }
1922
1923 phy->phylink = pl;
1924 phy->phy_link_change = phylink_phy_change;
1925
1926 irq_str = phy_attached_info_irq(phy);
1927 phylink_info(pl,
1928 "PHY [%s] driver [%s] (irq=%s)\n",
1929 dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1930 kfree(irq_str);
1931
1932 mutex_lock(&phy->lock);
1933 mutex_lock(&pl->state_mutex);
1934 pl->phydev = phy;
1935 pl->phy_state.interface = interface;
1936 pl->phy_state.pause = MLO_PAUSE_NONE;
1937 pl->phy_state.speed = SPEED_UNKNOWN;
1938 pl->phy_state.duplex = DUPLEX_UNKNOWN;
1939 pl->phy_state.rate_matching = RATE_MATCH_NONE;
1940 linkmode_copy(pl->supported, supported);
1941 linkmode_copy(pl->link_config.advertising, config.advertising);
1942
1943 /* Restrict the phy advertisement according to the MAC support. */
1944 linkmode_copy(phy->advertising, config.advertising);
1945 mutex_unlock(&pl->state_mutex);
1946 mutex_unlock(&phy->lock);
1947
1948 phylink_dbg(pl,
1949 "phy: %s setting supported %*pb advertising %*pb\n",
1950 phy_modes(interface),
1951 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1952 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1953
1954 if (phy_interrupt_is_valid(phy))
1955 phy_request_interrupt(phy);
1956
1957 if (pl->config->mac_managed_pm)
1958 phy->mac_managed_pm = true;
1959
1960 return 0;
1961 }
1962
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1963 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1964 phy_interface_t interface)
1965 {
1966 u32 flags = 0;
1967
1968 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1969 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1970 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1971 return -EINVAL;
1972
1973 if (pl->phydev)
1974 return -EBUSY;
1975
1976 if (pl->config->mac_requires_rxc)
1977 flags |= PHY_F_RXC_ALWAYS_ON;
1978
1979 return phy_attach_direct(pl->netdev, phy, flags, interface);
1980 }
1981
1982 /**
1983 * phylink_connect_phy() - connect a PHY to the phylink instance
1984 * @pl: a pointer to a &struct phylink returned from phylink_create()
1985 * @phy: a pointer to a &struct phy_device.
1986 *
1987 * Connect @phy to the phylink instance specified by @pl by calling
1988 * phy_attach_direct(). Configure the @phy according to the MAC driver's
1989 * capabilities, start the PHYLIB state machine and enable any interrupts
1990 * that the PHY supports.
1991 *
1992 * This updates the phylink's ethtool supported and advertising link mode
1993 * masks.
1994 *
1995 * Returns 0 on success or a negative errno.
1996 */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)1997 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1998 {
1999 int ret;
2000
2001 /* Use PHY device/driver interface */
2002 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2003 pl->link_interface = phy->interface;
2004 pl->link_config.interface = pl->link_interface;
2005 }
2006
2007 ret = phylink_attach_phy(pl, phy, pl->link_interface);
2008 if (ret < 0)
2009 return ret;
2010
2011 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
2012 if (ret)
2013 phy_detach(phy);
2014
2015 return ret;
2016 }
2017 EXPORT_SYMBOL_GPL(phylink_connect_phy);
2018
2019 /**
2020 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2021 * @pl: a pointer to a &struct phylink returned from phylink_create()
2022 * @dn: a pointer to a &struct device_node.
2023 * @flags: PHY-specific flags to communicate to the PHY device driver
2024 *
2025 * Connect the phy specified in the device node @dn to the phylink instance
2026 * specified by @pl. Actions specified in phylink_connect_phy() will be
2027 * performed.
2028 *
2029 * Returns 0 on success or a negative errno.
2030 */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)2031 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2032 u32 flags)
2033 {
2034 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2035 }
2036 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2037
2038 /**
2039 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2040 * @pl: a pointer to a &struct phylink returned from phylink_create()
2041 * @fwnode: a pointer to a &struct fwnode_handle.
2042 * @flags: PHY-specific flags to communicate to the PHY device driver
2043 *
2044 * Connect the phy specified @fwnode to the phylink instance specified
2045 * by @pl.
2046 *
2047 * Returns 0 on success or a negative errno.
2048 */
phylink_fwnode_phy_connect(struct phylink * pl,const struct fwnode_handle * fwnode,u32 flags)2049 int phylink_fwnode_phy_connect(struct phylink *pl,
2050 const struct fwnode_handle *fwnode,
2051 u32 flags)
2052 {
2053 struct fwnode_handle *phy_fwnode;
2054 struct phy_device *phy_dev;
2055 int ret;
2056
2057 /* Fixed links and 802.3z are handled without needing a PHY */
2058 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2059 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2060 phy_interface_mode_is_8023z(pl->link_interface)))
2061 return 0;
2062
2063 phy_fwnode = fwnode_get_phy_node(fwnode);
2064 if (IS_ERR(phy_fwnode)) {
2065 if (pl->cfg_link_an_mode == MLO_AN_PHY)
2066 return -ENODEV;
2067 return 0;
2068 }
2069
2070 phy_dev = fwnode_phy_find_device(phy_fwnode);
2071 /* We're done with the phy_node handle */
2072 fwnode_handle_put(phy_fwnode);
2073 if (!phy_dev)
2074 return -ENODEV;
2075
2076 /* Use PHY device/driver interface */
2077 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2078 pl->link_interface = phy_dev->interface;
2079 pl->link_config.interface = pl->link_interface;
2080 }
2081
2082 if (pl->config->mac_requires_rxc)
2083 flags |= PHY_F_RXC_ALWAYS_ON;
2084
2085 ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2086 pl->link_interface);
2087 phy_device_free(phy_dev);
2088 if (ret)
2089 return ret;
2090
2091 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2092 if (ret)
2093 phy_detach(phy_dev);
2094
2095 return ret;
2096 }
2097 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2098
2099 /**
2100 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2101 * instance.
2102 * @pl: a pointer to a &struct phylink returned from phylink_create()
2103 *
2104 * Disconnect any current PHY from the phylink instance described by @pl.
2105 */
phylink_disconnect_phy(struct phylink * pl)2106 void phylink_disconnect_phy(struct phylink *pl)
2107 {
2108 struct phy_device *phy;
2109
2110 ASSERT_RTNL();
2111
2112 phy = pl->phydev;
2113 if (phy) {
2114 mutex_lock(&phy->lock);
2115 mutex_lock(&pl->state_mutex);
2116 pl->phydev = NULL;
2117 mutex_unlock(&pl->state_mutex);
2118 mutex_unlock(&phy->lock);
2119 flush_work(&pl->resolve);
2120
2121 phy_disconnect(phy);
2122 }
2123 }
2124 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2125
phylink_link_changed(struct phylink * pl,bool up,const char * what)2126 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2127 {
2128 if (!up)
2129 pl->link_failed = true;
2130 phylink_run_resolve(pl);
2131 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2132 }
2133
2134 /**
2135 * phylink_mac_change() - notify phylink of a change in MAC state
2136 * @pl: a pointer to a &struct phylink returned from phylink_create()
2137 * @up: indicates whether the link is currently up.
2138 *
2139 * The MAC driver should call this driver when the state of its link
2140 * changes (eg, link failure, new negotiation results, etc.)
2141 */
phylink_mac_change(struct phylink * pl,bool up)2142 void phylink_mac_change(struct phylink *pl, bool up)
2143 {
2144 phylink_link_changed(pl, up, "mac");
2145 }
2146 EXPORT_SYMBOL_GPL(phylink_mac_change);
2147
2148 /**
2149 * phylink_pcs_change() - notify phylink of a change to PCS link state
2150 * @pcs: pointer to &struct phylink_pcs
2151 * @up: indicates whether the link is currently up.
2152 *
2153 * The PCS driver should call this when the state of its link changes
2154 * (e.g. link failure, new negotiation results, etc.) Note: it should
2155 * not determine "up" by reading the BMSR. If in doubt about the link
2156 * state at interrupt time, then pass true if pcs_get_state() returns
2157 * the latched link-down state, otherwise pass false.
2158 */
phylink_pcs_change(struct phylink_pcs * pcs,bool up)2159 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2160 {
2161 struct phylink *pl = pcs->phylink;
2162
2163 if (pl)
2164 phylink_link_changed(pl, up, "pcs");
2165 }
2166 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2167
phylink_link_handler(int irq,void * data)2168 static irqreturn_t phylink_link_handler(int irq, void *data)
2169 {
2170 struct phylink *pl = data;
2171
2172 phylink_run_resolve(pl);
2173
2174 return IRQ_HANDLED;
2175 }
2176
2177 /**
2178 * phylink_start() - start a phylink instance
2179 * @pl: a pointer to a &struct phylink returned from phylink_create()
2180 *
2181 * Start the phylink instance specified by @pl, configuring the MAC for the
2182 * desired link mode(s) and negotiation style. This should be called from the
2183 * network device driver's &struct net_device_ops ndo_open() method.
2184 */
phylink_start(struct phylink * pl)2185 void phylink_start(struct phylink *pl)
2186 {
2187 bool poll = false;
2188
2189 ASSERT_RTNL();
2190
2191 phylink_info(pl, "configuring for %s/%s link mode\n",
2192 phylink_an_mode_str(pl->cur_link_an_mode),
2193 phy_modes(pl->link_config.interface));
2194
2195 /* Always set the carrier off */
2196 if (pl->netdev)
2197 netif_carrier_off(pl->netdev);
2198
2199 pl->pcs_state = PCS_STATE_STARTING;
2200
2201 /* Apply the link configuration to the MAC when starting. This allows
2202 * a fixed-link to start with the correct parameters, and also
2203 * ensures that we set the appropriate advertisement for Serdes links.
2204 *
2205 * Restart autonegotiation if using 802.3z to ensure that the link
2206 * parameters are properly negotiated. This is necessary for DSA
2207 * switches using 802.3z negotiation to ensure they see our modes.
2208 */
2209 phylink_mac_initial_config(pl, true);
2210
2211 pl->pcs_state = PCS_STATE_STARTED;
2212
2213 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2214
2215 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2216 int irq = gpiod_to_irq(pl->link_gpio);
2217
2218 if (irq > 0) {
2219 if (!request_irq(irq, phylink_link_handler,
2220 IRQF_TRIGGER_RISING |
2221 IRQF_TRIGGER_FALLING,
2222 "netdev link", pl))
2223 pl->link_irq = irq;
2224 else
2225 irq = 0;
2226 }
2227 if (irq <= 0)
2228 poll = true;
2229 }
2230
2231 if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2232 poll |= pl->config->poll_fixed_state;
2233
2234 if (poll)
2235 mod_timer(&pl->link_poll, jiffies + HZ);
2236 if (pl->phydev)
2237 phy_start(pl->phydev);
2238 if (pl->sfp_bus)
2239 sfp_upstream_start(pl->sfp_bus);
2240 }
2241 EXPORT_SYMBOL_GPL(phylink_start);
2242
2243 /**
2244 * phylink_stop() - stop a phylink instance
2245 * @pl: a pointer to a &struct phylink returned from phylink_create()
2246 *
2247 * Stop the phylink instance specified by @pl. This should be called from the
2248 * network device driver's &struct net_device_ops ndo_stop() method. The
2249 * network device's carrier state should not be changed prior to calling this
2250 * function.
2251 *
2252 * This will synchronously bring down the link if the link is not already
2253 * down (in other words, it will trigger a mac_link_down() method call.)
2254 */
phylink_stop(struct phylink * pl)2255 void phylink_stop(struct phylink *pl)
2256 {
2257 ASSERT_RTNL();
2258
2259 if (pl->sfp_bus)
2260 sfp_upstream_stop(pl->sfp_bus);
2261 if (pl->phydev)
2262 phy_stop(pl->phydev);
2263 del_timer_sync(&pl->link_poll);
2264 if (pl->link_irq) {
2265 free_irq(pl->link_irq, pl);
2266 pl->link_irq = 0;
2267 }
2268
2269 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2270
2271 pl->pcs_state = PCS_STATE_DOWN;
2272
2273 phylink_pcs_disable(pl->pcs);
2274 }
2275 EXPORT_SYMBOL_GPL(phylink_stop);
2276
2277 /**
2278 * phylink_suspend() - handle a network device suspend event
2279 * @pl: a pointer to a &struct phylink returned from phylink_create()
2280 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2281 *
2282 * Handle a network device suspend event. There are several cases:
2283 *
2284 * - If Wake-on-Lan is not active, we can bring down the link between
2285 * the MAC and PHY by calling phylink_stop().
2286 * - If Wake-on-Lan is active, and being handled only by the PHY, we
2287 * can also bring down the link between the MAC and PHY.
2288 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2289 * still needs to receive packets, so we can not bring the link down.
2290 */
phylink_suspend(struct phylink * pl,bool mac_wol)2291 void phylink_suspend(struct phylink *pl, bool mac_wol)
2292 {
2293 ASSERT_RTNL();
2294
2295 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2296 /* Wake-on-Lan enabled, MAC handling */
2297 mutex_lock(&pl->state_mutex);
2298
2299 /* Stop the resolver bringing the link up */
2300 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2301
2302 /* Disable the carrier, to prevent transmit timeouts,
2303 * but one would hope all packets have been sent. This
2304 * also means phylink_resolve() will do nothing.
2305 */
2306 if (pl->netdev)
2307 netif_carrier_off(pl->netdev);
2308 else
2309 pl->old_link_state = false;
2310
2311 /* We do not call mac_link_down() here as we want the
2312 * link to remain up to receive the WoL packets.
2313 */
2314 mutex_unlock(&pl->state_mutex);
2315 } else {
2316 phylink_stop(pl);
2317 }
2318 }
2319 EXPORT_SYMBOL_GPL(phylink_suspend);
2320
2321 /**
2322 * phylink_resume() - handle a network device resume event
2323 * @pl: a pointer to a &struct phylink returned from phylink_create()
2324 *
2325 * Undo the effects of phylink_suspend(), returning the link to an
2326 * operational state.
2327 */
phylink_resume(struct phylink * pl)2328 void phylink_resume(struct phylink *pl)
2329 {
2330 ASSERT_RTNL();
2331
2332 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2333 /* Wake-on-Lan enabled, MAC handling */
2334
2335 /* Call mac_link_down() so we keep the overall state balanced.
2336 * Do this under the state_mutex lock for consistency. This
2337 * will cause a "Link Down" message to be printed during
2338 * resume, which is harmless - the true link state will be
2339 * printed when we run a resolve.
2340 */
2341 mutex_lock(&pl->state_mutex);
2342 phylink_link_down(pl);
2343 mutex_unlock(&pl->state_mutex);
2344
2345 /* Re-apply the link parameters so that all the settings get
2346 * restored to the MAC.
2347 */
2348 phylink_mac_initial_config(pl, true);
2349
2350 /* Re-enable and re-resolve the link parameters */
2351 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2352 } else {
2353 phylink_start(pl);
2354 }
2355 }
2356 EXPORT_SYMBOL_GPL(phylink_resume);
2357
2358 /**
2359 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2360 * @pl: a pointer to a &struct phylink returned from phylink_create()
2361 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2362 *
2363 * Read the wake on lan parameters from the PHY attached to the phylink
2364 * instance specified by @pl. If no PHY is currently attached, report no
2365 * support for wake on lan.
2366 */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2367 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2368 {
2369 ASSERT_RTNL();
2370
2371 wol->supported = 0;
2372 wol->wolopts = 0;
2373
2374 if (pl->phydev)
2375 phy_ethtool_get_wol(pl->phydev, wol);
2376 }
2377 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2378
2379 /**
2380 * phylink_ethtool_set_wol() - set wake on lan parameters
2381 * @pl: a pointer to a &struct phylink returned from phylink_create()
2382 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2383 *
2384 * Set the wake on lan parameters for the PHY attached to the phylink
2385 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2386 * error.
2387 *
2388 * Returns zero on success or negative errno code.
2389 */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2390 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2391 {
2392 int ret = -EOPNOTSUPP;
2393
2394 ASSERT_RTNL();
2395
2396 if (pl->phydev)
2397 ret = phy_ethtool_set_wol(pl->phydev, wol);
2398
2399 return ret;
2400 }
2401 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2402
phylink_sfp_select_interface(struct phylink * pl,const unsigned long * link_modes)2403 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl,
2404 const unsigned long *link_modes)
2405 {
2406 phy_interface_t interface;
2407
2408 interface = sfp_select_interface(pl->sfp_bus, link_modes);
2409 if (interface == PHY_INTERFACE_MODE_NA) {
2410 phylink_err(pl,
2411 "selection of interface failed, advertisement %*pb\n",
2412 __ETHTOOL_LINK_MODE_MASK_NBITS,
2413 link_modes);
2414 return interface;
2415 }
2416
2417 if (!test_bit(interface, pl->config->supported_interfaces)) {
2418 phylink_err(pl,
2419 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n",
2420 phy_modes(interface), interface,
2421 (int)PHY_INTERFACE_MODE_MAX,
2422 pl->config->supported_interfaces);
2423 return PHY_INTERFACE_MODE_NA;
2424 }
2425
2426 return interface;
2427 }
2428
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2429 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2430 {
2431 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2432
2433 linkmode_zero(mask);
2434 phylink_set_port_modes(mask);
2435
2436 linkmode_and(dst, dst, mask);
2437 linkmode_or(dst, dst, b);
2438 }
2439
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2440 static void phylink_get_ksettings(const struct phylink_link_state *state,
2441 struct ethtool_link_ksettings *kset)
2442 {
2443 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2444 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2445 if (kset->base.rate_matching == RATE_MATCH_NONE) {
2446 kset->base.speed = state->speed;
2447 kset->base.duplex = state->duplex;
2448 }
2449 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2450 state->advertising) ?
2451 AUTONEG_ENABLE : AUTONEG_DISABLE;
2452 }
2453
2454 /**
2455 * phylink_ethtool_ksettings_get() - get the current link settings
2456 * @pl: a pointer to a &struct phylink returned from phylink_create()
2457 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2458 *
2459 * Read the current link settings for the phylink instance specified by @pl.
2460 * This will be the link settings read from the MAC, PHY or fixed link
2461 * settings depending on the current negotiation mode.
2462 */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2463 int phylink_ethtool_ksettings_get(struct phylink *pl,
2464 struct ethtool_link_ksettings *kset)
2465 {
2466 struct phylink_link_state link_state;
2467
2468 ASSERT_RTNL();
2469
2470 if (pl->phydev)
2471 phy_ethtool_ksettings_get(pl->phydev, kset);
2472 else
2473 kset->base.port = pl->link_port;
2474
2475 linkmode_copy(kset->link_modes.supported, pl->supported);
2476
2477 switch (pl->cur_link_an_mode) {
2478 case MLO_AN_FIXED:
2479 /* We are using fixed settings. Report these as the
2480 * current link settings - and note that these also
2481 * represent the supported speeds/duplex/pause modes.
2482 */
2483 phylink_get_fixed_state(pl, &link_state);
2484 phylink_get_ksettings(&link_state, kset);
2485 break;
2486
2487 case MLO_AN_INBAND:
2488 /* If there is a phy attached, then use the reported
2489 * settings from the phy with no modification.
2490 */
2491 if (pl->phydev)
2492 break;
2493
2494 phylink_mac_pcs_get_state(pl, &link_state);
2495
2496 /* The MAC is reporting the link results from its own PCS
2497 * layer via in-band status. Report these as the current
2498 * link settings.
2499 */
2500 phylink_get_ksettings(&link_state, kset);
2501 break;
2502 }
2503
2504 return 0;
2505 }
2506 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2507
2508 /**
2509 * phylink_ethtool_ksettings_set() - set the link settings
2510 * @pl: a pointer to a &struct phylink returned from phylink_create()
2511 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2512 */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2513 int phylink_ethtool_ksettings_set(struct phylink *pl,
2514 const struct ethtool_link_ksettings *kset)
2515 {
2516 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2517 struct phylink_link_state config;
2518 const struct phy_setting *s;
2519
2520 ASSERT_RTNL();
2521
2522 if (pl->phydev) {
2523 struct ethtool_link_ksettings phy_kset = *kset;
2524
2525 linkmode_and(phy_kset.link_modes.advertising,
2526 phy_kset.link_modes.advertising,
2527 pl->supported);
2528
2529 /* We can rely on phylib for this update; we also do not need
2530 * to update the pl->link_config settings:
2531 * - the configuration returned via ksettings_get() will come
2532 * from phylib whenever a PHY is present.
2533 * - link_config.interface will be updated by the PHY calling
2534 * back via phylink_phy_change() and a subsequent resolve.
2535 * - initial link configuration for PHY mode comes from the
2536 * last phy state updated via phylink_phy_change().
2537 * - other configuration changes (e.g. pause modes) are
2538 * performed directly via phylib.
2539 * - if in in-band mode with a PHY, the link configuration
2540 * is passed on the link from the PHY, and all of
2541 * link_config.{speed,duplex,an_enabled,pause} are not used.
2542 * - the only possible use would be link_config.advertising
2543 * pause modes when in 1000base-X mode with a PHY, but in
2544 * the presence of a PHY, this should not be changed as that
2545 * should be determined from the media side advertisement.
2546 */
2547 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2548 }
2549
2550 config = pl->link_config;
2551 /* Mask out unsupported advertisements */
2552 linkmode_and(config.advertising, kset->link_modes.advertising,
2553 pl->supported);
2554
2555 /* FIXME: should we reject autoneg if phy/mac does not support it? */
2556 switch (kset->base.autoneg) {
2557 case AUTONEG_DISABLE:
2558 /* Autonegotiation disabled, select a suitable speed and
2559 * duplex.
2560 */
2561 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2562 pl->supported, false);
2563 if (!s)
2564 return -EINVAL;
2565
2566 /* If we have a fixed link, refuse to change link parameters.
2567 * If the link parameters match, accept them but do nothing.
2568 */
2569 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2570 if (s->speed != pl->link_config.speed ||
2571 s->duplex != pl->link_config.duplex)
2572 return -EINVAL;
2573 return 0;
2574 }
2575
2576 config.speed = s->speed;
2577 config.duplex = s->duplex;
2578 break;
2579
2580 case AUTONEG_ENABLE:
2581 /* If we have a fixed link, allow autonegotiation (since that
2582 * is our default case) but do not allow the advertisement to
2583 * be changed. If the advertisement matches, simply return.
2584 */
2585 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2586 if (!linkmode_equal(config.advertising,
2587 pl->link_config.advertising))
2588 return -EINVAL;
2589 return 0;
2590 }
2591
2592 config.speed = SPEED_UNKNOWN;
2593 config.duplex = DUPLEX_UNKNOWN;
2594 break;
2595
2596 default:
2597 return -EINVAL;
2598 }
2599
2600 /* We have ruled out the case with a PHY attached, and the
2601 * fixed-link cases. All that is left are in-band links.
2602 */
2603 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2604 kset->base.autoneg == AUTONEG_ENABLE);
2605
2606 /* If this link is with an SFP, ensure that changes to advertised modes
2607 * also cause the associated interface to be selected such that the
2608 * link can be configured correctly.
2609 */
2610 if (pl->sfp_bus) {
2611 config.interface = phylink_sfp_select_interface(pl,
2612 config.advertising);
2613 if (config.interface == PHY_INTERFACE_MODE_NA)
2614 return -EINVAL;
2615
2616 /* Revalidate with the selected interface */
2617 linkmode_copy(support, pl->supported);
2618 if (phylink_validate(pl, support, &config)) {
2619 phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2620 phylink_an_mode_str(pl->cur_link_an_mode),
2621 phy_modes(config.interface),
2622 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2623 return -EINVAL;
2624 }
2625 } else {
2626 /* Validate without changing the current supported mask. */
2627 linkmode_copy(support, pl->supported);
2628 if (phylink_validate(pl, support, &config))
2629 return -EINVAL;
2630 }
2631
2632 /* If autonegotiation is enabled, we must have an advertisement */
2633 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2634 config.advertising) &&
2635 phylink_is_empty_linkmode(config.advertising))
2636 return -EINVAL;
2637
2638 mutex_lock(&pl->state_mutex);
2639 pl->link_config.speed = config.speed;
2640 pl->link_config.duplex = config.duplex;
2641
2642 if (pl->link_config.interface != config.interface) {
2643 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2644 /* We need to force the link down, then change the interface */
2645 if (pl->old_link_state) {
2646 phylink_link_down(pl);
2647 pl->old_link_state = false;
2648 }
2649 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2650 &pl->phylink_disable_state))
2651 phylink_major_config(pl, false, &config);
2652 pl->link_config.interface = config.interface;
2653 linkmode_copy(pl->link_config.advertising, config.advertising);
2654 } else if (!linkmode_equal(pl->link_config.advertising,
2655 config.advertising)) {
2656 linkmode_copy(pl->link_config.advertising, config.advertising);
2657 phylink_change_inband_advert(pl);
2658 }
2659 mutex_unlock(&pl->state_mutex);
2660
2661 return 0;
2662 }
2663 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2664
2665 /**
2666 * phylink_ethtool_nway_reset() - restart negotiation
2667 * @pl: a pointer to a &struct phylink returned from phylink_create()
2668 *
2669 * Restart negotiation for the phylink instance specified by @pl. This will
2670 * cause any attached phy to restart negotiation with the link partner, and
2671 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2672 * negotiation.
2673 *
2674 * Returns zero on success, or negative error code.
2675 */
phylink_ethtool_nway_reset(struct phylink * pl)2676 int phylink_ethtool_nway_reset(struct phylink *pl)
2677 {
2678 int ret = 0;
2679
2680 ASSERT_RTNL();
2681
2682 if (pl->phydev)
2683 ret = phy_restart_aneg(pl->phydev);
2684 phylink_pcs_an_restart(pl);
2685
2686 return ret;
2687 }
2688 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2689
2690 /**
2691 * phylink_ethtool_get_pauseparam() - get the current pause parameters
2692 * @pl: a pointer to a &struct phylink returned from phylink_create()
2693 * @pause: a pointer to a &struct ethtool_pauseparam
2694 */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2695 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2696 struct ethtool_pauseparam *pause)
2697 {
2698 ASSERT_RTNL();
2699
2700 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2701 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2702 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2703 }
2704 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2705
2706 /**
2707 * phylink_ethtool_set_pauseparam() - set the current pause parameters
2708 * @pl: a pointer to a &struct phylink returned from phylink_create()
2709 * @pause: a pointer to a &struct ethtool_pauseparam
2710 */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2711 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2712 struct ethtool_pauseparam *pause)
2713 {
2714 struct phylink_link_state *config = &pl->link_config;
2715 bool manual_changed;
2716 int pause_state;
2717
2718 ASSERT_RTNL();
2719
2720 if (pl->cur_link_an_mode == MLO_AN_FIXED)
2721 return -EOPNOTSUPP;
2722
2723 if (!phylink_test(pl->supported, Pause) &&
2724 !phylink_test(pl->supported, Asym_Pause))
2725 return -EOPNOTSUPP;
2726
2727 if (!phylink_test(pl->supported, Asym_Pause) &&
2728 pause->rx_pause != pause->tx_pause)
2729 return -EINVAL;
2730
2731 pause_state = 0;
2732 if (pause->autoneg)
2733 pause_state |= MLO_PAUSE_AN;
2734 if (pause->rx_pause)
2735 pause_state |= MLO_PAUSE_RX;
2736 if (pause->tx_pause)
2737 pause_state |= MLO_PAUSE_TX;
2738
2739 mutex_lock(&pl->state_mutex);
2740 /*
2741 * See the comments for linkmode_set_pause(), wrt the deficiencies
2742 * with the current implementation. A solution to this issue would
2743 * be:
2744 * ethtool Local device
2745 * rx tx Pause AsymDir
2746 * 0 0 0 0
2747 * 1 0 1 1
2748 * 0 1 0 1
2749 * 1 1 1 1
2750 * and then use the ethtool rx/tx enablement status to mask the
2751 * rx/tx pause resolution.
2752 */
2753 linkmode_set_pause(config->advertising, pause->tx_pause,
2754 pause->rx_pause);
2755
2756 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2757 (!(pause_state & MLO_PAUSE_AN) &&
2758 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2759
2760 config->pause = pause_state;
2761
2762 /* Update our in-band advertisement, triggering a renegotiation if
2763 * the advertisement changed.
2764 */
2765 if (!pl->phydev)
2766 phylink_change_inband_advert(pl);
2767
2768 mutex_unlock(&pl->state_mutex);
2769
2770 /* If we have a PHY, a change of the pause frame advertisement will
2771 * cause phylib to renegotiate (if AN is enabled) which will in turn
2772 * call our phylink_phy_change() and trigger a resolve. Note that
2773 * we can't hold our state mutex while calling phy_set_asym_pause().
2774 */
2775 if (pl->phydev)
2776 phy_set_asym_pause(pl->phydev, pause->rx_pause,
2777 pause->tx_pause);
2778
2779 /* If the manual pause settings changed, make sure we trigger a
2780 * resolve to update their state; we can not guarantee that the
2781 * link will cycle.
2782 */
2783 if (manual_changed) {
2784 pl->link_failed = true;
2785 phylink_run_resolve(pl);
2786 }
2787
2788 return 0;
2789 }
2790 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2791
2792 /**
2793 * phylink_get_eee_err() - read the energy efficient ethernet error
2794 * counter
2795 * @pl: a pointer to a &struct phylink returned from phylink_create().
2796 *
2797 * Read the Energy Efficient Ethernet error counter from the PHY associated
2798 * with the phylink instance specified by @pl.
2799 *
2800 * Returns positive error counter value, or negative error code.
2801 */
phylink_get_eee_err(struct phylink * pl)2802 int phylink_get_eee_err(struct phylink *pl)
2803 {
2804 int ret = 0;
2805
2806 ASSERT_RTNL();
2807
2808 if (pl->phydev)
2809 ret = phy_get_eee_err(pl->phydev);
2810
2811 return ret;
2812 }
2813 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2814
2815 /**
2816 * phylink_init_eee() - init and check the EEE features
2817 * @pl: a pointer to a &struct phylink returned from phylink_create()
2818 * @clk_stop_enable: allow PHY to stop receive clock
2819 *
2820 * Must be called either with RTNL held or within mac_link_up()
2821 */
phylink_init_eee(struct phylink * pl,bool clk_stop_enable)2822 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2823 {
2824 int ret = -EOPNOTSUPP;
2825
2826 if (pl->phydev)
2827 ret = phy_init_eee(pl->phydev, clk_stop_enable);
2828
2829 return ret;
2830 }
2831 EXPORT_SYMBOL_GPL(phylink_init_eee);
2832
2833 /**
2834 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2835 * @pl: a pointer to a &struct phylink returned from phylink_create()
2836 * @eee: a pointer to a &struct ethtool_keee for the read parameters
2837 */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_keee * eee)2838 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
2839 {
2840 int ret = -EOPNOTSUPP;
2841
2842 ASSERT_RTNL();
2843
2844 if (pl->phydev)
2845 ret = phy_ethtool_get_eee(pl->phydev, eee);
2846
2847 return ret;
2848 }
2849 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2850
2851 /**
2852 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2853 * @pl: a pointer to a &struct phylink returned from phylink_create()
2854 * @eee: a pointer to a &struct ethtool_keee for the desired parameters
2855 */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_keee * eee)2856 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
2857 {
2858 int ret = -EOPNOTSUPP;
2859
2860 ASSERT_RTNL();
2861
2862 if (pl->phydev)
2863 ret = phy_ethtool_set_eee(pl->phydev, eee);
2864
2865 return ret;
2866 }
2867 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2868
2869 /* This emulates MII registers for a fixed-mode phy operating as per the
2870 * passed in state. "aneg" defines if we report negotiation is possible.
2871 *
2872 * FIXME: should deal with negotiation state too.
2873 */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)2874 static int phylink_mii_emul_read(unsigned int reg,
2875 struct phylink_link_state *state)
2876 {
2877 struct fixed_phy_status fs;
2878 unsigned long *lpa = state->lp_advertising;
2879 int val;
2880
2881 fs.link = state->link;
2882 fs.speed = state->speed;
2883 fs.duplex = state->duplex;
2884 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2885 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2886
2887 val = swphy_read_reg(reg, &fs);
2888 if (reg == MII_BMSR) {
2889 if (!state->an_complete)
2890 val &= ~BMSR_ANEGCOMPLETE;
2891 }
2892 return val;
2893 }
2894
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2895 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2896 unsigned int reg)
2897 {
2898 struct phy_device *phydev = pl->phydev;
2899 int prtad, devad;
2900
2901 if (mdio_phy_id_is_c45(phy_id)) {
2902 prtad = mdio_phy_id_prtad(phy_id);
2903 devad = mdio_phy_id_devad(phy_id);
2904 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2905 reg);
2906 }
2907
2908 if (phydev->is_c45) {
2909 switch (reg) {
2910 case MII_BMCR:
2911 case MII_BMSR:
2912 case MII_PHYSID1:
2913 case MII_PHYSID2:
2914 devad = __ffs(phydev->c45_ids.mmds_present);
2915 break;
2916 case MII_ADVERTISE:
2917 case MII_LPA:
2918 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2919 return -EINVAL;
2920 devad = MDIO_MMD_AN;
2921 if (reg == MII_ADVERTISE)
2922 reg = MDIO_AN_ADVERTISE;
2923 else
2924 reg = MDIO_AN_LPA;
2925 break;
2926 default:
2927 return -EINVAL;
2928 }
2929 prtad = phy_id;
2930 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2931 reg);
2932 }
2933
2934 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2935 }
2936
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2937 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2938 unsigned int reg, unsigned int val)
2939 {
2940 struct phy_device *phydev = pl->phydev;
2941 int prtad, devad;
2942
2943 if (mdio_phy_id_is_c45(phy_id)) {
2944 prtad = mdio_phy_id_prtad(phy_id);
2945 devad = mdio_phy_id_devad(phy_id);
2946 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2947 reg, val);
2948 }
2949
2950 if (phydev->is_c45) {
2951 switch (reg) {
2952 case MII_BMCR:
2953 case MII_BMSR:
2954 case MII_PHYSID1:
2955 case MII_PHYSID2:
2956 devad = __ffs(phydev->c45_ids.mmds_present);
2957 break;
2958 case MII_ADVERTISE:
2959 case MII_LPA:
2960 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2961 return -EINVAL;
2962 devad = MDIO_MMD_AN;
2963 if (reg == MII_ADVERTISE)
2964 reg = MDIO_AN_ADVERTISE;
2965 else
2966 reg = MDIO_AN_LPA;
2967 break;
2968 default:
2969 return -EINVAL;
2970 }
2971 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2972 reg, val);
2973 }
2974
2975 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2976 }
2977
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2978 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2979 unsigned int reg)
2980 {
2981 struct phylink_link_state state;
2982 int val = 0xffff;
2983
2984 switch (pl->cur_link_an_mode) {
2985 case MLO_AN_FIXED:
2986 if (phy_id == 0) {
2987 phylink_get_fixed_state(pl, &state);
2988 val = phylink_mii_emul_read(reg, &state);
2989 }
2990 break;
2991
2992 case MLO_AN_PHY:
2993 return -EOPNOTSUPP;
2994
2995 case MLO_AN_INBAND:
2996 if (phy_id == 0) {
2997 phylink_mac_pcs_get_state(pl, &state);
2998 val = phylink_mii_emul_read(reg, &state);
2999 }
3000 break;
3001 }
3002
3003 return val & 0xffff;
3004 }
3005
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3006 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3007 unsigned int reg, unsigned int val)
3008 {
3009 switch (pl->cur_link_an_mode) {
3010 case MLO_AN_FIXED:
3011 break;
3012
3013 case MLO_AN_PHY:
3014 return -EOPNOTSUPP;
3015
3016 case MLO_AN_INBAND:
3017 break;
3018 }
3019
3020 return 0;
3021 }
3022
3023 /**
3024 * phylink_mii_ioctl() - generic mii ioctl interface
3025 * @pl: a pointer to a &struct phylink returned from phylink_create()
3026 * @ifr: a pointer to a &struct ifreq for socket ioctls
3027 * @cmd: ioctl cmd to execute
3028 *
3029 * Perform the specified MII ioctl on the PHY attached to the phylink instance
3030 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3031 *
3032 * Returns: zero on success or negative error code.
3033 *
3034 * %SIOCGMIIPHY:
3035 * read register from the current PHY.
3036 * %SIOCGMIIREG:
3037 * read register from the specified PHY.
3038 * %SIOCSMIIREG:
3039 * set a register on the specified PHY.
3040 */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)3041 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3042 {
3043 struct mii_ioctl_data *mii = if_mii(ifr);
3044 int ret;
3045
3046 ASSERT_RTNL();
3047
3048 if (pl->phydev) {
3049 /* PHYs only exist for MLO_AN_PHY and SGMII */
3050 switch (cmd) {
3051 case SIOCGMIIPHY:
3052 mii->phy_id = pl->phydev->mdio.addr;
3053 fallthrough;
3054
3055 case SIOCGMIIREG:
3056 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
3057 if (ret >= 0) {
3058 mii->val_out = ret;
3059 ret = 0;
3060 }
3061 break;
3062
3063 case SIOCSMIIREG:
3064 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
3065 mii->val_in);
3066 break;
3067
3068 default:
3069 ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3070 break;
3071 }
3072 } else {
3073 switch (cmd) {
3074 case SIOCGMIIPHY:
3075 mii->phy_id = 0;
3076 fallthrough;
3077
3078 case SIOCGMIIREG:
3079 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3080 if (ret >= 0) {
3081 mii->val_out = ret;
3082 ret = 0;
3083 }
3084 break;
3085
3086 case SIOCSMIIREG:
3087 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3088 mii->val_in);
3089 break;
3090
3091 default:
3092 ret = -EOPNOTSUPP;
3093 break;
3094 }
3095 }
3096
3097 return ret;
3098 }
3099 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3100
3101 /**
3102 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3103 * link partners
3104 * @pl: a pointer to a &struct phylink returned from phylink_create()
3105 * @sync: perform action synchronously
3106 *
3107 * If we have a PHY that is not part of a SFP module, then set the speed
3108 * as described in the phy_speed_down() function. Please see this function
3109 * for a description of the @sync parameter.
3110 *
3111 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3112 */
phylink_speed_down(struct phylink * pl,bool sync)3113 int phylink_speed_down(struct phylink *pl, bool sync)
3114 {
3115 int ret = 0;
3116
3117 ASSERT_RTNL();
3118
3119 if (!pl->sfp_bus && pl->phydev)
3120 ret = phy_speed_down(pl->phydev, sync);
3121
3122 return ret;
3123 }
3124 EXPORT_SYMBOL_GPL(phylink_speed_down);
3125
3126 /**
3127 * phylink_speed_up() - restore the advertised speeds prior to the call to
3128 * phylink_speed_down()
3129 * @pl: a pointer to a &struct phylink returned from phylink_create()
3130 *
3131 * If we have a PHY that is not part of a SFP module, then restore the
3132 * PHY speeds as per phy_speed_up().
3133 *
3134 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3135 */
phylink_speed_up(struct phylink * pl)3136 int phylink_speed_up(struct phylink *pl)
3137 {
3138 int ret = 0;
3139
3140 ASSERT_RTNL();
3141
3142 if (!pl->sfp_bus && pl->phydev)
3143 ret = phy_speed_up(pl->phydev);
3144
3145 return ret;
3146 }
3147 EXPORT_SYMBOL_GPL(phylink_speed_up);
3148
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)3149 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3150 {
3151 struct phylink *pl = upstream;
3152
3153 pl->netdev->sfp_bus = bus;
3154 }
3155
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)3156 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3157 {
3158 struct phylink *pl = upstream;
3159
3160 pl->netdev->sfp_bus = NULL;
3161 }
3162
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)3163 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3164 const unsigned long *intf)
3165 {
3166 phy_interface_t interface;
3167 size_t i;
3168
3169 interface = PHY_INTERFACE_MODE_NA;
3170 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3171 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3172 interface = phylink_sfp_interface_preference[i];
3173 break;
3174 }
3175
3176 return interface;
3177 }
3178
phylink_sfp_set_config(struct phylink * pl,u8 mode,unsigned long * supported,struct phylink_link_state * state)3179 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
3180 unsigned long *supported,
3181 struct phylink_link_state *state)
3182 {
3183 bool changed = false;
3184
3185 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3186 phylink_an_mode_str(mode), phy_modes(state->interface),
3187 __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3188
3189 if (!linkmode_equal(pl->supported, supported)) {
3190 linkmode_copy(pl->supported, supported);
3191 changed = true;
3192 }
3193
3194 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3195 linkmode_copy(pl->link_config.advertising, state->advertising);
3196 changed = true;
3197 }
3198
3199 if (pl->cur_link_an_mode != mode ||
3200 pl->link_config.interface != state->interface) {
3201 pl->cur_link_an_mode = mode;
3202 pl->link_config.interface = state->interface;
3203
3204 changed = true;
3205
3206 phylink_info(pl, "switched to %s/%s link mode\n",
3207 phylink_an_mode_str(mode),
3208 phy_modes(state->interface));
3209 }
3210
3211 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3212 &pl->phylink_disable_state))
3213 phylink_mac_initial_config(pl, false);
3214 }
3215
phylink_sfp_config_phy(struct phylink * pl,u8 mode,struct phy_device * phy)3216 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
3217 struct phy_device *phy)
3218 {
3219 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3220 struct phylink_link_state config;
3221 int ret;
3222
3223 linkmode_copy(support, phy->supported);
3224
3225 memset(&config, 0, sizeof(config));
3226 linkmode_copy(config.advertising, phy->advertising);
3227 config.interface = PHY_INTERFACE_MODE_NA;
3228 config.speed = SPEED_UNKNOWN;
3229 config.duplex = DUPLEX_UNKNOWN;
3230 config.pause = MLO_PAUSE_AN;
3231
3232 /* Ignore errors if we're expecting a PHY to attach later */
3233 ret = phylink_validate(pl, support, &config);
3234 if (ret) {
3235 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3236 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3237 ERR_PTR(ret));
3238 return ret;
3239 }
3240
3241 config.interface = phylink_sfp_select_interface(pl, config.advertising);
3242 if (config.interface == PHY_INTERFACE_MODE_NA)
3243 return -EINVAL;
3244
3245 /* Attach the PHY so that the PHY is present when we do the major
3246 * configuration step.
3247 */
3248 ret = phylink_attach_phy(pl, phy, config.interface);
3249 if (ret < 0)
3250 return ret;
3251
3252 /* This will validate the configuration for us. */
3253 ret = phylink_bringup_phy(pl, phy, config.interface);
3254 if (ret < 0) {
3255 phy_detach(phy);
3256 return ret;
3257 }
3258
3259 pl->link_port = pl->sfp_port;
3260
3261 phylink_sfp_set_config(pl, mode, support, &config);
3262
3263 return 0;
3264 }
3265
phylink_sfp_config_optical(struct phylink * pl)3266 static int phylink_sfp_config_optical(struct phylink *pl)
3267 {
3268 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3269 DECLARE_PHY_INTERFACE_MASK(interfaces);
3270 struct phylink_link_state config;
3271 phy_interface_t interface;
3272 int ret;
3273
3274 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3275 (int)PHY_INTERFACE_MODE_MAX,
3276 pl->config->supported_interfaces,
3277 (int)PHY_INTERFACE_MODE_MAX,
3278 pl->sfp_interfaces);
3279
3280 /* Find the union of the supported interfaces by the PCS/MAC and
3281 * the SFP module.
3282 */
3283 phy_interface_and(interfaces, pl->config->supported_interfaces,
3284 pl->sfp_interfaces);
3285 if (phy_interface_empty(interfaces)) {
3286 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3287 return -EINVAL;
3288 }
3289
3290 memset(&config, 0, sizeof(config));
3291 linkmode_copy(support, pl->sfp_support);
3292 linkmode_copy(config.advertising, pl->sfp_support);
3293 config.speed = SPEED_UNKNOWN;
3294 config.duplex = DUPLEX_UNKNOWN;
3295 config.pause = MLO_PAUSE_AN;
3296
3297 /* For all the interfaces that are supported, reduce the sfp_support
3298 * mask to only those link modes that can be supported.
3299 */
3300 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3301 interfaces);
3302 if (ret) {
3303 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3304 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3305 return ret;
3306 }
3307
3308 interface = phylink_choose_sfp_interface(pl, interfaces);
3309 if (interface == PHY_INTERFACE_MODE_NA) {
3310 phylink_err(pl, "failed to select SFP interface\n");
3311 return -EINVAL;
3312 }
3313
3314 phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3315 phy_modes(interface));
3316
3317 config.interface = interface;
3318
3319 /* Ignore errors if we're expecting a PHY to attach later */
3320 ret = phylink_validate(pl, support, &config);
3321 if (ret) {
3322 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3323 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3324 ERR_PTR(ret));
3325 return ret;
3326 }
3327
3328 pl->link_port = pl->sfp_port;
3329
3330 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3331
3332 return 0;
3333 }
3334
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3335 static int phylink_sfp_module_insert(void *upstream,
3336 const struct sfp_eeprom_id *id)
3337 {
3338 struct phylink *pl = upstream;
3339
3340 ASSERT_RTNL();
3341
3342 linkmode_zero(pl->sfp_support);
3343 phy_interface_zero(pl->sfp_interfaces);
3344 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3345 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3346
3347 /* If this module may have a PHY connecting later, defer until later */
3348 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3349 if (pl->sfp_may_have_phy)
3350 return 0;
3351
3352 return phylink_sfp_config_optical(pl);
3353 }
3354
phylink_sfp_module_start(void * upstream)3355 static int phylink_sfp_module_start(void *upstream)
3356 {
3357 struct phylink *pl = upstream;
3358
3359 /* If this SFP module has a PHY, start the PHY now. */
3360 if (pl->phydev) {
3361 phy_start(pl->phydev);
3362 return 0;
3363 }
3364
3365 /* If the module may have a PHY but we didn't detect one we
3366 * need to configure the MAC here.
3367 */
3368 if (!pl->sfp_may_have_phy)
3369 return 0;
3370
3371 return phylink_sfp_config_optical(pl);
3372 }
3373
phylink_sfp_module_stop(void * upstream)3374 static void phylink_sfp_module_stop(void *upstream)
3375 {
3376 struct phylink *pl = upstream;
3377
3378 /* If this SFP module has a PHY, stop it. */
3379 if (pl->phydev)
3380 phy_stop(pl->phydev);
3381 }
3382
phylink_sfp_link_down(void * upstream)3383 static void phylink_sfp_link_down(void *upstream)
3384 {
3385 struct phylink *pl = upstream;
3386
3387 ASSERT_RTNL();
3388
3389 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3390 }
3391
phylink_sfp_link_up(void * upstream)3392 static void phylink_sfp_link_up(void *upstream)
3393 {
3394 struct phylink *pl = upstream;
3395
3396 ASSERT_RTNL();
3397
3398 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3399 }
3400
3401 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3402 * or 802.3z control word, so inband will not work.
3403 */
phylink_phy_no_inband(struct phy_device * phy)3404 static bool phylink_phy_no_inband(struct phy_device *phy)
3405 {
3406 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3407 0xae025150, 0xfffffff0);
3408 }
3409
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3410 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3411 {
3412 struct phylink *pl = upstream;
3413 u8 mode;
3414
3415 /*
3416 * This is the new way of dealing with flow control for PHYs,
3417 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3418 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3419 * using our validate call to the MAC, we rely upon the MAC
3420 * clearing the bits from both supported and advertising fields.
3421 */
3422 phy_support_asym_pause(phy);
3423
3424 if (phylink_phy_no_inband(phy))
3425 mode = MLO_AN_PHY;
3426 else
3427 mode = MLO_AN_INBAND;
3428
3429 /* Set the PHY's host supported interfaces */
3430 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3431 pl->config->supported_interfaces);
3432
3433 /* Do the initial configuration */
3434 return phylink_sfp_config_phy(pl, mode, phy);
3435 }
3436
phylink_sfp_disconnect_phy(void * upstream,struct phy_device * phydev)3437 static void phylink_sfp_disconnect_phy(void *upstream,
3438 struct phy_device *phydev)
3439 {
3440 phylink_disconnect_phy(upstream);
3441 }
3442
3443 static const struct sfp_upstream_ops sfp_phylink_ops = {
3444 .attach = phylink_sfp_attach,
3445 .detach = phylink_sfp_detach,
3446 .module_insert = phylink_sfp_module_insert,
3447 .module_start = phylink_sfp_module_start,
3448 .module_stop = phylink_sfp_module_stop,
3449 .link_up = phylink_sfp_link_up,
3450 .link_down = phylink_sfp_link_down,
3451 .connect_phy = phylink_sfp_connect_phy,
3452 .disconnect_phy = phylink_sfp_disconnect_phy,
3453 };
3454
3455 /* Helpers for MAC drivers */
3456
3457 static struct {
3458 int bit;
3459 int speed;
3460 } phylink_c73_priority_resolution[] = {
3461 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3462 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3463 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3464 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3465 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3466 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3467 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3468 /* 5GBASE-KR not supported */
3469 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3470 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3471 };
3472
phylink_resolve_c73(struct phylink_link_state * state)3473 void phylink_resolve_c73(struct phylink_link_state *state)
3474 {
3475 int i;
3476
3477 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3478 int bit = phylink_c73_priority_resolution[i].bit;
3479 if (linkmode_test_bit(bit, state->advertising) &&
3480 linkmode_test_bit(bit, state->lp_advertising))
3481 break;
3482 }
3483
3484 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3485 state->speed = phylink_c73_priority_resolution[i].speed;
3486 state->duplex = DUPLEX_FULL;
3487 } else {
3488 /* negotiation failure */
3489 state->link = false;
3490 }
3491
3492 phylink_resolve_an_pause(state);
3493 }
3494 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3495
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3496 static void phylink_decode_c37_word(struct phylink_link_state *state,
3497 uint16_t config_reg, int speed)
3498 {
3499 int fd_bit;
3500
3501 if (speed == SPEED_2500)
3502 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3503 else
3504 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3505
3506 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3507
3508 if (linkmode_test_bit(fd_bit, state->advertising) &&
3509 linkmode_test_bit(fd_bit, state->lp_advertising)) {
3510 state->speed = speed;
3511 state->duplex = DUPLEX_FULL;
3512 } else {
3513 /* negotiation failure */
3514 state->link = false;
3515 }
3516
3517 phylink_resolve_an_pause(state);
3518 }
3519
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3520 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3521 uint16_t config_reg)
3522 {
3523 if (!(config_reg & LPA_SGMII_LINK)) {
3524 state->link = false;
3525 return;
3526 }
3527
3528 switch (config_reg & LPA_SGMII_SPD_MASK) {
3529 case LPA_SGMII_10:
3530 state->speed = SPEED_10;
3531 break;
3532 case LPA_SGMII_100:
3533 state->speed = SPEED_100;
3534 break;
3535 case LPA_SGMII_1000:
3536 state->speed = SPEED_1000;
3537 break;
3538 default:
3539 state->link = false;
3540 return;
3541 }
3542 if (config_reg & LPA_SGMII_FULL_DUPLEX)
3543 state->duplex = DUPLEX_FULL;
3544 else
3545 state->duplex = DUPLEX_HALF;
3546 }
3547
3548 /**
3549 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3550 * @state: a pointer to a struct phylink_link_state.
3551 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3552 *
3553 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3554 * code word. Decode the USXGMII code word and populate the corresponding fields
3555 * (speed, duplex) into the phylink_link_state structure.
3556 */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3557 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3558 uint16_t lpa)
3559 {
3560 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3561 case MDIO_USXGMII_10:
3562 state->speed = SPEED_10;
3563 break;
3564 case MDIO_USXGMII_100:
3565 state->speed = SPEED_100;
3566 break;
3567 case MDIO_USXGMII_1000:
3568 state->speed = SPEED_1000;
3569 break;
3570 case MDIO_USXGMII_2500:
3571 state->speed = SPEED_2500;
3572 break;
3573 case MDIO_USXGMII_5000:
3574 state->speed = SPEED_5000;
3575 break;
3576 case MDIO_USXGMII_10G:
3577 state->speed = SPEED_10000;
3578 break;
3579 default:
3580 state->link = false;
3581 return;
3582 }
3583
3584 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3585 state->duplex = DUPLEX_FULL;
3586 else
3587 state->duplex = DUPLEX_HALF;
3588 }
3589 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3590
3591 /**
3592 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3593 * @state: a pointer to a struct phylink_link_state.
3594 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3595 *
3596 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3597 * code word. Decode the USGMII code word and populate the corresponding fields
3598 * (speed, duplex) into the phylink_link_state structure. The structure for this
3599 * word is the same as the USXGMII word, except it only supports speeds up to
3600 * 1Gbps.
3601 */
phylink_decode_usgmii_word(struct phylink_link_state * state,uint16_t lpa)3602 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3603 uint16_t lpa)
3604 {
3605 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3606 case MDIO_USXGMII_10:
3607 state->speed = SPEED_10;
3608 break;
3609 case MDIO_USXGMII_100:
3610 state->speed = SPEED_100;
3611 break;
3612 case MDIO_USXGMII_1000:
3613 state->speed = SPEED_1000;
3614 break;
3615 default:
3616 state->link = false;
3617 return;
3618 }
3619
3620 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3621 state->duplex = DUPLEX_FULL;
3622 else
3623 state->duplex = DUPLEX_HALF;
3624 }
3625
3626 /**
3627 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3628 * @state: a pointer to a &struct phylink_link_state.
3629 * @bmsr: The value of the %MII_BMSR register
3630 * @lpa: The value of the %MII_LPA register
3631 *
3632 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3633 * clause 37 negotiation and/or SGMII control.
3634 *
3635 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3636 * the phylink @state structure. This is suitable to be used for implementing
3637 * the pcs_get_state() member of the struct phylink_pcs_ops structure if
3638 * accessing @bmsr and @lpa cannot be done with MDIO directly.
3639 */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,u16 bmsr,u16 lpa)3640 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3641 u16 bmsr, u16 lpa)
3642 {
3643 state->link = !!(bmsr & BMSR_LSTATUS);
3644 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3645 /* If there is no link or autonegotiation is disabled, the LP advertisement
3646 * data is not meaningful, so don't go any further.
3647 */
3648 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3649 state->advertising))
3650 return;
3651
3652 switch (state->interface) {
3653 case PHY_INTERFACE_MODE_1000BASEX:
3654 phylink_decode_c37_word(state, lpa, SPEED_1000);
3655 break;
3656
3657 case PHY_INTERFACE_MODE_2500BASEX:
3658 phylink_decode_c37_word(state, lpa, SPEED_2500);
3659 break;
3660
3661 case PHY_INTERFACE_MODE_SGMII:
3662 case PHY_INTERFACE_MODE_QSGMII:
3663 phylink_decode_sgmii_word(state, lpa);
3664 break;
3665 case PHY_INTERFACE_MODE_QUSGMII:
3666 phylink_decode_usgmii_word(state, lpa);
3667 break;
3668
3669 default:
3670 state->link = false;
3671 break;
3672 }
3673 }
3674 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3675
3676 /**
3677 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3678 * @pcs: a pointer to a &struct mdio_device.
3679 * @state: a pointer to a &struct phylink_link_state.
3680 *
3681 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3682 * clause 37 negotiation and/or SGMII control.
3683 *
3684 * Read the MAC PCS state from the MII device configured in @config and
3685 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3686 * the phylink @state structure. This is suitable to be directly plugged
3687 * into the pcs_get_state() member of the struct phylink_pcs_ops
3688 * structure.
3689 */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3690 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3691 struct phylink_link_state *state)
3692 {
3693 int bmsr, lpa;
3694
3695 bmsr = mdiodev_read(pcs, MII_BMSR);
3696 lpa = mdiodev_read(pcs, MII_LPA);
3697 if (bmsr < 0 || lpa < 0) {
3698 state->link = false;
3699 return;
3700 }
3701
3702 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3703 }
3704 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3705
3706 /**
3707 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3708 * advertisement
3709 * @interface: the PHY interface mode being configured
3710 * @advertising: the ethtool advertisement mask
3711 *
3712 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3713 * clause 37 negotiation and/or SGMII control.
3714 *
3715 * Encode the clause 37 PCS advertisement as specified by @interface and
3716 * @advertising.
3717 *
3718 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3719 */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)3720 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3721 const unsigned long *advertising)
3722 {
3723 u16 adv;
3724
3725 switch (interface) {
3726 case PHY_INTERFACE_MODE_1000BASEX:
3727 case PHY_INTERFACE_MODE_2500BASEX:
3728 adv = ADVERTISE_1000XFULL;
3729 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3730 advertising))
3731 adv |= ADVERTISE_1000XPAUSE;
3732 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3733 advertising))
3734 adv |= ADVERTISE_1000XPSE_ASYM;
3735 return adv;
3736 case PHY_INTERFACE_MODE_SGMII:
3737 case PHY_INTERFACE_MODE_QSGMII:
3738 return 0x0001;
3739 default:
3740 /* Nothing to do for other modes */
3741 return -EINVAL;
3742 }
3743 }
3744 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3745
3746 /**
3747 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3748 * @pcs: a pointer to a &struct mdio_device.
3749 * @interface: the PHY interface mode being configured
3750 * @advertising: the ethtool advertisement mask
3751 * @neg_mode: PCS negotiation mode
3752 *
3753 * Configure a Clause 22 PCS PHY with the appropriate negotiation
3754 * parameters for the @mode, @interface and @advertising parameters.
3755 * Returns negative error number on failure, zero if the advertisement
3756 * has not changed, or positive if there is a change.
3757 */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,phy_interface_t interface,const unsigned long * advertising,unsigned int neg_mode)3758 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3759 phy_interface_t interface,
3760 const unsigned long *advertising,
3761 unsigned int neg_mode)
3762 {
3763 bool changed = 0;
3764 u16 bmcr;
3765 int ret, adv;
3766
3767 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3768 if (adv >= 0) {
3769 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3770 MII_ADVERTISE, 0xffff, adv);
3771 if (ret < 0)
3772 return ret;
3773 changed = ret;
3774 }
3775
3776 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3777 bmcr = BMCR_ANENABLE;
3778 else
3779 bmcr = 0;
3780
3781 /* Configure the inband state. Ensure ISOLATE bit is disabled */
3782 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3783 if (ret < 0)
3784 return ret;
3785
3786 return changed;
3787 }
3788 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3789
3790 /**
3791 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3792 * @pcs: a pointer to a &struct mdio_device.
3793 *
3794 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3795 * clause 37 negotiation.
3796 *
3797 * Restart the clause 37 negotiation with the link partner. This is
3798 * suitable to be directly plugged into the pcs_get_state() member
3799 * of the struct phylink_pcs_ops structure.
3800 */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)3801 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3802 {
3803 int val = mdiodev_read(pcs, MII_BMCR);
3804
3805 if (val >= 0) {
3806 val |= BMCR_ANRESTART;
3807
3808 mdiodev_write(pcs, MII_BMCR, val);
3809 }
3810 }
3811 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3812
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3813 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3814 struct phylink_link_state *state)
3815 {
3816 struct mii_bus *bus = pcs->bus;
3817 int addr = pcs->addr;
3818 int stat;
3819
3820 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3821 if (stat < 0) {
3822 state->link = false;
3823 return;
3824 }
3825
3826 state->link = !!(stat & MDIO_STAT1_LSTATUS);
3827 if (!state->link)
3828 return;
3829
3830 switch (state->interface) {
3831 case PHY_INTERFACE_MODE_10GBASER:
3832 state->speed = SPEED_10000;
3833 state->duplex = DUPLEX_FULL;
3834 break;
3835
3836 default:
3837 break;
3838 }
3839 }
3840 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3841
phylink_init(void)3842 static int __init phylink_init(void)
3843 {
3844 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3845 __set_bit(phylink_sfp_interface_preference[i],
3846 phylink_sfp_interfaces);
3847
3848 return 0;
3849 }
3850
3851 module_init(phylink_init);
3852
3853 MODULE_LICENSE("GPL v2");
3854 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");
3855