1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 PHYLINK_DISABLE_REPLAY, 32 33 PCS_STATE_DOWN = 0, 34 PCS_STATE_STARTING, 35 PCS_STATE_STARTED, 36 }; 37 38 /** 39 * struct phylink - internal data type for phylink 40 */ 41 struct phylink { 42 /* private: */ 43 struct net_device *netdev; 44 const struct phylink_mac_ops *mac_ops; 45 struct phylink_config *config; 46 struct phylink_pcs *pcs; 47 struct device *dev; 48 unsigned int old_link_state:1; 49 50 unsigned long phylink_disable_state; /* bitmask of disables */ 51 struct phy_device *phydev; 52 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 53 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 54 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 55 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 59 60 /* The link configuration settings */ 61 struct phylink_link_state link_config; 62 63 /* The current settings */ 64 phy_interface_t cur_interface; 65 66 struct gpio_desc *link_gpio; 67 unsigned int link_irq; 68 struct timer_list link_poll; 69 70 struct mutex state_mutex; 71 /* Serialize updates to pl->phydev with phylink_resolve() */ 72 struct mutex phydev_mutex; 73 struct phylink_link_state phy_state; 74 unsigned int phy_ib_mode; 75 struct work_struct resolve; 76 unsigned int pcs_neg_mode; 77 unsigned int pcs_state; 78 79 bool link_failed; 80 bool suspend_link_up; 81 bool force_major_config; 82 bool major_config_failed; 83 bool mac_supports_eee_ops; 84 bool mac_supports_eee; 85 bool phy_enable_tx_lpi; 86 bool mac_enable_tx_lpi; 87 bool mac_tx_clk_stop; 88 u32 mac_tx_lpi_timer; 89 u8 mac_rx_clk_stop_blocked; 90 91 struct sfp_bus *sfp_bus; 92 bool sfp_may_have_phy; 93 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 94 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 95 u8 sfp_port; 96 97 struct eee_config eee_cfg; 98 99 u32 wolopts_mac; 100 u8 wol_sopass[SOPASS_MAX]; 101 }; 102 103 #define phylink_printk(level, pl, fmt, ...) \ 104 do { \ 105 if ((pl)->config->type == PHYLINK_NETDEV) \ 106 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 107 else if ((pl)->config->type == PHYLINK_DEV) \ 108 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 109 } while (0) 110 111 #define phylink_err(pl, fmt, ...) \ 112 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 113 #define phylink_warn(pl, fmt, ...) \ 114 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 115 #define phylink_info(pl, fmt, ...) \ 116 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 117 #if defined(CONFIG_DYNAMIC_DEBUG) 118 #define phylink_dbg(pl, fmt, ...) \ 119 do { \ 120 if ((pl)->config->type == PHYLINK_NETDEV) \ 121 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 122 else if ((pl)->config->type == PHYLINK_DEV) \ 123 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 124 } while (0) 125 #elif defined(DEBUG) 126 #define phylink_dbg(pl, fmt, ...) \ 127 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 128 #else 129 #define phylink_dbg(pl, fmt, ...) \ 130 ({ \ 131 if (0) \ 132 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 133 }) 134 #endif 135 136 static const phy_interface_t phylink_sfp_interface_preference[] = { 137 PHY_INTERFACE_MODE_100GBASEP, 138 PHY_INTERFACE_MODE_50GBASER, 139 PHY_INTERFACE_MODE_LAUI, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 PHY_INTERFACE_MODE_10GBASER, 143 PHY_INTERFACE_MODE_5GBASER, 144 PHY_INTERFACE_MODE_2500BASEX, 145 PHY_INTERFACE_MODE_SGMII, 146 PHY_INTERFACE_MODE_1000BASEX, 147 PHY_INTERFACE_MODE_100BASEX, 148 }; 149 150 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 151 152 /** 153 * phylink_set_port_modes() - set the port type modes in the ethtool mask 154 * @mask: ethtool link mode mask 155 * 156 * Sets all the port type modes in the ethtool mask. 157 */ 158 void phylink_set_port_modes(unsigned long *mask) 159 { 160 phylink_set(mask, TP); 161 phylink_set(mask, AUI); 162 phylink_set(mask, MII); 163 phylink_set(mask, FIBRE); 164 phylink_set(mask, BNC); 165 phylink_set(mask, Backplane); 166 } 167 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 168 169 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 170 { 171 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 172 173 phylink_set_port_modes(tmp); 174 phylink_set(tmp, Autoneg); 175 phylink_set(tmp, Pause); 176 phylink_set(tmp, Asym_Pause); 177 178 return linkmode_subset(linkmode, tmp); 179 } 180 181 static const char *phylink_an_mode_str(unsigned int mode) 182 { 183 static const char *modestr[] = { 184 [MLO_AN_PHY] = "phy", 185 [MLO_AN_FIXED] = "fixed", 186 [MLO_AN_INBAND] = "inband", 187 }; 188 189 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 190 } 191 192 static const char *phylink_pcs_mode_str(unsigned int mode) 193 { 194 if (!mode) 195 return "none"; 196 197 if (mode & PHYLINK_PCS_NEG_OUTBAND) 198 return "outband"; 199 200 if (mode & PHYLINK_PCS_NEG_INBAND) { 201 if (mode & PHYLINK_PCS_NEG_ENABLED) 202 return "inband,an-enabled"; 203 else 204 return "inband,an-disabled"; 205 } 206 207 return "unknown"; 208 } 209 210 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 211 { 212 switch (interface) { 213 case PHY_INTERFACE_MODE_SGMII: 214 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 215 return 1250; 216 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 217 return 3125; 218 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 219 return 5156; 220 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 221 return 10313; 222 default: 223 return 0; 224 } 225 } 226 227 /** 228 * phylink_interface_max_speed() - get the maximum speed of a phy interface 229 * @interface: phy interface mode defined by &typedef phy_interface_t 230 * 231 * Determine the maximum speed of a phy interface. This is intended to help 232 * determine the correct speed to pass to the MAC when the phy is performing 233 * rate matching. 234 * 235 * Return: The maximum speed of @interface 236 */ 237 static int phylink_interface_max_speed(phy_interface_t interface) 238 { 239 switch (interface) { 240 case PHY_INTERFACE_MODE_100BASEX: 241 case PHY_INTERFACE_MODE_REVRMII: 242 case PHY_INTERFACE_MODE_RMII: 243 case PHY_INTERFACE_MODE_SMII: 244 case PHY_INTERFACE_MODE_REVMII: 245 case PHY_INTERFACE_MODE_MII: 246 case PHY_INTERFACE_MODE_MIILITE: 247 return SPEED_100; 248 249 case PHY_INTERFACE_MODE_TBI: 250 case PHY_INTERFACE_MODE_MOCA: 251 case PHY_INTERFACE_MODE_RTBI: 252 case PHY_INTERFACE_MODE_1000BASEX: 253 case PHY_INTERFACE_MODE_1000BASEKX: 254 case PHY_INTERFACE_MODE_TRGMII: 255 case PHY_INTERFACE_MODE_RGMII_TXID: 256 case PHY_INTERFACE_MODE_RGMII_RXID: 257 case PHY_INTERFACE_MODE_RGMII_ID: 258 case PHY_INTERFACE_MODE_RGMII: 259 case PHY_INTERFACE_MODE_PSGMII: 260 case PHY_INTERFACE_MODE_QSGMII: 261 case PHY_INTERFACE_MODE_QUSGMII: 262 case PHY_INTERFACE_MODE_SGMII: 263 case PHY_INTERFACE_MODE_GMII: 264 return SPEED_1000; 265 266 case PHY_INTERFACE_MODE_2500BASEX: 267 case PHY_INTERFACE_MODE_10G_QXGMII: 268 return SPEED_2500; 269 270 case PHY_INTERFACE_MODE_5GBASER: 271 return SPEED_5000; 272 273 case PHY_INTERFACE_MODE_XGMII: 274 case PHY_INTERFACE_MODE_RXAUI: 275 case PHY_INTERFACE_MODE_XAUI: 276 case PHY_INTERFACE_MODE_10GBASER: 277 case PHY_INTERFACE_MODE_10GKR: 278 case PHY_INTERFACE_MODE_USXGMII: 279 return SPEED_10000; 280 281 case PHY_INTERFACE_MODE_25GBASER: 282 return SPEED_25000; 283 284 case PHY_INTERFACE_MODE_XLGMII: 285 return SPEED_40000; 286 287 case PHY_INTERFACE_MODE_50GBASER: 288 case PHY_INTERFACE_MODE_LAUI: 289 return SPEED_50000; 290 291 case PHY_INTERFACE_MODE_100GBASEP: 292 return SPEED_100000; 293 294 case PHY_INTERFACE_MODE_INTERNAL: 295 case PHY_INTERFACE_MODE_NA: 296 case PHY_INTERFACE_MODE_MAX: 297 /* No idea! Garbage in, unknown out */ 298 return SPEED_UNKNOWN; 299 } 300 301 /* If we get here, someone forgot to add an interface mode above */ 302 WARN_ON_ONCE(1); 303 return SPEED_UNKNOWN; 304 } 305 306 static struct { 307 unsigned long mask; 308 int speed; 309 unsigned int duplex; 310 unsigned int caps_bit; 311 } phylink_caps_params[] = { 312 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 313 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 314 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 315 { MAC_80000FD, SPEED_80000, DUPLEX_FULL, BIT(LINK_CAPA_80000FD) }, 316 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 317 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 318 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 319 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 320 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 321 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 322 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 323 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 324 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 325 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 326 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 327 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 328 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 329 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 330 }; 331 332 /** 333 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 334 * @caps: A set of MAC capabilities 335 * 336 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 337 */ 338 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 339 { 340 unsigned long link_caps = 0; 341 int i; 342 343 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 344 if (caps & phylink_caps_params[i].mask) 345 link_caps |= phylink_caps_params[i].caps_bit; 346 347 return link_caps; 348 } 349 350 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 351 { 352 unsigned long caps = 0; 353 int i; 354 355 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 356 if (link_caps & phylink_caps_params[i].caps_bit) 357 caps |= phylink_caps_params[i].mask; 358 359 return caps; 360 } 361 362 /** 363 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 364 * @linkmodes: ethtool linkmode mask (must be already initialised) 365 * @caps: bitmask of MAC capabilities 366 * 367 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 368 * supported by the @caps. @linkmodes must have been initialised previously. 369 */ 370 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 371 unsigned long caps) 372 { 373 unsigned long link_caps = phylink_caps_to_link_caps(caps); 374 375 if (caps & MAC_SYM_PAUSE) 376 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 377 378 if (caps & MAC_ASYM_PAUSE) 379 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 380 381 phy_caps_linkmodes(link_caps, linkmodes); 382 } 383 384 /** 385 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 386 * @config: pointer to a &struct phylink_config 387 * @max_speed: maximum speed 388 * 389 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 390 * Any further motifications of config.mac_capabilities will override this. 391 */ 392 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 393 { 394 int i; 395 396 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 397 phylink_caps_params[i].speed > max_speed; i++) 398 config->mac_capabilities &= ~phylink_caps_params[i].mask; 399 } 400 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 401 402 /** 403 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 404 * @speed: the speed to search for 405 * @duplex: the duplex to search for 406 * 407 * Find the mac capability for a given speed and duplex. 408 * 409 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 410 * there were no matches. 411 */ 412 static unsigned long phylink_cap_from_speed_duplex(int speed, 413 unsigned int duplex) 414 { 415 int i; 416 417 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 418 if (speed == phylink_caps_params[i].speed && 419 duplex == phylink_caps_params[i].duplex) 420 return phylink_caps_params[i].mask; 421 } 422 423 return 0; 424 } 425 426 /** 427 * phylink_get_capabilities() - get capabilities for a given MAC 428 * @interface: phy interface mode defined by &typedef phy_interface_t 429 * @mac_capabilities: bitmask of MAC capabilities 430 * @rate_matching: type of rate matching being performed 431 * 432 * Get the MAC capabilities that are supported by the @interface mode and 433 * @mac_capabilities. 434 */ 435 static unsigned long phylink_get_capabilities(phy_interface_t interface, 436 unsigned long mac_capabilities, 437 int rate_matching) 438 { 439 unsigned long link_caps = phy_caps_from_interface(interface); 440 int max_speed = phylink_interface_max_speed(interface); 441 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 442 unsigned long matched_caps = 0; 443 444 caps |= phylink_link_caps_to_mac_caps(link_caps); 445 446 switch (rate_matching) { 447 case RATE_MATCH_OPEN_LOOP: 448 /* TODO */ 449 fallthrough; 450 case RATE_MATCH_NONE: 451 matched_caps = 0; 452 break; 453 case RATE_MATCH_PAUSE: { 454 /* The MAC must support asymmetric pause towards the local 455 * device for this. We could allow just symmetric pause, but 456 * then we might have to renegotiate if the link partner 457 * doesn't support pause. This is because there's no way to 458 * accept pause frames without transmitting them if we only 459 * support symmetric pause. 460 */ 461 if (!(mac_capabilities & MAC_SYM_PAUSE) || 462 !(mac_capabilities & MAC_ASYM_PAUSE)) 463 break; 464 465 /* We can't adapt if the MAC doesn't support the interface's 466 * max speed at full duplex. 467 */ 468 if (mac_capabilities & 469 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 470 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 471 break; 472 } 473 case RATE_MATCH_CRS: 474 /* The MAC must support half duplex at the interface's max 475 * speed. 476 */ 477 if (mac_capabilities & 478 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 479 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 480 matched_caps &= mac_capabilities; 481 } 482 break; 483 } 484 485 return (caps & mac_capabilities) | matched_caps; 486 } 487 488 /** 489 * phylink_validate_mask_caps() - Restrict link modes based on caps 490 * @supported: ethtool bitmask for supported link modes. 491 * @state: pointer to a &struct phylink_link_state. 492 * @mac_capabilities: bitmask of MAC capabilities 493 * 494 * Calculate the supported link modes based on @mac_capabilities, and restrict 495 * @supported and @state based on that. Use this function if your capabiliies 496 * aren't constant, such as if they vary depending on the interface. 497 */ 498 static void phylink_validate_mask_caps(unsigned long *supported, 499 struct phylink_link_state *state, 500 unsigned long mac_capabilities) 501 { 502 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 503 unsigned long caps; 504 505 phylink_set_port_modes(mask); 506 phylink_set(mask, Autoneg); 507 caps = phylink_get_capabilities(state->interface, mac_capabilities, 508 state->rate_matching); 509 phylink_caps_to_linkmodes(mask, caps); 510 511 linkmode_and(supported, supported, mask); 512 linkmode_and(state->advertising, state->advertising, mask); 513 } 514 515 static int phylink_validate_mac_and_pcs(struct phylink *pl, 516 unsigned long *supported, 517 struct phylink_link_state *state) 518 { 519 struct phylink_pcs *pcs = NULL; 520 unsigned long capabilities; 521 int ret; 522 523 /* Get the PCS for this interface mode */ 524 if (pl->mac_ops->mac_select_pcs) { 525 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 526 if (IS_ERR(pcs)) 527 return PTR_ERR(pcs); 528 } 529 530 if (pcs) { 531 /* The PCS, if present, must be setup before phylink_create() 532 * has been called. If the ops is not initialised, print an 533 * error and backtrace rather than oopsing the kernel. 534 */ 535 if (!pcs->ops) { 536 phylink_err(pl, "interface %s: uninitialised PCS\n", 537 phy_modes(state->interface)); 538 dump_stack(); 539 return -EINVAL; 540 } 541 542 /* Ensure that this PCS supports the interface which the MAC 543 * returned it for. It is an error for the MAC to return a PCS 544 * that does not support the interface mode. 545 */ 546 if (!phy_interface_empty(pcs->supported_interfaces) && 547 !test_bit(state->interface, pcs->supported_interfaces)) { 548 phylink_err(pl, "MAC returned PCS which does not support %s\n", 549 phy_modes(state->interface)); 550 return -EINVAL; 551 } 552 553 /* Validate the link parameters with the PCS */ 554 if (pcs->ops->pcs_validate) { 555 ret = pcs->ops->pcs_validate(pcs, supported, state); 556 if (ret < 0 || phylink_is_empty_linkmode(supported)) 557 return -EINVAL; 558 559 /* Ensure the advertising mask is a subset of the 560 * supported mask. 561 */ 562 linkmode_and(state->advertising, state->advertising, 563 supported); 564 } 565 } 566 567 /* Then validate the link parameters with the MAC */ 568 if (pl->mac_ops->mac_get_caps) 569 capabilities = pl->mac_ops->mac_get_caps(pl->config, 570 state->interface); 571 else 572 capabilities = pl->config->mac_capabilities; 573 574 phylink_validate_mask_caps(supported, state, capabilities); 575 576 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 577 } 578 579 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 580 const unsigned long *supported, 581 const struct phylink_link_state *state, 582 phy_interface_t interface, 583 unsigned long *accum_supported, 584 unsigned long *accum_advertising) 585 { 586 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 587 struct phylink_link_state tmp_state; 588 589 linkmode_copy(tmp_supported, supported); 590 591 tmp_state = *state; 592 tmp_state.interface = interface; 593 594 if (phy) 595 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 596 597 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 598 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 599 interface, phy_modes(interface), 600 phy_rate_matching_to_str(tmp_state.rate_matching), 601 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 602 603 linkmode_or(accum_supported, accum_supported, tmp_supported); 604 linkmode_or(accum_advertising, accum_advertising, 605 tmp_state.advertising); 606 } 607 } 608 609 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 610 unsigned long *supported, 611 struct phylink_link_state *state, 612 const unsigned long *interfaces) 613 { 614 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 615 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 616 int interface; 617 618 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 619 phylink_validate_one(pl, phy, supported, state, interface, 620 all_s, all_adv); 621 622 linkmode_copy(supported, all_s); 623 linkmode_copy(state->advertising, all_adv); 624 625 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 626 } 627 628 static int phylink_validate(struct phylink *pl, unsigned long *supported, 629 struct phylink_link_state *state) 630 { 631 const unsigned long *interfaces = pl->config->supported_interfaces; 632 633 if (state->interface == PHY_INTERFACE_MODE_NA) 634 return phylink_validate_mask(pl, NULL, supported, state, 635 interfaces); 636 637 if (!test_bit(state->interface, interfaces)) 638 return -EINVAL; 639 640 return phylink_validate_mac_and_pcs(pl, supported, state); 641 } 642 643 static void phylink_fill_fixedlink_supported(unsigned long *supported) 644 { 645 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 649 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 652 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 653 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 654 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 655 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 656 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 657 } 658 659 static int phylink_parse_fixedlink(struct phylink *pl, 660 const struct fwnode_handle *fwnode) 661 { 662 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 664 const struct link_capabilities *c; 665 struct fwnode_handle *fixed_node; 666 struct gpio_desc *desc; 667 u32 speed; 668 int ret; 669 670 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 671 if (fixed_node) { 672 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 673 674 pl->link_config.speed = speed; 675 pl->link_config.duplex = DUPLEX_HALF; 676 677 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 678 pl->link_config.duplex = DUPLEX_FULL; 679 680 /* We treat the "pause" and "asym-pause" terminology as 681 * defining the link partner's ability. 682 */ 683 if (fwnode_property_read_bool(fixed_node, "pause")) 684 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 685 pl->link_config.lp_advertising); 686 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 687 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 688 pl->link_config.lp_advertising); 689 690 if (ret == 0) { 691 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 692 GPIOD_IN, "?"); 693 694 if (!IS_ERR(desc)) 695 pl->link_gpio = desc; 696 else if (desc == ERR_PTR(-EPROBE_DEFER)) 697 ret = -EPROBE_DEFER; 698 } 699 fwnode_handle_put(fixed_node); 700 701 if (ret) 702 return ret; 703 } else { 704 u32 prop[5]; 705 706 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 707 NULL, 0); 708 if (ret != ARRAY_SIZE(prop)) { 709 phylink_err(pl, "broken fixed-link?\n"); 710 return -EINVAL; 711 } 712 713 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 714 fwnode); 715 716 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 717 prop, ARRAY_SIZE(prop)); 718 if (!ret) { 719 pl->link_config.duplex = prop[1] ? 720 DUPLEX_FULL : DUPLEX_HALF; 721 pl->link_config.speed = prop[2]; 722 if (prop[3]) 723 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 724 pl->link_config.lp_advertising); 725 if (prop[4]) 726 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 727 pl->link_config.lp_advertising); 728 } 729 } 730 731 if (pl->link_config.speed > SPEED_1000 && 732 pl->link_config.duplex != DUPLEX_FULL) 733 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 734 pl->link_config.speed); 735 736 linkmode_zero(pl->supported); 737 phylink_fill_fixedlink_supported(pl->supported); 738 739 linkmode_copy(pl->link_config.advertising, pl->supported); 740 phylink_validate(pl, pl->supported, &pl->link_config); 741 742 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 743 pl->supported, true); 744 if (c) 745 linkmode_and(match, pl->supported, c->linkmodes); 746 747 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 748 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 749 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 750 linkmode_and(pl->supported, pl->supported, mask); 751 752 phylink_set(pl->supported, MII); 753 754 if (c) { 755 linkmode_or(pl->supported, pl->supported, match); 756 linkmode_or(pl->link_config.lp_advertising, 757 pl->link_config.lp_advertising, match); 758 } else { 759 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 760 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 761 pl->link_config.speed); 762 } 763 764 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 765 pl->supported); 766 767 pl->link_config.link = 1; 768 pl->link_config.an_complete = 1; 769 770 return 0; 771 } 772 773 static int phylink_parse_mode(struct phylink *pl, 774 const struct fwnode_handle *fwnode) 775 { 776 struct fwnode_handle *dn; 777 const char *managed; 778 unsigned long caps; 779 780 if (pl->config->default_an_inband) 781 pl->cfg_link_an_mode = MLO_AN_INBAND; 782 783 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 784 if (dn || fwnode_property_present(fwnode, "fixed-link")) 785 pl->cfg_link_an_mode = MLO_AN_FIXED; 786 fwnode_handle_put(dn); 787 788 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 789 strcmp(managed, "in-band-status") == 0)) { 790 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 791 phylink_err(pl, 792 "can't use both fixed-link and in-band-status\n"); 793 return -EINVAL; 794 } 795 796 pl->cfg_link_an_mode = MLO_AN_INBAND; 797 } 798 799 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 800 linkmode_zero(pl->supported); 801 phylink_set(pl->supported, MII); 802 phylink_set(pl->supported, Autoneg); 803 phylink_set(pl->supported, Asym_Pause); 804 phylink_set(pl->supported, Pause); 805 806 switch (pl->link_config.interface) { 807 case PHY_INTERFACE_MODE_SGMII: 808 case PHY_INTERFACE_MODE_PSGMII: 809 case PHY_INTERFACE_MODE_QSGMII: 810 case PHY_INTERFACE_MODE_QUSGMII: 811 case PHY_INTERFACE_MODE_RGMII: 812 case PHY_INTERFACE_MODE_RGMII_ID: 813 case PHY_INTERFACE_MODE_RGMII_RXID: 814 case PHY_INTERFACE_MODE_RGMII_TXID: 815 case PHY_INTERFACE_MODE_RTBI: 816 case PHY_INTERFACE_MODE_1000BASEX: 817 case PHY_INTERFACE_MODE_2500BASEX: 818 case PHY_INTERFACE_MODE_5GBASER: 819 case PHY_INTERFACE_MODE_25GBASER: 820 case PHY_INTERFACE_MODE_USXGMII: 821 case PHY_INTERFACE_MODE_10G_QXGMII: 822 case PHY_INTERFACE_MODE_10GKR: 823 case PHY_INTERFACE_MODE_10GBASER: 824 case PHY_INTERFACE_MODE_XLGMII: 825 case PHY_INTERFACE_MODE_50GBASER: 826 case PHY_INTERFACE_MODE_LAUI: 827 case PHY_INTERFACE_MODE_100GBASEP: 828 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 829 caps = phylink_get_capabilities(pl->link_config.interface, caps, 830 RATE_MATCH_NONE); 831 phylink_caps_to_linkmodes(pl->supported, caps); 832 break; 833 834 default: 835 phylink_err(pl, 836 "incorrect link mode %s for in-band status\n", 837 phy_modes(pl->link_config.interface)); 838 return -EINVAL; 839 } 840 841 linkmode_copy(pl->link_config.advertising, pl->supported); 842 843 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 844 phylink_err(pl, 845 "failed to validate link configuration for in-band status\n"); 846 return -EINVAL; 847 } 848 } 849 850 return 0; 851 } 852 853 static void phylink_apply_manual_flow(struct phylink *pl, 854 struct phylink_link_state *state) 855 { 856 /* If autoneg is disabled, pause AN is also disabled */ 857 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 858 state->advertising)) 859 state->pause &= ~MLO_PAUSE_AN; 860 861 /* Manual configuration of pause modes */ 862 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 863 state->pause = pl->link_config.pause; 864 } 865 866 static void phylink_resolve_an_pause(struct phylink_link_state *state) 867 { 868 bool tx_pause, rx_pause; 869 870 if (state->duplex == DUPLEX_FULL) { 871 linkmode_resolve_pause(state->advertising, 872 state->lp_advertising, 873 &tx_pause, &rx_pause); 874 if (tx_pause) 875 state->pause |= MLO_PAUSE_TX; 876 if (rx_pause) 877 state->pause |= MLO_PAUSE_RX; 878 } 879 } 880 881 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 882 phy_interface_t interface) 883 { 884 if (pcs && pcs->ops->pcs_inband_caps) 885 return pcs->ops->pcs_inband_caps(pcs, interface); 886 887 return 0; 888 } 889 890 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 891 phy_interface_t interface) 892 { 893 if (pcs && pcs->ops->pcs_pre_config) 894 pcs->ops->pcs_pre_config(pcs, interface); 895 } 896 897 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 898 phy_interface_t interface) 899 { 900 int err = 0; 901 902 if (pcs && pcs->ops->pcs_post_config) 903 err = pcs->ops->pcs_post_config(pcs, interface); 904 905 return err; 906 } 907 908 static void phylink_pcs_disable(struct phylink_pcs *pcs) 909 { 910 if (pcs && pcs->ops->pcs_disable) 911 pcs->ops->pcs_disable(pcs); 912 } 913 914 static int phylink_pcs_enable(struct phylink_pcs *pcs) 915 { 916 int err = 0; 917 918 if (pcs && pcs->ops->pcs_enable) 919 err = pcs->ops->pcs_enable(pcs); 920 921 return err; 922 } 923 924 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 925 const struct phylink_link_state *state, 926 bool permit_pause_to_mac) 927 { 928 if (!pcs) 929 return 0; 930 931 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 932 state->advertising, permit_pause_to_mac); 933 } 934 935 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 936 phy_interface_t interface, int speed, 937 int duplex) 938 { 939 if (pcs && pcs->ops->pcs_link_up) 940 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 941 } 942 943 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 944 { 945 if (pcs && pcs->ops->pcs_disable_eee) 946 pcs->ops->pcs_disable_eee(pcs); 947 } 948 949 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 950 { 951 if (pcs && pcs->ops->pcs_enable_eee) 952 pcs->ops->pcs_enable_eee(pcs); 953 } 954 955 /* Query inband for a specific interface mode, asking the MAC for the 956 * PCS which will be used to handle the interface mode. 957 */ 958 static unsigned int phylink_inband_caps(struct phylink *pl, 959 phy_interface_t interface) 960 { 961 struct phylink_pcs *pcs; 962 963 if (!pl->mac_ops->mac_select_pcs) 964 return 0; 965 966 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 967 if (IS_ERR_OR_NULL(pcs)) 968 return 0; 969 970 return phylink_pcs_inband_caps(pcs, interface); 971 } 972 973 static void phylink_pcs_poll_stop(struct phylink *pl) 974 { 975 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 976 timer_delete(&pl->link_poll); 977 } 978 979 static void phylink_pcs_poll_start(struct phylink *pl) 980 { 981 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 982 mod_timer(&pl->link_poll, jiffies + HZ); 983 } 984 985 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 986 { 987 int ret = 0; 988 989 /* Signal to PCS driver that MAC requires RX clock for init */ 990 if (pl->config->mac_requires_rxc) 991 pcs->rxc_always_on = true; 992 993 if (pcs->ops->pcs_pre_init) 994 ret = pcs->ops->pcs_pre_init(pcs); 995 996 return ret; 997 } 998 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 999 1000 static void phylink_mac_config(struct phylink *pl, 1001 const struct phylink_link_state *state) 1002 { 1003 struct phylink_link_state st = *state; 1004 1005 /* Stop drivers incorrectly using these */ 1006 linkmode_zero(st.lp_advertising); 1007 st.speed = SPEED_UNKNOWN; 1008 st.duplex = DUPLEX_UNKNOWN; 1009 st.an_complete = false; 1010 st.link = false; 1011 1012 phylink_dbg(pl, 1013 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1014 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1015 phy_modes(st.interface), 1016 phy_rate_matching_to_str(st.rate_matching), 1017 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1018 st.pause); 1019 1020 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1021 } 1022 1023 static void phylink_pcs_an_restart(struct phylink *pl) 1024 { 1025 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1026 pl->link_config.advertising) && 1027 phy_interface_mode_is_8023z(pl->link_config.interface) && 1028 phylink_autoneg_inband(pl->act_link_an_mode)) 1029 pl->pcs->ops->pcs_an_restart(pl->pcs); 1030 } 1031 1032 enum inband_type { 1033 INBAND_NONE, 1034 INBAND_CISCO_SGMII, 1035 INBAND_BASEX, 1036 }; 1037 1038 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1039 { 1040 switch (interface) { 1041 case PHY_INTERFACE_MODE_SGMII: 1042 case PHY_INTERFACE_MODE_PSGMII: 1043 case PHY_INTERFACE_MODE_QSGMII: 1044 case PHY_INTERFACE_MODE_QUSGMII: 1045 case PHY_INTERFACE_MODE_USXGMII: 1046 case PHY_INTERFACE_MODE_10G_QXGMII: 1047 /* These protocols are designed for use with a PHY which 1048 * communicates its negotiation result back to the MAC via 1049 * inband communication. Note: there exist PHYs that run 1050 * with SGMII but do not send the inband data. 1051 */ 1052 return INBAND_CISCO_SGMII; 1053 1054 case PHY_INTERFACE_MODE_1000BASEX: 1055 case PHY_INTERFACE_MODE_2500BASEX: 1056 /* 1000base-X is designed for use media-side for Fibre 1057 * connections, and thus the Autoneg bit needs to be 1058 * taken into account. We also do this for 2500base-X 1059 * as well, but drivers may not support this, so may 1060 * need to override this. 1061 */ 1062 return INBAND_BASEX; 1063 1064 default: 1065 return INBAND_NONE; 1066 } 1067 } 1068 1069 /** 1070 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1071 * @pl: a pointer to a &struct phylink returned from phylink_create() 1072 * @pcs: a pointer to &struct phylink_pcs 1073 * @interface: interface mode to be used 1074 * @advertising: adertisement ethtool link mode mask 1075 * 1076 * Determines the negotiation mode to be used by the PCS, and returns 1077 * one of: 1078 * 1079 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1080 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1081 * will be used. 1082 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1083 * disabled 1084 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1085 * 1086 * Note: this is for cases where the PCS itself is involved in negotiation 1087 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1088 */ 1089 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1090 phy_interface_t interface, 1091 const unsigned long *advertising) 1092 { 1093 unsigned int pcs_ib_caps = 0; 1094 unsigned int phy_ib_caps = 0; 1095 unsigned int neg_mode, mode; 1096 enum inband_type type; 1097 1098 type = phylink_get_inband_type(interface); 1099 if (type == INBAND_NONE) { 1100 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1101 pl->act_link_an_mode = pl->req_link_an_mode; 1102 return; 1103 } 1104 1105 mode = pl->req_link_an_mode; 1106 1107 pl->phy_ib_mode = 0; 1108 1109 if (pcs) 1110 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1111 1112 if (pl->phydev) 1113 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1114 1115 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1116 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1117 1118 if (!phylink_autoneg_inband(mode)) { 1119 bool pcs_ib_only = false; 1120 bool phy_ib_only = false; 1121 1122 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1123 /* PCS supports reporting in-band capabilities, and 1124 * supports more than disable mode. 1125 */ 1126 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1127 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1128 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1129 pcs_ib_only = true; 1130 } 1131 1132 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1133 /* PHY supports in-band capabilities, and supports 1134 * more than disable mode. 1135 */ 1136 if (phy_ib_caps & LINK_INBAND_DISABLE) 1137 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1138 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1139 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1140 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1141 phy_ib_only = true; 1142 } 1143 1144 /* If either the PCS or PHY requires inband to be enabled, 1145 * this is an invalid configuration. Provide a diagnostic 1146 * message for this case, but don't try to force the issue. 1147 */ 1148 if (pcs_ib_only || phy_ib_only) 1149 phylink_warn(pl, 1150 "firmware wants %s mode, but %s%s%s requires inband\n", 1151 phylink_an_mode_str(mode), 1152 pcs_ib_only ? "PCS" : "", 1153 pcs_ib_only && phy_ib_only ? " and " : "", 1154 phy_ib_only ? "PHY" : ""); 1155 1156 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1157 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1158 /* For SGMII modes which are designed to be used with PHYs, or 1159 * Base-X with a PHY, we try to use in-band mode where-ever 1160 * possible. However, there are some PHYs e.g. BCM84881 which 1161 * do not support in-band. 1162 */ 1163 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1164 LINK_INBAND_BYPASS; 1165 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1166 LINK_INBAND_BYPASS; 1167 /* PCS PHY 1168 * D E D E 1169 * 0 0 0 0 no information inband enabled 1170 * 1 0 0 0 pcs doesn't support outband 1171 * 0 1 0 0 pcs required inband enabled 1172 * 1 1 0 0 pcs optional inband enabled 1173 * 0 0 1 0 phy doesn't support outband 1174 * 1 0 1 0 pcs+phy doesn't support outband 1175 * 0 1 1 0 pcs required, phy doesn't support, invalid 1176 * 1 1 1 0 pcs optional, phy doesn't support, outband 1177 * 0 0 0 1 phy required inband enabled 1178 * 1 0 0 1 pcs doesn't support, phy required, invalid 1179 * 0 1 0 1 pcs+phy required inband enabled 1180 * 1 1 0 1 pcs optional, phy required inband enabled 1181 * 0 0 1 1 phy optional inband enabled 1182 * 1 0 1 1 pcs doesn't support, phy optional, outband 1183 * 0 1 1 1 pcs required, phy optional inband enabled 1184 * 1 1 1 1 pcs+phy optional inband enabled 1185 */ 1186 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1187 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1188 /* In-band supported or unknown at both ends. Enable 1189 * in-band mode with or without bypass at the PHY. 1190 */ 1191 if (phy_ib_caps & LINK_INBAND_ENABLE) 1192 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1193 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1194 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1195 1196 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1197 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1198 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1199 /* Either in-band not supported at at least one end. 1200 * In-band bypass at the other end is possible. 1201 */ 1202 if (phy_ib_caps & LINK_INBAND_DISABLE) 1203 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1204 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1205 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1206 1207 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1208 if (pl->phydev) 1209 mode = MLO_AN_PHY; 1210 } else { 1211 /* invalid */ 1212 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1213 phy_modes(interface)); 1214 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1215 } 1216 } else { 1217 /* For Base-X without a PHY */ 1218 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1219 /* If the PCS doesn't support inband, then inband must 1220 * be disabled. 1221 */ 1222 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1223 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1224 /* If the PCS requires inband, then inband must always 1225 * be enabled. 1226 */ 1227 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1228 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1229 advertising)) 1230 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1231 else 1232 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1233 } 1234 1235 pl->pcs_neg_mode = neg_mode; 1236 pl->act_link_an_mode = mode; 1237 } 1238 1239 static void phylink_major_config(struct phylink *pl, bool restart, 1240 const struct phylink_link_state *state) 1241 { 1242 struct phylink_pcs *pcs = NULL; 1243 bool pcs_changed = false; 1244 unsigned int rate_kbd; 1245 int err; 1246 1247 phylink_dbg(pl, "major config, requested %s/%s\n", 1248 phylink_an_mode_str(pl->req_link_an_mode), 1249 phy_modes(state->interface)); 1250 1251 pl->major_config_failed = false; 1252 1253 if (pl->mac_ops->mac_select_pcs) { 1254 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1255 if (IS_ERR(pcs)) { 1256 phylink_err(pl, 1257 "mac_select_pcs unexpectedly failed: %pe\n", 1258 pcs); 1259 1260 pl->major_config_failed = true; 1261 return; 1262 } 1263 1264 pcs_changed = pl->pcs != pcs; 1265 } 1266 1267 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1268 1269 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1270 phylink_an_mode_str(pl->act_link_an_mode), 1271 phylink_pcs_mode_str(pl->pcs_neg_mode), 1272 phy_modes(state->interface)); 1273 1274 phylink_pcs_poll_stop(pl); 1275 1276 if (pl->mac_ops->mac_prepare) { 1277 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1278 state->interface); 1279 if (err < 0) { 1280 phylink_err(pl, "mac_prepare failed: %pe\n", 1281 ERR_PTR(err)); 1282 pl->major_config_failed = true; 1283 return; 1284 } 1285 } 1286 1287 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1288 * for the change. 1289 */ 1290 if (pcs_changed) { 1291 phylink_pcs_disable(pl->pcs); 1292 1293 if (pl->pcs) 1294 pl->pcs->phylink = NULL; 1295 1296 if (pcs) 1297 pcs->phylink = pl; 1298 1299 pl->pcs = pcs; 1300 } 1301 1302 if (pl->pcs) 1303 phylink_pcs_pre_config(pl->pcs, state->interface); 1304 1305 phylink_mac_config(pl, state); 1306 1307 if (pl->pcs) { 1308 err = phylink_pcs_post_config(pl->pcs, state->interface); 1309 if (err < 0) { 1310 phylink_err(pl, "pcs_post_config failed: %pe\n", 1311 ERR_PTR(err)); 1312 1313 pl->major_config_failed = true; 1314 } 1315 } 1316 1317 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1318 phylink_pcs_enable(pl->pcs); 1319 1320 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1321 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1322 if (err < 0) { 1323 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1324 pl->major_config_failed = true; 1325 } else if (err > 0) { 1326 restart = true; 1327 } 1328 1329 if (restart) 1330 phylink_pcs_an_restart(pl); 1331 1332 if (pl->mac_ops->mac_finish) { 1333 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1334 state->interface); 1335 if (err < 0) { 1336 phylink_err(pl, "mac_finish failed: %pe\n", 1337 ERR_PTR(err)); 1338 1339 pl->major_config_failed = true; 1340 } 1341 } 1342 1343 if (pl->phydev && pl->phy_ib_mode) { 1344 phylink_dbg(pl, "configuring PHY for inband%s%s%s\n", 1345 pl->phy_ib_mode & LINK_INBAND_DISABLE ? 1346 " disable" : "", 1347 pl->phy_ib_mode & LINK_INBAND_ENABLE ? 1348 " enable" : "", 1349 pl->phy_ib_mode & LINK_INBAND_BYPASS ? 1350 " bypass" : ""); 1351 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1352 if (err < 0) { 1353 phylink_err(pl, "phy_config_inband: %pe\n", 1354 ERR_PTR(err)); 1355 1356 pl->major_config_failed = true; 1357 } 1358 } 1359 1360 if (pl->sfp_bus) { 1361 rate_kbd = phylink_interface_signal_rate(state->interface); 1362 if (rate_kbd) 1363 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1364 } 1365 1366 phylink_pcs_poll_start(pl); 1367 } 1368 1369 /* 1370 * Reconfigure for a change of inband advertisement. 1371 * If we have a separate PCS, we only need to call its pcs_config() method, 1372 * and then restart AN if it indicates something changed. Otherwise, we do 1373 * the full MAC reconfiguration. 1374 */ 1375 static int phylink_change_inband_advert(struct phylink *pl) 1376 { 1377 int ret; 1378 1379 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1380 return 0; 1381 1382 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1383 phylink_an_mode_str(pl->req_link_an_mode), 1384 phy_modes(pl->link_config.interface), 1385 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1386 pl->link_config.pause); 1387 1388 /* Recompute the PCS neg mode */ 1389 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1390 pl->link_config.advertising); 1391 1392 /* Modern PCS-based method; update the advert at the PCS, and 1393 * restart negotiation if the pcs_config() helper indicates that 1394 * the programmed advertisement has changed. 1395 */ 1396 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1397 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1398 if (ret < 0) 1399 return ret; 1400 1401 if (ret > 0) 1402 phylink_pcs_an_restart(pl); 1403 1404 return 0; 1405 } 1406 1407 static void phylink_mac_pcs_get_state(struct phylink *pl, 1408 struct phylink_link_state *state) 1409 { 1410 struct phylink_pcs *pcs; 1411 bool autoneg; 1412 1413 linkmode_copy(state->advertising, pl->link_config.advertising); 1414 linkmode_zero(state->lp_advertising); 1415 state->interface = pl->link_config.interface; 1416 state->rate_matching = pl->link_config.rate_matching; 1417 state->an_complete = 0; 1418 state->link = 1; 1419 1420 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1421 if (autoneg) { 1422 state->speed = SPEED_UNKNOWN; 1423 state->duplex = DUPLEX_UNKNOWN; 1424 state->pause = MLO_PAUSE_NONE; 1425 } else { 1426 state->speed = pl->link_config.speed; 1427 state->duplex = pl->link_config.duplex; 1428 state->pause = pl->link_config.pause; 1429 } 1430 1431 pcs = pl->pcs; 1432 if (pcs) 1433 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1434 else 1435 state->link = 0; 1436 } 1437 1438 /* The fixed state is... fixed except for the link state, 1439 * which may be determined by a GPIO or a callback. 1440 */ 1441 static void phylink_get_fixed_state(struct phylink *pl, 1442 struct phylink_link_state *state) 1443 { 1444 *state = pl->link_config; 1445 if (pl->config->get_fixed_state) 1446 pl->config->get_fixed_state(pl->config, state); 1447 else if (pl->link_gpio) 1448 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1449 1450 state->pause = MLO_PAUSE_NONE; 1451 phylink_resolve_an_pause(state); 1452 } 1453 1454 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1455 { 1456 struct phylink_link_state link_state; 1457 struct phy_device *phy = pl->phydev; 1458 1459 switch (pl->req_link_an_mode) { 1460 case MLO_AN_PHY: 1461 link_state = pl->phy_state; 1462 break; 1463 1464 case MLO_AN_FIXED: 1465 phylink_get_fixed_state(pl, &link_state); 1466 break; 1467 1468 case MLO_AN_INBAND: 1469 link_state = pl->link_config; 1470 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1471 link_state.pause = MLO_PAUSE_NONE; 1472 break; 1473 1474 default: /* can't happen */ 1475 return; 1476 } 1477 1478 link_state.link = false; 1479 1480 phylink_apply_manual_flow(pl, &link_state); 1481 if (phy) 1482 mutex_lock(&phy->lock); 1483 phylink_major_config(pl, force_restart, &link_state); 1484 if (phy) 1485 mutex_unlock(&phy->lock); 1486 } 1487 1488 static const char *phylink_pause_to_str(int pause) 1489 { 1490 switch (pause & MLO_PAUSE_TXRX_MASK) { 1491 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1492 return "rx/tx"; 1493 case MLO_PAUSE_TX: 1494 return "tx"; 1495 case MLO_PAUSE_RX: 1496 return "rx"; 1497 default: 1498 return "off"; 1499 } 1500 } 1501 1502 static void phylink_deactivate_lpi(struct phylink *pl) 1503 { 1504 if (pl->mac_enable_tx_lpi) { 1505 pl->mac_enable_tx_lpi = false; 1506 1507 phylink_dbg(pl, "disabling LPI\n"); 1508 1509 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1510 1511 phylink_pcs_disable_eee(pl->pcs); 1512 } 1513 } 1514 1515 static void phylink_activate_lpi(struct phylink *pl) 1516 { 1517 int err; 1518 1519 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1520 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1521 phy_modes(pl->cur_interface)); 1522 return; 1523 } 1524 1525 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1526 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1527 1528 phylink_pcs_enable_eee(pl->pcs); 1529 1530 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1531 pl->mac_tx_clk_stop); 1532 if (err) { 1533 phylink_pcs_disable_eee(pl->pcs); 1534 phylink_err(pl, "%ps() failed: %pe\n", 1535 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1536 return; 1537 } 1538 1539 pl->mac_enable_tx_lpi = true; 1540 } 1541 1542 static void phylink_link_up(struct phylink *pl, 1543 struct phylink_link_state link_state) 1544 { 1545 struct net_device *ndev = pl->netdev; 1546 int speed, duplex; 1547 bool rx_pause; 1548 1549 speed = link_state.speed; 1550 duplex = link_state.duplex; 1551 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1552 1553 switch (link_state.rate_matching) { 1554 case RATE_MATCH_PAUSE: 1555 /* The PHY is doing rate matchion from the media rate (in 1556 * the link_state) to the interface speed, and will send 1557 * pause frames to the MAC to limit its transmission speed. 1558 */ 1559 speed = phylink_interface_max_speed(link_state.interface); 1560 duplex = DUPLEX_FULL; 1561 rx_pause = true; 1562 break; 1563 1564 case RATE_MATCH_CRS: 1565 /* The PHY is doing rate matchion from the media rate (in 1566 * the link_state) to the interface speed, and will cause 1567 * collisions to the MAC to limit its transmission speed. 1568 */ 1569 speed = phylink_interface_max_speed(link_state.interface); 1570 duplex = DUPLEX_HALF; 1571 break; 1572 } 1573 1574 pl->cur_interface = link_state.interface; 1575 1576 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1577 duplex); 1578 1579 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1580 pl->cur_interface, speed, duplex, 1581 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1582 1583 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1584 phylink_activate_lpi(pl); 1585 1586 if (ndev) 1587 netif_carrier_on(ndev); 1588 1589 phylink_info(pl, 1590 "Link is Up - %s/%s - flow control %s\n", 1591 phy_speed_to_str(link_state.speed), 1592 phy_duplex_to_str(link_state.duplex), 1593 phylink_pause_to_str(link_state.pause)); 1594 } 1595 1596 static void phylink_link_down(struct phylink *pl) 1597 { 1598 struct net_device *ndev = pl->netdev; 1599 1600 if (ndev) 1601 netif_carrier_off(ndev); 1602 1603 phylink_deactivate_lpi(pl); 1604 1605 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1606 pl->cur_interface); 1607 phylink_info(pl, "Link is Down\n"); 1608 } 1609 1610 static bool phylink_link_is_up(struct phylink *pl) 1611 { 1612 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1613 } 1614 1615 static void phylink_resolve(struct work_struct *w) 1616 { 1617 struct phylink *pl = container_of(w, struct phylink, resolve); 1618 struct phylink_link_state link_state; 1619 bool mac_config = false; 1620 bool retrigger = false; 1621 struct phy_device *phy; 1622 bool cur_link_state; 1623 1624 mutex_lock(&pl->phydev_mutex); 1625 phy = pl->phydev; 1626 if (phy) 1627 mutex_lock(&phy->lock); 1628 mutex_lock(&pl->state_mutex); 1629 cur_link_state = phylink_link_is_up(pl); 1630 1631 if (pl->phylink_disable_state) { 1632 pl->link_failed = false; 1633 link_state = pl->link_config; 1634 link_state.link = false; 1635 } else if (pl->link_failed) { 1636 link_state = pl->link_config; 1637 link_state.link = false; 1638 retrigger = true; 1639 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1640 phylink_get_fixed_state(pl, &link_state); 1641 mac_config = link_state.link; 1642 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1643 link_state = pl->phy_state; 1644 mac_config = link_state.link; 1645 } else { 1646 phylink_mac_pcs_get_state(pl, &link_state); 1647 1648 /* The PCS may have a latching link-fail indicator. If the link 1649 * was up, bring the link down and re-trigger the resolve. 1650 * Otherwise, re-read the PCS state to get the current status 1651 * of the link. 1652 */ 1653 if (!link_state.link) { 1654 if (cur_link_state) 1655 retrigger = true; 1656 else 1657 phylink_mac_pcs_get_state(pl, &link_state); 1658 } 1659 1660 /* If we have a phy, the "up" state is the union of both the 1661 * PHY and the MAC 1662 */ 1663 if (phy) 1664 link_state.link &= pl->phy_state.link; 1665 1666 /* Only update if the PHY link is up */ 1667 if (phy && pl->phy_state.link) { 1668 /* If the interface has changed, force a link down 1669 * event if the link isn't already down, and re-resolve. 1670 */ 1671 if (link_state.interface != pl->phy_state.interface) { 1672 retrigger = true; 1673 link_state.link = false; 1674 } 1675 1676 link_state.interface = pl->phy_state.interface; 1677 1678 /* If we are doing rate matching, then the link 1679 * speed/duplex comes from the PHY 1680 */ 1681 if (pl->phy_state.rate_matching) { 1682 link_state.rate_matching = 1683 pl->phy_state.rate_matching; 1684 link_state.speed = pl->phy_state.speed; 1685 link_state.duplex = pl->phy_state.duplex; 1686 } 1687 1688 /* If we have a PHY, we need to update with the PHY 1689 * flow control bits. 1690 */ 1691 link_state.pause = pl->phy_state.pause; 1692 mac_config = true; 1693 } 1694 } 1695 1696 if (pl->act_link_an_mode != MLO_AN_FIXED) 1697 phylink_apply_manual_flow(pl, &link_state); 1698 1699 if ((mac_config && link_state.interface != pl->link_config.interface) || 1700 pl->force_major_config) { 1701 /* The interface has changed or a forced major configuration 1702 * was requested, so force the link down and then reconfigure. 1703 */ 1704 if (cur_link_state) { 1705 phylink_link_down(pl); 1706 cur_link_state = false; 1707 } 1708 phylink_major_config(pl, false, &link_state); 1709 pl->link_config.interface = link_state.interface; 1710 pl->force_major_config = false; 1711 } 1712 1713 /* If configuration of the interface failed, force the link down 1714 * until we get a successful configuration. 1715 */ 1716 if (pl->major_config_failed) 1717 link_state.link = false; 1718 1719 if (link_state.link != cur_link_state) { 1720 pl->old_link_state = link_state.link; 1721 if (!link_state.link) 1722 phylink_link_down(pl); 1723 else 1724 phylink_link_up(pl, link_state); 1725 } 1726 if (!link_state.link && retrigger) { 1727 pl->link_failed = false; 1728 queue_work(system_power_efficient_wq, &pl->resolve); 1729 } 1730 mutex_unlock(&pl->state_mutex); 1731 if (phy) 1732 mutex_unlock(&phy->lock); 1733 mutex_unlock(&pl->phydev_mutex); 1734 } 1735 1736 static void phylink_run_resolve(struct phylink *pl) 1737 { 1738 if (!pl->phylink_disable_state) 1739 queue_work(system_power_efficient_wq, &pl->resolve); 1740 } 1741 1742 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1743 { 1744 unsigned long state = pl->phylink_disable_state; 1745 1746 set_bit(bit, &pl->phylink_disable_state); 1747 if (state == 0) { 1748 queue_work(system_power_efficient_wq, &pl->resolve); 1749 flush_work(&pl->resolve); 1750 } 1751 } 1752 1753 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1754 { 1755 clear_bit(bit, &pl->phylink_disable_state); 1756 phylink_run_resolve(pl); 1757 } 1758 1759 static void phylink_fixed_poll(struct timer_list *t) 1760 { 1761 struct phylink *pl = container_of(t, struct phylink, link_poll); 1762 1763 mod_timer(t, jiffies + HZ); 1764 1765 phylink_run_resolve(pl); 1766 } 1767 1768 static const struct sfp_upstream_ops sfp_phylink_ops; 1769 1770 static int phylink_register_sfp(struct phylink *pl, 1771 const struct fwnode_handle *fwnode) 1772 { 1773 struct sfp_bus *bus; 1774 int ret; 1775 1776 if (!fwnode) 1777 return 0; 1778 1779 bus = sfp_bus_find_fwnode(fwnode); 1780 if (IS_ERR(bus)) { 1781 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1782 return PTR_ERR(bus); 1783 } 1784 1785 pl->sfp_bus = bus; 1786 1787 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1788 sfp_bus_put(bus); 1789 1790 return ret; 1791 } 1792 1793 /** 1794 * phylink_set_fixed_link() - set the fixed link 1795 * @pl: a pointer to a &struct phylink returned from phylink_create() 1796 * @state: a pointer to a struct phylink_link_state. 1797 * 1798 * This function is used when the link parameters are known and do not change, 1799 * making it suitable for certain types of network connections. 1800 * 1801 * Returns: zero on success or negative error code. 1802 */ 1803 int phylink_set_fixed_link(struct phylink *pl, 1804 const struct phylink_link_state *state) 1805 { 1806 const struct link_capabilities *c; 1807 unsigned long *adv; 1808 1809 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1810 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1811 return -EINVAL; 1812 1813 c = phy_caps_lookup(state->speed, state->duplex, 1814 pl->supported, true); 1815 if (!c) 1816 return -EINVAL; 1817 1818 adv = pl->link_config.advertising; 1819 linkmode_and(adv, pl->supported, c->linkmodes); 1820 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1821 1822 pl->link_config.speed = state->speed; 1823 pl->link_config.duplex = state->duplex; 1824 pl->link_config.link = 1; 1825 pl->link_config.an_complete = 1; 1826 1827 pl->cfg_link_an_mode = MLO_AN_FIXED; 1828 pl->req_link_an_mode = pl->cfg_link_an_mode; 1829 1830 return 0; 1831 } 1832 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1833 1834 /** 1835 * phylink_create() - create a phylink instance 1836 * @config: a pointer to the target &struct phylink_config 1837 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1838 * interface 1839 * @iface: the desired link mode defined by &typedef phy_interface_t 1840 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1841 * 1842 * Create a new phylink instance, and parse the link parameters found in @np. 1843 * This will parse in-band modes, fixed-link or SFP configuration. 1844 * 1845 * Note: the rtnl lock must not be held when calling this function. 1846 * 1847 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1848 * must use IS_ERR() to check for errors from this function. 1849 */ 1850 struct phylink *phylink_create(struct phylink_config *config, 1851 const struct fwnode_handle *fwnode, 1852 phy_interface_t iface, 1853 const struct phylink_mac_ops *mac_ops) 1854 { 1855 struct phylink *pl; 1856 int ret; 1857 1858 /* Validate the supplied configuration */ 1859 if (phy_interface_empty(config->supported_interfaces)) { 1860 dev_err(config->dev, 1861 "phylink: error: empty supported_interfaces\n"); 1862 return ERR_PTR(-EINVAL); 1863 } 1864 1865 pl = kzalloc_obj(*pl); 1866 if (!pl) 1867 return ERR_PTR(-ENOMEM); 1868 1869 mutex_init(&pl->phydev_mutex); 1870 mutex_init(&pl->state_mutex); 1871 INIT_WORK(&pl->resolve, phylink_resolve); 1872 1873 pl->config = config; 1874 if (config->type == PHYLINK_NETDEV) { 1875 pl->netdev = to_net_dev(config->dev); 1876 netif_carrier_off(pl->netdev); 1877 } else if (config->type == PHYLINK_DEV) { 1878 pl->dev = config->dev; 1879 } else { 1880 ret = -EINVAL; 1881 goto free_pl; 1882 } 1883 1884 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1885 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1886 pl->config->lpi_capabilities && 1887 !phy_interface_empty(pl->config->lpi_interfaces); 1888 1889 /* Set the default EEE configuration */ 1890 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1891 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1892 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1893 1894 pl->phy_state.interface = iface; 1895 pl->link_interface = iface; 1896 if (iface == PHY_INTERFACE_MODE_MOCA) 1897 pl->link_port = PORT_BNC; 1898 else 1899 pl->link_port = PORT_MII; 1900 pl->link_config.interface = iface; 1901 pl->link_config.pause = MLO_PAUSE_AN; 1902 pl->link_config.speed = SPEED_UNKNOWN; 1903 pl->link_config.duplex = DUPLEX_UNKNOWN; 1904 pl->pcs_state = PCS_STATE_DOWN; 1905 pl->mac_ops = mac_ops; 1906 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1907 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1908 1909 linkmode_fill(pl->supported); 1910 linkmode_copy(pl->link_config.advertising, pl->supported); 1911 phylink_validate(pl, pl->supported, &pl->link_config); 1912 1913 ret = phylink_parse_mode(pl, fwnode); 1914 if (ret < 0) 1915 goto free_pl; 1916 1917 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1918 ret = phylink_parse_fixedlink(pl, fwnode); 1919 if (ret < 0) 1920 goto release_link_gpio; 1921 } 1922 1923 pl->req_link_an_mode = pl->cfg_link_an_mode; 1924 1925 ret = phylink_register_sfp(pl, fwnode); 1926 if (ret < 0) 1927 goto release_link_gpio; 1928 1929 return pl; 1930 1931 release_link_gpio: 1932 if (pl->link_gpio) 1933 gpiod_put(pl->link_gpio); 1934 free_pl: 1935 kfree(pl); 1936 return ERR_PTR(ret); 1937 } 1938 EXPORT_SYMBOL_GPL(phylink_create); 1939 1940 /** 1941 * phylink_destroy() - cleanup and destroy the phylink instance 1942 * @pl: a pointer to a &struct phylink returned from phylink_create() 1943 * 1944 * Destroy a phylink instance. Any PHY that has been attached must have been 1945 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1946 * 1947 * Note: the rtnl lock must not be held when calling this function. 1948 */ 1949 void phylink_destroy(struct phylink *pl) 1950 { 1951 sfp_bus_del_upstream(pl->sfp_bus); 1952 if (pl->link_gpio) 1953 gpiod_put(pl->link_gpio); 1954 1955 cancel_work_sync(&pl->resolve); 1956 kfree(pl); 1957 } 1958 EXPORT_SYMBOL_GPL(phylink_destroy); 1959 1960 /** 1961 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1962 * @pl: a pointer to a &struct phylink returned from phylink_create() 1963 * 1964 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1965 * no PHY is needed. 1966 * 1967 * Returns true if phylink will be expecting a PHY. 1968 */ 1969 bool phylink_expects_phy(struct phylink *pl) 1970 { 1971 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 1972 return false; 1973 return true; 1974 } 1975 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1976 1977 static void phylink_phy_change(struct phy_device *phydev, bool up) 1978 { 1979 struct phylink *pl = phydev->phylink; 1980 bool tx_pause, rx_pause; 1981 1982 phy_get_pause(phydev, &tx_pause, &rx_pause); 1983 1984 mutex_lock(&pl->state_mutex); 1985 pl->phy_state.speed = phydev->speed; 1986 pl->phy_state.duplex = phydev->duplex; 1987 pl->phy_state.rate_matching = phydev->rate_matching; 1988 pl->phy_state.pause = MLO_PAUSE_NONE; 1989 if (tx_pause) 1990 pl->phy_state.pause |= MLO_PAUSE_TX; 1991 if (rx_pause) 1992 pl->phy_state.pause |= MLO_PAUSE_RX; 1993 pl->phy_state.interface = phydev->interface; 1994 pl->phy_state.link = up; 1995 if (!up) 1996 pl->link_failed = true; 1997 1998 /* Get the LPI state from phylib */ 1999 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 2000 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 2001 mutex_unlock(&pl->state_mutex); 2002 2003 phylink_run_resolve(pl); 2004 2005 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 2006 up ? "up" : "down", 2007 phy_modes(phydev->interface), 2008 phy_speed_to_str(phydev->speed), 2009 phy_duplex_to_str(phydev->duplex), 2010 phy_rate_matching_to_str(phydev->rate_matching), 2011 phylink_pause_to_str(pl->phy_state.pause), 2012 phydev->enable_tx_lpi ? "" : "no"); 2013 } 2014 2015 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2016 unsigned long *supported, 2017 struct phylink_link_state *state) 2018 { 2019 DECLARE_PHY_INTERFACE_MASK(interfaces); 2020 2021 /* If the PHY provides a bitmap of the interfaces it will be using 2022 * depending on the negotiated media speeds, use this to validate 2023 * which ethtool link modes can be used. 2024 */ 2025 if (!phy_interface_empty(phy->possible_interfaces)) { 2026 /* We only care about the union of the PHY's interfaces and 2027 * those which the host supports. 2028 */ 2029 phy_interface_and(interfaces, phy->possible_interfaces, 2030 pl->config->supported_interfaces); 2031 2032 if (phy_interface_empty(interfaces)) { 2033 phylink_err(pl, "PHY has no common interfaces\n"); 2034 return -EINVAL; 2035 } 2036 2037 if (phy_on_sfp(phy)) { 2038 /* If the PHY is on a SFP, limit the interfaces to 2039 * those that can be used with a SFP module. 2040 */ 2041 phy_interface_and(interfaces, interfaces, 2042 phylink_sfp_interfaces); 2043 2044 if (phy_interface_empty(interfaces)) { 2045 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2046 return -EINVAL; 2047 } 2048 } 2049 2050 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2051 phydev_name(phy), 2052 (int)PHY_INTERFACE_MODE_MAX, 2053 phy->possible_interfaces, 2054 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2055 2056 return phylink_validate_mask(pl, phy, supported, state, 2057 interfaces); 2058 } 2059 2060 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2061 phydev_name(phy)); 2062 2063 /* Check whether we would use rate matching for the proposed interface 2064 * mode. 2065 */ 2066 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2067 2068 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2069 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2070 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2071 * their Serdes is either unnecessary or not reasonable. 2072 * 2073 * For these which switch interface modes, we really need to know which 2074 * interface modes the PHY supports to properly work out which ethtool 2075 * linkmodes can be supported. For now, as a work-around, we validate 2076 * against all interface modes, which may lead to more ethtool link 2077 * modes being advertised than are actually supported. 2078 */ 2079 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2080 state->interface != PHY_INTERFACE_MODE_RXAUI && 2081 state->interface != PHY_INTERFACE_MODE_XAUI && 2082 state->interface != PHY_INTERFACE_MODE_USXGMII) 2083 state->interface = PHY_INTERFACE_MODE_NA; 2084 2085 return phylink_validate(pl, supported, state); 2086 } 2087 2088 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2089 phy_interface_t interface) 2090 { 2091 struct phylink_link_state config; 2092 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2093 char *irq_str; 2094 int ret; 2095 2096 /* 2097 * This is the new way of dealing with flow control for PHYs, 2098 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2099 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 2100 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 2101 * capabilities and must NOT change the phy's pause settings directly. 2102 */ 2103 phy_support_asym_pause(phy); 2104 2105 memset(&config, 0, sizeof(config)); 2106 linkmode_copy(supported, phy->supported); 2107 linkmode_copy(config.advertising, phy->advertising); 2108 config.interface = interface; 2109 2110 ret = phylink_validate_phy(pl, phy, supported, &config); 2111 if (ret) { 2112 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2113 phy_modes(config.interface), 2114 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2115 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2116 ERR_PTR(ret)); 2117 return ret; 2118 } 2119 2120 phy->phylink = pl; 2121 phy->phy_link_change = phylink_phy_change; 2122 2123 irq_str = phy_attached_info_irq(phy); 2124 phylink_info(pl, 2125 "PHY [%s] driver [%s] (irq=%s)\n", 2126 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2127 kfree(irq_str); 2128 2129 mutex_lock(&pl->phydev_mutex); 2130 mutex_lock(&phy->lock); 2131 mutex_lock(&pl->state_mutex); 2132 pl->phy_state.interface = interface; 2133 pl->phy_state.pause = MLO_PAUSE_NONE; 2134 pl->phy_state.speed = SPEED_UNKNOWN; 2135 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2136 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2137 linkmode_copy(pl->supported, supported); 2138 linkmode_copy(pl->link_config.advertising, config.advertising); 2139 2140 /* Restrict the phy advertisement according to the MAC support. */ 2141 linkmode_copy(phy->advertising, config.advertising); 2142 2143 /* If the MAC supports phylink managed EEE, restrict the EEE 2144 * advertisement according to the MAC's LPI capabilities. 2145 */ 2146 if (pl->mac_supports_eee) { 2147 /* If EEE is enabled, then we need to call phy_support_eee() 2148 * to ensure that the advertising mask is appropriately set. 2149 * This also enables EEE at the PHY. 2150 */ 2151 if (pl->eee_cfg.eee_enabled) 2152 phy_support_eee(phy); 2153 2154 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2155 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2156 2157 /* Convert the MAC's LPI capabilities to linkmodes */ 2158 linkmode_zero(pl->supported_lpi); 2159 phylink_caps_to_linkmodes(pl->supported_lpi, 2160 pl->config->lpi_capabilities); 2161 2162 /* Restrict the PHYs EEE support/advertisement to the modes 2163 * that the MAC supports. 2164 */ 2165 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2166 pl->supported_lpi); 2167 } else if (pl->mac_supports_eee_ops) { 2168 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2169 phy_disable_eee(phy); 2170 } 2171 2172 mutex_unlock(&pl->state_mutex); 2173 mutex_unlock(&phy->lock); 2174 mutex_unlock(&pl->phydev_mutex); 2175 2176 phylink_dbg(pl, 2177 "phy: %s setting supported %*pb advertising %*pb\n", 2178 phy_modes(interface), 2179 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2180 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2181 2182 if (pl->config->mac_managed_pm) 2183 phy->mac_managed_pm = true; 2184 2185 /* Allow the MAC to stop its clock if the PHY has the capability */ 2186 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2187 2188 if (pl->mac_supports_eee_ops) { 2189 /* Explicitly configure whether the PHY is allowed to stop it's 2190 * receive clock. 2191 */ 2192 ret = phy_eee_rx_clock_stop(phy, 2193 pl->config->eee_rx_clk_stop_enable); 2194 if (ret == -EOPNOTSUPP) 2195 ret = 0; 2196 } 2197 2198 if (ret) 2199 return ret; 2200 2201 /* Nothing below can fail, so the PHY can be recorded now. Doing it 2202 * here rather than above keeps a failed bringup from leaving 2203 * pl->phydev pointing at a PHY the caller is about to detach. 2204 */ 2205 mutex_lock(&pl->phydev_mutex); 2206 mutex_lock(&phy->lock); 2207 mutex_lock(&pl->state_mutex); 2208 pl->phydev = phy; 2209 mutex_unlock(&pl->state_mutex); 2210 mutex_unlock(&phy->lock); 2211 mutex_unlock(&pl->phydev_mutex); 2212 2213 if (phy_interrupt_is_valid(phy)) 2214 phy_request_interrupt(phy); 2215 2216 return 0; 2217 } 2218 2219 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2220 phy_interface_t interface) 2221 { 2222 u32 flags = 0; 2223 2224 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED)) 2225 return -EINVAL; 2226 2227 if (pl->phydev) 2228 return -EBUSY; 2229 2230 if (pl->config->mac_requires_rxc) 2231 flags |= PHY_F_RXC_ALWAYS_ON; 2232 2233 return phy_attach_direct(pl->netdev, phy, flags, interface); 2234 } 2235 2236 /** 2237 * phylink_connect_phy() - connect a PHY to the phylink instance 2238 * @pl: a pointer to a &struct phylink returned from phylink_create() 2239 * @phy: a pointer to a &struct phy_device. 2240 * 2241 * Connect @phy to the phylink instance specified by @pl by calling 2242 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2243 * capabilities, start the PHYLIB state machine and enable any interrupts 2244 * that the PHY supports. 2245 * 2246 * This updates the phylink's ethtool supported and advertising link mode 2247 * masks. 2248 * 2249 * Returns 0 on success or a negative errno. 2250 */ 2251 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2252 { 2253 int ret; 2254 2255 /* Use PHY device/driver interface */ 2256 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2257 pl->link_interface = phy->interface; 2258 pl->link_config.interface = pl->link_interface; 2259 } 2260 2261 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2262 if (ret < 0) 2263 return ret; 2264 2265 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2266 if (ret) 2267 phy_detach(phy); 2268 2269 return ret; 2270 } 2271 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2272 2273 /** 2274 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2275 * @pl: a pointer to a &struct phylink returned from phylink_create() 2276 * @dn: a pointer to a &struct device_node. 2277 * @flags: PHY-specific flags to communicate to the PHY device driver 2278 * 2279 * Connect the phy specified in the device node @dn to the phylink instance 2280 * specified by @pl. Actions specified in phylink_connect_phy() will be 2281 * performed. 2282 * 2283 * Returns 0 on success or a negative errno. 2284 */ 2285 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2286 u32 flags) 2287 { 2288 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2289 } 2290 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2291 2292 /** 2293 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2294 * @pl: a pointer to a &struct phylink returned from phylink_create() 2295 * @fwnode: a pointer to a &struct fwnode_handle. 2296 * @flags: PHY-specific flags to communicate to the PHY device driver 2297 * 2298 * Connect the phy specified @fwnode to the phylink instance specified 2299 * by @pl. 2300 * 2301 * Returns 0 on success or a negative errno. 2302 */ 2303 int phylink_fwnode_phy_connect(struct phylink *pl, 2304 const struct fwnode_handle *fwnode, 2305 u32 flags) 2306 { 2307 struct fwnode_handle *phy_fwnode; 2308 struct phy_device *phy_dev; 2309 int ret; 2310 2311 if (!phylink_expects_phy(pl)) 2312 return 0; 2313 2314 phy_fwnode = fwnode_get_phy_node(fwnode); 2315 if (IS_ERR(phy_fwnode)) { 2316 /* PHY mode requires a PHY to be specified. */ 2317 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2318 return -ENODEV; 2319 return 0; 2320 } 2321 2322 phy_dev = fwnode_phy_find_device(phy_fwnode); 2323 /* We're done with the phy_node handle */ 2324 fwnode_handle_put(phy_fwnode); 2325 if (!phy_dev) 2326 return -ENODEV; 2327 2328 /* Use PHY device/driver interface */ 2329 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2330 pl->link_interface = phy_dev->interface; 2331 pl->link_config.interface = pl->link_interface; 2332 } 2333 2334 if (pl->config->mac_requires_rxc) 2335 flags |= PHY_F_RXC_ALWAYS_ON; 2336 2337 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2338 pl->link_interface); 2339 phy_device_free(phy_dev); 2340 if (ret) 2341 return ret; 2342 2343 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2344 if (ret) 2345 phy_detach(phy_dev); 2346 2347 return ret; 2348 } 2349 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2350 2351 /** 2352 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2353 * instance. 2354 * @pl: a pointer to a &struct phylink returned from phylink_create() 2355 * 2356 * Disconnect any current PHY from the phylink instance described by @pl. 2357 */ 2358 void phylink_disconnect_phy(struct phylink *pl) 2359 { 2360 struct phy_device *phy; 2361 2362 ASSERT_RTNL(); 2363 2364 mutex_lock(&pl->phydev_mutex); 2365 phy = pl->phydev; 2366 if (phy) { 2367 mutex_lock(&phy->lock); 2368 mutex_lock(&pl->state_mutex); 2369 pl->phydev = NULL; 2370 pl->phy_enable_tx_lpi = false; 2371 pl->mac_tx_clk_stop = false; 2372 mutex_unlock(&pl->state_mutex); 2373 mutex_unlock(&phy->lock); 2374 } 2375 mutex_unlock(&pl->phydev_mutex); 2376 2377 if (phy) { 2378 flush_work(&pl->resolve); 2379 phy_disconnect(phy); 2380 } 2381 } 2382 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2383 2384 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2385 { 2386 if (!up) 2387 pl->link_failed = true; 2388 phylink_run_resolve(pl); 2389 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2390 } 2391 2392 /** 2393 * phylink_mac_change() - notify phylink of a change in MAC state 2394 * @pl: a pointer to a &struct phylink returned from phylink_create() 2395 * @up: indicates whether the link is currently up. 2396 * 2397 * The MAC driver should call this driver when the state of its link 2398 * changes (eg, link failure, new negotiation results, etc.) 2399 */ 2400 void phylink_mac_change(struct phylink *pl, bool up) 2401 { 2402 phylink_link_changed(pl, up, "mac"); 2403 } 2404 EXPORT_SYMBOL_GPL(phylink_mac_change); 2405 2406 /** 2407 * phylink_pcs_change() - notify phylink of a change to PCS link state 2408 * @pcs: pointer to &struct phylink_pcs 2409 * @up: indicates whether the link is currently up. 2410 * 2411 * The PCS driver should call this when the state of its link changes 2412 * (e.g. link failure, new negotiation results, etc.) Note: it should 2413 * not determine "up" by reading the BMSR. If in doubt about the link 2414 * state at interrupt time, then pass true if pcs_get_state() returns 2415 * the latched link-down state, otherwise pass false. 2416 */ 2417 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2418 { 2419 struct phylink *pl = pcs->phylink; 2420 2421 if (pl) 2422 phylink_link_changed(pl, up, "pcs"); 2423 } 2424 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2425 2426 static irqreturn_t phylink_link_handler(int irq, void *data) 2427 { 2428 struct phylink *pl = data; 2429 2430 phylink_run_resolve(pl); 2431 2432 return IRQ_HANDLED; 2433 } 2434 2435 /** 2436 * phylink_start() - start a phylink instance 2437 * @pl: a pointer to a &struct phylink returned from phylink_create() 2438 * 2439 * Start the phylink instance specified by @pl, configuring the MAC for the 2440 * desired link mode(s) and negotiation style. This should be called from the 2441 * network device driver's &struct net_device_ops ndo_open() method. 2442 */ 2443 void phylink_start(struct phylink *pl) 2444 { 2445 bool poll = false; 2446 2447 ASSERT_RTNL(); 2448 2449 phylink_info(pl, "configuring for %s/%s link mode\n", 2450 phylink_an_mode_str(pl->req_link_an_mode), 2451 phy_modes(pl->link_config.interface)); 2452 2453 /* Always set the carrier off */ 2454 if (pl->netdev) 2455 netif_carrier_off(pl->netdev); 2456 2457 pl->pcs_state = PCS_STATE_STARTING; 2458 2459 /* Apply the link configuration to the MAC when starting. This allows 2460 * a fixed-link to start with the correct parameters, and also 2461 * ensures that we set the appropriate advertisement for Serdes links. 2462 * 2463 * Restart autonegotiation if using 802.3z to ensure that the link 2464 * parameters are properly negotiated. This is necessary for DSA 2465 * switches using 802.3z negotiation to ensure they see our modes. 2466 */ 2467 phylink_mac_initial_config(pl, true); 2468 2469 pl->pcs_state = PCS_STATE_STARTED; 2470 2471 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2472 2473 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2474 int irq = gpiod_to_irq(pl->link_gpio); 2475 2476 if (irq > 0) { 2477 if (!request_irq(irq, phylink_link_handler, 2478 IRQF_TRIGGER_RISING | 2479 IRQF_TRIGGER_FALLING, 2480 "netdev link", pl)) 2481 pl->link_irq = irq; 2482 else 2483 irq = 0; 2484 } 2485 if (irq <= 0) 2486 poll = true; 2487 } 2488 2489 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2490 poll |= pl->config->poll_fixed_state; 2491 2492 if (poll) 2493 mod_timer(&pl->link_poll, jiffies + HZ); 2494 if (pl->phydev) 2495 phy_start(pl->phydev); 2496 if (pl->sfp_bus) 2497 sfp_upstream_start(pl->sfp_bus); 2498 } 2499 EXPORT_SYMBOL_GPL(phylink_start); 2500 2501 /** 2502 * phylink_stop() - stop a phylink instance 2503 * @pl: a pointer to a &struct phylink returned from phylink_create() 2504 * 2505 * Stop the phylink instance specified by @pl. This should be called from the 2506 * network device driver's &struct net_device_ops ndo_stop() method. The 2507 * network device's carrier state should not be changed prior to calling this 2508 * function. 2509 * 2510 * This will synchronously bring down the link if the link is not already 2511 * down (in other words, it will trigger a mac_link_down() method call.) 2512 */ 2513 void phylink_stop(struct phylink *pl) 2514 { 2515 ASSERT_RTNL(); 2516 2517 if (pl->sfp_bus) 2518 sfp_upstream_stop(pl->sfp_bus); 2519 if (pl->phydev) 2520 phy_stop(pl->phydev); 2521 timer_delete_sync(&pl->link_poll); 2522 if (pl->link_irq) { 2523 free_irq(pl->link_irq, pl); 2524 pl->link_irq = 0; 2525 } 2526 2527 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2528 2529 pl->pcs_state = PCS_STATE_DOWN; 2530 2531 phylink_pcs_disable(pl->pcs); 2532 } 2533 EXPORT_SYMBOL_GPL(phylink_stop); 2534 2535 /** 2536 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2537 * @pl: a pointer to a &struct phylink returned from phylink_create() 2538 * 2539 * Disable the PHY's ability to stop the receive clock while the receive path 2540 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2541 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2542 */ 2543 void phylink_rx_clk_stop_block(struct phylink *pl) 2544 { 2545 ASSERT_RTNL(); 2546 2547 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2548 phylink_warn(pl, "%s called too many times - ignoring\n", 2549 __func__); 2550 dump_stack(); 2551 return; 2552 } 2553 2554 /* Disable PHY receive clock stop if this is the first time this 2555 * function has been called and clock-stop was previously enabled. 2556 */ 2557 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2558 pl->mac_supports_eee_ops && pl->phydev && 2559 pl->config->eee_rx_clk_stop_enable) 2560 phy_eee_rx_clock_stop(pl->phydev, false); 2561 } 2562 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2563 2564 /** 2565 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2566 * @pl: a pointer to a &struct phylink returned from phylink_create() 2567 * 2568 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2569 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2570 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2571 */ 2572 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2573 { 2574 ASSERT_RTNL(); 2575 2576 if (pl->mac_rx_clk_stop_blocked == 0) { 2577 phylink_warn(pl, "%s called too many times - ignoring\n", 2578 __func__); 2579 dump_stack(); 2580 return; 2581 } 2582 2583 /* Re-enable PHY receive clock stop if the number of unblocks matches 2584 * the number of calls to the block function above. 2585 */ 2586 if (--pl->mac_rx_clk_stop_blocked == 0 && 2587 pl->mac_supports_eee_ops && pl->phydev && 2588 pl->config->eee_rx_clk_stop_enable) 2589 phy_eee_rx_clock_stop(pl->phydev, true); 2590 } 2591 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2592 2593 static bool phylink_mac_supports_wol(struct phylink *pl) 2594 { 2595 return !!pl->mac_ops->mac_wol_set; 2596 } 2597 2598 static bool phylink_phy_supports_wol(struct phylink *pl, 2599 struct phy_device *phydev) 2600 { 2601 return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev)); 2602 } 2603 2604 static bool phylink_phy_pm_speed_ctrl(struct phylink *pl) 2605 { 2606 return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac && 2607 pl->phydev && phy_may_wakeup(pl->phydev); 2608 } 2609 2610 /** 2611 * phylink_suspend() - handle a network device suspend event 2612 * @pl: a pointer to a &struct phylink returned from phylink_create() 2613 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2614 * 2615 * Handle a network device suspend event. There are several cases: 2616 * 2617 * - If Wake-on-Lan is not active, we can bring down the link between 2618 * the MAC and PHY by calling phylink_stop(). 2619 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2620 * can also bring down the link between the MAC and PHY. 2621 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2622 * still needs to receive packets, so we can not bring the link down. 2623 * 2624 * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored. 2625 * (struct phylink_mac_ops.mac_set_wol populated.) 2626 */ 2627 void phylink_suspend(struct phylink *pl, bool mac_wol) 2628 { 2629 ASSERT_RTNL(); 2630 2631 if (phylink_mac_supports_wol(pl)) 2632 mac_wol = !!pl->wolopts_mac; 2633 2634 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2635 /* Wake-on-Lan enabled, MAC handling */ 2636 mutex_lock(&pl->state_mutex); 2637 2638 /* Stop the resolver bringing the link up */ 2639 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2640 2641 pl->suspend_link_up = phylink_link_is_up(pl); 2642 if (pl->suspend_link_up) { 2643 /* Disable the carrier, to prevent transmit timeouts, 2644 * but one would hope all packets have been sent. This 2645 * also means phylink_resolve() will do nothing. 2646 */ 2647 if (pl->netdev) 2648 netif_carrier_off(pl->netdev); 2649 pl->old_link_state = false; 2650 } 2651 2652 /* We do not call mac_link_down() here as we want the 2653 * link to remain up to receive the WoL packets. 2654 */ 2655 mutex_unlock(&pl->state_mutex); 2656 } else { 2657 phylink_stop(pl); 2658 } 2659 2660 if (phylink_phy_pm_speed_ctrl(pl)) 2661 phylink_speed_down(pl, false); 2662 } 2663 EXPORT_SYMBOL_GPL(phylink_suspend); 2664 2665 /** 2666 * phylink_prepare_resume() - prepare to resume a network device 2667 * @pl: a pointer to a &struct phylink returned from phylink_create() 2668 * 2669 * Optional, but if called must be called prior to phylink_resume(). 2670 * 2671 * Prepare to resume a network device, preparing the PHY as necessary. 2672 */ 2673 void phylink_prepare_resume(struct phylink *pl) 2674 { 2675 struct phy_device *phydev = pl->phydev; 2676 2677 ASSERT_RTNL(); 2678 2679 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2680 * when PDOWN is set. However, some MACs require RXC to be running 2681 * in order to resume. If the MAC requires RXC, and we have a PHY, 2682 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2683 * the clock meets requirements. We do not implement this delay. 2684 */ 2685 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2686 phy_resume(phydev); 2687 } 2688 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2689 2690 /** 2691 * phylink_resume() - handle a network device resume event 2692 * @pl: a pointer to a &struct phylink returned from phylink_create() 2693 * 2694 * Undo the effects of phylink_suspend(), returning the link to an 2695 * operational state. 2696 */ 2697 void phylink_resume(struct phylink *pl) 2698 { 2699 ASSERT_RTNL(); 2700 2701 if (phylink_phy_pm_speed_ctrl(pl)) 2702 phylink_speed_up(pl); 2703 2704 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2705 /* Wake-on-Lan enabled, MAC handling */ 2706 2707 if (pl->suspend_link_up) { 2708 /* Call mac_link_down() so we keep the overall state 2709 * balanced. Do this under the state_mutex lock for 2710 * consistency. This will cause a "Link Down" message 2711 * to be printed during resume, which is harmless - 2712 * the true link state will be printed when we run a 2713 * resolve. 2714 */ 2715 mutex_lock(&pl->state_mutex); 2716 phylink_link_down(pl); 2717 mutex_unlock(&pl->state_mutex); 2718 } 2719 2720 /* Re-apply the link parameters so that all the settings get 2721 * restored to the MAC. 2722 */ 2723 phylink_mac_initial_config(pl, true); 2724 2725 /* Re-enable and re-resolve the link parameters */ 2726 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2727 } else { 2728 phylink_start(pl); 2729 } 2730 } 2731 EXPORT_SYMBOL_GPL(phylink_resume); 2732 2733 /** 2734 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2735 * @pl: a pointer to a &struct phylink returned from phylink_create() 2736 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2737 * 2738 * Read the wake on lan parameters from the PHY attached to the phylink 2739 * instance specified by @pl. If no PHY is currently attached, report no 2740 * support for wake on lan. 2741 */ 2742 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2743 { 2744 ASSERT_RTNL(); 2745 2746 wol->supported = 0; 2747 wol->wolopts = 0; 2748 2749 if (phylink_mac_supports_wol(pl)) { 2750 if (phylink_phy_supports_wol(pl, pl->phydev)) 2751 phy_ethtool_get_wol(pl->phydev, wol); 2752 2753 /* Where the MAC augments the WoL support, merge its support and 2754 * current configuration. 2755 */ 2756 if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE) 2757 memcpy(wol->sopass, pl->wol_sopass, 2758 sizeof(wol->sopass)); 2759 2760 wol->supported |= pl->config->wol_mac_support; 2761 wol->wolopts |= pl->wolopts_mac; 2762 } else { 2763 /* Legacy */ 2764 if (pl->phydev) 2765 phy_ethtool_get_wol(pl->phydev, wol); 2766 } 2767 } 2768 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2769 2770 /** 2771 * phylink_ethtool_set_wol() - set wake on lan parameters 2772 * @pl: a pointer to a &struct phylink returned from phylink_create() 2773 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2774 * 2775 * Set the wake on lan parameters for the PHY attached to the phylink 2776 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2777 * error. 2778 * 2779 * Returns zero on success or negative errno code. 2780 */ 2781 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2782 { 2783 struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL }; 2784 int ret = -EOPNOTSUPP; 2785 bool changed; 2786 u32 wolopts; 2787 2788 ASSERT_RTNL(); 2789 2790 if (phylink_mac_supports_wol(pl)) { 2791 wolopts = wol->wolopts; 2792 2793 if (phylink_phy_supports_wol(pl, pl->phydev)) { 2794 ret = phy_ethtool_set_wol(pl->phydev, wol); 2795 if (ret != 0 && ret != -EOPNOTSUPP) 2796 return ret; 2797 2798 phy_ethtool_get_wol(pl->phydev, &w); 2799 2800 /* Any Wake-on-Lan modes which the PHY is handling 2801 * should not be passed on to the MAC. 2802 */ 2803 wolopts &= ~w.wolopts; 2804 } 2805 2806 wolopts &= pl->config->wol_mac_support; 2807 changed = pl->wolopts_mac != wolopts; 2808 if (wolopts & WAKE_MAGICSECURE) 2809 changed |= !!memcmp(wol->sopass, pl->wol_sopass, 2810 sizeof(wol->sopass)); 2811 memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass)); 2812 2813 if (changed) { 2814 ret = pl->mac_ops->mac_wol_set(pl->config, wolopts, 2815 wol->sopass); 2816 if (!ret) 2817 pl->wolopts_mac = wolopts; 2818 } else { 2819 ret = 0; 2820 } 2821 } else { 2822 if (pl->phydev) 2823 ret = phy_ethtool_set_wol(pl->phydev, wol); 2824 } 2825 2826 return ret; 2827 } 2828 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2829 2830 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2831 const unsigned long *link_modes) 2832 { 2833 phy_interface_t interface; 2834 2835 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2836 if (interface == PHY_INTERFACE_MODE_NA) { 2837 phylink_err(pl, 2838 "selection of interface failed, advertisement %*pb\n", 2839 __ETHTOOL_LINK_MODE_MASK_NBITS, 2840 link_modes); 2841 return interface; 2842 } 2843 2844 if (!test_bit(interface, pl->config->supported_interfaces)) { 2845 phylink_err(pl, 2846 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2847 phy_modes(interface), interface, 2848 (int)PHY_INTERFACE_MODE_MAX, 2849 pl->config->supported_interfaces); 2850 return PHY_INTERFACE_MODE_NA; 2851 } 2852 2853 return interface; 2854 } 2855 2856 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2857 u32 speed) 2858 { 2859 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2860 phy_interface_t interface; 2861 u32 max_speed; 2862 int i; 2863 2864 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2865 interface = phylink_sfp_interface_preference[i]; 2866 if (!test_bit(interface, pl->sfp_interfaces)) 2867 continue; 2868 2869 max_speed = phylink_interface_max_speed(interface); 2870 2871 /* The logic here is: if speed == max_speed, then we've found 2872 * the best interface. Otherwise we find the interface that 2873 * can just support the requested speed. 2874 */ 2875 if (max_speed >= speed) 2876 best_interface = interface; 2877 2878 if (max_speed <= speed) 2879 break; 2880 } 2881 2882 if (best_interface == PHY_INTERFACE_MODE_NA) 2883 phylink_err(pl, "selection of interface failed, speed %u\n", 2884 speed); 2885 2886 return best_interface; 2887 } 2888 2889 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2890 { 2891 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2892 2893 linkmode_zero(mask); 2894 phylink_set_port_modes(mask); 2895 2896 linkmode_and(dst, dst, mask); 2897 linkmode_or(dst, dst, b); 2898 } 2899 2900 static void phylink_get_ksettings(const struct phylink_link_state *state, 2901 struct ethtool_link_ksettings *kset) 2902 { 2903 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2904 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2905 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2906 kset->base.speed = state->speed; 2907 kset->base.duplex = state->duplex; 2908 } 2909 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2910 state->advertising) ? 2911 AUTONEG_ENABLE : AUTONEG_DISABLE; 2912 } 2913 2914 /** 2915 * phylink_ethtool_ksettings_get() - get the current link settings 2916 * @pl: a pointer to a &struct phylink returned from phylink_create() 2917 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2918 * 2919 * Read the current link settings for the phylink instance specified by @pl. 2920 * This will be the link settings read from the MAC, PHY or fixed link 2921 * settings depending on the current negotiation mode. 2922 */ 2923 int phylink_ethtool_ksettings_get(struct phylink *pl, 2924 struct ethtool_link_ksettings *kset) 2925 { 2926 struct phylink_link_state link_state; 2927 2928 ASSERT_RTNL(); 2929 2930 if (pl->phydev) 2931 phy_ethtool_ksettings_get(pl->phydev, kset); 2932 else 2933 kset->base.port = pl->link_port; 2934 2935 linkmode_copy(kset->link_modes.supported, pl->supported); 2936 2937 switch (pl->act_link_an_mode) { 2938 case MLO_AN_FIXED: 2939 /* We are using fixed settings. Report these as the 2940 * current link settings - and note that these also 2941 * represent the supported speeds/duplex/pause modes. 2942 */ 2943 phylink_get_fixed_state(pl, &link_state); 2944 phylink_get_ksettings(&link_state, kset); 2945 break; 2946 2947 case MLO_AN_INBAND: 2948 /* If there is a phy attached, then use the reported 2949 * settings from the phy with no modification. 2950 */ 2951 if (pl->phydev) 2952 break; 2953 2954 phylink_mac_pcs_get_state(pl, &link_state); 2955 2956 /* The MAC is reporting the link results from its own PCS 2957 * layer via in-band status. Report these as the current 2958 * link settings. 2959 */ 2960 phylink_get_ksettings(&link_state, kset); 2961 break; 2962 } 2963 2964 return 0; 2965 } 2966 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2967 2968 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2969 phy_interface_t interface, 2970 unsigned long *adv) 2971 { 2972 unsigned int inband = phylink_inband_caps(pl, interface); 2973 unsigned int mask; 2974 2975 /* If the PCS doesn't implement inband support, be permissive. */ 2976 if (!inband) 2977 return true; 2978 2979 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2980 mask = LINK_INBAND_ENABLE; 2981 else 2982 mask = LINK_INBAND_DISABLE; 2983 2984 /* Check whether the PCS implements the required mode */ 2985 return !!(inband & mask); 2986 } 2987 2988 /** 2989 * phylink_ethtool_ksettings_set() - set the link settings 2990 * @pl: a pointer to a &struct phylink returned from phylink_create() 2991 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2992 */ 2993 int phylink_ethtool_ksettings_set(struct phylink *pl, 2994 const struct ethtool_link_ksettings *kset) 2995 { 2996 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2997 const struct link_capabilities *c; 2998 struct phylink_link_state config; 2999 3000 ASSERT_RTNL(); 3001 3002 if (pl->phydev) { 3003 struct ethtool_link_ksettings phy_kset = *kset; 3004 3005 linkmode_and(phy_kset.link_modes.advertising, 3006 phy_kset.link_modes.advertising, 3007 pl->supported); 3008 3009 /* We can rely on phylib for this update; we also do not need 3010 * to update the pl->link_config settings: 3011 * - the configuration returned via ksettings_get() will come 3012 * from phylib whenever a PHY is present. 3013 * - link_config.interface will be updated by the PHY calling 3014 * back via phylink_phy_change() and a subsequent resolve. 3015 * - initial link configuration for PHY mode comes from the 3016 * last phy state updated via phylink_phy_change(). 3017 * - other configuration changes (e.g. pause modes) are 3018 * performed directly via phylib. 3019 * - if in in-band mode with a PHY, the link configuration 3020 * is passed on the link from the PHY, and all of 3021 * link_config.{speed,duplex,an_enabled,pause} are not used. 3022 * - the only possible use would be link_config.advertising 3023 * pause modes when in 1000base-X mode with a PHY, but in 3024 * the presence of a PHY, this should not be changed as that 3025 * should be determined from the media side advertisement. 3026 */ 3027 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 3028 } 3029 3030 config = pl->link_config; 3031 /* Mask out unsupported advertisements */ 3032 linkmode_and(config.advertising, kset->link_modes.advertising, 3033 pl->supported); 3034 3035 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 3036 switch (kset->base.autoneg) { 3037 case AUTONEG_DISABLE: 3038 /* Autonegotiation disabled, select a suitable speed and 3039 * duplex. 3040 */ 3041 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 3042 pl->supported, false); 3043 if (!c) 3044 return -EINVAL; 3045 3046 /* If we have a fixed link, refuse to change link parameters. 3047 * If the link parameters match, accept them but do nothing. 3048 */ 3049 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3050 if (c->speed != pl->link_config.speed || 3051 c->duplex != pl->link_config.duplex) 3052 return -EINVAL; 3053 return 0; 3054 } 3055 3056 config.speed = c->speed; 3057 config.duplex = c->duplex; 3058 break; 3059 3060 case AUTONEG_ENABLE: 3061 /* If we have a fixed link, allow autonegotiation (since that 3062 * is our default case) but do not allow the advertisement to 3063 * be changed. If the advertisement matches, simply return. 3064 */ 3065 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3066 if (!linkmode_equal(config.advertising, 3067 pl->link_config.advertising)) 3068 return -EINVAL; 3069 return 0; 3070 } 3071 3072 config.speed = SPEED_UNKNOWN; 3073 config.duplex = DUPLEX_UNKNOWN; 3074 break; 3075 3076 default: 3077 return -EINVAL; 3078 } 3079 3080 /* We have ruled out the case with a PHY attached, and the 3081 * fixed-link cases. All that is left are in-band links. 3082 */ 3083 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 3084 kset->base.autoneg == AUTONEG_ENABLE); 3085 3086 /* If this link is with an SFP, ensure that changes to advertised modes 3087 * also cause the associated interface to be selected such that the 3088 * link can be configured correctly. 3089 */ 3090 if (pl->sfp_bus) { 3091 if (kset->base.autoneg == AUTONEG_ENABLE) 3092 config.interface = 3093 phylink_sfp_select_interface(pl, 3094 config.advertising); 3095 else 3096 config.interface = 3097 phylink_sfp_select_interface_speed(pl, 3098 config.speed); 3099 if (config.interface == PHY_INTERFACE_MODE_NA) 3100 return -EINVAL; 3101 3102 /* Revalidate with the selected interface */ 3103 linkmode_copy(support, pl->supported); 3104 if (phylink_validate(pl, support, &config)) { 3105 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3106 phylink_an_mode_str(pl->req_link_an_mode), 3107 phy_modes(config.interface), 3108 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3109 return -EINVAL; 3110 } 3111 } else { 3112 /* Validate without changing the current supported mask. */ 3113 linkmode_copy(support, pl->supported); 3114 if (phylink_validate(pl, support, &config)) 3115 return -EINVAL; 3116 } 3117 3118 /* If autonegotiation is enabled, we must have an advertisement */ 3119 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3120 config.advertising) && 3121 phylink_is_empty_linkmode(config.advertising)) 3122 return -EINVAL; 3123 3124 /* Validate the autonegotiation state. We don't have a PHY in this 3125 * situation, so the PCS is the media-facing entity. 3126 */ 3127 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3128 config.advertising)) 3129 return -EINVAL; 3130 3131 mutex_lock(&pl->state_mutex); 3132 pl->link_config.speed = config.speed; 3133 pl->link_config.duplex = config.duplex; 3134 3135 if (pl->link_config.interface != config.interface) { 3136 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3137 /* We need to force the link down, then change the interface */ 3138 if (pl->old_link_state) { 3139 phylink_link_down(pl); 3140 pl->old_link_state = false; 3141 } 3142 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3143 &pl->phylink_disable_state)) 3144 phylink_major_config(pl, false, &config); 3145 pl->link_config.interface = config.interface; 3146 linkmode_copy(pl->link_config.advertising, config.advertising); 3147 } else if (!linkmode_equal(pl->link_config.advertising, 3148 config.advertising)) { 3149 linkmode_copy(pl->link_config.advertising, config.advertising); 3150 phylink_change_inband_advert(pl); 3151 } 3152 mutex_unlock(&pl->state_mutex); 3153 3154 return 0; 3155 } 3156 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3157 3158 /** 3159 * phylink_ethtool_nway_reset() - restart negotiation 3160 * @pl: a pointer to a &struct phylink returned from phylink_create() 3161 * 3162 * Restart negotiation for the phylink instance specified by @pl. This will 3163 * cause any attached phy to restart negotiation with the link partner, and 3164 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3165 * negotiation. 3166 * 3167 * Returns zero on success, or negative error code. 3168 */ 3169 int phylink_ethtool_nway_reset(struct phylink *pl) 3170 { 3171 int ret = 0; 3172 3173 ASSERT_RTNL(); 3174 3175 if (pl->phydev) 3176 ret = phy_restart_aneg(pl->phydev); 3177 phylink_pcs_an_restart(pl); 3178 3179 return ret; 3180 } 3181 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3182 3183 /** 3184 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3185 * @pl: a pointer to a &struct phylink returned from phylink_create() 3186 * @pause: a pointer to a &struct ethtool_pauseparam 3187 */ 3188 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3189 struct ethtool_pauseparam *pause) 3190 { 3191 ASSERT_RTNL(); 3192 3193 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3194 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3195 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3196 } 3197 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3198 3199 /** 3200 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3201 * @pl: a pointer to a &struct phylink returned from phylink_create() 3202 * @pause: a pointer to a &struct ethtool_pauseparam 3203 */ 3204 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3205 struct ethtool_pauseparam *pause) 3206 { 3207 struct phylink_link_state *config = &pl->link_config; 3208 bool manual_changed; 3209 int pause_state; 3210 3211 ASSERT_RTNL(); 3212 3213 if (pl->req_link_an_mode == MLO_AN_FIXED) 3214 return -EOPNOTSUPP; 3215 3216 if (!phylink_test(pl->supported, Pause) && 3217 !phylink_test(pl->supported, Asym_Pause)) 3218 return -EOPNOTSUPP; 3219 3220 if (!phylink_test(pl->supported, Asym_Pause) && 3221 pause->rx_pause != pause->tx_pause) 3222 return -EINVAL; 3223 3224 pause_state = 0; 3225 if (pause->autoneg) 3226 pause_state |= MLO_PAUSE_AN; 3227 if (pause->rx_pause) 3228 pause_state |= MLO_PAUSE_RX; 3229 if (pause->tx_pause) 3230 pause_state |= MLO_PAUSE_TX; 3231 3232 mutex_lock(&pl->state_mutex); 3233 /* 3234 * See the comments for linkmode_set_pause(), wrt the deficiencies 3235 * with the current implementation. A solution to this issue would 3236 * be: 3237 * ethtool Local device 3238 * rx tx Pause AsymDir 3239 * 0 0 0 0 3240 * 1 0 1 1 3241 * 0 1 0 1 3242 * 1 1 1 1 3243 * and then use the ethtool rx/tx enablement status to mask the 3244 * rx/tx pause resolution. 3245 */ 3246 linkmode_set_pause(config->advertising, pause->tx_pause, 3247 pause->rx_pause); 3248 3249 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3250 (!(pause_state & MLO_PAUSE_AN) && 3251 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3252 3253 config->pause = pause_state; 3254 3255 /* Update our in-band advertisement, triggering a renegotiation if 3256 * the advertisement changed. 3257 */ 3258 if (!pl->phydev) 3259 phylink_change_inband_advert(pl); 3260 3261 mutex_unlock(&pl->state_mutex); 3262 3263 /* If we have a PHY, a change of the pause frame advertisement will 3264 * cause phylib to renegotiate (if AN is enabled) which will in turn 3265 * call our phylink_phy_change() and trigger a resolve. Note that 3266 * we can't hold our state mutex while calling phy_set_asym_pause(). 3267 */ 3268 if (pl->phydev) 3269 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3270 pause->tx_pause); 3271 3272 /* If the manual pause settings changed, make sure we trigger a 3273 * resolve to update their state; we can not guarantee that the 3274 * link will cycle. 3275 */ 3276 if (manual_changed) { 3277 pl->link_failed = true; 3278 phylink_run_resolve(pl); 3279 } 3280 3281 return 0; 3282 } 3283 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3284 3285 /** 3286 * phylink_get_eee_err() - read the energy efficient ethernet error 3287 * counter 3288 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3289 * 3290 * Read the Energy Efficient Ethernet error counter from the PHY associated 3291 * with the phylink instance specified by @pl. 3292 * 3293 * Returns positive error counter value, or negative error code. 3294 */ 3295 int phylink_get_eee_err(struct phylink *pl) 3296 { 3297 int ret = 0; 3298 3299 ASSERT_RTNL(); 3300 3301 if (pl->phydev) 3302 ret = phy_get_eee_err(pl->phydev); 3303 3304 return ret; 3305 } 3306 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3307 3308 /** 3309 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3310 * @pl: a pointer to a &struct phylink returned from phylink_create() 3311 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3312 */ 3313 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3314 { 3315 int ret = -EOPNOTSUPP; 3316 3317 ASSERT_RTNL(); 3318 3319 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3320 return ret; 3321 3322 if (pl->phydev) { 3323 ret = phy_ethtool_get_eee(pl->phydev, eee); 3324 /* Restrict supported linkmode mask */ 3325 if (ret == 0 && pl->mac_supports_eee_ops) 3326 linkmode_and(eee->supported, eee->supported, 3327 pl->supported_lpi); 3328 } 3329 3330 return ret; 3331 } 3332 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3333 3334 /** 3335 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3336 * @pl: a pointer to a &struct phylink returned from phylink_create() 3337 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3338 */ 3339 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3340 { 3341 bool mac_eee = pl->mac_supports_eee; 3342 int ret = -EOPNOTSUPP; 3343 3344 ASSERT_RTNL(); 3345 3346 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3347 mac_eee ? "supports" : "does not support", 3348 eee->eee_enabled ? ", enabled" : "", 3349 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3350 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3351 3352 if (pl->mac_supports_eee_ops && !mac_eee) 3353 return ret; 3354 3355 if (pl->phydev) { 3356 /* Restrict advertisement mask */ 3357 if (pl->mac_supports_eee_ops) 3358 linkmode_and(eee->advertised, eee->advertised, 3359 pl->supported_lpi); 3360 ret = phy_ethtool_set_eee(pl->phydev, eee); 3361 if (ret == 0) 3362 eee_to_eeecfg(&pl->eee_cfg, eee); 3363 } 3364 3365 return ret; 3366 } 3367 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3368 3369 /* This emulates MII registers for a fixed-mode phy operating as per the 3370 * passed in state. "aneg" defines if we report negotiation is possible. 3371 * 3372 * FIXME: should deal with negotiation state too. 3373 */ 3374 static int phylink_mii_emul_read(unsigned int reg, 3375 struct phylink_link_state *state) 3376 { 3377 struct fixed_phy_status fs; 3378 unsigned long *lpa = state->lp_advertising; 3379 int val; 3380 3381 fs.link = state->link; 3382 fs.speed = state->speed; 3383 fs.duplex = state->duplex; 3384 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3385 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3386 3387 val = swphy_read_reg(reg, &fs); 3388 if (reg == MII_BMSR) { 3389 if (!state->an_complete) 3390 val &= ~BMSR_ANEGCOMPLETE; 3391 } 3392 return val; 3393 } 3394 3395 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3396 unsigned int reg) 3397 { 3398 struct phy_device *phydev = pl->phydev; 3399 int prtad, devad; 3400 3401 if (mdio_phy_id_is_c45(phy_id)) { 3402 prtad = mdio_phy_id_prtad(phy_id); 3403 devad = mdio_phy_id_devad(phy_id); 3404 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3405 reg); 3406 } 3407 3408 if (phydev->is_c45) { 3409 switch (reg) { 3410 case MII_BMCR: 3411 case MII_BMSR: 3412 case MII_PHYSID1: 3413 case MII_PHYSID2: 3414 devad = __ffs(phydev->c45_ids.mmds_present); 3415 break; 3416 case MII_ADVERTISE: 3417 case MII_LPA: 3418 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3419 return -EINVAL; 3420 devad = MDIO_MMD_AN; 3421 if (reg == MII_ADVERTISE) 3422 reg = MDIO_AN_ADVERTISE; 3423 else 3424 reg = MDIO_AN_LPA; 3425 break; 3426 default: 3427 return -EINVAL; 3428 } 3429 prtad = phy_id; 3430 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3431 reg); 3432 } 3433 3434 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3435 } 3436 3437 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3438 unsigned int reg, unsigned int val) 3439 { 3440 struct phy_device *phydev = pl->phydev; 3441 int prtad, devad; 3442 3443 if (mdio_phy_id_is_c45(phy_id)) { 3444 prtad = mdio_phy_id_prtad(phy_id); 3445 devad = mdio_phy_id_devad(phy_id); 3446 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3447 reg, val); 3448 } 3449 3450 if (phydev->is_c45) { 3451 switch (reg) { 3452 case MII_BMCR: 3453 case MII_BMSR: 3454 case MII_PHYSID1: 3455 case MII_PHYSID2: 3456 devad = __ffs(phydev->c45_ids.mmds_present); 3457 break; 3458 case MII_ADVERTISE: 3459 case MII_LPA: 3460 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3461 return -EINVAL; 3462 devad = MDIO_MMD_AN; 3463 if (reg == MII_ADVERTISE) 3464 reg = MDIO_AN_ADVERTISE; 3465 else 3466 reg = MDIO_AN_LPA; 3467 break; 3468 default: 3469 return -EINVAL; 3470 } 3471 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3472 reg, val); 3473 } 3474 3475 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3476 } 3477 3478 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3479 unsigned int reg) 3480 { 3481 struct phylink_link_state state; 3482 int val = 0xffff; 3483 3484 switch (pl->act_link_an_mode) { 3485 case MLO_AN_FIXED: 3486 if (phy_id == 0) { 3487 phylink_get_fixed_state(pl, &state); 3488 val = phylink_mii_emul_read(reg, &state); 3489 } 3490 break; 3491 3492 case MLO_AN_PHY: 3493 return -EOPNOTSUPP; 3494 3495 case MLO_AN_INBAND: 3496 if (phy_id == 0) { 3497 phylink_mac_pcs_get_state(pl, &state); 3498 val = phylink_mii_emul_read(reg, &state); 3499 } 3500 break; 3501 } 3502 3503 return val & 0xffff; 3504 } 3505 3506 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3507 unsigned int reg, unsigned int val) 3508 { 3509 switch (pl->act_link_an_mode) { 3510 case MLO_AN_FIXED: 3511 break; 3512 3513 case MLO_AN_PHY: 3514 return -EOPNOTSUPP; 3515 3516 case MLO_AN_INBAND: 3517 break; 3518 } 3519 3520 return 0; 3521 } 3522 3523 /** 3524 * phylink_mii_ioctl() - generic mii ioctl interface 3525 * @pl: a pointer to a &struct phylink returned from phylink_create() 3526 * @ifr: a pointer to a &struct ifreq for socket ioctls 3527 * @cmd: ioctl cmd to execute 3528 * 3529 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3530 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3531 * 3532 * Returns: zero on success or negative error code. 3533 * 3534 * %SIOCGMIIPHY: 3535 * read register from the current PHY. 3536 * %SIOCGMIIREG: 3537 * read register from the specified PHY. 3538 * %SIOCSMIIREG: 3539 * set a register on the specified PHY. 3540 */ 3541 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3542 { 3543 struct mii_ioctl_data *mii = if_mii(ifr); 3544 int ret; 3545 3546 ASSERT_RTNL(); 3547 3548 if (pl->phydev) { 3549 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3550 switch (cmd) { 3551 case SIOCGMIIPHY: 3552 mii->phy_id = pl->phydev->mdio.addr; 3553 fallthrough; 3554 3555 case SIOCGMIIREG: 3556 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3557 if (ret >= 0) { 3558 mii->val_out = ret; 3559 ret = 0; 3560 } 3561 break; 3562 3563 case SIOCSMIIREG: 3564 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3565 mii->val_in); 3566 break; 3567 3568 default: 3569 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3570 break; 3571 } 3572 } else { 3573 switch (cmd) { 3574 case SIOCGMIIPHY: 3575 mii->phy_id = 0; 3576 fallthrough; 3577 3578 case SIOCGMIIREG: 3579 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3580 if (ret >= 0) { 3581 mii->val_out = ret; 3582 ret = 0; 3583 } 3584 break; 3585 3586 case SIOCSMIIREG: 3587 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3588 mii->val_in); 3589 break; 3590 3591 default: 3592 ret = -EOPNOTSUPP; 3593 break; 3594 } 3595 } 3596 3597 return ret; 3598 } 3599 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3600 3601 /** 3602 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3603 * link partners 3604 * @pl: a pointer to a &struct phylink returned from phylink_create() 3605 * @sync: perform action synchronously 3606 * 3607 * If we have a PHY that is not part of a SFP module, then set the speed 3608 * as described in the phy_speed_down() function. Please see this function 3609 * for a description of the @sync parameter. 3610 * 3611 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3612 */ 3613 int phylink_speed_down(struct phylink *pl, bool sync) 3614 { 3615 int ret = 0; 3616 3617 ASSERT_RTNL(); 3618 3619 if (!pl->sfp_bus && pl->phydev) 3620 ret = phy_speed_down(pl->phydev, sync); 3621 3622 return ret; 3623 } 3624 EXPORT_SYMBOL_GPL(phylink_speed_down); 3625 3626 /** 3627 * phylink_speed_up() - restore the advertised speeds prior to the call to 3628 * phylink_speed_down() 3629 * @pl: a pointer to a &struct phylink returned from phylink_create() 3630 * 3631 * If we have a PHY that is not part of a SFP module, then restore the 3632 * PHY speeds as per phy_speed_up(). 3633 * 3634 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3635 */ 3636 int phylink_speed_up(struct phylink *pl) 3637 { 3638 int ret = 0; 3639 3640 ASSERT_RTNL(); 3641 3642 if (!pl->sfp_bus && pl->phydev) 3643 ret = phy_speed_up(pl->phydev); 3644 3645 return ret; 3646 } 3647 EXPORT_SYMBOL_GPL(phylink_speed_up); 3648 3649 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3650 { 3651 struct phylink *pl = upstream; 3652 3653 pl->netdev->sfp_bus = bus; 3654 } 3655 3656 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3657 { 3658 struct phylink *pl = upstream; 3659 3660 pl->netdev->sfp_bus = NULL; 3661 } 3662 3663 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3664 const unsigned long *intf) 3665 { 3666 phy_interface_t interface; 3667 size_t i; 3668 3669 interface = PHY_INTERFACE_MODE_NA; 3670 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3671 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3672 interface = phylink_sfp_interface_preference[i]; 3673 break; 3674 } 3675 3676 return interface; 3677 } 3678 3679 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3680 struct phylink_link_state *state, 3681 bool changed) 3682 { 3683 u8 mode = MLO_AN_INBAND; 3684 3685 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3686 phylink_an_mode_str(mode), phy_modes(state->interface), 3687 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3688 3689 if (!linkmode_equal(pl->supported, supported)) { 3690 linkmode_copy(pl->supported, supported); 3691 changed = true; 3692 } 3693 3694 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3695 linkmode_copy(pl->link_config.advertising, state->advertising); 3696 changed = true; 3697 } 3698 3699 if (pl->req_link_an_mode != mode || 3700 pl->link_config.interface != state->interface) { 3701 pl->req_link_an_mode = mode; 3702 pl->link_config.interface = state->interface; 3703 3704 changed = true; 3705 3706 phylink_info(pl, "switched to %s/%s link mode\n", 3707 phylink_an_mode_str(mode), 3708 phy_modes(state->interface)); 3709 } 3710 3711 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3712 &pl->phylink_disable_state)) 3713 phylink_mac_initial_config(pl, false); 3714 } 3715 3716 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3717 { 3718 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3719 struct phylink_link_state config; 3720 int ret; 3721 3722 /* We're not using pl->sfp_interfaces, so clear it. */ 3723 phy_interface_zero(pl->sfp_interfaces); 3724 linkmode_copy(support, phy->supported); 3725 3726 memset(&config, 0, sizeof(config)); 3727 linkmode_copy(config.advertising, phy->advertising); 3728 config.interface = PHY_INTERFACE_MODE_NA; 3729 config.speed = SPEED_UNKNOWN; 3730 config.duplex = DUPLEX_UNKNOWN; 3731 config.pause = MLO_PAUSE_AN; 3732 3733 /* Ignore errors if we're expecting a PHY to attach later */ 3734 ret = phylink_validate(pl, support, &config); 3735 if (ret) { 3736 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3737 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3738 ERR_PTR(ret)); 3739 return ret; 3740 } 3741 3742 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3743 if (config.interface == PHY_INTERFACE_MODE_NA) 3744 return -EINVAL; 3745 3746 /* Attach the PHY so that the PHY is present when we do the major 3747 * configuration step. 3748 */ 3749 ret = phylink_attach_phy(pl, phy, config.interface); 3750 if (ret < 0) 3751 return ret; 3752 3753 /* This will validate the configuration for us. */ 3754 ret = phylink_bringup_phy(pl, phy, config.interface); 3755 if (ret < 0) { 3756 phy_detach(phy); 3757 return ret; 3758 } 3759 3760 pl->link_port = pl->sfp_port; 3761 3762 phylink_sfp_set_config(pl, support, &config, true); 3763 3764 return 0; 3765 } 3766 3767 static int phylink_sfp_config_optical(struct phylink *pl) 3768 { 3769 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3770 struct phylink_link_state config; 3771 enum inband_type inband_type; 3772 phy_interface_t interface; 3773 int ret; 3774 3775 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3776 (int)PHY_INTERFACE_MODE_MAX, 3777 pl->config->supported_interfaces, 3778 (int)PHY_INTERFACE_MODE_MAX, 3779 pl->sfp_interfaces); 3780 3781 /* Find the union of the supported interfaces by the PCS/MAC and 3782 * the SFP module. 3783 */ 3784 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3785 pl->sfp_interfaces); 3786 if (phy_interface_empty(pl->sfp_interfaces)) { 3787 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3788 return -EINVAL; 3789 } 3790 3791 memset(&config, 0, sizeof(config)); 3792 linkmode_copy(support, pl->sfp_support); 3793 linkmode_copy(config.advertising, pl->sfp_support); 3794 config.speed = SPEED_UNKNOWN; 3795 config.duplex = DUPLEX_UNKNOWN; 3796 config.pause = MLO_PAUSE_AN; 3797 3798 /* For all the interfaces that are supported, reduce the sfp_support 3799 * mask to only those link modes that can be supported. 3800 */ 3801 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3802 pl->sfp_interfaces); 3803 if (ret) { 3804 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3805 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3806 return ret; 3807 } 3808 3809 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3810 if (interface == PHY_INTERFACE_MODE_NA) { 3811 phylink_err(pl, "failed to select SFP interface\n"); 3812 return -EINVAL; 3813 } 3814 3815 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3816 phy_modes(interface)); 3817 3818 inband_type = phylink_get_inband_type(interface); 3819 if (inband_type == INBAND_NONE) { 3820 /* If this is the sole interface, and there is no inband 3821 * support, clear the advertising mask and Autoneg bit in 3822 * the support mask. Otherwise, just clear the Autoneg bit 3823 * in the advertising mask. 3824 */ 3825 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3826 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3827 pl->sfp_support); 3828 linkmode_zero(config.advertising); 3829 } else { 3830 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3831 config.advertising); 3832 } 3833 } 3834 3835 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3836 config.advertising)) { 3837 phylink_err(pl, "autoneg setting not compatible with PCS"); 3838 return -EINVAL; 3839 } 3840 3841 config.interface = interface; 3842 3843 /* Ignore errors if we're expecting a PHY to attach later */ 3844 ret = phylink_validate(pl, support, &config); 3845 if (ret) { 3846 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3847 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3848 ERR_PTR(ret)); 3849 return ret; 3850 } 3851 3852 pl->link_port = pl->sfp_port; 3853 3854 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3855 3856 return 0; 3857 } 3858 3859 static int phylink_sfp_module_insert(void *upstream, 3860 const struct sfp_eeprom_id *id) 3861 { 3862 const struct sfp_module_caps *caps; 3863 struct phylink *pl = upstream; 3864 3865 ASSERT_RTNL(); 3866 3867 caps = sfp_get_module_caps(pl->sfp_bus); 3868 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3869 linkmode_copy(pl->sfp_support, caps->link_modes); 3870 pl->sfp_may_have_phy = caps->may_have_phy; 3871 pl->sfp_port = caps->port; 3872 3873 /* If this module may have a PHY connecting later, defer until later */ 3874 if (pl->sfp_may_have_phy) 3875 return 0; 3876 3877 return phylink_sfp_config_optical(pl); 3878 } 3879 3880 static void phylink_sfp_module_remove(void *upstream) 3881 { 3882 struct phylink *pl = upstream; 3883 3884 phy_interface_zero(pl->sfp_interfaces); 3885 } 3886 3887 static int phylink_sfp_module_start(void *upstream) 3888 { 3889 struct phylink *pl = upstream; 3890 3891 /* If this SFP module has a PHY, start the PHY now. */ 3892 if (pl->phydev) { 3893 phy_start(pl->phydev); 3894 return 0; 3895 } 3896 3897 /* If the module may have a PHY but we didn't detect one we 3898 * need to configure the MAC here. 3899 */ 3900 if (!pl->sfp_may_have_phy) 3901 return 0; 3902 3903 return phylink_sfp_config_optical(pl); 3904 } 3905 3906 static void phylink_sfp_module_stop(void *upstream) 3907 { 3908 struct phylink *pl = upstream; 3909 3910 /* If this SFP module has a PHY, stop it. */ 3911 if (pl->phydev) 3912 phy_stop(pl->phydev); 3913 } 3914 3915 static void phylink_sfp_link_down(void *upstream) 3916 { 3917 struct phylink *pl = upstream; 3918 3919 ASSERT_RTNL(); 3920 3921 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3922 } 3923 3924 static void phylink_sfp_link_up(void *upstream) 3925 { 3926 struct phylink *pl = upstream; 3927 3928 ASSERT_RTNL(); 3929 3930 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3931 } 3932 3933 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3934 { 3935 struct phylink *pl = upstream; 3936 3937 if (!phy->drv) { 3938 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3939 phydev_name(phy), (unsigned long)phy->phy_id); 3940 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3941 return -EINVAL; 3942 } 3943 3944 /* 3945 * This is the new way of dealing with flow control for PHYs, 3946 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3947 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 3948 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 3949 * capabilities and must NOT change the phy's pause settings directly. 3950 */ 3951 phy_support_asym_pause(phy); 3952 3953 /* Set the PHY's host supported interfaces */ 3954 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3955 pl->config->supported_interfaces); 3956 3957 /* Do the initial configuration */ 3958 return phylink_sfp_config_phy(pl, phy); 3959 } 3960 3961 static void phylink_sfp_disconnect_phy(void *upstream, 3962 struct phy_device *phydev) 3963 { 3964 phylink_disconnect_phy(upstream); 3965 } 3966 3967 static const struct sfp_upstream_ops sfp_phylink_ops = { 3968 .attach = phylink_sfp_attach, 3969 .detach = phylink_sfp_detach, 3970 .module_insert = phylink_sfp_module_insert, 3971 .module_remove = phylink_sfp_module_remove, 3972 .module_start = phylink_sfp_module_start, 3973 .module_stop = phylink_sfp_module_stop, 3974 .link_up = phylink_sfp_link_up, 3975 .link_down = phylink_sfp_link_down, 3976 .connect_phy = phylink_sfp_connect_phy, 3977 .disconnect_phy = phylink_sfp_disconnect_phy, 3978 }; 3979 3980 /* Helpers for MAC drivers */ 3981 3982 static struct { 3983 int bit; 3984 int speed; 3985 } phylink_c73_priority_resolution[] = { 3986 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3987 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3988 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3989 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3990 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3991 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3992 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3993 /* 5GBASE-KR not supported */ 3994 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3995 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3996 }; 3997 3998 void phylink_resolve_c73(struct phylink_link_state *state) 3999 { 4000 int i; 4001 4002 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 4003 int bit = phylink_c73_priority_resolution[i].bit; 4004 if (linkmode_test_bit(bit, state->advertising) && 4005 linkmode_test_bit(bit, state->lp_advertising)) 4006 break; 4007 } 4008 4009 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 4010 state->speed = phylink_c73_priority_resolution[i].speed; 4011 state->duplex = DUPLEX_FULL; 4012 } else { 4013 /* negotiation failure */ 4014 state->link = false; 4015 } 4016 4017 phylink_resolve_an_pause(state); 4018 } 4019 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 4020 4021 static void phylink_decode_c37_word(struct phylink_link_state *state, 4022 uint16_t config_reg, int speed) 4023 { 4024 int fd_bit; 4025 4026 if (speed == SPEED_2500) 4027 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 4028 else 4029 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 4030 4031 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 4032 4033 if (linkmode_test_bit(fd_bit, state->advertising) && 4034 linkmode_test_bit(fd_bit, state->lp_advertising)) { 4035 state->speed = speed; 4036 state->duplex = DUPLEX_FULL; 4037 } else { 4038 /* negotiation failure */ 4039 state->link = false; 4040 } 4041 4042 phylink_resolve_an_pause(state); 4043 } 4044 4045 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 4046 uint16_t config_reg) 4047 { 4048 if (!(config_reg & LPA_SGMII_LINK)) { 4049 state->link = false; 4050 return; 4051 } 4052 4053 switch (config_reg & LPA_SGMII_SPD_MASK) { 4054 case LPA_SGMII_10: 4055 state->speed = SPEED_10; 4056 break; 4057 case LPA_SGMII_100: 4058 state->speed = SPEED_100; 4059 break; 4060 case LPA_SGMII_1000: 4061 state->speed = SPEED_1000; 4062 break; 4063 default: 4064 state->link = false; 4065 return; 4066 } 4067 if (config_reg & LPA_SGMII_FULL_DUPLEX) 4068 state->duplex = DUPLEX_FULL; 4069 else 4070 state->duplex = DUPLEX_HALF; 4071 } 4072 4073 /** 4074 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 4075 * @state: a pointer to a struct phylink_link_state. 4076 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 4077 * 4078 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 4079 * code word. Decode the USXGMII code word and populate the corresponding fields 4080 * (speed, duplex) into the phylink_link_state structure. 4081 */ 4082 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 4083 uint16_t lpa) 4084 { 4085 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4086 case MDIO_USXGMII_10: 4087 state->speed = SPEED_10; 4088 break; 4089 case MDIO_USXGMII_100: 4090 state->speed = SPEED_100; 4091 break; 4092 case MDIO_USXGMII_1000: 4093 state->speed = SPEED_1000; 4094 break; 4095 case MDIO_USXGMII_2500: 4096 state->speed = SPEED_2500; 4097 break; 4098 case MDIO_USXGMII_5000: 4099 state->speed = SPEED_5000; 4100 break; 4101 case MDIO_USXGMII_10G: 4102 state->speed = SPEED_10000; 4103 break; 4104 default: 4105 state->link = false; 4106 return; 4107 } 4108 4109 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4110 state->duplex = DUPLEX_FULL; 4111 else 4112 state->duplex = DUPLEX_HALF; 4113 } 4114 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4115 4116 /** 4117 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4118 * @state: a pointer to a struct phylink_link_state. 4119 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4120 * 4121 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4122 * code word. Decode the USGMII code word and populate the corresponding fields 4123 * (speed, duplex) into the phylink_link_state structure. The structure for this 4124 * word is the same as the USXGMII word, except it only supports speeds up to 4125 * 1Gbps. 4126 */ 4127 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4128 uint16_t lpa) 4129 { 4130 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4131 case MDIO_USXGMII_10: 4132 state->speed = SPEED_10; 4133 break; 4134 case MDIO_USXGMII_100: 4135 state->speed = SPEED_100; 4136 break; 4137 case MDIO_USXGMII_1000: 4138 state->speed = SPEED_1000; 4139 break; 4140 default: 4141 state->link = false; 4142 return; 4143 } 4144 4145 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4146 state->duplex = DUPLEX_FULL; 4147 else 4148 state->duplex = DUPLEX_HALF; 4149 } 4150 4151 /** 4152 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4153 * @state: a pointer to a &struct phylink_link_state. 4154 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4155 * @bmsr: The value of the %MII_BMSR register 4156 * @lpa: The value of the %MII_LPA register 4157 * 4158 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4159 * clause 37 negotiation and/or SGMII control. 4160 * 4161 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4162 * the phylink @state structure. This is suitable to be used for implementing 4163 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4164 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4165 */ 4166 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4167 unsigned int neg_mode, u16 bmsr, u16 lpa) 4168 { 4169 state->link = !!(bmsr & BMSR_LSTATUS); 4170 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4171 4172 /* If the link is down, the advertisement data is undefined. */ 4173 if (!state->link) 4174 return; 4175 4176 switch (state->interface) { 4177 case PHY_INTERFACE_MODE_1000BASEX: 4178 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4179 phylink_decode_c37_word(state, lpa, SPEED_1000); 4180 } else { 4181 state->speed = SPEED_1000; 4182 state->duplex = DUPLEX_FULL; 4183 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4184 } 4185 break; 4186 4187 case PHY_INTERFACE_MODE_2500BASEX: 4188 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4189 phylink_decode_c37_word(state, lpa, SPEED_2500); 4190 } else { 4191 state->speed = SPEED_2500; 4192 state->duplex = DUPLEX_FULL; 4193 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4194 } 4195 break; 4196 4197 case PHY_INTERFACE_MODE_SGMII: 4198 case PHY_INTERFACE_MODE_PSGMII: 4199 case PHY_INTERFACE_MODE_QSGMII: 4200 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4201 phylink_decode_sgmii_word(state, lpa); 4202 break; 4203 4204 case PHY_INTERFACE_MODE_QUSGMII: 4205 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4206 phylink_decode_usgmii_word(state, lpa); 4207 break; 4208 4209 default: 4210 state->link = false; 4211 break; 4212 } 4213 } 4214 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4215 4216 /** 4217 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4218 * @pcs: a pointer to a &struct mdio_device. 4219 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4220 * @state: a pointer to a &struct phylink_link_state. 4221 * 4222 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4223 * clause 37 negotiation and/or SGMII control. 4224 * 4225 * Read the MAC PCS state from the MII device configured in @config and 4226 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4227 * the phylink @state structure. This is suitable to be directly plugged 4228 * into the pcs_get_state() member of the struct phylink_pcs_ops 4229 * structure. 4230 */ 4231 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4232 unsigned int neg_mode, 4233 struct phylink_link_state *state) 4234 { 4235 int bmsr, lpa; 4236 4237 bmsr = mdiodev_read(pcs, MII_BMSR); 4238 lpa = mdiodev_read(pcs, MII_LPA); 4239 if (bmsr < 0 || lpa < 0) { 4240 state->link = false; 4241 return; 4242 } 4243 4244 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4245 } 4246 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4247 4248 /** 4249 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4250 * advertisement 4251 * @interface: the PHY interface mode being configured 4252 * @advertising: the ethtool advertisement mask 4253 * 4254 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4255 * clause 37 negotiation and/or SGMII control. 4256 * 4257 * Encode the clause 37 PCS advertisement as specified by @interface and 4258 * @advertising. 4259 * 4260 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4261 */ 4262 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4263 const unsigned long *advertising) 4264 { 4265 u16 adv; 4266 4267 switch (interface) { 4268 case PHY_INTERFACE_MODE_1000BASEX: 4269 case PHY_INTERFACE_MODE_2500BASEX: 4270 adv = ADVERTISE_1000XFULL; 4271 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4272 advertising)) 4273 adv |= ADVERTISE_1000XPAUSE; 4274 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4275 advertising)) 4276 adv |= ADVERTISE_1000XPSE_ASYM; 4277 return adv; 4278 case PHY_INTERFACE_MODE_SGMII: 4279 case PHY_INTERFACE_MODE_PSGMII: 4280 case PHY_INTERFACE_MODE_QSGMII: 4281 return 0x0001; 4282 default: 4283 /* Nothing to do for other modes */ 4284 return -EINVAL; 4285 } 4286 } 4287 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4288 4289 /** 4290 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4291 * @pcs: a pointer to a &struct mdio_device. 4292 * @interface: the PHY interface mode being configured 4293 * @advertising: the ethtool advertisement mask 4294 * @neg_mode: PCS negotiation mode 4295 * 4296 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4297 * parameters for the @mode, @interface and @advertising parameters. 4298 * Returns negative error number on failure, zero if the advertisement 4299 * has not changed, or positive if there is a change. 4300 */ 4301 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4302 phy_interface_t interface, 4303 const unsigned long *advertising, 4304 unsigned int neg_mode) 4305 { 4306 bool changed = 0; 4307 u16 bmcr; 4308 int ret, adv; 4309 4310 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4311 if (adv >= 0) { 4312 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4313 MII_ADVERTISE, 0xffff, adv); 4314 if (ret < 0) 4315 return ret; 4316 changed = ret; 4317 } 4318 4319 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4320 bmcr = BMCR_ANENABLE; 4321 else 4322 bmcr = 0; 4323 4324 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4325 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4326 if (ret < 0) 4327 return ret; 4328 4329 return changed; 4330 } 4331 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4332 4333 /** 4334 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4335 * @pcs: a pointer to a &struct mdio_device. 4336 * 4337 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4338 * clause 37 negotiation. 4339 * 4340 * Restart the clause 37 negotiation with the link partner. This is 4341 * suitable to be directly plugged into the pcs_get_state() member 4342 * of the struct phylink_pcs_ops structure. 4343 */ 4344 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4345 { 4346 int val = mdiodev_read(pcs, MII_BMCR); 4347 4348 if (val >= 0) { 4349 val |= BMCR_ANRESTART; 4350 4351 mdiodev_write(pcs, MII_BMCR, val); 4352 } 4353 } 4354 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4355 4356 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4357 struct phylink_link_state *state) 4358 { 4359 struct mii_bus *bus = pcs->bus; 4360 int addr = pcs->addr; 4361 int stat; 4362 4363 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4364 if (stat < 0) { 4365 state->link = false; 4366 return; 4367 } 4368 4369 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4370 if (!state->link) 4371 return; 4372 4373 switch (state->interface) { 4374 case PHY_INTERFACE_MODE_10GBASER: 4375 state->speed = SPEED_10000; 4376 state->duplex = DUPLEX_FULL; 4377 break; 4378 4379 default: 4380 break; 4381 } 4382 } 4383 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4384 4385 /** 4386 * phylink_replay_link_begin() - begin replay of link callbacks for driver 4387 * which loses state 4388 * @pl: a pointer to a &struct phylink returned from phylink_create() 4389 * 4390 * Helper for MAC drivers which may perform a destructive reset at runtime. 4391 * Both the own driver's mac_link_down() method is called, as well as the 4392 * pcs_link_down() method of the split PCS (if any). 4393 * 4394 * This is similar to phylink_stop(), except it does not alter the state of 4395 * the phylib PHY (it is assumed that it is not affected by the MAC destructive 4396 * reset). 4397 */ 4398 void phylink_replay_link_begin(struct phylink *pl) 4399 { 4400 ASSERT_RTNL(); 4401 4402 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_REPLAY); 4403 } 4404 EXPORT_SYMBOL_GPL(phylink_replay_link_begin); 4405 4406 /** 4407 * phylink_replay_link_end() - end replay of link callbacks for driver 4408 * which lost state 4409 * @pl: a pointer to a &struct phylink returned from phylink_create() 4410 * 4411 * Helper for MAC drivers which may perform a destructive reset at runtime. 4412 * Both the own driver's mac_config() and mac_link_up() methods, as well as the 4413 * pcs_config() and pcs_link_up() method of the split PCS (if any), are called. 4414 * 4415 * This is similar to phylink_start(), except it does not alter the state of 4416 * the phylib PHY. 4417 * 4418 * One must call this method only within the same rtnl_lock() critical section 4419 * as a previous phylink_replay_link_start(). 4420 */ 4421 void phylink_replay_link_end(struct phylink *pl) 4422 { 4423 ASSERT_RTNL(); 4424 4425 if (WARN(!test_bit(PHYLINK_DISABLE_REPLAY, 4426 &pl->phylink_disable_state), 4427 "phylink_replay_link_end() called without a prior phylink_replay_link_begin()\n")) 4428 return; 4429 4430 pl->force_major_config = true; 4431 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_REPLAY); 4432 flush_work(&pl->resolve); 4433 } 4434 EXPORT_SYMBOL_GPL(phylink_replay_link_end); 4435 4436 static int __init phylink_init(void) 4437 { 4438 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4439 __set_bit(phylink_sfp_interface_preference[i], 4440 phylink_sfp_interfaces); 4441 4442 return 0; 4443 } 4444 4445 module_init(phylink_init); 4446 4447 MODULE_LICENSE("GPL v2"); 4448 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4449