xref: /linux/drivers/net/phy/phylink.c (revision db87bd2ad1f736c2f7ab231f9b40c885934f6b2c)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * phylink models the MAC to optional PHY connection, supporting
4  * technologies such as SFP cages where the PHY is hot-pluggable.
5  *
6  * Copyright (C) 2015 Russell King
7  */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22 
23 #include "phy-caps.h"
24 #include "sfp.h"
25 #include "swphy.h"
26 
27 enum {
28 	PHYLINK_DISABLE_STOPPED,
29 	PHYLINK_DISABLE_LINK,
30 	PHYLINK_DISABLE_MAC_WOL,
31 
32 	PCS_STATE_DOWN = 0,
33 	PCS_STATE_STARTING,
34 	PCS_STATE_STARTED,
35 };
36 
37 /**
38  * struct phylink - internal data type for phylink
39  */
40 struct phylink {
41 	/* private: */
42 	struct net_device *netdev;
43 	const struct phylink_mac_ops *mac_ops;
44 	struct phylink_config *config;
45 	struct phylink_pcs *pcs;
46 	struct device *dev;
47 	unsigned int old_link_state:1;
48 
49 	unsigned long phylink_disable_state; /* bitmask of disables */
50 	struct phy_device *phydev;
51 	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
52 	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
53 	u8 req_link_an_mode;		/* Requested MLO_AN_xxx mode */
54 	u8 act_link_an_mode;		/* Active MLO_AN_xxx mode */
55 	u8 link_port;			/* The current non-phy ethtool port */
56 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
57 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi);
58 
59 	/* The link configuration settings */
60 	struct phylink_link_state link_config;
61 
62 	/* The current settings */
63 	phy_interface_t cur_interface;
64 
65 	struct gpio_desc *link_gpio;
66 	unsigned int link_irq;
67 	struct timer_list link_poll;
68 
69 	struct mutex state_mutex;
70 	/* Serialize updates to pl->phydev with phylink_resolve() */
71 	struct mutex phydev_mutex;
72 	struct phylink_link_state phy_state;
73 	unsigned int phy_ib_mode;
74 	struct work_struct resolve;
75 	unsigned int pcs_neg_mode;
76 	unsigned int pcs_state;
77 
78 	bool link_failed;
79 	bool suspend_link_up;
80 	bool major_config_failed;
81 	bool mac_supports_eee_ops;
82 	bool mac_supports_eee;
83 	bool phy_enable_tx_lpi;
84 	bool mac_enable_tx_lpi;
85 	bool mac_tx_clk_stop;
86 	u32 mac_tx_lpi_timer;
87 	u8 mac_rx_clk_stop_blocked;
88 
89 	struct sfp_bus *sfp_bus;
90 	bool sfp_may_have_phy;
91 	DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
92 	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
93 	u8 sfp_port;
94 
95 	struct eee_config eee_cfg;
96 };
97 
98 #define phylink_printk(level, pl, fmt, ...) \
99 	do { \
100 		if ((pl)->config->type == PHYLINK_NETDEV) \
101 			netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
102 		else if ((pl)->config->type == PHYLINK_DEV) \
103 			dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
104 	} while (0)
105 
106 #define phylink_err(pl, fmt, ...) \
107 	phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
108 #define phylink_warn(pl, fmt, ...) \
109 	phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
110 #define phylink_info(pl, fmt, ...) \
111 	phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
112 #if defined(CONFIG_DYNAMIC_DEBUG)
113 #define phylink_dbg(pl, fmt, ...) \
114 do {									\
115 	if ((pl)->config->type == PHYLINK_NETDEV)			\
116 		netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);		\
117 	else if ((pl)->config->type == PHYLINK_DEV)			\
118 		dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);			\
119 } while (0)
120 #elif defined(DEBUG)
121 #define phylink_dbg(pl, fmt, ...)					\
122 	phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
123 #else
124 #define phylink_dbg(pl, fmt, ...)					\
125 ({									\
126 	if (0)								\
127 		phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);	\
128 })
129 #endif
130 
131 static const phy_interface_t phylink_sfp_interface_preference[] = {
132 	PHY_INTERFACE_MODE_100GBASEP,
133 	PHY_INTERFACE_MODE_50GBASER,
134 	PHY_INTERFACE_MODE_LAUI,
135 	PHY_INTERFACE_MODE_25GBASER,
136 	PHY_INTERFACE_MODE_USXGMII,
137 	PHY_INTERFACE_MODE_10GBASER,
138 	PHY_INTERFACE_MODE_5GBASER,
139 	PHY_INTERFACE_MODE_2500BASEX,
140 	PHY_INTERFACE_MODE_SGMII,
141 	PHY_INTERFACE_MODE_1000BASEX,
142 	PHY_INTERFACE_MODE_100BASEX,
143 };
144 
145 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
146 
147 /**
148  * phylink_set_port_modes() - set the port type modes in the ethtool mask
149  * @mask: ethtool link mode mask
150  *
151  * Sets all the port type modes in the ethtool mask.  MAC drivers should
152  * use this in their 'validate' callback.
153  */
phylink_set_port_modes(unsigned long * mask)154 void phylink_set_port_modes(unsigned long *mask)
155 {
156 	phylink_set(mask, TP);
157 	phylink_set(mask, AUI);
158 	phylink_set(mask, MII);
159 	phylink_set(mask, FIBRE);
160 	phylink_set(mask, BNC);
161 	phylink_set(mask, Backplane);
162 }
163 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
164 
phylink_is_empty_linkmode(const unsigned long * linkmode)165 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
166 {
167 	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
168 
169 	phylink_set_port_modes(tmp);
170 	phylink_set(tmp, Autoneg);
171 	phylink_set(tmp, Pause);
172 	phylink_set(tmp, Asym_Pause);
173 
174 	return linkmode_subset(linkmode, tmp);
175 }
176 
phylink_an_mode_str(unsigned int mode)177 static const char *phylink_an_mode_str(unsigned int mode)
178 {
179 	static const char *modestr[] = {
180 		[MLO_AN_PHY] = "phy",
181 		[MLO_AN_FIXED] = "fixed",
182 		[MLO_AN_INBAND] = "inband",
183 	};
184 
185 	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
186 }
187 
phylink_pcs_mode_str(unsigned int mode)188 static const char *phylink_pcs_mode_str(unsigned int mode)
189 {
190 	if (!mode)
191 		return "none";
192 
193 	if (mode & PHYLINK_PCS_NEG_OUTBAND)
194 		return "outband";
195 
196 	if (mode & PHYLINK_PCS_NEG_INBAND) {
197 		if (mode & PHYLINK_PCS_NEG_ENABLED)
198 			return "inband,an-enabled";
199 		else
200 			return "inband,an-disabled";
201 	}
202 
203 	return "unknown";
204 }
205 
phylink_interface_signal_rate(phy_interface_t interface)206 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
207 {
208 	switch (interface) {
209 	case PHY_INTERFACE_MODE_SGMII:
210 	case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
211 		return 1250;
212 	case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
213 		return 3125;
214 	case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
215 		return 5156;
216 	case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
217 		return 10313;
218 	default:
219 		return 0;
220 	}
221 }
222 
223 /**
224  * phylink_interface_max_speed() - get the maximum speed of a phy interface
225  * @interface: phy interface mode defined by &typedef phy_interface_t
226  *
227  * Determine the maximum speed of a phy interface. This is intended to help
228  * determine the correct speed to pass to the MAC when the phy is performing
229  * rate matching.
230  *
231  * Return: The maximum speed of @interface
232  */
phylink_interface_max_speed(phy_interface_t interface)233 static int phylink_interface_max_speed(phy_interface_t interface)
234 {
235 	switch (interface) {
236 	case PHY_INTERFACE_MODE_100BASEX:
237 	case PHY_INTERFACE_MODE_REVRMII:
238 	case PHY_INTERFACE_MODE_RMII:
239 	case PHY_INTERFACE_MODE_SMII:
240 	case PHY_INTERFACE_MODE_REVMII:
241 	case PHY_INTERFACE_MODE_MII:
242 	case PHY_INTERFACE_MODE_MIILITE:
243 		return SPEED_100;
244 
245 	case PHY_INTERFACE_MODE_TBI:
246 	case PHY_INTERFACE_MODE_MOCA:
247 	case PHY_INTERFACE_MODE_RTBI:
248 	case PHY_INTERFACE_MODE_1000BASEX:
249 	case PHY_INTERFACE_MODE_1000BASEKX:
250 	case PHY_INTERFACE_MODE_TRGMII:
251 	case PHY_INTERFACE_MODE_RGMII_TXID:
252 	case PHY_INTERFACE_MODE_RGMII_RXID:
253 	case PHY_INTERFACE_MODE_RGMII_ID:
254 	case PHY_INTERFACE_MODE_RGMII:
255 	case PHY_INTERFACE_MODE_PSGMII:
256 	case PHY_INTERFACE_MODE_QSGMII:
257 	case PHY_INTERFACE_MODE_QUSGMII:
258 	case PHY_INTERFACE_MODE_SGMII:
259 	case PHY_INTERFACE_MODE_GMII:
260 		return SPEED_1000;
261 
262 	case PHY_INTERFACE_MODE_2500BASEX:
263 	case PHY_INTERFACE_MODE_10G_QXGMII:
264 		return SPEED_2500;
265 
266 	case PHY_INTERFACE_MODE_5GBASER:
267 		return SPEED_5000;
268 
269 	case PHY_INTERFACE_MODE_XGMII:
270 	case PHY_INTERFACE_MODE_RXAUI:
271 	case PHY_INTERFACE_MODE_XAUI:
272 	case PHY_INTERFACE_MODE_10GBASER:
273 	case PHY_INTERFACE_MODE_10GKR:
274 	case PHY_INTERFACE_MODE_USXGMII:
275 		return SPEED_10000;
276 
277 	case PHY_INTERFACE_MODE_25GBASER:
278 		return SPEED_25000;
279 
280 	case PHY_INTERFACE_MODE_XLGMII:
281 		return SPEED_40000;
282 
283 	case PHY_INTERFACE_MODE_50GBASER:
284 	case PHY_INTERFACE_MODE_LAUI:
285 		return SPEED_50000;
286 
287 	case PHY_INTERFACE_MODE_100GBASEP:
288 		return SPEED_100000;
289 
290 	case PHY_INTERFACE_MODE_INTERNAL:
291 	case PHY_INTERFACE_MODE_NA:
292 	case PHY_INTERFACE_MODE_MAX:
293 		/* No idea! Garbage in, unknown out */
294 		return SPEED_UNKNOWN;
295 	}
296 
297 	/* If we get here, someone forgot to add an interface mode above */
298 	WARN_ON_ONCE(1);
299 	return SPEED_UNKNOWN;
300 }
301 
302 static struct {
303 	unsigned long mask;
304 	int speed;
305 	unsigned int duplex;
306 	unsigned int caps_bit;
307 } phylink_caps_params[] = {
308 	{ MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) },
309 	{ MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) },
310 	{ MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) },
311 	{ MAC_56000FD,  SPEED_56000,  DUPLEX_FULL, BIT(LINK_CAPA_56000FD) },
312 	{ MAC_50000FD,  SPEED_50000,  DUPLEX_FULL, BIT(LINK_CAPA_50000FD) },
313 	{ MAC_40000FD,  SPEED_40000,  DUPLEX_FULL, BIT(LINK_CAPA_40000FD) },
314 	{ MAC_25000FD,  SPEED_25000,  DUPLEX_FULL, BIT(LINK_CAPA_25000FD) },
315 	{ MAC_20000FD,  SPEED_20000,  DUPLEX_FULL, BIT(LINK_CAPA_20000FD) },
316 	{ MAC_10000FD,  SPEED_10000,  DUPLEX_FULL, BIT(LINK_CAPA_10000FD) },
317 	{ MAC_5000FD,   SPEED_5000,   DUPLEX_FULL, BIT(LINK_CAPA_5000FD) },
318 	{ MAC_2500FD,   SPEED_2500,   DUPLEX_FULL, BIT(LINK_CAPA_2500FD) },
319 	{ MAC_1000FD,   SPEED_1000,   DUPLEX_FULL, BIT(LINK_CAPA_1000FD) },
320 	{ MAC_1000HD,   SPEED_1000,   DUPLEX_HALF, BIT(LINK_CAPA_1000HD) },
321 	{ MAC_100FD,    SPEED_100,    DUPLEX_FULL, BIT(LINK_CAPA_100FD) },
322 	{ MAC_100HD,    SPEED_100,    DUPLEX_HALF, BIT(LINK_CAPA_100HD) },
323 	{ MAC_10FD,     SPEED_10,     DUPLEX_FULL, BIT(LINK_CAPA_10FD) },
324 	{ MAC_10HD,     SPEED_10,     DUPLEX_HALF, BIT(LINK_CAPA_10HD) },
325 };
326 
327 /**
328  * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps
329  * @caps: A set of MAC capabilities
330  *
331  * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h
332  */
phylink_caps_to_link_caps(unsigned long caps)333 static unsigned long phylink_caps_to_link_caps(unsigned long caps)
334 {
335 	unsigned long link_caps = 0;
336 	int i;
337 
338 	for (i = 0; i <  ARRAY_SIZE(phylink_caps_params); i++)
339 		if (caps & phylink_caps_params[i].mask)
340 			link_caps |= phylink_caps_params[i].caps_bit;
341 
342 	return link_caps;
343 }
344 
phylink_link_caps_to_mac_caps(unsigned long link_caps)345 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps)
346 {
347 	unsigned long caps = 0;
348 	int i;
349 
350 	for (i = 0; i <  ARRAY_SIZE(phylink_caps_params); i++)
351 		if (link_caps & phylink_caps_params[i].caps_bit)
352 			caps |= phylink_caps_params[i].mask;
353 
354 	return caps;
355 }
356 
357 /**
358  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
359  * @linkmodes: ethtool linkmode mask (must be already initialised)
360  * @caps: bitmask of MAC capabilities
361  *
362  * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
363  * supported by the @caps. @linkmodes must have been initialised previously.
364  */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)365 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
366 				      unsigned long caps)
367 {
368 	unsigned long link_caps = phylink_caps_to_link_caps(caps);
369 
370 	if (caps & MAC_SYM_PAUSE)
371 		__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
372 
373 	if (caps & MAC_ASYM_PAUSE)
374 		__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
375 
376 	phy_caps_linkmodes(link_caps, linkmodes);
377 }
378 
379 /**
380  * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
381  * @config: pointer to a &struct phylink_config
382  * @max_speed: maximum speed
383  *
384  * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
385  * Any further motifications of config.mac_capabilities will override this.
386  */
phylink_limit_mac_speed(struct phylink_config * config,u32 max_speed)387 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
388 {
389 	int i;
390 
391 	for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
392 		    phylink_caps_params[i].speed > max_speed; i++)
393 		config->mac_capabilities &= ~phylink_caps_params[i].mask;
394 }
395 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
396 
397 /**
398  * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
399  * @speed: the speed to search for
400  * @duplex: the duplex to search for
401  *
402  * Find the mac capability for a given speed and duplex.
403  *
404  * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
405  *         there were no matches.
406  */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)407 static unsigned long phylink_cap_from_speed_duplex(int speed,
408 						   unsigned int duplex)
409 {
410 	int i;
411 
412 	for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
413 		if (speed == phylink_caps_params[i].speed &&
414 		    duplex == phylink_caps_params[i].duplex)
415 			return phylink_caps_params[i].mask;
416 	}
417 
418 	return 0;
419 }
420 
421 /**
422  * phylink_get_capabilities() - get capabilities for a given MAC
423  * @interface: phy interface mode defined by &typedef phy_interface_t
424  * @mac_capabilities: bitmask of MAC capabilities
425  * @rate_matching: type of rate matching being performed
426  *
427  * Get the MAC capabilities that are supported by the @interface mode and
428  * @mac_capabilities.
429  */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)430 static unsigned long phylink_get_capabilities(phy_interface_t interface,
431 					      unsigned long mac_capabilities,
432 					      int rate_matching)
433 {
434 	unsigned long link_caps = phy_caps_from_interface(interface);
435 	int max_speed = phylink_interface_max_speed(interface);
436 	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
437 	unsigned long matched_caps = 0;
438 
439 	caps |= phylink_link_caps_to_mac_caps(link_caps);
440 
441 	switch (rate_matching) {
442 	case RATE_MATCH_OPEN_LOOP:
443 		/* TODO */
444 		fallthrough;
445 	case RATE_MATCH_NONE:
446 		matched_caps = 0;
447 		break;
448 	case RATE_MATCH_PAUSE: {
449 		/* The MAC must support asymmetric pause towards the local
450 		 * device for this. We could allow just symmetric pause, but
451 		 * then we might have to renegotiate if the link partner
452 		 * doesn't support pause. This is because there's no way to
453 		 * accept pause frames without transmitting them if we only
454 		 * support symmetric pause.
455 		 */
456 		if (!(mac_capabilities & MAC_SYM_PAUSE) ||
457 		    !(mac_capabilities & MAC_ASYM_PAUSE))
458 			break;
459 
460 		/* We can't adapt if the MAC doesn't support the interface's
461 		 * max speed at full duplex.
462 		 */
463 		if (mac_capabilities &
464 		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL))
465 			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
466 		break;
467 	}
468 	case RATE_MATCH_CRS:
469 		/* The MAC must support half duplex at the interface's max
470 		 * speed.
471 		 */
472 		if (mac_capabilities &
473 		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
474 			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
475 			matched_caps &= mac_capabilities;
476 		}
477 		break;
478 	}
479 
480 	return (caps & mac_capabilities) | matched_caps;
481 }
482 
483 /**
484  * phylink_validate_mask_caps() - Restrict link modes based on caps
485  * @supported: ethtool bitmask for supported link modes.
486  * @state: pointer to a &struct phylink_link_state.
487  * @mac_capabilities: bitmask of MAC capabilities
488  *
489  * Calculate the supported link modes based on @mac_capabilities, and restrict
490  * @supported and @state based on that. Use this function if your capabiliies
491  * aren't constant, such as if they vary depending on the interface.
492  */
phylink_validate_mask_caps(unsigned long * supported,struct phylink_link_state * state,unsigned long mac_capabilities)493 static void phylink_validate_mask_caps(unsigned long *supported,
494 				       struct phylink_link_state *state,
495 				       unsigned long mac_capabilities)
496 {
497 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
498 	unsigned long caps;
499 
500 	phylink_set_port_modes(mask);
501 	phylink_set(mask, Autoneg);
502 	caps = phylink_get_capabilities(state->interface, mac_capabilities,
503 					state->rate_matching);
504 	phylink_caps_to_linkmodes(mask, caps);
505 
506 	linkmode_and(supported, supported, mask);
507 	linkmode_and(state->advertising, state->advertising, mask);
508 }
509 
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)510 static int phylink_validate_mac_and_pcs(struct phylink *pl,
511 					unsigned long *supported,
512 					struct phylink_link_state *state)
513 {
514 	struct phylink_pcs *pcs = NULL;
515 	unsigned long capabilities;
516 	int ret;
517 
518 	/* Get the PCS for this interface mode */
519 	if (pl->mac_ops->mac_select_pcs) {
520 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
521 		if (IS_ERR(pcs))
522 			return PTR_ERR(pcs);
523 	}
524 
525 	if (pcs) {
526 		/* The PCS, if present, must be setup before phylink_create()
527 		 * has been called. If the ops is not initialised, print an
528 		 * error and backtrace rather than oopsing the kernel.
529 		 */
530 		if (!pcs->ops) {
531 			phylink_err(pl, "interface %s: uninitialised PCS\n",
532 				    phy_modes(state->interface));
533 			dump_stack();
534 			return -EINVAL;
535 		}
536 
537 		/* Ensure that this PCS supports the interface which the MAC
538 		 * returned it for. It is an error for the MAC to return a PCS
539 		 * that does not support the interface mode.
540 		 */
541 		if (!phy_interface_empty(pcs->supported_interfaces) &&
542 		    !test_bit(state->interface, pcs->supported_interfaces)) {
543 			phylink_err(pl, "MAC returned PCS which does not support %s\n",
544 				    phy_modes(state->interface));
545 			return -EINVAL;
546 		}
547 
548 		/* Validate the link parameters with the PCS */
549 		if (pcs->ops->pcs_validate) {
550 			ret = pcs->ops->pcs_validate(pcs, supported, state);
551 			if (ret < 0 || phylink_is_empty_linkmode(supported))
552 				return -EINVAL;
553 
554 			/* Ensure the advertising mask is a subset of the
555 			 * supported mask.
556 			 */
557 			linkmode_and(state->advertising, state->advertising,
558 				     supported);
559 		}
560 	}
561 
562 	/* Then validate the link parameters with the MAC */
563 	if (pl->mac_ops->mac_get_caps)
564 		capabilities = pl->mac_ops->mac_get_caps(pl->config,
565 							 state->interface);
566 	else
567 		capabilities = pl->config->mac_capabilities;
568 
569 	phylink_validate_mask_caps(supported, state, capabilities);
570 
571 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
572 }
573 
phylink_validate_one(struct phylink * pl,struct phy_device * phy,const unsigned long * supported,const struct phylink_link_state * state,phy_interface_t interface,unsigned long * accum_supported,unsigned long * accum_advertising)574 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
575 				 const unsigned long *supported,
576 				 const struct phylink_link_state *state,
577 				 phy_interface_t interface,
578 				 unsigned long *accum_supported,
579 				 unsigned long *accum_advertising)
580 {
581 	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
582 	struct phylink_link_state tmp_state;
583 
584 	linkmode_copy(tmp_supported, supported);
585 
586 	tmp_state = *state;
587 	tmp_state.interface = interface;
588 
589 	if (phy)
590 		tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
591 
592 	if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
593 		phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
594 			    interface, phy_modes(interface),
595 			    phy_rate_matching_to_str(tmp_state.rate_matching),
596 			    __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
597 
598 		linkmode_or(accum_supported, accum_supported, tmp_supported);
599 		linkmode_or(accum_advertising, accum_advertising,
600 			    tmp_state.advertising);
601 	}
602 }
603 
phylink_validate_mask(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)604 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
605 				 unsigned long *supported,
606 				 struct phylink_link_state *state,
607 				 const unsigned long *interfaces)
608 {
609 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
610 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
611 	int interface;
612 
613 	for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
614 		phylink_validate_one(pl, phy, supported, state, interface,
615 				     all_s, all_adv);
616 
617 	linkmode_copy(supported, all_s);
618 	linkmode_copy(state->advertising, all_adv);
619 
620 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
621 }
622 
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)623 static int phylink_validate(struct phylink *pl, unsigned long *supported,
624 			    struct phylink_link_state *state)
625 {
626 	const unsigned long *interfaces = pl->config->supported_interfaces;
627 
628 	if (state->interface == PHY_INTERFACE_MODE_NA)
629 		return phylink_validate_mask(pl, NULL, supported, state,
630 					     interfaces);
631 
632 	if (!test_bit(state->interface, interfaces))
633 		return -EINVAL;
634 
635 	return phylink_validate_mac_and_pcs(pl, supported, state);
636 }
637 
phylink_fill_fixedlink_supported(unsigned long * supported)638 static void phylink_fill_fixedlink_supported(unsigned long *supported)
639 {
640 	linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported);
641 	linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported);
642 	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported);
643 	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported);
644 	linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported);
645 	linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported);
646 	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported);
647 	linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported);
648 	linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported);
649 }
650 
phylink_parse_fixedlink(struct phylink * pl,const struct fwnode_handle * fwnode)651 static int phylink_parse_fixedlink(struct phylink *pl,
652 				   const struct fwnode_handle *fwnode)
653 {
654 	__ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, };
655 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
656 	const struct link_capabilities *c;
657 	struct fwnode_handle *fixed_node;
658 	struct gpio_desc *desc;
659 	u32 speed;
660 	int ret;
661 
662 	fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
663 	if (fixed_node) {
664 		ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
665 
666 		pl->link_config.speed = speed;
667 		pl->link_config.duplex = DUPLEX_HALF;
668 
669 		if (fwnode_property_read_bool(fixed_node, "full-duplex"))
670 			pl->link_config.duplex = DUPLEX_FULL;
671 
672 		/* We treat the "pause" and "asym-pause" terminology as
673 		 * defining the link partner's ability.
674 		 */
675 		if (fwnode_property_read_bool(fixed_node, "pause"))
676 			__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
677 				  pl->link_config.lp_advertising);
678 		if (fwnode_property_read_bool(fixed_node, "asym-pause"))
679 			__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
680 				  pl->link_config.lp_advertising);
681 
682 		if (ret == 0) {
683 			desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
684 						      GPIOD_IN, "?");
685 
686 			if (!IS_ERR(desc))
687 				pl->link_gpio = desc;
688 			else if (desc == ERR_PTR(-EPROBE_DEFER))
689 				ret = -EPROBE_DEFER;
690 		}
691 		fwnode_handle_put(fixed_node);
692 
693 		if (ret)
694 			return ret;
695 	} else {
696 		u32 prop[5];
697 
698 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
699 						     NULL, 0);
700 		if (ret != ARRAY_SIZE(prop)) {
701 			phylink_err(pl, "broken fixed-link?\n");
702 			return -EINVAL;
703 		}
704 
705 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
706 						     prop, ARRAY_SIZE(prop));
707 		if (!ret) {
708 			pl->link_config.duplex = prop[1] ?
709 						DUPLEX_FULL : DUPLEX_HALF;
710 			pl->link_config.speed = prop[2];
711 			if (prop[3])
712 				__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
713 					  pl->link_config.lp_advertising);
714 			if (prop[4])
715 				__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
716 					  pl->link_config.lp_advertising);
717 		}
718 	}
719 
720 	if (pl->link_config.speed > SPEED_1000 &&
721 	    pl->link_config.duplex != DUPLEX_FULL)
722 		phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
723 			     pl->link_config.speed);
724 
725 	linkmode_zero(pl->supported);
726 	phylink_fill_fixedlink_supported(pl->supported);
727 
728 	linkmode_copy(pl->link_config.advertising, pl->supported);
729 	phylink_validate(pl, pl->supported, &pl->link_config);
730 
731 	c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex,
732 			    pl->supported, true);
733 	if (c)
734 		linkmode_and(match, pl->supported, c->linkmodes);
735 
736 	linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask);
737 	linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask);
738 	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask);
739 	linkmode_and(pl->supported, pl->supported, mask);
740 
741 	phylink_set(pl->supported, MII);
742 
743 	if (c) {
744 		linkmode_or(pl->supported, pl->supported, match);
745 		linkmode_or(pl->link_config.lp_advertising,
746 			    pl->link_config.lp_advertising, match);
747 	} else {
748 		phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
749 			     pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
750 			     pl->link_config.speed);
751 	}
752 
753 	linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
754 		     pl->supported);
755 
756 	pl->link_config.link = 1;
757 	pl->link_config.an_complete = 1;
758 
759 	return 0;
760 }
761 
phylink_parse_mode(struct phylink * pl,const struct fwnode_handle * fwnode)762 static int phylink_parse_mode(struct phylink *pl,
763 			      const struct fwnode_handle *fwnode)
764 {
765 	struct fwnode_handle *dn;
766 	const char *managed;
767 	unsigned long caps;
768 
769 	if (pl->config->default_an_inband)
770 		pl->cfg_link_an_mode = MLO_AN_INBAND;
771 
772 	dn = fwnode_get_named_child_node(fwnode, "fixed-link");
773 	if (dn || fwnode_property_present(fwnode, "fixed-link"))
774 		pl->cfg_link_an_mode = MLO_AN_FIXED;
775 	fwnode_handle_put(dn);
776 
777 	if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
778 	     strcmp(managed, "in-band-status") == 0)) {
779 		if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
780 			phylink_err(pl,
781 				    "can't use both fixed-link and in-band-status\n");
782 			return -EINVAL;
783 		}
784 
785 		pl->cfg_link_an_mode = MLO_AN_INBAND;
786 	}
787 
788 	if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
789 		linkmode_zero(pl->supported);
790 		phylink_set(pl->supported, MII);
791 		phylink_set(pl->supported, Autoneg);
792 		phylink_set(pl->supported, Asym_Pause);
793 		phylink_set(pl->supported, Pause);
794 
795 		switch (pl->link_config.interface) {
796 		case PHY_INTERFACE_MODE_SGMII:
797 		case PHY_INTERFACE_MODE_PSGMII:
798 		case PHY_INTERFACE_MODE_QSGMII:
799 		case PHY_INTERFACE_MODE_QUSGMII:
800 		case PHY_INTERFACE_MODE_RGMII:
801 		case PHY_INTERFACE_MODE_RGMII_ID:
802 		case PHY_INTERFACE_MODE_RGMII_RXID:
803 		case PHY_INTERFACE_MODE_RGMII_TXID:
804 		case PHY_INTERFACE_MODE_RTBI:
805 		case PHY_INTERFACE_MODE_1000BASEX:
806 		case PHY_INTERFACE_MODE_2500BASEX:
807 		case PHY_INTERFACE_MODE_5GBASER:
808 		case PHY_INTERFACE_MODE_25GBASER:
809 		case PHY_INTERFACE_MODE_USXGMII:
810 		case PHY_INTERFACE_MODE_10G_QXGMII:
811 		case PHY_INTERFACE_MODE_10GKR:
812 		case PHY_INTERFACE_MODE_10GBASER:
813 		case PHY_INTERFACE_MODE_XLGMII:
814 		case PHY_INTERFACE_MODE_50GBASER:
815 		case PHY_INTERFACE_MODE_LAUI:
816 		case PHY_INTERFACE_MODE_100GBASEP:
817 			caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
818 			caps = phylink_get_capabilities(pl->link_config.interface, caps,
819 							RATE_MATCH_NONE);
820 			phylink_caps_to_linkmodes(pl->supported, caps);
821 			break;
822 
823 		default:
824 			phylink_err(pl,
825 				    "incorrect link mode %s for in-band status\n",
826 				    phy_modes(pl->link_config.interface));
827 			return -EINVAL;
828 		}
829 
830 		linkmode_copy(pl->link_config.advertising, pl->supported);
831 
832 		if (phylink_validate(pl, pl->supported, &pl->link_config)) {
833 			phylink_err(pl,
834 				    "failed to validate link configuration for in-band status\n");
835 			return -EINVAL;
836 		}
837 	}
838 
839 	return 0;
840 }
841 
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)842 static void phylink_apply_manual_flow(struct phylink *pl,
843 				      struct phylink_link_state *state)
844 {
845 	/* If autoneg is disabled, pause AN is also disabled */
846 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
847 			       state->advertising))
848 		state->pause &= ~MLO_PAUSE_AN;
849 
850 	/* Manual configuration of pause modes */
851 	if (!(pl->link_config.pause & MLO_PAUSE_AN))
852 		state->pause = pl->link_config.pause;
853 }
854 
phylink_resolve_an_pause(struct phylink_link_state * state)855 static void phylink_resolve_an_pause(struct phylink_link_state *state)
856 {
857 	bool tx_pause, rx_pause;
858 
859 	if (state->duplex == DUPLEX_FULL) {
860 		linkmode_resolve_pause(state->advertising,
861 				       state->lp_advertising,
862 				       &tx_pause, &rx_pause);
863 		if (tx_pause)
864 			state->pause |= MLO_PAUSE_TX;
865 		if (rx_pause)
866 			state->pause |= MLO_PAUSE_RX;
867 	}
868 }
869 
phylink_pcs_inband_caps(struct phylink_pcs * pcs,phy_interface_t interface)870 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,
871 				    phy_interface_t interface)
872 {
873 	if (pcs && pcs->ops->pcs_inband_caps)
874 		return pcs->ops->pcs_inband_caps(pcs, interface);
875 
876 	return 0;
877 }
878 
phylink_pcs_pre_config(struct phylink_pcs * pcs,phy_interface_t interface)879 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
880 				   phy_interface_t interface)
881 {
882 	if (pcs && pcs->ops->pcs_pre_config)
883 		pcs->ops->pcs_pre_config(pcs, interface);
884 }
885 
phylink_pcs_post_config(struct phylink_pcs * pcs,phy_interface_t interface)886 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
887 				   phy_interface_t interface)
888 {
889 	int err = 0;
890 
891 	if (pcs && pcs->ops->pcs_post_config)
892 		err = pcs->ops->pcs_post_config(pcs, interface);
893 
894 	return err;
895 }
896 
phylink_pcs_disable(struct phylink_pcs * pcs)897 static void phylink_pcs_disable(struct phylink_pcs *pcs)
898 {
899 	if (pcs && pcs->ops->pcs_disable)
900 		pcs->ops->pcs_disable(pcs);
901 }
902 
phylink_pcs_enable(struct phylink_pcs * pcs)903 static int phylink_pcs_enable(struct phylink_pcs *pcs)
904 {
905 	int err = 0;
906 
907 	if (pcs && pcs->ops->pcs_enable)
908 		err = pcs->ops->pcs_enable(pcs);
909 
910 	return err;
911 }
912 
phylink_pcs_config(struct phylink_pcs * pcs,unsigned int neg_mode,const struct phylink_link_state * state,bool permit_pause_to_mac)913 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
914 			      const struct phylink_link_state *state,
915 			      bool permit_pause_to_mac)
916 {
917 	if (!pcs)
918 		return 0;
919 
920 	return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
921 				    state->advertising, permit_pause_to_mac);
922 }
923 
phylink_pcs_link_up(struct phylink_pcs * pcs,unsigned int neg_mode,phy_interface_t interface,int speed,int duplex)924 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
925 				phy_interface_t interface, int speed,
926 				int duplex)
927 {
928 	if (pcs && pcs->ops->pcs_link_up)
929 		pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
930 }
931 
phylink_pcs_disable_eee(struct phylink_pcs * pcs)932 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs)
933 {
934 	if (pcs && pcs->ops->pcs_disable_eee)
935 		pcs->ops->pcs_disable_eee(pcs);
936 }
937 
phylink_pcs_enable_eee(struct phylink_pcs * pcs)938 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs)
939 {
940 	if (pcs && pcs->ops->pcs_enable_eee)
941 		pcs->ops->pcs_enable_eee(pcs);
942 }
943 
944 /* Query inband for a specific interface mode, asking the MAC for the
945  * PCS which will be used to handle the interface mode.
946  */
phylink_inband_caps(struct phylink * pl,phy_interface_t interface)947 static unsigned int phylink_inband_caps(struct phylink *pl,
948 					 phy_interface_t interface)
949 {
950 	struct phylink_pcs *pcs;
951 
952 	if (!pl->mac_ops->mac_select_pcs)
953 		return 0;
954 
955 	pcs = pl->mac_ops->mac_select_pcs(pl->config, interface);
956 	if (!pcs)
957 		return 0;
958 
959 	return phylink_pcs_inband_caps(pcs, interface);
960 }
961 
phylink_pcs_poll_stop(struct phylink * pl)962 static void phylink_pcs_poll_stop(struct phylink *pl)
963 {
964 	if (pl->cfg_link_an_mode == MLO_AN_INBAND)
965 		timer_delete(&pl->link_poll);
966 }
967 
phylink_pcs_poll_start(struct phylink * pl)968 static void phylink_pcs_poll_start(struct phylink *pl)
969 {
970 	if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
971 		mod_timer(&pl->link_poll, jiffies + HZ);
972 }
973 
phylink_pcs_pre_init(struct phylink * pl,struct phylink_pcs * pcs)974 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
975 {
976 	int ret = 0;
977 
978 	/* Signal to PCS driver that MAC requires RX clock for init */
979 	if (pl->config->mac_requires_rxc)
980 		pcs->rxc_always_on = true;
981 
982 	if (pcs->ops->pcs_pre_init)
983 		ret = pcs->ops->pcs_pre_init(pcs);
984 
985 	return ret;
986 }
987 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
988 
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)989 static void phylink_mac_config(struct phylink *pl,
990 			       const struct phylink_link_state *state)
991 {
992 	struct phylink_link_state st = *state;
993 
994 	/* Stop drivers incorrectly using these */
995 	linkmode_zero(st.lp_advertising);
996 	st.speed = SPEED_UNKNOWN;
997 	st.duplex = DUPLEX_UNKNOWN;
998 	st.an_complete = false;
999 	st.link = false;
1000 
1001 	phylink_dbg(pl,
1002 		    "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1003 		    __func__, phylink_an_mode_str(pl->act_link_an_mode),
1004 		    phy_modes(st.interface),
1005 		    phy_rate_matching_to_str(st.rate_matching),
1006 		    __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1007 		    st.pause);
1008 
1009 	pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st);
1010 }
1011 
phylink_pcs_an_restart(struct phylink * pl)1012 static void phylink_pcs_an_restart(struct phylink *pl)
1013 {
1014 	if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1015 					 pl->link_config.advertising) &&
1016 	    phy_interface_mode_is_8023z(pl->link_config.interface) &&
1017 	    phylink_autoneg_inband(pl->act_link_an_mode))
1018 		pl->pcs->ops->pcs_an_restart(pl->pcs);
1019 }
1020 
1021 enum inband_type {
1022 	INBAND_NONE,
1023 	INBAND_CISCO_SGMII,
1024 	INBAND_BASEX,
1025 };
1026 
phylink_get_inband_type(phy_interface_t interface)1027 static enum inband_type phylink_get_inband_type(phy_interface_t interface)
1028 {
1029 	switch (interface) {
1030 	case PHY_INTERFACE_MODE_SGMII:
1031 	case PHY_INTERFACE_MODE_QSGMII:
1032 	case PHY_INTERFACE_MODE_QUSGMII:
1033 	case PHY_INTERFACE_MODE_USXGMII:
1034 	case PHY_INTERFACE_MODE_10G_QXGMII:
1035 		/* These protocols are designed for use with a PHY which
1036 		 * communicates its negotiation result back to the MAC via
1037 		 * inband communication. Note: there exist PHYs that run
1038 		 * with SGMII but do not send the inband data.
1039 		 */
1040 		return INBAND_CISCO_SGMII;
1041 
1042 	case PHY_INTERFACE_MODE_1000BASEX:
1043 	case PHY_INTERFACE_MODE_2500BASEX:
1044 		/* 1000base-X is designed for use media-side for Fibre
1045 		 * connections, and thus the Autoneg bit needs to be
1046 		 * taken into account. We also do this for 2500base-X
1047 		 * as well, but drivers may not support this, so may
1048 		 * need to override this.
1049 		 */
1050 		return INBAND_BASEX;
1051 
1052 	default:
1053 		return INBAND_NONE;
1054 	}
1055 }
1056 
1057 /**
1058  * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1059  * @pl: a pointer to a &struct phylink returned from phylink_create()
1060  * @pcs: a pointer to &struct phylink_pcs
1061  * @interface: interface mode to be used
1062  * @advertising: adertisement ethtool link mode mask
1063  *
1064  * Determines the negotiation mode to be used by the PCS, and returns
1065  * one of:
1066  *
1067  * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1068  * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1069  *   will be used.
1070  * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1071  *   disabled
1072  * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1073  *
1074  * Note: this is for cases where the PCS itself is involved in negotiation
1075  * (e.g. Clause 37, SGMII and similar) not Clause 73.
1076  */
phylink_pcs_neg_mode(struct phylink * pl,struct phylink_pcs * pcs,phy_interface_t interface,const unsigned long * advertising)1077 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs,
1078 				 phy_interface_t interface,
1079 				 const unsigned long *advertising)
1080 {
1081 	unsigned int pcs_ib_caps = 0;
1082 	unsigned int phy_ib_caps = 0;
1083 	unsigned int neg_mode, mode;
1084 	enum inband_type type;
1085 
1086 	type = phylink_get_inband_type(interface);
1087 	if (type == INBAND_NONE) {
1088 		pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE;
1089 		pl->act_link_an_mode = pl->req_link_an_mode;
1090 		return;
1091 	}
1092 
1093 	mode = pl->req_link_an_mode;
1094 
1095 	pl->phy_ib_mode = 0;
1096 
1097 	if (pcs)
1098 		pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface);
1099 
1100 	if (pl->phydev)
1101 		phy_ib_caps = phy_inband_caps(pl->phydev, interface);
1102 
1103 	phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n",
1104 		    phy_modes(interface), pcs_ib_caps, phy_ib_caps);
1105 
1106 	if (!phylink_autoneg_inband(mode)) {
1107 		bool pcs_ib_only = false;
1108 		bool phy_ib_only = false;
1109 
1110 		if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) {
1111 			/* PCS supports reporting in-band capabilities, and
1112 			 * supports more than disable mode.
1113 			 */
1114 			if (pcs_ib_caps & LINK_INBAND_DISABLE)
1115 				neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1116 			else if (pcs_ib_caps & LINK_INBAND_ENABLE)
1117 				pcs_ib_only = true;
1118 		}
1119 
1120 		if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) {
1121 			/* PHY supports in-band capabilities, and supports
1122 			 * more than disable mode.
1123 			 */
1124 			if (phy_ib_caps & LINK_INBAND_DISABLE)
1125 				pl->phy_ib_mode = LINK_INBAND_DISABLE;
1126 			else if (phy_ib_caps & LINK_INBAND_BYPASS)
1127 				pl->phy_ib_mode = LINK_INBAND_BYPASS;
1128 			else if (phy_ib_caps & LINK_INBAND_ENABLE)
1129 				phy_ib_only = true;
1130 		}
1131 
1132 		/* If either the PCS or PHY requires inband to be enabled,
1133 		 * this is an invalid configuration. Provide a diagnostic
1134 		 * message for this case, but don't try to force the issue.
1135 		 */
1136 		if (pcs_ib_only || phy_ib_only)
1137 			phylink_warn(pl,
1138 				     "firmware wants %s mode, but %s%s%s requires inband\n",
1139 				     phylink_an_mode_str(mode),
1140 				     pcs_ib_only ? "PCS" : "",
1141 				     pcs_ib_only && phy_ib_only ? " and " : "",
1142 				     phy_ib_only ? "PHY" : "");
1143 
1144 		neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1145 	} else if (type == INBAND_CISCO_SGMII || pl->phydev) {
1146 		/* For SGMII modes which are designed to be used with PHYs, or
1147 		 * Base-X with a PHY, we try to use in-band mode where-ever
1148 		 * possible. However, there are some PHYs e.g. BCM84881 which
1149 		 * do not support in-band.
1150 		 */
1151 		const unsigned int inband_ok = LINK_INBAND_ENABLE |
1152 					       LINK_INBAND_BYPASS;
1153 		const unsigned int outband_ok = LINK_INBAND_DISABLE |
1154 						LINK_INBAND_BYPASS;
1155 		/* PCS	PHY
1156 		 * D E	D E
1157 		 * 0 0  0 0	no information			inband enabled
1158 		 * 1 0  0 0	pcs doesn't support		outband
1159 		 * 0 1  0 0	pcs required			inband enabled
1160 		 * 1 1  0 0	pcs optional			inband enabled
1161 		 * 0 0  1 0	phy doesn't support		outband
1162 		 * 1 0  1 0	pcs+phy doesn't support		outband
1163 		 * 0 1  1 0	pcs required, phy doesn't support, invalid
1164 		 * 1 1  1 0	pcs optional, phy doesn't support, outband
1165 		 * 0 0  0 1	phy required			inband enabled
1166 		 * 1 0  0 1	pcs doesn't support, phy required, invalid
1167 		 * 0 1  0 1	pcs+phy required		inband enabled
1168 		 * 1 1  0 1	pcs optional, phy required	inband enabled
1169 		 * 0 0  1 1	phy optional			inband enabled
1170 		 * 1 0  1 1	pcs doesn't support, phy optional, outband
1171 		 * 0 1  1 1	pcs required, phy optional	inband enabled
1172 		 * 1 1  1 1	pcs+phy optional		inband enabled
1173 		 */
1174 		if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) &&
1175 		    (!phy_ib_caps || phy_ib_caps & inband_ok)) {
1176 			/* In-band supported or unknown at both ends. Enable
1177 			 * in-band mode with or without bypass at the PHY.
1178 			 */
1179 			if (phy_ib_caps & LINK_INBAND_ENABLE)
1180 				pl->phy_ib_mode = LINK_INBAND_ENABLE;
1181 			else if (phy_ib_caps & LINK_INBAND_BYPASS)
1182 				pl->phy_ib_mode = LINK_INBAND_BYPASS;
1183 
1184 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1185 		} else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) &&
1186 			   (!phy_ib_caps || phy_ib_caps & outband_ok)) {
1187 			/* Either in-band not supported at at least one end.
1188 			 * In-band bypass at the other end is possible.
1189 			 */
1190 			if (phy_ib_caps & LINK_INBAND_DISABLE)
1191 				pl->phy_ib_mode = LINK_INBAND_DISABLE;
1192 			else if (phy_ib_caps & LINK_INBAND_BYPASS)
1193 				pl->phy_ib_mode = LINK_INBAND_BYPASS;
1194 
1195 			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1196 			if (pl->phydev)
1197 				mode = MLO_AN_PHY;
1198 		} else {
1199 			/* invalid */
1200 			phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band",
1201 				     phy_modes(interface));
1202 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1203 		}
1204 	} else {
1205 		/* For Base-X without a PHY */
1206 		if (pcs_ib_caps == LINK_INBAND_DISABLE)
1207 			/* If the PCS doesn't support inband, then inband must
1208 			 * be disabled.
1209 			 */
1210 			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1211 		else if (pcs_ib_caps == LINK_INBAND_ENABLE)
1212 			/* If the PCS requires inband, then inband must always
1213 			 * be enabled.
1214 			 */
1215 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1216 		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1217 					   advertising))
1218 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1219 		else
1220 			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1221 	}
1222 
1223 	pl->pcs_neg_mode = neg_mode;
1224 	pl->act_link_an_mode = mode;
1225 }
1226 
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)1227 static void phylink_major_config(struct phylink *pl, bool restart,
1228 				  const struct phylink_link_state *state)
1229 {
1230 	struct phylink_pcs *pcs = NULL;
1231 	bool pcs_changed = false;
1232 	unsigned int rate_kbd;
1233 	int err;
1234 
1235 	phylink_dbg(pl, "major config, requested %s/%s\n",
1236 		    phylink_an_mode_str(pl->req_link_an_mode),
1237 		    phy_modes(state->interface));
1238 
1239 	pl->major_config_failed = false;
1240 
1241 	if (pl->mac_ops->mac_select_pcs) {
1242 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1243 		if (IS_ERR(pcs)) {
1244 			phylink_err(pl,
1245 				    "mac_select_pcs unexpectedly failed: %pe\n",
1246 				    pcs);
1247 
1248 			pl->major_config_failed = true;
1249 			return;
1250 		}
1251 
1252 		pcs_changed = pl->pcs != pcs;
1253 	}
1254 
1255 	phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising);
1256 
1257 	phylink_dbg(pl, "major config, active %s/%s/%s\n",
1258 		    phylink_an_mode_str(pl->act_link_an_mode),
1259 		    phylink_pcs_mode_str(pl->pcs_neg_mode),
1260 		    phy_modes(state->interface));
1261 
1262 	phylink_pcs_poll_stop(pl);
1263 
1264 	if (pl->mac_ops->mac_prepare) {
1265 		err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode,
1266 					       state->interface);
1267 		if (err < 0) {
1268 			phylink_err(pl, "mac_prepare failed: %pe\n",
1269 				    ERR_PTR(err));
1270 			pl->major_config_failed = true;
1271 			return;
1272 		}
1273 	}
1274 
1275 	/* If we have a new PCS, switch to the new PCS after preparing the MAC
1276 	 * for the change.
1277 	 */
1278 	if (pcs_changed) {
1279 		phylink_pcs_disable(pl->pcs);
1280 
1281 		if (pl->pcs)
1282 			pl->pcs->phylink = NULL;
1283 
1284 		pcs->phylink = pl;
1285 
1286 		pl->pcs = pcs;
1287 	}
1288 
1289 	if (pl->pcs)
1290 		phylink_pcs_pre_config(pl->pcs, state->interface);
1291 
1292 	phylink_mac_config(pl, state);
1293 
1294 	if (pl->pcs) {
1295 		err = phylink_pcs_post_config(pl->pcs, state->interface);
1296 		if (err < 0) {
1297 			phylink_err(pl, "pcs_post_config failed: %pe\n",
1298 				    ERR_PTR(err));
1299 
1300 			pl->major_config_failed = true;
1301 		}
1302 	}
1303 
1304 	if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1305 		phylink_pcs_enable(pl->pcs);
1306 
1307 	err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state,
1308 				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1309 	if (err < 0) {
1310 		phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err));
1311 		pl->major_config_failed = true;
1312 	} else if (err > 0) {
1313 		restart = true;
1314 	}
1315 
1316 	if (restart)
1317 		phylink_pcs_an_restart(pl);
1318 
1319 	if (pl->mac_ops->mac_finish) {
1320 		err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode,
1321 					      state->interface);
1322 		if (err < 0) {
1323 			phylink_err(pl, "mac_finish failed: %pe\n",
1324 				    ERR_PTR(err));
1325 
1326 			pl->major_config_failed = true;
1327 		}
1328 	}
1329 
1330 	if (pl->phydev && pl->phy_ib_mode) {
1331 		err = phy_config_inband(pl->phydev, pl->phy_ib_mode);
1332 		if (err < 0) {
1333 			phylink_err(pl, "phy_config_inband: %pe\n",
1334 				    ERR_PTR(err));
1335 
1336 			pl->major_config_failed = true;
1337 		}
1338 	}
1339 
1340 	if (pl->sfp_bus) {
1341 		rate_kbd = phylink_interface_signal_rate(state->interface);
1342 		if (rate_kbd)
1343 			sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1344 	}
1345 
1346 	phylink_pcs_poll_start(pl);
1347 }
1348 
1349 /*
1350  * Reconfigure for a change of inband advertisement.
1351  * If we have a separate PCS, we only need to call its pcs_config() method,
1352  * and then restart AN if it indicates something changed. Otherwise, we do
1353  * the full MAC reconfiguration.
1354  */
phylink_change_inband_advert(struct phylink * pl)1355 static int phylink_change_inband_advert(struct phylink *pl)
1356 {
1357 	int ret;
1358 
1359 	if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1360 		return 0;
1361 
1362 	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1363 		    phylink_an_mode_str(pl->req_link_an_mode),
1364 		    phy_modes(pl->link_config.interface),
1365 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1366 		    pl->link_config.pause);
1367 
1368 	/* Recompute the PCS neg mode */
1369 	phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface,
1370 			     pl->link_config.advertising);
1371 
1372 	/* Modern PCS-based method; update the advert at the PCS, and
1373 	 * restart negotiation if the pcs_config() helper indicates that
1374 	 * the programmed advertisement has changed.
1375 	 */
1376 	ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config,
1377 				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1378 	if (ret < 0)
1379 		return ret;
1380 
1381 	if (ret > 0)
1382 		phylink_pcs_an_restart(pl);
1383 
1384 	return 0;
1385 }
1386 
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1387 static void phylink_mac_pcs_get_state(struct phylink *pl,
1388 				      struct phylink_link_state *state)
1389 {
1390 	struct phylink_pcs *pcs;
1391 	bool autoneg;
1392 
1393 	linkmode_copy(state->advertising, pl->link_config.advertising);
1394 	linkmode_zero(state->lp_advertising);
1395 	state->interface = pl->link_config.interface;
1396 	state->rate_matching = pl->link_config.rate_matching;
1397 	state->an_complete = 0;
1398 	state->link = 1;
1399 
1400 	autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;
1401 	if (autoneg) {
1402 		state->speed = SPEED_UNKNOWN;
1403 		state->duplex = DUPLEX_UNKNOWN;
1404 		state->pause = MLO_PAUSE_NONE;
1405 	} else {
1406 		state->speed =  pl->link_config.speed;
1407 		state->duplex = pl->link_config.duplex;
1408 		state->pause = pl->link_config.pause;
1409 	}
1410 
1411 	pcs = pl->pcs;
1412 	if (pcs)
1413 		pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state);
1414 	else
1415 		state->link = 0;
1416 }
1417 
1418 /* The fixed state is... fixed except for the link state,
1419  * which may be determined by a GPIO or a callback.
1420  */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1421 static void phylink_get_fixed_state(struct phylink *pl,
1422 				    struct phylink_link_state *state)
1423 {
1424 	*state = pl->link_config;
1425 	if (pl->config->get_fixed_state)
1426 		pl->config->get_fixed_state(pl->config, state);
1427 	else if (pl->link_gpio)
1428 		state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1429 
1430 	state->pause = MLO_PAUSE_NONE;
1431 	phylink_resolve_an_pause(state);
1432 }
1433 
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1434 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1435 {
1436 	struct phylink_link_state link_state;
1437 	struct phy_device *phy = pl->phydev;
1438 
1439 	switch (pl->req_link_an_mode) {
1440 	case MLO_AN_PHY:
1441 		link_state = pl->phy_state;
1442 		break;
1443 
1444 	case MLO_AN_FIXED:
1445 		phylink_get_fixed_state(pl, &link_state);
1446 		break;
1447 
1448 	case MLO_AN_INBAND:
1449 		link_state = pl->link_config;
1450 		if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1451 			link_state.pause = MLO_PAUSE_NONE;
1452 		break;
1453 
1454 	default: /* can't happen */
1455 		return;
1456 	}
1457 
1458 	link_state.link = false;
1459 
1460 	phylink_apply_manual_flow(pl, &link_state);
1461 	if (phy)
1462 		mutex_lock(&phy->lock);
1463 	phylink_major_config(pl, force_restart, &link_state);
1464 	if (phy)
1465 		mutex_unlock(&phy->lock);
1466 }
1467 
phylink_pause_to_str(int pause)1468 static const char *phylink_pause_to_str(int pause)
1469 {
1470 	switch (pause & MLO_PAUSE_TXRX_MASK) {
1471 	case MLO_PAUSE_TX | MLO_PAUSE_RX:
1472 		return "rx/tx";
1473 	case MLO_PAUSE_TX:
1474 		return "tx";
1475 	case MLO_PAUSE_RX:
1476 		return "rx";
1477 	default:
1478 		return "off";
1479 	}
1480 }
1481 
phylink_deactivate_lpi(struct phylink * pl)1482 static void phylink_deactivate_lpi(struct phylink *pl)
1483 {
1484 	if (pl->mac_enable_tx_lpi) {
1485 		pl->mac_enable_tx_lpi = false;
1486 
1487 		phylink_dbg(pl, "disabling LPI\n");
1488 
1489 		pl->mac_ops->mac_disable_tx_lpi(pl->config);
1490 
1491 		phylink_pcs_disable_eee(pl->pcs);
1492 	}
1493 }
1494 
phylink_activate_lpi(struct phylink * pl)1495 static void phylink_activate_lpi(struct phylink *pl)
1496 {
1497 	int err;
1498 
1499 	if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) {
1500 		phylink_dbg(pl, "MAC does not support LPI with %s\n",
1501 			    phy_modes(pl->cur_interface));
1502 		return;
1503 	}
1504 
1505 	phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n",
1506 		    pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop);
1507 
1508 	phylink_pcs_enable_eee(pl->pcs);
1509 
1510 	err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer,
1511 					     pl->mac_tx_clk_stop);
1512 	if (err) {
1513 		phylink_pcs_disable_eee(pl->pcs);
1514 		phylink_err(pl, "%ps() failed: %pe\n",
1515 			    pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err));
1516 		return;
1517 	}
1518 
1519 	pl->mac_enable_tx_lpi = true;
1520 }
1521 
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1522 static void phylink_link_up(struct phylink *pl,
1523 			    struct phylink_link_state link_state)
1524 {
1525 	struct net_device *ndev = pl->netdev;
1526 	int speed, duplex;
1527 	bool rx_pause;
1528 
1529 	speed = link_state.speed;
1530 	duplex = link_state.duplex;
1531 	rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1532 
1533 	switch (link_state.rate_matching) {
1534 	case RATE_MATCH_PAUSE:
1535 		/* The PHY is doing rate matchion from the media rate (in
1536 		 * the link_state) to the interface speed, and will send
1537 		 * pause frames to the MAC to limit its transmission speed.
1538 		 */
1539 		speed = phylink_interface_max_speed(link_state.interface);
1540 		duplex = DUPLEX_FULL;
1541 		rx_pause = true;
1542 		break;
1543 
1544 	case RATE_MATCH_CRS:
1545 		/* The PHY is doing rate matchion from the media rate (in
1546 		 * the link_state) to the interface speed, and will cause
1547 		 * collisions to the MAC to limit its transmission speed.
1548 		 */
1549 		speed = phylink_interface_max_speed(link_state.interface);
1550 		duplex = DUPLEX_HALF;
1551 		break;
1552 	}
1553 
1554 	pl->cur_interface = link_state.interface;
1555 
1556 	phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed,
1557 			    duplex);
1558 
1559 	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode,
1560 				 pl->cur_interface, speed, duplex,
1561 				 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1562 
1563 	if (pl->mac_supports_eee && pl->phy_enable_tx_lpi)
1564 		phylink_activate_lpi(pl);
1565 
1566 	if (ndev)
1567 		netif_carrier_on(ndev);
1568 
1569 	phylink_info(pl,
1570 		     "Link is Up - %s/%s - flow control %s\n",
1571 		     phy_speed_to_str(link_state.speed),
1572 		     phy_duplex_to_str(link_state.duplex),
1573 		     phylink_pause_to_str(link_state.pause));
1574 }
1575 
phylink_link_down(struct phylink * pl)1576 static void phylink_link_down(struct phylink *pl)
1577 {
1578 	struct net_device *ndev = pl->netdev;
1579 
1580 	if (ndev)
1581 		netif_carrier_off(ndev);
1582 
1583 	phylink_deactivate_lpi(pl);
1584 
1585 	pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode,
1586 				   pl->cur_interface);
1587 	phylink_info(pl, "Link is Down\n");
1588 }
1589 
phylink_link_is_up(struct phylink * pl)1590 static bool phylink_link_is_up(struct phylink *pl)
1591 {
1592 	return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state;
1593 }
1594 
phylink_resolve(struct work_struct * w)1595 static void phylink_resolve(struct work_struct *w)
1596 {
1597 	struct phylink *pl = container_of(w, struct phylink, resolve);
1598 	struct phylink_link_state link_state;
1599 	bool mac_config = false;
1600 	bool retrigger = false;
1601 	struct phy_device *phy;
1602 	bool cur_link_state;
1603 
1604 	mutex_lock(&pl->phydev_mutex);
1605 	phy = pl->phydev;
1606 	if (phy)
1607 		mutex_lock(&phy->lock);
1608 	mutex_lock(&pl->state_mutex);
1609 	cur_link_state = phylink_link_is_up(pl);
1610 
1611 	if (pl->phylink_disable_state) {
1612 		pl->link_failed = false;
1613 		link_state.link = false;
1614 	} else if (pl->link_failed) {
1615 		link_state.link = false;
1616 		retrigger = true;
1617 	} else if (pl->act_link_an_mode == MLO_AN_FIXED) {
1618 		phylink_get_fixed_state(pl, &link_state);
1619 		mac_config = link_state.link;
1620 	} else if (pl->act_link_an_mode == MLO_AN_PHY) {
1621 		link_state = pl->phy_state;
1622 		mac_config = link_state.link;
1623 	} else {
1624 		phylink_mac_pcs_get_state(pl, &link_state);
1625 
1626 		/* The PCS may have a latching link-fail indicator. If the link
1627 		 * was up, bring the link down and re-trigger the resolve.
1628 		 * Otherwise, re-read the PCS state to get the current status
1629 		 * of the link.
1630 		 */
1631 		if (!link_state.link) {
1632 			if (cur_link_state)
1633 				retrigger = true;
1634 			else
1635 				phylink_mac_pcs_get_state(pl, &link_state);
1636 		}
1637 
1638 		/* If we have a phy, the "up" state is the union of both the
1639 		 * PHY and the MAC
1640 		 */
1641 		if (phy)
1642 			link_state.link &= pl->phy_state.link;
1643 
1644 		/* Only update if the PHY link is up */
1645 		if (phy && pl->phy_state.link) {
1646 			/* If the interface has changed, force a link down
1647 			 * event if the link isn't already down, and re-resolve.
1648 			 */
1649 			if (link_state.interface != pl->phy_state.interface) {
1650 				retrigger = true;
1651 				link_state.link = false;
1652 			}
1653 
1654 			link_state.interface = pl->phy_state.interface;
1655 
1656 			/* If we are doing rate matching, then the link
1657 			 * speed/duplex comes from the PHY
1658 			 */
1659 			if (pl->phy_state.rate_matching) {
1660 				link_state.rate_matching =
1661 					pl->phy_state.rate_matching;
1662 				link_state.speed = pl->phy_state.speed;
1663 				link_state.duplex = pl->phy_state.duplex;
1664 			}
1665 
1666 			/* If we have a PHY, we need to update with the PHY
1667 			 * flow control bits.
1668 			 */
1669 			link_state.pause = pl->phy_state.pause;
1670 			mac_config = true;
1671 		}
1672 	}
1673 
1674 	if (pl->act_link_an_mode != MLO_AN_FIXED)
1675 		phylink_apply_manual_flow(pl, &link_state);
1676 
1677 	if (mac_config) {
1678 		if (link_state.interface != pl->link_config.interface) {
1679 			/* The interface has changed, force the link down and
1680 			 * then reconfigure.
1681 			 */
1682 			if (cur_link_state) {
1683 				phylink_link_down(pl);
1684 				cur_link_state = false;
1685 			}
1686 			phylink_major_config(pl, false, &link_state);
1687 			pl->link_config.interface = link_state.interface;
1688 		}
1689 	}
1690 
1691 	/* If configuration of the interface failed, force the link down
1692 	 * until we get a successful configuration.
1693 	 */
1694 	if (pl->major_config_failed)
1695 		link_state.link = false;
1696 
1697 	if (link_state.link != cur_link_state) {
1698 		pl->old_link_state = link_state.link;
1699 		if (!link_state.link)
1700 			phylink_link_down(pl);
1701 		else
1702 			phylink_link_up(pl, link_state);
1703 	}
1704 	if (!link_state.link && retrigger) {
1705 		pl->link_failed = false;
1706 		queue_work(system_power_efficient_wq, &pl->resolve);
1707 	}
1708 	mutex_unlock(&pl->state_mutex);
1709 	if (phy)
1710 		mutex_unlock(&phy->lock);
1711 	mutex_unlock(&pl->phydev_mutex);
1712 }
1713 
phylink_run_resolve(struct phylink * pl)1714 static void phylink_run_resolve(struct phylink *pl)
1715 {
1716 	if (!pl->phylink_disable_state)
1717 		queue_work(system_power_efficient_wq, &pl->resolve);
1718 }
1719 
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1720 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1721 {
1722 	unsigned long state = pl->phylink_disable_state;
1723 
1724 	set_bit(bit, &pl->phylink_disable_state);
1725 	if (state == 0) {
1726 		queue_work(system_power_efficient_wq, &pl->resolve);
1727 		flush_work(&pl->resolve);
1728 	}
1729 }
1730 
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1731 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1732 {
1733 	clear_bit(bit, &pl->phylink_disable_state);
1734 	phylink_run_resolve(pl);
1735 }
1736 
phylink_fixed_poll(struct timer_list * t)1737 static void phylink_fixed_poll(struct timer_list *t)
1738 {
1739 	struct phylink *pl = container_of(t, struct phylink, link_poll);
1740 
1741 	mod_timer(t, jiffies + HZ);
1742 
1743 	phylink_run_resolve(pl);
1744 }
1745 
1746 static const struct sfp_upstream_ops sfp_phylink_ops;
1747 
phylink_register_sfp(struct phylink * pl,const struct fwnode_handle * fwnode)1748 static int phylink_register_sfp(struct phylink *pl,
1749 				const struct fwnode_handle *fwnode)
1750 {
1751 	struct sfp_bus *bus;
1752 	int ret;
1753 
1754 	if (!fwnode)
1755 		return 0;
1756 
1757 	bus = sfp_bus_find_fwnode(fwnode);
1758 	if (IS_ERR(bus)) {
1759 		phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1760 		return PTR_ERR(bus);
1761 	}
1762 
1763 	pl->sfp_bus = bus;
1764 
1765 	ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1766 	sfp_bus_put(bus);
1767 
1768 	return ret;
1769 }
1770 
1771 /**
1772  * phylink_set_fixed_link() - set the fixed link
1773  * @pl: a pointer to a &struct phylink returned from phylink_create()
1774  * @state: a pointer to a struct phylink_link_state.
1775  *
1776  * This function is used when the link parameters are known and do not change,
1777  * making it suitable for certain types of network connections.
1778  *
1779  * Returns: zero on success or negative error code.
1780  */
phylink_set_fixed_link(struct phylink * pl,const struct phylink_link_state * state)1781 int phylink_set_fixed_link(struct phylink *pl,
1782 			   const struct phylink_link_state *state)
1783 {
1784 	const struct link_capabilities *c;
1785 	unsigned long *adv;
1786 
1787 	if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1788 	    !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1789 		return -EINVAL;
1790 
1791 	c = phy_caps_lookup(state->speed, state->duplex,
1792 			    pl->supported, true);
1793 	if (!c)
1794 		return -EINVAL;
1795 
1796 	adv = pl->link_config.advertising;
1797 	linkmode_and(adv, pl->supported, c->linkmodes);
1798 	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1799 
1800 	pl->link_config.speed = state->speed;
1801 	pl->link_config.duplex = state->duplex;
1802 	pl->link_config.link = 1;
1803 	pl->link_config.an_complete = 1;
1804 
1805 	pl->cfg_link_an_mode = MLO_AN_FIXED;
1806 	pl->req_link_an_mode = pl->cfg_link_an_mode;
1807 
1808 	return 0;
1809 }
1810 EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1811 
1812 /**
1813  * phylink_create() - create a phylink instance
1814  * @config: a pointer to the target &struct phylink_config
1815  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1816  *	interface
1817  * @iface: the desired link mode defined by &typedef phy_interface_t
1818  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1819  *
1820  * Create a new phylink instance, and parse the link parameters found in @np.
1821  * This will parse in-band modes, fixed-link or SFP configuration.
1822  *
1823  * Note: the rtnl lock must not be held when calling this function.
1824  *
1825  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1826  * must use IS_ERR() to check for errors from this function.
1827  */
phylink_create(struct phylink_config * config,const struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1828 struct phylink *phylink_create(struct phylink_config *config,
1829 			       const struct fwnode_handle *fwnode,
1830 			       phy_interface_t iface,
1831 			       const struct phylink_mac_ops *mac_ops)
1832 {
1833 	struct phylink *pl;
1834 	int ret;
1835 
1836 	/* Validate the supplied configuration */
1837 	if (phy_interface_empty(config->supported_interfaces)) {
1838 		dev_err(config->dev,
1839 			"phylink: error: empty supported_interfaces\n");
1840 		return ERR_PTR(-EINVAL);
1841 	}
1842 
1843 	pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1844 	if (!pl)
1845 		return ERR_PTR(-ENOMEM);
1846 
1847 	mutex_init(&pl->phydev_mutex);
1848 	mutex_init(&pl->state_mutex);
1849 	INIT_WORK(&pl->resolve, phylink_resolve);
1850 
1851 	pl->config = config;
1852 	if (config->type == PHYLINK_NETDEV) {
1853 		pl->netdev = to_net_dev(config->dev);
1854 		netif_carrier_off(pl->netdev);
1855 	} else if (config->type == PHYLINK_DEV) {
1856 		pl->dev = config->dev;
1857 	} else {
1858 		kfree(pl);
1859 		return ERR_PTR(-EINVAL);
1860 	}
1861 
1862 	pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops);
1863 	pl->mac_supports_eee = pl->mac_supports_eee_ops &&
1864 			       pl->config->lpi_capabilities &&
1865 			       !phy_interface_empty(pl->config->lpi_interfaces);
1866 
1867 	/* Set the default EEE configuration */
1868 	pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default;
1869 	pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled;
1870 	pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default;
1871 
1872 	pl->phy_state.interface = iface;
1873 	pl->link_interface = iface;
1874 	if (iface == PHY_INTERFACE_MODE_MOCA)
1875 		pl->link_port = PORT_BNC;
1876 	else
1877 		pl->link_port = PORT_MII;
1878 	pl->link_config.interface = iface;
1879 	pl->link_config.pause = MLO_PAUSE_AN;
1880 	pl->link_config.speed = SPEED_UNKNOWN;
1881 	pl->link_config.duplex = DUPLEX_UNKNOWN;
1882 	pl->pcs_state = PCS_STATE_DOWN;
1883 	pl->mac_ops = mac_ops;
1884 	__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1885 	timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1886 
1887 	linkmode_fill(pl->supported);
1888 	linkmode_copy(pl->link_config.advertising, pl->supported);
1889 	phylink_validate(pl, pl->supported, &pl->link_config);
1890 
1891 	ret = phylink_parse_mode(pl, fwnode);
1892 	if (ret < 0) {
1893 		kfree(pl);
1894 		return ERR_PTR(ret);
1895 	}
1896 
1897 	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1898 		ret = phylink_parse_fixedlink(pl, fwnode);
1899 		if (ret < 0) {
1900 			kfree(pl);
1901 			return ERR_PTR(ret);
1902 		}
1903 	}
1904 
1905 	pl->req_link_an_mode = pl->cfg_link_an_mode;
1906 
1907 	ret = phylink_register_sfp(pl, fwnode);
1908 	if (ret < 0) {
1909 		kfree(pl);
1910 		return ERR_PTR(ret);
1911 	}
1912 
1913 	return pl;
1914 }
1915 EXPORT_SYMBOL_GPL(phylink_create);
1916 
1917 /**
1918  * phylink_destroy() - cleanup and destroy the phylink instance
1919  * @pl: a pointer to a &struct phylink returned from phylink_create()
1920  *
1921  * Destroy a phylink instance. Any PHY that has been attached must have been
1922  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1923  *
1924  * Note: the rtnl lock must not be held when calling this function.
1925  */
phylink_destroy(struct phylink * pl)1926 void phylink_destroy(struct phylink *pl)
1927 {
1928 	sfp_bus_del_upstream(pl->sfp_bus);
1929 	if (pl->link_gpio)
1930 		gpiod_put(pl->link_gpio);
1931 
1932 	cancel_work_sync(&pl->resolve);
1933 	kfree(pl);
1934 }
1935 EXPORT_SYMBOL_GPL(phylink_destroy);
1936 
1937 /**
1938  * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1939  * @pl: a pointer to a &struct phylink returned from phylink_create()
1940  *
1941  * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1942  * no PHY is needed.
1943  *
1944  * Returns true if phylink will be expecting a PHY.
1945  */
phylink_expects_phy(struct phylink * pl)1946 bool phylink_expects_phy(struct phylink *pl)
1947 {
1948 	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1949 	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1950 	     phy_interface_mode_is_8023z(pl->link_interface)))
1951 		return false;
1952 	return true;
1953 }
1954 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1955 
phylink_phy_change(struct phy_device * phydev,bool up)1956 static void phylink_phy_change(struct phy_device *phydev, bool up)
1957 {
1958 	struct phylink *pl = phydev->phylink;
1959 	bool tx_pause, rx_pause;
1960 
1961 	phy_get_pause(phydev, &tx_pause, &rx_pause);
1962 
1963 	mutex_lock(&pl->state_mutex);
1964 	pl->phy_state.speed = phydev->speed;
1965 	pl->phy_state.duplex = phydev->duplex;
1966 	pl->phy_state.rate_matching = phydev->rate_matching;
1967 	pl->phy_state.pause = MLO_PAUSE_NONE;
1968 	if (tx_pause)
1969 		pl->phy_state.pause |= MLO_PAUSE_TX;
1970 	if (rx_pause)
1971 		pl->phy_state.pause |= MLO_PAUSE_RX;
1972 	pl->phy_state.interface = phydev->interface;
1973 	pl->phy_state.link = up;
1974 	if (!up)
1975 		pl->link_failed = true;
1976 
1977 	/* Get the LPI state from phylib */
1978 	pl->phy_enable_tx_lpi = phydev->enable_tx_lpi;
1979 	pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer;
1980 	mutex_unlock(&pl->state_mutex);
1981 
1982 	phylink_run_resolve(pl);
1983 
1984 	phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n",
1985 		    up ? "up" : "down",
1986 		    phy_modes(phydev->interface),
1987 		    phy_speed_to_str(phydev->speed),
1988 		    phy_duplex_to_str(phydev->duplex),
1989 		    phy_rate_matching_to_str(phydev->rate_matching),
1990 		    phylink_pause_to_str(pl->phy_state.pause),
1991 		    phydev->enable_tx_lpi ? "" : "no");
1992 }
1993 
phylink_validate_phy(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state)1994 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
1995 				unsigned long *supported,
1996 				struct phylink_link_state *state)
1997 {
1998 	DECLARE_PHY_INTERFACE_MASK(interfaces);
1999 
2000 	/* If the PHY provides a bitmap of the interfaces it will be using
2001 	 * depending on the negotiated media speeds, use this to validate
2002 	 * which ethtool link modes can be used.
2003 	 */
2004 	if (!phy_interface_empty(phy->possible_interfaces)) {
2005 		/* We only care about the union of the PHY's interfaces and
2006 		 * those which the host supports.
2007 		 */
2008 		phy_interface_and(interfaces, phy->possible_interfaces,
2009 				  pl->config->supported_interfaces);
2010 
2011 		if (phy_interface_empty(interfaces)) {
2012 			phylink_err(pl, "PHY has no common interfaces\n");
2013 			return -EINVAL;
2014 		}
2015 
2016 		if (phy_on_sfp(phy)) {
2017 			/* If the PHY is on a SFP, limit the interfaces to
2018 			 * those that can be used with a SFP module.
2019 			 */
2020 			phy_interface_and(interfaces, interfaces,
2021 					  phylink_sfp_interfaces);
2022 
2023 			if (phy_interface_empty(interfaces)) {
2024 				phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
2025 				return -EINVAL;
2026 			}
2027 		}
2028 
2029 		phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
2030 			    phydev_name(phy),
2031 			    (int)PHY_INTERFACE_MODE_MAX,
2032 			    phy->possible_interfaces,
2033 			    (int)PHY_INTERFACE_MODE_MAX, interfaces);
2034 
2035 		return phylink_validate_mask(pl, phy, supported, state,
2036 					     interfaces);
2037 	}
2038 
2039 	phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
2040 		    phydev_name(phy));
2041 
2042 	/* Check whether we would use rate matching for the proposed interface
2043 	 * mode.
2044 	 */
2045 	state->rate_matching = phy_get_rate_matching(phy, state->interface);
2046 
2047 	/* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
2048 	 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
2049 	 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
2050 	 * their Serdes is either unnecessary or not reasonable.
2051 	 *
2052 	 * For these which switch interface modes, we really need to know which
2053 	 * interface modes the PHY supports to properly work out which ethtool
2054 	 * linkmodes can be supported. For now, as a work-around, we validate
2055 	 * against all interface modes, which may lead to more ethtool link
2056 	 * modes being advertised than are actually supported.
2057 	 */
2058 	if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
2059 	    state->interface != PHY_INTERFACE_MODE_RXAUI &&
2060 	    state->interface != PHY_INTERFACE_MODE_XAUI &&
2061 	    state->interface != PHY_INTERFACE_MODE_USXGMII)
2062 		state->interface = PHY_INTERFACE_MODE_NA;
2063 
2064 	return phylink_validate(pl, supported, state);
2065 }
2066 
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)2067 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
2068 			       phy_interface_t interface)
2069 {
2070 	struct phylink_link_state config;
2071 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
2072 	char *irq_str;
2073 	int ret;
2074 
2075 	/*
2076 	 * This is the new way of dealing with flow control for PHYs,
2077 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
2078 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
2079 	 * using our validate call to the MAC, we rely upon the MAC
2080 	 * clearing the bits from both supported and advertising fields.
2081 	 */
2082 	phy_support_asym_pause(phy);
2083 
2084 	memset(&config, 0, sizeof(config));
2085 	linkmode_copy(supported, phy->supported);
2086 	linkmode_copy(config.advertising, phy->advertising);
2087 	config.interface = interface;
2088 
2089 	ret = phylink_validate_phy(pl, phy, supported, &config);
2090 	if (ret) {
2091 		phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
2092 			     phy_modes(config.interface),
2093 			     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
2094 			     __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
2095 			     ERR_PTR(ret));
2096 		return ret;
2097 	}
2098 
2099 	phy->phylink = pl;
2100 	phy->phy_link_change = phylink_phy_change;
2101 
2102 	irq_str = phy_attached_info_irq(phy);
2103 	phylink_info(pl,
2104 		     "PHY [%s] driver [%s] (irq=%s)\n",
2105 		     dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
2106 	kfree(irq_str);
2107 
2108 	mutex_lock(&pl->phydev_mutex);
2109 	mutex_lock(&phy->lock);
2110 	mutex_lock(&pl->state_mutex);
2111 	pl->phydev = phy;
2112 	pl->phy_state.interface = interface;
2113 	pl->phy_state.pause = MLO_PAUSE_NONE;
2114 	pl->phy_state.speed = SPEED_UNKNOWN;
2115 	pl->phy_state.duplex = DUPLEX_UNKNOWN;
2116 	pl->phy_state.rate_matching = RATE_MATCH_NONE;
2117 	linkmode_copy(pl->supported, supported);
2118 	linkmode_copy(pl->link_config.advertising, config.advertising);
2119 
2120 	/* Restrict the phy advertisement according to the MAC support. */
2121 	linkmode_copy(phy->advertising, config.advertising);
2122 
2123 	/* If the MAC supports phylink managed EEE, restrict the EEE
2124 	 * advertisement according to the MAC's LPI capabilities.
2125 	 */
2126 	if (pl->mac_supports_eee) {
2127 		/* If EEE is enabled, then we need to call phy_support_eee()
2128 		 * to ensure that the advertising mask is appropriately set.
2129 		 * This also enables EEE at the PHY.
2130 		 */
2131 		if (pl->eee_cfg.eee_enabled)
2132 			phy_support_eee(phy);
2133 
2134 		phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled;
2135 		phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer;
2136 
2137 		/* Convert the MAC's LPI capabilities to linkmodes */
2138 		linkmode_zero(pl->supported_lpi);
2139 		phylink_caps_to_linkmodes(pl->supported_lpi,
2140 					  pl->config->lpi_capabilities);
2141 
2142 		/* Restrict the PHYs EEE support/advertisement to the modes
2143 		 * that the MAC supports.
2144 		 */
2145 		linkmode_and(phy->advertising_eee, phy->advertising_eee,
2146 			     pl->supported_lpi);
2147 	} else if (pl->mac_supports_eee_ops) {
2148 		/* MAC supports phylink EEE, but wants EEE always disabled. */
2149 		phy_disable_eee(phy);
2150 	}
2151 
2152 	mutex_unlock(&pl->state_mutex);
2153 	mutex_unlock(&phy->lock);
2154 	mutex_unlock(&pl->phydev_mutex);
2155 
2156 	phylink_dbg(pl,
2157 		    "phy: %s setting supported %*pb advertising %*pb\n",
2158 		    phy_modes(interface),
2159 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
2160 		    __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
2161 
2162 	if (pl->config->mac_managed_pm)
2163 		phy->mac_managed_pm = true;
2164 
2165 	/* Allow the MAC to stop its clock if the PHY has the capability */
2166 	pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0;
2167 
2168 	if (pl->mac_supports_eee_ops) {
2169 		/* Explicitly configure whether the PHY is allowed to stop it's
2170 		 * receive clock.
2171 		 */
2172 		ret = phy_eee_rx_clock_stop(phy,
2173 					    pl->config->eee_rx_clk_stop_enable);
2174 		if (ret == -EOPNOTSUPP)
2175 			ret = 0;
2176 	}
2177 
2178 	if (ret == 0 && phy_interrupt_is_valid(phy))
2179 		phy_request_interrupt(phy);
2180 
2181 	return ret;
2182 }
2183 
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)2184 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
2185 			      phy_interface_t interface)
2186 {
2187 	u32 flags = 0;
2188 
2189 	if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
2190 		    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2191 		     phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
2192 		return -EINVAL;
2193 
2194 	if (pl->phydev)
2195 		return -EBUSY;
2196 
2197 	if (pl->config->mac_requires_rxc)
2198 		flags |= PHY_F_RXC_ALWAYS_ON;
2199 
2200 	return phy_attach_direct(pl->netdev, phy, flags, interface);
2201 }
2202 
2203 /**
2204  * phylink_connect_phy() - connect a PHY to the phylink instance
2205  * @pl: a pointer to a &struct phylink returned from phylink_create()
2206  * @phy: a pointer to a &struct phy_device.
2207  *
2208  * Connect @phy to the phylink instance specified by @pl by calling
2209  * phy_attach_direct(). Configure the @phy according to the MAC driver's
2210  * capabilities, start the PHYLIB state machine and enable any interrupts
2211  * that the PHY supports.
2212  *
2213  * This updates the phylink's ethtool supported and advertising link mode
2214  * masks.
2215  *
2216  * Returns 0 on success or a negative errno.
2217  */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)2218 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
2219 {
2220 	int ret;
2221 
2222 	/* Use PHY device/driver interface */
2223 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2224 		pl->link_interface = phy->interface;
2225 		pl->link_config.interface = pl->link_interface;
2226 	}
2227 
2228 	ret = phylink_attach_phy(pl, phy, pl->link_interface);
2229 	if (ret < 0)
2230 		return ret;
2231 
2232 	ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
2233 	if (ret)
2234 		phy_detach(phy);
2235 
2236 	return ret;
2237 }
2238 EXPORT_SYMBOL_GPL(phylink_connect_phy);
2239 
2240 /**
2241  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2242  * @pl: a pointer to a &struct phylink returned from phylink_create()
2243  * @dn: a pointer to a &struct device_node.
2244  * @flags: PHY-specific flags to communicate to the PHY device driver
2245  *
2246  * Connect the phy specified in the device node @dn to the phylink instance
2247  * specified by @pl. Actions specified in phylink_connect_phy() will be
2248  * performed.
2249  *
2250  * Returns 0 on success or a negative errno.
2251  */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)2252 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2253 			   u32 flags)
2254 {
2255 	return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2256 }
2257 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2258 
2259 /**
2260  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2261  * @pl: a pointer to a &struct phylink returned from phylink_create()
2262  * @fwnode: a pointer to a &struct fwnode_handle.
2263  * @flags: PHY-specific flags to communicate to the PHY device driver
2264  *
2265  * Connect the phy specified @fwnode to the phylink instance specified
2266  * by @pl.
2267  *
2268  * Returns 0 on success or a negative errno.
2269  */
phylink_fwnode_phy_connect(struct phylink * pl,const struct fwnode_handle * fwnode,u32 flags)2270 int phylink_fwnode_phy_connect(struct phylink *pl,
2271 			       const struct fwnode_handle *fwnode,
2272 			       u32 flags)
2273 {
2274 	struct fwnode_handle *phy_fwnode;
2275 	struct phy_device *phy_dev;
2276 	int ret;
2277 
2278 	/* Fixed links and 802.3z are handled without needing a PHY */
2279 	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2280 	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2281 	     phy_interface_mode_is_8023z(pl->link_interface)))
2282 		return 0;
2283 
2284 	phy_fwnode = fwnode_get_phy_node(fwnode);
2285 	if (IS_ERR(phy_fwnode)) {
2286 		if (pl->cfg_link_an_mode == MLO_AN_PHY)
2287 			return -ENODEV;
2288 		return 0;
2289 	}
2290 
2291 	phy_dev = fwnode_phy_find_device(phy_fwnode);
2292 	/* We're done with the phy_node handle */
2293 	fwnode_handle_put(phy_fwnode);
2294 	if (!phy_dev)
2295 		return -ENODEV;
2296 
2297 	/* Use PHY device/driver interface */
2298 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2299 		pl->link_interface = phy_dev->interface;
2300 		pl->link_config.interface = pl->link_interface;
2301 	}
2302 
2303 	if (pl->config->mac_requires_rxc)
2304 		flags |= PHY_F_RXC_ALWAYS_ON;
2305 
2306 	ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2307 				pl->link_interface);
2308 	phy_device_free(phy_dev);
2309 	if (ret)
2310 		return ret;
2311 
2312 	ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2313 	if (ret)
2314 		phy_detach(phy_dev);
2315 
2316 	return ret;
2317 }
2318 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2319 
2320 /**
2321  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2322  *   instance.
2323  * @pl: a pointer to a &struct phylink returned from phylink_create()
2324  *
2325  * Disconnect any current PHY from the phylink instance described by @pl.
2326  */
phylink_disconnect_phy(struct phylink * pl)2327 void phylink_disconnect_phy(struct phylink *pl)
2328 {
2329 	struct phy_device *phy;
2330 
2331 	ASSERT_RTNL();
2332 
2333 	mutex_lock(&pl->phydev_mutex);
2334 	phy = pl->phydev;
2335 	if (phy) {
2336 		mutex_lock(&phy->lock);
2337 		mutex_lock(&pl->state_mutex);
2338 		pl->phydev = NULL;
2339 		pl->phy_enable_tx_lpi = false;
2340 		pl->mac_tx_clk_stop = false;
2341 		mutex_unlock(&pl->state_mutex);
2342 		mutex_unlock(&phy->lock);
2343 	}
2344 	mutex_unlock(&pl->phydev_mutex);
2345 
2346 	if (phy) {
2347 		flush_work(&pl->resolve);
2348 		phy_disconnect(phy);
2349 	}
2350 }
2351 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2352 
phylink_link_changed(struct phylink * pl,bool up,const char * what)2353 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2354 {
2355 	if (!up)
2356 		pl->link_failed = true;
2357 	phylink_run_resolve(pl);
2358 	phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2359 }
2360 
2361 /**
2362  * phylink_mac_change() - notify phylink of a change in MAC state
2363  * @pl: a pointer to a &struct phylink returned from phylink_create()
2364  * @up: indicates whether the link is currently up.
2365  *
2366  * The MAC driver should call this driver when the state of its link
2367  * changes (eg, link failure, new negotiation results, etc.)
2368  */
phylink_mac_change(struct phylink * pl,bool up)2369 void phylink_mac_change(struct phylink *pl, bool up)
2370 {
2371 	phylink_link_changed(pl, up, "mac");
2372 }
2373 EXPORT_SYMBOL_GPL(phylink_mac_change);
2374 
2375 /**
2376  * phylink_pcs_change() - notify phylink of a change to PCS link state
2377  * @pcs: pointer to &struct phylink_pcs
2378  * @up: indicates whether the link is currently up.
2379  *
2380  * The PCS driver should call this when the state of its link changes
2381  * (e.g. link failure, new negotiation results, etc.) Note: it should
2382  * not determine "up" by reading the BMSR. If in doubt about the link
2383  * state at interrupt time, then pass true if pcs_get_state() returns
2384  * the latched link-down state, otherwise pass false.
2385  */
phylink_pcs_change(struct phylink_pcs * pcs,bool up)2386 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2387 {
2388 	struct phylink *pl = pcs->phylink;
2389 
2390 	if (pl)
2391 		phylink_link_changed(pl, up, "pcs");
2392 }
2393 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2394 
phylink_link_handler(int irq,void * data)2395 static irqreturn_t phylink_link_handler(int irq, void *data)
2396 {
2397 	struct phylink *pl = data;
2398 
2399 	phylink_run_resolve(pl);
2400 
2401 	return IRQ_HANDLED;
2402 }
2403 
2404 /**
2405  * phylink_start() - start a phylink instance
2406  * @pl: a pointer to a &struct phylink returned from phylink_create()
2407  *
2408  * Start the phylink instance specified by @pl, configuring the MAC for the
2409  * desired link mode(s) and negotiation style. This should be called from the
2410  * network device driver's &struct net_device_ops ndo_open() method.
2411  */
phylink_start(struct phylink * pl)2412 void phylink_start(struct phylink *pl)
2413 {
2414 	bool poll = false;
2415 
2416 	ASSERT_RTNL();
2417 
2418 	phylink_info(pl, "configuring for %s/%s link mode\n",
2419 		     phylink_an_mode_str(pl->req_link_an_mode),
2420 		     phy_modes(pl->link_config.interface));
2421 
2422 	/* Always set the carrier off */
2423 	if (pl->netdev)
2424 		netif_carrier_off(pl->netdev);
2425 
2426 	pl->pcs_state = PCS_STATE_STARTING;
2427 
2428 	/* Apply the link configuration to the MAC when starting. This allows
2429 	 * a fixed-link to start with the correct parameters, and also
2430 	 * ensures that we set the appropriate advertisement for Serdes links.
2431 	 *
2432 	 * Restart autonegotiation if using 802.3z to ensure that the link
2433 	 * parameters are properly negotiated.  This is necessary for DSA
2434 	 * switches using 802.3z negotiation to ensure they see our modes.
2435 	 */
2436 	phylink_mac_initial_config(pl, true);
2437 
2438 	pl->pcs_state = PCS_STATE_STARTED;
2439 
2440 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2441 
2442 	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2443 		int irq = gpiod_to_irq(pl->link_gpio);
2444 
2445 		if (irq > 0) {
2446 			if (!request_irq(irq, phylink_link_handler,
2447 					 IRQF_TRIGGER_RISING |
2448 					 IRQF_TRIGGER_FALLING,
2449 					 "netdev link", pl))
2450 				pl->link_irq = irq;
2451 			else
2452 				irq = 0;
2453 		}
2454 		if (irq <= 0)
2455 			poll = true;
2456 	}
2457 
2458 	if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2459 		poll |= pl->config->poll_fixed_state;
2460 
2461 	if (poll)
2462 		mod_timer(&pl->link_poll, jiffies + HZ);
2463 	if (pl->phydev)
2464 		phy_start(pl->phydev);
2465 	if (pl->sfp_bus)
2466 		sfp_upstream_start(pl->sfp_bus);
2467 }
2468 EXPORT_SYMBOL_GPL(phylink_start);
2469 
2470 /**
2471  * phylink_stop() - stop a phylink instance
2472  * @pl: a pointer to a &struct phylink returned from phylink_create()
2473  *
2474  * Stop the phylink instance specified by @pl. This should be called from the
2475  * network device driver's &struct net_device_ops ndo_stop() method.  The
2476  * network device's carrier state should not be changed prior to calling this
2477  * function.
2478  *
2479  * This will synchronously bring down the link if the link is not already
2480  * down (in other words, it will trigger a mac_link_down() method call.)
2481  */
phylink_stop(struct phylink * pl)2482 void phylink_stop(struct phylink *pl)
2483 {
2484 	ASSERT_RTNL();
2485 
2486 	if (pl->sfp_bus)
2487 		sfp_upstream_stop(pl->sfp_bus);
2488 	if (pl->phydev)
2489 		phy_stop(pl->phydev);
2490 	timer_delete_sync(&pl->link_poll);
2491 	if (pl->link_irq) {
2492 		free_irq(pl->link_irq, pl);
2493 		pl->link_irq = 0;
2494 	}
2495 
2496 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2497 
2498 	pl->pcs_state = PCS_STATE_DOWN;
2499 
2500 	phylink_pcs_disable(pl->pcs);
2501 }
2502 EXPORT_SYMBOL_GPL(phylink_stop);
2503 
2504 /**
2505  * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI
2506  * @pl: a pointer to a &struct phylink returned from phylink_create()
2507  *
2508  * Disable the PHY's ability to stop the receive clock while the receive path
2509  * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block()
2510  * are balanced by calls to phylink_rx_clk_stop_unblock().
2511  */
phylink_rx_clk_stop_block(struct phylink * pl)2512 void phylink_rx_clk_stop_block(struct phylink *pl)
2513 {
2514 	ASSERT_RTNL();
2515 
2516 	if (pl->mac_rx_clk_stop_blocked == U8_MAX) {
2517 		phylink_warn(pl, "%s called too many times - ignoring\n",
2518 			     __func__);
2519 		dump_stack();
2520 		return;
2521 	}
2522 
2523 	/* Disable PHY receive clock stop if this is the first time this
2524 	 * function has been called and clock-stop was previously enabled.
2525 	 */
2526 	if (pl->mac_rx_clk_stop_blocked++ == 0 &&
2527 	    pl->mac_supports_eee_ops && pl->phydev &&
2528 	    pl->config->eee_rx_clk_stop_enable)
2529 		phy_eee_rx_clock_stop(pl->phydev, false);
2530 }
2531 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block);
2532 
2533 /**
2534  * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock
2535  * @pl: a pointer to a &struct phylink returned from phylink_create()
2536  *
2537  * All calls to phylink_rx_clk_stop_block() must be balanced with a
2538  * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs
2539  * ability to stop the receive clock when the receive path is in EEE LPI mode.
2540  */
phylink_rx_clk_stop_unblock(struct phylink * pl)2541 void phylink_rx_clk_stop_unblock(struct phylink *pl)
2542 {
2543 	ASSERT_RTNL();
2544 
2545 	if (pl->mac_rx_clk_stop_blocked == 0) {
2546 		phylink_warn(pl, "%s called too many times - ignoring\n",
2547 			     __func__);
2548 		dump_stack();
2549 		return;
2550 	}
2551 
2552 	/* Re-enable PHY receive clock stop if the number of unblocks matches
2553 	 * the number of calls to the block function above.
2554 	 */
2555 	if (--pl->mac_rx_clk_stop_blocked == 0 &&
2556 	    pl->mac_supports_eee_ops && pl->phydev &&
2557 	    pl->config->eee_rx_clk_stop_enable)
2558 		phy_eee_rx_clock_stop(pl->phydev, true);
2559 }
2560 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock);
2561 
2562 /**
2563  * phylink_suspend() - handle a network device suspend event
2564  * @pl: a pointer to a &struct phylink returned from phylink_create()
2565  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2566  *
2567  * Handle a network device suspend event. There are several cases:
2568  *
2569  * - If Wake-on-Lan is not active, we can bring down the link between
2570  *   the MAC and PHY by calling phylink_stop().
2571  * - If Wake-on-Lan is active, and being handled only by the PHY, we
2572  *   can also bring down the link between the MAC and PHY.
2573  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2574  *   still needs to receive packets, so we can not bring the link down.
2575  */
phylink_suspend(struct phylink * pl,bool mac_wol)2576 void phylink_suspend(struct phylink *pl, bool mac_wol)
2577 {
2578 	ASSERT_RTNL();
2579 
2580 	if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2581 		/* Wake-on-Lan enabled, MAC handling */
2582 		mutex_lock(&pl->state_mutex);
2583 
2584 		/* Stop the resolver bringing the link up */
2585 		__set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2586 
2587 		pl->suspend_link_up = phylink_link_is_up(pl);
2588 		if (pl->suspend_link_up) {
2589 			/* Disable the carrier, to prevent transmit timeouts,
2590 			 * but one would hope all packets have been sent. This
2591 			 * also means phylink_resolve() will do nothing.
2592 			 */
2593 			if (pl->netdev)
2594 				netif_carrier_off(pl->netdev);
2595 			pl->old_link_state = false;
2596 		}
2597 
2598 		/* We do not call mac_link_down() here as we want the
2599 		 * link to remain up to receive the WoL packets.
2600 		 */
2601 		mutex_unlock(&pl->state_mutex);
2602 	} else {
2603 		phylink_stop(pl);
2604 	}
2605 }
2606 EXPORT_SYMBOL_GPL(phylink_suspend);
2607 
2608 /**
2609  * phylink_prepare_resume() - prepare to resume a network device
2610  * @pl: a pointer to a &struct phylink returned from phylink_create()
2611  *
2612  * Optional, but if called must be called prior to phylink_resume().
2613  *
2614  * Prepare to resume a network device, preparing the PHY as necessary.
2615  */
phylink_prepare_resume(struct phylink * pl)2616 void phylink_prepare_resume(struct phylink *pl)
2617 {
2618 	struct phy_device *phydev = pl->phydev;
2619 
2620 	ASSERT_RTNL();
2621 
2622 	/* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock
2623 	 * when PDOWN is set. However, some MACs require RXC to be running
2624 	 * in order to resume. If the MAC requires RXC, and we have a PHY,
2625 	 * then resume the PHY. Note that 802.3 allows PHYs 500ms before
2626 	 * the clock meets requirements. We do not implement this delay.
2627 	 */
2628 	if (pl->config->mac_requires_rxc && phydev && phydev->suspended)
2629 		phy_resume(phydev);
2630 }
2631 EXPORT_SYMBOL_GPL(phylink_prepare_resume);
2632 
2633 /**
2634  * phylink_resume() - handle a network device resume event
2635  * @pl: a pointer to a &struct phylink returned from phylink_create()
2636  *
2637  * Undo the effects of phylink_suspend(), returning the link to an
2638  * operational state.
2639  */
phylink_resume(struct phylink * pl)2640 void phylink_resume(struct phylink *pl)
2641 {
2642 	ASSERT_RTNL();
2643 
2644 	if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2645 		/* Wake-on-Lan enabled, MAC handling */
2646 
2647 		if (pl->suspend_link_up) {
2648 			/* Call mac_link_down() so we keep the overall state
2649 			 * balanced. Do this under the state_mutex lock for
2650 			 * consistency. This will cause a "Link Down" message
2651 			 * to be printed during resume, which is harmless -
2652 			 * the true link state will be printed when we run a
2653 			 * resolve.
2654 			 */
2655 			mutex_lock(&pl->state_mutex);
2656 			phylink_link_down(pl);
2657 			mutex_unlock(&pl->state_mutex);
2658 		}
2659 
2660 		/* Re-apply the link parameters so that all the settings get
2661 		 * restored to the MAC.
2662 		 */
2663 		phylink_mac_initial_config(pl, true);
2664 
2665 		/* Re-enable and re-resolve the link parameters */
2666 		phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2667 	} else {
2668 		phylink_start(pl);
2669 	}
2670 }
2671 EXPORT_SYMBOL_GPL(phylink_resume);
2672 
2673 /**
2674  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2675  * @pl: a pointer to a &struct phylink returned from phylink_create()
2676  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2677  *
2678  * Read the wake on lan parameters from the PHY attached to the phylink
2679  * instance specified by @pl. If no PHY is currently attached, report no
2680  * support for wake on lan.
2681  */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2682 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2683 {
2684 	ASSERT_RTNL();
2685 
2686 	wol->supported = 0;
2687 	wol->wolopts = 0;
2688 
2689 	if (pl->phydev)
2690 		phy_ethtool_get_wol(pl->phydev, wol);
2691 }
2692 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2693 
2694 /**
2695  * phylink_ethtool_set_wol() - set wake on lan parameters
2696  * @pl: a pointer to a &struct phylink returned from phylink_create()
2697  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2698  *
2699  * Set the wake on lan parameters for the PHY attached to the phylink
2700  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2701  * error.
2702  *
2703  * Returns zero on success or negative errno code.
2704  */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2705 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2706 {
2707 	int ret = -EOPNOTSUPP;
2708 
2709 	ASSERT_RTNL();
2710 
2711 	if (pl->phydev)
2712 		ret = phy_ethtool_set_wol(pl->phydev, wol);
2713 
2714 	return ret;
2715 }
2716 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2717 
phylink_sfp_select_interface(struct phylink * pl,const unsigned long * link_modes)2718 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl,
2719 						const unsigned long *link_modes)
2720 {
2721 	phy_interface_t interface;
2722 
2723 	interface = sfp_select_interface(pl->sfp_bus, link_modes);
2724 	if (interface == PHY_INTERFACE_MODE_NA) {
2725 		phylink_err(pl,
2726 			    "selection of interface failed, advertisement %*pb\n",
2727 			    __ETHTOOL_LINK_MODE_MASK_NBITS,
2728 			    link_modes);
2729 		return interface;
2730 	}
2731 
2732 	if (!test_bit(interface, pl->config->supported_interfaces)) {
2733 		phylink_err(pl,
2734 			    "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n",
2735 			    phy_modes(interface), interface,
2736 			    (int)PHY_INTERFACE_MODE_MAX,
2737 			    pl->config->supported_interfaces);
2738 		return PHY_INTERFACE_MODE_NA;
2739 	}
2740 
2741 	return interface;
2742 }
2743 
phylink_sfp_select_interface_speed(struct phylink * pl,u32 speed)2744 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl,
2745 							  u32 speed)
2746 {
2747 	phy_interface_t best_interface = PHY_INTERFACE_MODE_NA;
2748 	phy_interface_t interface;
2749 	u32 max_speed;
2750 	int i;
2751 
2752 	for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) {
2753 		interface = phylink_sfp_interface_preference[i];
2754 		if (!test_bit(interface, pl->sfp_interfaces))
2755 			continue;
2756 
2757 		max_speed = phylink_interface_max_speed(interface);
2758 
2759 		/* The logic here is: if speed == max_speed, then we've found
2760 		 * the best interface. Otherwise we find the interface that
2761 		 * can just support the requested speed.
2762 		 */
2763 		if (max_speed >= speed)
2764 			best_interface = interface;
2765 
2766 		if (max_speed <= speed)
2767 			break;
2768 	}
2769 
2770 	if (best_interface == PHY_INTERFACE_MODE_NA)
2771 		phylink_err(pl, "selection of interface failed, speed %u\n",
2772 			    speed);
2773 
2774 	return best_interface;
2775 }
2776 
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2777 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2778 {
2779 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2780 
2781 	linkmode_zero(mask);
2782 	phylink_set_port_modes(mask);
2783 
2784 	linkmode_and(dst, dst, mask);
2785 	linkmode_or(dst, dst, b);
2786 }
2787 
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2788 static void phylink_get_ksettings(const struct phylink_link_state *state,
2789 				  struct ethtool_link_ksettings *kset)
2790 {
2791 	phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2792 	linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2793 	if (kset->base.rate_matching == RATE_MATCH_NONE) {
2794 		kset->base.speed = state->speed;
2795 		kset->base.duplex = state->duplex;
2796 	}
2797 	kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2798 					       state->advertising) ?
2799 				AUTONEG_ENABLE : AUTONEG_DISABLE;
2800 }
2801 
2802 /**
2803  * phylink_ethtool_ksettings_get() - get the current link settings
2804  * @pl: a pointer to a &struct phylink returned from phylink_create()
2805  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2806  *
2807  * Read the current link settings for the phylink instance specified by @pl.
2808  * This will be the link settings read from the MAC, PHY or fixed link
2809  * settings depending on the current negotiation mode.
2810  */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2811 int phylink_ethtool_ksettings_get(struct phylink *pl,
2812 				  struct ethtool_link_ksettings *kset)
2813 {
2814 	struct phylink_link_state link_state;
2815 
2816 	ASSERT_RTNL();
2817 
2818 	if (pl->phydev)
2819 		phy_ethtool_ksettings_get(pl->phydev, kset);
2820 	else
2821 		kset->base.port = pl->link_port;
2822 
2823 	linkmode_copy(kset->link_modes.supported, pl->supported);
2824 
2825 	switch (pl->act_link_an_mode) {
2826 	case MLO_AN_FIXED:
2827 		/* We are using fixed settings. Report these as the
2828 		 * current link settings - and note that these also
2829 		 * represent the supported speeds/duplex/pause modes.
2830 		 */
2831 		phylink_get_fixed_state(pl, &link_state);
2832 		phylink_get_ksettings(&link_state, kset);
2833 		break;
2834 
2835 	case MLO_AN_INBAND:
2836 		/* If there is a phy attached, then use the reported
2837 		 * settings from the phy with no modification.
2838 		 */
2839 		if (pl->phydev)
2840 			break;
2841 
2842 		phylink_mac_pcs_get_state(pl, &link_state);
2843 
2844 		/* The MAC is reporting the link results from its own PCS
2845 		 * layer via in-band status. Report these as the current
2846 		 * link settings.
2847 		 */
2848 		phylink_get_ksettings(&link_state, kset);
2849 		break;
2850 	}
2851 
2852 	return 0;
2853 }
2854 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2855 
phylink_validate_pcs_inband_autoneg(struct phylink * pl,phy_interface_t interface,unsigned long * adv)2856 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,
2857 					        phy_interface_t interface,
2858 						unsigned long *adv)
2859 {
2860 	unsigned int inband = phylink_inband_caps(pl, interface);
2861 	unsigned int mask;
2862 
2863 	/* If the PCS doesn't implement inband support, be permissive. */
2864 	if (!inband)
2865 		return true;
2866 
2867 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))
2868 		mask = LINK_INBAND_ENABLE;
2869 	else
2870 		mask = LINK_INBAND_DISABLE;
2871 
2872 	/* Check whether the PCS implements the required mode */
2873 	return !!(inband & mask);
2874 }
2875 
2876 /**
2877  * phylink_ethtool_ksettings_set() - set the link settings
2878  * @pl: a pointer to a &struct phylink returned from phylink_create()
2879  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2880  */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2881 int phylink_ethtool_ksettings_set(struct phylink *pl,
2882 				  const struct ethtool_link_ksettings *kset)
2883 {
2884 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2885 	const struct link_capabilities *c;
2886 	struct phylink_link_state config;
2887 
2888 	ASSERT_RTNL();
2889 
2890 	if (pl->phydev) {
2891 		struct ethtool_link_ksettings phy_kset = *kset;
2892 
2893 		linkmode_and(phy_kset.link_modes.advertising,
2894 			     phy_kset.link_modes.advertising,
2895 			     pl->supported);
2896 
2897 		/* We can rely on phylib for this update; we also do not need
2898 		 * to update the pl->link_config settings:
2899 		 * - the configuration returned via ksettings_get() will come
2900 		 *   from phylib whenever a PHY is present.
2901 		 * - link_config.interface will be updated by the PHY calling
2902 		 *   back via phylink_phy_change() and a subsequent resolve.
2903 		 * - initial link configuration for PHY mode comes from the
2904 		 *   last phy state updated via phylink_phy_change().
2905 		 * - other configuration changes (e.g. pause modes) are
2906 		 *   performed directly via phylib.
2907 		 * - if in in-band mode with a PHY, the link configuration
2908 		 *   is passed on the link from the PHY, and all of
2909 		 *   link_config.{speed,duplex,an_enabled,pause} are not used.
2910 		 * - the only possible use would be link_config.advertising
2911 		 *   pause modes when in 1000base-X mode with a PHY, but in
2912 		 *   the presence of a PHY, this should not be changed as that
2913 		 *   should be determined from the media side advertisement.
2914 		 */
2915 		return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2916 	}
2917 
2918 	config = pl->link_config;
2919 	/* Mask out unsupported advertisements */
2920 	linkmode_and(config.advertising, kset->link_modes.advertising,
2921 		     pl->supported);
2922 
2923 	/* FIXME: should we reject autoneg if phy/mac does not support it? */
2924 	switch (kset->base.autoneg) {
2925 	case AUTONEG_DISABLE:
2926 		/* Autonegotiation disabled, select a suitable speed and
2927 		 * duplex.
2928 		 */
2929 		c = phy_caps_lookup(kset->base.speed, kset->base.duplex,
2930 				    pl->supported, false);
2931 		if (!c)
2932 			return -EINVAL;
2933 
2934 		/* If we have a fixed link, refuse to change link parameters.
2935 		 * If the link parameters match, accept them but do nothing.
2936 		 */
2937 		if (pl->req_link_an_mode == MLO_AN_FIXED) {
2938 			if (c->speed != pl->link_config.speed ||
2939 			    c->duplex != pl->link_config.duplex)
2940 				return -EINVAL;
2941 			return 0;
2942 		}
2943 
2944 		config.speed = c->speed;
2945 		config.duplex = c->duplex;
2946 		break;
2947 
2948 	case AUTONEG_ENABLE:
2949 		/* If we have a fixed link, allow autonegotiation (since that
2950 		 * is our default case) but do not allow the advertisement to
2951 		 * be changed. If the advertisement matches, simply return.
2952 		 */
2953 		if (pl->req_link_an_mode == MLO_AN_FIXED) {
2954 			if (!linkmode_equal(config.advertising,
2955 					    pl->link_config.advertising))
2956 				return -EINVAL;
2957 			return 0;
2958 		}
2959 
2960 		config.speed = SPEED_UNKNOWN;
2961 		config.duplex = DUPLEX_UNKNOWN;
2962 		break;
2963 
2964 	default:
2965 		return -EINVAL;
2966 	}
2967 
2968 	/* We have ruled out the case with a PHY attached, and the
2969 	 * fixed-link cases.  All that is left are in-band links.
2970 	 */
2971 	linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2972 			 kset->base.autoneg == AUTONEG_ENABLE);
2973 
2974 	/* If this link is with an SFP, ensure that changes to advertised modes
2975 	 * also cause the associated interface to be selected such that the
2976 	 * link can be configured correctly.
2977 	 */
2978 	if (pl->sfp_bus) {
2979 		if (kset->base.autoneg == AUTONEG_ENABLE)
2980 			config.interface =
2981 				phylink_sfp_select_interface(pl,
2982 							config.advertising);
2983 		else
2984 			config.interface =
2985 				phylink_sfp_select_interface_speed(pl,
2986 							config.speed);
2987 		if (config.interface == PHY_INTERFACE_MODE_NA)
2988 			return -EINVAL;
2989 
2990 		/* Revalidate with the selected interface */
2991 		linkmode_copy(support, pl->supported);
2992 		if (phylink_validate(pl, support, &config)) {
2993 			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2994 				    phylink_an_mode_str(pl->req_link_an_mode),
2995 				    phy_modes(config.interface),
2996 				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2997 			return -EINVAL;
2998 		}
2999 	} else {
3000 		/* Validate without changing the current supported mask. */
3001 		linkmode_copy(support, pl->supported);
3002 		if (phylink_validate(pl, support, &config))
3003 			return -EINVAL;
3004 	}
3005 
3006 	/* If autonegotiation is enabled, we must have an advertisement */
3007 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3008 			      config.advertising) &&
3009 	    phylink_is_empty_linkmode(config.advertising))
3010 		return -EINVAL;
3011 
3012 	/* Validate the autonegotiation state. We don't have a PHY in this
3013 	 * situation, so the PCS is the media-facing entity.
3014 	 */
3015 	if (!phylink_validate_pcs_inband_autoneg(pl, config.interface,
3016 						 config.advertising))
3017 		return -EINVAL;
3018 
3019 	mutex_lock(&pl->state_mutex);
3020 	pl->link_config.speed = config.speed;
3021 	pl->link_config.duplex = config.duplex;
3022 
3023 	if (pl->link_config.interface != config.interface) {
3024 		/* The interface changed, e.g. 1000base-X <-> 2500base-X */
3025 		/* We need to force the link down, then change the interface */
3026 		if (pl->old_link_state) {
3027 			phylink_link_down(pl);
3028 			pl->old_link_state = false;
3029 		}
3030 		if (!test_bit(PHYLINK_DISABLE_STOPPED,
3031 			      &pl->phylink_disable_state))
3032 			phylink_major_config(pl, false, &config);
3033 		pl->link_config.interface = config.interface;
3034 		linkmode_copy(pl->link_config.advertising, config.advertising);
3035 	} else if (!linkmode_equal(pl->link_config.advertising,
3036 				   config.advertising)) {
3037 		linkmode_copy(pl->link_config.advertising, config.advertising);
3038 		phylink_change_inband_advert(pl);
3039 	}
3040 	mutex_unlock(&pl->state_mutex);
3041 
3042 	return 0;
3043 }
3044 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
3045 
3046 /**
3047  * phylink_ethtool_nway_reset() - restart negotiation
3048  * @pl: a pointer to a &struct phylink returned from phylink_create()
3049  *
3050  * Restart negotiation for the phylink instance specified by @pl. This will
3051  * cause any attached phy to restart negotiation with the link partner, and
3052  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
3053  * negotiation.
3054  *
3055  * Returns zero on success, or negative error code.
3056  */
phylink_ethtool_nway_reset(struct phylink * pl)3057 int phylink_ethtool_nway_reset(struct phylink *pl)
3058 {
3059 	int ret = 0;
3060 
3061 	ASSERT_RTNL();
3062 
3063 	if (pl->phydev)
3064 		ret = phy_restart_aneg(pl->phydev);
3065 	phylink_pcs_an_restart(pl);
3066 
3067 	return ret;
3068 }
3069 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
3070 
3071 /**
3072  * phylink_ethtool_get_pauseparam() - get the current pause parameters
3073  * @pl: a pointer to a &struct phylink returned from phylink_create()
3074  * @pause: a pointer to a &struct ethtool_pauseparam
3075  */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)3076 void phylink_ethtool_get_pauseparam(struct phylink *pl,
3077 				    struct ethtool_pauseparam *pause)
3078 {
3079 	ASSERT_RTNL();
3080 
3081 	pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
3082 	pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
3083 	pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
3084 }
3085 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
3086 
3087 /**
3088  * phylink_ethtool_set_pauseparam() - set the current pause parameters
3089  * @pl: a pointer to a &struct phylink returned from phylink_create()
3090  * @pause: a pointer to a &struct ethtool_pauseparam
3091  */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)3092 int phylink_ethtool_set_pauseparam(struct phylink *pl,
3093 				   struct ethtool_pauseparam *pause)
3094 {
3095 	struct phylink_link_state *config = &pl->link_config;
3096 	bool manual_changed;
3097 	int pause_state;
3098 
3099 	ASSERT_RTNL();
3100 
3101 	if (pl->req_link_an_mode == MLO_AN_FIXED)
3102 		return -EOPNOTSUPP;
3103 
3104 	if (!phylink_test(pl->supported, Pause) &&
3105 	    !phylink_test(pl->supported, Asym_Pause))
3106 		return -EOPNOTSUPP;
3107 
3108 	if (!phylink_test(pl->supported, Asym_Pause) &&
3109 	    pause->rx_pause != pause->tx_pause)
3110 		return -EINVAL;
3111 
3112 	pause_state = 0;
3113 	if (pause->autoneg)
3114 		pause_state |= MLO_PAUSE_AN;
3115 	if (pause->rx_pause)
3116 		pause_state |= MLO_PAUSE_RX;
3117 	if (pause->tx_pause)
3118 		pause_state |= MLO_PAUSE_TX;
3119 
3120 	mutex_lock(&pl->state_mutex);
3121 	/*
3122 	 * See the comments for linkmode_set_pause(), wrt the deficiencies
3123 	 * with the current implementation.  A solution to this issue would
3124 	 * be:
3125 	 * ethtool  Local device
3126 	 *  rx  tx  Pause AsymDir
3127 	 *  0   0   0     0
3128 	 *  1   0   1     1
3129 	 *  0   1   0     1
3130 	 *  1   1   1     1
3131 	 * and then use the ethtool rx/tx enablement status to mask the
3132 	 * rx/tx pause resolution.
3133 	 */
3134 	linkmode_set_pause(config->advertising, pause->tx_pause,
3135 			   pause->rx_pause);
3136 
3137 	manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
3138 			 (!(pause_state & MLO_PAUSE_AN) &&
3139 			   (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
3140 
3141 	config->pause = pause_state;
3142 
3143 	/* Update our in-band advertisement, triggering a renegotiation if
3144 	 * the advertisement changed.
3145 	 */
3146 	if (!pl->phydev)
3147 		phylink_change_inband_advert(pl);
3148 
3149 	mutex_unlock(&pl->state_mutex);
3150 
3151 	/* If we have a PHY, a change of the pause frame advertisement will
3152 	 * cause phylib to renegotiate (if AN is enabled) which will in turn
3153 	 * call our phylink_phy_change() and trigger a resolve.  Note that
3154 	 * we can't hold our state mutex while calling phy_set_asym_pause().
3155 	 */
3156 	if (pl->phydev)
3157 		phy_set_asym_pause(pl->phydev, pause->rx_pause,
3158 				   pause->tx_pause);
3159 
3160 	/* If the manual pause settings changed, make sure we trigger a
3161 	 * resolve to update their state; we can not guarantee that the
3162 	 * link will cycle.
3163 	 */
3164 	if (manual_changed) {
3165 		pl->link_failed = true;
3166 		phylink_run_resolve(pl);
3167 	}
3168 
3169 	return 0;
3170 }
3171 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
3172 
3173 /**
3174  * phylink_get_eee_err() - read the energy efficient ethernet error
3175  *   counter
3176  * @pl: a pointer to a &struct phylink returned from phylink_create().
3177  *
3178  * Read the Energy Efficient Ethernet error counter from the PHY associated
3179  * with the phylink instance specified by @pl.
3180  *
3181  * Returns positive error counter value, or negative error code.
3182  */
phylink_get_eee_err(struct phylink * pl)3183 int phylink_get_eee_err(struct phylink *pl)
3184 {
3185 	int ret = 0;
3186 
3187 	ASSERT_RTNL();
3188 
3189 	if (pl->phydev)
3190 		ret = phy_get_eee_err(pl->phydev);
3191 
3192 	return ret;
3193 }
3194 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
3195 
3196 /**
3197  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
3198  * @pl: a pointer to a &struct phylink returned from phylink_create()
3199  * @eee: a pointer to a &struct ethtool_keee for the read parameters
3200  */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_keee * eee)3201 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
3202 {
3203 	int ret = -EOPNOTSUPP;
3204 
3205 	ASSERT_RTNL();
3206 
3207 	if (pl->mac_supports_eee_ops && !pl->mac_supports_eee)
3208 		return ret;
3209 
3210 	if (pl->phydev) {
3211 		ret = phy_ethtool_get_eee(pl->phydev, eee);
3212 		/* Restrict supported linkmode mask */
3213 		if (ret == 0 && pl->mac_supports_eee_ops)
3214 			linkmode_and(eee->supported, eee->supported,
3215 				     pl->supported_lpi);
3216 	}
3217 
3218 	return ret;
3219 }
3220 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
3221 
3222 /**
3223  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
3224  * @pl: a pointer to a &struct phylink returned from phylink_create()
3225  * @eee: a pointer to a &struct ethtool_keee for the desired parameters
3226  */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_keee * eee)3227 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
3228 {
3229 	bool mac_eee = pl->mac_supports_eee;
3230 	int ret = -EOPNOTSUPP;
3231 
3232 	ASSERT_RTNL();
3233 
3234 	phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n",
3235 		    mac_eee ? "supports" : "does not support",
3236 		    eee->eee_enabled ? ", enabled" : "",
3237 		    __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised,
3238 		    eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer);
3239 
3240 	if (pl->mac_supports_eee_ops && !mac_eee)
3241 		return ret;
3242 
3243 	if (pl->phydev) {
3244 		/* Restrict advertisement mask */
3245 		if (pl->mac_supports_eee_ops)
3246 			linkmode_and(eee->advertised, eee->advertised,
3247 				     pl->supported_lpi);
3248 		ret = phy_ethtool_set_eee(pl->phydev, eee);
3249 		if (ret == 0)
3250 			eee_to_eeecfg(&pl->eee_cfg, eee);
3251 	}
3252 
3253 	return ret;
3254 }
3255 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
3256 
3257 /* This emulates MII registers for a fixed-mode phy operating as per the
3258  * passed in state. "aneg" defines if we report negotiation is possible.
3259  *
3260  * FIXME: should deal with negotiation state too.
3261  */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)3262 static int phylink_mii_emul_read(unsigned int reg,
3263 				 struct phylink_link_state *state)
3264 {
3265 	struct fixed_phy_status fs;
3266 	unsigned long *lpa = state->lp_advertising;
3267 	int val;
3268 
3269 	fs.link = state->link;
3270 	fs.speed = state->speed;
3271 	fs.duplex = state->duplex;
3272 	fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
3273 	fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
3274 
3275 	val = swphy_read_reg(reg, &fs);
3276 	if (reg == MII_BMSR) {
3277 		if (!state->an_complete)
3278 			val &= ~BMSR_ANEGCOMPLETE;
3279 	}
3280 	return val;
3281 }
3282 
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)3283 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
3284 			    unsigned int reg)
3285 {
3286 	struct phy_device *phydev = pl->phydev;
3287 	int prtad, devad;
3288 
3289 	if (mdio_phy_id_is_c45(phy_id)) {
3290 		prtad = mdio_phy_id_prtad(phy_id);
3291 		devad = mdio_phy_id_devad(phy_id);
3292 		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3293 					reg);
3294 	}
3295 
3296 	if (phydev->is_c45) {
3297 		switch (reg) {
3298 		case MII_BMCR:
3299 		case MII_BMSR:
3300 		case MII_PHYSID1:
3301 		case MII_PHYSID2:
3302 			devad = __ffs(phydev->c45_ids.mmds_present);
3303 			break;
3304 		case MII_ADVERTISE:
3305 		case MII_LPA:
3306 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3307 				return -EINVAL;
3308 			devad = MDIO_MMD_AN;
3309 			if (reg == MII_ADVERTISE)
3310 				reg = MDIO_AN_ADVERTISE;
3311 			else
3312 				reg = MDIO_AN_LPA;
3313 			break;
3314 		default:
3315 			return -EINVAL;
3316 		}
3317 		prtad = phy_id;
3318 		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3319 					reg);
3320 	}
3321 
3322 	return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
3323 }
3324 
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3325 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
3326 			     unsigned int reg, unsigned int val)
3327 {
3328 	struct phy_device *phydev = pl->phydev;
3329 	int prtad, devad;
3330 
3331 	if (mdio_phy_id_is_c45(phy_id)) {
3332 		prtad = mdio_phy_id_prtad(phy_id);
3333 		devad = mdio_phy_id_devad(phy_id);
3334 		return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
3335 					 reg, val);
3336 	}
3337 
3338 	if (phydev->is_c45) {
3339 		switch (reg) {
3340 		case MII_BMCR:
3341 		case MII_BMSR:
3342 		case MII_PHYSID1:
3343 		case MII_PHYSID2:
3344 			devad = __ffs(phydev->c45_ids.mmds_present);
3345 			break;
3346 		case MII_ADVERTISE:
3347 		case MII_LPA:
3348 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3349 				return -EINVAL;
3350 			devad = MDIO_MMD_AN;
3351 			if (reg == MII_ADVERTISE)
3352 				reg = MDIO_AN_ADVERTISE;
3353 			else
3354 				reg = MDIO_AN_LPA;
3355 			break;
3356 		default:
3357 			return -EINVAL;
3358 		}
3359 		return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
3360 					 reg, val);
3361 	}
3362 
3363 	return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
3364 }
3365 
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)3366 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
3367 			    unsigned int reg)
3368 {
3369 	struct phylink_link_state state;
3370 	int val = 0xffff;
3371 
3372 	switch (pl->act_link_an_mode) {
3373 	case MLO_AN_FIXED:
3374 		if (phy_id == 0) {
3375 			phylink_get_fixed_state(pl, &state);
3376 			val = phylink_mii_emul_read(reg, &state);
3377 		}
3378 		break;
3379 
3380 	case MLO_AN_PHY:
3381 		return -EOPNOTSUPP;
3382 
3383 	case MLO_AN_INBAND:
3384 		if (phy_id == 0) {
3385 			phylink_mac_pcs_get_state(pl, &state);
3386 			val = phylink_mii_emul_read(reg, &state);
3387 		}
3388 		break;
3389 	}
3390 
3391 	return val & 0xffff;
3392 }
3393 
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3394 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3395 			     unsigned int reg, unsigned int val)
3396 {
3397 	switch (pl->act_link_an_mode) {
3398 	case MLO_AN_FIXED:
3399 		break;
3400 
3401 	case MLO_AN_PHY:
3402 		return -EOPNOTSUPP;
3403 
3404 	case MLO_AN_INBAND:
3405 		break;
3406 	}
3407 
3408 	return 0;
3409 }
3410 
3411 /**
3412  * phylink_mii_ioctl() - generic mii ioctl interface
3413  * @pl: a pointer to a &struct phylink returned from phylink_create()
3414  * @ifr: a pointer to a &struct ifreq for socket ioctls
3415  * @cmd: ioctl cmd to execute
3416  *
3417  * Perform the specified MII ioctl on the PHY attached to the phylink instance
3418  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3419  *
3420  * Returns: zero on success or negative error code.
3421  *
3422  * %SIOCGMIIPHY:
3423  *  read register from the current PHY.
3424  * %SIOCGMIIREG:
3425  *  read register from the specified PHY.
3426  * %SIOCSMIIREG:
3427  *  set a register on the specified PHY.
3428  */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)3429 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3430 {
3431 	struct mii_ioctl_data *mii = if_mii(ifr);
3432 	int  ret;
3433 
3434 	ASSERT_RTNL();
3435 
3436 	if (pl->phydev) {
3437 		/* PHYs only exist for MLO_AN_PHY and SGMII */
3438 		switch (cmd) {
3439 		case SIOCGMIIPHY:
3440 			mii->phy_id = pl->phydev->mdio.addr;
3441 			fallthrough;
3442 
3443 		case SIOCGMIIREG:
3444 			ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
3445 			if (ret >= 0) {
3446 				mii->val_out = ret;
3447 				ret = 0;
3448 			}
3449 			break;
3450 
3451 		case SIOCSMIIREG:
3452 			ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
3453 						mii->val_in);
3454 			break;
3455 
3456 		default:
3457 			ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3458 			break;
3459 		}
3460 	} else {
3461 		switch (cmd) {
3462 		case SIOCGMIIPHY:
3463 			mii->phy_id = 0;
3464 			fallthrough;
3465 
3466 		case SIOCGMIIREG:
3467 			ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3468 			if (ret >= 0) {
3469 				mii->val_out = ret;
3470 				ret = 0;
3471 			}
3472 			break;
3473 
3474 		case SIOCSMIIREG:
3475 			ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3476 						mii->val_in);
3477 			break;
3478 
3479 		default:
3480 			ret = -EOPNOTSUPP;
3481 			break;
3482 		}
3483 	}
3484 
3485 	return ret;
3486 }
3487 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3488 
3489 /**
3490  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3491  *   link partners
3492  * @pl: a pointer to a &struct phylink returned from phylink_create()
3493  * @sync: perform action synchronously
3494  *
3495  * If we have a PHY that is not part of a SFP module, then set the speed
3496  * as described in the phy_speed_down() function. Please see this function
3497  * for a description of the @sync parameter.
3498  *
3499  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3500  */
phylink_speed_down(struct phylink * pl,bool sync)3501 int phylink_speed_down(struct phylink *pl, bool sync)
3502 {
3503 	int ret = 0;
3504 
3505 	ASSERT_RTNL();
3506 
3507 	if (!pl->sfp_bus && pl->phydev)
3508 		ret = phy_speed_down(pl->phydev, sync);
3509 
3510 	return ret;
3511 }
3512 EXPORT_SYMBOL_GPL(phylink_speed_down);
3513 
3514 /**
3515  * phylink_speed_up() - restore the advertised speeds prior to the call to
3516  *   phylink_speed_down()
3517  * @pl: a pointer to a &struct phylink returned from phylink_create()
3518  *
3519  * If we have a PHY that is not part of a SFP module, then restore the
3520  * PHY speeds as per phy_speed_up().
3521  *
3522  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3523  */
phylink_speed_up(struct phylink * pl)3524 int phylink_speed_up(struct phylink *pl)
3525 {
3526 	int ret = 0;
3527 
3528 	ASSERT_RTNL();
3529 
3530 	if (!pl->sfp_bus && pl->phydev)
3531 		ret = phy_speed_up(pl->phydev);
3532 
3533 	return ret;
3534 }
3535 EXPORT_SYMBOL_GPL(phylink_speed_up);
3536 
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)3537 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3538 {
3539 	struct phylink *pl = upstream;
3540 
3541 	pl->netdev->sfp_bus = bus;
3542 }
3543 
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)3544 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3545 {
3546 	struct phylink *pl = upstream;
3547 
3548 	pl->netdev->sfp_bus = NULL;
3549 }
3550 
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)3551 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3552 						    const unsigned long *intf)
3553 {
3554 	phy_interface_t interface;
3555 	size_t i;
3556 
3557 	interface = PHY_INTERFACE_MODE_NA;
3558 	for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3559 		if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3560 			interface = phylink_sfp_interface_preference[i];
3561 			break;
3562 		}
3563 
3564 	return interface;
3565 }
3566 
phylink_sfp_set_config(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state,bool changed)3567 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported,
3568 				   struct phylink_link_state *state,
3569 				   bool changed)
3570 {
3571 	u8 mode = MLO_AN_INBAND;
3572 
3573 	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3574 		    phylink_an_mode_str(mode), phy_modes(state->interface),
3575 		    __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3576 
3577 	if (!linkmode_equal(pl->supported, supported)) {
3578 		linkmode_copy(pl->supported, supported);
3579 		changed = true;
3580 	}
3581 
3582 	if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3583 		linkmode_copy(pl->link_config.advertising, state->advertising);
3584 		changed = true;
3585 	}
3586 
3587 	if (pl->req_link_an_mode != mode ||
3588 	    pl->link_config.interface != state->interface) {
3589 		pl->req_link_an_mode = mode;
3590 		pl->link_config.interface = state->interface;
3591 
3592 		changed = true;
3593 
3594 		phylink_info(pl, "switched to %s/%s link mode\n",
3595 			     phylink_an_mode_str(mode),
3596 			     phy_modes(state->interface));
3597 	}
3598 
3599 	if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3600 				 &pl->phylink_disable_state))
3601 		phylink_mac_initial_config(pl, false);
3602 }
3603 
phylink_sfp_config_phy(struct phylink * pl,struct phy_device * phy)3604 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy)
3605 {
3606 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3607 	struct phylink_link_state config;
3608 	int ret;
3609 
3610 	/* We're not using pl->sfp_interfaces, so clear it. */
3611 	phy_interface_zero(pl->sfp_interfaces);
3612 	linkmode_copy(support, phy->supported);
3613 
3614 	memset(&config, 0, sizeof(config));
3615 	linkmode_copy(config.advertising, phy->advertising);
3616 	config.interface = PHY_INTERFACE_MODE_NA;
3617 	config.speed = SPEED_UNKNOWN;
3618 	config.duplex = DUPLEX_UNKNOWN;
3619 	config.pause = MLO_PAUSE_AN;
3620 
3621 	/* Ignore errors if we're expecting a PHY to attach later */
3622 	ret = phylink_validate(pl, support, &config);
3623 	if (ret) {
3624 		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3625 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3626 			    ERR_PTR(ret));
3627 		return ret;
3628 	}
3629 
3630 	config.interface = phylink_sfp_select_interface(pl, config.advertising);
3631 	if (config.interface == PHY_INTERFACE_MODE_NA)
3632 		return -EINVAL;
3633 
3634 	/* Attach the PHY so that the PHY is present when we do the major
3635 	 * configuration step.
3636 	 */
3637 	ret = phylink_attach_phy(pl, phy, config.interface);
3638 	if (ret < 0)
3639 		return ret;
3640 
3641 	/* This will validate the configuration for us. */
3642 	ret = phylink_bringup_phy(pl, phy, config.interface);
3643 	if (ret < 0) {
3644 		phy_detach(phy);
3645 		return ret;
3646 	}
3647 
3648 	pl->link_port = pl->sfp_port;
3649 
3650 	phylink_sfp_set_config(pl, support, &config, true);
3651 
3652 	return 0;
3653 }
3654 
phylink_sfp_config_optical(struct phylink * pl)3655 static int phylink_sfp_config_optical(struct phylink *pl)
3656 {
3657 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3658 	struct phylink_link_state config;
3659 	enum inband_type inband_type;
3660 	phy_interface_t interface;
3661 	int ret;
3662 
3663 	phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3664 		    (int)PHY_INTERFACE_MODE_MAX,
3665 		    pl->config->supported_interfaces,
3666 		    (int)PHY_INTERFACE_MODE_MAX,
3667 		    pl->sfp_interfaces);
3668 
3669 	/* Find the union of the supported interfaces by the PCS/MAC and
3670 	 * the SFP module.
3671 	 */
3672 	phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces,
3673 			  pl->sfp_interfaces);
3674 	if (phy_interface_empty(pl->sfp_interfaces)) {
3675 		phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3676 		return -EINVAL;
3677 	}
3678 
3679 	memset(&config, 0, sizeof(config));
3680 	linkmode_copy(support, pl->sfp_support);
3681 	linkmode_copy(config.advertising, pl->sfp_support);
3682 	config.speed = SPEED_UNKNOWN;
3683 	config.duplex = DUPLEX_UNKNOWN;
3684 	config.pause = MLO_PAUSE_AN;
3685 
3686 	/* For all the interfaces that are supported, reduce the sfp_support
3687 	 * mask to only those link modes that can be supported.
3688 	 */
3689 	ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3690 				    pl->sfp_interfaces);
3691 	if (ret) {
3692 		phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3693 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3694 		return ret;
3695 	}
3696 
3697 	interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces);
3698 	if (interface == PHY_INTERFACE_MODE_NA) {
3699 		phylink_err(pl, "failed to select SFP interface\n");
3700 		return -EINVAL;
3701 	}
3702 
3703 	phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3704 		    phy_modes(interface));
3705 
3706 	inband_type = phylink_get_inband_type(interface);
3707 	if (inband_type == INBAND_NONE) {
3708 		/* If this is the sole interface, and there is no inband
3709 		 * support, clear the advertising mask and Autoneg bit in
3710 		 * the support mask. Otherwise, just clear the Autoneg bit
3711 		 * in the advertising mask.
3712 		 */
3713 		if (phy_interface_weight(pl->sfp_interfaces) == 1) {
3714 			linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3715 					   pl->sfp_support);
3716 			linkmode_zero(config.advertising);
3717 		} else {
3718 			linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3719 					   config.advertising);
3720 		}
3721 	}
3722 
3723 	if (!phylink_validate_pcs_inband_autoneg(pl, interface,
3724 						 config.advertising)) {
3725 		phylink_err(pl, "autoneg setting not compatible with PCS");
3726 		return -EINVAL;
3727 	}
3728 
3729 	config.interface = interface;
3730 
3731 	/* Ignore errors if we're expecting a PHY to attach later */
3732 	ret = phylink_validate(pl, support, &config);
3733 	if (ret) {
3734 		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3735 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3736 			    ERR_PTR(ret));
3737 		return ret;
3738 	}
3739 
3740 	pl->link_port = pl->sfp_port;
3741 
3742 	phylink_sfp_set_config(pl, pl->sfp_support, &config, false);
3743 
3744 	return 0;
3745 }
3746 
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3747 static int phylink_sfp_module_insert(void *upstream,
3748 				     const struct sfp_eeprom_id *id)
3749 {
3750 	struct phylink *pl = upstream;
3751 
3752 	ASSERT_RTNL();
3753 
3754 	linkmode_zero(pl->sfp_support);
3755 	phy_interface_zero(pl->sfp_interfaces);
3756 	sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3757 	pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3758 
3759 	/* If this module may have a PHY connecting later, defer until later */
3760 	pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3761 	if (pl->sfp_may_have_phy)
3762 		return 0;
3763 
3764 	return phylink_sfp_config_optical(pl);
3765 }
3766 
phylink_sfp_module_remove(void * upstream)3767 static void phylink_sfp_module_remove(void *upstream)
3768 {
3769 	struct phylink *pl = upstream;
3770 
3771 	phy_interface_zero(pl->sfp_interfaces);
3772 }
3773 
phylink_sfp_module_start(void * upstream)3774 static int phylink_sfp_module_start(void *upstream)
3775 {
3776 	struct phylink *pl = upstream;
3777 
3778 	/* If this SFP module has a PHY, start the PHY now. */
3779 	if (pl->phydev) {
3780 		phy_start(pl->phydev);
3781 		return 0;
3782 	}
3783 
3784 	/* If the module may have a PHY but we didn't detect one we
3785 	 * need to configure the MAC here.
3786 	 */
3787 	if (!pl->sfp_may_have_phy)
3788 		return 0;
3789 
3790 	return phylink_sfp_config_optical(pl);
3791 }
3792 
phylink_sfp_module_stop(void * upstream)3793 static void phylink_sfp_module_stop(void *upstream)
3794 {
3795 	struct phylink *pl = upstream;
3796 
3797 	/* If this SFP module has a PHY, stop it. */
3798 	if (pl->phydev)
3799 		phy_stop(pl->phydev);
3800 }
3801 
phylink_sfp_link_down(void * upstream)3802 static void phylink_sfp_link_down(void *upstream)
3803 {
3804 	struct phylink *pl = upstream;
3805 
3806 	ASSERT_RTNL();
3807 
3808 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3809 }
3810 
phylink_sfp_link_up(void * upstream)3811 static void phylink_sfp_link_up(void *upstream)
3812 {
3813 	struct phylink *pl = upstream;
3814 
3815 	ASSERT_RTNL();
3816 
3817 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3818 }
3819 
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3820 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3821 {
3822 	struct phylink *pl = upstream;
3823 
3824 	if (!phy->drv) {
3825 		phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n",
3826 			    phydev_name(phy), (unsigned long)phy->phy_id);
3827 		phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n");
3828 		return -EINVAL;
3829 	}
3830 
3831 	/*
3832 	 * This is the new way of dealing with flow control for PHYs,
3833 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3834 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3835 	 * using our validate call to the MAC, we rely upon the MAC
3836 	 * clearing the bits from both supported and advertising fields.
3837 	 */
3838 	phy_support_asym_pause(phy);
3839 
3840 	/* Set the PHY's host supported interfaces */
3841 	phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3842 			  pl->config->supported_interfaces);
3843 
3844 	/* Do the initial configuration */
3845 	return phylink_sfp_config_phy(pl, phy);
3846 }
3847 
phylink_sfp_disconnect_phy(void * upstream,struct phy_device * phydev)3848 static void phylink_sfp_disconnect_phy(void *upstream,
3849 				       struct phy_device *phydev)
3850 {
3851 	phylink_disconnect_phy(upstream);
3852 }
3853 
3854 static const struct sfp_upstream_ops sfp_phylink_ops = {
3855 	.attach = phylink_sfp_attach,
3856 	.detach = phylink_sfp_detach,
3857 	.module_insert = phylink_sfp_module_insert,
3858 	.module_remove = phylink_sfp_module_remove,
3859 	.module_start = phylink_sfp_module_start,
3860 	.module_stop = phylink_sfp_module_stop,
3861 	.link_up = phylink_sfp_link_up,
3862 	.link_down = phylink_sfp_link_down,
3863 	.connect_phy = phylink_sfp_connect_phy,
3864 	.disconnect_phy = phylink_sfp_disconnect_phy,
3865 };
3866 
3867 /* Helpers for MAC drivers */
3868 
3869 static struct {
3870 	int bit;
3871 	int speed;
3872 } phylink_c73_priority_resolution[] = {
3873 	{ ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3874 	{ ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3875 	/* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3876 	{ ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3877 	{ ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3878 	{ ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3879 	{ ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3880 	/* 5GBASE-KR not supported */
3881 	{ ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3882 	{ ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3883 };
3884 
phylink_resolve_c73(struct phylink_link_state * state)3885 void phylink_resolve_c73(struct phylink_link_state *state)
3886 {
3887 	int i;
3888 
3889 	for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3890 		int bit = phylink_c73_priority_resolution[i].bit;
3891 		if (linkmode_test_bit(bit, state->advertising) &&
3892 		    linkmode_test_bit(bit, state->lp_advertising))
3893 			break;
3894 	}
3895 
3896 	if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3897 		state->speed = phylink_c73_priority_resolution[i].speed;
3898 		state->duplex = DUPLEX_FULL;
3899 	} else {
3900 		/* negotiation failure */
3901 		state->link = false;
3902 	}
3903 
3904 	phylink_resolve_an_pause(state);
3905 }
3906 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3907 
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3908 static void phylink_decode_c37_word(struct phylink_link_state *state,
3909 				    uint16_t config_reg, int speed)
3910 {
3911 	int fd_bit;
3912 
3913 	if (speed == SPEED_2500)
3914 		fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3915 	else
3916 		fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3917 
3918 	mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3919 
3920 	if (linkmode_test_bit(fd_bit, state->advertising) &&
3921 	    linkmode_test_bit(fd_bit, state->lp_advertising)) {
3922 		state->speed = speed;
3923 		state->duplex = DUPLEX_FULL;
3924 	} else {
3925 		/* negotiation failure */
3926 		state->link = false;
3927 	}
3928 
3929 	phylink_resolve_an_pause(state);
3930 }
3931 
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3932 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3933 				      uint16_t config_reg)
3934 {
3935 	if (!(config_reg & LPA_SGMII_LINK)) {
3936 		state->link = false;
3937 		return;
3938 	}
3939 
3940 	switch (config_reg & LPA_SGMII_SPD_MASK) {
3941 	case LPA_SGMII_10:
3942 		state->speed = SPEED_10;
3943 		break;
3944 	case LPA_SGMII_100:
3945 		state->speed = SPEED_100;
3946 		break;
3947 	case LPA_SGMII_1000:
3948 		state->speed = SPEED_1000;
3949 		break;
3950 	default:
3951 		state->link = false;
3952 		return;
3953 	}
3954 	if (config_reg & LPA_SGMII_FULL_DUPLEX)
3955 		state->duplex = DUPLEX_FULL;
3956 	else
3957 		state->duplex = DUPLEX_HALF;
3958 }
3959 
3960 /**
3961  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3962  * @state: a pointer to a struct phylink_link_state.
3963  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3964  *
3965  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3966  * code word.  Decode the USXGMII code word and populate the corresponding fields
3967  * (speed, duplex) into the phylink_link_state structure.
3968  */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3969 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3970 				 uint16_t lpa)
3971 {
3972 	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3973 	case MDIO_USXGMII_10:
3974 		state->speed = SPEED_10;
3975 		break;
3976 	case MDIO_USXGMII_100:
3977 		state->speed = SPEED_100;
3978 		break;
3979 	case MDIO_USXGMII_1000:
3980 		state->speed = SPEED_1000;
3981 		break;
3982 	case MDIO_USXGMII_2500:
3983 		state->speed = SPEED_2500;
3984 		break;
3985 	case MDIO_USXGMII_5000:
3986 		state->speed = SPEED_5000;
3987 		break;
3988 	case MDIO_USXGMII_10G:
3989 		state->speed = SPEED_10000;
3990 		break;
3991 	default:
3992 		state->link = false;
3993 		return;
3994 	}
3995 
3996 	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3997 		state->duplex = DUPLEX_FULL;
3998 	else
3999 		state->duplex = DUPLEX_HALF;
4000 }
4001 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
4002 
4003 /**
4004  * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
4005  * @state: a pointer to a struct phylink_link_state.
4006  * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
4007  *
4008  * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
4009  * code word.  Decode the USGMII code word and populate the corresponding fields
4010  * (speed, duplex) into the phylink_link_state structure. The structure for this
4011  * word is the same as the USXGMII word, except it only supports speeds up to
4012  * 1Gbps.
4013  */
phylink_decode_usgmii_word(struct phylink_link_state * state,uint16_t lpa)4014 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
4015 				       uint16_t lpa)
4016 {
4017 	switch (lpa & MDIO_USXGMII_SPD_MASK) {
4018 	case MDIO_USXGMII_10:
4019 		state->speed = SPEED_10;
4020 		break;
4021 	case MDIO_USXGMII_100:
4022 		state->speed = SPEED_100;
4023 		break;
4024 	case MDIO_USXGMII_1000:
4025 		state->speed = SPEED_1000;
4026 		break;
4027 	default:
4028 		state->link = false;
4029 		return;
4030 	}
4031 
4032 	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
4033 		state->duplex = DUPLEX_FULL;
4034 	else
4035 		state->duplex = DUPLEX_HALF;
4036 }
4037 
4038 /**
4039  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
4040  * @state: a pointer to a &struct phylink_link_state.
4041  * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
4042  * @bmsr: The value of the %MII_BMSR register
4043  * @lpa: The value of the %MII_LPA register
4044  *
4045  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4046  * clause 37 negotiation and/or SGMII control.
4047  *
4048  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
4049  * the phylink @state structure. This is suitable to be used for implementing
4050  * the pcs_get_state() member of the struct phylink_pcs_ops structure if
4051  * accessing @bmsr and @lpa cannot be done with MDIO directly.
4052  */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,unsigned int neg_mode,u16 bmsr,u16 lpa)4053 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
4054 				      unsigned int neg_mode, u16 bmsr, u16 lpa)
4055 {
4056 	state->link = !!(bmsr & BMSR_LSTATUS);
4057 	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
4058 
4059 	/* If the link is down, the advertisement data is undefined. */
4060 	if (!state->link)
4061 		return;
4062 
4063 	switch (state->interface) {
4064 	case PHY_INTERFACE_MODE_1000BASEX:
4065 		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4066 			phylink_decode_c37_word(state, lpa, SPEED_1000);
4067 		} else {
4068 			state->speed = SPEED_1000;
4069 			state->duplex = DUPLEX_FULL;
4070 			state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4071 		}
4072 		break;
4073 
4074 	case PHY_INTERFACE_MODE_2500BASEX:
4075 		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4076 			phylink_decode_c37_word(state, lpa, SPEED_2500);
4077 		} else {
4078 			state->speed = SPEED_2500;
4079 			state->duplex = DUPLEX_FULL;
4080 			state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4081 		}
4082 		break;
4083 
4084 	case PHY_INTERFACE_MODE_SGMII:
4085 	case PHY_INTERFACE_MODE_QSGMII:
4086 		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4087 			phylink_decode_sgmii_word(state, lpa);
4088 		break;
4089 
4090 	case PHY_INTERFACE_MODE_QUSGMII:
4091 		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4092 			phylink_decode_usgmii_word(state, lpa);
4093 		break;
4094 
4095 	default:
4096 		state->link = false;
4097 		break;
4098 	}
4099 }
4100 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
4101 
4102 /**
4103  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
4104  * @pcs: a pointer to a &struct mdio_device.
4105  * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
4106  * @state: a pointer to a &struct phylink_link_state.
4107  *
4108  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4109  * clause 37 negotiation and/or SGMII control.
4110  *
4111  * Read the MAC PCS state from the MII device configured in @config and
4112  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
4113  * the phylink @state structure. This is suitable to be directly plugged
4114  * into the pcs_get_state() member of the struct phylink_pcs_ops
4115  * structure.
4116  */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,unsigned int neg_mode,struct phylink_link_state * state)4117 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
4118 				   unsigned int neg_mode,
4119 				   struct phylink_link_state *state)
4120 {
4121 	int bmsr, lpa;
4122 
4123 	bmsr = mdiodev_read(pcs, MII_BMSR);
4124 	lpa = mdiodev_read(pcs, MII_LPA);
4125 	if (bmsr < 0 || lpa < 0) {
4126 		state->link = false;
4127 		return;
4128 	}
4129 
4130 	phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa);
4131 }
4132 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
4133 
4134 /**
4135  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
4136  *	advertisement
4137  * @interface: the PHY interface mode being configured
4138  * @advertising: the ethtool advertisement mask
4139  *
4140  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4141  * clause 37 negotiation and/or SGMII control.
4142  *
4143  * Encode the clause 37 PCS advertisement as specified by @interface and
4144  * @advertising.
4145  *
4146  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
4147  */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)4148 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
4149 					     const unsigned long *advertising)
4150 {
4151 	u16 adv;
4152 
4153 	switch (interface) {
4154 	case PHY_INTERFACE_MODE_1000BASEX:
4155 	case PHY_INTERFACE_MODE_2500BASEX:
4156 		adv = ADVERTISE_1000XFULL;
4157 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
4158 				      advertising))
4159 			adv |= ADVERTISE_1000XPAUSE;
4160 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
4161 				      advertising))
4162 			adv |= ADVERTISE_1000XPSE_ASYM;
4163 		return adv;
4164 	case PHY_INTERFACE_MODE_SGMII:
4165 	case PHY_INTERFACE_MODE_QSGMII:
4166 		return 0x0001;
4167 	default:
4168 		/* Nothing to do for other modes */
4169 		return -EINVAL;
4170 	}
4171 }
4172 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
4173 
4174 /**
4175  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
4176  * @pcs: a pointer to a &struct mdio_device.
4177  * @interface: the PHY interface mode being configured
4178  * @advertising: the ethtool advertisement mask
4179  * @neg_mode: PCS negotiation mode
4180  *
4181  * Configure a Clause 22 PCS PHY with the appropriate negotiation
4182  * parameters for the @mode, @interface and @advertising parameters.
4183  * Returns negative error number on failure, zero if the advertisement
4184  * has not changed, or positive if there is a change.
4185  */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,phy_interface_t interface,const unsigned long * advertising,unsigned int neg_mode)4186 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
4187 			       phy_interface_t interface,
4188 			       const unsigned long *advertising,
4189 			       unsigned int neg_mode)
4190 {
4191 	bool changed = 0;
4192 	u16 bmcr;
4193 	int ret, adv;
4194 
4195 	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
4196 	if (adv >= 0) {
4197 		ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
4198 					     MII_ADVERTISE, 0xffff, adv);
4199 		if (ret < 0)
4200 			return ret;
4201 		changed = ret;
4202 	}
4203 
4204 	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4205 		bmcr = BMCR_ANENABLE;
4206 	else
4207 		bmcr = 0;
4208 
4209 	/* Configure the inband state. Ensure ISOLATE bit is disabled */
4210 	ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
4211 	if (ret < 0)
4212 		return ret;
4213 
4214 	return changed;
4215 }
4216 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
4217 
4218 /**
4219  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
4220  * @pcs: a pointer to a &struct mdio_device.
4221  *
4222  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4223  * clause 37 negotiation.
4224  *
4225  * Restart the clause 37 negotiation with the link partner. This is
4226  * suitable to be directly plugged into the pcs_get_state() member
4227  * of the struct phylink_pcs_ops structure.
4228  */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)4229 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
4230 {
4231 	int val = mdiodev_read(pcs, MII_BMCR);
4232 
4233 	if (val >= 0) {
4234 		val |= BMCR_ANRESTART;
4235 
4236 		mdiodev_write(pcs, MII_BMCR, val);
4237 	}
4238 }
4239 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
4240 
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)4241 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
4242 				   struct phylink_link_state *state)
4243 {
4244 	struct mii_bus *bus = pcs->bus;
4245 	int addr = pcs->addr;
4246 	int stat;
4247 
4248 	stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
4249 	if (stat < 0) {
4250 		state->link = false;
4251 		return;
4252 	}
4253 
4254 	state->link = !!(stat & MDIO_STAT1_LSTATUS);
4255 	if (!state->link)
4256 		return;
4257 
4258 	switch (state->interface) {
4259 	case PHY_INTERFACE_MODE_10GBASER:
4260 		state->speed = SPEED_10000;
4261 		state->duplex = DUPLEX_FULL;
4262 		break;
4263 
4264 	default:
4265 		break;
4266 	}
4267 }
4268 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
4269 
phylink_init(void)4270 static int __init phylink_init(void)
4271 {
4272 	for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
4273 		__set_bit(phylink_sfp_interface_preference[i],
4274 			  phylink_sfp_interfaces);
4275 
4276 	return 0;
4277 }
4278 
4279 module_init(phylink_init);
4280 
4281 MODULE_LICENSE("GPL v2");
4282 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");
4283