1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phy_link_topology.h> 18 #include <linux/phy_port.h> 19 #include <linux/phylink.h> 20 #include <linux/rtnetlink.h> 21 #include <linux/spinlock.h> 22 #include <linux/timer.h> 23 #include <linux/workqueue.h> 24 25 #include "phy-caps.h" 26 #include "sfp.h" 27 #include "swphy.h" 28 29 enum { 30 PHYLINK_DISABLE_STOPPED, 31 PHYLINK_DISABLE_LINK, 32 PHYLINK_DISABLE_MAC_WOL, 33 PHYLINK_DISABLE_REPLAY, 34 35 PCS_STATE_DOWN = 0, 36 PCS_STATE_STARTING, 37 PCS_STATE_STARTED, 38 }; 39 40 /** 41 * struct phylink - internal data type for phylink 42 */ 43 struct phylink { 44 /* private: */ 45 struct net_device *netdev; 46 const struct phylink_mac_ops *mac_ops; 47 struct phylink_config *config; 48 struct phylink_pcs *pcs; 49 struct device *dev; 50 unsigned int old_link_state:1; 51 52 unsigned long phylink_disable_state; /* bitmask of disables */ 53 struct phy_device *phydev; 54 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 55 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 56 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 57 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 58 u8 link_port; /* The current non-phy ethtool port */ 59 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 60 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 61 62 /* The link configuration settings */ 63 struct phylink_link_state link_config; 64 65 /* The current settings */ 66 phy_interface_t cur_interface; 67 68 struct gpio_desc *link_gpio; 69 unsigned int link_irq; 70 struct timer_list link_poll; 71 72 struct mutex state_mutex; 73 /* Serialize updates to pl->phydev with phylink_resolve() */ 74 struct mutex phydev_mutex; 75 struct phylink_link_state phy_state; 76 unsigned int phy_ib_mode; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool link_failed; 82 bool suspend_link_up; 83 bool force_major_config; 84 bool major_config_failed; 85 bool mac_supports_eee_ops; 86 bool mac_supports_eee; 87 bool phy_enable_tx_lpi; 88 bool mac_enable_tx_lpi; 89 bool mac_tx_clk_stop; 90 u32 mac_tx_lpi_timer; 91 u8 mac_rx_clk_stop_blocked; 92 93 struct sfp_bus *sfp_bus; 94 bool sfp_may_have_phy; 95 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 96 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 97 u8 sfp_port; 98 struct phy_port *sfp_cage_port; 99 struct phy_port *mod_port; 100 101 struct eee_config eee_cfg; 102 103 u32 wolopts_mac; 104 u8 wol_sopass[SOPASS_MAX]; 105 }; 106 107 #define phylink_printk(level, pl, fmt, ...) \ 108 do { \ 109 if ((pl)->config->type == PHYLINK_NETDEV) \ 110 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 111 else if ((pl)->config->type == PHYLINK_DEV) \ 112 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 113 } while (0) 114 115 #define phylink_err(pl, fmt, ...) \ 116 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 117 #define phylink_warn(pl, fmt, ...) \ 118 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 119 #define phylink_info(pl, fmt, ...) \ 120 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 121 #if defined(CONFIG_DYNAMIC_DEBUG) 122 #define phylink_dbg(pl, fmt, ...) \ 123 do { \ 124 if ((pl)->config->type == PHYLINK_NETDEV) \ 125 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 126 else if ((pl)->config->type == PHYLINK_DEV) \ 127 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 128 } while (0) 129 #elif defined(DEBUG) 130 #define phylink_dbg(pl, fmt, ...) \ 131 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 132 #else 133 #define phylink_dbg(pl, fmt, ...) \ 134 ({ \ 135 if (0) \ 136 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 137 }) 138 #endif 139 140 static const phy_interface_t phylink_sfp_interface_preference[] = { 141 PHY_INTERFACE_MODE_100GBASEP, 142 PHY_INTERFACE_MODE_50GBASER, 143 PHY_INTERFACE_MODE_LAUI, 144 PHY_INTERFACE_MODE_25GBASER, 145 PHY_INTERFACE_MODE_USXGMII, 146 PHY_INTERFACE_MODE_10GBASER, 147 PHY_INTERFACE_MODE_5GBASER, 148 PHY_INTERFACE_MODE_2500BASEX, 149 PHY_INTERFACE_MODE_SGMII, 150 PHY_INTERFACE_MODE_1000BASEX, 151 PHY_INTERFACE_MODE_100BASEX, 152 }; 153 154 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 155 156 /** 157 * phylink_set_port_modes() - set the port type modes in the ethtool mask 158 * @mask: ethtool link mode mask 159 * 160 * Sets all the port type modes in the ethtool mask. 161 */ 162 void phylink_set_port_modes(unsigned long *mask) 163 { 164 phylink_set(mask, TP); 165 phylink_set(mask, AUI); 166 phylink_set(mask, MII); 167 phylink_set(mask, FIBRE); 168 phylink_set(mask, BNC); 169 phylink_set(mask, Backplane); 170 } 171 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 172 173 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 174 { 175 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 176 177 phylink_set_port_modes(tmp); 178 phylink_set(tmp, Autoneg); 179 phylink_set(tmp, Pause); 180 phylink_set(tmp, Asym_Pause); 181 182 return linkmode_subset(linkmode, tmp); 183 } 184 185 static const char *phylink_an_mode_str(unsigned int mode) 186 { 187 static const char *modestr[] = { 188 [MLO_AN_PHY] = "phy", 189 [MLO_AN_FIXED] = "fixed", 190 [MLO_AN_INBAND] = "inband", 191 }; 192 193 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 194 } 195 196 static const char *phylink_pcs_mode_str(unsigned int mode) 197 { 198 if (!mode) 199 return "none"; 200 201 if (mode & PHYLINK_PCS_NEG_OUTBAND) 202 return "outband"; 203 204 if (mode & PHYLINK_PCS_NEG_INBAND) { 205 if (mode & PHYLINK_PCS_NEG_ENABLED) 206 return "inband,an-enabled"; 207 else 208 return "inband,an-disabled"; 209 } 210 211 return "unknown"; 212 } 213 214 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 215 { 216 switch (interface) { 217 case PHY_INTERFACE_MODE_SGMII: 218 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 219 return 1250; 220 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 221 return 3125; 222 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 223 return 5156; 224 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 225 return 10313; 226 default: 227 return 0; 228 } 229 } 230 231 /** 232 * phylink_interface_max_speed() - get the maximum speed of a phy interface 233 * @interface: phy interface mode defined by &typedef phy_interface_t 234 * 235 * Determine the maximum speed of a phy interface. This is intended to help 236 * determine the correct speed to pass to the MAC when the phy is performing 237 * rate matching. 238 * 239 * Return: The maximum speed of @interface 240 */ 241 static int phylink_interface_max_speed(phy_interface_t interface) 242 { 243 switch (interface) { 244 case PHY_INTERFACE_MODE_100BASEX: 245 case PHY_INTERFACE_MODE_REVRMII: 246 case PHY_INTERFACE_MODE_RMII: 247 case PHY_INTERFACE_MODE_SMII: 248 case PHY_INTERFACE_MODE_REVMII: 249 case PHY_INTERFACE_MODE_MII: 250 case PHY_INTERFACE_MODE_MIILITE: 251 return SPEED_100; 252 253 case PHY_INTERFACE_MODE_TBI: 254 case PHY_INTERFACE_MODE_MOCA: 255 case PHY_INTERFACE_MODE_RTBI: 256 case PHY_INTERFACE_MODE_1000BASEX: 257 case PHY_INTERFACE_MODE_1000BASEKX: 258 case PHY_INTERFACE_MODE_TRGMII: 259 case PHY_INTERFACE_MODE_RGMII_TXID: 260 case PHY_INTERFACE_MODE_RGMII_RXID: 261 case PHY_INTERFACE_MODE_RGMII_ID: 262 case PHY_INTERFACE_MODE_RGMII: 263 case PHY_INTERFACE_MODE_PSGMII: 264 case PHY_INTERFACE_MODE_QSGMII: 265 case PHY_INTERFACE_MODE_QUSGMII: 266 case PHY_INTERFACE_MODE_SGMII: 267 case PHY_INTERFACE_MODE_GMII: 268 return SPEED_1000; 269 270 case PHY_INTERFACE_MODE_2500BASEX: 271 case PHY_INTERFACE_MODE_10G_QXGMII: 272 return SPEED_2500; 273 274 case PHY_INTERFACE_MODE_5GBASER: 275 return SPEED_5000; 276 277 case PHY_INTERFACE_MODE_XGMII: 278 case PHY_INTERFACE_MODE_RXAUI: 279 case PHY_INTERFACE_MODE_XAUI: 280 case PHY_INTERFACE_MODE_10GBASER: 281 case PHY_INTERFACE_MODE_10GKR: 282 case PHY_INTERFACE_MODE_USXGMII: 283 return SPEED_10000; 284 285 case PHY_INTERFACE_MODE_25GBASER: 286 return SPEED_25000; 287 288 case PHY_INTERFACE_MODE_XLGMII: 289 return SPEED_40000; 290 291 case PHY_INTERFACE_MODE_50GBASER: 292 case PHY_INTERFACE_MODE_LAUI: 293 return SPEED_50000; 294 295 case PHY_INTERFACE_MODE_100GBASEP: 296 return SPEED_100000; 297 298 case PHY_INTERFACE_MODE_INTERNAL: 299 case PHY_INTERFACE_MODE_NA: 300 case PHY_INTERFACE_MODE_MAX: 301 /* No idea! Garbage in, unknown out */ 302 return SPEED_UNKNOWN; 303 } 304 305 /* If we get here, someone forgot to add an interface mode above */ 306 WARN_ON_ONCE(1); 307 return SPEED_UNKNOWN; 308 } 309 310 static struct { 311 unsigned long mask; 312 int speed; 313 unsigned int duplex; 314 unsigned int caps_bit; 315 } phylink_caps_params[] = { 316 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 317 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 318 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 319 { MAC_80000FD, SPEED_80000, DUPLEX_FULL, BIT(LINK_CAPA_80000FD) }, 320 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 321 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 322 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 323 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 324 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 325 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 326 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 327 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 328 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 329 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 330 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 331 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 332 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 333 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 334 }; 335 336 /** 337 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 338 * @caps: A set of MAC capabilities 339 * 340 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 341 */ 342 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 343 { 344 unsigned long link_caps = 0; 345 int i; 346 347 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 348 if (caps & phylink_caps_params[i].mask) 349 link_caps |= phylink_caps_params[i].caps_bit; 350 351 return link_caps; 352 } 353 354 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 355 { 356 unsigned long caps = 0; 357 int i; 358 359 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 360 if (link_caps & phylink_caps_params[i].caps_bit) 361 caps |= phylink_caps_params[i].mask; 362 363 return caps; 364 } 365 366 /** 367 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 368 * @linkmodes: ethtool linkmode mask (must be already initialised) 369 * @caps: bitmask of MAC capabilities 370 * 371 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 372 * supported by the @caps. @linkmodes must have been initialised previously. 373 */ 374 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 375 unsigned long caps) 376 { 377 unsigned long link_caps = phylink_caps_to_link_caps(caps); 378 379 if (caps & MAC_SYM_PAUSE) 380 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 381 382 if (caps & MAC_ASYM_PAUSE) 383 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 384 385 phy_caps_linkmodes(link_caps, linkmodes); 386 } 387 388 /** 389 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 390 * @config: pointer to a &struct phylink_config 391 * @max_speed: maximum speed 392 * 393 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 394 * Any further motifications of config.mac_capabilities will override this. 395 */ 396 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 397 { 398 int i; 399 400 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 401 phylink_caps_params[i].speed > max_speed; i++) 402 config->mac_capabilities &= ~phylink_caps_params[i].mask; 403 } 404 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 405 406 /** 407 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 408 * @speed: the speed to search for 409 * @duplex: the duplex to search for 410 * 411 * Find the mac capability for a given speed and duplex. 412 * 413 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 414 * there were no matches. 415 */ 416 static unsigned long phylink_cap_from_speed_duplex(int speed, 417 unsigned int duplex) 418 { 419 int i; 420 421 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 422 if (speed == phylink_caps_params[i].speed && 423 duplex == phylink_caps_params[i].duplex) 424 return phylink_caps_params[i].mask; 425 } 426 427 return 0; 428 } 429 430 /** 431 * phylink_get_capabilities() - get capabilities for a given MAC 432 * @interface: phy interface mode defined by &typedef phy_interface_t 433 * @mac_capabilities: bitmask of MAC capabilities 434 * @rate_matching: type of rate matching being performed 435 * 436 * Get the MAC capabilities that are supported by the @interface mode and 437 * @mac_capabilities. 438 */ 439 static unsigned long phylink_get_capabilities(phy_interface_t interface, 440 unsigned long mac_capabilities, 441 int rate_matching) 442 { 443 unsigned long link_caps = phy_caps_from_interface(interface); 444 int max_speed = phylink_interface_max_speed(interface); 445 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 446 unsigned long matched_caps = 0; 447 448 caps |= phylink_link_caps_to_mac_caps(link_caps); 449 450 switch (rate_matching) { 451 case RATE_MATCH_OPEN_LOOP: 452 /* TODO */ 453 fallthrough; 454 case RATE_MATCH_NONE: 455 matched_caps = 0; 456 break; 457 case RATE_MATCH_PAUSE: { 458 /* The MAC must support asymmetric pause towards the local 459 * device for this. We could allow just symmetric pause, but 460 * then we might have to renegotiate if the link partner 461 * doesn't support pause. This is because there's no way to 462 * accept pause frames without transmitting them if we only 463 * support symmetric pause. 464 */ 465 if (!(mac_capabilities & MAC_SYM_PAUSE) || 466 !(mac_capabilities & MAC_ASYM_PAUSE)) 467 break; 468 469 /* We can't adapt if the MAC doesn't support the interface's 470 * max speed at full duplex. 471 */ 472 if (mac_capabilities & 473 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 474 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 475 break; 476 } 477 case RATE_MATCH_CRS: 478 /* The MAC must support half duplex at the interface's max 479 * speed. 480 */ 481 if (mac_capabilities & 482 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 483 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 484 matched_caps &= mac_capabilities; 485 } 486 break; 487 } 488 489 return (caps & mac_capabilities) | matched_caps; 490 } 491 492 /** 493 * phylink_validate_mask_caps() - Restrict link modes based on caps 494 * @supported: ethtool bitmask for supported link modes. 495 * @state: pointer to a &struct phylink_link_state. 496 * @mac_capabilities: bitmask of MAC capabilities 497 * 498 * Calculate the supported link modes based on @mac_capabilities, and restrict 499 * @supported and @state based on that. Use this function if your capabiliies 500 * aren't constant, such as if they vary depending on the interface. 501 */ 502 static void phylink_validate_mask_caps(unsigned long *supported, 503 struct phylink_link_state *state, 504 unsigned long mac_capabilities) 505 { 506 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 507 unsigned long caps; 508 509 phylink_set_port_modes(mask); 510 phylink_set(mask, Autoneg); 511 caps = phylink_get_capabilities(state->interface, mac_capabilities, 512 state->rate_matching); 513 phylink_caps_to_linkmodes(mask, caps); 514 515 linkmode_and(supported, supported, mask); 516 linkmode_and(state->advertising, state->advertising, mask); 517 } 518 519 static int phylink_validate_mac_and_pcs(struct phylink *pl, 520 unsigned long *supported, 521 struct phylink_link_state *state) 522 { 523 struct phylink_pcs *pcs = NULL; 524 unsigned long capabilities; 525 int ret; 526 527 /* Get the PCS for this interface mode */ 528 if (pl->mac_ops->mac_select_pcs) { 529 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 530 if (IS_ERR(pcs)) 531 return PTR_ERR(pcs); 532 } 533 534 if (pcs) { 535 /* The PCS, if present, must be setup before phylink_create() 536 * has been called. If the ops is not initialised, print an 537 * error and backtrace rather than oopsing the kernel. 538 */ 539 if (!pcs->ops) { 540 phylink_err(pl, "interface %s: uninitialised PCS\n", 541 phy_modes(state->interface)); 542 dump_stack(); 543 return -EINVAL; 544 } 545 546 /* Ensure that this PCS supports the interface which the MAC 547 * returned it for. It is an error for the MAC to return a PCS 548 * that does not support the interface mode. 549 */ 550 if (!phy_interface_empty(pcs->supported_interfaces) && 551 !test_bit(state->interface, pcs->supported_interfaces)) { 552 phylink_err(pl, "MAC returned PCS which does not support %s\n", 553 phy_modes(state->interface)); 554 return -EINVAL; 555 } 556 557 /* Validate the link parameters with the PCS */ 558 if (pcs->ops->pcs_validate) { 559 ret = pcs->ops->pcs_validate(pcs, supported, state); 560 if (ret < 0 || phylink_is_empty_linkmode(supported)) 561 return -EINVAL; 562 563 /* Ensure the advertising mask is a subset of the 564 * supported mask. 565 */ 566 linkmode_and(state->advertising, state->advertising, 567 supported); 568 } 569 } 570 571 /* Then validate the link parameters with the MAC */ 572 if (pl->mac_ops->mac_get_caps) 573 capabilities = pl->mac_ops->mac_get_caps(pl->config, 574 state->interface); 575 else 576 capabilities = pl->config->mac_capabilities; 577 578 phylink_validate_mask_caps(supported, state, capabilities); 579 580 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 581 } 582 583 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 584 const unsigned long *supported, 585 const struct phylink_link_state *state, 586 phy_interface_t interface, 587 unsigned long *accum_supported, 588 unsigned long *accum_advertising) 589 { 590 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 591 struct phylink_link_state tmp_state; 592 593 linkmode_copy(tmp_supported, supported); 594 595 tmp_state = *state; 596 tmp_state.interface = interface; 597 598 if (phy) 599 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 600 601 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 602 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 603 interface, phy_modes(interface), 604 phy_rate_matching_to_str(tmp_state.rate_matching), 605 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 606 607 linkmode_or(accum_supported, accum_supported, tmp_supported); 608 linkmode_or(accum_advertising, accum_advertising, 609 tmp_state.advertising); 610 } 611 } 612 613 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 614 unsigned long *supported, 615 struct phylink_link_state *state, 616 const unsigned long *interfaces) 617 { 618 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 619 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 620 int interface; 621 622 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 623 phylink_validate_one(pl, phy, supported, state, interface, 624 all_s, all_adv); 625 626 linkmode_copy(supported, all_s); 627 linkmode_copy(state->advertising, all_adv); 628 629 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 630 } 631 632 static int phylink_validate(struct phylink *pl, unsigned long *supported, 633 struct phylink_link_state *state) 634 { 635 const unsigned long *interfaces = pl->config->supported_interfaces; 636 637 if (state->interface == PHY_INTERFACE_MODE_NA) 638 return phylink_validate_mask(pl, NULL, supported, state, 639 interfaces); 640 641 if (!test_bit(state->interface, interfaces)) 642 return -EINVAL; 643 644 return phylink_validate_mac_and_pcs(pl, supported, state); 645 } 646 647 static void phylink_fill_fixedlink_supported(unsigned long *supported) 648 { 649 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); 652 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 653 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 654 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 655 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 656 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 657 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 658 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 659 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 660 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 661 } 662 663 static int phylink_parse_fixedlink(struct phylink *pl, 664 const struct fwnode_handle *fwnode) 665 { 666 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 667 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 668 const struct link_capabilities *c; 669 struct fwnode_handle *fixed_node; 670 struct gpio_desc *desc; 671 u32 speed; 672 int ret; 673 674 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 675 if (fixed_node) { 676 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 677 678 pl->link_config.speed = speed; 679 pl->link_config.duplex = DUPLEX_HALF; 680 681 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 682 pl->link_config.duplex = DUPLEX_FULL; 683 684 /* We treat the "pause" and "asym-pause" terminology as 685 * defining the link partner's ability. 686 */ 687 if (fwnode_property_read_bool(fixed_node, "pause")) 688 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 689 pl->link_config.lp_advertising); 690 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 691 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 692 pl->link_config.lp_advertising); 693 694 if (ret == 0) { 695 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 696 GPIOD_IN, "?"); 697 698 if (!IS_ERR(desc)) 699 pl->link_gpio = desc; 700 else if (desc == ERR_PTR(-EPROBE_DEFER)) 701 ret = -EPROBE_DEFER; 702 } 703 fwnode_handle_put(fixed_node); 704 705 if (ret) 706 return ret; 707 } else { 708 u32 prop[5]; 709 710 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 711 NULL, 0); 712 if (ret != ARRAY_SIZE(prop)) { 713 phylink_err(pl, "broken fixed-link?\n"); 714 return -EINVAL; 715 } 716 717 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 718 fwnode); 719 720 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 721 prop, ARRAY_SIZE(prop)); 722 if (!ret) { 723 pl->link_config.duplex = prop[1] ? 724 DUPLEX_FULL : DUPLEX_HALF; 725 pl->link_config.speed = prop[2]; 726 if (prop[3]) 727 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 728 pl->link_config.lp_advertising); 729 if (prop[4]) 730 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 731 pl->link_config.lp_advertising); 732 } 733 } 734 735 if (pl->link_config.speed > SPEED_1000 && 736 pl->link_config.duplex != DUPLEX_FULL) 737 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 738 pl->link_config.speed); 739 740 linkmode_zero(pl->supported); 741 phylink_fill_fixedlink_supported(pl->supported); 742 743 linkmode_copy(pl->link_config.advertising, pl->supported); 744 phylink_validate(pl, pl->supported, &pl->link_config); 745 746 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 747 pl->supported, true); 748 if (c) 749 linkmode_and(match, pl->supported, c->linkmodes); 750 751 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 752 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 753 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 754 linkmode_and(pl->supported, pl->supported, mask); 755 756 phylink_set(pl->supported, MII); 757 758 if (c) { 759 linkmode_or(pl->supported, pl->supported, match); 760 linkmode_or(pl->link_config.lp_advertising, 761 pl->link_config.lp_advertising, match); 762 } else { 763 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 764 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 765 pl->link_config.speed); 766 } 767 768 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 769 pl->supported); 770 771 pl->link_config.link = 1; 772 pl->link_config.an_complete = 1; 773 774 return 0; 775 } 776 777 static int phylink_parse_mode(struct phylink *pl, 778 const struct fwnode_handle *fwnode) 779 { 780 struct fwnode_handle *dn; 781 const char *managed; 782 unsigned long caps; 783 784 if (pl->config->default_an_inband) 785 pl->cfg_link_an_mode = MLO_AN_INBAND; 786 787 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 788 if (dn || fwnode_property_present(fwnode, "fixed-link")) 789 pl->cfg_link_an_mode = MLO_AN_FIXED; 790 fwnode_handle_put(dn); 791 792 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 793 strcmp(managed, "in-band-status") == 0)) { 794 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 795 phylink_err(pl, 796 "can't use both fixed-link and in-band-status\n"); 797 return -EINVAL; 798 } 799 800 pl->cfg_link_an_mode = MLO_AN_INBAND; 801 } 802 803 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 804 linkmode_zero(pl->supported); 805 phylink_set(pl->supported, MII); 806 phylink_set(pl->supported, Autoneg); 807 phylink_set(pl->supported, Asym_Pause); 808 phylink_set(pl->supported, Pause); 809 810 switch (pl->link_config.interface) { 811 case PHY_INTERFACE_MODE_SGMII: 812 case PHY_INTERFACE_MODE_PSGMII: 813 case PHY_INTERFACE_MODE_QSGMII: 814 case PHY_INTERFACE_MODE_QUSGMII: 815 case PHY_INTERFACE_MODE_RGMII: 816 case PHY_INTERFACE_MODE_RGMII_ID: 817 case PHY_INTERFACE_MODE_RGMII_RXID: 818 case PHY_INTERFACE_MODE_RGMII_TXID: 819 case PHY_INTERFACE_MODE_RTBI: 820 case PHY_INTERFACE_MODE_1000BASEX: 821 case PHY_INTERFACE_MODE_2500BASEX: 822 case PHY_INTERFACE_MODE_5GBASER: 823 case PHY_INTERFACE_MODE_25GBASER: 824 case PHY_INTERFACE_MODE_USXGMII: 825 case PHY_INTERFACE_MODE_10G_QXGMII: 826 case PHY_INTERFACE_MODE_10GKR: 827 case PHY_INTERFACE_MODE_10GBASER: 828 case PHY_INTERFACE_MODE_XLGMII: 829 case PHY_INTERFACE_MODE_50GBASER: 830 case PHY_INTERFACE_MODE_LAUI: 831 case PHY_INTERFACE_MODE_100GBASEP: 832 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 833 caps = phylink_get_capabilities(pl->link_config.interface, caps, 834 RATE_MATCH_NONE); 835 phylink_caps_to_linkmodes(pl->supported, caps); 836 break; 837 838 default: 839 phylink_err(pl, 840 "incorrect link mode %s for in-band status\n", 841 phy_modes(pl->link_config.interface)); 842 return -EINVAL; 843 } 844 845 linkmode_copy(pl->link_config.advertising, pl->supported); 846 847 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 848 phylink_err(pl, 849 "failed to validate link configuration for in-band status\n"); 850 return -EINVAL; 851 } 852 } 853 854 return 0; 855 } 856 857 static void phylink_apply_manual_flow(struct phylink *pl, 858 struct phylink_link_state *state) 859 { 860 /* If autoneg is disabled, pause AN is also disabled */ 861 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 862 state->advertising)) 863 state->pause &= ~MLO_PAUSE_AN; 864 865 /* Manual configuration of pause modes */ 866 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 867 state->pause = pl->link_config.pause; 868 } 869 870 static void phylink_resolve_an_pause(struct phylink_link_state *state) 871 { 872 bool tx_pause, rx_pause; 873 874 if (state->duplex == DUPLEX_FULL) { 875 linkmode_resolve_pause(state->advertising, 876 state->lp_advertising, 877 &tx_pause, &rx_pause); 878 if (tx_pause) 879 state->pause |= MLO_PAUSE_TX; 880 if (rx_pause) 881 state->pause |= MLO_PAUSE_RX; 882 } 883 } 884 885 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 886 phy_interface_t interface) 887 { 888 if (pcs && pcs->ops->pcs_inband_caps) 889 return pcs->ops->pcs_inband_caps(pcs, interface); 890 891 return 0; 892 } 893 894 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 895 phy_interface_t interface) 896 { 897 if (pcs && pcs->ops->pcs_pre_config) 898 pcs->ops->pcs_pre_config(pcs, interface); 899 } 900 901 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 902 phy_interface_t interface) 903 { 904 int err = 0; 905 906 if (pcs && pcs->ops->pcs_post_config) 907 err = pcs->ops->pcs_post_config(pcs, interface); 908 909 return err; 910 } 911 912 static void phylink_pcs_disable(struct phylink_pcs *pcs) 913 { 914 if (pcs && pcs->ops->pcs_disable) 915 pcs->ops->pcs_disable(pcs); 916 } 917 918 static int phylink_pcs_enable(struct phylink_pcs *pcs) 919 { 920 int err = 0; 921 922 if (pcs && pcs->ops->pcs_enable) 923 err = pcs->ops->pcs_enable(pcs); 924 925 return err; 926 } 927 928 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 929 const struct phylink_link_state *state, 930 bool permit_pause_to_mac) 931 { 932 if (!pcs) 933 return 0; 934 935 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 936 state->advertising, permit_pause_to_mac); 937 } 938 939 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 940 phy_interface_t interface, int speed, 941 int duplex) 942 { 943 if (pcs && pcs->ops->pcs_link_up) 944 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 945 } 946 947 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 948 { 949 if (pcs && pcs->ops->pcs_disable_eee) 950 pcs->ops->pcs_disable_eee(pcs); 951 } 952 953 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 954 { 955 if (pcs && pcs->ops->pcs_enable_eee) 956 pcs->ops->pcs_enable_eee(pcs); 957 } 958 959 /* Query inband for a specific interface mode, asking the MAC for the 960 * PCS which will be used to handle the interface mode. 961 */ 962 static unsigned int phylink_inband_caps(struct phylink *pl, 963 phy_interface_t interface) 964 { 965 struct phylink_pcs *pcs; 966 967 if (!pl->mac_ops->mac_select_pcs) 968 return 0; 969 970 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 971 if (IS_ERR_OR_NULL(pcs)) 972 return 0; 973 974 return phylink_pcs_inband_caps(pcs, interface); 975 } 976 977 static void phylink_pcs_poll_stop(struct phylink *pl) 978 { 979 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 980 timer_delete(&pl->link_poll); 981 } 982 983 static void phylink_pcs_poll_start(struct phylink *pl) 984 { 985 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 986 mod_timer(&pl->link_poll, jiffies + HZ); 987 } 988 989 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 990 { 991 int ret = 0; 992 993 /* Signal to PCS driver that MAC requires RX clock for init */ 994 if (pl->config->mac_requires_rxc) 995 pcs->rxc_always_on = true; 996 997 if (pcs->ops->pcs_pre_init) 998 ret = pcs->ops->pcs_pre_init(pcs); 999 1000 return ret; 1001 } 1002 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 1003 1004 static void phylink_mac_config(struct phylink *pl, 1005 const struct phylink_link_state *state) 1006 { 1007 struct phylink_link_state st = *state; 1008 1009 /* Stop drivers incorrectly using these */ 1010 linkmode_zero(st.lp_advertising); 1011 st.speed = SPEED_UNKNOWN; 1012 st.duplex = DUPLEX_UNKNOWN; 1013 st.an_complete = false; 1014 st.link = false; 1015 1016 phylink_dbg(pl, 1017 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1018 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1019 phy_modes(st.interface), 1020 phy_rate_matching_to_str(st.rate_matching), 1021 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1022 st.pause); 1023 1024 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1025 } 1026 1027 static void phylink_pcs_an_restart(struct phylink *pl) 1028 { 1029 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1030 pl->link_config.advertising) && 1031 phy_interface_mode_is_8023z(pl->link_config.interface) && 1032 phylink_autoneg_inband(pl->act_link_an_mode)) 1033 pl->pcs->ops->pcs_an_restart(pl->pcs); 1034 } 1035 1036 enum inband_type { 1037 INBAND_NONE, 1038 INBAND_CISCO_SGMII, 1039 INBAND_BASEX, 1040 }; 1041 1042 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1043 { 1044 switch (interface) { 1045 case PHY_INTERFACE_MODE_SGMII: 1046 case PHY_INTERFACE_MODE_PSGMII: 1047 case PHY_INTERFACE_MODE_QSGMII: 1048 case PHY_INTERFACE_MODE_QUSGMII: 1049 case PHY_INTERFACE_MODE_USXGMII: 1050 case PHY_INTERFACE_MODE_10G_QXGMII: 1051 /* These protocols are designed for use with a PHY which 1052 * communicates its negotiation result back to the MAC via 1053 * inband communication. Note: there exist PHYs that run 1054 * with SGMII but do not send the inband data. 1055 */ 1056 return INBAND_CISCO_SGMII; 1057 1058 case PHY_INTERFACE_MODE_1000BASEX: 1059 case PHY_INTERFACE_MODE_2500BASEX: 1060 /* 1000base-X is designed for use media-side for Fibre 1061 * connections, and thus the Autoneg bit needs to be 1062 * taken into account. We also do this for 2500base-X 1063 * as well, but drivers may not support this, so may 1064 * need to override this. 1065 */ 1066 return INBAND_BASEX; 1067 1068 default: 1069 return INBAND_NONE; 1070 } 1071 } 1072 1073 /** 1074 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1075 * @pl: a pointer to a &struct phylink returned from phylink_create() 1076 * @pcs: a pointer to &struct phylink_pcs 1077 * @interface: interface mode to be used 1078 * @advertising: adertisement ethtool link mode mask 1079 * 1080 * Determines the negotiation mode to be used by the PCS, and returns 1081 * one of: 1082 * 1083 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1084 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1085 * will be used. 1086 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1087 * disabled 1088 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1089 * 1090 * Note: this is for cases where the PCS itself is involved in negotiation 1091 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1092 */ 1093 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1094 phy_interface_t interface, 1095 const unsigned long *advertising) 1096 { 1097 unsigned int pcs_ib_caps = 0; 1098 unsigned int phy_ib_caps = 0; 1099 unsigned int neg_mode, mode; 1100 enum inband_type type; 1101 1102 type = phylink_get_inband_type(interface); 1103 if (type == INBAND_NONE) { 1104 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1105 pl->act_link_an_mode = pl->req_link_an_mode; 1106 return; 1107 } 1108 1109 mode = pl->req_link_an_mode; 1110 1111 pl->phy_ib_mode = 0; 1112 1113 if (pcs) 1114 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1115 1116 if (pl->phydev) 1117 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1118 1119 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1120 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1121 1122 if (!phylink_autoneg_inband(mode)) { 1123 bool pcs_ib_only = false; 1124 bool phy_ib_only = false; 1125 1126 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1127 /* PCS supports reporting in-band capabilities, and 1128 * supports more than disable mode. 1129 */ 1130 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1131 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1132 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1133 pcs_ib_only = true; 1134 } 1135 1136 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1137 /* PHY supports in-band capabilities, and supports 1138 * more than disable mode. 1139 */ 1140 if (phy_ib_caps & LINK_INBAND_DISABLE) 1141 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1142 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1143 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1144 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1145 phy_ib_only = true; 1146 } 1147 1148 /* If either the PCS or PHY requires inband to be enabled, 1149 * this is an invalid configuration. Provide a diagnostic 1150 * message for this case, but don't try to force the issue. 1151 */ 1152 if (pcs_ib_only || phy_ib_only) 1153 phylink_warn(pl, 1154 "firmware wants %s mode, but %s%s%s requires inband\n", 1155 phylink_an_mode_str(mode), 1156 pcs_ib_only ? "PCS" : "", 1157 pcs_ib_only && phy_ib_only ? " and " : "", 1158 phy_ib_only ? "PHY" : ""); 1159 1160 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1161 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1162 /* For SGMII modes which are designed to be used with PHYs, or 1163 * Base-X with a PHY, we try to use in-band mode where-ever 1164 * possible. However, there are some PHYs e.g. BCM84881 which 1165 * do not support in-band. 1166 */ 1167 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1168 LINK_INBAND_BYPASS; 1169 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1170 LINK_INBAND_BYPASS; 1171 /* PCS PHY 1172 * D E D E 1173 * 0 0 0 0 no information inband enabled 1174 * 1 0 0 0 pcs doesn't support outband 1175 * 0 1 0 0 pcs required inband enabled 1176 * 1 1 0 0 pcs optional inband enabled 1177 * 0 0 1 0 phy doesn't support outband 1178 * 1 0 1 0 pcs+phy doesn't support outband 1179 * 0 1 1 0 pcs required, phy doesn't support, invalid 1180 * 1 1 1 0 pcs optional, phy doesn't support, outband 1181 * 0 0 0 1 phy required inband enabled 1182 * 1 0 0 1 pcs doesn't support, phy required, invalid 1183 * 0 1 0 1 pcs+phy required inband enabled 1184 * 1 1 0 1 pcs optional, phy required inband enabled 1185 * 0 0 1 1 phy optional inband enabled 1186 * 1 0 1 1 pcs doesn't support, phy optional, outband 1187 * 0 1 1 1 pcs required, phy optional inband enabled 1188 * 1 1 1 1 pcs+phy optional inband enabled 1189 */ 1190 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1191 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1192 /* In-band supported or unknown at both ends. Enable 1193 * in-band mode with or without bypass at the PHY. 1194 */ 1195 if (phy_ib_caps & LINK_INBAND_ENABLE) 1196 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1197 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1198 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1199 1200 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1201 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1202 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1203 /* Either in-band not supported at at least one end. 1204 * In-band bypass at the other end is possible. 1205 */ 1206 if (phy_ib_caps & LINK_INBAND_DISABLE) 1207 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1208 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1209 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1210 1211 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1212 if (pl->phydev) 1213 mode = MLO_AN_PHY; 1214 } else { 1215 /* invalid */ 1216 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1217 phy_modes(interface)); 1218 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1219 } 1220 } else { 1221 /* For Base-X without a PHY */ 1222 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1223 /* If the PCS doesn't support inband, then inband must 1224 * be disabled. 1225 */ 1226 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1227 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1228 /* If the PCS requires inband, then inband must always 1229 * be enabled. 1230 */ 1231 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1232 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1233 advertising)) 1234 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1235 else 1236 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1237 } 1238 1239 pl->pcs_neg_mode = neg_mode; 1240 pl->act_link_an_mode = mode; 1241 } 1242 1243 static void phylink_major_config(struct phylink *pl, bool restart, 1244 const struct phylink_link_state *state) 1245 { 1246 struct phylink_pcs *pcs = NULL; 1247 bool pcs_changed = false; 1248 unsigned int rate_kbd; 1249 int err; 1250 1251 phylink_dbg(pl, "major config, requested %s/%s\n", 1252 phylink_an_mode_str(pl->req_link_an_mode), 1253 phy_modes(state->interface)); 1254 1255 pl->major_config_failed = false; 1256 1257 if (pl->mac_ops->mac_select_pcs) { 1258 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1259 if (IS_ERR(pcs)) { 1260 phylink_err(pl, 1261 "mac_select_pcs unexpectedly failed: %pe\n", 1262 pcs); 1263 1264 pl->major_config_failed = true; 1265 return; 1266 } 1267 1268 pcs_changed = pl->pcs != pcs; 1269 } 1270 1271 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1272 1273 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1274 phylink_an_mode_str(pl->act_link_an_mode), 1275 phylink_pcs_mode_str(pl->pcs_neg_mode), 1276 phy_modes(state->interface)); 1277 1278 phylink_pcs_poll_stop(pl); 1279 1280 if (pl->mac_ops->mac_prepare) { 1281 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1282 state->interface); 1283 if (err < 0) { 1284 phylink_err(pl, "mac_prepare failed: %pe\n", 1285 ERR_PTR(err)); 1286 pl->major_config_failed = true; 1287 return; 1288 } 1289 } 1290 1291 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1292 * for the change. 1293 */ 1294 if (pcs_changed) { 1295 phylink_pcs_disable(pl->pcs); 1296 1297 if (pl->pcs) 1298 pl->pcs->phylink = NULL; 1299 1300 if (pcs) 1301 pcs->phylink = pl; 1302 1303 pl->pcs = pcs; 1304 } 1305 1306 if (pl->pcs) 1307 phylink_pcs_pre_config(pl->pcs, state->interface); 1308 1309 phylink_mac_config(pl, state); 1310 1311 if (pl->pcs) { 1312 err = phylink_pcs_post_config(pl->pcs, state->interface); 1313 if (err < 0) { 1314 phylink_err(pl, "pcs_post_config failed: %pe\n", 1315 ERR_PTR(err)); 1316 1317 pl->major_config_failed = true; 1318 } 1319 } 1320 1321 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1322 phylink_pcs_enable(pl->pcs); 1323 1324 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1325 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1326 if (err < 0) { 1327 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1328 pl->major_config_failed = true; 1329 } else if (err > 0) { 1330 restart = true; 1331 } 1332 1333 if (restart) 1334 phylink_pcs_an_restart(pl); 1335 1336 if (pl->mac_ops->mac_finish) { 1337 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1338 state->interface); 1339 if (err < 0) { 1340 phylink_err(pl, "mac_finish failed: %pe\n", 1341 ERR_PTR(err)); 1342 1343 pl->major_config_failed = true; 1344 } 1345 } 1346 1347 if (pl->phydev && pl->phy_ib_mode) { 1348 phylink_dbg(pl, "configuring PHY for inband%s%s%s\n", 1349 pl->phy_ib_mode & LINK_INBAND_DISABLE ? 1350 " disable" : "", 1351 pl->phy_ib_mode & LINK_INBAND_ENABLE ? 1352 " enable" : "", 1353 pl->phy_ib_mode & LINK_INBAND_BYPASS ? 1354 " bypass" : ""); 1355 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1356 if (err < 0) { 1357 phylink_err(pl, "phy_config_inband: %pe\n", 1358 ERR_PTR(err)); 1359 1360 pl->major_config_failed = true; 1361 } 1362 } 1363 1364 if (pl->sfp_bus) { 1365 rate_kbd = phylink_interface_signal_rate(state->interface); 1366 if (rate_kbd) 1367 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1368 } 1369 1370 phylink_pcs_poll_start(pl); 1371 } 1372 1373 /* 1374 * Reconfigure for a change of inband advertisement. 1375 * If we have a separate PCS, we only need to call its pcs_config() method, 1376 * and then restart AN if it indicates something changed. Otherwise, we do 1377 * the full MAC reconfiguration. 1378 */ 1379 static int phylink_change_inband_advert(struct phylink *pl) 1380 { 1381 int ret; 1382 1383 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1384 return 0; 1385 1386 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1387 phylink_an_mode_str(pl->req_link_an_mode), 1388 phy_modes(pl->link_config.interface), 1389 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1390 pl->link_config.pause); 1391 1392 /* Recompute the PCS neg mode */ 1393 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1394 pl->link_config.advertising); 1395 1396 /* Modern PCS-based method; update the advert at the PCS, and 1397 * restart negotiation if the pcs_config() helper indicates that 1398 * the programmed advertisement has changed. 1399 */ 1400 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1401 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1402 if (ret < 0) 1403 return ret; 1404 1405 if (ret > 0) 1406 phylink_pcs_an_restart(pl); 1407 1408 return 0; 1409 } 1410 1411 static void phylink_mac_pcs_get_state(struct phylink *pl, 1412 struct phylink_link_state *state) 1413 { 1414 struct phylink_pcs *pcs; 1415 bool autoneg; 1416 1417 linkmode_copy(state->advertising, pl->link_config.advertising); 1418 linkmode_zero(state->lp_advertising); 1419 state->interface = pl->link_config.interface; 1420 state->rate_matching = pl->link_config.rate_matching; 1421 state->an_complete = 0; 1422 state->link = 1; 1423 1424 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1425 if (autoneg) { 1426 state->speed = SPEED_UNKNOWN; 1427 state->duplex = DUPLEX_UNKNOWN; 1428 state->pause = MLO_PAUSE_NONE; 1429 } else { 1430 state->speed = pl->link_config.speed; 1431 state->duplex = pl->link_config.duplex; 1432 state->pause = pl->link_config.pause; 1433 } 1434 1435 pcs = pl->pcs; 1436 if (pcs) 1437 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1438 else 1439 state->link = 0; 1440 } 1441 1442 /* The fixed state is... fixed except for the link state, 1443 * which may be determined by a GPIO or a callback. 1444 */ 1445 static void phylink_get_fixed_state(struct phylink *pl, 1446 struct phylink_link_state *state) 1447 { 1448 *state = pl->link_config; 1449 if (pl->config->get_fixed_state) 1450 pl->config->get_fixed_state(pl->config, state); 1451 else if (pl->link_gpio) 1452 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1453 1454 state->pause = MLO_PAUSE_NONE; 1455 phylink_resolve_an_pause(state); 1456 } 1457 1458 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1459 { 1460 struct phylink_link_state link_state; 1461 struct phy_device *phy = pl->phydev; 1462 1463 switch (pl->req_link_an_mode) { 1464 case MLO_AN_PHY: 1465 link_state = pl->phy_state; 1466 break; 1467 1468 case MLO_AN_FIXED: 1469 phylink_get_fixed_state(pl, &link_state); 1470 break; 1471 1472 case MLO_AN_INBAND: 1473 link_state = pl->link_config; 1474 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1475 link_state.pause = MLO_PAUSE_NONE; 1476 break; 1477 1478 default: /* can't happen */ 1479 return; 1480 } 1481 1482 link_state.link = false; 1483 1484 phylink_apply_manual_flow(pl, &link_state); 1485 if (phy) 1486 mutex_lock(&phy->lock); 1487 phylink_major_config(pl, force_restart, &link_state); 1488 if (phy) 1489 mutex_unlock(&phy->lock); 1490 } 1491 1492 static const char *phylink_pause_to_str(int pause) 1493 { 1494 switch (pause & MLO_PAUSE_TXRX_MASK) { 1495 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1496 return "rx/tx"; 1497 case MLO_PAUSE_TX: 1498 return "tx"; 1499 case MLO_PAUSE_RX: 1500 return "rx"; 1501 default: 1502 return "off"; 1503 } 1504 } 1505 1506 static void phylink_deactivate_lpi(struct phylink *pl) 1507 { 1508 if (pl->mac_enable_tx_lpi) { 1509 pl->mac_enable_tx_lpi = false; 1510 1511 phylink_dbg(pl, "disabling LPI\n"); 1512 1513 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1514 1515 phylink_pcs_disable_eee(pl->pcs); 1516 } 1517 } 1518 1519 static void phylink_activate_lpi(struct phylink *pl) 1520 { 1521 int err; 1522 1523 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1524 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1525 phy_modes(pl->cur_interface)); 1526 return; 1527 } 1528 1529 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1530 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1531 1532 phylink_pcs_enable_eee(pl->pcs); 1533 1534 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1535 pl->mac_tx_clk_stop); 1536 if (err) { 1537 phylink_pcs_disable_eee(pl->pcs); 1538 phylink_err(pl, "%ps() failed: %pe\n", 1539 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1540 return; 1541 } 1542 1543 pl->mac_enable_tx_lpi = true; 1544 } 1545 1546 static void phylink_link_up(struct phylink *pl, 1547 struct phylink_link_state link_state) 1548 { 1549 struct net_device *ndev = pl->netdev; 1550 int speed, duplex; 1551 bool rx_pause; 1552 1553 speed = link_state.speed; 1554 duplex = link_state.duplex; 1555 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1556 1557 switch (link_state.rate_matching) { 1558 case RATE_MATCH_PAUSE: 1559 /* The PHY is doing rate matchion from the media rate (in 1560 * the link_state) to the interface speed, and will send 1561 * pause frames to the MAC to limit its transmission speed. 1562 */ 1563 speed = phylink_interface_max_speed(link_state.interface); 1564 duplex = DUPLEX_FULL; 1565 rx_pause = true; 1566 break; 1567 1568 case RATE_MATCH_CRS: 1569 /* The PHY is doing rate matchion from the media rate (in 1570 * the link_state) to the interface speed, and will cause 1571 * collisions to the MAC to limit its transmission speed. 1572 */ 1573 speed = phylink_interface_max_speed(link_state.interface); 1574 duplex = DUPLEX_HALF; 1575 break; 1576 } 1577 1578 pl->cur_interface = link_state.interface; 1579 1580 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1581 duplex); 1582 1583 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1584 pl->cur_interface, speed, duplex, 1585 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1586 1587 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1588 phylink_activate_lpi(pl); 1589 1590 if (ndev) 1591 netif_carrier_on(ndev); 1592 1593 phylink_info(pl, 1594 "Link is Up - %s/%s - flow control %s\n", 1595 phy_speed_to_str(link_state.speed), 1596 phy_duplex_to_str(link_state.duplex), 1597 phylink_pause_to_str(link_state.pause)); 1598 } 1599 1600 static void phylink_link_down(struct phylink *pl) 1601 { 1602 struct net_device *ndev = pl->netdev; 1603 1604 if (ndev) 1605 netif_carrier_off(ndev); 1606 1607 phylink_deactivate_lpi(pl); 1608 1609 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1610 pl->cur_interface); 1611 phylink_info(pl, "Link is Down\n"); 1612 } 1613 1614 static bool phylink_link_is_up(struct phylink *pl) 1615 { 1616 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1617 } 1618 1619 static void phylink_resolve(struct work_struct *w) 1620 { 1621 struct phylink *pl = container_of(w, struct phylink, resolve); 1622 struct phylink_link_state link_state; 1623 bool mac_config = false; 1624 bool retrigger = false; 1625 struct phy_device *phy; 1626 bool cur_link_state; 1627 1628 mutex_lock(&pl->phydev_mutex); 1629 phy = pl->phydev; 1630 if (phy) 1631 mutex_lock(&phy->lock); 1632 mutex_lock(&pl->state_mutex); 1633 cur_link_state = phylink_link_is_up(pl); 1634 1635 if (pl->phylink_disable_state) { 1636 pl->link_failed = false; 1637 link_state = pl->link_config; 1638 link_state.link = false; 1639 } else if (pl->link_failed) { 1640 link_state = pl->link_config; 1641 link_state.link = false; 1642 retrigger = true; 1643 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1644 phylink_get_fixed_state(pl, &link_state); 1645 mac_config = link_state.link; 1646 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1647 link_state = pl->phy_state; 1648 mac_config = link_state.link; 1649 } else { 1650 phylink_mac_pcs_get_state(pl, &link_state); 1651 1652 /* The PCS may have a latching link-fail indicator. If the link 1653 * was up, bring the link down and re-trigger the resolve. 1654 * Otherwise, re-read the PCS state to get the current status 1655 * of the link. 1656 */ 1657 if (!link_state.link) { 1658 if (cur_link_state) 1659 retrigger = true; 1660 else 1661 phylink_mac_pcs_get_state(pl, &link_state); 1662 } 1663 1664 /* If we have a phy, the "up" state is the union of both the 1665 * PHY and the MAC 1666 */ 1667 if (phy) 1668 link_state.link &= pl->phy_state.link; 1669 1670 /* Only update if the PHY link is up */ 1671 if (phy && pl->phy_state.link) { 1672 /* If the interface has changed, force a link down 1673 * event if the link isn't already down, and re-resolve. 1674 */ 1675 if (link_state.interface != pl->phy_state.interface) { 1676 retrigger = true; 1677 link_state.link = false; 1678 } 1679 1680 link_state.interface = pl->phy_state.interface; 1681 1682 /* If we are doing rate matching, then the link 1683 * speed/duplex comes from the PHY 1684 */ 1685 if (pl->phy_state.rate_matching) { 1686 link_state.rate_matching = 1687 pl->phy_state.rate_matching; 1688 link_state.speed = pl->phy_state.speed; 1689 link_state.duplex = pl->phy_state.duplex; 1690 } 1691 1692 /* If we have a PHY, we need to update with the PHY 1693 * flow control bits. 1694 */ 1695 link_state.pause = pl->phy_state.pause; 1696 mac_config = true; 1697 } 1698 } 1699 1700 if (pl->act_link_an_mode != MLO_AN_FIXED) 1701 phylink_apply_manual_flow(pl, &link_state); 1702 1703 if ((mac_config && link_state.interface != pl->link_config.interface) || 1704 pl->force_major_config) { 1705 /* The interface has changed or a forced major configuration 1706 * was requested, so force the link down and then reconfigure. 1707 */ 1708 if (cur_link_state) { 1709 phylink_link_down(pl); 1710 cur_link_state = false; 1711 } 1712 phylink_major_config(pl, false, &link_state); 1713 pl->link_config.interface = link_state.interface; 1714 pl->force_major_config = false; 1715 } 1716 1717 /* If configuration of the interface failed, force the link down 1718 * until we get a successful configuration. 1719 */ 1720 if (pl->major_config_failed) 1721 link_state.link = false; 1722 1723 if (link_state.link != cur_link_state) { 1724 pl->old_link_state = link_state.link; 1725 if (!link_state.link) 1726 phylink_link_down(pl); 1727 else 1728 phylink_link_up(pl, link_state); 1729 } 1730 if (!link_state.link && retrigger) { 1731 pl->link_failed = false; 1732 queue_work(system_power_efficient_wq, &pl->resolve); 1733 } 1734 mutex_unlock(&pl->state_mutex); 1735 if (phy) 1736 mutex_unlock(&phy->lock); 1737 mutex_unlock(&pl->phydev_mutex); 1738 } 1739 1740 static void phylink_run_resolve(struct phylink *pl) 1741 { 1742 if (!pl->phylink_disable_state) 1743 queue_work(system_power_efficient_wq, &pl->resolve); 1744 } 1745 1746 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1747 { 1748 unsigned long state = pl->phylink_disable_state; 1749 1750 set_bit(bit, &pl->phylink_disable_state); 1751 if (state == 0) { 1752 queue_work(system_power_efficient_wq, &pl->resolve); 1753 flush_work(&pl->resolve); 1754 } 1755 } 1756 1757 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1758 { 1759 clear_bit(bit, &pl->phylink_disable_state); 1760 phylink_run_resolve(pl); 1761 } 1762 1763 static void phylink_fixed_poll(struct timer_list *t) 1764 { 1765 struct phylink *pl = container_of(t, struct phylink, link_poll); 1766 1767 mod_timer(t, jiffies + HZ); 1768 1769 phylink_run_resolve(pl); 1770 } 1771 1772 static const struct sfp_upstream_ops sfp_phylink_ops; 1773 1774 static int phylink_create_sfp_cage_port(struct phylink *pl) 1775 { 1776 struct phy_port *port; 1777 int ret = 0; 1778 1779 if (!pl->netdev || !pl->sfp_bus) 1780 return 0; 1781 1782 port = phy_port_alloc(); 1783 if (!port) 1784 return -ENOMEM; 1785 1786 port->is_sfp = true; 1787 port->is_mii = true; 1788 port->active = true; 1789 1790 phy_interface_and(port->interfaces, pl->config->supported_interfaces, 1791 phylink_sfp_interfaces); 1792 phy_port_update_supported(port); 1793 1794 rtnl_lock(); 1795 ret = phy_link_topo_add_port(pl->netdev, port); 1796 rtnl_unlock(); 1797 if (ret) 1798 goto out_destroy_port; 1799 1800 pl->sfp_cage_port = port; 1801 1802 return 0; 1803 1804 out_destroy_port: 1805 phy_port_destroy(port); 1806 pl->sfp_cage_port = NULL; 1807 return ret; 1808 } 1809 1810 static void phylink_destroy_sfp_cage_port(struct phylink *pl) 1811 { 1812 if (pl->netdev && pl->sfp_cage_port) { 1813 /* The port may still be accessed under RTNL */ 1814 rtnl_lock(); 1815 phy_link_topo_del_port(pl->netdev, pl->sfp_cage_port); 1816 rtnl_unlock(); 1817 } 1818 1819 if (pl->sfp_cage_port) 1820 phy_port_destroy(pl->sfp_cage_port); 1821 1822 pl->sfp_cage_port = NULL; 1823 } 1824 1825 static int phylink_register_sfp(struct phylink *pl, 1826 const struct fwnode_handle *fwnode) 1827 { 1828 struct sfp_bus *bus; 1829 int ret; 1830 1831 if (!fwnode) 1832 return 0; 1833 1834 bus = sfp_bus_find_fwnode(fwnode); 1835 if (IS_ERR(bus)) { 1836 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1837 return PTR_ERR(bus); 1838 } 1839 1840 pl->sfp_bus = bus; 1841 1842 ret = phylink_create_sfp_cage_port(pl); 1843 if (ret) { 1844 sfp_bus_put(bus); 1845 return ret; 1846 } 1847 1848 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1849 sfp_bus_put(bus); 1850 1851 if (ret) 1852 phylink_destroy_sfp_cage_port(pl); 1853 1854 return ret; 1855 } 1856 1857 /** 1858 * phylink_set_fixed_link() - set the fixed link 1859 * @pl: a pointer to a &struct phylink returned from phylink_create() 1860 * @state: a pointer to a struct phylink_link_state. 1861 * 1862 * This function is used when the link parameters are known and do not change, 1863 * making it suitable for certain types of network connections. 1864 * 1865 * Returns: zero on success or negative error code. 1866 */ 1867 int phylink_set_fixed_link(struct phylink *pl, 1868 const struct phylink_link_state *state) 1869 { 1870 const struct link_capabilities *c; 1871 unsigned long *adv; 1872 1873 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1874 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1875 return -EINVAL; 1876 1877 c = phy_caps_lookup(state->speed, state->duplex, 1878 pl->supported, true); 1879 if (!c) 1880 return -EINVAL; 1881 1882 adv = pl->link_config.advertising; 1883 linkmode_and(adv, pl->supported, c->linkmodes); 1884 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1885 1886 pl->link_config.speed = state->speed; 1887 pl->link_config.duplex = state->duplex; 1888 pl->link_config.link = 1; 1889 pl->link_config.an_complete = 1; 1890 1891 pl->cfg_link_an_mode = MLO_AN_FIXED; 1892 pl->req_link_an_mode = pl->cfg_link_an_mode; 1893 1894 return 0; 1895 } 1896 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1897 1898 /** 1899 * phylink_update_pause_state() - Update the phylink pause frame configuration 1900 * @pl: a pointer to a &struct phylink instance 1901 * @pause_state: bitmask indicating the new pause state 1902 * 1903 * Update the MAC pause frame (flow control) state for the phylink instance. 1904 */ 1905 static void phylink_update_pause_state(struct phylink *pl, int pause_state) 1906 { 1907 struct phylink_link_state *config = &pl->link_config; 1908 bool tx_pause = !!(pause_state & MLO_PAUSE_TX); 1909 bool rx_pause = !!(pause_state & MLO_PAUSE_RX); 1910 bool manual_changed; 1911 1912 mutex_lock(&pl->state_mutex); 1913 1914 /* 1915 * See the comments for linkmode_set_pause(), wrt the deficiencies 1916 * with the current implementation. A solution to this issue would 1917 * be: 1918 * ethtool Local device 1919 * rx tx Pause AsymDir 1920 * 0 0 0 0 1921 * 1 0 1 1 1922 * 0 1 0 1 1923 * 1 1 1 1 1924 * and then use the ethtool rx/tx enablement status to mask the 1925 * rx/tx pause resolution. 1926 */ 1927 linkmode_set_pause(config->advertising, tx_pause, 1928 rx_pause); 1929 1930 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 1931 (!(pause_state & MLO_PAUSE_AN) && 1932 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 1933 1934 config->pause = pause_state; 1935 1936 /* Update our in-band advertisement, triggering a renegotiation if 1937 * the advertisement changed. 1938 */ 1939 if (!pl->phydev) 1940 phylink_change_inband_advert(pl); 1941 1942 mutex_unlock(&pl->state_mutex); 1943 1944 /* If we have a PHY, a change of the pause frame advertisement will 1945 * cause phylib to renegotiate (if AN is enabled) which will in turn 1946 * call our phylink_phy_change() and trigger a resolve. Note that 1947 * we can't hold our state mutex while calling phy_set_asym_pause(). 1948 */ 1949 if (pl->phydev) 1950 phy_set_asym_pause(pl->phydev, rx_pause, tx_pause); 1951 1952 /* If the manual pause settings changed, make sure we trigger a 1953 * resolve to update their state; we can not guarantee that the 1954 * link will cycle. 1955 */ 1956 if (manual_changed) { 1957 pl->link_failed = true; 1958 phylink_run_resolve(pl); 1959 } 1960 } 1961 1962 /** 1963 * phylink_update_mac_pause_capabilities() - Dynamically update MAC pause 1964 * @pl: a pointer to a &struct phylink returned from phylink_create() 1965 * @mac_pause: the new MAC pause capabilities mask 1966 * 1967 * This function allows a MAC driver to dynamically change its pause state, 1968 * such as losing/gaining Pause frame support based on MTU size. 1969 * It recalculates supported link modes and triggers renegotiation if needed. 1970 */ 1971 void phylink_update_mac_pause_capabilities(struct phylink *pl, unsigned long mac_pause) 1972 { 1973 struct phylink_link_state *config = &pl->link_config; 1974 unsigned long old_pause; 1975 int pause_state; 1976 1977 ASSERT_RTNL(); 1978 1979 if (mac_pause & ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE)) { 1980 phylink_err(pl, "Attempted to dynamically change non-pause MAC capabilities\n"); 1981 return; 1982 } 1983 1984 old_pause = pl->config->mac_capabilities & (MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 1985 if (old_pause == mac_pause) 1986 return; 1987 1988 mutex_lock(&pl->state_mutex); 1989 1990 pl->config->mac_capabilities &= ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 1991 pl->config->mac_capabilities |= mac_pause; 1992 1993 phylink_set(pl->supported, Pause); 1994 phylink_set(pl->supported, Asym_Pause); 1995 1996 if (pl->phydev) 1997 linkmode_and(pl->supported, pl->supported, pl->phydev->supported); 1998 else if (pl->sfp_bus) 1999 linkmode_and(pl->supported, pl->supported, pl->sfp_support); 2000 2001 phylink_validate(pl, pl->supported, config); 2002 2003 pause_state = config->pause; 2004 2005 if (!phylink_test(pl->supported, Pause)) { 2006 pause_state &= ~(MLO_PAUSE_RX | MLO_PAUSE_TX); 2007 } else if (!phylink_test(pl->supported, Asym_Pause)) { 2008 if ((pause_state & MLO_PAUSE_RX) ^ (pause_state & MLO_PAUSE_TX)) 2009 pause_state &= ~(MLO_PAUSE_RX | MLO_PAUSE_TX); 2010 } 2011 2012 mutex_unlock(&pl->state_mutex); 2013 2014 phylink_update_pause_state(pl, pause_state); 2015 } 2016 EXPORT_SYMBOL_GPL(phylink_update_mac_pause_capabilities); 2017 2018 /** 2019 * phylink_create() - create a phylink instance 2020 * @config: a pointer to the target &struct phylink_config 2021 * @fwnode: a pointer to a &struct fwnode_handle describing the network 2022 * interface 2023 * @iface: the desired link mode defined by &typedef phy_interface_t 2024 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 2025 * 2026 * Create a new phylink instance, and parse the link parameters found in @np. 2027 * This will parse in-band modes, fixed-link or SFP configuration. 2028 * 2029 * Note: the rtnl lock must not be held when calling this function. 2030 * 2031 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 2032 * must use IS_ERR() to check for errors from this function. 2033 */ 2034 struct phylink *phylink_create(struct phylink_config *config, 2035 const struct fwnode_handle *fwnode, 2036 phy_interface_t iface, 2037 const struct phylink_mac_ops *mac_ops) 2038 { 2039 struct phylink *pl; 2040 int ret; 2041 2042 /* Validate the supplied configuration */ 2043 if (phy_interface_empty(config->supported_interfaces)) { 2044 dev_err(config->dev, 2045 "phylink: error: empty supported_interfaces\n"); 2046 return ERR_PTR(-EINVAL); 2047 } 2048 2049 pl = kzalloc_obj(*pl); 2050 if (!pl) 2051 return ERR_PTR(-ENOMEM); 2052 2053 mutex_init(&pl->phydev_mutex); 2054 mutex_init(&pl->state_mutex); 2055 INIT_WORK(&pl->resolve, phylink_resolve); 2056 2057 pl->config = config; 2058 if (config->type == PHYLINK_NETDEV) { 2059 pl->netdev = to_net_dev(config->dev); 2060 netif_carrier_off(pl->netdev); 2061 } else if (config->type == PHYLINK_DEV) { 2062 pl->dev = config->dev; 2063 } else { 2064 ret = -EINVAL; 2065 goto free_pl; 2066 } 2067 2068 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 2069 pl->mac_supports_eee = pl->mac_supports_eee_ops && 2070 pl->config->lpi_capabilities && 2071 !phy_interface_empty(pl->config->lpi_interfaces); 2072 2073 /* Set the default EEE configuration */ 2074 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 2075 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 2076 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 2077 2078 pl->phy_state.interface = iface; 2079 pl->link_interface = iface; 2080 if (iface == PHY_INTERFACE_MODE_MOCA) 2081 pl->link_port = PORT_BNC; 2082 else 2083 pl->link_port = PORT_MII; 2084 pl->link_config.interface = iface; 2085 pl->link_config.pause = MLO_PAUSE_AN; 2086 pl->link_config.speed = SPEED_UNKNOWN; 2087 pl->link_config.duplex = DUPLEX_UNKNOWN; 2088 pl->pcs_state = PCS_STATE_DOWN; 2089 pl->mac_ops = mac_ops; 2090 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 2091 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 2092 2093 linkmode_fill(pl->supported); 2094 linkmode_copy(pl->link_config.advertising, pl->supported); 2095 phylink_validate(pl, pl->supported, &pl->link_config); 2096 2097 ret = phylink_parse_mode(pl, fwnode); 2098 if (ret < 0) 2099 goto free_pl; 2100 2101 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 2102 ret = phylink_parse_fixedlink(pl, fwnode); 2103 if (ret < 0) 2104 goto release_link_gpio; 2105 } 2106 2107 pl->req_link_an_mode = pl->cfg_link_an_mode; 2108 2109 ret = phylink_register_sfp(pl, fwnode); 2110 if (ret < 0) 2111 goto release_link_gpio; 2112 2113 return pl; 2114 2115 release_link_gpio: 2116 if (pl->link_gpio) 2117 gpiod_put(pl->link_gpio); 2118 free_pl: 2119 kfree(pl); 2120 return ERR_PTR(ret); 2121 } 2122 EXPORT_SYMBOL_GPL(phylink_create); 2123 2124 /** 2125 * phylink_destroy() - cleanup and destroy the phylink instance 2126 * @pl: a pointer to a &struct phylink returned from phylink_create() 2127 * 2128 * Destroy a phylink instance. Any PHY that has been attached must have been 2129 * cleaned up via phylink_disconnect_phy() prior to calling this function. 2130 * 2131 * Note: the rtnl lock must not be held when calling this function. 2132 */ 2133 void phylink_destroy(struct phylink *pl) 2134 { 2135 sfp_bus_del_upstream(pl->sfp_bus); 2136 phylink_destroy_sfp_cage_port(pl); 2137 if (pl->link_gpio) 2138 gpiod_put(pl->link_gpio); 2139 2140 cancel_work_sync(&pl->resolve); 2141 kfree(pl); 2142 } 2143 EXPORT_SYMBOL_GPL(phylink_destroy); 2144 2145 /** 2146 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 2147 * @pl: a pointer to a &struct phylink returned from phylink_create() 2148 * 2149 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 2150 * no PHY is needed. 2151 * 2152 * Returns true if phylink will be expecting a PHY. 2153 */ 2154 bool phylink_expects_phy(struct phylink *pl) 2155 { 2156 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2157 return false; 2158 return true; 2159 } 2160 EXPORT_SYMBOL_GPL(phylink_expects_phy); 2161 2162 static void phylink_phy_change(struct phy_device *phydev, bool up) 2163 { 2164 struct phylink *pl = phydev->phylink; 2165 bool tx_pause, rx_pause; 2166 2167 phy_get_pause(phydev, &tx_pause, &rx_pause); 2168 2169 mutex_lock(&pl->state_mutex); 2170 pl->phy_state.speed = phydev->speed; 2171 pl->phy_state.duplex = phydev->duplex; 2172 pl->phy_state.rate_matching = phydev->rate_matching; 2173 pl->phy_state.pause = MLO_PAUSE_NONE; 2174 if (tx_pause) 2175 pl->phy_state.pause |= MLO_PAUSE_TX; 2176 if (rx_pause) 2177 pl->phy_state.pause |= MLO_PAUSE_RX; 2178 pl->phy_state.interface = phydev->interface; 2179 pl->phy_state.link = up; 2180 if (!up) 2181 pl->link_failed = true; 2182 2183 /* Get the LPI state from phylib */ 2184 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 2185 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 2186 mutex_unlock(&pl->state_mutex); 2187 2188 phylink_run_resolve(pl); 2189 2190 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 2191 up ? "up" : "down", 2192 phy_modes(phydev->interface), 2193 phy_speed_to_str(phydev->speed), 2194 phy_duplex_to_str(phydev->duplex), 2195 phy_rate_matching_to_str(phydev->rate_matching), 2196 phylink_pause_to_str(pl->phy_state.pause), 2197 phydev->enable_tx_lpi ? "" : "no"); 2198 } 2199 2200 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2201 unsigned long *supported, 2202 struct phylink_link_state *state) 2203 { 2204 DECLARE_PHY_INTERFACE_MASK(interfaces); 2205 2206 /* If the PHY provides a bitmap of the interfaces it will be using 2207 * depending on the negotiated media speeds, use this to validate 2208 * which ethtool link modes can be used. 2209 */ 2210 if (!phy_interface_empty(phy->possible_interfaces)) { 2211 /* We only care about the union of the PHY's interfaces and 2212 * those which the host supports. 2213 */ 2214 phy_interface_and(interfaces, phy->possible_interfaces, 2215 pl->config->supported_interfaces); 2216 2217 if (phy_interface_empty(interfaces)) { 2218 phylink_err(pl, "PHY has no common interfaces\n"); 2219 return -EINVAL; 2220 } 2221 2222 if (phy_on_sfp(phy)) { 2223 /* If the PHY is on a SFP, limit the interfaces to 2224 * those that can be used with a SFP module. 2225 */ 2226 phy_interface_and(interfaces, interfaces, 2227 phylink_sfp_interfaces); 2228 2229 if (phy_interface_empty(interfaces)) { 2230 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2231 return -EINVAL; 2232 } 2233 } 2234 2235 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2236 phydev_name(phy), 2237 (int)PHY_INTERFACE_MODE_MAX, 2238 phy->possible_interfaces, 2239 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2240 2241 return phylink_validate_mask(pl, phy, supported, state, 2242 interfaces); 2243 } 2244 2245 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2246 phydev_name(phy)); 2247 2248 /* Check whether we would use rate matching for the proposed interface 2249 * mode. 2250 */ 2251 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2252 2253 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2254 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2255 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2256 * their Serdes is either unnecessary or not reasonable. 2257 * 2258 * For these which switch interface modes, we really need to know which 2259 * interface modes the PHY supports to properly work out which ethtool 2260 * linkmodes can be supported. For now, as a work-around, we validate 2261 * against all interface modes, which may lead to more ethtool link 2262 * modes being advertised than are actually supported. 2263 */ 2264 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2265 state->interface != PHY_INTERFACE_MODE_RXAUI && 2266 state->interface != PHY_INTERFACE_MODE_XAUI && 2267 state->interface != PHY_INTERFACE_MODE_USXGMII) 2268 state->interface = PHY_INTERFACE_MODE_NA; 2269 2270 return phylink_validate(pl, supported, state); 2271 } 2272 2273 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2274 phy_interface_t interface) 2275 { 2276 struct phylink_link_state config; 2277 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2278 char *irq_str; 2279 int ret; 2280 2281 /* 2282 * This is the new way of dealing with flow control for PHYs, 2283 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2284 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 2285 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 2286 * capabilities and must NOT change the phy's pause settings directly. 2287 */ 2288 phy_support_asym_pause(phy); 2289 2290 memset(&config, 0, sizeof(config)); 2291 linkmode_copy(supported, phy->supported); 2292 linkmode_copy(config.advertising, phy->advertising); 2293 config.interface = interface; 2294 2295 ret = phylink_validate_phy(pl, phy, supported, &config); 2296 if (ret) { 2297 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2298 phy_modes(config.interface), 2299 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2300 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2301 ERR_PTR(ret)); 2302 return ret; 2303 } 2304 2305 phy->phylink = pl; 2306 phy->phy_link_change = phylink_phy_change; 2307 2308 irq_str = phy_attached_info_irq(phy); 2309 phylink_info(pl, 2310 "PHY [%s] driver [%s] (irq=%s)\n", 2311 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2312 kfree(irq_str); 2313 2314 mutex_lock(&pl->phydev_mutex); 2315 mutex_lock(&phy->lock); 2316 mutex_lock(&pl->state_mutex); 2317 pl->phy_state.interface = interface; 2318 pl->phy_state.pause = MLO_PAUSE_NONE; 2319 pl->phy_state.speed = SPEED_UNKNOWN; 2320 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2321 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2322 linkmode_copy(pl->supported, supported); 2323 linkmode_copy(pl->link_config.advertising, config.advertising); 2324 2325 /* Restrict the phy advertisement according to the MAC support. */ 2326 linkmode_copy(phy->advertising, config.advertising); 2327 2328 /* If the MAC supports phylink managed EEE, restrict the EEE 2329 * advertisement according to the MAC's LPI capabilities. 2330 */ 2331 if (pl->mac_supports_eee) { 2332 /* If EEE is enabled, then we need to call phy_support_eee() 2333 * to ensure that the advertising mask is appropriately set. 2334 * This also enables EEE at the PHY. 2335 */ 2336 if (pl->eee_cfg.eee_enabled) 2337 phy_support_eee(phy); 2338 2339 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2340 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2341 2342 /* Convert the MAC's LPI capabilities to linkmodes */ 2343 linkmode_zero(pl->supported_lpi); 2344 phylink_caps_to_linkmodes(pl->supported_lpi, 2345 pl->config->lpi_capabilities); 2346 2347 /* Restrict the PHYs EEE support/advertisement to the modes 2348 * that the MAC supports. 2349 */ 2350 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2351 pl->supported_lpi); 2352 } else if (pl->mac_supports_eee_ops) { 2353 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2354 phy_disable_eee(phy); 2355 } 2356 2357 mutex_unlock(&pl->state_mutex); 2358 mutex_unlock(&phy->lock); 2359 mutex_unlock(&pl->phydev_mutex); 2360 2361 phylink_dbg(pl, 2362 "phy: %s setting supported %*pb advertising %*pb\n", 2363 phy_modes(interface), 2364 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2365 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2366 2367 if (pl->config->mac_managed_pm) 2368 phy->mac_managed_pm = true; 2369 2370 /* Allow the MAC to stop its clock if the PHY has the capability */ 2371 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2372 2373 if (pl->mac_supports_eee_ops) { 2374 /* Explicitly configure whether the PHY is allowed to stop it's 2375 * receive clock. 2376 */ 2377 ret = phy_eee_rx_clock_stop(phy, 2378 pl->config->eee_rx_clk_stop_enable); 2379 if (ret == -EOPNOTSUPP) 2380 ret = 0; 2381 } 2382 2383 if (ret) 2384 return ret; 2385 2386 /* Nothing below can fail, so the PHY can be recorded now. Doing it 2387 * here rather than above keeps a failed bringup from leaving 2388 * pl->phydev pointing at a PHY the caller is about to detach. 2389 */ 2390 mutex_lock(&pl->phydev_mutex); 2391 mutex_lock(&phy->lock); 2392 mutex_lock(&pl->state_mutex); 2393 pl->phydev = phy; 2394 mutex_unlock(&pl->state_mutex); 2395 mutex_unlock(&phy->lock); 2396 mutex_unlock(&pl->phydev_mutex); 2397 2398 if (phy_interrupt_is_valid(phy)) 2399 phy_request_interrupt(phy); 2400 2401 return 0; 2402 } 2403 2404 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2405 phy_interface_t interface) 2406 { 2407 u32 flags = 0; 2408 2409 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED)) 2410 return -EINVAL; 2411 2412 if (pl->phydev) 2413 return -EBUSY; 2414 2415 if (pl->config->mac_requires_rxc) 2416 flags |= PHY_F_RXC_ALWAYS_ON; 2417 2418 return phy_attach_direct(pl->netdev, phy, flags, interface); 2419 } 2420 2421 /** 2422 * phylink_connect_phy() - connect a PHY to the phylink instance 2423 * @pl: a pointer to a &struct phylink returned from phylink_create() 2424 * @phy: a pointer to a &struct phy_device. 2425 * 2426 * Connect @phy to the phylink instance specified by @pl by calling 2427 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2428 * capabilities, start the PHYLIB state machine and enable any interrupts 2429 * that the PHY supports. 2430 * 2431 * This updates the phylink's ethtool supported and advertising link mode 2432 * masks. 2433 * 2434 * Returns 0 on success or a negative errno. 2435 */ 2436 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2437 { 2438 int ret; 2439 2440 /* Use PHY device/driver interface */ 2441 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2442 pl->link_interface = phy->interface; 2443 pl->link_config.interface = pl->link_interface; 2444 } 2445 2446 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2447 if (ret < 0) 2448 return ret; 2449 2450 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2451 if (ret) 2452 phy_detach(phy); 2453 2454 return ret; 2455 } 2456 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2457 2458 /** 2459 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2460 * @pl: a pointer to a &struct phylink returned from phylink_create() 2461 * @dn: a pointer to a &struct device_node. 2462 * @flags: PHY-specific flags to communicate to the PHY device driver 2463 * 2464 * Connect the phy specified in the device node @dn to the phylink instance 2465 * specified by @pl. Actions specified in phylink_connect_phy() will be 2466 * performed. 2467 * 2468 * Returns 0 on success or a negative errno. 2469 */ 2470 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2471 u32 flags) 2472 { 2473 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2474 } 2475 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2476 2477 /** 2478 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2479 * @pl: a pointer to a &struct phylink returned from phylink_create() 2480 * @fwnode: a pointer to a &struct fwnode_handle. 2481 * @flags: PHY-specific flags to communicate to the PHY device driver 2482 * 2483 * Connect the phy specified @fwnode to the phylink instance specified 2484 * by @pl. 2485 * 2486 * Returns 0 on success or a negative errno. 2487 */ 2488 int phylink_fwnode_phy_connect(struct phylink *pl, 2489 const struct fwnode_handle *fwnode, 2490 u32 flags) 2491 { 2492 struct fwnode_handle *phy_fwnode; 2493 struct phy_device *phy_dev; 2494 int ret; 2495 2496 if (!phylink_expects_phy(pl)) 2497 return 0; 2498 2499 phy_fwnode = fwnode_get_phy_node(fwnode); 2500 if (IS_ERR(phy_fwnode)) { 2501 /* PHY mode requires a PHY to be specified. */ 2502 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2503 return -ENODEV; 2504 return 0; 2505 } 2506 2507 phy_dev = fwnode_phy_find_device(phy_fwnode); 2508 /* We're done with the phy_node handle */ 2509 fwnode_handle_put(phy_fwnode); 2510 if (!phy_dev) 2511 return -ENODEV; 2512 2513 /* Use PHY device/driver interface */ 2514 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2515 pl->link_interface = phy_dev->interface; 2516 pl->link_config.interface = pl->link_interface; 2517 } 2518 2519 if (pl->config->mac_requires_rxc) 2520 flags |= PHY_F_RXC_ALWAYS_ON; 2521 2522 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2523 pl->link_interface); 2524 phy_device_free(phy_dev); 2525 if (ret) 2526 return ret; 2527 2528 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2529 if (ret) 2530 phy_detach(phy_dev); 2531 2532 return ret; 2533 } 2534 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2535 2536 /** 2537 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2538 * instance. 2539 * @pl: a pointer to a &struct phylink returned from phylink_create() 2540 * 2541 * Disconnect any current PHY from the phylink instance described by @pl. 2542 */ 2543 void phylink_disconnect_phy(struct phylink *pl) 2544 { 2545 struct phy_device *phy; 2546 2547 ASSERT_RTNL(); 2548 2549 mutex_lock(&pl->phydev_mutex); 2550 phy = pl->phydev; 2551 if (phy) { 2552 mutex_lock(&phy->lock); 2553 mutex_lock(&pl->state_mutex); 2554 pl->phydev = NULL; 2555 pl->phy_enable_tx_lpi = false; 2556 pl->mac_tx_clk_stop = false; 2557 mutex_unlock(&pl->state_mutex); 2558 mutex_unlock(&phy->lock); 2559 } 2560 mutex_unlock(&pl->phydev_mutex); 2561 2562 if (phy) { 2563 flush_work(&pl->resolve); 2564 phy_disconnect(phy); 2565 } 2566 } 2567 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2568 2569 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2570 { 2571 if (!up) 2572 pl->link_failed = true; 2573 phylink_run_resolve(pl); 2574 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2575 } 2576 2577 /** 2578 * phylink_mac_change() - notify phylink of a change in MAC state 2579 * @pl: a pointer to a &struct phylink returned from phylink_create() 2580 * @up: indicates whether the link is currently up. 2581 * 2582 * The MAC driver should call this driver when the state of its link 2583 * changes (eg, link failure, new negotiation results, etc.) 2584 */ 2585 void phylink_mac_change(struct phylink *pl, bool up) 2586 { 2587 phylink_link_changed(pl, up, "mac"); 2588 } 2589 EXPORT_SYMBOL_GPL(phylink_mac_change); 2590 2591 /** 2592 * phylink_pcs_change() - notify phylink of a change to PCS link state 2593 * @pcs: pointer to &struct phylink_pcs 2594 * @up: indicates whether the link is currently up. 2595 * 2596 * The PCS driver should call this when the state of its link changes 2597 * (e.g. link failure, new negotiation results, etc.) Note: it should 2598 * not determine "up" by reading the BMSR. If in doubt about the link 2599 * state at interrupt time, then pass true if pcs_get_state() returns 2600 * the latched link-down state, otherwise pass false. 2601 */ 2602 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2603 { 2604 struct phylink *pl = pcs->phylink; 2605 2606 if (pl) 2607 phylink_link_changed(pl, up, "pcs"); 2608 } 2609 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2610 2611 static irqreturn_t phylink_link_handler(int irq, void *data) 2612 { 2613 struct phylink *pl = data; 2614 2615 phylink_run_resolve(pl); 2616 2617 return IRQ_HANDLED; 2618 } 2619 2620 /** 2621 * phylink_start() - start a phylink instance 2622 * @pl: a pointer to a &struct phylink returned from phylink_create() 2623 * 2624 * Start the phylink instance specified by @pl, configuring the MAC for the 2625 * desired link mode(s) and negotiation style. This should be called from the 2626 * network device driver's &struct net_device_ops ndo_open() method. 2627 */ 2628 void phylink_start(struct phylink *pl) 2629 { 2630 bool poll = false; 2631 2632 ASSERT_RTNL(); 2633 2634 phylink_info(pl, "configuring for %s/%s link mode\n", 2635 phylink_an_mode_str(pl->req_link_an_mode), 2636 phy_modes(pl->link_config.interface)); 2637 2638 /* Always set the carrier off */ 2639 if (pl->netdev) 2640 netif_carrier_off(pl->netdev); 2641 2642 pl->pcs_state = PCS_STATE_STARTING; 2643 2644 /* Apply the link configuration to the MAC when starting. This allows 2645 * a fixed-link to start with the correct parameters, and also 2646 * ensures that we set the appropriate advertisement for Serdes links. 2647 * 2648 * Restart autonegotiation if using 802.3z to ensure that the link 2649 * parameters are properly negotiated. This is necessary for DSA 2650 * switches using 802.3z negotiation to ensure they see our modes. 2651 */ 2652 phylink_mac_initial_config(pl, true); 2653 2654 pl->pcs_state = PCS_STATE_STARTED; 2655 2656 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2657 2658 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2659 int irq = gpiod_to_irq(pl->link_gpio); 2660 2661 if (irq > 0) { 2662 if (!request_irq(irq, phylink_link_handler, 2663 IRQF_TRIGGER_RISING | 2664 IRQF_TRIGGER_FALLING, 2665 "netdev link", pl)) 2666 pl->link_irq = irq; 2667 else 2668 irq = 0; 2669 } 2670 if (irq <= 0) 2671 poll = true; 2672 } 2673 2674 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2675 poll |= pl->config->poll_fixed_state; 2676 2677 if (poll) 2678 mod_timer(&pl->link_poll, jiffies + HZ); 2679 if (pl->phydev) 2680 phy_start(pl->phydev); 2681 if (pl->sfp_bus) 2682 sfp_upstream_start(pl->sfp_bus); 2683 } 2684 EXPORT_SYMBOL_GPL(phylink_start); 2685 2686 /** 2687 * phylink_stop() - stop a phylink instance 2688 * @pl: a pointer to a &struct phylink returned from phylink_create() 2689 * 2690 * Stop the phylink instance specified by @pl. This should be called from the 2691 * network device driver's &struct net_device_ops ndo_stop() method. The 2692 * network device's carrier state should not be changed prior to calling this 2693 * function. 2694 * 2695 * This will synchronously bring down the link if the link is not already 2696 * down (in other words, it will trigger a mac_link_down() method call.) 2697 */ 2698 void phylink_stop(struct phylink *pl) 2699 { 2700 ASSERT_RTNL(); 2701 2702 if (pl->sfp_bus) 2703 sfp_upstream_stop(pl->sfp_bus); 2704 if (pl->phydev) 2705 phy_stop(pl->phydev); 2706 timer_delete_sync(&pl->link_poll); 2707 if (pl->link_irq) { 2708 free_irq(pl->link_irq, pl); 2709 pl->link_irq = 0; 2710 } 2711 2712 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2713 2714 pl->pcs_state = PCS_STATE_DOWN; 2715 2716 phylink_pcs_disable(pl->pcs); 2717 } 2718 EXPORT_SYMBOL_GPL(phylink_stop); 2719 2720 /** 2721 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2722 * @pl: a pointer to a &struct phylink returned from phylink_create() 2723 * 2724 * Disable the PHY's ability to stop the receive clock while the receive path 2725 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2726 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2727 */ 2728 void phylink_rx_clk_stop_block(struct phylink *pl) 2729 { 2730 ASSERT_RTNL(); 2731 2732 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2733 phylink_warn(pl, "%s called too many times - ignoring\n", 2734 __func__); 2735 dump_stack(); 2736 return; 2737 } 2738 2739 /* Disable PHY receive clock stop if this is the first time this 2740 * function has been called and clock-stop was previously enabled. 2741 */ 2742 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2743 pl->mac_supports_eee_ops && pl->phydev && 2744 pl->config->eee_rx_clk_stop_enable) 2745 phy_eee_rx_clock_stop(pl->phydev, false); 2746 } 2747 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2748 2749 /** 2750 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2751 * @pl: a pointer to a &struct phylink returned from phylink_create() 2752 * 2753 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2754 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2755 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2756 */ 2757 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2758 { 2759 ASSERT_RTNL(); 2760 2761 if (pl->mac_rx_clk_stop_blocked == 0) { 2762 phylink_warn(pl, "%s called too many times - ignoring\n", 2763 __func__); 2764 dump_stack(); 2765 return; 2766 } 2767 2768 /* Re-enable PHY receive clock stop if the number of unblocks matches 2769 * the number of calls to the block function above. 2770 */ 2771 if (--pl->mac_rx_clk_stop_blocked == 0 && 2772 pl->mac_supports_eee_ops && pl->phydev && 2773 pl->config->eee_rx_clk_stop_enable) 2774 phy_eee_rx_clock_stop(pl->phydev, true); 2775 } 2776 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2777 2778 static bool phylink_mac_supports_wol(struct phylink *pl) 2779 { 2780 return !!pl->mac_ops->mac_wol_set; 2781 } 2782 2783 static bool phylink_phy_supports_wol(struct phylink *pl, 2784 struct phy_device *phydev) 2785 { 2786 return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev)); 2787 } 2788 2789 static bool phylink_phy_pm_speed_ctrl(struct phylink *pl) 2790 { 2791 return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac && 2792 pl->phydev && phy_may_wakeup(pl->phydev); 2793 } 2794 2795 /** 2796 * phylink_suspend() - handle a network device suspend event 2797 * @pl: a pointer to a &struct phylink returned from phylink_create() 2798 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2799 * 2800 * Handle a network device suspend event. There are several cases: 2801 * 2802 * - If Wake-on-Lan is not active, we can bring down the link between 2803 * the MAC and PHY by calling phylink_stop(). 2804 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2805 * can also bring down the link between the MAC and PHY. 2806 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2807 * still needs to receive packets, so we can not bring the link down. 2808 * 2809 * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored. 2810 * (struct phylink_mac_ops.mac_set_wol populated.) 2811 */ 2812 void phylink_suspend(struct phylink *pl, bool mac_wol) 2813 { 2814 ASSERT_RTNL(); 2815 2816 if (phylink_mac_supports_wol(pl)) 2817 mac_wol = !!pl->wolopts_mac; 2818 2819 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2820 /* Wake-on-Lan enabled, MAC handling */ 2821 mutex_lock(&pl->state_mutex); 2822 2823 /* Stop the resolver bringing the link up */ 2824 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2825 2826 pl->suspend_link_up = phylink_link_is_up(pl); 2827 if (pl->suspend_link_up) { 2828 /* Disable the carrier, to prevent transmit timeouts, 2829 * but one would hope all packets have been sent. This 2830 * also means phylink_resolve() will do nothing. 2831 */ 2832 if (pl->netdev) 2833 netif_carrier_off(pl->netdev); 2834 pl->old_link_state = false; 2835 } 2836 2837 /* We do not call mac_link_down() here as we want the 2838 * link to remain up to receive the WoL packets. 2839 */ 2840 mutex_unlock(&pl->state_mutex); 2841 } else { 2842 phylink_stop(pl); 2843 } 2844 2845 if (phylink_phy_pm_speed_ctrl(pl)) 2846 phylink_speed_down(pl, false); 2847 } 2848 EXPORT_SYMBOL_GPL(phylink_suspend); 2849 2850 /** 2851 * phylink_prepare_resume() - prepare to resume a network device 2852 * @pl: a pointer to a &struct phylink returned from phylink_create() 2853 * 2854 * Optional, but if called must be called prior to phylink_resume(). 2855 * 2856 * Prepare to resume a network device, preparing the PHY as necessary. 2857 */ 2858 void phylink_prepare_resume(struct phylink *pl) 2859 { 2860 struct phy_device *phydev = pl->phydev; 2861 2862 ASSERT_RTNL(); 2863 2864 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2865 * when PDOWN is set. However, some MACs require RXC to be running 2866 * in order to resume. If the MAC requires RXC, and we have a PHY, 2867 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2868 * the clock meets requirements. We do not implement this delay. 2869 */ 2870 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2871 phy_resume(phydev); 2872 } 2873 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2874 2875 /** 2876 * phylink_resume() - handle a network device resume event 2877 * @pl: a pointer to a &struct phylink returned from phylink_create() 2878 * 2879 * Undo the effects of phylink_suspend(), returning the link to an 2880 * operational state. 2881 */ 2882 void phylink_resume(struct phylink *pl) 2883 { 2884 ASSERT_RTNL(); 2885 2886 if (phylink_phy_pm_speed_ctrl(pl)) 2887 phylink_speed_up(pl); 2888 2889 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2890 /* Wake-on-Lan enabled, MAC handling */ 2891 2892 if (pl->suspend_link_up) { 2893 /* Call mac_link_down() so we keep the overall state 2894 * balanced. Do this under the state_mutex lock for 2895 * consistency. This will cause a "Link Down" message 2896 * to be printed during resume, which is harmless - 2897 * the true link state will be printed when we run a 2898 * resolve. 2899 */ 2900 mutex_lock(&pl->state_mutex); 2901 phylink_link_down(pl); 2902 mutex_unlock(&pl->state_mutex); 2903 } 2904 2905 /* Re-apply the link parameters so that all the settings get 2906 * restored to the MAC. 2907 */ 2908 phylink_mac_initial_config(pl, true); 2909 2910 /* Re-enable and re-resolve the link parameters */ 2911 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2912 } else { 2913 phylink_start(pl); 2914 } 2915 } 2916 EXPORT_SYMBOL_GPL(phylink_resume); 2917 2918 /** 2919 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2920 * @pl: a pointer to a &struct phylink returned from phylink_create() 2921 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2922 * 2923 * Read the wake on lan parameters from the PHY attached to the phylink 2924 * instance specified by @pl. If no PHY is currently attached, report no 2925 * support for wake on lan. 2926 */ 2927 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2928 { 2929 ASSERT_RTNL(); 2930 2931 wol->supported = 0; 2932 wol->wolopts = 0; 2933 2934 if (phylink_mac_supports_wol(pl)) { 2935 if (phylink_phy_supports_wol(pl, pl->phydev)) 2936 phy_ethtool_get_wol(pl->phydev, wol); 2937 2938 /* Where the MAC augments the WoL support, merge its support and 2939 * current configuration. 2940 */ 2941 if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE) 2942 memcpy(wol->sopass, pl->wol_sopass, 2943 sizeof(wol->sopass)); 2944 2945 wol->supported |= pl->config->wol_mac_support; 2946 wol->wolopts |= pl->wolopts_mac; 2947 } else { 2948 /* Legacy */ 2949 if (pl->phydev) 2950 phy_ethtool_get_wol(pl->phydev, wol); 2951 } 2952 } 2953 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2954 2955 /** 2956 * phylink_ethtool_set_wol() - set wake on lan parameters 2957 * @pl: a pointer to a &struct phylink returned from phylink_create() 2958 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2959 * 2960 * Set the wake on lan parameters for the PHY attached to the phylink 2961 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2962 * error. 2963 * 2964 * Returns zero on success or negative errno code. 2965 */ 2966 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2967 { 2968 struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL }; 2969 int ret = -EOPNOTSUPP; 2970 bool changed; 2971 u32 wolopts; 2972 2973 ASSERT_RTNL(); 2974 2975 if (phylink_mac_supports_wol(pl)) { 2976 wolopts = wol->wolopts; 2977 2978 if (phylink_phy_supports_wol(pl, pl->phydev)) { 2979 ret = phy_ethtool_set_wol(pl->phydev, wol); 2980 if (ret != 0 && ret != -EOPNOTSUPP) 2981 return ret; 2982 2983 phy_ethtool_get_wol(pl->phydev, &w); 2984 2985 /* Any Wake-on-Lan modes which the PHY is handling 2986 * should not be passed on to the MAC. 2987 */ 2988 wolopts &= ~w.wolopts; 2989 } 2990 2991 wolopts &= pl->config->wol_mac_support; 2992 changed = pl->wolopts_mac != wolopts; 2993 if (wolopts & WAKE_MAGICSECURE) 2994 changed |= !!memcmp(wol->sopass, pl->wol_sopass, 2995 sizeof(wol->sopass)); 2996 memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass)); 2997 2998 if (changed) { 2999 ret = pl->mac_ops->mac_wol_set(pl->config, wolopts, 3000 wol->sopass); 3001 if (!ret) 3002 pl->wolopts_mac = wolopts; 3003 } else { 3004 ret = 0; 3005 } 3006 } else { 3007 if (pl->phydev) 3008 ret = phy_ethtool_set_wol(pl->phydev, wol); 3009 } 3010 3011 return ret; 3012 } 3013 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 3014 3015 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 3016 const unsigned long *link_modes) 3017 { 3018 phy_interface_t interface; 3019 3020 interface = sfp_select_interface(pl->sfp_bus, link_modes); 3021 if (interface == PHY_INTERFACE_MODE_NA) { 3022 phylink_err(pl, 3023 "selection of interface failed, advertisement %*pb\n", 3024 __ETHTOOL_LINK_MODE_MASK_NBITS, 3025 link_modes); 3026 return interface; 3027 } 3028 3029 if (!test_bit(interface, pl->config->supported_interfaces)) { 3030 phylink_err(pl, 3031 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 3032 phy_modes(interface), interface, 3033 (int)PHY_INTERFACE_MODE_MAX, 3034 pl->config->supported_interfaces); 3035 return PHY_INTERFACE_MODE_NA; 3036 } 3037 3038 return interface; 3039 } 3040 3041 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 3042 u32 speed) 3043 { 3044 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 3045 phy_interface_t interface; 3046 u32 max_speed; 3047 int i; 3048 3049 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 3050 interface = phylink_sfp_interface_preference[i]; 3051 if (!test_bit(interface, pl->sfp_interfaces)) 3052 continue; 3053 3054 max_speed = phylink_interface_max_speed(interface); 3055 3056 /* The logic here is: if speed == max_speed, then we've found 3057 * the best interface. Otherwise we find the interface that 3058 * can just support the requested speed. 3059 */ 3060 if (max_speed >= speed) 3061 best_interface = interface; 3062 3063 if (max_speed <= speed) 3064 break; 3065 } 3066 3067 if (best_interface == PHY_INTERFACE_MODE_NA) 3068 phylink_err(pl, "selection of interface failed, speed %u\n", 3069 speed); 3070 3071 return best_interface; 3072 } 3073 3074 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 3075 { 3076 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 3077 3078 linkmode_zero(mask); 3079 phylink_set_port_modes(mask); 3080 3081 linkmode_and(dst, dst, mask); 3082 linkmode_or(dst, dst, b); 3083 } 3084 3085 static void phylink_get_ksettings(const struct phylink_link_state *state, 3086 struct ethtool_link_ksettings *kset) 3087 { 3088 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 3089 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 3090 if (kset->base.rate_matching == RATE_MATCH_NONE) { 3091 kset->base.speed = state->speed; 3092 kset->base.duplex = state->duplex; 3093 } 3094 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3095 state->advertising) ? 3096 AUTONEG_ENABLE : AUTONEG_DISABLE; 3097 } 3098 3099 /** 3100 * phylink_ethtool_ksettings_get() - get the current link settings 3101 * @pl: a pointer to a &struct phylink returned from phylink_create() 3102 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 3103 * 3104 * Read the current link settings for the phylink instance specified by @pl. 3105 * This will be the link settings read from the MAC, PHY or fixed link 3106 * settings depending on the current negotiation mode. 3107 */ 3108 int phylink_ethtool_ksettings_get(struct phylink *pl, 3109 struct ethtool_link_ksettings *kset) 3110 { 3111 struct phylink_link_state link_state; 3112 3113 ASSERT_RTNL(); 3114 3115 if (pl->phydev) 3116 phy_ethtool_ksettings_get(pl->phydev, kset); 3117 else 3118 kset->base.port = pl->link_port; 3119 3120 linkmode_copy(kset->link_modes.supported, pl->supported); 3121 3122 switch (pl->act_link_an_mode) { 3123 case MLO_AN_FIXED: 3124 /* We are using fixed settings. Report these as the 3125 * current link settings - and note that these also 3126 * represent the supported speeds/duplex/pause modes. 3127 */ 3128 phylink_get_fixed_state(pl, &link_state); 3129 phylink_get_ksettings(&link_state, kset); 3130 break; 3131 3132 case MLO_AN_INBAND: 3133 /* If there is a phy attached, then use the reported 3134 * settings from the phy with no modification. 3135 */ 3136 if (pl->phydev) 3137 break; 3138 3139 phylink_mac_pcs_get_state(pl, &link_state); 3140 3141 /* The MAC is reporting the link results from its own PCS 3142 * layer via in-band status. Report these as the current 3143 * link settings. 3144 */ 3145 phylink_get_ksettings(&link_state, kset); 3146 break; 3147 } 3148 3149 return 0; 3150 } 3151 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 3152 3153 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 3154 phy_interface_t interface, 3155 unsigned long *adv) 3156 { 3157 unsigned int inband = phylink_inband_caps(pl, interface); 3158 unsigned int mask; 3159 3160 /* If the PCS doesn't implement inband support, be permissive. */ 3161 if (!inband) 3162 return true; 3163 3164 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 3165 mask = LINK_INBAND_ENABLE; 3166 else 3167 mask = LINK_INBAND_DISABLE; 3168 3169 /* Check whether the PCS implements the required mode */ 3170 return !!(inband & mask); 3171 } 3172 3173 /** 3174 * phylink_ethtool_ksettings_set() - set the link settings 3175 * @pl: a pointer to a &struct phylink returned from phylink_create() 3176 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 3177 */ 3178 int phylink_ethtool_ksettings_set(struct phylink *pl, 3179 const struct ethtool_link_ksettings *kset) 3180 { 3181 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3182 const struct link_capabilities *c; 3183 struct phylink_link_state config; 3184 3185 ASSERT_RTNL(); 3186 3187 if (pl->phydev) { 3188 struct ethtool_link_ksettings phy_kset = *kset; 3189 3190 linkmode_and(phy_kset.link_modes.advertising, 3191 phy_kset.link_modes.advertising, 3192 pl->supported); 3193 3194 /* We can rely on phylib for this update; we also do not need 3195 * to update the pl->link_config settings: 3196 * - the configuration returned via ksettings_get() will come 3197 * from phylib whenever a PHY is present. 3198 * - link_config.interface will be updated by the PHY calling 3199 * back via phylink_phy_change() and a subsequent resolve. 3200 * - initial link configuration for PHY mode comes from the 3201 * last phy state updated via phylink_phy_change(). 3202 * - other configuration changes (e.g. pause modes) are 3203 * performed directly via phylib. 3204 * - if in in-band mode with a PHY, the link configuration 3205 * is passed on the link from the PHY, and all of 3206 * link_config.{speed,duplex,an_enabled,pause} are not used. 3207 * - the only possible use would be link_config.advertising 3208 * pause modes when in 1000base-X mode with a PHY, but in 3209 * the presence of a PHY, this should not be changed as that 3210 * should be determined from the media side advertisement. 3211 */ 3212 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 3213 } 3214 3215 config = pl->link_config; 3216 /* Mask out unsupported advertisements */ 3217 linkmode_and(config.advertising, kset->link_modes.advertising, 3218 pl->supported); 3219 3220 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 3221 switch (kset->base.autoneg) { 3222 case AUTONEG_DISABLE: 3223 /* Autonegotiation disabled, select a suitable speed and 3224 * duplex. 3225 */ 3226 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 3227 pl->supported, false); 3228 if (!c) 3229 return -EINVAL; 3230 3231 /* If we have a fixed link, refuse to change link parameters. 3232 * If the link parameters match, accept them but do nothing. 3233 */ 3234 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3235 if (c->speed != pl->link_config.speed || 3236 c->duplex != pl->link_config.duplex) 3237 return -EINVAL; 3238 return 0; 3239 } 3240 3241 config.speed = c->speed; 3242 config.duplex = c->duplex; 3243 break; 3244 3245 case AUTONEG_ENABLE: 3246 /* If we have a fixed link, allow autonegotiation (since that 3247 * is our default case) but do not allow the advertisement to 3248 * be changed. If the advertisement matches, simply return. 3249 */ 3250 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3251 if (!linkmode_equal(config.advertising, 3252 pl->link_config.advertising)) 3253 return -EINVAL; 3254 return 0; 3255 } 3256 3257 config.speed = SPEED_UNKNOWN; 3258 config.duplex = DUPLEX_UNKNOWN; 3259 break; 3260 3261 default: 3262 return -EINVAL; 3263 } 3264 3265 /* We have ruled out the case with a PHY attached, and the 3266 * fixed-link cases. All that is left are in-band links. 3267 */ 3268 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 3269 kset->base.autoneg == AUTONEG_ENABLE); 3270 3271 /* If this link is with an SFP, ensure that changes to advertised modes 3272 * also cause the associated interface to be selected such that the 3273 * link can be configured correctly. 3274 */ 3275 if (pl->sfp_bus) { 3276 if (kset->base.autoneg == AUTONEG_ENABLE) 3277 config.interface = 3278 phylink_sfp_select_interface(pl, 3279 config.advertising); 3280 else 3281 config.interface = 3282 phylink_sfp_select_interface_speed(pl, 3283 config.speed); 3284 if (config.interface == PHY_INTERFACE_MODE_NA) 3285 return -EINVAL; 3286 3287 /* Revalidate with the selected interface */ 3288 linkmode_copy(support, pl->supported); 3289 if (phylink_validate(pl, support, &config)) { 3290 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3291 phylink_an_mode_str(pl->req_link_an_mode), 3292 phy_modes(config.interface), 3293 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3294 return -EINVAL; 3295 } 3296 } else { 3297 /* Validate without changing the current supported mask. */ 3298 linkmode_copy(support, pl->supported); 3299 if (phylink_validate(pl, support, &config)) 3300 return -EINVAL; 3301 } 3302 3303 /* If autonegotiation is enabled, we must have an advertisement */ 3304 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3305 config.advertising) && 3306 phylink_is_empty_linkmode(config.advertising)) 3307 return -EINVAL; 3308 3309 /* Validate the autonegotiation state. We don't have a PHY in this 3310 * situation, so the PCS is the media-facing entity. 3311 */ 3312 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3313 config.advertising)) 3314 return -EINVAL; 3315 3316 mutex_lock(&pl->state_mutex); 3317 pl->link_config.speed = config.speed; 3318 pl->link_config.duplex = config.duplex; 3319 3320 if (pl->link_config.interface != config.interface) { 3321 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3322 /* We need to force the link down, then change the interface */ 3323 if (pl->old_link_state) { 3324 phylink_link_down(pl); 3325 pl->old_link_state = false; 3326 } 3327 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3328 &pl->phylink_disable_state)) 3329 phylink_major_config(pl, false, &config); 3330 pl->link_config.interface = config.interface; 3331 linkmode_copy(pl->link_config.advertising, config.advertising); 3332 } else if (!linkmode_equal(pl->link_config.advertising, 3333 config.advertising)) { 3334 linkmode_copy(pl->link_config.advertising, config.advertising); 3335 phylink_change_inband_advert(pl); 3336 } 3337 mutex_unlock(&pl->state_mutex); 3338 3339 return 0; 3340 } 3341 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3342 3343 /** 3344 * phylink_ethtool_nway_reset() - restart negotiation 3345 * @pl: a pointer to a &struct phylink returned from phylink_create() 3346 * 3347 * Restart negotiation for the phylink instance specified by @pl. This will 3348 * cause any attached phy to restart negotiation with the link partner, and 3349 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3350 * negotiation. 3351 * 3352 * Returns zero on success, or negative error code. 3353 */ 3354 int phylink_ethtool_nway_reset(struct phylink *pl) 3355 { 3356 int ret = 0; 3357 3358 ASSERT_RTNL(); 3359 3360 if (pl->phydev) 3361 ret = phy_restart_aneg(pl->phydev); 3362 phylink_pcs_an_restart(pl); 3363 3364 return ret; 3365 } 3366 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3367 3368 /** 3369 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3370 * @pl: a pointer to a &struct phylink returned from phylink_create() 3371 * @pause: a pointer to a &struct ethtool_pauseparam 3372 */ 3373 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3374 struct ethtool_pauseparam *pause) 3375 { 3376 ASSERT_RTNL(); 3377 3378 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3379 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3380 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3381 } 3382 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3383 3384 /** 3385 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3386 * @pl: a pointer to a &struct phylink returned from phylink_create() 3387 * @pause: a pointer to a &struct ethtool_pauseparam 3388 */ 3389 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3390 struct ethtool_pauseparam *pause) 3391 { 3392 int pause_state; 3393 3394 ASSERT_RTNL(); 3395 3396 if (pl->req_link_an_mode == MLO_AN_FIXED) 3397 return -EOPNOTSUPP; 3398 3399 if (!phylink_test(pl->supported, Pause) && 3400 !phylink_test(pl->supported, Asym_Pause)) 3401 return -EOPNOTSUPP; 3402 3403 if (!phylink_test(pl->supported, Asym_Pause) && 3404 pause->rx_pause != pause->tx_pause) 3405 return -EINVAL; 3406 3407 pause_state = 0; 3408 if (pause->autoneg) 3409 pause_state |= MLO_PAUSE_AN; 3410 if (pause->rx_pause) 3411 pause_state |= MLO_PAUSE_RX; 3412 if (pause->tx_pause) 3413 pause_state |= MLO_PAUSE_TX; 3414 3415 phylink_update_pause_state(pl, pause_state); 3416 3417 return 0; 3418 } 3419 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3420 3421 /** 3422 * phylink_get_eee_err() - read the energy efficient ethernet error 3423 * counter 3424 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3425 * 3426 * Read the Energy Efficient Ethernet error counter from the PHY associated 3427 * with the phylink instance specified by @pl. 3428 * 3429 * Returns positive error counter value, or negative error code. 3430 */ 3431 int phylink_get_eee_err(struct phylink *pl) 3432 { 3433 int ret = 0; 3434 3435 ASSERT_RTNL(); 3436 3437 if (pl->phydev) 3438 ret = phy_get_eee_err(pl->phydev); 3439 3440 return ret; 3441 } 3442 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3443 3444 /** 3445 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3446 * @pl: a pointer to a &struct phylink returned from phylink_create() 3447 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3448 */ 3449 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3450 { 3451 int ret = -EOPNOTSUPP; 3452 3453 ASSERT_RTNL(); 3454 3455 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3456 return ret; 3457 3458 if (pl->phydev) { 3459 ret = phy_ethtool_get_eee(pl->phydev, eee); 3460 /* Restrict supported linkmode mask */ 3461 if (ret == 0 && pl->mac_supports_eee_ops) 3462 linkmode_and(eee->supported, eee->supported, 3463 pl->supported_lpi); 3464 } 3465 3466 return ret; 3467 } 3468 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3469 3470 /** 3471 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3472 * @pl: a pointer to a &struct phylink returned from phylink_create() 3473 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3474 */ 3475 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3476 { 3477 bool mac_eee = pl->mac_supports_eee; 3478 int ret = -EOPNOTSUPP; 3479 3480 ASSERT_RTNL(); 3481 3482 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3483 mac_eee ? "supports" : "does not support", 3484 eee->eee_enabled ? ", enabled" : "", 3485 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3486 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3487 3488 if (pl->mac_supports_eee_ops && !mac_eee) 3489 return ret; 3490 3491 if (pl->phydev) { 3492 /* Restrict advertisement mask */ 3493 if (pl->mac_supports_eee_ops) 3494 linkmode_and(eee->advertised, eee->advertised, 3495 pl->supported_lpi); 3496 ret = phy_ethtool_set_eee(pl->phydev, eee); 3497 if (ret == 0) 3498 eee_to_eeecfg(&pl->eee_cfg, eee); 3499 } 3500 3501 return ret; 3502 } 3503 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3504 3505 /* This emulates MII registers for a fixed-mode phy operating as per the 3506 * passed in state. "aneg" defines if we report negotiation is possible. 3507 * 3508 * FIXME: should deal with negotiation state too. 3509 */ 3510 static int phylink_mii_emul_read(unsigned int reg, 3511 struct phylink_link_state *state) 3512 { 3513 struct fixed_phy_status fs; 3514 unsigned long *lpa = state->lp_advertising; 3515 int val; 3516 3517 fs.link = state->link; 3518 fs.speed = state->speed; 3519 fs.duplex = state->duplex; 3520 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3521 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3522 3523 val = swphy_read_reg(reg, &fs); 3524 if (reg == MII_BMSR) { 3525 if (!state->an_complete) 3526 val &= ~BMSR_ANEGCOMPLETE; 3527 } 3528 return val; 3529 } 3530 3531 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3532 unsigned int reg) 3533 { 3534 struct phy_device *phydev = pl->phydev; 3535 int prtad, devad; 3536 3537 if (mdio_phy_id_is_c45(phy_id)) { 3538 prtad = mdio_phy_id_prtad(phy_id); 3539 devad = mdio_phy_id_devad(phy_id); 3540 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3541 reg); 3542 } 3543 3544 if (phydev->is_c45) { 3545 switch (reg) { 3546 case MII_BMCR: 3547 case MII_BMSR: 3548 case MII_PHYSID1: 3549 case MII_PHYSID2: 3550 devad = __ffs(phydev->c45_ids.mmds_present); 3551 break; 3552 case MII_ADVERTISE: 3553 case MII_LPA: 3554 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3555 return -EINVAL; 3556 devad = MDIO_MMD_AN; 3557 if (reg == MII_ADVERTISE) 3558 reg = MDIO_AN_ADVERTISE; 3559 else 3560 reg = MDIO_AN_LPA; 3561 break; 3562 default: 3563 return -EINVAL; 3564 } 3565 prtad = phy_id; 3566 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3567 reg); 3568 } 3569 3570 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3571 } 3572 3573 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3574 unsigned int reg, unsigned int val) 3575 { 3576 struct phy_device *phydev = pl->phydev; 3577 int prtad, devad; 3578 3579 if (mdio_phy_id_is_c45(phy_id)) { 3580 prtad = mdio_phy_id_prtad(phy_id); 3581 devad = mdio_phy_id_devad(phy_id); 3582 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3583 reg, val); 3584 } 3585 3586 if (phydev->is_c45) { 3587 switch (reg) { 3588 case MII_BMCR: 3589 case MII_BMSR: 3590 case MII_PHYSID1: 3591 case MII_PHYSID2: 3592 devad = __ffs(phydev->c45_ids.mmds_present); 3593 break; 3594 case MII_ADVERTISE: 3595 case MII_LPA: 3596 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3597 return -EINVAL; 3598 devad = MDIO_MMD_AN; 3599 if (reg == MII_ADVERTISE) 3600 reg = MDIO_AN_ADVERTISE; 3601 else 3602 reg = MDIO_AN_LPA; 3603 break; 3604 default: 3605 return -EINVAL; 3606 } 3607 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3608 reg, val); 3609 } 3610 3611 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3612 } 3613 3614 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3615 unsigned int reg) 3616 { 3617 struct phylink_link_state state; 3618 int val = 0xffff; 3619 3620 switch (pl->act_link_an_mode) { 3621 case MLO_AN_FIXED: 3622 if (phy_id == 0) { 3623 phylink_get_fixed_state(pl, &state); 3624 val = phylink_mii_emul_read(reg, &state); 3625 } 3626 break; 3627 3628 case MLO_AN_PHY: 3629 return -EOPNOTSUPP; 3630 3631 case MLO_AN_INBAND: 3632 if (phy_id == 0) { 3633 phylink_mac_pcs_get_state(pl, &state); 3634 val = phylink_mii_emul_read(reg, &state); 3635 } 3636 break; 3637 } 3638 3639 return val & 0xffff; 3640 } 3641 3642 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3643 unsigned int reg, unsigned int val) 3644 { 3645 switch (pl->act_link_an_mode) { 3646 case MLO_AN_FIXED: 3647 break; 3648 3649 case MLO_AN_PHY: 3650 return -EOPNOTSUPP; 3651 3652 case MLO_AN_INBAND: 3653 break; 3654 } 3655 3656 return 0; 3657 } 3658 3659 /** 3660 * phylink_mii_ioctl() - generic mii ioctl interface 3661 * @pl: a pointer to a &struct phylink returned from phylink_create() 3662 * @ifr: a pointer to a &struct ifreq for socket ioctls 3663 * @cmd: ioctl cmd to execute 3664 * 3665 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3666 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3667 * 3668 * Returns: zero on success or negative error code. 3669 * 3670 * %SIOCGMIIPHY: 3671 * read register from the current PHY. 3672 * %SIOCGMIIREG: 3673 * read register from the specified PHY. 3674 * %SIOCSMIIREG: 3675 * set a register on the specified PHY. 3676 */ 3677 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3678 { 3679 struct mii_ioctl_data *mii = if_mii(ifr); 3680 int ret; 3681 3682 ASSERT_RTNL(); 3683 3684 if (pl->phydev) { 3685 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3686 switch (cmd) { 3687 case SIOCGMIIPHY: 3688 mii->phy_id = pl->phydev->mdio.addr; 3689 fallthrough; 3690 3691 case SIOCGMIIREG: 3692 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3693 if (ret >= 0) { 3694 mii->val_out = ret; 3695 ret = 0; 3696 } 3697 break; 3698 3699 case SIOCSMIIREG: 3700 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3701 mii->val_in); 3702 break; 3703 3704 default: 3705 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3706 break; 3707 } 3708 } else { 3709 switch (cmd) { 3710 case SIOCGMIIPHY: 3711 mii->phy_id = 0; 3712 fallthrough; 3713 3714 case SIOCGMIIREG: 3715 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3716 if (ret >= 0) { 3717 mii->val_out = ret; 3718 ret = 0; 3719 } 3720 break; 3721 3722 case SIOCSMIIREG: 3723 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3724 mii->val_in); 3725 break; 3726 3727 default: 3728 ret = -EOPNOTSUPP; 3729 break; 3730 } 3731 } 3732 3733 return ret; 3734 } 3735 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3736 3737 /** 3738 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3739 * link partners 3740 * @pl: a pointer to a &struct phylink returned from phylink_create() 3741 * @sync: perform action synchronously 3742 * 3743 * If we have a PHY that is not part of a SFP module, then set the speed 3744 * as described in the phy_speed_down() function. Please see this function 3745 * for a description of the @sync parameter. 3746 * 3747 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3748 */ 3749 int phylink_speed_down(struct phylink *pl, bool sync) 3750 { 3751 int ret = 0; 3752 3753 ASSERT_RTNL(); 3754 3755 if (!pl->sfp_bus && pl->phydev) 3756 ret = phy_speed_down(pl->phydev, sync); 3757 3758 return ret; 3759 } 3760 EXPORT_SYMBOL_GPL(phylink_speed_down); 3761 3762 /** 3763 * phylink_speed_up() - restore the advertised speeds prior to the call to 3764 * phylink_speed_down() 3765 * @pl: a pointer to a &struct phylink returned from phylink_create() 3766 * 3767 * If we have a PHY that is not part of a SFP module, then restore the 3768 * PHY speeds as per phy_speed_up(). 3769 * 3770 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3771 */ 3772 int phylink_speed_up(struct phylink *pl) 3773 { 3774 int ret = 0; 3775 3776 ASSERT_RTNL(); 3777 3778 if (!pl->sfp_bus && pl->phydev) 3779 ret = phy_speed_up(pl->phydev); 3780 3781 return ret; 3782 } 3783 EXPORT_SYMBOL_GPL(phylink_speed_up); 3784 3785 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3786 { 3787 struct phylink *pl = upstream; 3788 3789 pl->netdev->sfp_bus = bus; 3790 } 3791 3792 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3793 { 3794 struct phylink *pl = upstream; 3795 3796 pl->netdev->sfp_bus = NULL; 3797 } 3798 3799 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3800 const unsigned long *intf) 3801 { 3802 phy_interface_t interface; 3803 size_t i; 3804 3805 interface = PHY_INTERFACE_MODE_NA; 3806 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3807 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3808 interface = phylink_sfp_interface_preference[i]; 3809 break; 3810 } 3811 3812 return interface; 3813 } 3814 3815 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3816 struct phylink_link_state *state, 3817 bool changed) 3818 { 3819 u8 mode = MLO_AN_INBAND; 3820 3821 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3822 phylink_an_mode_str(mode), phy_modes(state->interface), 3823 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3824 3825 if (!linkmode_equal(pl->supported, supported)) { 3826 linkmode_copy(pl->supported, supported); 3827 changed = true; 3828 } 3829 3830 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3831 linkmode_copy(pl->link_config.advertising, state->advertising); 3832 changed = true; 3833 } 3834 3835 if (pl->req_link_an_mode != mode || 3836 pl->link_config.interface != state->interface) { 3837 pl->req_link_an_mode = mode; 3838 pl->link_config.interface = state->interface; 3839 3840 changed = true; 3841 3842 phylink_info(pl, "switched to %s/%s link mode\n", 3843 phylink_an_mode_str(mode), 3844 phy_modes(state->interface)); 3845 } 3846 3847 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3848 &pl->phylink_disable_state)) 3849 phylink_mac_initial_config(pl, false); 3850 } 3851 3852 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3853 { 3854 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3855 struct phylink_link_state config; 3856 int ret; 3857 3858 /* We're not using pl->sfp_interfaces, so clear it. */ 3859 phy_interface_zero(pl->sfp_interfaces); 3860 linkmode_copy(support, phy->supported); 3861 3862 memset(&config, 0, sizeof(config)); 3863 linkmode_copy(config.advertising, phy->advertising); 3864 config.interface = PHY_INTERFACE_MODE_NA; 3865 config.speed = SPEED_UNKNOWN; 3866 config.duplex = DUPLEX_UNKNOWN; 3867 config.pause = MLO_PAUSE_AN; 3868 3869 /* Ignore errors if we're expecting a PHY to attach later */ 3870 ret = phylink_validate(pl, support, &config); 3871 if (ret) { 3872 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3873 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3874 ERR_PTR(ret)); 3875 return ret; 3876 } 3877 3878 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3879 if (config.interface == PHY_INTERFACE_MODE_NA) 3880 return -EINVAL; 3881 3882 /* Attach the PHY so that the PHY is present when we do the major 3883 * configuration step. 3884 */ 3885 ret = phylink_attach_phy(pl, phy, config.interface); 3886 if (ret < 0) 3887 return ret; 3888 3889 /* This will validate the configuration for us. */ 3890 ret = phylink_bringup_phy(pl, phy, config.interface); 3891 if (ret < 0) { 3892 phy_detach(phy); 3893 return ret; 3894 } 3895 3896 pl->link_port = pl->sfp_port; 3897 3898 phylink_sfp_set_config(pl, support, &config, true); 3899 3900 return 0; 3901 } 3902 3903 static int phylink_sfp_config_optical(struct phylink *pl) 3904 { 3905 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3906 struct phylink_link_state config; 3907 enum inband_type inband_type; 3908 phy_interface_t interface; 3909 int ret; 3910 3911 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3912 (int)PHY_INTERFACE_MODE_MAX, 3913 pl->config->supported_interfaces, 3914 (int)PHY_INTERFACE_MODE_MAX, 3915 pl->sfp_interfaces); 3916 3917 /* Find the union of the supported interfaces by the PCS/MAC and 3918 * the SFP module. 3919 */ 3920 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3921 pl->sfp_interfaces); 3922 if (phy_interface_empty(pl->sfp_interfaces)) { 3923 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3924 return -EINVAL; 3925 } 3926 3927 memset(&config, 0, sizeof(config)); 3928 linkmode_copy(support, pl->sfp_support); 3929 linkmode_copy(config.advertising, pl->sfp_support); 3930 config.speed = SPEED_UNKNOWN; 3931 config.duplex = DUPLEX_UNKNOWN; 3932 config.pause = MLO_PAUSE_AN; 3933 3934 /* For all the interfaces that are supported, reduce the sfp_support 3935 * mask to only those link modes that can be supported. 3936 */ 3937 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3938 pl->sfp_interfaces); 3939 if (ret) { 3940 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3941 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3942 return ret; 3943 } 3944 3945 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3946 if (interface == PHY_INTERFACE_MODE_NA) { 3947 phylink_err(pl, "failed to select SFP interface\n"); 3948 return -EINVAL; 3949 } 3950 3951 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3952 phy_modes(interface)); 3953 3954 inband_type = phylink_get_inband_type(interface); 3955 if (inband_type == INBAND_NONE) { 3956 /* If this is the sole interface, and there is no inband 3957 * support, clear the advertising mask and Autoneg bit in 3958 * the support mask. Otherwise, just clear the Autoneg bit 3959 * in the advertising mask. 3960 */ 3961 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3962 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3963 pl->sfp_support); 3964 linkmode_zero(config.advertising); 3965 } else { 3966 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3967 config.advertising); 3968 } 3969 } 3970 3971 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3972 config.advertising)) { 3973 phylink_err(pl, "autoneg setting not compatible with PCS"); 3974 return -EINVAL; 3975 } 3976 3977 config.interface = interface; 3978 3979 /* Ignore errors if we're expecting a PHY to attach later */ 3980 ret = phylink_validate(pl, support, &config); 3981 if (ret) { 3982 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3983 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3984 ERR_PTR(ret)); 3985 return ret; 3986 } 3987 3988 pl->link_port = pl->sfp_port; 3989 3990 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3991 3992 return 0; 3993 } 3994 3995 static int phylink_sfp_module_insert(void *upstream, 3996 const struct sfp_eeprom_id *id) 3997 { 3998 const struct sfp_module_caps *caps; 3999 struct phylink *pl = upstream; 4000 4001 ASSERT_RTNL(); 4002 4003 caps = sfp_get_module_caps(pl->sfp_bus); 4004 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 4005 linkmode_copy(pl->sfp_support, caps->link_modes); 4006 pl->sfp_may_have_phy = caps->may_have_phy; 4007 pl->sfp_port = caps->port; 4008 4009 /* If this module may have a PHY connecting later, defer until later */ 4010 if (pl->sfp_may_have_phy) 4011 return 0; 4012 4013 return phylink_sfp_config_optical(pl); 4014 } 4015 4016 static void phylink_sfp_module_remove(void *upstream) 4017 { 4018 struct phylink *pl = upstream; 4019 4020 phy_interface_zero(pl->sfp_interfaces); 4021 } 4022 4023 static int phylink_add_sfp_mod_port(struct phylink *pl) 4024 { 4025 DECLARE_PHY_INTERFACE_MASK(interfaces); 4026 const struct sfp_module_caps *caps; 4027 struct phy_port *port; 4028 int ret = 0; 4029 4030 if (!pl->sfp_cage_port) 4031 return 0; 4032 4033 /* Create mod port */ 4034 port = phy_port_alloc(); 4035 if (!port) 4036 return -ENOMEM; 4037 4038 port->active = true; 4039 4040 caps = sfp_get_module_caps(pl->sfp_bus); 4041 4042 phy_interface_and(interfaces, pl->sfp_cage_port->interfaces, 4043 caps->interfaces); 4044 phy_caps_linkmode_filter_ifaces(port->supported, caps->link_modes, 4045 interfaces); 4046 4047 if (pl->netdev) { 4048 ret = phy_link_topo_add_port(pl->netdev, port); 4049 if (ret) { 4050 phy_port_destroy(port); 4051 return ret; 4052 } 4053 } 4054 4055 port->upstream_port = pl->sfp_cage_port; 4056 4057 pl->mod_port = port; 4058 4059 return 0; 4060 } 4061 4062 static void phylink_del_sfp_mod_port(struct phylink *pl) 4063 { 4064 if (!pl->mod_port) 4065 return; 4066 4067 if (pl->netdev) 4068 phy_link_topo_del_port(pl->netdev, pl->mod_port); 4069 4070 phy_port_destroy(pl->mod_port); 4071 pl->mod_port = NULL; 4072 } 4073 4074 static int phylink_sfp_module_start(void *upstream) 4075 { 4076 struct phylink *pl = upstream; 4077 int ret; 4078 4079 /* If this SFP module has a PHY, start the PHY now. */ 4080 if (pl->phydev) { 4081 phy_start(pl->phydev); 4082 return 0; 4083 } else { 4084 ret = phylink_add_sfp_mod_port(pl); 4085 if (ret) 4086 return ret; 4087 } 4088 4089 /* If the module may have a PHY but we didn't detect one we 4090 * need to configure the MAC here. 4091 */ 4092 if (!pl->sfp_may_have_phy) 4093 return 0; 4094 4095 ret = phylink_sfp_config_optical(pl); 4096 if (ret) 4097 goto del_mod_port; 4098 4099 return 0; 4100 4101 del_mod_port: 4102 phylink_del_sfp_mod_port(pl); 4103 4104 return ret; 4105 } 4106 4107 static void phylink_sfp_module_stop(void *upstream) 4108 { 4109 struct phylink *pl = upstream; 4110 4111 /* If this SFP module has a PHY, stop it. */ 4112 if (pl->phydev) 4113 phy_stop(pl->phydev); 4114 else 4115 phylink_del_sfp_mod_port(pl); 4116 } 4117 4118 static void phylink_sfp_link_down(void *upstream) 4119 { 4120 struct phylink *pl = upstream; 4121 4122 ASSERT_RTNL(); 4123 4124 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 4125 } 4126 4127 static void phylink_sfp_link_up(void *upstream) 4128 { 4129 struct phylink *pl = upstream; 4130 4131 ASSERT_RTNL(); 4132 4133 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 4134 } 4135 4136 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 4137 { 4138 struct phylink *pl = upstream; 4139 4140 if (!phy->drv) { 4141 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 4142 phydev_name(phy), (unsigned long)phy->phy_id); 4143 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 4144 return -EINVAL; 4145 } 4146 4147 /* 4148 * This is the new way of dealing with flow control for PHYs, 4149 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 4150 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 4151 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 4152 * capabilities and must NOT change the phy's pause settings directly. 4153 */ 4154 phy_support_asym_pause(phy); 4155 4156 /* Set the PHY's host supported interfaces */ 4157 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 4158 pl->config->supported_interfaces); 4159 4160 phy_set_upstream_port(phy, pl->sfp_cage_port); 4161 4162 /* Do the initial configuration */ 4163 return phylink_sfp_config_phy(pl, phy); 4164 } 4165 4166 static void phylink_sfp_disconnect_phy(void *upstream, 4167 struct phy_device *phydev) 4168 { 4169 phylink_disconnect_phy(upstream); 4170 phy_set_upstream_port(phydev, NULL); 4171 } 4172 4173 static const struct sfp_upstream_ops sfp_phylink_ops = { 4174 .attach = phylink_sfp_attach, 4175 .detach = phylink_sfp_detach, 4176 .module_insert = phylink_sfp_module_insert, 4177 .module_remove = phylink_sfp_module_remove, 4178 .module_start = phylink_sfp_module_start, 4179 .module_stop = phylink_sfp_module_stop, 4180 .link_up = phylink_sfp_link_up, 4181 .link_down = phylink_sfp_link_down, 4182 .connect_phy = phylink_sfp_connect_phy, 4183 .disconnect_phy = phylink_sfp_disconnect_phy, 4184 }; 4185 4186 /* Helpers for MAC drivers */ 4187 4188 static struct { 4189 int bit; 4190 int speed; 4191 } phylink_c73_priority_resolution[] = { 4192 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 4193 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 4194 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 4195 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 4196 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 4197 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 4198 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 4199 /* 5GBASE-KR not supported */ 4200 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 4201 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 4202 }; 4203 4204 void phylink_resolve_c73(struct phylink_link_state *state) 4205 { 4206 int i; 4207 4208 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 4209 int bit = phylink_c73_priority_resolution[i].bit; 4210 if (linkmode_test_bit(bit, state->advertising) && 4211 linkmode_test_bit(bit, state->lp_advertising)) 4212 break; 4213 } 4214 4215 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 4216 state->speed = phylink_c73_priority_resolution[i].speed; 4217 state->duplex = DUPLEX_FULL; 4218 } else { 4219 /* negotiation failure */ 4220 state->link = false; 4221 } 4222 4223 phylink_resolve_an_pause(state); 4224 } 4225 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 4226 4227 static void phylink_decode_c37_word(struct phylink_link_state *state, 4228 uint16_t config_reg, int speed) 4229 { 4230 int fd_bit; 4231 4232 if (speed == SPEED_2500) 4233 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 4234 else 4235 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 4236 4237 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 4238 4239 if (linkmode_test_bit(fd_bit, state->advertising) && 4240 linkmode_test_bit(fd_bit, state->lp_advertising)) { 4241 state->speed = speed; 4242 state->duplex = DUPLEX_FULL; 4243 } else { 4244 /* negotiation failure */ 4245 state->link = false; 4246 } 4247 4248 phylink_resolve_an_pause(state); 4249 } 4250 4251 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 4252 uint16_t config_reg) 4253 { 4254 if (!(config_reg & LPA_SGMII_LINK)) { 4255 state->link = false; 4256 return; 4257 } 4258 4259 switch (config_reg & LPA_SGMII_SPD_MASK) { 4260 case LPA_SGMII_10: 4261 state->speed = SPEED_10; 4262 break; 4263 case LPA_SGMII_100: 4264 state->speed = SPEED_100; 4265 break; 4266 case LPA_SGMII_1000: 4267 state->speed = SPEED_1000; 4268 break; 4269 default: 4270 state->link = false; 4271 return; 4272 } 4273 if (config_reg & LPA_SGMII_FULL_DUPLEX) 4274 state->duplex = DUPLEX_FULL; 4275 else 4276 state->duplex = DUPLEX_HALF; 4277 } 4278 4279 /** 4280 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 4281 * @state: a pointer to a struct phylink_link_state. 4282 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 4283 * 4284 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 4285 * code word. Decode the USXGMII code word and populate the corresponding fields 4286 * (speed, duplex) into the phylink_link_state structure. 4287 */ 4288 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 4289 uint16_t lpa) 4290 { 4291 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4292 case MDIO_USXGMII_10: 4293 state->speed = SPEED_10; 4294 break; 4295 case MDIO_USXGMII_100: 4296 state->speed = SPEED_100; 4297 break; 4298 case MDIO_USXGMII_1000: 4299 state->speed = SPEED_1000; 4300 break; 4301 case MDIO_USXGMII_2500: 4302 state->speed = SPEED_2500; 4303 break; 4304 case MDIO_USXGMII_5000: 4305 state->speed = SPEED_5000; 4306 break; 4307 case MDIO_USXGMII_10G: 4308 state->speed = SPEED_10000; 4309 break; 4310 default: 4311 state->link = false; 4312 return; 4313 } 4314 4315 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4316 state->duplex = DUPLEX_FULL; 4317 else 4318 state->duplex = DUPLEX_HALF; 4319 } 4320 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4321 4322 /** 4323 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4324 * @state: a pointer to a struct phylink_link_state. 4325 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4326 * 4327 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4328 * code word. Decode the USGMII code word and populate the corresponding fields 4329 * (speed, duplex) into the phylink_link_state structure. The structure for this 4330 * word is the same as the USXGMII word, except it only supports speeds up to 4331 * 1Gbps. 4332 */ 4333 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4334 uint16_t lpa) 4335 { 4336 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4337 case MDIO_USXGMII_10: 4338 state->speed = SPEED_10; 4339 break; 4340 case MDIO_USXGMII_100: 4341 state->speed = SPEED_100; 4342 break; 4343 case MDIO_USXGMII_1000: 4344 state->speed = SPEED_1000; 4345 break; 4346 default: 4347 state->link = false; 4348 return; 4349 } 4350 4351 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4352 state->duplex = DUPLEX_FULL; 4353 else 4354 state->duplex = DUPLEX_HALF; 4355 } 4356 4357 /** 4358 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4359 * @state: a pointer to a &struct phylink_link_state. 4360 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4361 * @bmsr: The value of the %MII_BMSR register 4362 * @lpa: The value of the %MII_LPA register 4363 * 4364 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4365 * clause 37 negotiation and/or SGMII control. 4366 * 4367 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4368 * the phylink @state structure. This is suitable to be used for implementing 4369 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4370 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4371 */ 4372 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4373 unsigned int neg_mode, u16 bmsr, u16 lpa) 4374 { 4375 state->link = !!(bmsr & BMSR_LSTATUS); 4376 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4377 4378 /* If the link is down, the advertisement data is undefined. */ 4379 if (!state->link) 4380 return; 4381 4382 switch (state->interface) { 4383 case PHY_INTERFACE_MODE_1000BASEX: 4384 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4385 phylink_decode_c37_word(state, lpa, SPEED_1000); 4386 } else { 4387 state->speed = SPEED_1000; 4388 state->duplex = DUPLEX_FULL; 4389 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4390 } 4391 break; 4392 4393 case PHY_INTERFACE_MODE_2500BASEX: 4394 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4395 phylink_decode_c37_word(state, lpa, SPEED_2500); 4396 } else { 4397 state->speed = SPEED_2500; 4398 state->duplex = DUPLEX_FULL; 4399 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4400 } 4401 break; 4402 4403 case PHY_INTERFACE_MODE_SGMII: 4404 case PHY_INTERFACE_MODE_PSGMII: 4405 case PHY_INTERFACE_MODE_QSGMII: 4406 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4407 phylink_decode_sgmii_word(state, lpa); 4408 break; 4409 4410 case PHY_INTERFACE_MODE_QUSGMII: 4411 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4412 phylink_decode_usgmii_word(state, lpa); 4413 break; 4414 4415 default: 4416 state->link = false; 4417 break; 4418 } 4419 } 4420 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4421 4422 /** 4423 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4424 * @pcs: a pointer to a &struct mdio_device. 4425 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4426 * @state: a pointer to a &struct phylink_link_state. 4427 * 4428 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4429 * clause 37 negotiation and/or SGMII control. 4430 * 4431 * Read the MAC PCS state from the MII device configured in @config and 4432 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4433 * the phylink @state structure. This is suitable to be directly plugged 4434 * into the pcs_get_state() member of the struct phylink_pcs_ops 4435 * structure. 4436 */ 4437 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4438 unsigned int neg_mode, 4439 struct phylink_link_state *state) 4440 { 4441 int bmsr, lpa; 4442 4443 bmsr = mdiodev_read(pcs, MII_BMSR); 4444 lpa = mdiodev_read(pcs, MII_LPA); 4445 if (bmsr < 0 || lpa < 0) { 4446 state->link = false; 4447 return; 4448 } 4449 4450 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4451 } 4452 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4453 4454 /** 4455 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4456 * advertisement 4457 * @interface: the PHY interface mode being configured 4458 * @advertising: the ethtool advertisement mask 4459 * 4460 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4461 * clause 37 negotiation and/or SGMII control. 4462 * 4463 * Encode the clause 37 PCS advertisement as specified by @interface and 4464 * @advertising. 4465 * 4466 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4467 */ 4468 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4469 const unsigned long *advertising) 4470 { 4471 u16 adv; 4472 4473 switch (interface) { 4474 case PHY_INTERFACE_MODE_1000BASEX: 4475 case PHY_INTERFACE_MODE_2500BASEX: 4476 adv = ADVERTISE_1000XFULL; 4477 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4478 advertising)) 4479 adv |= ADVERTISE_1000XPAUSE; 4480 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4481 advertising)) 4482 adv |= ADVERTISE_1000XPSE_ASYM; 4483 return adv; 4484 case PHY_INTERFACE_MODE_SGMII: 4485 case PHY_INTERFACE_MODE_PSGMII: 4486 case PHY_INTERFACE_MODE_QSGMII: 4487 return 0x0001; 4488 default: 4489 /* Nothing to do for other modes */ 4490 return -EINVAL; 4491 } 4492 } 4493 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4494 4495 /** 4496 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4497 * @pcs: a pointer to a &struct mdio_device. 4498 * @interface: the PHY interface mode being configured 4499 * @advertising: the ethtool advertisement mask 4500 * @neg_mode: PCS negotiation mode 4501 * 4502 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4503 * parameters for the @mode, @interface and @advertising parameters. 4504 * Returns negative error number on failure, zero if the advertisement 4505 * has not changed, or positive if there is a change. 4506 */ 4507 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4508 phy_interface_t interface, 4509 const unsigned long *advertising, 4510 unsigned int neg_mode) 4511 { 4512 bool changed = 0; 4513 u16 bmcr; 4514 int ret, adv; 4515 4516 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4517 if (adv >= 0) { 4518 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4519 MII_ADVERTISE, 0xffff, adv); 4520 if (ret < 0) 4521 return ret; 4522 changed = ret; 4523 } 4524 4525 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4526 bmcr = BMCR_ANENABLE; 4527 else 4528 bmcr = 0; 4529 4530 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4531 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4532 if (ret < 0) 4533 return ret; 4534 4535 return changed; 4536 } 4537 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4538 4539 /** 4540 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4541 * @pcs: a pointer to a &struct mdio_device. 4542 * 4543 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4544 * clause 37 negotiation. 4545 * 4546 * Restart the clause 37 negotiation with the link partner. This is 4547 * suitable to be directly plugged into the pcs_get_state() member 4548 * of the struct phylink_pcs_ops structure. 4549 */ 4550 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4551 { 4552 int val = mdiodev_read(pcs, MII_BMCR); 4553 4554 if (val >= 0) { 4555 val |= BMCR_ANRESTART; 4556 4557 mdiodev_write(pcs, MII_BMCR, val); 4558 } 4559 } 4560 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4561 4562 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4563 struct phylink_link_state *state) 4564 { 4565 struct mii_bus *bus = pcs->bus; 4566 int addr = pcs->addr; 4567 int stat; 4568 4569 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4570 if (stat < 0) { 4571 state->link = false; 4572 return; 4573 } 4574 4575 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4576 if (!state->link) 4577 return; 4578 4579 switch (state->interface) { 4580 case PHY_INTERFACE_MODE_10GBASER: 4581 state->speed = SPEED_10000; 4582 state->duplex = DUPLEX_FULL; 4583 break; 4584 4585 case PHY_INTERFACE_MODE_25GBASER: 4586 state->speed = SPEED_25000; 4587 state->duplex = DUPLEX_FULL; 4588 break; 4589 4590 default: 4591 break; 4592 } 4593 } 4594 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4595 4596 /** 4597 * phylink_replay_link_begin() - begin replay of link callbacks for driver 4598 * which loses state 4599 * @pl: a pointer to a &struct phylink returned from phylink_create() 4600 * 4601 * Helper for MAC drivers which may perform a destructive reset at runtime. 4602 * Both the own driver's mac_link_down() method is called, as well as the 4603 * pcs_link_down() method of the split PCS (if any). 4604 * 4605 * This is similar to phylink_stop(), except it does not alter the state of 4606 * the phylib PHY (it is assumed that it is not affected by the MAC destructive 4607 * reset). 4608 */ 4609 void phylink_replay_link_begin(struct phylink *pl) 4610 { 4611 ASSERT_RTNL(); 4612 4613 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_REPLAY); 4614 } 4615 EXPORT_SYMBOL_GPL(phylink_replay_link_begin); 4616 4617 /** 4618 * phylink_replay_link_end() - end replay of link callbacks for driver 4619 * which lost state 4620 * @pl: a pointer to a &struct phylink returned from phylink_create() 4621 * 4622 * Helper for MAC drivers which may perform a destructive reset at runtime. 4623 * Both the own driver's mac_config() and mac_link_up() methods, as well as the 4624 * pcs_config() and pcs_link_up() method of the split PCS (if any), are called. 4625 * 4626 * This is similar to phylink_start(), except it does not alter the state of 4627 * the phylib PHY. 4628 * 4629 * One must call this method only within the same rtnl_lock() critical section 4630 * as a previous phylink_replay_link_start(). 4631 */ 4632 void phylink_replay_link_end(struct phylink *pl) 4633 { 4634 ASSERT_RTNL(); 4635 4636 if (WARN(!test_bit(PHYLINK_DISABLE_REPLAY, 4637 &pl->phylink_disable_state), 4638 "phylink_replay_link_end() called without a prior phylink_replay_link_begin()\n")) 4639 return; 4640 4641 pl->force_major_config = true; 4642 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_REPLAY); 4643 flush_work(&pl->resolve); 4644 } 4645 EXPORT_SYMBOL_GPL(phylink_replay_link_end); 4646 4647 static int __init phylink_init(void) 4648 { 4649 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4650 __set_bit(phylink_sfp_interface_preference[i], 4651 phylink_sfp_interfaces); 4652 4653 return 0; 4654 } 4655 4656 module_init(phylink_init); 4657 4658 MODULE_LICENSE("GPL v2"); 4659 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4660