1 // SPDX-License-Identifier: GPL-2.0+
2 /* Xilinx GMII2RGMII Converter driver
3 *
4 * Copyright (C) 2016 Xilinx, Inc.
5 * Copyright (C) 2016 Andrew Lunn <andrew@lunn.ch>
6 *
7 * Author: Andrew Lunn <andrew@lunn.ch>
8 * Author: Kedareswara rao Appana <appanad@xilinx.com>
9 *
10 * Description:
11 * This driver is developed for Xilinx GMII2RGMII Converter
12 */
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/mii.h>
16 #include <linux/mdio.h>
17 #include <linux/phy.h>
18 #include <linux/clk.h>
19 #include <linux/of_mdio.h>
20
21 #define XILINX_GMII2RGMII_REG 0x10
22 #define XILINX_GMII2RGMII_SPEED_MASK (BMCR_SPEED1000 | BMCR_SPEED100)
23
24 struct gmii2rgmii {
25 struct phy_device *phy_dev;
26 const struct phy_driver *phy_drv;
27 struct phy_driver conv_phy_drv;
28 struct mdio_device *mdio;
29 };
30
xgmiitorgmii_configure(struct gmii2rgmii * priv,int speed)31 static void xgmiitorgmii_configure(struct gmii2rgmii *priv, int speed)
32 {
33 struct mii_bus *bus = priv->mdio->bus;
34 int addr = priv->mdio->addr;
35 u16 val;
36
37 val = mdiobus_read(bus, addr, XILINX_GMII2RGMII_REG);
38 val &= ~XILINX_GMII2RGMII_SPEED_MASK;
39
40 if (speed == SPEED_1000)
41 val |= BMCR_SPEED1000;
42 else if (speed == SPEED_100)
43 val |= BMCR_SPEED100;
44 else
45 val |= BMCR_SPEED10;
46
47 mdiobus_write(bus, addr, XILINX_GMII2RGMII_REG, val);
48 }
49
xgmiitorgmii_read_status(struct phy_device * phydev)50 static int xgmiitorgmii_read_status(struct phy_device *phydev)
51 {
52 struct gmii2rgmii *priv = mdiodev_get_drvdata(&phydev->mdio);
53 int err;
54
55 if (priv->phy_drv->read_status)
56 err = priv->phy_drv->read_status(phydev);
57 else
58 err = genphy_read_status(phydev);
59 if (err < 0)
60 return err;
61
62 xgmiitorgmii_configure(priv, phydev->speed);
63
64 return 0;
65 }
66
xgmiitorgmii_set_loopback(struct phy_device * phydev,bool enable,int speed)67 static int xgmiitorgmii_set_loopback(struct phy_device *phydev, bool enable,
68 int speed)
69 {
70 struct gmii2rgmii *priv = mdiodev_get_drvdata(&phydev->mdio);
71 int err;
72
73 if (priv->phy_drv->set_loopback)
74 err = priv->phy_drv->set_loopback(phydev, enable, speed);
75 else
76 err = genphy_loopback(phydev, enable, speed);
77 if (err < 0)
78 return err;
79
80 xgmiitorgmii_configure(priv, phydev->speed);
81
82 return 0;
83 }
84
xgmiitorgmii_probe(struct mdio_device * mdiodev)85 static int xgmiitorgmii_probe(struct mdio_device *mdiodev)
86 {
87 struct device *dev = &mdiodev->dev;
88 struct device_node *np = dev->of_node, *phy_node;
89 struct gmii2rgmii *priv;
90 struct clk *clkin;
91
92 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
93 if (!priv)
94 return -ENOMEM;
95
96 clkin = devm_clk_get_optional_enabled(dev, NULL);
97 if (IS_ERR(clkin))
98 return dev_err_probe(dev, PTR_ERR(clkin),
99 "Failed to get and enable clock from Device Tree\n");
100
101 phy_node = of_parse_phandle(np, "phy-handle", 0);
102 if (!phy_node) {
103 dev_err(dev, "Couldn't parse phy-handle\n");
104 return -ENODEV;
105 }
106
107 priv->phy_dev = of_phy_find_device(phy_node);
108 of_node_put(phy_node);
109 if (!priv->phy_dev) {
110 dev_info(dev, "Couldn't find phydev\n");
111 return -EPROBE_DEFER;
112 }
113
114 if (!priv->phy_dev->drv) {
115 dev_info(dev, "Attached phy not ready\n");
116 put_device(&priv->phy_dev->mdio.dev);
117 return -EPROBE_DEFER;
118 }
119
120 priv->mdio = mdiodev;
121 priv->phy_drv = priv->phy_dev->drv;
122 memcpy(&priv->conv_phy_drv, priv->phy_dev->drv,
123 sizeof(struct phy_driver));
124 priv->conv_phy_drv.read_status = xgmiitorgmii_read_status;
125 priv->conv_phy_drv.set_loopback = xgmiitorgmii_set_loopback;
126 mdiodev_set_drvdata(&priv->phy_dev->mdio, priv);
127 priv->phy_dev->drv = &priv->conv_phy_drv;
128
129 return 0;
130 }
131
132 static const struct of_device_id xgmiitorgmii_of_match[] = {
133 { .compatible = "xlnx,gmii-to-rgmii-1.0" },
134 {},
135 };
136 MODULE_DEVICE_TABLE(of, xgmiitorgmii_of_match);
137
138 static struct mdio_driver xgmiitorgmii_driver = {
139 .probe = xgmiitorgmii_probe,
140 .mdiodrv.driver = {
141 .name = "xgmiitorgmii",
142 .of_match_table = xgmiitorgmii_of_match,
143 },
144 };
145
146 mdio_module_driver(xgmiitorgmii_driver);
147
148 MODULE_DESCRIPTION("Xilinx GMII2RGMII converter driver");
149 MODULE_LICENSE("GPL");
150