1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6 #include <linux/skbuff.h>
7 #include <linux/ctype.h>
8 #include <net/mac80211.h>
9 #include <net/cfg80211.h>
10 #include <linux/completion.h>
11 #include <linux/if_ether.h>
12 #include <linux/types.h>
13 #include <linux/pci.h>
14 #include <linux/uuid.h>
15 #include <linux/time.h>
16 #include <linux/of.h>
17 #include "core.h"
18 #include "debugfs.h"
19 #include "debug.h"
20 #include "mac.h"
21 #include "hw.h"
22 #include "peer.h"
23 #include "p2p.h"
24 #include "testmode.h"
25
26 struct ath12k_wmi_svc_ready_parse {
27 bool wmi_svc_bitmap_done;
28 };
29
30 struct wmi_tlv_fw_stats_parse {
31 const struct wmi_stats_event *ev;
32 struct ath12k_fw_stats *stats;
33 };
34
35 struct ath12k_wmi_dma_ring_caps_parse {
36 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps;
37 u32 n_dma_ring_caps;
38 };
39
40 struct ath12k_wmi_service_ext_arg {
41 u32 default_conc_scan_config_bits;
42 u32 default_fw_config_bits;
43 struct ath12k_wmi_ppe_threshold_arg ppet;
44 u32 he_cap_info;
45 u32 mpdu_density;
46 u32 max_bssid_rx_filters;
47 u32 num_hw_modes;
48 u32 num_phy;
49 };
50
51 struct ath12k_wmi_svc_rdy_ext_parse {
52 struct ath12k_wmi_service_ext_arg arg;
53 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps;
54 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
55 u32 n_hw_mode_caps;
56 u32 tot_phy_id;
57 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps;
58 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps;
59 u32 n_mac_phy_caps;
60 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps;
61 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps;
62 u32 n_ext_hal_reg_caps;
63 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
64 bool hw_mode_done;
65 bool mac_phy_done;
66 bool ext_hal_reg_done;
67 bool mac_phy_chainmask_combo_done;
68 bool mac_phy_chainmask_cap_done;
69 bool oem_dma_ring_cap_done;
70 bool dma_ring_cap_done;
71 };
72
73 struct ath12k_wmi_svc_rdy_ext2_arg {
74 u32 reg_db_version;
75 u32 hw_min_max_tx_power_2ghz;
76 u32 hw_min_max_tx_power_5ghz;
77 u32 chwidth_num_peer_caps;
78 u32 preamble_puncture_bw;
79 u32 max_user_per_ppdu_ofdma;
80 u32 max_user_per_ppdu_mumimo;
81 u32 target_cap_flags;
82 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
83 u32 max_num_linkview_peers;
84 u32 max_num_msduq_supported_per_tid;
85 u32 default_num_msduq_supported_per_tid;
86 };
87
88 struct ath12k_wmi_svc_rdy_ext2_parse {
89 struct ath12k_wmi_svc_rdy_ext2_arg arg;
90 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
91 bool dma_ring_cap_done;
92 bool spectral_bin_scaling_done;
93 bool mac_phy_caps_ext_done;
94 bool hal_reg_caps_ext2_done;
95 bool scan_radio_caps_ext2_done;
96 bool twt_caps_done;
97 bool htt_msdu_idx_to_qtype_map_done;
98 bool dbs_or_sbs_cap_ext_done;
99 };
100
101 struct ath12k_wmi_rdy_parse {
102 u32 num_extra_mac_addr;
103 };
104
105 struct ath12k_wmi_dma_buf_release_arg {
106 struct ath12k_wmi_dma_buf_release_fixed_params fixed;
107 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry;
108 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data;
109 u32 num_buf_entry;
110 u32 num_meta;
111 bool buf_entry_done;
112 bool meta_data_done;
113 };
114
115 struct ath12k_wmi_tlv_policy {
116 size_t min_len;
117 };
118
119 struct wmi_tlv_mgmt_rx_parse {
120 const struct ath12k_wmi_mgmt_rx_params *fixed;
121 const u8 *frame_buf;
122 bool frame_buf_done;
123 };
124
125 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = {
126 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 },
127 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 },
128 [WMI_TAG_SERVICE_READY_EVENT] = {
129 .min_len = sizeof(struct wmi_service_ready_event) },
130 [WMI_TAG_SERVICE_READY_EXT_EVENT] = {
131 .min_len = sizeof(struct wmi_service_ready_ext_event) },
132 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = {
133 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) },
134 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = {
135 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) },
136 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = {
137 .min_len = sizeof(struct wmi_vdev_start_resp_event) },
138 [WMI_TAG_PEER_DELETE_RESP_EVENT] = {
139 .min_len = sizeof(struct wmi_peer_delete_resp_event) },
140 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = {
141 .min_len = sizeof(struct wmi_bcn_tx_status_event) },
142 [WMI_TAG_VDEV_STOPPED_EVENT] = {
143 .min_len = sizeof(struct wmi_vdev_stopped_event) },
144 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = {
145 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
146 [WMI_TAG_MGMT_RX_HDR] = {
147 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) },
148 [WMI_TAG_MGMT_TX_COMPL_EVENT] = {
149 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) },
150 [WMI_TAG_SCAN_EVENT] = {
151 .min_len = sizeof(struct wmi_scan_event) },
152 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = {
153 .min_len = sizeof(struct wmi_peer_sta_kickout_event) },
154 [WMI_TAG_ROAM_EVENT] = {
155 .min_len = sizeof(struct wmi_roam_event) },
156 [WMI_TAG_CHAN_INFO_EVENT] = {
157 .min_len = sizeof(struct wmi_chan_info_event) },
158 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = {
159 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) },
160 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = {
161 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) },
162 [WMI_TAG_READY_EVENT] = {
163 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) },
164 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = {
165 .min_len = sizeof(struct wmi_service_available_event) },
166 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = {
167 .min_len = sizeof(struct wmi_peer_assoc_conf_event) },
168 [WMI_TAG_RFKILL_EVENT] = {
169 .min_len = sizeof(struct wmi_rfkill_state_change_event) },
170 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = {
171 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) },
172 [WMI_TAG_HOST_SWFDA_EVENT] = {
173 .min_len = sizeof(struct wmi_fils_discovery_event) },
174 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = {
175 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
176 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
177 .min_len = sizeof(struct wmi_vdev_delete_resp_event) },
178 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = {
179 .min_len = sizeof(struct wmi_twt_enable_event) },
180 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = {
181 .min_len = sizeof(struct wmi_twt_disable_event) },
182 [WMI_TAG_P2P_NOA_INFO] = {
183 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) },
184 [WMI_TAG_P2P_NOA_EVENT] = {
185 .min_len = sizeof(struct wmi_p2p_noa_event) },
186 [WMI_TAG_11D_NEW_COUNTRY_EVENT] = {
187 .min_len = sizeof(struct wmi_11d_new_cc_event) },
188 };
189
ath12k_wmi_tlv_hdr(u32 cmd,u32 len)190 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
191 {
192 return le32_encode_bits(cmd, WMI_TLV_TAG) |
193 le32_encode_bits(len, WMI_TLV_LEN);
194 }
195
ath12k_wmi_tlv_cmd_hdr(u32 cmd,u32 len)196 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
197 {
198 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE);
199 }
200
ath12k_wmi_init_qcn9274(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)201 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
202 struct ath12k_wmi_resource_config_arg *config)
203 {
204 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS;
205 config->num_peers = ab->num_radios *
206 ath12k_core_get_max_peers_per_radio(ab);
207 config->num_tids = ath12k_core_get_max_num_tids(ab);
208 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS;
209 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS;
210 config->num_peer_keys = TARGET_NUM_PEER_KEYS;
211 config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
212 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
213 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
214 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
215 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
216 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
217 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
218
219 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags))
220 config->rx_decap_mode = TARGET_DECAP_MODE_RAW;
221 else
222 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
223
224 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
225 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
226 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
227 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
228 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS;
229 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS;
230 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE;
231 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
232 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES;
233 config->dma_burst_size = TARGET_DMA_BURST_SIZE;
234 config->rx_skip_defrag_timeout_dup_detection_check =
235 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
236 config->vow_config = TARGET_VOW_CONFIG;
237 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV;
238 config->num_msdu_desc = TARGET_NUM_MSDU_DESC;
239 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD;
240 config->rx_batchmode = TARGET_RX_BATCHMODE;
241 /* Indicates host supports peer map v3 and unmap v2 support */
242 config->peer_map_unmap_version = 0x32;
243 config->twt_ap_pdev_count = ab->num_radios;
244 config->twt_ap_sta_count = 1000;
245 config->ema_max_vap_cnt = ab->num_radios;
246 config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD;
247 config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt;
248
249 if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map))
250 config->peer_metadata_ver = ATH12K_PEER_METADATA_V1B;
251 }
252
ath12k_wmi_init_wcn7850(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)253 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
254 struct ath12k_wmi_resource_config_arg *config)
255 {
256 config->num_vdevs = 4;
257 config->num_peers = 16;
258 config->num_tids = 32;
259
260 config->num_offload_peers = 3;
261 config->num_offload_reorder_buffs = 3;
262 config->num_peer_keys = TARGET_NUM_PEER_KEYS;
263 config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
264 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
265 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
266 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
267 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
268 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
269 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
270 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
271 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
272 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
273 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
274 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
275 config->num_mcast_groups = 0;
276 config->num_mcast_table_elems = 0;
277 config->mcast2ucast_mode = 0;
278 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
279 config->num_wds_entries = 0;
280 config->dma_burst_size = 0;
281 config->rx_skip_defrag_timeout_dup_detection_check = 0;
282 config->vow_config = TARGET_VOW_CONFIG;
283 config->gtk_offload_max_vdev = 2;
284 config->num_msdu_desc = 0x400;
285 config->beacon_tx_offload_max_vdev = 2;
286 config->rx_batchmode = TARGET_RX_BATCHMODE;
287
288 config->peer_map_unmap_version = 0x1;
289 config->use_pdev_id = 1;
290 config->max_frag_entries = 0xa;
291 config->num_tdls_vdevs = 0x1;
292 config->num_tdls_conn_table_entries = 8;
293 config->beacon_tx_offload_max_vdev = 0x2;
294 config->num_multicast_filter_entries = 0x20;
295 config->num_wow_filters = 0x16;
296 config->num_keep_alive_pattern = 0;
297 }
298
299 #define PRIMAP(_hw_mode_) \
300 [_hw_mode_] = _hw_mode_##_PRI
301
302 static const int ath12k_hw_mode_pri_map[] = {
303 PRIMAP(WMI_HOST_HW_MODE_SINGLE),
304 PRIMAP(WMI_HOST_HW_MODE_DBS),
305 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE),
306 PRIMAP(WMI_HOST_HW_MODE_SBS),
307 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS),
308 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS),
309 /* keep last */
310 PRIMAP(WMI_HOST_HW_MODE_MAX),
311 };
312
313 static int
ath12k_wmi_tlv_iter(struct ath12k_base * ab,const void * ptr,size_t len,int (* iter)(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data),void * data)314 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len,
315 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len,
316 const void *ptr, void *data),
317 void *data)
318 {
319 const void *begin = ptr;
320 const struct wmi_tlv *tlv;
321 u16 tlv_tag, tlv_len;
322 int ret;
323
324 while (len > 0) {
325 if (len < sizeof(*tlv)) {
326 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
327 ptr - begin, len, sizeof(*tlv));
328 return -EINVAL;
329 }
330
331 tlv = ptr;
332 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
333 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
334 ptr += sizeof(*tlv);
335 len -= sizeof(*tlv);
336
337 if (tlv_len > len) {
338 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
339 tlv_tag, ptr - begin, len, tlv_len);
340 return -EINVAL;
341 }
342
343 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) &&
344 ath12k_wmi_tlv_policies[tlv_tag].min_len &&
345 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) {
346 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n",
347 tlv_tag, ptr - begin, tlv_len,
348 ath12k_wmi_tlv_policies[tlv_tag].min_len);
349 return -EINVAL;
350 }
351
352 ret = iter(ab, tlv_tag, tlv_len, ptr, data);
353 if (ret)
354 return ret;
355
356 ptr += tlv_len;
357 len -= tlv_len;
358 }
359
360 return 0;
361 }
362
ath12k_wmi_tlv_iter_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)363 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len,
364 const void *ptr, void *data)
365 {
366 const void **tb = data;
367
368 if (tag < WMI_TAG_MAX)
369 tb[tag] = ptr;
370
371 return 0;
372 }
373
ath12k_wmi_tlv_parse(struct ath12k_base * ar,const void ** tb,const void * ptr,size_t len)374 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb,
375 const void *ptr, size_t len)
376 {
377 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse,
378 (void *)tb);
379 }
380
381 static const void **
ath12k_wmi_tlv_parse_alloc(struct ath12k_base * ab,struct sk_buff * skb,gfp_t gfp)382 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab,
383 struct sk_buff *skb, gfp_t gfp)
384 {
385 const void **tb;
386 int ret;
387
388 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp);
389 if (!tb)
390 return ERR_PTR(-ENOMEM);
391
392 ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len);
393 if (ret) {
394 kfree(tb);
395 return ERR_PTR(ret);
396 }
397
398 return tb;
399 }
400
ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)401 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
402 u32 cmd_id)
403 {
404 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
405 struct ath12k_base *ab = wmi->wmi_ab->ab;
406 struct wmi_cmd_hdr *cmd_hdr;
407 int ret;
408
409 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr)))
410 return -ENOMEM;
411
412 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
413 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID);
414
415 memset(skb_cb, 0, sizeof(*skb_cb));
416 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb);
417
418 if (ret)
419 goto err_pull;
420
421 return 0;
422
423 err_pull:
424 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
425 return ret;
426 }
427
ath12k_wmi_cmd_send(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)428 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
429 u32 cmd_id)
430 {
431 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab;
432 int ret = -EOPNOTSUPP;
433
434 might_sleep();
435
436 wait_event_timeout(wmi_ab->tx_credits_wq, ({
437 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
438
439 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags))
440 ret = -ESHUTDOWN;
441
442 (ret != -EAGAIN);
443 }), WMI_SEND_TIMEOUT_HZ);
444
445 if (ret == -EAGAIN)
446 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id);
447
448 return ret;
449 }
450
ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_service_ext_arg * arg)451 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
452 const void *ptr,
453 struct ath12k_wmi_service_ext_arg *arg)
454 {
455 const struct wmi_service_ready_ext_event *ev = ptr;
456 int i;
457
458 if (!ev)
459 return -EINVAL;
460
461 /* Move this to host based bitmap */
462 arg->default_conc_scan_config_bits =
463 le32_to_cpu(ev->default_conc_scan_config_bits);
464 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits);
465 arg->he_cap_info = le32_to_cpu(ev->he_cap_info);
466 arg->mpdu_density = le32_to_cpu(ev->mpdu_density);
467 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters);
468 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1);
469 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info);
470
471 for (i = 0; i < WMI_MAX_NUM_SS; i++)
472 arg->ppet.ppet16_ppet8_ru3_ru0[i] =
473 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]);
474
475 return 0;
476 }
477
478 static int
ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,struct ath12k_wmi_svc_rdy_ext_parse * svc,u8 hw_mode_id,u8 phy_id,struct ath12k_pdev * pdev)479 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
480 struct ath12k_wmi_svc_rdy_ext_parse *svc,
481 u8 hw_mode_id, u8 phy_id,
482 struct ath12k_pdev *pdev)
483 {
484 const struct ath12k_wmi_mac_phy_caps_params *mac_caps;
485 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps;
486 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps;
487 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps;
488 struct ath12k_base *ab = wmi_handle->wmi_ab->ab;
489 struct ath12k_band_cap *cap_band;
490 struct ath12k_pdev_cap *pdev_cap = &pdev->cap;
491 struct ath12k_fw_pdev *fw_pdev;
492 u32 phy_map;
493 u32 hw_idx, phy_idx = 0;
494 int i;
495
496 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps)
497 return -EINVAL;
498
499 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) {
500 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id))
501 break;
502
503 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map);
504 phy_idx = fls(phy_map);
505 }
506
507 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes))
508 return -EINVAL;
509
510 phy_idx += phy_id;
511 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy))
512 return -EINVAL;
513
514 mac_caps = wmi_mac_phy_caps + phy_idx;
515
516 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
517 pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps);
518 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands);
519 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density);
520
521 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count];
522 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands);
523 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
524 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id);
525 ab->fw_pdev_count++;
526
527 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
528 * band to band for a single radio, need to see how this should be
529 * handled.
530 */
531 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) {
532 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g);
533 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g);
534 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) {
535 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g);
536 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g);
537 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
538 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
539 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
540 } else {
541 return -EINVAL;
542 }
543
544 /* tx/rx chainmask reported from fw depends on the actual hw chains used,
545 * For example, for 4x4 capable macphys, first 4 chains can be used for first
546 * mac and the remaining 4 chains can be used for the second mac or vice-versa.
547 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
548 * will be advertised for second mac or vice-versa. Compute the shift value
549 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to
550 * mac80211.
551 */
552 pdev_cap->tx_chain_mask_shift =
553 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32);
554 pdev_cap->rx_chain_mask_shift =
555 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32);
556
557 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) {
558 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
559 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
560 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g);
561 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g);
562 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g);
563 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext);
564 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g);
565 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
566 cap_band->he_cap_phy_info[i] =
567 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]);
568
569 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1);
570 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info);
571
572 for (i = 0; i < WMI_MAX_NUM_SS; i++)
573 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
574 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]);
575 }
576
577 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) {
578 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
579 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
580 cap_band->max_bw_supported =
581 le32_to_cpu(mac_caps->max_bw_supported_5g);
582 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
583 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
584 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
585 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
586 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
587 cap_band->he_cap_phy_info[i] =
588 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
589
590 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
591 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
592
593 for (i = 0; i < WMI_MAX_NUM_SS; i++)
594 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
595 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
596
597 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ];
598 cap_band->max_bw_supported =
599 le32_to_cpu(mac_caps->max_bw_supported_5g);
600 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
601 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
602 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
603 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
604 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
605 cap_band->he_cap_phy_info[i] =
606 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
607
608 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
609 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
610
611 for (i = 0; i < WMI_MAX_NUM_SS; i++)
612 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
613 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
614 }
615
616 return 0;
617 }
618
619 static int
ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev * wmi_handle,const struct ath12k_wmi_soc_hal_reg_caps_params * reg_caps,const struct ath12k_wmi_hal_reg_caps_ext_params * ext_caps,u8 phy_idx,struct ath12k_wmi_hal_reg_capabilities_ext_arg * param)620 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle,
621 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps,
622 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps,
623 u8 phy_idx,
624 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param)
625 {
626 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap;
627
628 if (!reg_caps || !ext_caps)
629 return -EINVAL;
630
631 if (phy_idx >= le32_to_cpu(reg_caps->num_phy))
632 return -EINVAL;
633
634 ext_reg_cap = &ext_caps[phy_idx];
635
636 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id);
637 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain);
638 param->eeprom_reg_domain_ext =
639 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext);
640 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1);
641 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2);
642 /* check if param->wireless_mode is needed */
643 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan);
644 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan);
645 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan);
646 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan);
647
648 return 0;
649 }
650
ath12k_pull_service_ready_tlv(struct ath12k_base * ab,const void * evt_buf,struct ath12k_wmi_target_cap_arg * cap)651 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab,
652 const void *evt_buf,
653 struct ath12k_wmi_target_cap_arg *cap)
654 {
655 const struct wmi_service_ready_event *ev = evt_buf;
656
657 if (!ev) {
658 ath12k_err(ab, "%s: failed by NULL param\n",
659 __func__);
660 return -EINVAL;
661 }
662
663 cap->phy_capability = le32_to_cpu(ev->phy_capability);
664 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry);
665 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains);
666 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info);
667 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info);
668 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs);
669 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power);
670 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power);
671 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info);
672 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable);
673 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size);
674 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels);
675 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs);
676 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps);
677 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask);
678 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index);
679 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc);
680
681 return 0;
682 }
683
684 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in
685 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each
686 * 4-byte word.
687 */
ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev * wmi,const u32 * wmi_svc_bm)688 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi,
689 const u32 *wmi_svc_bm)
690 {
691 int i, j;
692
693 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) {
694 do {
695 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32))
696 set_bit(j, wmi->wmi_ab->svc_map);
697 } while (++j % WMI_SERVICE_BITS_IN_SIZE32);
698 }
699 }
700
ath12k_wmi_svc_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)701 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
702 const void *ptr, void *data)
703 {
704 struct ath12k_wmi_svc_ready_parse *svc_ready = data;
705 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
706 u16 expect_len;
707
708 switch (tag) {
709 case WMI_TAG_SERVICE_READY_EVENT:
710 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps))
711 return -EINVAL;
712 break;
713
714 case WMI_TAG_ARRAY_UINT32:
715 if (!svc_ready->wmi_svc_bitmap_done) {
716 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32);
717 if (len < expect_len) {
718 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n",
719 len, tag);
720 return -EINVAL;
721 }
722
723 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr);
724
725 svc_ready->wmi_svc_bitmap_done = true;
726 }
727 break;
728 default:
729 break;
730 }
731
732 return 0;
733 }
734
ath12k_service_ready_event(struct ath12k_base * ab,struct sk_buff * skb)735 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
736 {
737 struct ath12k_wmi_svc_ready_parse svc_ready = { };
738 int ret;
739
740 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
741 ath12k_wmi_svc_rdy_parse,
742 &svc_ready);
743 if (ret) {
744 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
745 return ret;
746 }
747
748 return 0;
749 }
750
ath12k_wmi_mgmt_get_freq(struct ath12k * ar,struct ieee80211_tx_info * info)751 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar,
752 struct ieee80211_tx_info *info)
753 {
754 struct ath12k_base *ab = ar->ab;
755 u32 freq = 0;
756
757 if (ab->hw_params->single_pdev_only &&
758 ar->scan.is_roc &&
759 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN))
760 freq = ar->scan.roc_freq;
761
762 return freq;
763 }
764
ath12k_wmi_alloc_skb(struct ath12k_wmi_base * wmi_ab,u32 len)765 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len)
766 {
767 struct sk_buff *skb;
768 struct ath12k_base *ab = wmi_ab->ab;
769 u32 round_len = roundup(len, 4);
770
771 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len);
772 if (!skb)
773 return NULL;
774
775 skb_reserve(skb, WMI_SKB_HEADROOM);
776 if (!IS_ALIGNED((unsigned long)skb->data, 4))
777 ath12k_warn(ab, "unaligned WMI skb data\n");
778
779 skb_put(skb, round_len);
780 memset(skb->data, 0, round_len);
781
782 return skb;
783 }
784
ath12k_wmi_mgmt_send(struct ath12k * ar,u32 vdev_id,u32 buf_id,struct sk_buff * frame)785 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id,
786 struct sk_buff *frame)
787 {
788 struct ath12k_wmi_pdev *wmi = ar->wmi;
789 struct wmi_mgmt_send_cmd *cmd;
790 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame);
791 struct wmi_tlv *frame_tlv;
792 struct sk_buff *skb;
793 u32 buf_len;
794 int ret, len;
795
796 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
797
798 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4);
799
800 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
801 if (!skb)
802 return -ENOMEM;
803
804 cmd = (struct wmi_mgmt_send_cmd *)skb->data;
805 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD,
806 sizeof(*cmd));
807 cmd->vdev_id = cpu_to_le32(vdev_id);
808 cmd->desc_id = cpu_to_le32(buf_id);
809 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info));
810 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr));
811 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr));
812 cmd->frame_len = cpu_to_le32(frame->len);
813 cmd->buf_len = cpu_to_le32(buf_len);
814 cmd->tx_params_valid = 0;
815
816 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
817 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len);
818
819 memcpy(frame_tlv->value, frame->data, buf_len);
820
821 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
822 if (ret) {
823 ath12k_warn(ar->ab,
824 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n");
825 dev_kfree_skb(skb);
826 }
827
828 return ret;
829 }
830
ath12k_wmi_send_stats_request_cmd(struct ath12k * ar,u32 stats_id,u32 vdev_id,u32 pdev_id)831 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id,
832 u32 vdev_id, u32 pdev_id)
833 {
834 struct ath12k_wmi_pdev *wmi = ar->wmi;
835 struct wmi_request_stats_cmd *cmd;
836 struct sk_buff *skb;
837 int ret;
838
839 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
840 if (!skb)
841 return -ENOMEM;
842
843 cmd = (struct wmi_request_stats_cmd *)skb->data;
844 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REQUEST_STATS_CMD,
845 sizeof(*cmd));
846
847 cmd->stats_id = cpu_to_le32(stats_id);
848 cmd->vdev_id = cpu_to_le32(vdev_id);
849 cmd->pdev_id = cpu_to_le32(pdev_id);
850
851 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_STATS_CMDID);
852 if (ret) {
853 ath12k_warn(ar->ab, "failed to send WMI_REQUEST_STATS cmd\n");
854 dev_kfree_skb(skb);
855 }
856
857 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
858 "WMI request stats 0x%x vdev id %d pdev id %d\n",
859 stats_id, vdev_id, pdev_id);
860
861 return ret;
862 }
863
ath12k_wmi_vdev_create(struct ath12k * ar,u8 * macaddr,struct ath12k_wmi_vdev_create_arg * args)864 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
865 struct ath12k_wmi_vdev_create_arg *args)
866 {
867 struct ath12k_wmi_pdev *wmi = ar->wmi;
868 struct wmi_vdev_create_cmd *cmd;
869 struct sk_buff *skb;
870 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams;
871 bool is_ml_vdev = is_valid_ether_addr(args->mld_addr);
872 struct wmi_vdev_create_mlo_params *ml_params;
873 struct wmi_tlv *tlv;
874 int ret, len;
875 void *ptr;
876
877 /* It can be optimized my sending tx/rx chain configuration
878 * only for supported bands instead of always sending it for
879 * both the bands.
880 */
881 len = sizeof(*cmd) + TLV_HDR_SIZE +
882 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)) +
883 (is_ml_vdev ? TLV_HDR_SIZE + sizeof(*ml_params) : 0);
884
885 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
886 if (!skb)
887 return -ENOMEM;
888
889 cmd = (struct wmi_vdev_create_cmd *)skb->data;
890 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD,
891 sizeof(*cmd));
892
893 cmd->vdev_id = cpu_to_le32(args->if_id);
894 cmd->vdev_type = cpu_to_le32(args->type);
895 cmd->vdev_subtype = cpu_to_le32(args->subtype);
896 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX);
897 cmd->pdev_id = cpu_to_le32(args->pdev_id);
898 cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags);
899 cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id);
900 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id);
901 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
902
903 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID)
904 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0));
905
906 ptr = skb->data + sizeof(*cmd);
907 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
908
909 tlv = ptr;
910 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
911
912 ptr += TLV_HDR_SIZE;
913 txrx_streams = ptr;
914 len = sizeof(*txrx_streams);
915 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
916 len);
917 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G);
918 txrx_streams->supported_tx_streams =
919 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx);
920 txrx_streams->supported_rx_streams =
921 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx);
922
923 txrx_streams++;
924 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
925 len);
926 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G);
927 txrx_streams->supported_tx_streams =
928 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx);
929 txrx_streams->supported_rx_streams =
930 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx);
931
932 ptr += WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
933
934 if (is_ml_vdev) {
935 tlv = ptr;
936 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
937 sizeof(*ml_params));
938 ptr += TLV_HDR_SIZE;
939 ml_params = ptr;
940
941 ml_params->tlv_header =
942 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_CREATE_PARAMS,
943 sizeof(*ml_params));
944 ether_addr_copy(ml_params->mld_macaddr.addr, args->mld_addr);
945 }
946
947 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
948 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n",
949 args->if_id, args->type, args->subtype,
950 macaddr, args->pdev_id);
951
952 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID);
953 if (ret) {
954 ath12k_warn(ar->ab,
955 "failed to submit WMI_VDEV_CREATE_CMDID\n");
956 dev_kfree_skb(skb);
957 }
958
959 return ret;
960 }
961
ath12k_wmi_vdev_delete(struct ath12k * ar,u8 vdev_id)962 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id)
963 {
964 struct ath12k_wmi_pdev *wmi = ar->wmi;
965 struct wmi_vdev_delete_cmd *cmd;
966 struct sk_buff *skb;
967 int ret;
968
969 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
970 if (!skb)
971 return -ENOMEM;
972
973 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
974 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD,
975 sizeof(*cmd));
976 cmd->vdev_id = cpu_to_le32(vdev_id);
977
978 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id);
979
980 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID);
981 if (ret) {
982 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n");
983 dev_kfree_skb(skb);
984 }
985
986 return ret;
987 }
988
ath12k_wmi_vdev_stop(struct ath12k * ar,u8 vdev_id)989 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id)
990 {
991 struct ath12k_wmi_pdev *wmi = ar->wmi;
992 struct wmi_vdev_stop_cmd *cmd;
993 struct sk_buff *skb;
994 int ret;
995
996 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
997 if (!skb)
998 return -ENOMEM;
999
1000 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
1001
1002 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD,
1003 sizeof(*cmd));
1004 cmd->vdev_id = cpu_to_le32(vdev_id);
1005
1006 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id);
1007
1008 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID);
1009 if (ret) {
1010 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n");
1011 dev_kfree_skb(skb);
1012 }
1013
1014 return ret;
1015 }
1016
ath12k_wmi_vdev_down(struct ath12k * ar,u8 vdev_id)1017 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id)
1018 {
1019 struct ath12k_wmi_pdev *wmi = ar->wmi;
1020 struct wmi_vdev_down_cmd *cmd;
1021 struct sk_buff *skb;
1022 int ret;
1023
1024 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1025 if (!skb)
1026 return -ENOMEM;
1027
1028 cmd = (struct wmi_vdev_down_cmd *)skb->data;
1029
1030 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD,
1031 sizeof(*cmd));
1032 cmd->vdev_id = cpu_to_le32(vdev_id);
1033
1034 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id);
1035
1036 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID);
1037 if (ret) {
1038 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n");
1039 dev_kfree_skb(skb);
1040 }
1041
1042 return ret;
1043 }
1044
ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params * chan,struct wmi_vdev_start_req_arg * arg)1045 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
1046 struct wmi_vdev_start_req_arg *arg)
1047 {
1048 u32 center_freq1 = arg->band_center_freq1;
1049
1050 memset(chan, 0, sizeof(*chan));
1051
1052 chan->mhz = cpu_to_le32(arg->freq);
1053 chan->band_center_freq1 = cpu_to_le32(center_freq1);
1054 if (arg->mode == MODE_11BE_EHT320) {
1055 if (arg->freq > center_freq1)
1056 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 80);
1057 else
1058 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 80);
1059
1060 chan->band_center_freq2 = cpu_to_le32(center_freq1);
1061
1062 } else if (arg->mode == MODE_11BE_EHT160) {
1063 if (arg->freq > center_freq1)
1064 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40);
1065 else
1066 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40);
1067
1068 chan->band_center_freq2 = cpu_to_le32(center_freq1);
1069 } else if (arg->mode == MODE_11BE_EHT80_80) {
1070 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2);
1071 } else {
1072 chan->band_center_freq2 = 0;
1073 }
1074
1075 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE);
1076 if (arg->passive)
1077 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
1078 if (arg->allow_ibss)
1079 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED);
1080 if (arg->allow_ht)
1081 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
1082 if (arg->allow_vht)
1083 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
1084 if (arg->allow_he)
1085 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
1086 if (arg->ht40plus)
1087 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS);
1088 if (arg->chan_radar)
1089 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
1090 if (arg->freq2_radar)
1091 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2);
1092
1093 chan->reg_info_1 = le32_encode_bits(arg->max_power,
1094 WMI_CHAN_REG_INFO1_MAX_PWR) |
1095 le32_encode_bits(arg->max_reg_power,
1096 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
1097
1098 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain,
1099 WMI_CHAN_REG_INFO2_ANT_MAX) |
1100 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR);
1101 }
1102
ath12k_wmi_vdev_start(struct ath12k * ar,struct wmi_vdev_start_req_arg * arg,bool restart)1103 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
1104 bool restart)
1105 {
1106 struct wmi_vdev_start_mlo_params *ml_params;
1107 struct wmi_partner_link_info *partner_info;
1108 struct ath12k_wmi_pdev *wmi = ar->wmi;
1109 struct wmi_vdev_start_request_cmd *cmd;
1110 struct sk_buff *skb;
1111 struct ath12k_wmi_channel_params *chan;
1112 struct wmi_tlv *tlv;
1113 void *ptr;
1114 int ret, len, i, ml_arg_size = 0;
1115
1116 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
1117 return -EINVAL;
1118
1119 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE;
1120
1121 if (!restart && arg->ml.enabled) {
1122 ml_arg_size = TLV_HDR_SIZE + sizeof(*ml_params) +
1123 TLV_HDR_SIZE + (arg->ml.num_partner_links *
1124 sizeof(*partner_info));
1125 len += ml_arg_size;
1126 }
1127 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1128 if (!skb)
1129 return -ENOMEM;
1130
1131 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
1132 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD,
1133 sizeof(*cmd));
1134 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1135 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval);
1136 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate);
1137 cmd->dtim_period = cpu_to_le32(arg->dtim_period);
1138 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors);
1139 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams);
1140 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams);
1141 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms);
1142 cmd->regdomain = cpu_to_le32(arg->regdomain);
1143 cmd->he_ops = cpu_to_le32(arg->he_ops);
1144 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1145 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags);
1146 cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id);
1147
1148 if (!restart) {
1149 if (arg->ssid) {
1150 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len);
1151 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
1152 }
1153 if (arg->hidden_ssid)
1154 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID);
1155 if (arg->pmf_enabled)
1156 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED);
1157 }
1158
1159 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED);
1160
1161 ptr = skb->data + sizeof(*cmd);
1162 chan = ptr;
1163
1164 ath12k_wmi_put_wmi_channel(chan, arg);
1165
1166 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
1167 sizeof(*chan));
1168 ptr += sizeof(*chan);
1169
1170 tlv = ptr;
1171 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
1172
1173 /* Note: This is a nested TLV containing:
1174 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv]..
1175 */
1176
1177 ptr += sizeof(*tlv);
1178
1179 if (ml_arg_size) {
1180 tlv = ptr;
1181 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1182 sizeof(*ml_params));
1183 ptr += TLV_HDR_SIZE;
1184
1185 ml_params = ptr;
1186
1187 ml_params->tlv_header =
1188 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_START_PARAMS,
1189 sizeof(*ml_params));
1190
1191 ml_params->flags = le32_encode_bits(arg->ml.enabled,
1192 ATH12K_WMI_FLAG_MLO_ENABLED) |
1193 le32_encode_bits(arg->ml.assoc_link,
1194 ATH12K_WMI_FLAG_MLO_ASSOC_LINK) |
1195 le32_encode_bits(arg->ml.mcast_link,
1196 ATH12K_WMI_FLAG_MLO_MCAST_VDEV) |
1197 le32_encode_bits(arg->ml.link_add,
1198 ATH12K_WMI_FLAG_MLO_LINK_ADD);
1199
1200 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %d start ml flags 0x%x\n",
1201 arg->vdev_id, ml_params->flags);
1202
1203 ptr += sizeof(*ml_params);
1204
1205 tlv = ptr;
1206 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1207 arg->ml.num_partner_links *
1208 sizeof(*partner_info));
1209 ptr += TLV_HDR_SIZE;
1210
1211 partner_info = ptr;
1212
1213 for (i = 0; i < arg->ml.num_partner_links; i++) {
1214 partner_info->tlv_header =
1215 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PARTNER_LINK_PARAMS,
1216 sizeof(*partner_info));
1217 partner_info->vdev_id =
1218 cpu_to_le32(arg->ml.partner_info[i].vdev_id);
1219 partner_info->hw_link_id =
1220 cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
1221 ether_addr_copy(partner_info->vdev_addr.addr,
1222 arg->ml.partner_info[i].addr);
1223
1224 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "partner vdev %d hw_link_id %d macaddr%pM\n",
1225 partner_info->vdev_id, partner_info->hw_link_id,
1226 partner_info->vdev_addr.addr);
1227
1228 partner_info++;
1229 }
1230
1231 ptr = partner_info;
1232 }
1233
1234 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n",
1235 restart ? "restart" : "start", arg->vdev_id,
1236 arg->freq, arg->mode);
1237
1238 if (restart)
1239 ret = ath12k_wmi_cmd_send(wmi, skb,
1240 WMI_VDEV_RESTART_REQUEST_CMDID);
1241 else
1242 ret = ath12k_wmi_cmd_send(wmi, skb,
1243 WMI_VDEV_START_REQUEST_CMDID);
1244 if (ret) {
1245 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n",
1246 restart ? "restart" : "start");
1247 dev_kfree_skb(skb);
1248 }
1249
1250 return ret;
1251 }
1252
ath12k_wmi_vdev_up(struct ath12k * ar,struct ath12k_wmi_vdev_up_params * params)1253 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params)
1254 {
1255 struct ath12k_wmi_pdev *wmi = ar->wmi;
1256 struct wmi_vdev_up_cmd *cmd;
1257 struct sk_buff *skb;
1258 int ret;
1259
1260 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1261 if (!skb)
1262 return -ENOMEM;
1263
1264 cmd = (struct wmi_vdev_up_cmd *)skb->data;
1265
1266 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD,
1267 sizeof(*cmd));
1268 cmd->vdev_id = cpu_to_le32(params->vdev_id);
1269 cmd->vdev_assoc_id = cpu_to_le32(params->aid);
1270
1271 ether_addr_copy(cmd->vdev_bssid.addr, params->bssid);
1272
1273 if (params->tx_bssid) {
1274 ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid);
1275 cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx);
1276 cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt);
1277 }
1278
1279 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1280 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
1281 params->vdev_id, params->aid, params->bssid);
1282
1283 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID);
1284 if (ret) {
1285 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n");
1286 dev_kfree_skb(skb);
1287 }
1288
1289 return ret;
1290 }
1291
ath12k_wmi_send_peer_create_cmd(struct ath12k * ar,struct ath12k_wmi_peer_create_arg * arg)1292 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
1293 struct ath12k_wmi_peer_create_arg *arg)
1294 {
1295 struct ath12k_wmi_pdev *wmi = ar->wmi;
1296 struct wmi_peer_create_cmd *cmd;
1297 struct sk_buff *skb;
1298 int ret, len;
1299 struct wmi_peer_create_mlo_params *ml_param;
1300 void *ptr;
1301 struct wmi_tlv *tlv;
1302
1303 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*ml_param);
1304
1305 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1306 if (!skb)
1307 return -ENOMEM;
1308
1309 cmd = (struct wmi_peer_create_cmd *)skb->data;
1310 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD,
1311 sizeof(*cmd));
1312
1313 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr);
1314 cmd->peer_type = cpu_to_le32(arg->peer_type);
1315 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1316
1317 ptr = skb->data + sizeof(*cmd);
1318 tlv = ptr;
1319 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1320 sizeof(*ml_param));
1321 ptr += TLV_HDR_SIZE;
1322 ml_param = ptr;
1323 ml_param->tlv_header =
1324 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_CREATE_PARAMS,
1325 sizeof(*ml_param));
1326 if (arg->ml_enabled)
1327 ml_param->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
1328
1329 ptr += sizeof(*ml_param);
1330
1331 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1332 "WMI peer create vdev_id %d peer_addr %pM ml_flags 0x%x\n",
1333 arg->vdev_id, arg->peer_addr, ml_param->flags);
1334
1335 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID);
1336 if (ret) {
1337 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n");
1338 dev_kfree_skb(skb);
1339 }
1340
1341 return ret;
1342 }
1343
ath12k_wmi_send_peer_delete_cmd(struct ath12k * ar,const u8 * peer_addr,u8 vdev_id)1344 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
1345 const u8 *peer_addr, u8 vdev_id)
1346 {
1347 struct ath12k_wmi_pdev *wmi = ar->wmi;
1348 struct wmi_peer_delete_cmd *cmd;
1349 struct sk_buff *skb;
1350 int ret;
1351
1352 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1353 if (!skb)
1354 return -ENOMEM;
1355
1356 cmd = (struct wmi_peer_delete_cmd *)skb->data;
1357 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD,
1358 sizeof(*cmd));
1359
1360 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1361 cmd->vdev_id = cpu_to_le32(vdev_id);
1362
1363 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1364 "WMI peer delete vdev_id %d peer_addr %pM\n",
1365 vdev_id, peer_addr);
1366
1367 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID);
1368 if (ret) {
1369 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n");
1370 dev_kfree_skb(skb);
1371 }
1372
1373 return ret;
1374 }
1375
ath12k_wmi_send_pdev_set_regdomain(struct ath12k * ar,struct ath12k_wmi_pdev_set_regdomain_arg * arg)1376 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
1377 struct ath12k_wmi_pdev_set_regdomain_arg *arg)
1378 {
1379 struct ath12k_wmi_pdev *wmi = ar->wmi;
1380 struct wmi_pdev_set_regdomain_cmd *cmd;
1381 struct sk_buff *skb;
1382 int ret;
1383
1384 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1385 if (!skb)
1386 return -ENOMEM;
1387
1388 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
1389 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1390 sizeof(*cmd));
1391
1392 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use);
1393 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g);
1394 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g);
1395 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g);
1396 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g);
1397 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain);
1398 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
1399
1400 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1401 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n",
1402 arg->current_rd_in_use, arg->current_rd_2g,
1403 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id);
1404
1405 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
1406 if (ret) {
1407 ath12k_warn(ar->ab,
1408 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n");
1409 dev_kfree_skb(skb);
1410 }
1411
1412 return ret;
1413 }
1414
ath12k_wmi_set_peer_param(struct ath12k * ar,const u8 * peer_addr,u32 vdev_id,u32 param_id,u32 param_val)1415 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
1416 u32 vdev_id, u32 param_id, u32 param_val)
1417 {
1418 struct ath12k_wmi_pdev *wmi = ar->wmi;
1419 struct wmi_peer_set_param_cmd *cmd;
1420 struct sk_buff *skb;
1421 int ret;
1422
1423 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1424 if (!skb)
1425 return -ENOMEM;
1426
1427 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
1428 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD,
1429 sizeof(*cmd));
1430 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1431 cmd->vdev_id = cpu_to_le32(vdev_id);
1432 cmd->param_id = cpu_to_le32(param_id);
1433 cmd->param_value = cpu_to_le32(param_val);
1434
1435 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1436 "WMI vdev %d peer 0x%pM set param %d value %d\n",
1437 vdev_id, peer_addr, param_id, param_val);
1438
1439 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID);
1440 if (ret) {
1441 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n");
1442 dev_kfree_skb(skb);
1443 }
1444
1445 return ret;
1446 }
1447
ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k * ar,u8 peer_addr[ETH_ALEN],u32 peer_tid_bitmap,u8 vdev_id)1448 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
1449 u8 peer_addr[ETH_ALEN],
1450 u32 peer_tid_bitmap,
1451 u8 vdev_id)
1452 {
1453 struct ath12k_wmi_pdev *wmi = ar->wmi;
1454 struct wmi_peer_flush_tids_cmd *cmd;
1455 struct sk_buff *skb;
1456 int ret;
1457
1458 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1459 if (!skb)
1460 return -ENOMEM;
1461
1462 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
1463 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD,
1464 sizeof(*cmd));
1465
1466 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1467 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap);
1468 cmd->vdev_id = cpu_to_le32(vdev_id);
1469
1470 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1471 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n",
1472 vdev_id, peer_addr, peer_tid_bitmap);
1473
1474 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID);
1475 if (ret) {
1476 ath12k_warn(ar->ab,
1477 "failed to send WMI_PEER_FLUSH_TIDS cmd\n");
1478 dev_kfree_skb(skb);
1479 }
1480
1481 return ret;
1482 }
1483
ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k * ar,int vdev_id,const u8 * addr,dma_addr_t paddr,u8 tid,u8 ba_window_size_valid,u32 ba_window_size)1484 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
1485 int vdev_id, const u8 *addr,
1486 dma_addr_t paddr, u8 tid,
1487 u8 ba_window_size_valid,
1488 u32 ba_window_size)
1489 {
1490 struct wmi_peer_reorder_queue_setup_cmd *cmd;
1491 struct sk_buff *skb;
1492 int ret;
1493
1494 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
1495 if (!skb)
1496 return -ENOMEM;
1497
1498 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data;
1499 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1500 sizeof(*cmd));
1501
1502 ether_addr_copy(cmd->peer_macaddr.addr, addr);
1503 cmd->vdev_id = cpu_to_le32(vdev_id);
1504 cmd->tid = cpu_to_le32(tid);
1505 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr));
1506 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr));
1507 cmd->queue_no = cpu_to_le32(tid);
1508 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid);
1509 cmd->ba_window_size = cpu_to_le32(ba_window_size);
1510
1511 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1512 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n",
1513 addr, vdev_id, tid);
1514
1515 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
1516 WMI_PEER_REORDER_QUEUE_SETUP_CMDID);
1517 if (ret) {
1518 ath12k_warn(ar->ab,
1519 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n");
1520 dev_kfree_skb(skb);
1521 }
1522
1523 return ret;
1524 }
1525
1526 int
ath12k_wmi_rx_reord_queue_remove(struct ath12k * ar,struct ath12k_wmi_rx_reorder_queue_remove_arg * arg)1527 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
1528 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg)
1529 {
1530 struct ath12k_wmi_pdev *wmi = ar->wmi;
1531 struct wmi_peer_reorder_queue_remove_cmd *cmd;
1532 struct sk_buff *skb;
1533 int ret;
1534
1535 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1536 if (!skb)
1537 return -ENOMEM;
1538
1539 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data;
1540 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1541 sizeof(*cmd));
1542
1543 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr);
1544 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1545 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap);
1546
1547 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1548 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__,
1549 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap);
1550
1551 ret = ath12k_wmi_cmd_send(wmi, skb,
1552 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID);
1553 if (ret) {
1554 ath12k_warn(ar->ab,
1555 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID");
1556 dev_kfree_skb(skb);
1557 }
1558
1559 return ret;
1560 }
1561
ath12k_wmi_pdev_set_param(struct ath12k * ar,u32 param_id,u32 param_value,u8 pdev_id)1562 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
1563 u32 param_value, u8 pdev_id)
1564 {
1565 struct ath12k_wmi_pdev *wmi = ar->wmi;
1566 struct wmi_pdev_set_param_cmd *cmd;
1567 struct sk_buff *skb;
1568 int ret;
1569
1570 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1571 if (!skb)
1572 return -ENOMEM;
1573
1574 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
1575 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD,
1576 sizeof(*cmd));
1577 cmd->pdev_id = cpu_to_le32(pdev_id);
1578 cmd->param_id = cpu_to_le32(param_id);
1579 cmd->param_value = cpu_to_le32(param_value);
1580
1581 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1582 "WMI pdev set param %d pdev id %d value %d\n",
1583 param_id, pdev_id, param_value);
1584
1585 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID);
1586 if (ret) {
1587 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1588 dev_kfree_skb(skb);
1589 }
1590
1591 return ret;
1592 }
1593
ath12k_wmi_pdev_set_ps_mode(struct ath12k * ar,int vdev_id,u32 enable)1594 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable)
1595 {
1596 struct ath12k_wmi_pdev *wmi = ar->wmi;
1597 struct wmi_pdev_set_ps_mode_cmd *cmd;
1598 struct sk_buff *skb;
1599 int ret;
1600
1601 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1602 if (!skb)
1603 return -ENOMEM;
1604
1605 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data;
1606 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD,
1607 sizeof(*cmd));
1608 cmd->vdev_id = cpu_to_le32(vdev_id);
1609 cmd->sta_ps_mode = cpu_to_le32(enable);
1610
1611 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1612 "WMI vdev set psmode %d vdev id %d\n",
1613 enable, vdev_id);
1614
1615 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
1616 if (ret) {
1617 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1618 dev_kfree_skb(skb);
1619 }
1620
1621 return ret;
1622 }
1623
ath12k_wmi_pdev_suspend(struct ath12k * ar,u32 suspend_opt,u32 pdev_id)1624 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
1625 u32 pdev_id)
1626 {
1627 struct ath12k_wmi_pdev *wmi = ar->wmi;
1628 struct wmi_pdev_suspend_cmd *cmd;
1629 struct sk_buff *skb;
1630 int ret;
1631
1632 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1633 if (!skb)
1634 return -ENOMEM;
1635
1636 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
1637
1638 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD,
1639 sizeof(*cmd));
1640
1641 cmd->suspend_opt = cpu_to_le32(suspend_opt);
1642 cmd->pdev_id = cpu_to_le32(pdev_id);
1643
1644 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1645 "WMI pdev suspend pdev_id %d\n", pdev_id);
1646
1647 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID);
1648 if (ret) {
1649 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n");
1650 dev_kfree_skb(skb);
1651 }
1652
1653 return ret;
1654 }
1655
ath12k_wmi_pdev_resume(struct ath12k * ar,u32 pdev_id)1656 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id)
1657 {
1658 struct ath12k_wmi_pdev *wmi = ar->wmi;
1659 struct wmi_pdev_resume_cmd *cmd;
1660 struct sk_buff *skb;
1661 int ret;
1662
1663 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1664 if (!skb)
1665 return -ENOMEM;
1666
1667 cmd = (struct wmi_pdev_resume_cmd *)skb->data;
1668
1669 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD,
1670 sizeof(*cmd));
1671 cmd->pdev_id = cpu_to_le32(pdev_id);
1672
1673 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1674 "WMI pdev resume pdev id %d\n", pdev_id);
1675
1676 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID);
1677 if (ret) {
1678 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n");
1679 dev_kfree_skb(skb);
1680 }
1681
1682 return ret;
1683 }
1684
1685 /* TODO FW Support for the cmd is not available yet.
1686 * Can be tested once the command and corresponding
1687 * event is implemented in FW
1688 */
ath12k_wmi_pdev_bss_chan_info_request(struct ath12k * ar,enum wmi_bss_chan_info_req_type type)1689 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
1690 enum wmi_bss_chan_info_req_type type)
1691 {
1692 struct ath12k_wmi_pdev *wmi = ar->wmi;
1693 struct wmi_pdev_bss_chan_info_req_cmd *cmd;
1694 struct sk_buff *skb;
1695 int ret;
1696
1697 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1698 if (!skb)
1699 return -ENOMEM;
1700
1701 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data;
1702
1703 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1704 sizeof(*cmd));
1705 cmd->req_type = cpu_to_le32(type);
1706 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1707
1708 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1709 "WMI bss chan info req type %d\n", type);
1710
1711 ret = ath12k_wmi_cmd_send(wmi, skb,
1712 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID);
1713 if (ret) {
1714 ath12k_warn(ar->ab,
1715 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n");
1716 dev_kfree_skb(skb);
1717 }
1718
1719 return ret;
1720 }
1721
ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k * ar,u8 * peer_addr,struct ath12k_wmi_ap_ps_arg * arg)1722 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
1723 struct ath12k_wmi_ap_ps_arg *arg)
1724 {
1725 struct ath12k_wmi_pdev *wmi = ar->wmi;
1726 struct wmi_ap_ps_peer_cmd *cmd;
1727 struct sk_buff *skb;
1728 int ret;
1729
1730 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1731 if (!skb)
1732 return -ENOMEM;
1733
1734 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
1735 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD,
1736 sizeof(*cmd));
1737
1738 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1739 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1740 cmd->param = cpu_to_le32(arg->param);
1741 cmd->value = cpu_to_le32(arg->value);
1742
1743 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1744 "WMI set ap ps vdev id %d peer %pM param %d value %d\n",
1745 arg->vdev_id, peer_addr, arg->param, arg->value);
1746
1747 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID);
1748 if (ret) {
1749 ath12k_warn(ar->ab,
1750 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n");
1751 dev_kfree_skb(skb);
1752 }
1753
1754 return ret;
1755 }
1756
ath12k_wmi_set_sta_ps_param(struct ath12k * ar,u32 vdev_id,u32 param,u32 param_value)1757 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
1758 u32 param, u32 param_value)
1759 {
1760 struct ath12k_wmi_pdev *wmi = ar->wmi;
1761 struct wmi_sta_powersave_param_cmd *cmd;
1762 struct sk_buff *skb;
1763 int ret;
1764
1765 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1766 if (!skb)
1767 return -ENOMEM;
1768
1769 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
1770 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1771 sizeof(*cmd));
1772
1773 cmd->vdev_id = cpu_to_le32(vdev_id);
1774 cmd->param = cpu_to_le32(param);
1775 cmd->value = cpu_to_le32(param_value);
1776
1777 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1778 "WMI set sta ps vdev_id %d param %d value %d\n",
1779 vdev_id, param, param_value);
1780
1781 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
1782 if (ret) {
1783 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID");
1784 dev_kfree_skb(skb);
1785 }
1786
1787 return ret;
1788 }
1789
ath12k_wmi_force_fw_hang_cmd(struct ath12k * ar,u32 type,u32 delay_time_ms)1790 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms)
1791 {
1792 struct ath12k_wmi_pdev *wmi = ar->wmi;
1793 struct wmi_force_fw_hang_cmd *cmd;
1794 struct sk_buff *skb;
1795 int ret, len;
1796
1797 len = sizeof(*cmd);
1798
1799 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1800 if (!skb)
1801 return -ENOMEM;
1802
1803 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
1804 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD,
1805 len);
1806
1807 cmd->type = cpu_to_le32(type);
1808 cmd->delay_time_ms = cpu_to_le32(delay_time_ms);
1809
1810 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID);
1811
1812 if (ret) {
1813 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID");
1814 dev_kfree_skb(skb);
1815 }
1816 return ret;
1817 }
1818
ath12k_wmi_vdev_set_param_cmd(struct ath12k * ar,u32 vdev_id,u32 param_id,u32 param_value)1819 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
1820 u32 param_id, u32 param_value)
1821 {
1822 struct ath12k_wmi_pdev *wmi = ar->wmi;
1823 struct wmi_vdev_set_param_cmd *cmd;
1824 struct sk_buff *skb;
1825 int ret;
1826
1827 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1828 if (!skb)
1829 return -ENOMEM;
1830
1831 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
1832 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD,
1833 sizeof(*cmd));
1834
1835 cmd->vdev_id = cpu_to_le32(vdev_id);
1836 cmd->param_id = cpu_to_le32(param_id);
1837 cmd->param_value = cpu_to_le32(param_value);
1838
1839 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1840 "WMI vdev id 0x%x set param %d value %d\n",
1841 vdev_id, param_id, param_value);
1842
1843 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID);
1844 if (ret) {
1845 ath12k_warn(ar->ab,
1846 "failed to send WMI_VDEV_SET_PARAM_CMDID\n");
1847 dev_kfree_skb(skb);
1848 }
1849
1850 return ret;
1851 }
1852
ath12k_wmi_send_pdev_temperature_cmd(struct ath12k * ar)1853 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar)
1854 {
1855 struct ath12k_wmi_pdev *wmi = ar->wmi;
1856 struct wmi_get_pdev_temperature_cmd *cmd;
1857 struct sk_buff *skb;
1858 int ret;
1859
1860 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1861 if (!skb)
1862 return -ENOMEM;
1863
1864 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
1865 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1866 sizeof(*cmd));
1867 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1868
1869 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1870 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
1871
1872 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
1873 if (ret) {
1874 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
1875 dev_kfree_skb(skb);
1876 }
1877
1878 return ret;
1879 }
1880
ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k * ar,u32 vdev_id,u32 bcn_ctrl_op)1881 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
1882 u32 vdev_id, u32 bcn_ctrl_op)
1883 {
1884 struct ath12k_wmi_pdev *wmi = ar->wmi;
1885 struct wmi_bcn_offload_ctrl_cmd *cmd;
1886 struct sk_buff *skb;
1887 int ret;
1888
1889 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1890 if (!skb)
1891 return -ENOMEM;
1892
1893 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data;
1894 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1895 sizeof(*cmd));
1896
1897 cmd->vdev_id = cpu_to_le32(vdev_id);
1898 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op);
1899
1900 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1901 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n",
1902 vdev_id, bcn_ctrl_op);
1903
1904 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID);
1905 if (ret) {
1906 ath12k_warn(ar->ab,
1907 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n");
1908 dev_kfree_skb(skb);
1909 }
1910
1911 return ret;
1912 }
1913
ath12k_wmi_p2p_go_bcn_ie(struct ath12k * ar,u32 vdev_id,const u8 * p2p_ie)1914 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
1915 const u8 *p2p_ie)
1916 {
1917 struct ath12k_wmi_pdev *wmi = ar->wmi;
1918 struct wmi_p2p_go_set_beacon_ie_cmd *cmd;
1919 size_t p2p_ie_len, aligned_len;
1920 struct wmi_tlv *tlv;
1921 struct sk_buff *skb;
1922 void *ptr;
1923 int ret, len;
1924
1925 p2p_ie_len = p2p_ie[1] + 2;
1926 aligned_len = roundup(p2p_ie_len, sizeof(u32));
1927
1928 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
1929
1930 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1931 if (!skb)
1932 return -ENOMEM;
1933
1934 ptr = skb->data;
1935 cmd = ptr;
1936 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE,
1937 sizeof(*cmd));
1938 cmd->vdev_id = cpu_to_le32(vdev_id);
1939 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len);
1940
1941 ptr += sizeof(*cmd);
1942 tlv = ptr;
1943 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
1944 aligned_len);
1945 memcpy(tlv->value, p2p_ie, p2p_ie_len);
1946
1947 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE);
1948 if (ret) {
1949 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n");
1950 dev_kfree_skb(skb);
1951 }
1952
1953 return ret;
1954 }
1955
ath12k_wmi_bcn_tmpl(struct ath12k_link_vif * arvif,struct ieee80211_mutable_offsets * offs,struct sk_buff * bcn,struct ath12k_wmi_bcn_tmpl_ema_arg * ema_args)1956 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif,
1957 struct ieee80211_mutable_offsets *offs,
1958 struct sk_buff *bcn,
1959 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args)
1960 {
1961 struct ath12k *ar = arvif->ar;
1962 struct ath12k_wmi_pdev *wmi = ar->wmi;
1963 struct ath12k_base *ab = ar->ab;
1964 struct wmi_bcn_tmpl_cmd *cmd;
1965 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info;
1966 struct ath12k_vif *ahvif = arvif->ahvif;
1967 struct ieee80211_bss_conf *conf;
1968 u32 vdev_id = arvif->vdev_id;
1969 struct wmi_tlv *tlv;
1970 struct sk_buff *skb;
1971 u32 ema_params = 0;
1972 void *ptr;
1973 int ret, len;
1974 size_t aligned_len = roundup(bcn->len, 4);
1975
1976 conf = ath12k_mac_get_link_bss_conf(arvif);
1977 if (!conf) {
1978 ath12k_warn(ab,
1979 "unable to access bss link conf in beacon template command for vif %pM link %u\n",
1980 ahvif->vif->addr, arvif->link_id);
1981 return -EINVAL;
1982 }
1983
1984 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
1985
1986 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1987 if (!skb)
1988 return -ENOMEM;
1989
1990 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data;
1991 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD,
1992 sizeof(*cmd));
1993 cmd->vdev_id = cpu_to_le32(vdev_id);
1994 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset);
1995
1996 if (conf->csa_active) {
1997 cmd->csa_switch_count_offset =
1998 cpu_to_le32(offs->cntdwn_counter_offs[0]);
1999 cmd->ext_csa_switch_count_offset =
2000 cpu_to_le32(offs->cntdwn_counter_offs[1]);
2001 cmd->csa_event_bitmap = cpu_to_le32(0xFFFFFFFF);
2002 arvif->current_cntdown_counter = bcn->data[offs->cntdwn_counter_offs[0]];
2003 }
2004
2005 cmd->buf_len = cpu_to_le32(bcn->len);
2006 cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off);
2007 if (ema_args) {
2008 u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT);
2009 u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX);
2010 if (ema_args->bcn_index == 0)
2011 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST);
2012 if (ema_args->bcn_index + 1 == ema_args->bcn_cnt)
2013 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST);
2014 cmd->ema_params = cpu_to_le32(ema_params);
2015 }
2016
2017 ptr = skb->data + sizeof(*cmd);
2018
2019 bcn_prb_info = ptr;
2020 len = sizeof(*bcn_prb_info);
2021 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
2022 len);
2023 bcn_prb_info->caps = 0;
2024 bcn_prb_info->erp = 0;
2025
2026 ptr += sizeof(*bcn_prb_info);
2027
2028 tlv = ptr;
2029 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
2030 memcpy(tlv->value, bcn->data, bcn->len);
2031
2032 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID);
2033 if (ret) {
2034 ath12k_warn(ab, "failed to send WMI_BCN_TMPL_CMDID\n");
2035 dev_kfree_skb(skb);
2036 }
2037
2038 return ret;
2039 }
2040
ath12k_wmi_vdev_install_key(struct ath12k * ar,struct wmi_vdev_install_key_arg * arg)2041 int ath12k_wmi_vdev_install_key(struct ath12k *ar,
2042 struct wmi_vdev_install_key_arg *arg)
2043 {
2044 struct ath12k_wmi_pdev *wmi = ar->wmi;
2045 struct wmi_vdev_install_key_cmd *cmd;
2046 struct wmi_tlv *tlv;
2047 struct sk_buff *skb;
2048 int ret, len, key_len_aligned;
2049
2050 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key
2051 * length is specified in cmd->key_len.
2052 */
2053 key_len_aligned = roundup(arg->key_len, 4);
2054
2055 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned;
2056
2057 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2058 if (!skb)
2059 return -ENOMEM;
2060
2061 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
2062 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD,
2063 sizeof(*cmd));
2064 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2065 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
2066 cmd->key_idx = cpu_to_le32(arg->key_idx);
2067 cmd->key_flags = cpu_to_le32(arg->key_flags);
2068 cmd->key_cipher = cpu_to_le32(arg->key_cipher);
2069 cmd->key_len = cpu_to_le32(arg->key_len);
2070 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len);
2071 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len);
2072
2073 if (arg->key_rsc_counter)
2074 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter);
2075
2076 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
2077 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned);
2078 memcpy(tlv->value, arg->key_data, arg->key_len);
2079
2080 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2081 "WMI vdev install key idx %d cipher %d len %d\n",
2082 arg->key_idx, arg->key_cipher, arg->key_len);
2083
2084 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
2085 if (ret) {
2086 ath12k_warn(ar->ab,
2087 "failed to send WMI_VDEV_INSTALL_KEY cmd\n");
2088 dev_kfree_skb(skb);
2089 }
2090
2091 return ret;
2092 }
2093
ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd * cmd,struct ath12k_wmi_peer_assoc_arg * arg,bool hw_crypto_disabled)2094 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
2095 struct ath12k_wmi_peer_assoc_arg *arg,
2096 bool hw_crypto_disabled)
2097 {
2098 cmd->peer_flags = 0;
2099 cmd->peer_flags_ext = 0;
2100
2101 if (arg->is_wme_set) {
2102 if (arg->qos_flag)
2103 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS);
2104 if (arg->apsd_flag)
2105 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD);
2106 if (arg->ht_flag)
2107 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT);
2108 if (arg->bw_40)
2109 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ);
2110 if (arg->bw_80)
2111 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ);
2112 if (arg->bw_160)
2113 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ);
2114 if (arg->bw_320)
2115 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ);
2116
2117 /* Typically if STBC is enabled for VHT it should be enabled
2118 * for HT as well
2119 **/
2120 if (arg->stbc_flag)
2121 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC);
2122
2123 /* Typically if LDPC is enabled for VHT it should be enabled
2124 * for HT as well
2125 **/
2126 if (arg->ldpc_flag)
2127 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC);
2128
2129 if (arg->static_mimops_flag)
2130 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS);
2131 if (arg->dynamic_mimops_flag)
2132 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS);
2133 if (arg->spatial_mux_flag)
2134 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX);
2135 if (arg->vht_flag)
2136 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT);
2137 if (arg->he_flag)
2138 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE);
2139 if (arg->twt_requester)
2140 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ);
2141 if (arg->twt_responder)
2142 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP);
2143 if (arg->eht_flag)
2144 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT);
2145 }
2146
2147 /* Suppress authorization for all AUTH modes that need 4-way handshake
2148 * (during re-association).
2149 * Authorization will be done for these modes on key installation.
2150 */
2151 if (arg->auth_flag)
2152 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
2153 if (arg->need_ptk_4_way) {
2154 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
2155 if (!hw_crypto_disabled)
2156 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
2157 }
2158 if (arg->need_gtk_2_way)
2159 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY);
2160 /* safe mode bypass the 4-way handshake */
2161 if (arg->safe_mode_enabled)
2162 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY |
2163 WMI_PEER_NEED_GTK_2_WAY));
2164
2165 if (arg->is_pmf_enabled)
2166 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF);
2167
2168 /* Disable AMSDU for station transmit, if user configures it */
2169 /* Disable AMSDU for AP transmit to 11n Stations, if user configures
2170 * it
2171 * if (arg->amsdu_disable) Add after FW support
2172 **/
2173
2174 /* Target asserts if node is marked HT and all MCS is set to 0.
2175 * Mark the node as non-HT if all the mcs rates are disabled through
2176 * iwpriv
2177 **/
2178 if (arg->peer_ht_rates.num_rates == 0)
2179 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT);
2180 }
2181
ath12k_wmi_send_peer_assoc_cmd(struct ath12k * ar,struct ath12k_wmi_peer_assoc_arg * arg)2182 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
2183 struct ath12k_wmi_peer_assoc_arg *arg)
2184 {
2185 struct ath12k_wmi_pdev *wmi = ar->wmi;
2186 struct wmi_peer_assoc_complete_cmd *cmd;
2187 struct ath12k_wmi_vht_rate_set_params *mcs;
2188 struct ath12k_wmi_he_rate_set_params *he_mcs;
2189 struct ath12k_wmi_eht_rate_set_params *eht_mcs;
2190 struct wmi_peer_assoc_mlo_params *ml_params;
2191 struct wmi_peer_assoc_mlo_partner_info_params *partner_info;
2192 struct sk_buff *skb;
2193 struct wmi_tlv *tlv;
2194 void *ptr;
2195 u32 peer_legacy_rates_align, eml_pad_delay, eml_trans_delay;
2196 u32 peer_ht_rates_align, eml_trans_timeout;
2197 int i, ret, len;
2198 u16 eml_cap;
2199 __le32 v;
2200
2201 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates,
2202 sizeof(u32));
2203 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates,
2204 sizeof(u32));
2205
2206 len = sizeof(*cmd) +
2207 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) +
2208 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) +
2209 sizeof(*mcs) + TLV_HDR_SIZE +
2210 (sizeof(*he_mcs) * arg->peer_he_mcs_count) +
2211 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count);
2212
2213 if (arg->ml.enabled)
2214 len += TLV_HDR_SIZE + sizeof(*ml_params) +
2215 TLV_HDR_SIZE + (arg->ml.num_partner_links * sizeof(*partner_info));
2216 else
2217 len += (2 * TLV_HDR_SIZE);
2218
2219 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2220 if (!skb)
2221 return -ENOMEM;
2222
2223 ptr = skb->data;
2224
2225 cmd = ptr;
2226 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
2227 sizeof(*cmd));
2228
2229 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2230
2231 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc);
2232 cmd->peer_associd = cpu_to_le32(arg->peer_associd);
2233 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
2234
2235 ath12k_wmi_copy_peer_flags(cmd, arg,
2236 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED,
2237 &ar->ab->dev_flags));
2238
2239 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac);
2240
2241 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps);
2242 cmd->peer_caps = cpu_to_le32(arg->peer_caps);
2243 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval);
2244 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps);
2245 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu);
2246 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density);
2247 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps);
2248 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode);
2249
2250 /* Update 11ax capabilities */
2251 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]);
2252 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]);
2253 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal);
2254 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz);
2255 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops);
2256 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
2257 cmd->peer_he_cap_phy[i] =
2258 cpu_to_le32(arg->peer_he_cap_phyinfo[i]);
2259 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1);
2260 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask);
2261 for (i = 0; i < WMI_MAX_NUM_SS; i++)
2262 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] =
2263 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]);
2264
2265 /* Update 11be capabilities */
2266 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac),
2267 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac),
2268 0);
2269 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy),
2270 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy),
2271 0);
2272 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet),
2273 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0);
2274
2275 /* Update peer legacy rate information */
2276 ptr += sizeof(*cmd);
2277
2278 tlv = ptr;
2279 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align);
2280
2281 ptr += TLV_HDR_SIZE;
2282
2283 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates);
2284 memcpy(ptr, arg->peer_legacy_rates.rates,
2285 arg->peer_legacy_rates.num_rates);
2286
2287 /* Update peer HT rate information */
2288 ptr += peer_legacy_rates_align;
2289
2290 tlv = ptr;
2291 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align);
2292 ptr += TLV_HDR_SIZE;
2293 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates);
2294 memcpy(ptr, arg->peer_ht_rates.rates,
2295 arg->peer_ht_rates.num_rates);
2296
2297 /* VHT Rates */
2298 ptr += peer_ht_rates_align;
2299
2300 mcs = ptr;
2301
2302 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET,
2303 sizeof(*mcs));
2304
2305 cmd->peer_nss = cpu_to_le32(arg->peer_nss);
2306
2307 /* Update bandwidth-NSS mapping */
2308 cmd->peer_bw_rxnss_override = 0;
2309 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override);
2310
2311 if (arg->vht_capable) {
2312 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate);
2313 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set);
2314 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate);
2315 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set);
2316 }
2317
2318 /* HE Rates */
2319 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count);
2320 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate);
2321
2322 ptr += sizeof(*mcs);
2323
2324 len = arg->peer_he_mcs_count * sizeof(*he_mcs);
2325
2326 tlv = ptr;
2327 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2328 ptr += TLV_HDR_SIZE;
2329
2330 /* Loop through the HE rate set */
2331 for (i = 0; i < arg->peer_he_mcs_count; i++) {
2332 he_mcs = ptr;
2333 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2334 sizeof(*he_mcs));
2335
2336 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]);
2337 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]);
2338 ptr += sizeof(*he_mcs);
2339 }
2340
2341 tlv = ptr;
2342 len = arg->ml.enabled ? sizeof(*ml_params) : 0;
2343 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2344 ptr += TLV_HDR_SIZE;
2345 if (!len)
2346 goto skip_ml_params;
2347
2348 ml_params = ptr;
2349 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_ASSOC_PARAMS,
2350 len);
2351 ml_params->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2352
2353 if (arg->ml.assoc_link)
2354 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2355
2356 if (arg->ml.primary_umac)
2357 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2358
2359 if (arg->ml.logical_link_idx_valid)
2360 ml_params->flags |=
2361 cpu_to_le32(ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID);
2362
2363 if (arg->ml.peer_id_valid)
2364 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PEER_ID_VALID);
2365
2366 ether_addr_copy(ml_params->mld_addr.addr, arg->ml.mld_addr);
2367 ml_params->logical_link_idx = cpu_to_le32(arg->ml.logical_link_idx);
2368 ml_params->ml_peer_id = cpu_to_le32(arg->ml.ml_peer_id);
2369 ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id);
2370
2371 eml_cap = arg->ml.eml_cap;
2372 if (u16_get_bits(eml_cap, IEEE80211_EML_CAP_EMLSR_SUPP)) {
2373 /* Padding delay */
2374 eml_pad_delay = ieee80211_emlsr_pad_delay_in_us(eml_cap);
2375 ml_params->emlsr_padding_delay_us = cpu_to_le32(eml_pad_delay);
2376 /* Transition delay */
2377 eml_trans_delay = ieee80211_emlsr_trans_delay_in_us(eml_cap);
2378 ml_params->emlsr_trans_delay_us = cpu_to_le32(eml_trans_delay);
2379 /* Transition timeout */
2380 eml_trans_timeout = ieee80211_eml_trans_timeout_in_us(eml_cap);
2381 ml_params->emlsr_trans_timeout_us =
2382 cpu_to_le32(eml_trans_timeout);
2383 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi peer %pM emlsr padding delay %u, trans delay %u trans timeout %u",
2384 arg->peer_mac, eml_pad_delay, eml_trans_delay,
2385 eml_trans_timeout);
2386 }
2387
2388 ptr += sizeof(*ml_params);
2389
2390 skip_ml_params:
2391 /* Loop through the EHT rate set */
2392 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs);
2393 tlv = ptr;
2394 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2395 ptr += TLV_HDR_SIZE;
2396
2397 for (i = 0; i < arg->peer_eht_mcs_count; i++) {
2398 eht_mcs = ptr;
2399 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_EHT_RATE_SET,
2400 sizeof(*eht_mcs));
2401
2402 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]);
2403 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]);
2404 ptr += sizeof(*eht_mcs);
2405 }
2406
2407 /* Update MCS15 capability */
2408 if (arg->eht_disable_mcs15)
2409 cmd->peer_eht_ops = cpu_to_le32(IEEE80211_EHT_OPER_MCS15_DISABLE);
2410
2411 tlv = ptr;
2412 len = arg->ml.enabled ? arg->ml.num_partner_links * sizeof(*partner_info) : 0;
2413 /* fill ML Partner links */
2414 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2415 ptr += TLV_HDR_SIZE;
2416
2417 if (len == 0)
2418 goto send;
2419
2420 for (i = 0; i < arg->ml.num_partner_links; i++) {
2421 u32 cmd = WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC;
2422
2423 partner_info = ptr;
2424 partner_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(cmd,
2425 sizeof(*partner_info));
2426 partner_info->vdev_id = cpu_to_le32(arg->ml.partner_info[i].vdev_id);
2427 partner_info->hw_link_id =
2428 cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
2429 partner_info->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2430
2431 if (arg->ml.partner_info[i].assoc_link)
2432 partner_info->flags |=
2433 cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2434
2435 if (arg->ml.partner_info[i].primary_umac)
2436 partner_info->flags |=
2437 cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2438
2439 if (arg->ml.partner_info[i].logical_link_idx_valid) {
2440 v = cpu_to_le32(ATH12K_WMI_FLAG_MLO_LINK_ID_VALID);
2441 partner_info->flags |= v;
2442 }
2443
2444 partner_info->logical_link_idx =
2445 cpu_to_le32(arg->ml.partner_info[i].logical_link_idx);
2446 ptr += sizeof(*partner_info);
2447 }
2448
2449 send:
2450 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2451 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x peer_eht_ops %x\n",
2452 cmd->vdev_id, cmd->peer_associd, arg->peer_mac,
2453 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps,
2454 cmd->peer_listen_intval, cmd->peer_ht_caps,
2455 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode,
2456 cmd->peer_mpdu_density,
2457 cmd->peer_vht_caps, cmd->peer_he_cap_info,
2458 cmd->peer_he_ops, cmd->peer_he_cap_info_ext,
2459 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1],
2460 cmd->peer_he_cap_phy[2],
2461 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext,
2462 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1],
2463 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1],
2464 cmd->peer_eht_cap_phy[2], cmd->peer_eht_ops);
2465
2466 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID);
2467 if (ret) {
2468 ath12k_warn(ar->ab,
2469 "failed to send WMI_PEER_ASSOC_CMDID\n");
2470 dev_kfree_skb(skb);
2471 }
2472
2473 return ret;
2474 }
2475
ath12k_wmi_start_scan_init(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2476 void ath12k_wmi_start_scan_init(struct ath12k *ar,
2477 struct ath12k_wmi_scan_req_arg *arg)
2478 {
2479 /* setup commonly used values */
2480 arg->scan_req_id = 1;
2481 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2482 arg->dwell_time_active = 50;
2483 arg->dwell_time_active_2g = 0;
2484 arg->dwell_time_passive = 150;
2485 arg->dwell_time_active_6g = 70;
2486 arg->dwell_time_passive_6g = 70;
2487 arg->min_rest_time = 50;
2488 arg->max_rest_time = 500;
2489 arg->repeat_probe_time = 0;
2490 arg->probe_spacing_time = 0;
2491 arg->idle_time = 0;
2492 arg->max_scan_time = 20000;
2493 arg->probe_delay = 5;
2494 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED |
2495 WMI_SCAN_EVENT_COMPLETED |
2496 WMI_SCAN_EVENT_BSS_CHANNEL |
2497 WMI_SCAN_EVENT_FOREIGN_CHAN |
2498 WMI_SCAN_EVENT_DEQUEUED;
2499 arg->scan_f_chan_stat_evnt = 1;
2500 arg->num_bssid = 1;
2501
2502 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
2503 * ZEROs in probe request
2504 */
2505 eth_broadcast_addr(arg->bssid_list[0].addr);
2506 }
2507
ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd * cmd,struct ath12k_wmi_scan_req_arg * arg)2508 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd,
2509 struct ath12k_wmi_scan_req_arg *arg)
2510 {
2511 /* Scan events subscription */
2512 if (arg->scan_ev_started)
2513 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED);
2514 if (arg->scan_ev_completed)
2515 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED);
2516 if (arg->scan_ev_bss_chan)
2517 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL);
2518 if (arg->scan_ev_foreign_chan)
2519 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN);
2520 if (arg->scan_ev_dequeued)
2521 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED);
2522 if (arg->scan_ev_preempted)
2523 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED);
2524 if (arg->scan_ev_start_failed)
2525 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED);
2526 if (arg->scan_ev_restarted)
2527 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED);
2528 if (arg->scan_ev_foreign_chn_exit)
2529 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT);
2530 if (arg->scan_ev_suspended)
2531 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED);
2532 if (arg->scan_ev_resumed)
2533 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED);
2534
2535 /** Set scan control flags */
2536 cmd->scan_ctrl_flags = 0;
2537 if (arg->scan_f_passive)
2538 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE);
2539 if (arg->scan_f_strict_passive_pch)
2540 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN);
2541 if (arg->scan_f_promisc_mode)
2542 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS);
2543 if (arg->scan_f_capture_phy_err)
2544 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR);
2545 if (arg->scan_f_half_rate)
2546 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT);
2547 if (arg->scan_f_quarter_rate)
2548 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT);
2549 if (arg->scan_f_cck_rates)
2550 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES);
2551 if (arg->scan_f_ofdm_rates)
2552 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES);
2553 if (arg->scan_f_chan_stat_evnt)
2554 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT);
2555 if (arg->scan_f_filter_prb_req)
2556 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ);
2557 if (arg->scan_f_bcast_probe)
2558 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ);
2559 if (arg->scan_f_offchan_mgmt_tx)
2560 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX);
2561 if (arg->scan_f_offchan_data_tx)
2562 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX);
2563 if (arg->scan_f_force_active_dfs_chn)
2564 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS);
2565 if (arg->scan_f_add_tpc_ie_in_probe)
2566 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ);
2567 if (arg->scan_f_add_ds_ie_in_probe)
2568 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ);
2569 if (arg->scan_f_add_spoofed_mac_in_probe)
2570 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ);
2571 if (arg->scan_f_add_rand_seq_in_probe)
2572 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ);
2573 if (arg->scan_f_en_ie_whitelist_in_probe)
2574 cmd->scan_ctrl_flags |=
2575 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ);
2576
2577 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode,
2578 WMI_SCAN_DWELL_MODE_MASK);
2579 }
2580
ath12k_wmi_send_scan_start_cmd(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2581 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
2582 struct ath12k_wmi_scan_req_arg *arg)
2583 {
2584 struct ath12k_wmi_pdev *wmi = ar->wmi;
2585 struct wmi_start_scan_cmd *cmd;
2586 struct ath12k_wmi_ssid_params *ssid = NULL;
2587 struct ath12k_wmi_mac_addr_params *bssid;
2588 struct sk_buff *skb;
2589 struct wmi_tlv *tlv;
2590 void *ptr;
2591 int i, ret, len;
2592 u32 *tmp_ptr, extraie_len_with_pad = 0;
2593 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;
2594 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;
2595
2596 len = sizeof(*cmd);
2597
2598 len += TLV_HDR_SIZE;
2599 if (arg->num_chan)
2600 len += arg->num_chan * sizeof(u32);
2601
2602 len += TLV_HDR_SIZE;
2603 if (arg->num_ssids)
2604 len += arg->num_ssids * sizeof(*ssid);
2605
2606 len += TLV_HDR_SIZE;
2607 if (arg->num_bssid)
2608 len += sizeof(*bssid) * arg->num_bssid;
2609
2610 if (arg->num_hint_bssid)
2611 len += TLV_HDR_SIZE +
2612 arg->num_hint_bssid * sizeof(*hint_bssid);
2613
2614 if (arg->num_hint_s_ssid)
2615 len += TLV_HDR_SIZE +
2616 arg->num_hint_s_ssid * sizeof(*s_ssid);
2617
2618 len += TLV_HDR_SIZE;
2619 if (arg->extraie.len)
2620 extraie_len_with_pad =
2621 roundup(arg->extraie.len, sizeof(u32));
2622 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
2623 len += extraie_len_with_pad;
2624 } else {
2625 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
2626 arg->extraie.len);
2627 extraie_len_with_pad = 0;
2628 }
2629
2630 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2631 if (!skb)
2632 return -ENOMEM;
2633
2634 ptr = skb->data;
2635
2636 cmd = ptr;
2637 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD,
2638 sizeof(*cmd));
2639
2640 cmd->scan_id = cpu_to_le32(arg->scan_id);
2641 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
2642 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2643 if (ar->state_11d == ATH12K_11D_PREPARING)
2644 arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM;
2645 else
2646 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2647 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
2648
2649 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
2650
2651 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active);
2652 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g);
2653 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive);
2654 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g);
2655 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g);
2656 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time);
2657 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time);
2658 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time);
2659 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time);
2660 cmd->idle_time = cpu_to_le32(arg->idle_time);
2661 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time);
2662 cmd->probe_delay = cpu_to_le32(arg->probe_delay);
2663 cmd->burst_duration = cpu_to_le32(arg->burst_duration);
2664 cmd->num_chan = cpu_to_le32(arg->num_chan);
2665 cmd->num_bssid = cpu_to_le32(arg->num_bssid);
2666 cmd->num_ssids = cpu_to_le32(arg->num_ssids);
2667 cmd->ie_len = cpu_to_le32(arg->extraie.len);
2668 cmd->n_probes = cpu_to_le32(arg->n_probes);
2669
2670 ptr += sizeof(*cmd);
2671
2672 len = arg->num_chan * sizeof(u32);
2673
2674 tlv = ptr;
2675 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len);
2676 ptr += TLV_HDR_SIZE;
2677 tmp_ptr = (u32 *)ptr;
2678
2679 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4);
2680
2681 ptr += len;
2682
2683 len = arg->num_ssids * sizeof(*ssid);
2684 tlv = ptr;
2685 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2686
2687 ptr += TLV_HDR_SIZE;
2688
2689 if (arg->num_ssids) {
2690 ssid = ptr;
2691 for (i = 0; i < arg->num_ssids; ++i) {
2692 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len);
2693 memcpy(ssid->ssid, arg->ssid[i].ssid,
2694 arg->ssid[i].ssid_len);
2695 ssid++;
2696 }
2697 }
2698
2699 ptr += (arg->num_ssids * sizeof(*ssid));
2700 len = arg->num_bssid * sizeof(*bssid);
2701 tlv = ptr;
2702 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2703
2704 ptr += TLV_HDR_SIZE;
2705 bssid = ptr;
2706
2707 if (arg->num_bssid) {
2708 for (i = 0; i < arg->num_bssid; ++i) {
2709 ether_addr_copy(bssid->addr,
2710 arg->bssid_list[i].addr);
2711 bssid++;
2712 }
2713 }
2714
2715 ptr += arg->num_bssid * sizeof(*bssid);
2716
2717 len = extraie_len_with_pad;
2718 tlv = ptr;
2719 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
2720 ptr += TLV_HDR_SIZE;
2721
2722 if (extraie_len_with_pad)
2723 memcpy(ptr, arg->extraie.ptr,
2724 arg->extraie.len);
2725
2726 ptr += extraie_len_with_pad;
2727
2728 if (arg->num_hint_s_ssid) {
2729 len = arg->num_hint_s_ssid * sizeof(*s_ssid);
2730 tlv = ptr;
2731 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2732 ptr += TLV_HDR_SIZE;
2733 s_ssid = ptr;
2734 for (i = 0; i < arg->num_hint_s_ssid; ++i) {
2735 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags;
2736 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid;
2737 s_ssid++;
2738 }
2739 ptr += len;
2740 }
2741
2742 if (arg->num_hint_bssid) {
2743 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg);
2744 tlv = ptr;
2745 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2746 ptr += TLV_HDR_SIZE;
2747 hint_bssid = ptr;
2748 for (i = 0; i < arg->num_hint_bssid; ++i) {
2749 hint_bssid->freq_flags =
2750 arg->hint_bssid[i].freq_flags;
2751 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0],
2752 &hint_bssid->bssid.addr[0]);
2753 hint_bssid++;
2754 }
2755 }
2756
2757 ret = ath12k_wmi_cmd_send(wmi, skb,
2758 WMI_START_SCAN_CMDID);
2759 if (ret) {
2760 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n");
2761 dev_kfree_skb(skb);
2762 }
2763
2764 return ret;
2765 }
2766
ath12k_wmi_send_scan_stop_cmd(struct ath12k * ar,struct ath12k_wmi_scan_cancel_arg * arg)2767 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
2768 struct ath12k_wmi_scan_cancel_arg *arg)
2769 {
2770 struct ath12k_wmi_pdev *wmi = ar->wmi;
2771 struct wmi_stop_scan_cmd *cmd;
2772 struct sk_buff *skb;
2773 int ret;
2774
2775 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2776 if (!skb)
2777 return -ENOMEM;
2778
2779 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2780
2781 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD,
2782 sizeof(*cmd));
2783
2784 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2785 cmd->requestor = cpu_to_le32(arg->requester);
2786 cmd->scan_id = cpu_to_le32(arg->scan_id);
2787 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2788 /* stop the scan with the corresponding scan_id */
2789 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) {
2790 /* Cancelling all scans */
2791 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL);
2792 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) {
2793 /* Cancelling VAP scans */
2794 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL);
2795 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) {
2796 /* Cancelling specific scan */
2797 cmd->req_type = WMI_SCAN_STOP_ONE;
2798 } else {
2799 ath12k_warn(ar->ab, "invalid scan cancel req_type %d",
2800 arg->req_type);
2801 dev_kfree_skb(skb);
2802 return -EINVAL;
2803 }
2804
2805 ret = ath12k_wmi_cmd_send(wmi, skb,
2806 WMI_STOP_SCAN_CMDID);
2807 if (ret) {
2808 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n");
2809 dev_kfree_skb(skb);
2810 }
2811
2812 return ret;
2813 }
2814
ath12k_wmi_send_scan_chan_list_cmd(struct ath12k * ar,struct ath12k_wmi_scan_chan_list_arg * arg)2815 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
2816 struct ath12k_wmi_scan_chan_list_arg *arg)
2817 {
2818 struct ath12k_wmi_pdev *wmi = ar->wmi;
2819 struct wmi_scan_chan_list_cmd *cmd;
2820 struct sk_buff *skb;
2821 struct ath12k_wmi_channel_params *chan_info;
2822 struct ath12k_wmi_channel_arg *channel_arg;
2823 struct wmi_tlv *tlv;
2824 void *ptr;
2825 int i, ret, len;
2826 u16 num_send_chans, num_sends = 0, max_chan_limit = 0;
2827 __le32 *reg1, *reg2;
2828
2829 channel_arg = &arg->channel[0];
2830 while (arg->nallchans) {
2831 len = sizeof(*cmd) + TLV_HDR_SIZE;
2832 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) /
2833 sizeof(*chan_info);
2834
2835 num_send_chans = min(arg->nallchans, max_chan_limit);
2836
2837 arg->nallchans -= num_send_chans;
2838 len += sizeof(*chan_info) * num_send_chans;
2839
2840 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2841 if (!skb)
2842 return -ENOMEM;
2843
2844 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
2845 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD,
2846 sizeof(*cmd));
2847 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2848 cmd->num_scan_chans = cpu_to_le32(num_send_chans);
2849 if (num_sends)
2850 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG);
2851
2852 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2853 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n",
2854 num_send_chans, len, cmd->pdev_id, num_sends);
2855
2856 ptr = skb->data + sizeof(*cmd);
2857
2858 len = sizeof(*chan_info) * num_send_chans;
2859 tlv = ptr;
2860 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT,
2861 len);
2862 ptr += TLV_HDR_SIZE;
2863
2864 for (i = 0; i < num_send_chans; ++i) {
2865 chan_info = ptr;
2866 memset(chan_info, 0, sizeof(*chan_info));
2867 len = sizeof(*chan_info);
2868 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
2869 len);
2870
2871 reg1 = &chan_info->reg_info_1;
2872 reg2 = &chan_info->reg_info_2;
2873 chan_info->mhz = cpu_to_le32(channel_arg->mhz);
2874 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1);
2875 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2);
2876
2877 if (channel_arg->is_chan_passive)
2878 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
2879 if (channel_arg->allow_he)
2880 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
2881 else if (channel_arg->allow_vht)
2882 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
2883 else if (channel_arg->allow_ht)
2884 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
2885 if (channel_arg->half_rate)
2886 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE);
2887 if (channel_arg->quarter_rate)
2888 chan_info->info |=
2889 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE);
2890
2891 if (channel_arg->psc_channel)
2892 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC);
2893
2894 if (channel_arg->dfs_set)
2895 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
2896
2897 chan_info->info |= le32_encode_bits(channel_arg->phy_mode,
2898 WMI_CHAN_INFO_MODE);
2899 *reg1 |= le32_encode_bits(channel_arg->minpower,
2900 WMI_CHAN_REG_INFO1_MIN_PWR);
2901 *reg1 |= le32_encode_bits(channel_arg->maxpower,
2902 WMI_CHAN_REG_INFO1_MAX_PWR);
2903 *reg1 |= le32_encode_bits(channel_arg->maxregpower,
2904 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
2905 *reg1 |= le32_encode_bits(channel_arg->reg_class_id,
2906 WMI_CHAN_REG_INFO1_REG_CLS);
2907 *reg2 |= le32_encode_bits(channel_arg->antennamax,
2908 WMI_CHAN_REG_INFO2_ANT_MAX);
2909 *reg2 |= le32_encode_bits(channel_arg->maxregpower,
2910 WMI_CHAN_REG_INFO2_MAX_TX_PWR);
2911
2912 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2913 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
2914 i, chan_info->mhz, chan_info->info);
2915
2916 ptr += sizeof(*chan_info);
2917
2918 channel_arg++;
2919 }
2920
2921 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID);
2922 if (ret) {
2923 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n");
2924 dev_kfree_skb(skb);
2925 return ret;
2926 }
2927
2928 num_sends++;
2929 }
2930
2931 return 0;
2932 }
2933
ath12k_wmi_send_wmm_update_cmd(struct ath12k * ar,u32 vdev_id,struct wmi_wmm_params_all_arg * param)2934 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
2935 struct wmi_wmm_params_all_arg *param)
2936 {
2937 struct ath12k_wmi_pdev *wmi = ar->wmi;
2938 struct wmi_vdev_set_wmm_params_cmd *cmd;
2939 struct wmi_wmm_params *wmm_param;
2940 struct wmi_wmm_params_arg *wmi_wmm_arg;
2941 struct sk_buff *skb;
2942 int ret, ac;
2943
2944 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2945 if (!skb)
2946 return -ENOMEM;
2947
2948 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data;
2949 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2950 sizeof(*cmd));
2951
2952 cmd->vdev_id = cpu_to_le32(vdev_id);
2953 cmd->wmm_param_type = 0;
2954
2955 for (ac = 0; ac < WME_NUM_AC; ac++) {
2956 switch (ac) {
2957 case WME_AC_BE:
2958 wmi_wmm_arg = ¶m->ac_be;
2959 break;
2960 case WME_AC_BK:
2961 wmi_wmm_arg = ¶m->ac_bk;
2962 break;
2963 case WME_AC_VI:
2964 wmi_wmm_arg = ¶m->ac_vi;
2965 break;
2966 case WME_AC_VO:
2967 wmi_wmm_arg = ¶m->ac_vo;
2968 break;
2969 }
2970
2971 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac];
2972 wmm_param->tlv_header =
2973 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
2974 sizeof(*wmm_param));
2975
2976 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs);
2977 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin);
2978 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax);
2979 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop);
2980 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm);
2981 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack);
2982
2983 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2984 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",
2985 ac, wmm_param->aifs, wmm_param->cwmin,
2986 wmm_param->cwmax, wmm_param->txoplimit,
2987 wmm_param->acm, wmm_param->no_ack);
2988 }
2989 ret = ath12k_wmi_cmd_send(wmi, skb,
2990 WMI_VDEV_SET_WMM_PARAMS_CMDID);
2991 if (ret) {
2992 ath12k_warn(ar->ab,
2993 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID");
2994 dev_kfree_skb(skb);
2995 }
2996
2997 return ret;
2998 }
2999
ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k * ar,u32 pdev_id)3000 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
3001 u32 pdev_id)
3002 {
3003 struct ath12k_wmi_pdev *wmi = ar->wmi;
3004 struct wmi_dfs_phyerr_offload_cmd *cmd;
3005 struct sk_buff *skb;
3006 int ret;
3007
3008 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3009 if (!skb)
3010 return -ENOMEM;
3011
3012 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data;
3013 cmd->tlv_header =
3014 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
3015 sizeof(*cmd));
3016
3017 cmd->pdev_id = cpu_to_le32(pdev_id);
3018
3019 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3020 "WMI dfs phy err offload enable pdev id %d\n", pdev_id);
3021
3022 ret = ath12k_wmi_cmd_send(wmi, skb,
3023 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID);
3024 if (ret) {
3025 ath12k_warn(ar->ab,
3026 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n");
3027 dev_kfree_skb(skb);
3028 }
3029
3030 return ret;
3031 }
3032
ath12k_wmi_set_bios_cmd(struct ath12k_base * ab,u32 param_id,const u8 * buf,size_t buf_len)3033 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id,
3034 const u8 *buf, size_t buf_len)
3035 {
3036 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3037 struct wmi_pdev_set_bios_interface_cmd *cmd;
3038 struct wmi_tlv *tlv;
3039 struct sk_buff *skb;
3040 u8 *ptr;
3041 u32 len, len_aligned;
3042 int ret;
3043
3044 len_aligned = roundup(buf_len, sizeof(u32));
3045 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned;
3046
3047 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3048 if (!skb)
3049 return -ENOMEM;
3050
3051 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data;
3052 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD,
3053 sizeof(*cmd));
3054 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3055 cmd->param_type_id = cpu_to_le32(param_id);
3056 cmd->length = cpu_to_le32(buf_len);
3057
3058 ptr = skb->data + sizeof(*cmd);
3059 tlv = (struct wmi_tlv *)ptr;
3060 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned);
3061 ptr += TLV_HDR_SIZE;
3062 memcpy(ptr, buf, buf_len);
3063
3064 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3065 skb,
3066 WMI_PDEV_SET_BIOS_INTERFACE_CMDID);
3067 if (ret) {
3068 ath12k_warn(ab,
3069 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n",
3070 param_id, ret);
3071 dev_kfree_skb(skb);
3072 }
3073
3074 return 0;
3075 }
3076
ath12k_wmi_set_bios_sar_cmd(struct ath12k_base * ab,const u8 * psar_table)3077 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table)
3078 {
3079 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3080 struct wmi_pdev_set_bios_sar_table_cmd *cmd;
3081 struct wmi_tlv *tlv;
3082 struct sk_buff *skb;
3083 int ret;
3084 u8 *buf_ptr;
3085 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned;
3086 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET;
3087 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET;
3088
3089 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32));
3090 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN,
3091 sizeof(u32));
3092 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned +
3093 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned;
3094
3095 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3096 if (!skb)
3097 return -ENOMEM;
3098
3099 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data;
3100 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD,
3101 sizeof(*cmd));
3102 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3103 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3104 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3105
3106 buf_ptr = skb->data + sizeof(*cmd);
3107 tlv = (struct wmi_tlv *)buf_ptr;
3108 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3109 sar_table_len_aligned);
3110 buf_ptr += TLV_HDR_SIZE;
3111 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3112
3113 buf_ptr += sar_table_len_aligned;
3114 tlv = (struct wmi_tlv *)buf_ptr;
3115 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3116 sar_dbs_backoff_len_aligned);
3117 buf_ptr += TLV_HDR_SIZE;
3118 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3119
3120 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3121 skb,
3122 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID);
3123 if (ret) {
3124 ath12k_warn(ab,
3125 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n",
3126 ret);
3127 dev_kfree_skb(skb);
3128 }
3129
3130 return ret;
3131 }
3132
ath12k_wmi_set_bios_geo_cmd(struct ath12k_base * ab,const u8 * pgeo_table)3133 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table)
3134 {
3135 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3136 struct wmi_pdev_set_bios_geo_table_cmd *cmd;
3137 struct wmi_tlv *tlv;
3138 struct sk_buff *skb;
3139 int ret;
3140 u8 *buf_ptr;
3141 u32 len, sar_geo_len_aligned;
3142 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET;
3143
3144 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32));
3145 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned;
3146
3147 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3148 if (!skb)
3149 return -ENOMEM;
3150
3151 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data;
3152 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
3153 sizeof(*cmd));
3154 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3155 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3156
3157 buf_ptr = skb->data + sizeof(*cmd);
3158 tlv = (struct wmi_tlv *)buf_ptr;
3159 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned);
3160 buf_ptr += TLV_HDR_SIZE;
3161 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3162
3163 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3164 skb,
3165 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID);
3166 if (ret) {
3167 ath12k_warn(ab,
3168 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n",
3169 ret);
3170 dev_kfree_skb(skb);
3171 }
3172
3173 return ret;
3174 }
3175
ath12k_wmi_delba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)3176 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3177 u32 tid, u32 initiator, u32 reason)
3178 {
3179 struct ath12k_wmi_pdev *wmi = ar->wmi;
3180 struct wmi_delba_send_cmd *cmd;
3181 struct sk_buff *skb;
3182 int ret;
3183
3184 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3185 if (!skb)
3186 return -ENOMEM;
3187
3188 cmd = (struct wmi_delba_send_cmd *)skb->data;
3189 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD,
3190 sizeof(*cmd));
3191 cmd->vdev_id = cpu_to_le32(vdev_id);
3192 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3193 cmd->tid = cpu_to_le32(tid);
3194 cmd->initiator = cpu_to_le32(initiator);
3195 cmd->reasoncode = cpu_to_le32(reason);
3196
3197 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3198 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
3199 vdev_id, mac, tid, initiator, reason);
3200
3201 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID);
3202
3203 if (ret) {
3204 ath12k_warn(ar->ab,
3205 "failed to send WMI_DELBA_SEND_CMDID cmd\n");
3206 dev_kfree_skb(skb);
3207 }
3208
3209 return ret;
3210 }
3211
ath12k_wmi_addba_set_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)3212 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3213 u32 tid, u32 status)
3214 {
3215 struct ath12k_wmi_pdev *wmi = ar->wmi;
3216 struct wmi_addba_setresponse_cmd *cmd;
3217 struct sk_buff *skb;
3218 int ret;
3219
3220 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3221 if (!skb)
3222 return -ENOMEM;
3223
3224 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
3225 cmd->tlv_header =
3226 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD,
3227 sizeof(*cmd));
3228 cmd->vdev_id = cpu_to_le32(vdev_id);
3229 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3230 cmd->tid = cpu_to_le32(tid);
3231 cmd->statuscode = cpu_to_le32(status);
3232
3233 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3234 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
3235 vdev_id, mac, tid, status);
3236
3237 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID);
3238
3239 if (ret) {
3240 ath12k_warn(ar->ab,
3241 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n");
3242 dev_kfree_skb(skb);
3243 }
3244
3245 return ret;
3246 }
3247
ath12k_wmi_addba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)3248 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3249 u32 tid, u32 buf_size)
3250 {
3251 struct ath12k_wmi_pdev *wmi = ar->wmi;
3252 struct wmi_addba_send_cmd *cmd;
3253 struct sk_buff *skb;
3254 int ret;
3255
3256 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3257 if (!skb)
3258 return -ENOMEM;
3259
3260 cmd = (struct wmi_addba_send_cmd *)skb->data;
3261 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD,
3262 sizeof(*cmd));
3263 cmd->vdev_id = cpu_to_le32(vdev_id);
3264 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3265 cmd->tid = cpu_to_le32(tid);
3266 cmd->buffersize = cpu_to_le32(buf_size);
3267
3268 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3269 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
3270 vdev_id, mac, tid, buf_size);
3271
3272 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID);
3273
3274 if (ret) {
3275 ath12k_warn(ar->ab,
3276 "failed to send WMI_ADDBA_SEND_CMDID cmd\n");
3277 dev_kfree_skb(skb);
3278 }
3279
3280 return ret;
3281 }
3282
ath12k_wmi_addba_clear_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac)3283 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac)
3284 {
3285 struct ath12k_wmi_pdev *wmi = ar->wmi;
3286 struct wmi_addba_clear_resp_cmd *cmd;
3287 struct sk_buff *skb;
3288 int ret;
3289
3290 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3291 if (!skb)
3292 return -ENOMEM;
3293
3294 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
3295 cmd->tlv_header =
3296 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD,
3297 sizeof(*cmd));
3298 cmd->vdev_id = cpu_to_le32(vdev_id);
3299 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3300
3301 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3302 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
3303 vdev_id, mac);
3304
3305 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID);
3306
3307 if (ret) {
3308 ath12k_warn(ar->ab,
3309 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n");
3310 dev_kfree_skb(skb);
3311 }
3312
3313 return ret;
3314 }
3315
ath12k_wmi_send_init_country_cmd(struct ath12k * ar,struct ath12k_wmi_init_country_arg * arg)3316 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
3317 struct ath12k_wmi_init_country_arg *arg)
3318 {
3319 struct ath12k_wmi_pdev *wmi = ar->wmi;
3320 struct wmi_init_country_cmd *cmd;
3321 struct sk_buff *skb;
3322 int ret;
3323
3324 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3325 if (!skb)
3326 return -ENOMEM;
3327
3328 cmd = (struct wmi_init_country_cmd *)skb->data;
3329 cmd->tlv_header =
3330 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD,
3331 sizeof(*cmd));
3332
3333 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3334
3335 switch (arg->flags) {
3336 case ALPHA_IS_SET:
3337 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA;
3338 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3);
3339 break;
3340 case CC_IS_SET:
3341 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE);
3342 cmd->cc_info.country_code =
3343 cpu_to_le32(arg->cc_info.country_code);
3344 break;
3345 case REGDMN_IS_SET:
3346 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN);
3347 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id);
3348 break;
3349 default:
3350 ret = -EINVAL;
3351 goto out;
3352 }
3353
3354 ret = ath12k_wmi_cmd_send(wmi, skb,
3355 WMI_SET_INIT_COUNTRY_CMDID);
3356
3357 out:
3358 if (ret) {
3359 ath12k_warn(ar->ab,
3360 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n",
3361 ret);
3362 dev_kfree_skb(skb);
3363 }
3364
3365 return ret;
3366 }
3367
ath12k_wmi_send_set_current_country_cmd(struct ath12k * ar,struct wmi_set_current_country_arg * arg)3368 int ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar,
3369 struct wmi_set_current_country_arg *arg)
3370 {
3371 struct ath12k_wmi_pdev *wmi = ar->wmi;
3372 struct wmi_set_current_country_cmd *cmd;
3373 struct sk_buff *skb;
3374 int ret;
3375
3376 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3377 if (!skb)
3378 return -ENOMEM;
3379
3380 cmd = (struct wmi_set_current_country_cmd *)skb->data;
3381 cmd->tlv_header =
3382 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_CURRENT_COUNTRY_CMD,
3383 sizeof(*cmd));
3384
3385 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3386 memcpy(&cmd->new_alpha2, &arg->alpha2, sizeof(arg->alpha2));
3387 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SET_CURRENT_COUNTRY_CMDID);
3388
3389 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3390 "set current country pdev id %d alpha2 %c%c\n",
3391 ar->pdev->pdev_id,
3392 arg->alpha2[0],
3393 arg->alpha2[1]);
3394
3395 if (ret) {
3396 ath12k_warn(ar->ab,
3397 "failed to send WMI_SET_CURRENT_COUNTRY_CMDID: %d\n", ret);
3398 dev_kfree_skb(skb);
3399 }
3400
3401 return ret;
3402 }
3403
ath12k_wmi_send_11d_scan_start_cmd(struct ath12k * ar,struct wmi_11d_scan_start_arg * arg)3404 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar,
3405 struct wmi_11d_scan_start_arg *arg)
3406 {
3407 struct ath12k_wmi_pdev *wmi = ar->wmi;
3408 struct wmi_11d_scan_start_cmd *cmd;
3409 struct sk_buff *skb;
3410 int ret;
3411
3412 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3413 if (!skb)
3414 return -ENOMEM;
3415
3416 cmd = (struct wmi_11d_scan_start_cmd *)skb->data;
3417 cmd->tlv_header =
3418 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_START_CMD,
3419 sizeof(*cmd));
3420
3421 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
3422 cmd->scan_period_msec = cpu_to_le32(arg->scan_period_msec);
3423 cmd->start_interval_msec = cpu_to_le32(arg->start_interval_msec);
3424 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_START_CMDID);
3425
3426 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3427 "send 11d scan start vdev id %d period %d ms internal %d ms\n",
3428 arg->vdev_id, arg->scan_period_msec,
3429 arg->start_interval_msec);
3430
3431 if (ret) {
3432 ath12k_warn(ar->ab,
3433 "failed to send WMI_11D_SCAN_START_CMDID: %d\n", ret);
3434 dev_kfree_skb(skb);
3435 }
3436
3437 return ret;
3438 }
3439
ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k * ar,u32 vdev_id)3440 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id)
3441 {
3442 struct ath12k_wmi_pdev *wmi = ar->wmi;
3443 struct wmi_11d_scan_stop_cmd *cmd;
3444 struct sk_buff *skb;
3445 int ret;
3446
3447 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3448 if (!skb)
3449 return -ENOMEM;
3450
3451 cmd = (struct wmi_11d_scan_stop_cmd *)skb->data;
3452 cmd->tlv_header =
3453 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_STOP_CMD,
3454 sizeof(*cmd));
3455
3456 cmd->vdev_id = cpu_to_le32(vdev_id);
3457 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_STOP_CMDID);
3458
3459 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3460 "send 11d scan stop vdev id %d\n",
3461 cmd->vdev_id);
3462
3463 if (ret) {
3464 ath12k_warn(ar->ab,
3465 "failed to send WMI_11D_SCAN_STOP_CMDID: %d\n", ret);
3466 dev_kfree_skb(skb);
3467 }
3468
3469 return ret;
3470 }
3471
3472 int
ath12k_wmi_send_twt_enable_cmd(struct ath12k * ar,u32 pdev_id)3473 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
3474 {
3475 struct ath12k_wmi_pdev *wmi = ar->wmi;
3476 struct ath12k_base *ab = wmi->wmi_ab->ab;
3477 struct wmi_twt_enable_params_cmd *cmd;
3478 struct sk_buff *skb;
3479 int ret, len;
3480
3481 len = sizeof(*cmd);
3482
3483 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3484 if (!skb)
3485 return -ENOMEM;
3486
3487 cmd = (struct wmi_twt_enable_params_cmd *)skb->data;
3488 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD,
3489 len);
3490 cmd->pdev_id = cpu_to_le32(pdev_id);
3491 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS);
3492 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE);
3493 cmd->congestion_thresh_setup =
3494 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP);
3495 cmd->congestion_thresh_teardown =
3496 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN);
3497 cmd->congestion_thresh_critical =
3498 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL);
3499 cmd->interference_thresh_teardown =
3500 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN);
3501 cmd->interference_thresh_setup =
3502 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP);
3503 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP);
3504 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN);
3505 cmd->no_of_bcast_mcast_slots =
3506 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS);
3507 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS);
3508 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT);
3509 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL);
3510 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL);
3511 cmd->remove_sta_slot_interval =
3512 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL);
3513 /* TODO add MBSSID support */
3514 cmd->mbss_support = 0;
3515
3516 ret = ath12k_wmi_cmd_send(wmi, skb,
3517 WMI_TWT_ENABLE_CMDID);
3518 if (ret) {
3519 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID");
3520 dev_kfree_skb(skb);
3521 }
3522 return ret;
3523 }
3524
3525 int
ath12k_wmi_send_twt_disable_cmd(struct ath12k * ar,u32 pdev_id)3526 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id)
3527 {
3528 struct ath12k_wmi_pdev *wmi = ar->wmi;
3529 struct ath12k_base *ab = wmi->wmi_ab->ab;
3530 struct wmi_twt_disable_params_cmd *cmd;
3531 struct sk_buff *skb;
3532 int ret, len;
3533
3534 len = sizeof(*cmd);
3535
3536 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3537 if (!skb)
3538 return -ENOMEM;
3539
3540 cmd = (struct wmi_twt_disable_params_cmd *)skb->data;
3541 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD,
3542 len);
3543 cmd->pdev_id = cpu_to_le32(pdev_id);
3544
3545 ret = ath12k_wmi_cmd_send(wmi, skb,
3546 WMI_TWT_DISABLE_CMDID);
3547 if (ret) {
3548 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID");
3549 dev_kfree_skb(skb);
3550 }
3551 return ret;
3552 }
3553
3554 int
ath12k_wmi_send_obss_spr_cmd(struct ath12k * ar,u32 vdev_id,struct ieee80211_he_obss_pd * he_obss_pd)3555 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
3556 struct ieee80211_he_obss_pd *he_obss_pd)
3557 {
3558 struct ath12k_wmi_pdev *wmi = ar->wmi;
3559 struct ath12k_base *ab = wmi->wmi_ab->ab;
3560 struct wmi_obss_spatial_reuse_params_cmd *cmd;
3561 struct sk_buff *skb;
3562 int ret, len;
3563
3564 len = sizeof(*cmd);
3565
3566 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3567 if (!skb)
3568 return -ENOMEM;
3569
3570 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data;
3571 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
3572 len);
3573 cmd->vdev_id = cpu_to_le32(vdev_id);
3574 cmd->enable = cpu_to_le32(he_obss_pd->enable);
3575 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset);
3576 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset);
3577
3578 ret = ath12k_wmi_cmd_send(wmi, skb,
3579 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID);
3580 if (ret) {
3581 ath12k_warn(ab,
3582 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID");
3583 dev_kfree_skb(skb);
3584 }
3585 return ret;
3586 }
3587
ath12k_wmi_obss_color_cfg_cmd(struct ath12k * ar,u32 vdev_id,u8 bss_color,u32 period,bool enable)3588 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
3589 u8 bss_color, u32 period,
3590 bool enable)
3591 {
3592 struct ath12k_wmi_pdev *wmi = ar->wmi;
3593 struct ath12k_base *ab = wmi->wmi_ab->ab;
3594 struct wmi_obss_color_collision_cfg_params_cmd *cmd;
3595 struct sk_buff *skb;
3596 int ret, len;
3597
3598 len = sizeof(*cmd);
3599
3600 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3601 if (!skb)
3602 return -ENOMEM;
3603
3604 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data;
3605 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
3606 len);
3607 cmd->vdev_id = cpu_to_le32(vdev_id);
3608 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) :
3609 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE);
3610 cmd->current_bss_color = cpu_to_le32(bss_color);
3611 cmd->detection_period_ms = cpu_to_le32(period);
3612 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS);
3613 cmd->free_slot_expiry_time_ms = 0;
3614 cmd->flags = 0;
3615
3616 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3617 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n",
3618 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color,
3619 cmd->detection_period_ms, cmd->scan_period_ms);
3620
3621 ret = ath12k_wmi_cmd_send(wmi, skb,
3622 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID);
3623 if (ret) {
3624 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID");
3625 dev_kfree_skb(skb);
3626 }
3627 return ret;
3628 }
3629
ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k * ar,u32 vdev_id,bool enable)3630 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
3631 bool enable)
3632 {
3633 struct ath12k_wmi_pdev *wmi = ar->wmi;
3634 struct ath12k_base *ab = wmi->wmi_ab->ab;
3635 struct wmi_bss_color_change_enable_params_cmd *cmd;
3636 struct sk_buff *skb;
3637 int ret, len;
3638
3639 len = sizeof(*cmd);
3640
3641 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3642 if (!skb)
3643 return -ENOMEM;
3644
3645 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data;
3646 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
3647 len);
3648 cmd->vdev_id = cpu_to_le32(vdev_id);
3649 cmd->enable = enable ? cpu_to_le32(1) : 0;
3650
3651 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3652 "wmi_send_bss_color_change_enable id %d enable %d\n",
3653 cmd->vdev_id, cmd->enable);
3654
3655 ret = ath12k_wmi_cmd_send(wmi, skb,
3656 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID);
3657 if (ret) {
3658 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID");
3659 dev_kfree_skb(skb);
3660 }
3661 return ret;
3662 }
3663
ath12k_wmi_fils_discovery_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3664 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
3665 struct sk_buff *tmpl)
3666 {
3667 struct wmi_tlv *tlv;
3668 struct sk_buff *skb;
3669 void *ptr;
3670 int ret, len;
3671 size_t aligned_len;
3672 struct wmi_fils_discovery_tmpl_cmd *cmd;
3673
3674 aligned_len = roundup(tmpl->len, 4);
3675 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
3676
3677 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3678 "WMI vdev %i set FILS discovery template\n", vdev_id);
3679
3680 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3681 if (!skb)
3682 return -ENOMEM;
3683
3684 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data;
3685 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD,
3686 sizeof(*cmd));
3687 cmd->vdev_id = cpu_to_le32(vdev_id);
3688 cmd->buf_len = cpu_to_le32(tmpl->len);
3689 ptr = skb->data + sizeof(*cmd);
3690
3691 tlv = ptr;
3692 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3693 memcpy(tlv->value, tmpl->data, tmpl->len);
3694
3695 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID);
3696 if (ret) {
3697 ath12k_warn(ar->ab,
3698 "WMI vdev %i failed to send FILS discovery template command\n",
3699 vdev_id);
3700 dev_kfree_skb(skb);
3701 }
3702 return ret;
3703 }
3704
ath12k_wmi_probe_resp_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3705 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
3706 struct sk_buff *tmpl)
3707 {
3708 struct wmi_probe_tmpl_cmd *cmd;
3709 struct ath12k_wmi_bcn_prb_info_params *probe_info;
3710 struct wmi_tlv *tlv;
3711 struct sk_buff *skb;
3712 void *ptr;
3713 int ret, len;
3714 size_t aligned_len = roundup(tmpl->len, 4);
3715
3716 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3717 "WMI vdev %i set probe response template\n", vdev_id);
3718
3719 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len;
3720
3721 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3722 if (!skb)
3723 return -ENOMEM;
3724
3725 cmd = (struct wmi_probe_tmpl_cmd *)skb->data;
3726 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD,
3727 sizeof(*cmd));
3728 cmd->vdev_id = cpu_to_le32(vdev_id);
3729 cmd->buf_len = cpu_to_le32(tmpl->len);
3730
3731 ptr = skb->data + sizeof(*cmd);
3732
3733 probe_info = ptr;
3734 len = sizeof(*probe_info);
3735 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
3736 len);
3737 probe_info->caps = 0;
3738 probe_info->erp = 0;
3739
3740 ptr += sizeof(*probe_info);
3741
3742 tlv = ptr;
3743 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3744 memcpy(tlv->value, tmpl->data, tmpl->len);
3745
3746 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID);
3747 if (ret) {
3748 ath12k_warn(ar->ab,
3749 "WMI vdev %i failed to send probe response template command\n",
3750 vdev_id);
3751 dev_kfree_skb(skb);
3752 }
3753 return ret;
3754 }
3755
ath12k_wmi_fils_discovery(struct ath12k * ar,u32 vdev_id,u32 interval,bool unsol_bcast_probe_resp_enabled)3756 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
3757 bool unsol_bcast_probe_resp_enabled)
3758 {
3759 struct sk_buff *skb;
3760 int ret, len;
3761 struct wmi_fils_discovery_cmd *cmd;
3762
3763 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3764 "WMI vdev %i set %s interval to %u TU\n",
3765 vdev_id, unsol_bcast_probe_resp_enabled ?
3766 "unsolicited broadcast probe response" : "FILS discovery",
3767 interval);
3768
3769 len = sizeof(*cmd);
3770 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3771 if (!skb)
3772 return -ENOMEM;
3773
3774 cmd = (struct wmi_fils_discovery_cmd *)skb->data;
3775 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD,
3776 len);
3777 cmd->vdev_id = cpu_to_le32(vdev_id);
3778 cmd->interval = cpu_to_le32(interval);
3779 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled);
3780
3781 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID);
3782 if (ret) {
3783 ath12k_warn(ar->ab,
3784 "WMI vdev %i failed to send FILS discovery enable/disable command\n",
3785 vdev_id);
3786 dev_kfree_skb(skb);
3787 }
3788 return ret;
3789 }
3790
3791 static void
ath12k_fill_band_to_mac_param(struct ath12k_base * soc,struct ath12k_wmi_pdev_band_arg * arg)3792 ath12k_fill_band_to_mac_param(struct ath12k_base *soc,
3793 struct ath12k_wmi_pdev_band_arg *arg)
3794 {
3795 u8 i;
3796 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap;
3797 struct ath12k_pdev *pdev;
3798
3799 for (i = 0; i < soc->num_radios; i++) {
3800 pdev = &soc->pdevs[i];
3801 hal_reg_cap = &soc->hal_reg_cap[i];
3802 arg[i].pdev_id = pdev->pdev_id;
3803
3804 switch (pdev->cap.supported_bands) {
3805 case WMI_HOST_WLAN_2GHZ_5GHZ_CAP:
3806 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3807 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3808 break;
3809 case WMI_HOST_WLAN_2GHZ_CAP:
3810 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3811 arg[i].end_freq = hal_reg_cap->high_2ghz_chan;
3812 break;
3813 case WMI_HOST_WLAN_5GHZ_CAP:
3814 arg[i].start_freq = hal_reg_cap->low_5ghz_chan;
3815 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3816 break;
3817 default:
3818 break;
3819 }
3820 }
3821 }
3822
3823 static void
ath12k_wmi_copy_resource_config(struct ath12k_base * ab,struct ath12k_wmi_resource_config_params * wmi_cfg,struct ath12k_wmi_resource_config_arg * tg_cfg)3824 ath12k_wmi_copy_resource_config(struct ath12k_base *ab,
3825 struct ath12k_wmi_resource_config_params *wmi_cfg,
3826 struct ath12k_wmi_resource_config_arg *tg_cfg)
3827 {
3828 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs);
3829 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers);
3830 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers);
3831 wmi_cfg->num_offload_reorder_buffs =
3832 cpu_to_le32(tg_cfg->num_offload_reorder_buffs);
3833 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys);
3834 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids);
3835 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit);
3836 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask);
3837 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask);
3838 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]);
3839 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]);
3840 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]);
3841 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]);
3842 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode);
3843 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req);
3844 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev);
3845 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev);
3846 wmi_cfg->roam_offload_max_ap_profiles =
3847 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles);
3848 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups);
3849 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems);
3850 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode);
3851 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size);
3852 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries);
3853 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size);
3854 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim);
3855 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check =
3856 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check);
3857 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config);
3858 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev);
3859 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc);
3860 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries);
3861 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs);
3862 wmi_cfg->num_tdls_conn_table_entries =
3863 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries);
3864 wmi_cfg->beacon_tx_offload_max_vdev =
3865 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev);
3866 wmi_cfg->num_multicast_filter_entries =
3867 cpu_to_le32(tg_cfg->num_multicast_filter_entries);
3868 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters);
3869 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern);
3870 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size);
3871 wmi_cfg->max_tdls_concurrent_sleep_sta =
3872 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta);
3873 wmi_cfg->max_tdls_concurrent_buffer_sta =
3874 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta);
3875 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate);
3876 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs);
3877 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels);
3878 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules);
3879 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size);
3880 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
3881 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
3882 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config |
3883 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64);
3884 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
3885 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
3886 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
3887 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count);
3888 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver,
3889 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION);
3890 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported <<
3891 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT);
3892 if (ab->hw_params->reoq_lut_support)
3893 wmi_cfg->host_service_flags |=
3894 cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT);
3895 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt);
3896 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period);
3897 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET);
3898 }
3899
ath12k_init_cmd_send(struct ath12k_wmi_pdev * wmi,struct ath12k_wmi_init_cmd_arg * arg)3900 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi,
3901 struct ath12k_wmi_init_cmd_arg *arg)
3902 {
3903 struct ath12k_base *ab = wmi->wmi_ab->ab;
3904 struct sk_buff *skb;
3905 struct wmi_init_cmd *cmd;
3906 struct ath12k_wmi_resource_config_params *cfg;
3907 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode;
3908 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac;
3909 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks;
3910 struct wmi_tlv *tlv;
3911 size_t ret, len;
3912 void *ptr;
3913 u32 hw_mode_len = 0;
3914 u16 idx;
3915
3916 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX)
3917 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE +
3918 (arg->num_band_to_mac * sizeof(*band_to_mac));
3919
3920 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len +
3921 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0);
3922
3923 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3924 if (!skb)
3925 return -ENOMEM;
3926
3927 cmd = (struct wmi_init_cmd *)skb->data;
3928
3929 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD,
3930 sizeof(*cmd));
3931
3932 ptr = skb->data + sizeof(*cmd);
3933 cfg = ptr;
3934
3935 ath12k_wmi_copy_resource_config(ab, cfg, &arg->res_cfg);
3936
3937 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG,
3938 sizeof(*cfg));
3939
3940 ptr += sizeof(*cfg);
3941 host_mem_chunks = ptr + TLV_HDR_SIZE;
3942 len = sizeof(struct ath12k_wmi_host_mem_chunk_params);
3943
3944 for (idx = 0; idx < arg->num_mem_chunks; ++idx) {
3945 host_mem_chunks[idx].tlv_header =
3946 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
3947 len);
3948
3949 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr);
3950 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len);
3951 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id);
3952
3953 ath12k_dbg(ab, ATH12K_DBG_WMI,
3954 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n",
3955 arg->mem_chunks[idx].req_id,
3956 (u64)arg->mem_chunks[idx].paddr,
3957 arg->mem_chunks[idx].len);
3958 }
3959 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks);
3960 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks;
3961
3962 /* num_mem_chunks is zero */
3963 tlv = ptr;
3964 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3965 ptr += TLV_HDR_SIZE + len;
3966
3967 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
3968 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr;
3969 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
3970 sizeof(*hw_mode));
3971
3972 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id);
3973 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac);
3974
3975 ptr += sizeof(*hw_mode);
3976
3977 len = arg->num_band_to_mac * sizeof(*band_to_mac);
3978 tlv = ptr;
3979 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
3980
3981 ptr += TLV_HDR_SIZE;
3982 len = sizeof(*band_to_mac);
3983
3984 for (idx = 0; idx < arg->num_band_to_mac; idx++) {
3985 band_to_mac = (void *)ptr;
3986
3987 band_to_mac->tlv_header =
3988 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC,
3989 len);
3990 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id);
3991 band_to_mac->start_freq =
3992 cpu_to_le32(arg->band_to_mac[idx].start_freq);
3993 band_to_mac->end_freq =
3994 cpu_to_le32(arg->band_to_mac[idx].end_freq);
3995 ptr += sizeof(*band_to_mac);
3996 }
3997 }
3998
3999 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID);
4000 if (ret) {
4001 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n");
4002 dev_kfree_skb(skb);
4003 }
4004
4005 return ret;
4006 }
4007
ath12k_wmi_pdev_lro_cfg(struct ath12k * ar,int pdev_id)4008 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar,
4009 int pdev_id)
4010 {
4011 struct ath12k_wmi_pdev_lro_config_cmd *cmd;
4012 struct sk_buff *skb;
4013 int ret;
4014
4015 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4016 if (!skb)
4017 return -ENOMEM;
4018
4019 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data;
4020 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD,
4021 sizeof(*cmd));
4022
4023 get_random_bytes(cmd->th_4, sizeof(cmd->th_4));
4024 get_random_bytes(cmd->th_6, sizeof(cmd->th_6));
4025
4026 cmd->pdev_id = cpu_to_le32(pdev_id);
4027
4028 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4029 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id);
4030
4031 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID);
4032 if (ret) {
4033 ath12k_warn(ar->ab,
4034 "failed to send lro cfg req wmi cmd\n");
4035 goto err;
4036 }
4037
4038 return 0;
4039 err:
4040 dev_kfree_skb(skb);
4041 return ret;
4042 }
4043
ath12k_wmi_wait_for_service_ready(struct ath12k_base * ab)4044 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab)
4045 {
4046 unsigned long time_left;
4047
4048 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready,
4049 WMI_SERVICE_READY_TIMEOUT_HZ);
4050 if (!time_left)
4051 return -ETIMEDOUT;
4052
4053 return 0;
4054 }
4055
ath12k_wmi_wait_for_unified_ready(struct ath12k_base * ab)4056 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab)
4057 {
4058 unsigned long time_left;
4059
4060 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready,
4061 WMI_SERVICE_READY_TIMEOUT_HZ);
4062 if (!time_left)
4063 return -ETIMEDOUT;
4064
4065 return 0;
4066 }
4067
ath12k_wmi_set_hw_mode(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type mode)4068 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
4069 enum wmi_host_hw_mode_config_type mode)
4070 {
4071 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd;
4072 struct sk_buff *skb;
4073 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4074 int len;
4075 int ret;
4076
4077 len = sizeof(*cmd);
4078
4079 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
4080 if (!skb)
4081 return -ENOMEM;
4082
4083 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data;
4084
4085 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
4086 sizeof(*cmd));
4087
4088 cmd->pdev_id = WMI_PDEV_ID_SOC;
4089 cmd->hw_mode_index = cpu_to_le32(mode);
4090
4091 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID);
4092 if (ret) {
4093 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n");
4094 dev_kfree_skb(skb);
4095 }
4096
4097 return ret;
4098 }
4099
ath12k_wmi_cmd_init(struct ath12k_base * ab)4100 int ath12k_wmi_cmd_init(struct ath12k_base *ab)
4101 {
4102 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4103 struct ath12k_wmi_init_cmd_arg arg = {};
4104
4105 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
4106 ab->wmi_ab.svc_map))
4107 arg.res_cfg.is_reg_cc_ext_event_supported = true;
4108
4109 ab->hw_params->wmi_init(ab, &arg.res_cfg);
4110 ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode;
4111
4112 arg.num_mem_chunks = wmi_ab->num_mem_chunks;
4113 arg.hw_mode_id = wmi_ab->preferred_hw_mode;
4114 arg.mem_chunks = wmi_ab->mem_chunks;
4115
4116 if (ab->hw_params->single_pdev_only)
4117 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX;
4118
4119 arg.num_band_to_mac = ab->num_radios;
4120 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac);
4121
4122 ab->dp.peer_metadata_ver = arg.res_cfg.peer_metadata_ver;
4123
4124 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg);
4125 }
4126
ath12k_wmi_vdev_spectral_conf(struct ath12k * ar,struct ath12k_wmi_vdev_spectral_conf_arg * arg)4127 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
4128 struct ath12k_wmi_vdev_spectral_conf_arg *arg)
4129 {
4130 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd;
4131 struct sk_buff *skb;
4132 int ret;
4133
4134 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4135 if (!skb)
4136 return -ENOMEM;
4137
4138 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data;
4139 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
4140 sizeof(*cmd));
4141 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
4142 cmd->scan_count = cpu_to_le32(arg->scan_count);
4143 cmd->scan_period = cpu_to_le32(arg->scan_period);
4144 cmd->scan_priority = cpu_to_le32(arg->scan_priority);
4145 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size);
4146 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena);
4147 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena);
4148 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref);
4149 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay);
4150 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr);
4151 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr);
4152 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode);
4153 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode);
4154 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr);
4155 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format);
4156 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode);
4157 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale);
4158 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj);
4159 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask);
4160
4161 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4162 "WMI spectral scan config cmd vdev_id 0x%x\n",
4163 arg->vdev_id);
4164
4165 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4166 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
4167 if (ret) {
4168 ath12k_warn(ar->ab,
4169 "failed to send spectral scan config wmi cmd\n");
4170 goto err;
4171 }
4172
4173 return 0;
4174 err:
4175 dev_kfree_skb(skb);
4176 return ret;
4177 }
4178
ath12k_wmi_vdev_spectral_enable(struct ath12k * ar,u32 vdev_id,u32 trigger,u32 enable)4179 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
4180 u32 trigger, u32 enable)
4181 {
4182 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd;
4183 struct sk_buff *skb;
4184 int ret;
4185
4186 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4187 if (!skb)
4188 return -ENOMEM;
4189
4190 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data;
4191 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
4192 sizeof(*cmd));
4193
4194 cmd->vdev_id = cpu_to_le32(vdev_id);
4195 cmd->trigger_cmd = cpu_to_le32(trigger);
4196 cmd->enable_cmd = cpu_to_le32(enable);
4197
4198 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4199 "WMI spectral enable cmd vdev id 0x%x\n",
4200 vdev_id);
4201
4202 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4203 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
4204 if (ret) {
4205 ath12k_warn(ar->ab,
4206 "failed to send spectral enable wmi cmd\n");
4207 goto err;
4208 }
4209
4210 return 0;
4211 err:
4212 dev_kfree_skb(skb);
4213 return ret;
4214 }
4215
ath12k_wmi_pdev_dma_ring_cfg(struct ath12k * ar,struct ath12k_wmi_pdev_dma_ring_cfg_arg * arg)4216 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
4217 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg)
4218 {
4219 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd;
4220 struct sk_buff *skb;
4221 int ret;
4222
4223 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4224 if (!skb)
4225 return -ENOMEM;
4226
4227 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data;
4228 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ,
4229 sizeof(*cmd));
4230
4231 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
4232 cmd->module_id = cpu_to_le32(arg->module_id);
4233 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo);
4234 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi);
4235 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo);
4236 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi);
4237 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo);
4238 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi);
4239 cmd->num_elems = cpu_to_le32(arg->num_elems);
4240 cmd->buf_size = cpu_to_le32(arg->buf_size);
4241 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event);
4242 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms);
4243
4244 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4245 "WMI DMA ring cfg req cmd pdev_id 0x%x\n",
4246 arg->pdev_id);
4247
4248 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4249 WMI_PDEV_DMA_RING_CFG_REQ_CMDID);
4250 if (ret) {
4251 ath12k_warn(ar->ab,
4252 "failed to send dma ring cfg req wmi cmd\n");
4253 goto err;
4254 }
4255
4256 return 0;
4257 err:
4258 dev_kfree_skb(skb);
4259 return ret;
4260 }
4261
ath12k_wmi_dma_buf_entry_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4262 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc,
4263 u16 tag, u16 len,
4264 const void *ptr, void *data)
4265 {
4266 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4267
4268 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY)
4269 return -EPROTO;
4270
4271 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry))
4272 return -ENOBUFS;
4273
4274 arg->num_buf_entry++;
4275 return 0;
4276 }
4277
ath12k_wmi_dma_buf_meta_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4278 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc,
4279 u16 tag, u16 len,
4280 const void *ptr, void *data)
4281 {
4282 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4283
4284 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA)
4285 return -EPROTO;
4286
4287 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry))
4288 return -ENOBUFS;
4289
4290 arg->num_meta++;
4291
4292 return 0;
4293 }
4294
ath12k_wmi_dma_buf_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4295 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab,
4296 u16 tag, u16 len,
4297 const void *ptr, void *data)
4298 {
4299 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4300 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed;
4301 u32 pdev_id;
4302 int ret;
4303
4304 switch (tag) {
4305 case WMI_TAG_DMA_BUF_RELEASE:
4306 fixed = ptr;
4307 arg->fixed = *fixed;
4308 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id));
4309 arg->fixed.pdev_id = cpu_to_le32(pdev_id);
4310 break;
4311 case WMI_TAG_ARRAY_STRUCT:
4312 if (!arg->buf_entry_done) {
4313 arg->num_buf_entry = 0;
4314 arg->buf_entry = ptr;
4315
4316 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4317 ath12k_wmi_dma_buf_entry_parse,
4318 arg);
4319 if (ret) {
4320 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n",
4321 ret);
4322 return ret;
4323 }
4324
4325 arg->buf_entry_done = true;
4326 } else if (!arg->meta_data_done) {
4327 arg->num_meta = 0;
4328 arg->meta_data = ptr;
4329
4330 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4331 ath12k_wmi_dma_buf_meta_parse,
4332 arg);
4333 if (ret) {
4334 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n",
4335 ret);
4336 return ret;
4337 }
4338
4339 arg->meta_data_done = true;
4340 }
4341 break;
4342 default:
4343 break;
4344 }
4345 return 0;
4346 }
4347
ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base * ab,struct sk_buff * skb)4348 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab,
4349 struct sk_buff *skb)
4350 {
4351 struct ath12k_wmi_dma_buf_release_arg arg = {};
4352 struct ath12k_dbring_buf_release_event param;
4353 int ret;
4354
4355 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4356 ath12k_wmi_dma_buf_parse,
4357 &arg);
4358 if (ret) {
4359 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret);
4360 return;
4361 }
4362
4363 param.fixed = arg.fixed;
4364 param.buf_entry = arg.buf_entry;
4365 param.num_buf_entry = arg.num_buf_entry;
4366 param.meta_data = arg.meta_data;
4367 param.num_meta = arg.num_meta;
4368
4369 ret = ath12k_dbring_buffer_release_event(ab, ¶m);
4370 if (ret) {
4371 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret);
4372 return;
4373 }
4374 }
4375
ath12k_wmi_hw_mode_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4376 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
4377 u16 tag, u16 len,
4378 const void *ptr, void *data)
4379 {
4380 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4381 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
4382 u32 phy_map = 0;
4383
4384 if (tag != WMI_TAG_HW_MODE_CAPABILITIES)
4385 return -EPROTO;
4386
4387 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes)
4388 return -ENOBUFS;
4389
4390 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params,
4391 hw_mode_id);
4392 svc_rdy_ext->n_hw_mode_caps++;
4393
4394 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map);
4395 svc_rdy_ext->tot_phy_id += fls(phy_map);
4396
4397 return 0;
4398 }
4399
ath12k_wmi_hw_mode_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4400 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
4401 u16 len, const void *ptr, void *data)
4402 {
4403 struct ath12k_svc_ext_info *svc_ext_info = &soc->wmi_ab.svc_ext_info;
4404 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4405 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
4406 enum wmi_host_hw_mode_config_type mode, pref;
4407 u32 i;
4408 int ret;
4409
4410 svc_rdy_ext->n_hw_mode_caps = 0;
4411 svc_rdy_ext->hw_mode_caps = ptr;
4412
4413 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4414 ath12k_wmi_hw_mode_caps_parse,
4415 svc_rdy_ext);
4416 if (ret) {
4417 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4418 return ret;
4419 }
4420
4421 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) {
4422 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i];
4423 mode = le32_to_cpu(hw_mode_caps->hw_mode_id);
4424
4425 if (mode >= WMI_HOST_HW_MODE_MAX)
4426 continue;
4427
4428 pref = soc->wmi_ab.preferred_hw_mode;
4429
4430 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) {
4431 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps;
4432 soc->wmi_ab.preferred_hw_mode = mode;
4433 }
4434 }
4435
4436 svc_ext_info->num_hw_modes = svc_rdy_ext->n_hw_mode_caps;
4437
4438 ath12k_dbg(soc, ATH12K_DBG_WMI, "num hw modes %u preferred_hw_mode %d\n",
4439 svc_ext_info->num_hw_modes, soc->wmi_ab.preferred_hw_mode);
4440
4441 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
4442 return -EINVAL;
4443
4444 return 0;
4445 }
4446
ath12k_wmi_mac_phy_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4447 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc,
4448 u16 tag, u16 len,
4449 const void *ptr, void *data)
4450 {
4451 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4452
4453 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES)
4454 return -EPROTO;
4455
4456 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id)
4457 return -ENOBUFS;
4458
4459 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params));
4460 if (!svc_rdy_ext->n_mac_phy_caps) {
4461 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len,
4462 GFP_ATOMIC);
4463 if (!svc_rdy_ext->mac_phy_caps)
4464 return -ENOMEM;
4465 }
4466
4467 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len);
4468 svc_rdy_ext->n_mac_phy_caps++;
4469 return 0;
4470 }
4471
ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4472 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc,
4473 u16 tag, u16 len,
4474 const void *ptr, void *data)
4475 {
4476 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4477
4478 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT)
4479 return -EPROTO;
4480
4481 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy)
4482 return -ENOBUFS;
4483
4484 svc_rdy_ext->n_ext_hal_reg_caps++;
4485 return 0;
4486 }
4487
ath12k_wmi_ext_hal_reg_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4488 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc,
4489 u16 len, const void *ptr, void *data)
4490 {
4491 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4492 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4493 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap;
4494 int ret;
4495 u32 i;
4496
4497 svc_rdy_ext->n_ext_hal_reg_caps = 0;
4498 svc_rdy_ext->ext_hal_reg_caps = ptr;
4499 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4500 ath12k_wmi_ext_hal_reg_caps_parse,
4501 svc_rdy_ext);
4502 if (ret) {
4503 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4504 return ret;
4505 }
4506
4507 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) {
4508 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle,
4509 svc_rdy_ext->soc_hal_reg_caps,
4510 svc_rdy_ext->ext_hal_reg_caps, i,
4511 ®_cap);
4512 if (ret) {
4513 ath12k_warn(soc, "failed to extract reg cap %d\n", i);
4514 return ret;
4515 }
4516
4517 if (reg_cap.phy_id >= MAX_RADIOS) {
4518 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id);
4519 return -EINVAL;
4520 }
4521
4522 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap;
4523 }
4524 return 0;
4525 }
4526
ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4527 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc,
4528 u16 len, const void *ptr,
4529 void *data)
4530 {
4531 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4532 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4533 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id);
4534 u32 phy_id_map;
4535 int pdev_index = 0;
4536 int ret;
4537
4538 svc_rdy_ext->soc_hal_reg_caps = ptr;
4539 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy);
4540
4541 soc->num_radios = 0;
4542 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map);
4543 soc->fw_pdev_count = 0;
4544
4545 while (phy_id_map && soc->num_radios < MAX_RADIOS) {
4546 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle,
4547 svc_rdy_ext,
4548 hw_mode_id, soc->num_radios,
4549 &soc->pdevs[pdev_index]);
4550 if (ret) {
4551 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n",
4552 soc->num_radios);
4553 return ret;
4554 }
4555
4556 soc->num_radios++;
4557
4558 /* For single_pdev_only targets,
4559 * save mac_phy capability in the same pdev
4560 */
4561 if (soc->hw_params->single_pdev_only)
4562 pdev_index = 0;
4563 else
4564 pdev_index = soc->num_radios;
4565
4566 /* TODO: mac_phy_cap prints */
4567 phy_id_map >>= 1;
4568 }
4569
4570 if (soc->hw_params->single_pdev_only) {
4571 soc->num_radios = 1;
4572 soc->pdevs[0].pdev_id = 0;
4573 }
4574
4575 return 0;
4576 }
4577
ath12k_wmi_dma_ring_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4578 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc,
4579 u16 tag, u16 len,
4580 const void *ptr, void *data)
4581 {
4582 struct ath12k_wmi_dma_ring_caps_parse *parse = data;
4583
4584 if (tag != WMI_TAG_DMA_RING_CAPABILITIES)
4585 return -EPROTO;
4586
4587 parse->n_dma_ring_caps++;
4588 return 0;
4589 }
4590
ath12k_wmi_alloc_dbring_caps(struct ath12k_base * ab,u32 num_cap)4591 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab,
4592 u32 num_cap)
4593 {
4594 size_t sz;
4595 void *ptr;
4596
4597 sz = num_cap * sizeof(struct ath12k_dbring_cap);
4598 ptr = kzalloc(sz, GFP_ATOMIC);
4599 if (!ptr)
4600 return -ENOMEM;
4601
4602 ab->db_caps = ptr;
4603 ab->num_db_cap = num_cap;
4604
4605 return 0;
4606 }
4607
ath12k_wmi_free_dbring_caps(struct ath12k_base * ab)4608 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab)
4609 {
4610 kfree(ab->db_caps);
4611 ab->db_caps = NULL;
4612 ab->num_db_cap = 0;
4613 }
4614
ath12k_wmi_dma_ring_caps(struct ath12k_base * ab,u16 len,const void * ptr,void * data)4615 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab,
4616 u16 len, const void *ptr, void *data)
4617 {
4618 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data;
4619 struct ath12k_wmi_dma_ring_caps_params *dma_caps;
4620 struct ath12k_dbring_cap *dir_buff_caps;
4621 int ret;
4622 u32 i;
4623
4624 dma_caps_parse->n_dma_ring_caps = 0;
4625 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr;
4626 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4627 ath12k_wmi_dma_ring_caps_parse,
4628 dma_caps_parse);
4629 if (ret) {
4630 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret);
4631 return ret;
4632 }
4633
4634 if (!dma_caps_parse->n_dma_ring_caps)
4635 return 0;
4636
4637 if (ab->num_db_cap) {
4638 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n");
4639 return 0;
4640 }
4641
4642 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps);
4643 if (ret)
4644 return ret;
4645
4646 dir_buff_caps = ab->db_caps;
4647 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) {
4648 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) {
4649 ath12k_warn(ab, "Invalid module id %d\n",
4650 le32_to_cpu(dma_caps[i].module_id));
4651 ret = -EINVAL;
4652 goto free_dir_buff;
4653 }
4654
4655 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id);
4656 dir_buff_caps[i].pdev_id =
4657 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id));
4658 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem);
4659 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz);
4660 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align);
4661 }
4662
4663 return 0;
4664
4665 free_dir_buff:
4666 ath12k_wmi_free_dbring_caps(ab);
4667 return ret;
4668 }
4669
4670 static void
ath12k_wmi_save_mac_phy_info(struct ath12k_base * ab,const struct ath12k_wmi_mac_phy_caps_params * mac_phy_cap,struct ath12k_svc_ext_mac_phy_info * mac_phy_info)4671 ath12k_wmi_save_mac_phy_info(struct ath12k_base *ab,
4672 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap,
4673 struct ath12k_svc_ext_mac_phy_info *mac_phy_info)
4674 {
4675 mac_phy_info->phy_id = __le32_to_cpu(mac_phy_cap->phy_id);
4676 mac_phy_info->supported_bands = __le32_to_cpu(mac_phy_cap->supported_bands);
4677 mac_phy_info->hw_freq_range.low_2ghz_freq =
4678 __le32_to_cpu(mac_phy_cap->low_2ghz_chan_freq);
4679 mac_phy_info->hw_freq_range.high_2ghz_freq =
4680 __le32_to_cpu(mac_phy_cap->high_2ghz_chan_freq);
4681 mac_phy_info->hw_freq_range.low_5ghz_freq =
4682 __le32_to_cpu(mac_phy_cap->low_5ghz_chan_freq);
4683 mac_phy_info->hw_freq_range.high_5ghz_freq =
4684 __le32_to_cpu(mac_phy_cap->high_5ghz_chan_freq);
4685 }
4686
4687 static void
ath12k_wmi_save_all_mac_phy_info(struct ath12k_base * ab,struct ath12k_wmi_svc_rdy_ext_parse * svc_rdy_ext)4688 ath12k_wmi_save_all_mac_phy_info(struct ath12k_base *ab,
4689 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext)
4690 {
4691 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
4692 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap;
4693 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
4694 struct ath12k_svc_ext_mac_phy_info *mac_phy_info;
4695 u32 hw_mode_id, phy_bit_map;
4696 u8 hw_idx;
4697
4698 mac_phy_info = &svc_ext_info->mac_phy_info[0];
4699 mac_phy_cap = svc_rdy_ext->mac_phy_caps;
4700
4701 for (hw_idx = 0; hw_idx < svc_ext_info->num_hw_modes; hw_idx++) {
4702 hw_mode_cap = &svc_rdy_ext->hw_mode_caps[hw_idx];
4703 hw_mode_id = __le32_to_cpu(hw_mode_cap->hw_mode_id);
4704 phy_bit_map = __le32_to_cpu(hw_mode_cap->phy_id_map);
4705
4706 while (phy_bit_map) {
4707 ath12k_wmi_save_mac_phy_info(ab, mac_phy_cap, mac_phy_info);
4708 mac_phy_info->hw_mode_config_type =
4709 le32_get_bits(hw_mode_cap->hw_mode_config_type,
4710 WMI_HW_MODE_CAP_CFG_TYPE);
4711 ath12k_dbg(ab, ATH12K_DBG_WMI,
4712 "hw_idx %u hw_mode_id %u hw_mode_config_type %u supported_bands %u phy_id %u 2 GHz [%u - %u] 5 GHz [%u - %u]\n",
4713 hw_idx, hw_mode_id,
4714 mac_phy_info->hw_mode_config_type,
4715 mac_phy_info->supported_bands, mac_phy_info->phy_id,
4716 mac_phy_info->hw_freq_range.low_2ghz_freq,
4717 mac_phy_info->hw_freq_range.high_2ghz_freq,
4718 mac_phy_info->hw_freq_range.low_5ghz_freq,
4719 mac_phy_info->hw_freq_range.high_5ghz_freq);
4720
4721 mac_phy_cap++;
4722 mac_phy_info++;
4723
4724 phy_bit_map >>= 1;
4725 }
4726 }
4727 }
4728
ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4729 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
4730 u16 tag, u16 len,
4731 const void *ptr, void *data)
4732 {
4733 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4734 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4735 int ret;
4736
4737 switch (tag) {
4738 case WMI_TAG_SERVICE_READY_EXT_EVENT:
4739 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr,
4740 &svc_rdy_ext->arg);
4741 if (ret) {
4742 ath12k_warn(ab, "unable to extract ext params\n");
4743 return ret;
4744 }
4745 break;
4746
4747 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS:
4748 svc_rdy_ext->hw_caps = ptr;
4749 svc_rdy_ext->arg.num_hw_modes =
4750 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes);
4751 break;
4752
4753 case WMI_TAG_SOC_HAL_REG_CAPABILITIES:
4754 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr,
4755 svc_rdy_ext);
4756 if (ret)
4757 return ret;
4758 break;
4759
4760 case WMI_TAG_ARRAY_STRUCT:
4761 if (!svc_rdy_ext->hw_mode_done) {
4762 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext);
4763 if (ret)
4764 return ret;
4765
4766 svc_rdy_ext->hw_mode_done = true;
4767 } else if (!svc_rdy_ext->mac_phy_done) {
4768 svc_rdy_ext->n_mac_phy_caps = 0;
4769 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4770 ath12k_wmi_mac_phy_caps_parse,
4771 svc_rdy_ext);
4772 if (ret) {
4773 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4774 return ret;
4775 }
4776
4777 ath12k_wmi_save_all_mac_phy_info(ab, svc_rdy_ext);
4778
4779 svc_rdy_ext->mac_phy_done = true;
4780 } else if (!svc_rdy_ext->ext_hal_reg_done) {
4781 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);
4782 if (ret)
4783 return ret;
4784
4785 svc_rdy_ext->ext_hal_reg_done = true;
4786 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) {
4787 svc_rdy_ext->mac_phy_chainmask_combo_done = true;
4788 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) {
4789 svc_rdy_ext->mac_phy_chainmask_cap_done = true;
4790 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) {
4791 svc_rdy_ext->oem_dma_ring_cap_done = true;
4792 } else if (!svc_rdy_ext->dma_ring_cap_done) {
4793 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4794 &svc_rdy_ext->dma_caps_parse);
4795 if (ret)
4796 return ret;
4797
4798 svc_rdy_ext->dma_ring_cap_done = true;
4799 }
4800 break;
4801
4802 default:
4803 break;
4804 }
4805 return 0;
4806 }
4807
ath12k_service_ready_ext_event(struct ath12k_base * ab,struct sk_buff * skb)4808 static int ath12k_service_ready_ext_event(struct ath12k_base *ab,
4809 struct sk_buff *skb)
4810 {
4811 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { };
4812 int ret;
4813
4814 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4815 ath12k_wmi_svc_rdy_ext_parse,
4816 &svc_rdy_ext);
4817 if (ret) {
4818 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4819 goto err;
4820 }
4821
4822 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map))
4823 complete(&ab->wmi_ab.service_ready);
4824
4825 kfree(svc_rdy_ext.mac_phy_caps);
4826 return 0;
4827
4828 err:
4829 kfree(svc_rdy_ext.mac_phy_caps);
4830 ath12k_wmi_free_dbring_caps(ab);
4831 return ret;
4832 }
4833
ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_svc_rdy_ext2_arg * arg)4834 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle,
4835 const void *ptr,
4836 struct ath12k_wmi_svc_rdy_ext2_arg *arg)
4837 {
4838 const struct wmi_service_ready_ext2_event *ev = ptr;
4839
4840 if (!ev)
4841 return -EINVAL;
4842
4843 arg->reg_db_version = le32_to_cpu(ev->reg_db_version);
4844 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz);
4845 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz);
4846 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps);
4847 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw);
4848 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma);
4849 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo);
4850 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags);
4851 return 0;
4852 }
4853
ath12k_wmi_eht_caps_parse(struct ath12k_pdev * pdev,u32 band,const __le32 cap_mac_info[],const __le32 cap_phy_info[],const __le32 supp_mcs[],const struct ath12k_wmi_ppe_threshold_params * ppet,__le32 cap_info_internal)4854 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band,
4855 const __le32 cap_mac_info[],
4856 const __le32 cap_phy_info[],
4857 const __le32 supp_mcs[],
4858 const struct ath12k_wmi_ppe_threshold_params *ppet,
4859 __le32 cap_info_internal)
4860 {
4861 struct ath12k_band_cap *cap_band = &pdev->cap.band[band];
4862 u32 support_320mhz;
4863 u8 i;
4864
4865 if (band == NL80211_BAND_6GHZ)
4866 support_320mhz = cap_band->eht_cap_phy_info[0] &
4867 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
4868
4869 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++)
4870 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]);
4871
4872 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++)
4873 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]);
4874
4875 if (band == NL80211_BAND_6GHZ)
4876 cap_band->eht_cap_phy_info[0] |= support_320mhz;
4877
4878 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]);
4879 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]);
4880 if (band != NL80211_BAND_2GHZ) {
4881 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]);
4882 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]);
4883 }
4884
4885 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1);
4886 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info);
4887 for (i = 0; i < WMI_MAX_NUM_SS; i++)
4888 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] =
4889 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]);
4890
4891 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal);
4892 }
4893
4894 static int
ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base * ab,const struct ath12k_wmi_caps_ext_params * caps,struct ath12k_pdev * pdev)4895 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab,
4896 const struct ath12k_wmi_caps_ext_params *caps,
4897 struct ath12k_pdev *pdev)
4898 {
4899 struct ath12k_band_cap *cap_band;
4900 u32 bands, support_320mhz;
4901 int i;
4902
4903 if (ab->hw_params->single_pdev_only) {
4904 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) {
4905 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) &
4906 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
4907 cap_band = &pdev->cap.band[NL80211_BAND_6GHZ];
4908 cap_band->eht_cap_phy_info[0] |= support_320mhz;
4909 return 0;
4910 }
4911
4912 for (i = 0; i < ab->fw_pdev_count; i++) {
4913 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i];
4914
4915 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) &&
4916 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) {
4917 bands = fw_pdev->supported_bands;
4918 break;
4919 }
4920 }
4921
4922 if (i == ab->fw_pdev_count)
4923 return -EINVAL;
4924 } else {
4925 bands = pdev->cap.supported_bands;
4926 }
4927
4928 if (bands & WMI_HOST_WLAN_2GHZ_CAP) {
4929 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ,
4930 caps->eht_cap_mac_info_2ghz,
4931 caps->eht_cap_phy_info_2ghz,
4932 caps->eht_supp_mcs_ext_2ghz,
4933 &caps->eht_ppet_2ghz,
4934 caps->eht_cap_info_internal);
4935 }
4936
4937 if (bands & WMI_HOST_WLAN_5GHZ_CAP) {
4938 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ,
4939 caps->eht_cap_mac_info_5ghz,
4940 caps->eht_cap_phy_info_5ghz,
4941 caps->eht_supp_mcs_ext_5ghz,
4942 &caps->eht_ppet_5ghz,
4943 caps->eht_cap_info_internal);
4944
4945 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ,
4946 caps->eht_cap_mac_info_5ghz,
4947 caps->eht_cap_phy_info_5ghz,
4948 caps->eht_supp_mcs_ext_5ghz,
4949 &caps->eht_ppet_5ghz,
4950 caps->eht_cap_info_internal);
4951 }
4952
4953 pdev->cap.eml_cap = le32_to_cpu(caps->eml_capability);
4954 pdev->cap.mld_cap = le32_to_cpu(caps->mld_capability);
4955
4956 return 0;
4957 }
4958
ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4959 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag,
4960 u16 len, const void *ptr,
4961 void *data)
4962 {
4963 const struct ath12k_wmi_caps_ext_params *caps = ptr;
4964 int i = 0, ret;
4965
4966 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT)
4967 return -EPROTO;
4968
4969 if (ab->hw_params->single_pdev_only) {
4970 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) &&
4971 caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE)
4972 return 0;
4973 } else {
4974 for (i = 0; i < ab->num_radios; i++) {
4975 if (ab->pdevs[i].pdev_id ==
4976 ath12k_wmi_caps_ext_get_pdev_id(caps))
4977 break;
4978 }
4979
4980 if (i == ab->num_radios)
4981 return -EINVAL;
4982 }
4983
4984 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]);
4985 if (ret) {
4986 ath12k_warn(ab,
4987 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n",
4988 ret, ab->pdevs[i].pdev_id);
4989 return ret;
4990 }
4991
4992 return 0;
4993 }
4994
4995 static void
ath12k_wmi_update_freq_info(struct ath12k_base * ab,struct ath12k_svc_ext_mac_phy_info * mac_cap,enum ath12k_hw_mode mode,u32 phy_id)4996 ath12k_wmi_update_freq_info(struct ath12k_base *ab,
4997 struct ath12k_svc_ext_mac_phy_info *mac_cap,
4998 enum ath12k_hw_mode mode,
4999 u32 phy_id)
5000 {
5001 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5002 struct ath12k_hw_mode_freq_range_arg *mac_range;
5003
5004 mac_range = &hw_mode_info->freq_range_caps[mode][phy_id];
5005
5006 if (mac_cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) {
5007 mac_range->low_2ghz_freq = max_t(u32,
5008 mac_cap->hw_freq_range.low_2ghz_freq,
5009 ATH12K_MIN_2GHZ_FREQ);
5010 mac_range->high_2ghz_freq = mac_cap->hw_freq_range.high_2ghz_freq ?
5011 min_t(u32,
5012 mac_cap->hw_freq_range.high_2ghz_freq,
5013 ATH12K_MAX_2GHZ_FREQ) :
5014 ATH12K_MAX_2GHZ_FREQ;
5015 }
5016
5017 if (mac_cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP) {
5018 mac_range->low_5ghz_freq = max_t(u32,
5019 mac_cap->hw_freq_range.low_5ghz_freq,
5020 ATH12K_MIN_5GHZ_FREQ);
5021 mac_range->high_5ghz_freq = mac_cap->hw_freq_range.high_5ghz_freq ?
5022 min_t(u32,
5023 mac_cap->hw_freq_range.high_5ghz_freq,
5024 ATH12K_MAX_6GHZ_FREQ) :
5025 ATH12K_MAX_6GHZ_FREQ;
5026 }
5027 }
5028
5029 static bool
ath12k_wmi_all_phy_range_updated(struct ath12k_base * ab,enum ath12k_hw_mode hwmode)5030 ath12k_wmi_all_phy_range_updated(struct ath12k_base *ab,
5031 enum ath12k_hw_mode hwmode)
5032 {
5033 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5034 struct ath12k_hw_mode_freq_range_arg *mac_range;
5035 u8 phy_id;
5036
5037 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5038 mac_range = &hw_mode_info->freq_range_caps[hwmode][phy_id];
5039 /* modify SBS/DBS range only when both phy for DBS are filled */
5040 if (!mac_range->low_2ghz_freq && !mac_range->low_5ghz_freq)
5041 return false;
5042 }
5043
5044 return true;
5045 }
5046
ath12k_wmi_update_dbs_freq_info(struct ath12k_base * ab)5047 static void ath12k_wmi_update_dbs_freq_info(struct ath12k_base *ab)
5048 {
5049 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5050 struct ath12k_hw_mode_freq_range_arg *mac_range;
5051 u8 phy_id;
5052
5053 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_DBS];
5054 /* Reset 5 GHz range for shared mac for DBS */
5055 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5056 if (mac_range[phy_id].low_2ghz_freq &&
5057 mac_range[phy_id].low_5ghz_freq) {
5058 mac_range[phy_id].low_5ghz_freq = 0;
5059 mac_range[phy_id].high_5ghz_freq = 0;
5060 }
5061 }
5062 }
5063
5064 static u32
ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5065 ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5066 {
5067 u32 highest_freq = 0;
5068 u8 phy_id;
5069
5070 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5071 if (range[phy_id].high_5ghz_freq > highest_freq)
5072 highest_freq = range[phy_id].high_5ghz_freq;
5073 }
5074
5075 return highest_freq ? highest_freq : ATH12K_MAX_6GHZ_FREQ;
5076 }
5077
5078 static u32
ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5079 ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5080 {
5081 u32 lowest_freq = 0;
5082 u8 phy_id;
5083
5084 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5085 if ((!lowest_freq && range[phy_id].low_5ghz_freq) ||
5086 range[phy_id].low_5ghz_freq < lowest_freq)
5087 lowest_freq = range[phy_id].low_5ghz_freq;
5088 }
5089
5090 return lowest_freq ? lowest_freq : ATH12K_MIN_5GHZ_FREQ;
5091 }
5092
5093 static void
ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5094 ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base *ab,
5095 u16 sbs_range_sep,
5096 struct ath12k_hw_mode_freq_range_arg *ref_freq)
5097 {
5098 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5099 struct ath12k_hw_mode_freq_range_arg *upper_sbs_freq_range;
5100 u8 phy_id;
5101
5102 upper_sbs_freq_range =
5103 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_UPPER_SHARE];
5104
5105 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5106 upper_sbs_freq_range[phy_id].low_2ghz_freq =
5107 ref_freq[phy_id].low_2ghz_freq;
5108 upper_sbs_freq_range[phy_id].high_2ghz_freq =
5109 ref_freq[phy_id].high_2ghz_freq;
5110
5111 /* update for shared mac */
5112 if (upper_sbs_freq_range[phy_id].low_2ghz_freq) {
5113 upper_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5114 upper_sbs_freq_range[phy_id].high_5ghz_freq =
5115 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5116 } else {
5117 upper_sbs_freq_range[phy_id].low_5ghz_freq =
5118 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5119 upper_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5120 }
5121 }
5122 }
5123
5124 static void
ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5125 ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base *ab,
5126 u16 sbs_range_sep,
5127 struct ath12k_hw_mode_freq_range_arg *ref_freq)
5128 {
5129 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5130 struct ath12k_hw_mode_freq_range_arg *lower_sbs_freq_range;
5131 u8 phy_id;
5132
5133 lower_sbs_freq_range =
5134 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_LOWER_SHARE];
5135
5136 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5137 lower_sbs_freq_range[phy_id].low_2ghz_freq =
5138 ref_freq[phy_id].low_2ghz_freq;
5139 lower_sbs_freq_range[phy_id].high_2ghz_freq =
5140 ref_freq[phy_id].high_2ghz_freq;
5141
5142 /* update for shared mac */
5143 if (lower_sbs_freq_range[phy_id].low_2ghz_freq) {
5144 lower_sbs_freq_range[phy_id].low_5ghz_freq =
5145 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5146 lower_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5147 } else {
5148 lower_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5149 lower_sbs_freq_range[phy_id].high_5ghz_freq =
5150 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5151 }
5152 }
5153 }
5154
ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)5155 static const char *ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)
5156 {
5157 static const char * const mode_str[] = {
5158 [ATH12K_HW_MODE_SMM] = "SMM",
5159 [ATH12K_HW_MODE_DBS] = "DBS",
5160 [ATH12K_HW_MODE_SBS] = "SBS",
5161 [ATH12K_HW_MODE_SBS_UPPER_SHARE] = "SBS_UPPER_SHARE",
5162 [ATH12K_HW_MODE_SBS_LOWER_SHARE] = "SBS_LOWER_SHARE",
5163 };
5164
5165 if (hw_mode >= ARRAY_SIZE(mode_str))
5166 return "Unknown";
5167
5168 return mode_str[hw_mode];
5169 }
5170
5171 static void
ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base * ab,struct ath12k_hw_mode_freq_range_arg * freq_range,enum ath12k_hw_mode hw_mode)5172 ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base *ab,
5173 struct ath12k_hw_mode_freq_range_arg *freq_range,
5174 enum ath12k_hw_mode hw_mode)
5175 {
5176 u8 i;
5177
5178 for (i = 0; i < MAX_RADIOS; i++)
5179 if (freq_range[i].low_2ghz_freq || freq_range[i].low_5ghz_freq)
5180 ath12k_dbg(ab, ATH12K_DBG_WMI,
5181 "frequency range: %s(%d) mac %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5182 ath12k_wmi_hw_mode_to_str(hw_mode),
5183 hw_mode, i,
5184 freq_range[i].low_2ghz_freq,
5185 freq_range[i].high_2ghz_freq,
5186 freq_range[i].low_5ghz_freq,
5187 freq_range[i].high_5ghz_freq);
5188 }
5189
ath12k_wmi_dump_freq_range(struct ath12k_base * ab)5190 static void ath12k_wmi_dump_freq_range(struct ath12k_base *ab)
5191 {
5192 struct ath12k_hw_mode_freq_range_arg *freq_range;
5193 u8 i;
5194
5195 for (i = ATH12K_HW_MODE_SMM; i < ATH12K_HW_MODE_MAX; i++) {
5196 freq_range = ab->wmi_ab.hw_mode_info.freq_range_caps[i];
5197 ath12k_wmi_dump_freq_range_per_mac(ab, freq_range, i);
5198 }
5199 }
5200
ath12k_wmi_modify_sbs_freq(struct ath12k_base * ab,u8 phy_id)5201 static int ath12k_wmi_modify_sbs_freq(struct ath12k_base *ab, u8 phy_id)
5202 {
5203 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5204 struct ath12k_hw_mode_freq_range_arg *sbs_mac_range, *shared_mac_range;
5205 struct ath12k_hw_mode_freq_range_arg *non_shared_range;
5206 u8 shared_phy_id;
5207
5208 sbs_mac_range = &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][phy_id];
5209
5210 /* if SBS mac range has both 2.4 and 5 GHz ranges, i.e. shared phy_id
5211 * keep the range as it is in SBS
5212 */
5213 if (sbs_mac_range->low_2ghz_freq && sbs_mac_range->low_5ghz_freq)
5214 return 0;
5215
5216 if (sbs_mac_range->low_2ghz_freq && !sbs_mac_range->low_5ghz_freq) {
5217 ath12k_err(ab, "Invalid DBS/SBS mode with only 2.4Ghz");
5218 ath12k_wmi_dump_freq_range_per_mac(ab, sbs_mac_range, ATH12K_HW_MODE_SBS);
5219 return -EINVAL;
5220 }
5221
5222 non_shared_range = sbs_mac_range;
5223 /* if SBS mac range has only 5 GHz then it's the non-shared phy, so
5224 * modify the range as per the shared mac.
5225 */
5226 shared_phy_id = phy_id ? 0 : 1;
5227 shared_mac_range =
5228 &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][shared_phy_id];
5229
5230 if (shared_mac_range->low_5ghz_freq > non_shared_range->low_5ghz_freq) {
5231 ath12k_dbg(ab, ATH12K_DBG_WMI, "high 5 GHz shared");
5232 /* If the shared mac lower 5 GHz frequency is greater than
5233 * non-shared mac lower 5 GHz frequency then the shared mac has
5234 * high 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz high
5235 * freq should be less than the shared mac's low 5 GHz freq.
5236 */
5237 if (non_shared_range->high_5ghz_freq >=
5238 shared_mac_range->low_5ghz_freq)
5239 non_shared_range->high_5ghz_freq =
5240 max_t(u32, shared_mac_range->low_5ghz_freq - 10,
5241 non_shared_range->low_5ghz_freq);
5242 } else if (shared_mac_range->high_5ghz_freq <
5243 non_shared_range->high_5ghz_freq) {
5244 ath12k_dbg(ab, ATH12K_DBG_WMI, "low 5 GHz shared");
5245 /* If the shared mac high 5 GHz frequency is less than
5246 * non-shared mac high 5 GHz frequency then the shared mac has
5247 * low 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz low
5248 * freq should be greater than the shared mac's high 5 GHz freq.
5249 */
5250 if (shared_mac_range->high_5ghz_freq >=
5251 non_shared_range->low_5ghz_freq)
5252 non_shared_range->low_5ghz_freq =
5253 min_t(u32, shared_mac_range->high_5ghz_freq + 10,
5254 non_shared_range->high_5ghz_freq);
5255 } else {
5256 ath12k_warn(ab, "invalid SBS range with all 5 GHz shared");
5257 return -EINVAL;
5258 }
5259
5260 return 0;
5261 }
5262
ath12k_wmi_update_sbs_freq_info(struct ath12k_base * ab)5263 static void ath12k_wmi_update_sbs_freq_info(struct ath12k_base *ab)
5264 {
5265 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5266 struct ath12k_hw_mode_freq_range_arg *mac_range;
5267 u16 sbs_range_sep;
5268 u8 phy_id;
5269 int ret;
5270
5271 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS];
5272
5273 /* If sbs_lower_band_end_freq has a value, then the frequency range
5274 * will be split using that value.
5275 */
5276 sbs_range_sep = ab->wmi_ab.sbs_lower_band_end_freq;
5277 if (sbs_range_sep) {
5278 ath12k_wmi_fill_upper_share_sbs_freq(ab, sbs_range_sep,
5279 mac_range);
5280 ath12k_wmi_fill_lower_share_sbs_freq(ab, sbs_range_sep,
5281 mac_range);
5282 /* Hardware specifies the range boundary with sbs_range_sep,
5283 * (i.e. the boundary between 5 GHz high and 5 GHz low),
5284 * reset the original one to make sure it will not get used.
5285 */
5286 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5287 return;
5288 }
5289
5290 /* If sbs_lower_band_end_freq is not set that means firmware will send one
5291 * shared mac range and one non-shared mac range. so update that freq.
5292 */
5293 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5294 ret = ath12k_wmi_modify_sbs_freq(ab, phy_id);
5295 if (ret) {
5296 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5297 break;
5298 }
5299 }
5300 }
5301
5302 static void
ath12k_wmi_update_mac_freq_info(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type hw_config_type,u32 phy_id,struct ath12k_svc_ext_mac_phy_info * mac_cap)5303 ath12k_wmi_update_mac_freq_info(struct ath12k_base *ab,
5304 enum wmi_host_hw_mode_config_type hw_config_type,
5305 u32 phy_id,
5306 struct ath12k_svc_ext_mac_phy_info *mac_cap)
5307 {
5308 if (phy_id >= MAX_RADIOS) {
5309 ath12k_err(ab, "mac more than two not supported: %d", phy_id);
5310 return;
5311 }
5312
5313 ath12k_dbg(ab, ATH12K_DBG_WMI,
5314 "hw_mode_cfg %d mac %d band 0x%x SBS cutoff freq %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5315 hw_config_type, phy_id, mac_cap->supported_bands,
5316 ab->wmi_ab.sbs_lower_band_end_freq,
5317 mac_cap->hw_freq_range.low_2ghz_freq,
5318 mac_cap->hw_freq_range.high_2ghz_freq,
5319 mac_cap->hw_freq_range.low_5ghz_freq,
5320 mac_cap->hw_freq_range.high_5ghz_freq);
5321
5322 switch (hw_config_type) {
5323 case WMI_HOST_HW_MODE_SINGLE:
5324 if (phy_id) {
5325 ath12k_dbg(ab, ATH12K_DBG_WMI, "mac phy 1 is not supported");
5326 break;
5327 }
5328 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SMM, phy_id);
5329 break;
5330
5331 case WMI_HOST_HW_MODE_DBS:
5332 if (!ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5333 ath12k_wmi_update_freq_info(ab, mac_cap,
5334 ATH12K_HW_MODE_DBS, phy_id);
5335 break;
5336 case WMI_HOST_HW_MODE_DBS_SBS:
5337 case WMI_HOST_HW_MODE_DBS_OR_SBS:
5338 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_DBS, phy_id);
5339 if (ab->wmi_ab.sbs_lower_band_end_freq ||
5340 mac_cap->hw_freq_range.low_5ghz_freq ||
5341 mac_cap->hw_freq_range.low_2ghz_freq)
5342 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS,
5343 phy_id);
5344
5345 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5346 ath12k_wmi_update_dbs_freq_info(ab);
5347 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5348 ath12k_wmi_update_sbs_freq_info(ab);
5349 break;
5350 case WMI_HOST_HW_MODE_SBS:
5351 case WMI_HOST_HW_MODE_SBS_PASSIVE:
5352 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, phy_id);
5353 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5354 ath12k_wmi_update_sbs_freq_info(ab);
5355
5356 break;
5357 default:
5358 break;
5359 }
5360 }
5361
ath12k_wmi_sbs_range_present(struct ath12k_base * ab)5362 static bool ath12k_wmi_sbs_range_present(struct ath12k_base *ab)
5363 {
5364 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS) ||
5365 (ab->wmi_ab.sbs_lower_band_end_freq &&
5366 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_LOWER_SHARE) &&
5367 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_UPPER_SHARE)))
5368 return true;
5369
5370 return false;
5371 }
5372
ath12k_wmi_update_hw_mode_list(struct ath12k_base * ab)5373 static int ath12k_wmi_update_hw_mode_list(struct ath12k_base *ab)
5374 {
5375 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
5376 struct ath12k_hw_mode_info *info = &ab->wmi_ab.hw_mode_info;
5377 enum wmi_host_hw_mode_config_type hw_config_type;
5378 struct ath12k_svc_ext_mac_phy_info *tmp;
5379 bool dbs_mode = false, sbs_mode = false;
5380 u32 i, j = 0;
5381
5382 if (!svc_ext_info->num_hw_modes) {
5383 ath12k_err(ab, "invalid number of hw modes");
5384 return -EINVAL;
5385 }
5386
5387 ath12k_dbg(ab, ATH12K_DBG_WMI, "updated HW mode list: num modes %d",
5388 svc_ext_info->num_hw_modes);
5389
5390 memset(info->freq_range_caps, 0, sizeof(info->freq_range_caps));
5391
5392 for (i = 0; i < svc_ext_info->num_hw_modes; i++) {
5393 if (j >= ATH12K_MAX_MAC_PHY_CAP)
5394 return -EINVAL;
5395
5396 /* Update for MAC0 */
5397 tmp = &svc_ext_info->mac_phy_info[j++];
5398 hw_config_type = tmp->hw_mode_config_type;
5399 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, tmp->phy_id, tmp);
5400
5401 /* SBS and DBS have dual MAC. Up to 2 MACs are considered. */
5402 if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5403 hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5404 hw_config_type == WMI_HOST_HW_MODE_SBS ||
5405 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) {
5406 if (j >= ATH12K_MAX_MAC_PHY_CAP)
5407 return -EINVAL;
5408 /* Update for MAC1 */
5409 tmp = &svc_ext_info->mac_phy_info[j++];
5410 ath12k_wmi_update_mac_freq_info(ab, hw_config_type,
5411 tmp->phy_id, tmp);
5412
5413 if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5414 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS)
5415 dbs_mode = true;
5416
5417 if (ath12k_wmi_sbs_range_present(ab) &&
5418 (hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5419 hw_config_type == WMI_HOST_HW_MODE_SBS ||
5420 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS))
5421 sbs_mode = true;
5422 }
5423 }
5424
5425 info->support_dbs = dbs_mode;
5426 info->support_sbs = sbs_mode;
5427
5428 ath12k_wmi_dump_freq_range(ab);
5429
5430 return 0;
5431 }
5432
ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5433 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab,
5434 u16 tag, u16 len,
5435 const void *ptr, void *data)
5436 {
5437 const struct ath12k_wmi_dbs_or_sbs_cap_params *dbs_or_sbs_caps;
5438 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
5439 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data;
5440 int ret;
5441
5442 switch (tag) {
5443 case WMI_TAG_SERVICE_READY_EXT2_EVENT:
5444 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr,
5445 &parse->arg);
5446 if (ret) {
5447 ath12k_warn(ab,
5448 "failed to extract wmi service ready ext2 parameters: %d\n",
5449 ret);
5450 return ret;
5451 }
5452 break;
5453
5454 case WMI_TAG_ARRAY_STRUCT:
5455 if (!parse->dma_ring_cap_done) {
5456 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
5457 &parse->dma_caps_parse);
5458 if (ret)
5459 return ret;
5460
5461 parse->dma_ring_cap_done = true;
5462 } else if (!parse->spectral_bin_scaling_done) {
5463 /* TODO: This is a place-holder as WMI tag for
5464 * spectral scaling is before
5465 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT
5466 */
5467 parse->spectral_bin_scaling_done = true;
5468 } else if (!parse->mac_phy_caps_ext_done) {
5469 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
5470 ath12k_wmi_tlv_mac_phy_caps_ext,
5471 parse);
5472 if (ret) {
5473 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n",
5474 ret);
5475 return ret;
5476 }
5477
5478 parse->mac_phy_caps_ext_done = true;
5479 } else if (!parse->hal_reg_caps_ext2_done) {
5480 parse->hal_reg_caps_ext2_done = true;
5481 } else if (!parse->scan_radio_caps_ext2_done) {
5482 parse->scan_radio_caps_ext2_done = true;
5483 } else if (!parse->twt_caps_done) {
5484 parse->twt_caps_done = true;
5485 } else if (!parse->htt_msdu_idx_to_qtype_map_done) {
5486 parse->htt_msdu_idx_to_qtype_map_done = true;
5487 } else if (!parse->dbs_or_sbs_cap_ext_done) {
5488 dbs_or_sbs_caps = ptr;
5489 ab->wmi_ab.sbs_lower_band_end_freq =
5490 __le32_to_cpu(dbs_or_sbs_caps->sbs_lower_band_end_freq);
5491
5492 ath12k_dbg(ab, ATH12K_DBG_WMI, "sbs_lower_band_end_freq %u\n",
5493 ab->wmi_ab.sbs_lower_band_end_freq);
5494
5495 ret = ath12k_wmi_update_hw_mode_list(ab);
5496 if (ret) {
5497 ath12k_warn(ab, "failed to update hw mode list: %d\n",
5498 ret);
5499 return ret;
5500 }
5501
5502 parse->dbs_or_sbs_cap_ext_done = true;
5503 }
5504
5505 break;
5506 default:
5507 break;
5508 }
5509
5510 return 0;
5511 }
5512
ath12k_service_ready_ext2_event(struct ath12k_base * ab,struct sk_buff * skb)5513 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab,
5514 struct sk_buff *skb)
5515 {
5516 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { };
5517 int ret;
5518
5519 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5520 ath12k_wmi_svc_rdy_ext2_parse,
5521 &svc_rdy_ext2);
5522 if (ret) {
5523 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret);
5524 goto err;
5525 }
5526
5527 complete(&ab->wmi_ab.service_ready);
5528
5529 return 0;
5530
5531 err:
5532 ath12k_wmi_free_dbring_caps(ab);
5533 return ret;
5534 }
5535
ath12k_pull_vdev_start_resp_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_start_resp_event * vdev_rsp)5536 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb,
5537 struct wmi_vdev_start_resp_event *vdev_rsp)
5538 {
5539 const void **tb;
5540 const struct wmi_vdev_start_resp_event *ev;
5541 int ret;
5542
5543 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5544 if (IS_ERR(tb)) {
5545 ret = PTR_ERR(tb);
5546 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5547 return ret;
5548 }
5549
5550 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT];
5551 if (!ev) {
5552 ath12k_warn(ab, "failed to fetch vdev start resp ev");
5553 kfree(tb);
5554 return -EPROTO;
5555 }
5556
5557 *vdev_rsp = *ev;
5558
5559 kfree(tb);
5560 return 0;
5561 }
5562
5563 static struct ath12k_reg_rule
create_ext_reg_rules_from_wmi(u32 num_reg_rules,struct ath12k_wmi_reg_rule_ext_params * wmi_reg_rule)5564 *create_ext_reg_rules_from_wmi(u32 num_reg_rules,
5565 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
5566 {
5567 struct ath12k_reg_rule *reg_rule_ptr;
5568 u32 count;
5569
5570 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)),
5571 GFP_ATOMIC);
5572
5573 if (!reg_rule_ptr)
5574 return NULL;
5575
5576 for (count = 0; count < num_reg_rules; count++) {
5577 reg_rule_ptr[count].start_freq =
5578 le32_get_bits(wmi_reg_rule[count].freq_info,
5579 REG_RULE_START_FREQ);
5580 reg_rule_ptr[count].end_freq =
5581 le32_get_bits(wmi_reg_rule[count].freq_info,
5582 REG_RULE_END_FREQ);
5583 reg_rule_ptr[count].max_bw =
5584 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5585 REG_RULE_MAX_BW);
5586 reg_rule_ptr[count].reg_power =
5587 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5588 REG_RULE_REG_PWR);
5589 reg_rule_ptr[count].ant_gain =
5590 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5591 REG_RULE_ANT_GAIN);
5592 reg_rule_ptr[count].flags =
5593 le32_get_bits(wmi_reg_rule[count].flag_info,
5594 REG_RULE_FLAGS);
5595 reg_rule_ptr[count].psd_flag =
5596 le32_get_bits(wmi_reg_rule[count].psd_power_info,
5597 REG_RULE_PSD_INFO);
5598 reg_rule_ptr[count].psd_eirp =
5599 le32_get_bits(wmi_reg_rule[count].psd_power_info,
5600 REG_RULE_PSD_EIRP);
5601 }
5602
5603 return reg_rule_ptr;
5604 }
5605
ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params * rule,u32 num_reg_rules)5606 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule,
5607 u32 num_reg_rules)
5608 {
5609 u8 num_invalid_5ghz_rules = 0;
5610 u32 count, start_freq;
5611
5612 for (count = 0; count < num_reg_rules; count++) {
5613 start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ);
5614
5615 if (start_freq >= ATH12K_MIN_6GHZ_FREQ)
5616 num_invalid_5ghz_rules++;
5617 }
5618
5619 return num_invalid_5ghz_rules;
5620 }
5621
ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_reg_info * reg_info)5622 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
5623 struct sk_buff *skb,
5624 struct ath12k_reg_info *reg_info)
5625 {
5626 const void **tb;
5627 const struct wmi_reg_chan_list_cc_ext_event *ev;
5628 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
5629 u32 num_2g_reg_rules, num_5g_reg_rules;
5630 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
5631 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
5632 u8 num_invalid_5ghz_ext_rules;
5633 u32 total_reg_rules = 0;
5634 int ret, i, j;
5635
5636 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n");
5637
5638 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5639 if (IS_ERR(tb)) {
5640 ret = PTR_ERR(tb);
5641 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5642 return ret;
5643 }
5644
5645 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
5646 if (!ev) {
5647 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n");
5648 kfree(tb);
5649 return -EPROTO;
5650 }
5651
5652 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules);
5653 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules);
5654 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] =
5655 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi);
5656 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] =
5657 le32_to_cpu(ev->num_6g_reg_rules_ap_sp);
5658 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] =
5659 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp);
5660
5661 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5662 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
5663 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]);
5664 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
5665 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]);
5666 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
5667 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]);
5668 }
5669
5670 num_2g_reg_rules = reg_info->num_2g_reg_rules;
5671 total_reg_rules += num_2g_reg_rules;
5672 num_5g_reg_rules = reg_info->num_5g_reg_rules;
5673 total_reg_rules += num_5g_reg_rules;
5674
5675 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) {
5676 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n",
5677 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES);
5678 kfree(tb);
5679 return -EINVAL;
5680 }
5681
5682 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
5683 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i];
5684
5685 if (num_6g_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) {
5686 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n",
5687 i, num_6g_reg_rules_ap[i], MAX_6GHZ_REG_RULES);
5688 kfree(tb);
5689 return -EINVAL;
5690 }
5691
5692 total_reg_rules += num_6g_reg_rules_ap[i];
5693 }
5694
5695 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5696 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
5697 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
5698 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
5699
5700 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
5701 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
5702 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
5703
5704 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
5705 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
5706 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
5707
5708 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES ||
5709 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6GHZ_REG_RULES ||
5710 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6GHZ_REG_RULES) {
5711 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n",
5712 i);
5713 kfree(tb);
5714 return -EINVAL;
5715 }
5716 }
5717
5718 if (!total_reg_rules) {
5719 ath12k_warn(ab, "No reg rules available\n");
5720 kfree(tb);
5721 return -EINVAL;
5722 }
5723
5724 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
5725
5726 reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
5727 reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
5728 reg_info->num_phy = le32_to_cpu(ev->num_phy);
5729 reg_info->phy_id = le32_to_cpu(ev->phy_id);
5730 reg_info->ctry_code = le32_to_cpu(ev->country_id);
5731 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code);
5732
5733 switch (le32_to_cpu(ev->status_code)) {
5734 case WMI_REG_SET_CC_STATUS_PASS:
5735 reg_info->status_code = REG_SET_CC_STATUS_PASS;
5736 break;
5737 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
5738 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
5739 break;
5740 case WMI_REG_INIT_ALPHA2_NOT_FOUND:
5741 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
5742 break;
5743 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
5744 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
5745 break;
5746 case WMI_REG_SET_CC_STATUS_NO_MEMORY:
5747 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
5748 break;
5749 case WMI_REG_SET_CC_STATUS_FAIL:
5750 reg_info->status_code = REG_SET_CC_STATUS_FAIL;
5751 break;
5752 }
5753
5754 reg_info->is_ext_reg_event = true;
5755
5756 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g);
5757 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g);
5758 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g);
5759 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g);
5760 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi);
5761 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi);
5762 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp);
5763 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp);
5764 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp);
5765 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp);
5766
5767 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5768 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] =
5769 le32_to_cpu(ev->min_bw_6g_client_lpi[i]);
5770 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] =
5771 le32_to_cpu(ev->max_bw_6g_client_lpi[i]);
5772 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
5773 le32_to_cpu(ev->min_bw_6g_client_sp[i]);
5774 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
5775 le32_to_cpu(ev->max_bw_6g_client_sp[i]);
5776 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] =
5777 le32_to_cpu(ev->min_bw_6g_client_vlp[i]);
5778 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] =
5779 le32_to_cpu(ev->max_bw_6g_client_vlp[i]);
5780 }
5781
5782 ath12k_dbg(ab, ATH12K_DBG_WMI,
5783 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x",
5784 __func__, reg_info->alpha2, reg_info->dfs_region,
5785 reg_info->min_bw_2g, reg_info->max_bw_2g,
5786 reg_info->min_bw_5g, reg_info->max_bw_5g,
5787 reg_info->phybitmap);
5788
5789 ath12k_dbg(ab, ATH12K_DBG_WMI,
5790 "num_2g_reg_rules %d num_5g_reg_rules %d",
5791 num_2g_reg_rules, num_5g_reg_rules);
5792
5793 ath12k_dbg(ab, ATH12K_DBG_WMI,
5794 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d",
5795 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP],
5796 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP],
5797 num_6g_reg_rules_ap[WMI_REG_VLP_AP]);
5798
5799 ath12k_dbg(ab, ATH12K_DBG_WMI,
5800 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
5801 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT],
5802 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT],
5803 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]);
5804
5805 ath12k_dbg(ab, ATH12K_DBG_WMI,
5806 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
5807 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT],
5808 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT],
5809 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]);
5810
5811 ext_wmi_reg_rule =
5812 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev
5813 + sizeof(*ev)
5814 + sizeof(struct wmi_tlv));
5815
5816 if (num_2g_reg_rules) {
5817 reg_info->reg_rules_2g_ptr =
5818 create_ext_reg_rules_from_wmi(num_2g_reg_rules,
5819 ext_wmi_reg_rule);
5820
5821 if (!reg_info->reg_rules_2g_ptr) {
5822 kfree(tb);
5823 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n");
5824 return -ENOMEM;
5825 }
5826 }
5827
5828 ext_wmi_reg_rule += num_2g_reg_rules;
5829
5830 /* Firmware might include 6 GHz reg rule in 5 GHz rule list
5831 * for few countries along with separate 6 GHz rule.
5832 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
5833 * causes intersect check to be true, and same rules will be
5834 * shown multiple times in iw cmd.
5835 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
5836 */
5837 num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule,
5838 num_5g_reg_rules);
5839
5840 if (num_invalid_5ghz_ext_rules) {
5841 ath12k_dbg(ab, ATH12K_DBG_WMI,
5842 "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
5843 reg_info->alpha2, reg_info->num_5g_reg_rules,
5844 num_invalid_5ghz_ext_rules);
5845
5846 num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules;
5847 reg_info->num_5g_reg_rules = num_5g_reg_rules;
5848 }
5849
5850 if (num_5g_reg_rules) {
5851 reg_info->reg_rules_5g_ptr =
5852 create_ext_reg_rules_from_wmi(num_5g_reg_rules,
5853 ext_wmi_reg_rule);
5854
5855 if (!reg_info->reg_rules_5g_ptr) {
5856 kfree(tb);
5857 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n");
5858 return -ENOMEM;
5859 }
5860 }
5861
5862 /* We have adjusted the number of 5 GHz reg rules above. But still those
5863 * many rules needs to be adjusted in ext_wmi_reg_rule.
5864 *
5865 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
5866 */
5867 ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules);
5868
5869 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
5870 reg_info->reg_rules_6g_ap_ptr[i] =
5871 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i],
5872 ext_wmi_reg_rule);
5873
5874 if (!reg_info->reg_rules_6g_ap_ptr[i]) {
5875 kfree(tb);
5876 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n");
5877 return -ENOMEM;
5878 }
5879
5880 ext_wmi_reg_rule += num_6g_reg_rules_ap[i];
5881 }
5882
5883 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
5884 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5885 reg_info->reg_rules_6g_client_ptr[j][i] =
5886 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i],
5887 ext_wmi_reg_rule);
5888
5889 if (!reg_info->reg_rules_6g_client_ptr[j][i]) {
5890 kfree(tb);
5891 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n");
5892 return -ENOMEM;
5893 }
5894
5895 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i];
5896 }
5897 }
5898
5899 reg_info->client_type = le32_to_cpu(ev->client_type);
5900 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
5901 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable;
5902 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] =
5903 le32_to_cpu(ev->domain_code_6g_ap_lpi);
5904 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] =
5905 le32_to_cpu(ev->domain_code_6g_ap_sp);
5906 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] =
5907 le32_to_cpu(ev->domain_code_6g_ap_vlp);
5908
5909 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5910 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] =
5911 le32_to_cpu(ev->domain_code_6g_client_lpi[i]);
5912 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] =
5913 le32_to_cpu(ev->domain_code_6g_client_sp[i]);
5914 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] =
5915 le32_to_cpu(ev->domain_code_6g_client_vlp[i]);
5916 }
5917
5918 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id);
5919
5920 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d",
5921 reg_info->client_type, reg_info->domain_code_6g_super_id);
5922
5923 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n");
5924
5925 kfree(tb);
5926 return 0;
5927 }
5928
ath12k_pull_peer_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_delete_resp_event * peer_del_resp)5929 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb,
5930 struct wmi_peer_delete_resp_event *peer_del_resp)
5931 {
5932 const void **tb;
5933 const struct wmi_peer_delete_resp_event *ev;
5934 int ret;
5935
5936 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5937 if (IS_ERR(tb)) {
5938 ret = PTR_ERR(tb);
5939 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5940 return ret;
5941 }
5942
5943 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT];
5944 if (!ev) {
5945 ath12k_warn(ab, "failed to fetch peer delete resp ev");
5946 kfree(tb);
5947 return -EPROTO;
5948 }
5949
5950 memset(peer_del_resp, 0, sizeof(*peer_del_resp));
5951
5952 peer_del_resp->vdev_id = ev->vdev_id;
5953 ether_addr_copy(peer_del_resp->peer_macaddr.addr,
5954 ev->peer_macaddr.addr);
5955
5956 kfree(tb);
5957 return 0;
5958 }
5959
ath12k_pull_vdev_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)5960 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab,
5961 struct sk_buff *skb,
5962 u32 *vdev_id)
5963 {
5964 const void **tb;
5965 const struct wmi_vdev_delete_resp_event *ev;
5966 int ret;
5967
5968 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5969 if (IS_ERR(tb)) {
5970 ret = PTR_ERR(tb);
5971 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5972 return ret;
5973 }
5974
5975 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT];
5976 if (!ev) {
5977 ath12k_warn(ab, "failed to fetch vdev delete resp ev");
5978 kfree(tb);
5979 return -EPROTO;
5980 }
5981
5982 *vdev_id = le32_to_cpu(ev->vdev_id);
5983
5984 kfree(tb);
5985 return 0;
5986 }
5987
ath12k_pull_bcn_tx_status_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id,u32 * tx_status)5988 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab,
5989 struct sk_buff *skb,
5990 u32 *vdev_id, u32 *tx_status)
5991 {
5992 const void **tb;
5993 const struct wmi_bcn_tx_status_event *ev;
5994 int ret;
5995
5996 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5997 if (IS_ERR(tb)) {
5998 ret = PTR_ERR(tb);
5999 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6000 return ret;
6001 }
6002
6003 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT];
6004 if (!ev) {
6005 ath12k_warn(ab, "failed to fetch bcn tx status ev");
6006 kfree(tb);
6007 return -EPROTO;
6008 }
6009
6010 *vdev_id = le32_to_cpu(ev->vdev_id);
6011 *tx_status = le32_to_cpu(ev->tx_status);
6012
6013 kfree(tb);
6014 return 0;
6015 }
6016
ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)6017 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb,
6018 u32 *vdev_id)
6019 {
6020 const void **tb;
6021 const struct wmi_vdev_stopped_event *ev;
6022 int ret;
6023
6024 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6025 if (IS_ERR(tb)) {
6026 ret = PTR_ERR(tb);
6027 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6028 return ret;
6029 }
6030
6031 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT];
6032 if (!ev) {
6033 ath12k_warn(ab, "failed to fetch vdev stop ev");
6034 kfree(tb);
6035 return -EPROTO;
6036 }
6037
6038 *vdev_id = le32_to_cpu(ev->vdev_id);
6039
6040 kfree(tb);
6041 return 0;
6042 }
6043
ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6044 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab,
6045 u16 tag, u16 len,
6046 const void *ptr, void *data)
6047 {
6048 struct wmi_tlv_mgmt_rx_parse *parse = data;
6049
6050 switch (tag) {
6051 case WMI_TAG_MGMT_RX_HDR:
6052 parse->fixed = ptr;
6053 break;
6054 case WMI_TAG_ARRAY_BYTE:
6055 if (!parse->frame_buf_done) {
6056 parse->frame_buf = ptr;
6057 parse->frame_buf_done = true;
6058 }
6059 break;
6060 }
6061 return 0;
6062 }
6063
ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_wmi_mgmt_rx_arg * hdr)6064 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
6065 struct sk_buff *skb,
6066 struct ath12k_wmi_mgmt_rx_arg *hdr)
6067 {
6068 struct wmi_tlv_mgmt_rx_parse parse = { };
6069 const struct ath12k_wmi_mgmt_rx_params *ev;
6070 const u8 *frame;
6071 int i, ret;
6072
6073 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6074 ath12k_wmi_tlv_mgmt_rx_parse,
6075 &parse);
6076 if (ret) {
6077 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret);
6078 return ret;
6079 }
6080
6081 ev = parse.fixed;
6082 frame = parse.frame_buf;
6083
6084 if (!ev || !frame) {
6085 ath12k_warn(ab, "failed to fetch mgmt rx hdr");
6086 return -EPROTO;
6087 }
6088
6089 hdr->pdev_id = le32_to_cpu(ev->pdev_id);
6090 hdr->chan_freq = le32_to_cpu(ev->chan_freq);
6091 hdr->channel = le32_to_cpu(ev->channel);
6092 hdr->snr = le32_to_cpu(ev->snr);
6093 hdr->rate = le32_to_cpu(ev->rate);
6094 hdr->phy_mode = le32_to_cpu(ev->phy_mode);
6095 hdr->buf_len = le32_to_cpu(ev->buf_len);
6096 hdr->status = le32_to_cpu(ev->status);
6097 hdr->flags = le32_to_cpu(ev->flags);
6098 hdr->rssi = a_sle32_to_cpu(ev->rssi);
6099 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta);
6100
6101 for (i = 0; i < ATH_MAX_ANTENNA; i++)
6102 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]);
6103
6104 if (skb->len < (frame - skb->data) + hdr->buf_len) {
6105 ath12k_warn(ab, "invalid length in mgmt rx hdr ev");
6106 return -EPROTO;
6107 }
6108
6109 /* shift the sk_buff to point to `frame` */
6110 skb_trim(skb, 0);
6111 skb_put(skb, frame - skb->data);
6112 skb_pull(skb, frame - skb->data);
6113 skb_put(skb, hdr->buf_len);
6114
6115 return 0;
6116 }
6117
wmi_process_mgmt_tx_comp(struct ath12k * ar,u32 desc_id,u32 status)6118 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
6119 u32 status)
6120 {
6121 struct sk_buff *msdu;
6122 struct ieee80211_tx_info *info;
6123 struct ath12k_skb_cb *skb_cb;
6124 int num_mgmt;
6125
6126 spin_lock_bh(&ar->txmgmt_idr_lock);
6127 msdu = idr_find(&ar->txmgmt_idr, desc_id);
6128
6129 if (!msdu) {
6130 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
6131 desc_id);
6132 spin_unlock_bh(&ar->txmgmt_idr_lock);
6133 return -ENOENT;
6134 }
6135
6136 idr_remove(&ar->txmgmt_idr, desc_id);
6137 spin_unlock_bh(&ar->txmgmt_idr_lock);
6138
6139 skb_cb = ATH12K_SKB_CB(msdu);
6140 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
6141
6142 info = IEEE80211_SKB_CB(msdu);
6143 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status)
6144 info->flags |= IEEE80211_TX_STAT_ACK;
6145
6146 if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status)
6147 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
6148
6149 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu);
6150
6151 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx);
6152
6153 /* WARN when we received this event without doing any mgmt tx */
6154 if (num_mgmt < 0)
6155 WARN_ON_ONCE(1);
6156
6157 if (!num_mgmt)
6158 wake_up(&ar->txmgmt_empty_waitq);
6159
6160 return 0;
6161 }
6162
ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_mgmt_tx_compl_event * param)6163 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
6164 struct sk_buff *skb,
6165 struct wmi_mgmt_tx_compl_event *param)
6166 {
6167 const void **tb;
6168 const struct wmi_mgmt_tx_compl_event *ev;
6169 int ret;
6170
6171 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6172 if (IS_ERR(tb)) {
6173 ret = PTR_ERR(tb);
6174 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6175 return ret;
6176 }
6177
6178 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT];
6179 if (!ev) {
6180 ath12k_warn(ab, "failed to fetch mgmt tx compl ev");
6181 kfree(tb);
6182 return -EPROTO;
6183 }
6184
6185 param->pdev_id = ev->pdev_id;
6186 param->desc_id = ev->desc_id;
6187 param->status = ev->status;
6188
6189 kfree(tb);
6190 return 0;
6191 }
6192
ath12k_wmi_event_scan_started(struct ath12k * ar)6193 static void ath12k_wmi_event_scan_started(struct ath12k *ar)
6194 {
6195 lockdep_assert_held(&ar->data_lock);
6196
6197 switch (ar->scan.state) {
6198 case ATH12K_SCAN_IDLE:
6199 case ATH12K_SCAN_RUNNING:
6200 case ATH12K_SCAN_ABORTING:
6201 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n",
6202 ath12k_scan_state_str(ar->scan.state),
6203 ar->scan.state);
6204 break;
6205 case ATH12K_SCAN_STARTING:
6206 ar->scan.state = ATH12K_SCAN_RUNNING;
6207
6208 if (ar->scan.is_roc)
6209 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar));
6210
6211 complete(&ar->scan.started);
6212 break;
6213 }
6214 }
6215
ath12k_wmi_event_scan_start_failed(struct ath12k * ar)6216 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar)
6217 {
6218 lockdep_assert_held(&ar->data_lock);
6219
6220 switch (ar->scan.state) {
6221 case ATH12K_SCAN_IDLE:
6222 case ATH12K_SCAN_RUNNING:
6223 case ATH12K_SCAN_ABORTING:
6224 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n",
6225 ath12k_scan_state_str(ar->scan.state),
6226 ar->scan.state);
6227 break;
6228 case ATH12K_SCAN_STARTING:
6229 complete(&ar->scan.started);
6230 __ath12k_mac_scan_finish(ar);
6231 break;
6232 }
6233 }
6234
ath12k_wmi_event_scan_completed(struct ath12k * ar)6235 static void ath12k_wmi_event_scan_completed(struct ath12k *ar)
6236 {
6237 lockdep_assert_held(&ar->data_lock);
6238
6239 switch (ar->scan.state) {
6240 case ATH12K_SCAN_IDLE:
6241 case ATH12K_SCAN_STARTING:
6242 /* One suspected reason scan can be completed while starting is
6243 * if firmware fails to deliver all scan events to the host,
6244 * e.g. when transport pipe is full. This has been observed
6245 * with spectral scan phyerr events starving wmi transport
6246 * pipe. In such case the "scan completed" event should be (and
6247 * is) ignored by the host as it may be just firmware's scan
6248 * state machine recovering.
6249 */
6250 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n",
6251 ath12k_scan_state_str(ar->scan.state),
6252 ar->scan.state);
6253 break;
6254 case ATH12K_SCAN_RUNNING:
6255 case ATH12K_SCAN_ABORTING:
6256 __ath12k_mac_scan_finish(ar);
6257 break;
6258 }
6259 }
6260
ath12k_wmi_event_scan_bss_chan(struct ath12k * ar)6261 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar)
6262 {
6263 lockdep_assert_held(&ar->data_lock);
6264
6265 switch (ar->scan.state) {
6266 case ATH12K_SCAN_IDLE:
6267 case ATH12K_SCAN_STARTING:
6268 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n",
6269 ath12k_scan_state_str(ar->scan.state),
6270 ar->scan.state);
6271 break;
6272 case ATH12K_SCAN_RUNNING:
6273 case ATH12K_SCAN_ABORTING:
6274 ar->scan_channel = NULL;
6275 break;
6276 }
6277 }
6278
ath12k_wmi_event_scan_foreign_chan(struct ath12k * ar,u32 freq)6279 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq)
6280 {
6281 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
6282
6283 lockdep_assert_held(&ar->data_lock);
6284
6285 switch (ar->scan.state) {
6286 case ATH12K_SCAN_IDLE:
6287 case ATH12K_SCAN_STARTING:
6288 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
6289 ath12k_scan_state_str(ar->scan.state),
6290 ar->scan.state);
6291 break;
6292 case ATH12K_SCAN_RUNNING:
6293 case ATH12K_SCAN_ABORTING:
6294 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq);
6295
6296 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
6297 complete(&ar->scan.on_channel);
6298
6299 break;
6300 }
6301 }
6302
6303 static const char *
ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)6304 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
6305 enum wmi_scan_completion_reason reason)
6306 {
6307 switch (type) {
6308 case WMI_SCAN_EVENT_STARTED:
6309 return "started";
6310 case WMI_SCAN_EVENT_COMPLETED:
6311 switch (reason) {
6312 case WMI_SCAN_REASON_COMPLETED:
6313 return "completed";
6314 case WMI_SCAN_REASON_CANCELLED:
6315 return "completed [cancelled]";
6316 case WMI_SCAN_REASON_PREEMPTED:
6317 return "completed [preempted]";
6318 case WMI_SCAN_REASON_TIMEDOUT:
6319 return "completed [timedout]";
6320 case WMI_SCAN_REASON_INTERNAL_FAILURE:
6321 return "completed [internal err]";
6322 case WMI_SCAN_REASON_MAX:
6323 break;
6324 }
6325 return "completed [unknown]";
6326 case WMI_SCAN_EVENT_BSS_CHANNEL:
6327 return "bss channel";
6328 case WMI_SCAN_EVENT_FOREIGN_CHAN:
6329 return "foreign channel";
6330 case WMI_SCAN_EVENT_DEQUEUED:
6331 return "dequeued";
6332 case WMI_SCAN_EVENT_PREEMPTED:
6333 return "preempted";
6334 case WMI_SCAN_EVENT_START_FAILED:
6335 return "start failed";
6336 case WMI_SCAN_EVENT_RESTARTED:
6337 return "restarted";
6338 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
6339 return "foreign channel exit";
6340 default:
6341 return "unknown";
6342 }
6343 }
6344
ath12k_pull_scan_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_scan_event * scan_evt_param)6345 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb,
6346 struct wmi_scan_event *scan_evt_param)
6347 {
6348 const void **tb;
6349 const struct wmi_scan_event *ev;
6350 int ret;
6351
6352 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6353 if (IS_ERR(tb)) {
6354 ret = PTR_ERR(tb);
6355 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6356 return ret;
6357 }
6358
6359 ev = tb[WMI_TAG_SCAN_EVENT];
6360 if (!ev) {
6361 ath12k_warn(ab, "failed to fetch scan ev");
6362 kfree(tb);
6363 return -EPROTO;
6364 }
6365
6366 scan_evt_param->event_type = ev->event_type;
6367 scan_evt_param->reason = ev->reason;
6368 scan_evt_param->channel_freq = ev->channel_freq;
6369 scan_evt_param->scan_req_id = ev->scan_req_id;
6370 scan_evt_param->scan_id = ev->scan_id;
6371 scan_evt_param->vdev_id = ev->vdev_id;
6372 scan_evt_param->tsf_timestamp = ev->tsf_timestamp;
6373
6374 kfree(tb);
6375 return 0;
6376 }
6377
ath12k_pull_peer_sta_kickout_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_sta_kickout_arg * arg)6378 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb,
6379 struct wmi_peer_sta_kickout_arg *arg)
6380 {
6381 const void **tb;
6382 const struct wmi_peer_sta_kickout_event *ev;
6383 int ret;
6384
6385 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6386 if (IS_ERR(tb)) {
6387 ret = PTR_ERR(tb);
6388 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6389 return ret;
6390 }
6391
6392 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT];
6393 if (!ev) {
6394 ath12k_warn(ab, "failed to fetch peer sta kickout ev");
6395 kfree(tb);
6396 return -EPROTO;
6397 }
6398
6399 arg->mac_addr = ev->peer_macaddr.addr;
6400
6401 kfree(tb);
6402 return 0;
6403 }
6404
ath12k_pull_roam_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_roam_event * roam_ev)6405 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb,
6406 struct wmi_roam_event *roam_ev)
6407 {
6408 const void **tb;
6409 const struct wmi_roam_event *ev;
6410 int ret;
6411
6412 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6413 if (IS_ERR(tb)) {
6414 ret = PTR_ERR(tb);
6415 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6416 return ret;
6417 }
6418
6419 ev = tb[WMI_TAG_ROAM_EVENT];
6420 if (!ev) {
6421 ath12k_warn(ab, "failed to fetch roam ev");
6422 kfree(tb);
6423 return -EPROTO;
6424 }
6425
6426 roam_ev->vdev_id = ev->vdev_id;
6427 roam_ev->reason = ev->reason;
6428 roam_ev->rssi = ev->rssi;
6429
6430 kfree(tb);
6431 return 0;
6432 }
6433
freq_to_idx(struct ath12k * ar,int freq)6434 static int freq_to_idx(struct ath12k *ar, int freq)
6435 {
6436 struct ieee80211_supported_band *sband;
6437 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
6438 int band, ch, idx = 0;
6439
6440 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
6441 if (!ar->mac.sbands[band].channels)
6442 continue;
6443
6444 sband = hw->wiphy->bands[band];
6445 if (!sband)
6446 continue;
6447
6448 for (ch = 0; ch < sband->n_channels; ch++, idx++)
6449 if (sband->channels[ch].center_freq == freq)
6450 goto exit;
6451 }
6452
6453 exit:
6454 return idx;
6455 }
6456
ath12k_pull_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_chan_info_event * ch_info_ev)6457 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6458 struct wmi_chan_info_event *ch_info_ev)
6459 {
6460 const void **tb;
6461 const struct wmi_chan_info_event *ev;
6462 int ret;
6463
6464 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6465 if (IS_ERR(tb)) {
6466 ret = PTR_ERR(tb);
6467 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6468 return ret;
6469 }
6470
6471 ev = tb[WMI_TAG_CHAN_INFO_EVENT];
6472 if (!ev) {
6473 ath12k_warn(ab, "failed to fetch chan info ev");
6474 kfree(tb);
6475 return -EPROTO;
6476 }
6477
6478 ch_info_ev->err_code = ev->err_code;
6479 ch_info_ev->freq = ev->freq;
6480 ch_info_ev->cmd_flags = ev->cmd_flags;
6481 ch_info_ev->noise_floor = ev->noise_floor;
6482 ch_info_ev->rx_clear_count = ev->rx_clear_count;
6483 ch_info_ev->cycle_count = ev->cycle_count;
6484 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range;
6485 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
6486 ch_info_ev->rx_frame_count = ev->rx_frame_count;
6487 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt;
6488 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz;
6489 ch_info_ev->vdev_id = ev->vdev_id;
6490
6491 kfree(tb);
6492 return 0;
6493 }
6494
6495 static int
ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_pdev_bss_chan_info_event * bss_ch_info_ev)6496 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6497 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev)
6498 {
6499 const void **tb;
6500 const struct wmi_pdev_bss_chan_info_event *ev;
6501 int ret;
6502
6503 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6504 if (IS_ERR(tb)) {
6505 ret = PTR_ERR(tb);
6506 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6507 return ret;
6508 }
6509
6510 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT];
6511 if (!ev) {
6512 ath12k_warn(ab, "failed to fetch pdev bss chan info ev");
6513 kfree(tb);
6514 return -EPROTO;
6515 }
6516
6517 bss_ch_info_ev->pdev_id = ev->pdev_id;
6518 bss_ch_info_ev->freq = ev->freq;
6519 bss_ch_info_ev->noise_floor = ev->noise_floor;
6520 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low;
6521 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high;
6522 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low;
6523 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high;
6524 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low;
6525 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high;
6526 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low;
6527 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high;
6528 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low;
6529 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high;
6530
6531 kfree(tb);
6532 return 0;
6533 }
6534
6535 static int
ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_install_key_complete_arg * arg)6536 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb,
6537 struct wmi_vdev_install_key_complete_arg *arg)
6538 {
6539 const void **tb;
6540 const struct wmi_vdev_install_key_compl_event *ev;
6541 int ret;
6542
6543 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6544 if (IS_ERR(tb)) {
6545 ret = PTR_ERR(tb);
6546 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6547 return ret;
6548 }
6549
6550 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT];
6551 if (!ev) {
6552 ath12k_warn(ab, "failed to fetch vdev install key compl ev");
6553 kfree(tb);
6554 return -EPROTO;
6555 }
6556
6557 arg->vdev_id = le32_to_cpu(ev->vdev_id);
6558 arg->macaddr = ev->peer_macaddr.addr;
6559 arg->key_idx = le32_to_cpu(ev->key_idx);
6560 arg->key_flags = le32_to_cpu(ev->key_flags);
6561 arg->status = le32_to_cpu(ev->status);
6562
6563 kfree(tb);
6564 return 0;
6565 }
6566
ath12k_pull_peer_assoc_conf_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_assoc_conf_arg * peer_assoc_conf)6567 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb,
6568 struct wmi_peer_assoc_conf_arg *peer_assoc_conf)
6569 {
6570 const void **tb;
6571 const struct wmi_peer_assoc_conf_event *ev;
6572 int ret;
6573
6574 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6575 if (IS_ERR(tb)) {
6576 ret = PTR_ERR(tb);
6577 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6578 return ret;
6579 }
6580
6581 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT];
6582 if (!ev) {
6583 ath12k_warn(ab, "failed to fetch peer assoc conf ev");
6584 kfree(tb);
6585 return -EPROTO;
6586 }
6587
6588 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id);
6589 peer_assoc_conf->macaddr = ev->peer_macaddr.addr;
6590
6591 kfree(tb);
6592 return 0;
6593 }
6594
6595 static int
ath12k_pull_pdev_temp_ev(struct ath12k_base * ab,struct sk_buff * skb,const struct wmi_pdev_temperature_event * ev)6596 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb,
6597 const struct wmi_pdev_temperature_event *ev)
6598 {
6599 const void **tb;
6600 int ret;
6601
6602 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6603 if (IS_ERR(tb)) {
6604 ret = PTR_ERR(tb);
6605 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6606 return ret;
6607 }
6608
6609 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
6610 if (!ev) {
6611 ath12k_warn(ab, "failed to fetch pdev temp ev");
6612 kfree(tb);
6613 return -EPROTO;
6614 }
6615
6616 kfree(tb);
6617 return 0;
6618 }
6619
ath12k_wmi_op_ep_tx_credits(struct ath12k_base * ab)6620 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab)
6621 {
6622 /* try to send pending beacons first. they take priority */
6623 wake_up(&ab->wmi_ab.tx_credits_wq);
6624 }
6625
ath12k_reg_11d_new_cc_event(struct ath12k_base * ab,struct sk_buff * skb)6626 static int ath12k_reg_11d_new_cc_event(struct ath12k_base *ab, struct sk_buff *skb)
6627 {
6628 const struct wmi_11d_new_cc_event *ev;
6629 struct ath12k *ar;
6630 struct ath12k_pdev *pdev;
6631 const void **tb;
6632 int ret, i;
6633
6634 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6635 if (IS_ERR(tb)) {
6636 ret = PTR_ERR(tb);
6637 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6638 return ret;
6639 }
6640
6641 ev = tb[WMI_TAG_11D_NEW_COUNTRY_EVENT];
6642 if (!ev) {
6643 kfree(tb);
6644 ath12k_warn(ab, "failed to fetch 11d new cc ev");
6645 return -EPROTO;
6646 }
6647
6648 spin_lock_bh(&ab->base_lock);
6649 memcpy(&ab->new_alpha2, &ev->new_alpha2, REG_ALPHA2_LEN);
6650 spin_unlock_bh(&ab->base_lock);
6651
6652 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi 11d new cc %c%c\n",
6653 ab->new_alpha2[0],
6654 ab->new_alpha2[1]);
6655
6656 kfree(tb);
6657
6658 for (i = 0; i < ab->num_radios; i++) {
6659 pdev = &ab->pdevs[i];
6660 ar = pdev->ar;
6661 ar->state_11d = ATH12K_11D_IDLE;
6662 ar->ah->regd_updated = false;
6663 complete(&ar->completed_11d_scan);
6664 }
6665
6666 queue_work(ab->workqueue, &ab->update_11d_work);
6667
6668 return 0;
6669 }
6670
ath12k_wmi_htc_tx_complete(struct ath12k_base * ab,struct sk_buff * skb)6671 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
6672 struct sk_buff *skb)
6673 {
6674 dev_kfree_skb(skb);
6675 }
6676
ath12k_reg_chan_list_event(struct ath12k_base * ab,struct sk_buff * skb)6677 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb)
6678 {
6679 struct ath12k_reg_info *reg_info;
6680 u8 pdev_idx;
6681 int ret;
6682
6683 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC);
6684 if (!reg_info) {
6685 ret = -ENOMEM;
6686 goto fallback;
6687 }
6688
6689 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
6690 if (ret) {
6691 ath12k_warn(ab, "failed to extract regulatory info from received event\n");
6692 goto mem_free;
6693 }
6694
6695 ret = ath12k_reg_validate_reg_info(ab, reg_info);
6696 if (ret == ATH12K_REG_STATUS_FALLBACK) {
6697 ath12k_warn(ab, "failed to validate reg info %d\n", ret);
6698 /* firmware has successfully switches to new regd but host can not
6699 * continue, so free reginfo and fallback to old regd
6700 */
6701 goto mem_free;
6702 } else if (ret == ATH12K_REG_STATUS_DROP) {
6703 /* reg info is valid but we will not store it and
6704 * not going to create new regd for it
6705 */
6706 ret = ATH12K_REG_STATUS_VALID;
6707 goto mem_free;
6708 }
6709
6710 /* free old reg_info if it exist */
6711 pdev_idx = reg_info->phy_id;
6712 if (ab->reg_info[pdev_idx]) {
6713 ath12k_reg_reset_reg_info(ab->reg_info[pdev_idx]);
6714 kfree(ab->reg_info[pdev_idx]);
6715 }
6716 /* reg_info is valid, we store it for later use
6717 * even below regd build failed
6718 */
6719 ab->reg_info[pdev_idx] = reg_info;
6720
6721 ret = ath12k_reg_handle_chan_list(ab, reg_info, WMI_VDEV_TYPE_UNSPEC,
6722 IEEE80211_REG_UNSET_AP);
6723 if (ret) {
6724 ath12k_warn(ab, "failed to handle chan list %d\n", ret);
6725 goto fallback;
6726 }
6727
6728 goto out;
6729
6730 mem_free:
6731 ath12k_reg_reset_reg_info(reg_info);
6732 kfree(reg_info);
6733
6734 if (ret == ATH12K_REG_STATUS_VALID)
6735 return ret;
6736
6737 fallback:
6738 /* Fallback to older reg (by sending previous country setting
6739 * again if fw has succeeded and we failed to process here.
6740 * The Regdomain should be uniform across driver and fw. Since the
6741 * FW has processed the command and sent a success status, we expect
6742 * this function to succeed as well. If it doesn't, CTRY needs to be
6743 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent.
6744 */
6745 /* TODO: This is rare, but still should also be handled */
6746 WARN_ON(1);
6747
6748 out:
6749 return ret;
6750 }
6751
ath12k_wmi_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6752 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
6753 const void *ptr, void *data)
6754 {
6755 struct ath12k_wmi_rdy_parse *rdy_parse = data;
6756 struct wmi_ready_event fixed_param;
6757 struct ath12k_wmi_mac_addr_params *addr_list;
6758 struct ath12k_pdev *pdev;
6759 u32 num_mac_addr;
6760 int i;
6761
6762 switch (tag) {
6763 case WMI_TAG_READY_EVENT:
6764 memset(&fixed_param, 0, sizeof(fixed_param));
6765 memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
6766 min_t(u16, sizeof(fixed_param), len));
6767 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status);
6768 rdy_parse->num_extra_mac_addr =
6769 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr);
6770
6771 ether_addr_copy(ab->mac_addr,
6772 fixed_param.ready_event_min.mac_addr.addr);
6773 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum);
6774 ab->wmi_ready = true;
6775 break;
6776 case WMI_TAG_ARRAY_FIXED_STRUCT:
6777 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr;
6778 num_mac_addr = rdy_parse->num_extra_mac_addr;
6779
6780 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios))
6781 break;
6782
6783 for (i = 0; i < ab->num_radios; i++) {
6784 pdev = &ab->pdevs[i];
6785 ether_addr_copy(pdev->mac_addr, addr_list[i].addr);
6786 }
6787 ab->pdevs_macaddr_valid = true;
6788 break;
6789 default:
6790 break;
6791 }
6792
6793 return 0;
6794 }
6795
ath12k_ready_event(struct ath12k_base * ab,struct sk_buff * skb)6796 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
6797 {
6798 struct ath12k_wmi_rdy_parse rdy_parse = { };
6799 int ret;
6800
6801 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6802 ath12k_wmi_rdy_parse, &rdy_parse);
6803 if (ret) {
6804 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
6805 return ret;
6806 }
6807
6808 complete(&ab->wmi_ab.unified_ready);
6809 return 0;
6810 }
6811
ath12k_peer_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6812 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
6813 {
6814 struct wmi_peer_delete_resp_event peer_del_resp;
6815 struct ath12k *ar;
6816
6817 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) {
6818 ath12k_warn(ab, "failed to extract peer delete resp");
6819 return;
6820 }
6821
6822 rcu_read_lock();
6823 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id));
6824 if (!ar) {
6825 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d",
6826 peer_del_resp.vdev_id);
6827 rcu_read_unlock();
6828 return;
6829 }
6830
6831 complete(&ar->peer_delete_done);
6832 rcu_read_unlock();
6833 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n",
6834 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr);
6835 }
6836
ath12k_vdev_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6837 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab,
6838 struct sk_buff *skb)
6839 {
6840 struct ath12k *ar;
6841 u32 vdev_id = 0;
6842
6843 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) {
6844 ath12k_warn(ab, "failed to extract vdev delete resp");
6845 return;
6846 }
6847
6848 rcu_read_lock();
6849 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6850 if (!ar) {
6851 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d",
6852 vdev_id);
6853 rcu_read_unlock();
6854 return;
6855 }
6856
6857 complete(&ar->vdev_delete_done);
6858
6859 rcu_read_unlock();
6860
6861 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n",
6862 vdev_id);
6863 }
6864
ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)6865 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)
6866 {
6867 switch (vdev_resp_status) {
6868 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID:
6869 return "invalid vdev id";
6870 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED:
6871 return "not supported";
6872 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION:
6873 return "dfs violation";
6874 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN:
6875 return "invalid regdomain";
6876 default:
6877 return "unknown";
6878 }
6879 }
6880
ath12k_vdev_start_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6881 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
6882 {
6883 struct wmi_vdev_start_resp_event vdev_start_resp;
6884 struct ath12k *ar;
6885 u32 status;
6886
6887 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) {
6888 ath12k_warn(ab, "failed to extract vdev start resp");
6889 return;
6890 }
6891
6892 rcu_read_lock();
6893 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id));
6894 if (!ar) {
6895 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d",
6896 vdev_start_resp.vdev_id);
6897 rcu_read_unlock();
6898 return;
6899 }
6900
6901 ar->last_wmi_vdev_start_status = 0;
6902
6903 status = le32_to_cpu(vdev_start_resp.status);
6904 if (WARN_ON_ONCE(status)) {
6905 ath12k_warn(ab, "vdev start resp error status %d (%s)\n",
6906 status, ath12k_wmi_vdev_resp_print(status));
6907 ar->last_wmi_vdev_start_status = status;
6908 }
6909
6910 ar->max_allowed_tx_power = (s8)le32_to_cpu(vdev_start_resp.max_allowed_tx_power);
6911
6912 complete(&ar->vdev_setup_done);
6913
6914 rcu_read_unlock();
6915
6916 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d",
6917 vdev_start_resp.vdev_id);
6918 }
6919
ath12k_bcn_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)6920 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb)
6921 {
6922 u32 vdev_id, tx_status;
6923
6924 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) {
6925 ath12k_warn(ab, "failed to extract bcn tx status");
6926 return;
6927 }
6928 }
6929
ath12k_vdev_stopped_event(struct ath12k_base * ab,struct sk_buff * skb)6930 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb)
6931 {
6932 struct ath12k *ar;
6933 u32 vdev_id = 0;
6934
6935 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) {
6936 ath12k_warn(ab, "failed to extract vdev stopped event");
6937 return;
6938 }
6939
6940 rcu_read_lock();
6941 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6942 if (!ar) {
6943 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d",
6944 vdev_id);
6945 rcu_read_unlock();
6946 return;
6947 }
6948
6949 complete(&ar->vdev_setup_done);
6950
6951 rcu_read_unlock();
6952
6953 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id);
6954 }
6955
ath12k_mgmt_rx_event(struct ath12k_base * ab,struct sk_buff * skb)6956 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
6957 {
6958 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0};
6959 struct ath12k *ar;
6960 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
6961 struct ieee80211_hdr *hdr;
6962 u16 fc;
6963 struct ieee80211_supported_band *sband;
6964
6965 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
6966 ath12k_warn(ab, "failed to extract mgmt rx event");
6967 dev_kfree_skb(skb);
6968 return;
6969 }
6970
6971 memset(status, 0, sizeof(*status));
6972
6973 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n",
6974 rx_ev.status);
6975
6976 rcu_read_lock();
6977 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id);
6978
6979 if (!ar) {
6980 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n",
6981 rx_ev.pdev_id);
6982 dev_kfree_skb(skb);
6983 goto exit;
6984 }
6985
6986 if ((test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) ||
6987 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT |
6988 WMI_RX_STATUS_ERR_KEY_CACHE_MISS |
6989 WMI_RX_STATUS_ERR_CRC))) {
6990 dev_kfree_skb(skb);
6991 goto exit;
6992 }
6993
6994 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC)
6995 status->flag |= RX_FLAG_MMIC_ERROR;
6996
6997 if (rx_ev.chan_freq >= ATH12K_MIN_6GHZ_FREQ &&
6998 rx_ev.chan_freq <= ATH12K_MAX_6GHZ_FREQ) {
6999 status->band = NL80211_BAND_6GHZ;
7000 status->freq = rx_ev.chan_freq;
7001 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) {
7002 status->band = NL80211_BAND_2GHZ;
7003 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5GHZ_CHAN) {
7004 status->band = NL80211_BAND_5GHZ;
7005 } else {
7006 /* Shouldn't happen unless list of advertised channels to
7007 * mac80211 has been changed.
7008 */
7009 WARN_ON_ONCE(1);
7010 dev_kfree_skb(skb);
7011 goto exit;
7012 }
7013
7014 if (rx_ev.phy_mode == MODE_11B &&
7015 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ))
7016 ath12k_dbg(ab, ATH12K_DBG_WMI,
7017 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band);
7018
7019 sband = &ar->mac.sbands[status->band];
7020
7021 if (status->band != NL80211_BAND_6GHZ)
7022 status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
7023 status->band);
7024
7025 status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR;
7026 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
7027
7028 hdr = (struct ieee80211_hdr *)skb->data;
7029 fc = le16_to_cpu(hdr->frame_control);
7030
7031 /* Firmware is guaranteed to report all essential management frames via
7032 * WMI while it can deliver some extra via HTT. Since there can be
7033 * duplicates split the reporting wrt monitor/sniffing.
7034 */
7035 status->flag |= RX_FLAG_SKIP_MONITOR;
7036
7037 /* In case of PMF, FW delivers decrypted frames with Protected Bit set
7038 * including group privacy action frames.
7039 */
7040 if (ieee80211_has_protected(hdr->frame_control)) {
7041 status->flag |= RX_FLAG_DECRYPTED;
7042
7043 if (!ieee80211_is_robust_mgmt_frame(skb)) {
7044 status->flag |= RX_FLAG_IV_STRIPPED |
7045 RX_FLAG_MMIC_STRIPPED;
7046 hdr->frame_control = __cpu_to_le16(fc &
7047 ~IEEE80211_FCTL_PROTECTED);
7048 }
7049 }
7050
7051 if (ieee80211_is_beacon(hdr->frame_control))
7052 ath12k_mac_handle_beacon(ar, skb);
7053
7054 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7055 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
7056 skb, skb->len,
7057 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
7058
7059 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7060 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
7061 status->freq, status->band, status->signal,
7062 status->rate_idx);
7063
7064 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb);
7065
7066 exit:
7067 rcu_read_unlock();
7068 }
7069
ath12k_mgmt_tx_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7070 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
7071 {
7072 struct wmi_mgmt_tx_compl_event tx_compl_param = {0};
7073 struct ath12k *ar;
7074
7075 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
7076 ath12k_warn(ab, "failed to extract mgmt tx compl event");
7077 return;
7078 }
7079
7080 rcu_read_lock();
7081 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id));
7082 if (!ar) {
7083 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n",
7084 tx_compl_param.pdev_id);
7085 goto exit;
7086 }
7087
7088 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
7089 le32_to_cpu(tx_compl_param.status));
7090
7091 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7092 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
7093 tx_compl_param.pdev_id, tx_compl_param.desc_id,
7094 tx_compl_param.status);
7095
7096 exit:
7097 rcu_read_unlock();
7098 }
7099
ath12k_get_ar_on_scan_state(struct ath12k_base * ab,u32 vdev_id,enum ath12k_scan_state state)7100 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab,
7101 u32 vdev_id,
7102 enum ath12k_scan_state state)
7103 {
7104 int i;
7105 struct ath12k_pdev *pdev;
7106 struct ath12k *ar;
7107
7108 for (i = 0; i < ab->num_radios; i++) {
7109 pdev = rcu_dereference(ab->pdevs_active[i]);
7110 if (pdev && pdev->ar) {
7111 ar = pdev->ar;
7112
7113 spin_lock_bh(&ar->data_lock);
7114 if (ar->scan.state == state &&
7115 ar->scan.arvif &&
7116 ar->scan.arvif->vdev_id == vdev_id) {
7117 spin_unlock_bh(&ar->data_lock);
7118 return ar;
7119 }
7120 spin_unlock_bh(&ar->data_lock);
7121 }
7122 }
7123 return NULL;
7124 }
7125
ath12k_scan_event(struct ath12k_base * ab,struct sk_buff * skb)7126 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
7127 {
7128 struct ath12k *ar;
7129 struct wmi_scan_event scan_ev = {0};
7130
7131 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
7132 ath12k_warn(ab, "failed to extract scan event");
7133 return;
7134 }
7135
7136 rcu_read_lock();
7137
7138 /* In case the scan was cancelled, ex. during interface teardown,
7139 * the interface will not be found in active interfaces.
7140 * Rather, in such scenarios, iterate over the active pdev's to
7141 * search 'ar' if the corresponding 'ar' scan is ABORTING and the
7142 * aborting scan's vdev id matches this event info.
7143 */
7144 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED &&
7145 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) {
7146 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7147 ATH12K_SCAN_ABORTING);
7148 if (!ar)
7149 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7150 ATH12K_SCAN_RUNNING);
7151 } else {
7152 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id));
7153 }
7154
7155 if (!ar) {
7156 ath12k_warn(ab, "Received scan event for unknown vdev");
7157 rcu_read_unlock();
7158 return;
7159 }
7160
7161 spin_lock_bh(&ar->data_lock);
7162
7163 ath12k_dbg(ab, ATH12K_DBG_WMI,
7164 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
7165 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type),
7166 le32_to_cpu(scan_ev.reason)),
7167 le32_to_cpu(scan_ev.event_type),
7168 le32_to_cpu(scan_ev.reason),
7169 le32_to_cpu(scan_ev.channel_freq),
7170 le32_to_cpu(scan_ev.scan_req_id),
7171 le32_to_cpu(scan_ev.scan_id),
7172 le32_to_cpu(scan_ev.vdev_id),
7173 ath12k_scan_state_str(ar->scan.state), ar->scan.state);
7174
7175 switch (le32_to_cpu(scan_ev.event_type)) {
7176 case WMI_SCAN_EVENT_STARTED:
7177 ath12k_wmi_event_scan_started(ar);
7178 break;
7179 case WMI_SCAN_EVENT_COMPLETED:
7180 ath12k_wmi_event_scan_completed(ar);
7181 break;
7182 case WMI_SCAN_EVENT_BSS_CHANNEL:
7183 ath12k_wmi_event_scan_bss_chan(ar);
7184 break;
7185 case WMI_SCAN_EVENT_FOREIGN_CHAN:
7186 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq));
7187 break;
7188 case WMI_SCAN_EVENT_START_FAILED:
7189 ath12k_warn(ab, "received scan start failure event\n");
7190 ath12k_wmi_event_scan_start_failed(ar);
7191 break;
7192 case WMI_SCAN_EVENT_DEQUEUED:
7193 __ath12k_mac_scan_finish(ar);
7194 break;
7195 case WMI_SCAN_EVENT_PREEMPTED:
7196 case WMI_SCAN_EVENT_RESTARTED:
7197 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
7198 default:
7199 break;
7200 }
7201
7202 spin_unlock_bh(&ar->data_lock);
7203
7204 rcu_read_unlock();
7205 }
7206
ath12k_peer_sta_kickout_event(struct ath12k_base * ab,struct sk_buff * skb)7207 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb)
7208 {
7209 struct wmi_peer_sta_kickout_arg arg = {};
7210 struct ieee80211_sta *sta;
7211 struct ath12k_peer *peer;
7212 struct ath12k *ar;
7213
7214 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
7215 ath12k_warn(ab, "failed to extract peer sta kickout event");
7216 return;
7217 }
7218
7219 rcu_read_lock();
7220
7221 spin_lock_bh(&ab->base_lock);
7222
7223 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr);
7224
7225 if (!peer) {
7226 ath12k_warn(ab, "peer not found %pM\n",
7227 arg.mac_addr);
7228 goto exit;
7229 }
7230
7231 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id);
7232 if (!ar) {
7233 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d",
7234 peer->vdev_id);
7235 goto exit;
7236 }
7237
7238 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar),
7239 arg.mac_addr, NULL);
7240 if (!sta) {
7241 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n",
7242 arg.mac_addr);
7243 goto exit;
7244 }
7245
7246 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM",
7247 arg.mac_addr);
7248
7249 ieee80211_report_low_ack(sta, 10);
7250
7251 exit:
7252 spin_unlock_bh(&ab->base_lock);
7253 rcu_read_unlock();
7254 }
7255
ath12k_roam_event(struct ath12k_base * ab,struct sk_buff * skb)7256 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
7257 {
7258 struct wmi_roam_event roam_ev = {};
7259 struct ath12k *ar;
7260 u32 vdev_id;
7261 u8 roam_reason;
7262
7263 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) {
7264 ath12k_warn(ab, "failed to extract roam event");
7265 return;
7266 }
7267
7268 vdev_id = le32_to_cpu(roam_ev.vdev_id);
7269 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason),
7270 WMI_ROAM_REASON_MASK);
7271
7272 ath12k_dbg(ab, ATH12K_DBG_WMI,
7273 "wmi roam event vdev %u reason %d rssi %d\n",
7274 vdev_id, roam_reason, roam_ev.rssi);
7275
7276 rcu_read_lock();
7277 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7278 if (!ar) {
7279 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id);
7280 rcu_read_unlock();
7281 return;
7282 }
7283
7284 if (roam_reason >= WMI_ROAM_REASON_MAX)
7285 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n",
7286 roam_reason, vdev_id);
7287
7288 switch (roam_reason) {
7289 case WMI_ROAM_REASON_BEACON_MISS:
7290 ath12k_mac_handle_beacon_miss(ar, vdev_id);
7291 break;
7292 case WMI_ROAM_REASON_BETTER_AP:
7293 case WMI_ROAM_REASON_LOW_RSSI:
7294 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
7295 case WMI_ROAM_REASON_HO_FAILED:
7296 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n",
7297 roam_reason, vdev_id);
7298 break;
7299 }
7300
7301 rcu_read_unlock();
7302 }
7303
ath12k_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7304 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7305 {
7306 struct wmi_chan_info_event ch_info_ev = {0};
7307 struct ath12k *ar;
7308 struct survey_info *survey;
7309 int idx;
7310 /* HW channel counters frequency value in hertz */
7311 u32 cc_freq_hz = ab->cc_freq_hz;
7312
7313 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) {
7314 ath12k_warn(ab, "failed to extract chan info event");
7315 return;
7316 }
7317
7318 ath12k_dbg(ab, ATH12K_DBG_WMI,
7319 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n",
7320 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq,
7321 ch_info_ev.cmd_flags, ch_info_ev.noise_floor,
7322 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count,
7323 ch_info_ev.mac_clk_mhz);
7324
7325 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) {
7326 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n");
7327 return;
7328 }
7329
7330 rcu_read_lock();
7331 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id));
7332 if (!ar) {
7333 ath12k_warn(ab, "invalid vdev id in chan info ev %d",
7334 ch_info_ev.vdev_id);
7335 rcu_read_unlock();
7336 return;
7337 }
7338 spin_lock_bh(&ar->data_lock);
7339
7340 switch (ar->scan.state) {
7341 case ATH12K_SCAN_IDLE:
7342 case ATH12K_SCAN_STARTING:
7343 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n");
7344 goto exit;
7345 case ATH12K_SCAN_RUNNING:
7346 case ATH12K_SCAN_ABORTING:
7347 break;
7348 }
7349
7350 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq));
7351 if (idx >= ARRAY_SIZE(ar->survey)) {
7352 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n",
7353 ch_info_ev.freq, idx);
7354 goto exit;
7355 }
7356
7357 /* If FW provides MAC clock frequency in Mhz, overriding the initialized
7358 * HW channel counters frequency value
7359 */
7360 if (ch_info_ev.mac_clk_mhz)
7361 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000);
7362
7363 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) {
7364 survey = &ar->survey[idx];
7365 memset(survey, 0, sizeof(*survey));
7366 survey->noise = le32_to_cpu(ch_info_ev.noise_floor);
7367 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
7368 SURVEY_INFO_TIME_BUSY;
7369 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz);
7370 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count),
7371 cc_freq_hz);
7372 }
7373 exit:
7374 spin_unlock_bh(&ar->data_lock);
7375 rcu_read_unlock();
7376 }
7377
7378 static void
ath12k_pdev_bss_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7379 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7380 {
7381 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {};
7382 struct survey_info *survey;
7383 struct ath12k *ar;
7384 u32 cc_freq_hz = ab->cc_freq_hz;
7385 u64 busy, total, tx, rx, rx_bss;
7386 int idx;
7387
7388 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) {
7389 ath12k_warn(ab, "failed to extract pdev bss chan info event");
7390 return;
7391 }
7392
7393 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 |
7394 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low);
7395
7396 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 |
7397 le32_to_cpu(bss_ch_info_ev.cycle_count_low);
7398
7399 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 |
7400 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low);
7401
7402 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 |
7403 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low);
7404
7405 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 |
7406 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low);
7407
7408 ath12k_dbg(ab, ATH12K_DBG_WMI,
7409 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
7410 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
7411 bss_ch_info_ev.noise_floor, busy, total,
7412 tx, rx, rx_bss);
7413
7414 rcu_read_lock();
7415 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id));
7416
7417 if (!ar) {
7418 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n",
7419 bss_ch_info_ev.pdev_id);
7420 rcu_read_unlock();
7421 return;
7422 }
7423
7424 spin_lock_bh(&ar->data_lock);
7425 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq));
7426 if (idx >= ARRAY_SIZE(ar->survey)) {
7427 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
7428 bss_ch_info_ev.freq, idx);
7429 goto exit;
7430 }
7431
7432 survey = &ar->survey[idx];
7433
7434 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor);
7435 survey->time = div_u64(total, cc_freq_hz);
7436 survey->time_busy = div_u64(busy, cc_freq_hz);
7437 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
7438 survey->time_tx = div_u64(tx, cc_freq_hz);
7439 survey->filled |= (SURVEY_INFO_NOISE_DBM |
7440 SURVEY_INFO_TIME |
7441 SURVEY_INFO_TIME_BUSY |
7442 SURVEY_INFO_TIME_RX |
7443 SURVEY_INFO_TIME_TX);
7444 exit:
7445 spin_unlock_bh(&ar->data_lock);
7446 complete(&ar->bss_survey_done);
7447
7448 rcu_read_unlock();
7449 }
7450
ath12k_vdev_install_key_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7451 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
7452 struct sk_buff *skb)
7453 {
7454 struct wmi_vdev_install_key_complete_arg install_key_compl = {0};
7455 struct ath12k *ar;
7456
7457 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
7458 ath12k_warn(ab, "failed to extract install key compl event");
7459 return;
7460 }
7461
7462 ath12k_dbg(ab, ATH12K_DBG_WMI,
7463 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n",
7464 install_key_compl.key_idx, install_key_compl.key_flags,
7465 install_key_compl.macaddr, install_key_compl.status);
7466
7467 rcu_read_lock();
7468 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id);
7469 if (!ar) {
7470 ath12k_warn(ab, "invalid vdev id in install key compl ev %d",
7471 install_key_compl.vdev_id);
7472 rcu_read_unlock();
7473 return;
7474 }
7475
7476 ar->install_key_status = 0;
7477
7478 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) {
7479 ath12k_warn(ab, "install key failed for %pM status %d\n",
7480 install_key_compl.macaddr, install_key_compl.status);
7481 ar->install_key_status = install_key_compl.status;
7482 }
7483
7484 complete(&ar->install_key_done);
7485 rcu_read_unlock();
7486 }
7487
ath12k_wmi_tlv_services_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)7488 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
7489 u16 tag, u16 len,
7490 const void *ptr,
7491 void *data)
7492 {
7493 const struct wmi_service_available_event *ev;
7494 u32 *wmi_ext2_service_bitmap;
7495 int i, j;
7496 u16 expected_len;
7497
7498 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32);
7499 if (len < expected_len) {
7500 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n",
7501 len, tag);
7502 return -EINVAL;
7503 }
7504
7505 switch (tag) {
7506 case WMI_TAG_SERVICE_AVAILABLE_EVENT:
7507 ev = (struct wmi_service_available_event *)ptr;
7508 for (i = 0, j = WMI_MAX_SERVICE;
7509 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE;
7510 i++) {
7511 do {
7512 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) &
7513 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
7514 set_bit(j, ab->wmi_ab.svc_map);
7515 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
7516 }
7517
7518 ath12k_dbg(ab, ATH12K_DBG_WMI,
7519 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x",
7520 ev->wmi_service_segment_bitmap[0],
7521 ev->wmi_service_segment_bitmap[1],
7522 ev->wmi_service_segment_bitmap[2],
7523 ev->wmi_service_segment_bitmap[3]);
7524 break;
7525 case WMI_TAG_ARRAY_UINT32:
7526 wmi_ext2_service_bitmap = (u32 *)ptr;
7527 for (i = 0, j = WMI_MAX_EXT_SERVICE;
7528 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE;
7529 i++) {
7530 do {
7531 if (wmi_ext2_service_bitmap[i] &
7532 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
7533 set_bit(j, ab->wmi_ab.svc_map);
7534 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
7535 }
7536
7537 ath12k_dbg(ab, ATH12K_DBG_WMI,
7538 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x",
7539 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1],
7540 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]);
7541 break;
7542 }
7543 return 0;
7544 }
7545
ath12k_service_available_event(struct ath12k_base * ab,struct sk_buff * skb)7546 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb)
7547 {
7548 int ret;
7549
7550 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
7551 ath12k_wmi_tlv_services_parser,
7552 NULL);
7553 return ret;
7554 }
7555
ath12k_peer_assoc_conf_event(struct ath12k_base * ab,struct sk_buff * skb)7556 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
7557 {
7558 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0};
7559 struct ath12k *ar;
7560
7561 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
7562 ath12k_warn(ab, "failed to extract peer assoc conf event");
7563 return;
7564 }
7565
7566 ath12k_dbg(ab, ATH12K_DBG_WMI,
7567 "peer assoc conf ev vdev id %d macaddr %pM\n",
7568 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
7569
7570 rcu_read_lock();
7571 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
7572
7573 if (!ar) {
7574 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
7575 peer_assoc_conf.vdev_id);
7576 rcu_read_unlock();
7577 return;
7578 }
7579
7580 complete(&ar->peer_assoc_done);
7581 rcu_read_unlock();
7582 }
7583
7584 static void
ath12k_wmi_fw_vdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)7585 ath12k_wmi_fw_vdev_stats_dump(struct ath12k *ar,
7586 struct ath12k_fw_stats *fw_stats,
7587 char *buf, u32 *length)
7588 {
7589 const struct ath12k_fw_stats_vdev *vdev;
7590 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7591 struct ath12k_link_vif *arvif;
7592 u32 len = *length;
7593 u8 *vif_macaddr;
7594 int i;
7595
7596 len += scnprintf(buf + len, buf_len - len, "\n");
7597 len += scnprintf(buf + len, buf_len - len, "%30s\n",
7598 "ath12k VDEV stats");
7599 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7600 "=================");
7601
7602 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7603 arvif = ath12k_mac_get_arvif(ar, vdev->vdev_id);
7604 if (!arvif)
7605 continue;
7606 vif_macaddr = arvif->ahvif->vif->addr;
7607
7608 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7609 "VDEV ID", vdev->vdev_id);
7610 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7611 "VDEV MAC address", vif_macaddr);
7612 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7613 "beacon snr", vdev->beacon_snr);
7614 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7615 "data snr", vdev->data_snr);
7616 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7617 "num rx frames", vdev->num_rx_frames);
7618 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7619 "num rts fail", vdev->num_rts_fail);
7620 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7621 "num rts success", vdev->num_rts_success);
7622 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7623 "num rx err", vdev->num_rx_err);
7624 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7625 "num rx discard", vdev->num_rx_discard);
7626 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7627 "num tx not acked", vdev->num_tx_not_acked);
7628
7629 for (i = 0 ; i < WLAN_MAX_AC; i++)
7630 len += scnprintf(buf + len, buf_len - len,
7631 "%25s [%02d] %u\n",
7632 "num tx frames", i,
7633 vdev->num_tx_frames[i]);
7634
7635 for (i = 0 ; i < WLAN_MAX_AC; i++)
7636 len += scnprintf(buf + len, buf_len - len,
7637 "%25s [%02d] %u\n",
7638 "num tx frames retries", i,
7639 vdev->num_tx_frames_retries[i]);
7640
7641 for (i = 0 ; i < WLAN_MAX_AC; i++)
7642 len += scnprintf(buf + len, buf_len - len,
7643 "%25s [%02d] %u\n",
7644 "num tx frames failures", i,
7645 vdev->num_tx_frames_failures[i]);
7646
7647 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
7648 len += scnprintf(buf + len, buf_len - len,
7649 "%25s [%02d] 0x%08x\n",
7650 "tx rate history", i,
7651 vdev->tx_rate_history[i]);
7652 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
7653 len += scnprintf(buf + len, buf_len - len,
7654 "%25s [%02d] %u\n",
7655 "beacon rssi history", i,
7656 vdev->beacon_rssi_history[i]);
7657
7658 len += scnprintf(buf + len, buf_len - len, "\n");
7659 *length = len;
7660 }
7661 }
7662
7663 static void
ath12k_wmi_fw_bcn_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)7664 ath12k_wmi_fw_bcn_stats_dump(struct ath12k *ar,
7665 struct ath12k_fw_stats *fw_stats,
7666 char *buf, u32 *length)
7667 {
7668 const struct ath12k_fw_stats_bcn *bcn;
7669 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7670 struct ath12k_link_vif *arvif;
7671 u32 len = *length;
7672 size_t num_bcn;
7673
7674 num_bcn = list_count_nodes(&fw_stats->bcn);
7675
7676 len += scnprintf(buf + len, buf_len - len, "\n");
7677 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7678 "ath12k Beacon stats", num_bcn);
7679 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7680 "===================");
7681
7682 list_for_each_entry(bcn, &fw_stats->bcn, list) {
7683 arvif = ath12k_mac_get_arvif(ar, bcn->vdev_id);
7684 if (!arvif)
7685 continue;
7686 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7687 "VDEV ID", bcn->vdev_id);
7688 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7689 "VDEV MAC address", arvif->ahvif->vif->addr);
7690 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7691 "================");
7692 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7693 "Num of beacon tx success", bcn->tx_bcn_succ_cnt);
7694 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7695 "Num of beacon tx failures", bcn->tx_bcn_outage_cnt);
7696
7697 len += scnprintf(buf + len, buf_len - len, "\n");
7698 *length = len;
7699 }
7700 }
7701
7702 static void
ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length,u64 fw_soc_drop_cnt)7703 ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
7704 char *buf, u32 *length, u64 fw_soc_drop_cnt)
7705 {
7706 u32 len = *length;
7707 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7708
7709 len = scnprintf(buf + len, buf_len - len, "\n");
7710 len += scnprintf(buf + len, buf_len - len, "%30s\n",
7711 "ath12k PDEV stats");
7712 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7713 "=================");
7714
7715 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7716 "Channel noise floor", pdev->ch_noise_floor);
7717 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7718 "Channel TX power", pdev->chan_tx_power);
7719 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7720 "TX frame count", pdev->tx_frame_count);
7721 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7722 "RX frame count", pdev->rx_frame_count);
7723 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7724 "RX clear count", pdev->rx_clear_count);
7725 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7726 "Cycle count", pdev->cycle_count);
7727 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7728 "PHY error count", pdev->phy_err_count);
7729 len += scnprintf(buf + len, buf_len - len, "%30s %10llu\n",
7730 "soc drop count", fw_soc_drop_cnt);
7731
7732 *length = len;
7733 }
7734
7735 static void
ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)7736 ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
7737 char *buf, u32 *length)
7738 {
7739 u32 len = *length;
7740 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7741
7742 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7743 "ath12k PDEV TX stats");
7744 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7745 "====================");
7746
7747 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7748 "HTT cookies queued", pdev->comp_queued);
7749 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7750 "HTT cookies disp.", pdev->comp_delivered);
7751 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7752 "MSDU queued", pdev->msdu_enqued);
7753 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7754 "MPDU queued", pdev->mpdu_enqued);
7755 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7756 "MSDUs dropped", pdev->wmm_drop);
7757 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7758 "Local enqued", pdev->local_enqued);
7759 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7760 "Local freed", pdev->local_freed);
7761 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7762 "HW queued", pdev->hw_queued);
7763 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7764 "PPDUs reaped", pdev->hw_reaped);
7765 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7766 "Num underruns", pdev->underrun);
7767 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7768 "PPDUs cleaned", pdev->tx_abort);
7769 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7770 "MPDUs requeued", pdev->mpdus_requed);
7771 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7772 "Excessive retries", pdev->tx_ko);
7773 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7774 "HW rate", pdev->data_rc);
7775 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7776 "Sched self triggers", pdev->self_triggers);
7777 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7778 "Dropped due to SW retries",
7779 pdev->sw_retry_failure);
7780 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7781 "Illegal rate phy errors",
7782 pdev->illgl_rate_phy_err);
7783 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7784 "PDEV continuous xretry", pdev->pdev_cont_xretry);
7785 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7786 "TX timeout", pdev->pdev_tx_timeout);
7787 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7788 "PDEV resets", pdev->pdev_resets);
7789 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7790 "Stateless TIDs alloc failures",
7791 pdev->stateless_tid_alloc_failure);
7792 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7793 "PHY underrun", pdev->phy_underrun);
7794 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7795 "MPDU is more than txop limit", pdev->txop_ovf);
7796 *length = len;
7797 }
7798
7799 static void
ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)7800 ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
7801 char *buf, u32 *length)
7802 {
7803 u32 len = *length;
7804 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7805
7806 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7807 "ath12k PDEV RX stats");
7808 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7809 "====================");
7810
7811 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7812 "Mid PPDU route change",
7813 pdev->mid_ppdu_route_change);
7814 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7815 "Tot. number of statuses", pdev->status_rcvd);
7816 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7817 "Extra frags on rings 0", pdev->r0_frags);
7818 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7819 "Extra frags on rings 1", pdev->r1_frags);
7820 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7821 "Extra frags on rings 2", pdev->r2_frags);
7822 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7823 "Extra frags on rings 3", pdev->r3_frags);
7824 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7825 "MSDUs delivered to HTT", pdev->htt_msdus);
7826 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7827 "MPDUs delivered to HTT", pdev->htt_mpdus);
7828 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7829 "MSDUs delivered to stack", pdev->loc_msdus);
7830 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7831 "MPDUs delivered to stack", pdev->loc_mpdus);
7832 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7833 "Oversized AMSUs", pdev->oversize_amsdu);
7834 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7835 "PHY errors", pdev->phy_errs);
7836 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7837 "PHY errors drops", pdev->phy_err_drop);
7838 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7839 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
7840 *length = len;
7841 }
7842
7843 static void
ath12k_wmi_fw_pdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)7844 ath12k_wmi_fw_pdev_stats_dump(struct ath12k *ar,
7845 struct ath12k_fw_stats *fw_stats,
7846 char *buf, u32 *length)
7847 {
7848 const struct ath12k_fw_stats_pdev *pdev;
7849 u32 len = *length;
7850
7851 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7852 struct ath12k_fw_stats_pdev, list);
7853 if (!pdev) {
7854 ath12k_warn(ar->ab, "failed to get pdev stats\n");
7855 return;
7856 }
7857
7858 ath12k_wmi_fw_pdev_base_stats_dump(pdev, buf, &len,
7859 ar->ab->fw_soc_drop_count);
7860 ath12k_wmi_fw_pdev_tx_stats_dump(pdev, buf, &len);
7861 ath12k_wmi_fw_pdev_rx_stats_dump(pdev, buf, &len);
7862
7863 *length = len;
7864 }
7865
ath12k_wmi_fw_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,u32 stats_id,char * buf)7866 void ath12k_wmi_fw_stats_dump(struct ath12k *ar,
7867 struct ath12k_fw_stats *fw_stats,
7868 u32 stats_id, char *buf)
7869 {
7870 u32 len = 0;
7871 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7872
7873 spin_lock_bh(&ar->data_lock);
7874
7875 switch (stats_id) {
7876 case WMI_REQUEST_VDEV_STAT:
7877 ath12k_wmi_fw_vdev_stats_dump(ar, fw_stats, buf, &len);
7878 break;
7879 case WMI_REQUEST_BCN_STAT:
7880 ath12k_wmi_fw_bcn_stats_dump(ar, fw_stats, buf, &len);
7881 break;
7882 case WMI_REQUEST_PDEV_STAT:
7883 ath12k_wmi_fw_pdev_stats_dump(ar, fw_stats, buf, &len);
7884 break;
7885 default:
7886 break;
7887 }
7888
7889 spin_unlock_bh(&ar->data_lock);
7890
7891 if (len >= buf_len)
7892 buf[len - 1] = 0;
7893 else
7894 buf[len] = 0;
7895
7896 ath12k_fw_stats_reset(ar);
7897 }
7898
7899 static void
ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params * src,struct ath12k_fw_stats_vdev * dst)7900 ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params *src,
7901 struct ath12k_fw_stats_vdev *dst)
7902 {
7903 int i;
7904
7905 dst->vdev_id = le32_to_cpu(src->vdev_id);
7906 dst->beacon_snr = le32_to_cpu(src->beacon_snr);
7907 dst->data_snr = le32_to_cpu(src->data_snr);
7908 dst->num_rx_frames = le32_to_cpu(src->num_rx_frames);
7909 dst->num_rts_fail = le32_to_cpu(src->num_rts_fail);
7910 dst->num_rts_success = le32_to_cpu(src->num_rts_success);
7911 dst->num_rx_err = le32_to_cpu(src->num_rx_err);
7912 dst->num_rx_discard = le32_to_cpu(src->num_rx_discard);
7913 dst->num_tx_not_acked = le32_to_cpu(src->num_tx_not_acked);
7914
7915 for (i = 0; i < WLAN_MAX_AC; i++)
7916 dst->num_tx_frames[i] =
7917 le32_to_cpu(src->num_tx_frames[i]);
7918
7919 for (i = 0; i < WLAN_MAX_AC; i++)
7920 dst->num_tx_frames_retries[i] =
7921 le32_to_cpu(src->num_tx_frames_retries[i]);
7922
7923 for (i = 0; i < WLAN_MAX_AC; i++)
7924 dst->num_tx_frames_failures[i] =
7925 le32_to_cpu(src->num_tx_frames_failures[i]);
7926
7927 for (i = 0; i < MAX_TX_RATE_VALUES; i++)
7928 dst->tx_rate_history[i] =
7929 le32_to_cpu(src->tx_rate_history[i]);
7930
7931 for (i = 0; i < MAX_TX_RATE_VALUES; i++)
7932 dst->beacon_rssi_history[i] =
7933 le32_to_cpu(src->beacon_rssi_history[i]);
7934 }
7935
7936 static void
ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params * src,struct ath12k_fw_stats_bcn * dst)7937 ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params *src,
7938 struct ath12k_fw_stats_bcn *dst)
7939 {
7940 dst->vdev_id = le32_to_cpu(src->vdev_id);
7941 dst->tx_bcn_succ_cnt = le32_to_cpu(src->tx_bcn_succ_cnt);
7942 dst->tx_bcn_outage_cnt = le32_to_cpu(src->tx_bcn_outage_cnt);
7943 }
7944
7945 static void
ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params * src,struct ath12k_fw_stats_pdev * dst)7946 ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params *src,
7947 struct ath12k_fw_stats_pdev *dst)
7948 {
7949 dst->ch_noise_floor = a_sle32_to_cpu(src->chan_nf);
7950 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
7951 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
7952 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
7953 dst->cycle_count = __le32_to_cpu(src->cycle_count);
7954 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
7955 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
7956 }
7957
7958 static void
ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params * src,struct ath12k_fw_stats_pdev * dst)7959 ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params *src,
7960 struct ath12k_fw_stats_pdev *dst)
7961 {
7962 dst->comp_queued = a_sle32_to_cpu(src->comp_queued);
7963 dst->comp_delivered = a_sle32_to_cpu(src->comp_delivered);
7964 dst->msdu_enqued = a_sle32_to_cpu(src->msdu_enqued);
7965 dst->mpdu_enqued = a_sle32_to_cpu(src->mpdu_enqued);
7966 dst->wmm_drop = a_sle32_to_cpu(src->wmm_drop);
7967 dst->local_enqued = a_sle32_to_cpu(src->local_enqued);
7968 dst->local_freed = a_sle32_to_cpu(src->local_freed);
7969 dst->hw_queued = a_sle32_to_cpu(src->hw_queued);
7970 dst->hw_reaped = a_sle32_to_cpu(src->hw_reaped);
7971 dst->underrun = a_sle32_to_cpu(src->underrun);
7972 dst->tx_abort = a_sle32_to_cpu(src->tx_abort);
7973 dst->mpdus_requed = a_sle32_to_cpu(src->mpdus_requed);
7974 dst->tx_ko = __le32_to_cpu(src->tx_ko);
7975 dst->data_rc = __le32_to_cpu(src->data_rc);
7976 dst->self_triggers = __le32_to_cpu(src->self_triggers);
7977 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
7978 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
7979 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
7980 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
7981 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
7982 dst->stateless_tid_alloc_failure =
7983 __le32_to_cpu(src->stateless_tid_alloc_failure);
7984 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
7985 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
7986 }
7987
7988 static void
ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params * src,struct ath12k_fw_stats_pdev * dst)7989 ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params *src,
7990 struct ath12k_fw_stats_pdev *dst)
7991 {
7992 dst->mid_ppdu_route_change =
7993 a_sle32_to_cpu(src->mid_ppdu_route_change);
7994 dst->status_rcvd = a_sle32_to_cpu(src->status_rcvd);
7995 dst->r0_frags = a_sle32_to_cpu(src->r0_frags);
7996 dst->r1_frags = a_sle32_to_cpu(src->r1_frags);
7997 dst->r2_frags = a_sle32_to_cpu(src->r2_frags);
7998 dst->r3_frags = a_sle32_to_cpu(src->r3_frags);
7999 dst->htt_msdus = a_sle32_to_cpu(src->htt_msdus);
8000 dst->htt_mpdus = a_sle32_to_cpu(src->htt_mpdus);
8001 dst->loc_msdus = a_sle32_to_cpu(src->loc_msdus);
8002 dst->loc_mpdus = a_sle32_to_cpu(src->loc_mpdus);
8003 dst->oversize_amsdu = a_sle32_to_cpu(src->oversize_amsdu);
8004 dst->phy_errs = a_sle32_to_cpu(src->phy_errs);
8005 dst->phy_err_drop = a_sle32_to_cpu(src->phy_err_drop);
8006 dst->mpdu_errs = a_sle32_to_cpu(src->mpdu_errs);
8007 }
8008
ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base * ab,struct wmi_tlv_fw_stats_parse * parse,const void * ptr,u16 len)8009 static int ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base *ab,
8010 struct wmi_tlv_fw_stats_parse *parse,
8011 const void *ptr,
8012 u16 len)
8013 {
8014 const struct wmi_stats_event *ev = parse->ev;
8015 struct ath12k_fw_stats *stats = parse->stats;
8016 struct ath12k *ar;
8017 struct ath12k_link_vif *arvif;
8018 struct ieee80211_sta *sta;
8019 struct ath12k_sta *ahsta;
8020 struct ath12k_link_sta *arsta;
8021 int i, ret = 0;
8022 const void *data = ptr;
8023
8024 if (!ev) {
8025 ath12k_warn(ab, "failed to fetch update stats ev");
8026 return -EPROTO;
8027 }
8028
8029 if (!stats)
8030 return -EINVAL;
8031
8032 rcu_read_lock();
8033
8034 stats->pdev_id = le32_to_cpu(ev->pdev_id);
8035 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id);
8036 if (!ar) {
8037 ath12k_warn(ab, "invalid pdev id %d in update stats event\n",
8038 le32_to_cpu(ev->pdev_id));
8039 ret = -EPROTO;
8040 goto exit;
8041 }
8042
8043 for (i = 0; i < le32_to_cpu(ev->num_vdev_stats); i++) {
8044 const struct wmi_vdev_stats_params *src;
8045 struct ath12k_fw_stats_vdev *dst;
8046
8047 src = data;
8048 if (len < sizeof(*src)) {
8049 ret = -EPROTO;
8050 goto exit;
8051 }
8052
8053 arvif = ath12k_mac_get_arvif(ar, le32_to_cpu(src->vdev_id));
8054 if (arvif) {
8055 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar),
8056 arvif->bssid,
8057 NULL);
8058 if (sta) {
8059 ahsta = ath12k_sta_to_ahsta(sta);
8060 arsta = &ahsta->deflink;
8061 arsta->rssi_beacon = le32_to_cpu(src->beacon_snr);
8062 ath12k_dbg(ab, ATH12K_DBG_WMI,
8063 "wmi stats vdev id %d snr %d\n",
8064 src->vdev_id, src->beacon_snr);
8065 } else {
8066 ath12k_dbg(ab, ATH12K_DBG_WMI,
8067 "not found station bssid %pM for vdev stat\n",
8068 arvif->bssid);
8069 }
8070 }
8071
8072 data += sizeof(*src);
8073 len -= sizeof(*src);
8074 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
8075 if (!dst)
8076 continue;
8077 ath12k_wmi_pull_vdev_stats(src, dst);
8078 stats->stats_id = WMI_REQUEST_VDEV_STAT;
8079 list_add_tail(&dst->list, &stats->vdevs);
8080 }
8081 for (i = 0; i < le32_to_cpu(ev->num_bcn_stats); i++) {
8082 const struct ath12k_wmi_bcn_stats_params *src;
8083 struct ath12k_fw_stats_bcn *dst;
8084
8085 src = data;
8086 if (len < sizeof(*src)) {
8087 ret = -EPROTO;
8088 goto exit;
8089 }
8090
8091 data += sizeof(*src);
8092 len -= sizeof(*src);
8093 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
8094 if (!dst)
8095 continue;
8096 ath12k_wmi_pull_bcn_stats(src, dst);
8097 stats->stats_id = WMI_REQUEST_BCN_STAT;
8098 list_add_tail(&dst->list, &stats->bcn);
8099 }
8100 for (i = 0; i < le32_to_cpu(ev->num_pdev_stats); i++) {
8101 const struct ath12k_wmi_pdev_stats_params *src;
8102 struct ath12k_fw_stats_pdev *dst;
8103
8104 src = data;
8105 if (len < sizeof(*src)) {
8106 ret = -EPROTO;
8107 goto exit;
8108 }
8109
8110 stats->stats_id = WMI_REQUEST_PDEV_STAT;
8111
8112 data += sizeof(*src);
8113 len -= sizeof(*src);
8114
8115 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
8116 if (!dst)
8117 continue;
8118
8119 ath12k_wmi_pull_pdev_stats_base(&src->base, dst);
8120 ath12k_wmi_pull_pdev_stats_tx(&src->tx, dst);
8121 ath12k_wmi_pull_pdev_stats_rx(&src->rx, dst);
8122 list_add_tail(&dst->list, &stats->pdevs);
8123 }
8124
8125 exit:
8126 rcu_read_unlock();
8127 return ret;
8128 }
8129
ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8130 static int ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base *ab,
8131 u16 tag, u16 len,
8132 const void *ptr, void *data)
8133 {
8134 struct wmi_tlv_fw_stats_parse *parse = data;
8135 int ret = 0;
8136
8137 switch (tag) {
8138 case WMI_TAG_STATS_EVENT:
8139 parse->ev = ptr;
8140 break;
8141 case WMI_TAG_ARRAY_BYTE:
8142 ret = ath12k_wmi_tlv_fw_stats_data_parse(ab, parse, ptr, len);
8143 break;
8144 default:
8145 break;
8146 }
8147 return ret;
8148 }
8149
ath12k_wmi_pull_fw_stats(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_fw_stats * stats)8150 static int ath12k_wmi_pull_fw_stats(struct ath12k_base *ab, struct sk_buff *skb,
8151 struct ath12k_fw_stats *stats)
8152 {
8153 struct wmi_tlv_fw_stats_parse parse = {};
8154
8155 stats->stats_id = 0;
8156 parse.stats = stats;
8157
8158 return ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
8159 ath12k_wmi_tlv_fw_stats_parse,
8160 &parse);
8161 }
8162
ath12k_wmi_fw_stats_process(struct ath12k * ar,struct ath12k_fw_stats * stats)8163 static void ath12k_wmi_fw_stats_process(struct ath12k *ar,
8164 struct ath12k_fw_stats *stats)
8165 {
8166 struct ath12k_base *ab = ar->ab;
8167 struct ath12k_pdev *pdev;
8168 bool is_end = true;
8169 size_t total_vdevs_started = 0;
8170 int i;
8171
8172 if (stats->stats_id == WMI_REQUEST_VDEV_STAT) {
8173 if (list_empty(&stats->vdevs)) {
8174 ath12k_warn(ab, "empty vdev stats");
8175 return;
8176 }
8177 /* FW sends all the active VDEV stats irrespective of PDEV,
8178 * hence limit until the count of all VDEVs started
8179 */
8180 rcu_read_lock();
8181 for (i = 0; i < ab->num_radios; i++) {
8182 pdev = rcu_dereference(ab->pdevs_active[i]);
8183 if (pdev && pdev->ar)
8184 total_vdevs_started += pdev->ar->num_started_vdevs;
8185 }
8186 rcu_read_unlock();
8187
8188 if (total_vdevs_started)
8189 is_end = ((++ar->fw_stats.num_vdev_recvd) ==
8190 total_vdevs_started);
8191
8192 list_splice_tail_init(&stats->vdevs,
8193 &ar->fw_stats.vdevs);
8194
8195 if (is_end)
8196 complete(&ar->fw_stats_done);
8197
8198 return;
8199 }
8200
8201 if (stats->stats_id == WMI_REQUEST_BCN_STAT) {
8202 if (list_empty(&stats->bcn)) {
8203 ath12k_warn(ab, "empty beacon stats");
8204 return;
8205 }
8206 /* Mark end until we reached the count of all started VDEVs
8207 * within the PDEV
8208 */
8209 if (ar->num_started_vdevs)
8210 is_end = ((++ar->fw_stats.num_bcn_recvd) ==
8211 ar->num_started_vdevs);
8212
8213 list_splice_tail_init(&stats->bcn,
8214 &ar->fw_stats.bcn);
8215
8216 if (is_end)
8217 complete(&ar->fw_stats_done);
8218 }
8219 }
8220
ath12k_update_stats_event(struct ath12k_base * ab,struct sk_buff * skb)8221 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb)
8222 {
8223 struct ath12k_fw_stats stats = {};
8224 struct ath12k *ar;
8225 int ret;
8226
8227 INIT_LIST_HEAD(&stats.pdevs);
8228 INIT_LIST_HEAD(&stats.vdevs);
8229 INIT_LIST_HEAD(&stats.bcn);
8230
8231 ret = ath12k_wmi_pull_fw_stats(ab, skb, &stats);
8232 if (ret) {
8233 ath12k_warn(ab, "failed to pull fw stats: %d\n", ret);
8234 goto free;
8235 }
8236
8237 ath12k_dbg(ab, ATH12K_DBG_WMI, "event update stats");
8238
8239 rcu_read_lock();
8240 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats.pdev_id);
8241 if (!ar) {
8242 rcu_read_unlock();
8243 ath12k_warn(ab, "failed to get ar for pdev_id %d: %d\n",
8244 stats.pdev_id, ret);
8245 goto free;
8246 }
8247
8248 spin_lock_bh(&ar->data_lock);
8249
8250 /* Handle WMI_REQUEST_PDEV_STAT status update */
8251 if (stats.stats_id == WMI_REQUEST_PDEV_STAT) {
8252 list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs);
8253 complete(&ar->fw_stats_done);
8254 goto complete;
8255 }
8256
8257 /* Handle WMI_REQUEST_VDEV_STAT and WMI_REQUEST_BCN_STAT updates. */
8258 ath12k_wmi_fw_stats_process(ar, &stats);
8259
8260 complete:
8261 complete(&ar->fw_stats_complete);
8262 spin_unlock_bh(&ar->data_lock);
8263 rcu_read_unlock();
8264
8265 /* Since the stats's pdev, vdev and beacon list are spliced and reinitialised
8266 * at this point, no need to free the individual list.
8267 */
8268 return;
8269
8270 free:
8271 ath12k_fw_stats_free(&stats);
8272 }
8273
8274 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned
8275 * is not part of BDF CTL(Conformance test limits) table entries.
8276 */
ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base * ab,struct sk_buff * skb)8277 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab,
8278 struct sk_buff *skb)
8279 {
8280 const void **tb;
8281 const struct wmi_pdev_ctl_failsafe_chk_event *ev;
8282 int ret;
8283
8284 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8285 if (IS_ERR(tb)) {
8286 ret = PTR_ERR(tb);
8287 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8288 return;
8289 }
8290
8291 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT];
8292 if (!ev) {
8293 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev");
8294 kfree(tb);
8295 return;
8296 }
8297
8298 ath12k_dbg(ab, ATH12K_DBG_WMI,
8299 "pdev ctl failsafe check ev status %d\n",
8300 ev->ctl_failsafe_status);
8301
8302 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power
8303 * to 10 dBm else the CTL power entry in the BDF would be picked up.
8304 */
8305 if (ev->ctl_failsafe_status != 0)
8306 ath12k_warn(ab, "pdev ctl failsafe failure status %d",
8307 ev->ctl_failsafe_status);
8308
8309 kfree(tb);
8310 }
8311
8312 static void
ath12k_wmi_process_csa_switch_count_event(struct ath12k_base * ab,const struct ath12k_wmi_pdev_csa_event * ev,const u32 * vdev_ids)8313 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab,
8314 const struct ath12k_wmi_pdev_csa_event *ev,
8315 const u32 *vdev_ids)
8316 {
8317 u32 current_switch_count = le32_to_cpu(ev->current_switch_count);
8318 u32 num_vdevs = le32_to_cpu(ev->num_vdevs);
8319 struct ieee80211_bss_conf *conf;
8320 struct ath12k_link_vif *arvif;
8321 struct ath12k_vif *ahvif;
8322 int i;
8323
8324 rcu_read_lock();
8325 for (i = 0; i < num_vdevs; i++) {
8326 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]);
8327
8328 if (!arvif) {
8329 ath12k_warn(ab, "Recvd csa status for unknown vdev %d",
8330 vdev_ids[i]);
8331 continue;
8332 }
8333 ahvif = arvif->ahvif;
8334
8335 if (arvif->link_id >= IEEE80211_MLD_MAX_NUM_LINKS) {
8336 ath12k_warn(ab, "Invalid CSA switch count even link id: %d\n",
8337 arvif->link_id);
8338 continue;
8339 }
8340
8341 conf = rcu_dereference(ahvif->vif->link_conf[arvif->link_id]);
8342 if (!conf) {
8343 ath12k_warn(ab, "unable to access bss link conf in process csa for vif %pM link %u\n",
8344 ahvif->vif->addr, arvif->link_id);
8345 continue;
8346 }
8347
8348 if (!arvif->is_up || !conf->csa_active)
8349 continue;
8350
8351 /* Finish CSA when counter reaches zero */
8352 if (!current_switch_count) {
8353 ieee80211_csa_finish(ahvif->vif, arvif->link_id);
8354 arvif->current_cntdown_counter = 0;
8355 } else if (current_switch_count > 1) {
8356 /* If the count in event is not what we expect, don't update the
8357 * mac80211 count. Since during beacon Tx failure, count in the
8358 * firmware will not decrement and this event will come with the
8359 * previous count value again
8360 */
8361 if (current_switch_count != arvif->current_cntdown_counter)
8362 continue;
8363
8364 arvif->current_cntdown_counter =
8365 ieee80211_beacon_update_cntdwn(ahvif->vif,
8366 arvif->link_id);
8367 }
8368 }
8369 rcu_read_unlock();
8370 }
8371
8372 static void
ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base * ab,struct sk_buff * skb)8373 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab,
8374 struct sk_buff *skb)
8375 {
8376 const void **tb;
8377 const struct ath12k_wmi_pdev_csa_event *ev;
8378 const u32 *vdev_ids;
8379 int ret;
8380
8381 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8382 if (IS_ERR(tb)) {
8383 ret = PTR_ERR(tb);
8384 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8385 return;
8386 }
8387
8388 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT];
8389 vdev_ids = tb[WMI_TAG_ARRAY_UINT32];
8390
8391 if (!ev || !vdev_ids) {
8392 ath12k_warn(ab, "failed to fetch pdev csa switch count ev");
8393 kfree(tb);
8394 return;
8395 }
8396
8397 ath12k_dbg(ab, ATH12K_DBG_WMI,
8398 "pdev csa switch count %d for pdev %d, num_vdevs %d",
8399 ev->current_switch_count, ev->pdev_id,
8400 ev->num_vdevs);
8401
8402 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids);
8403
8404 kfree(tb);
8405 }
8406
8407 static void
ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base * ab,struct sk_buff * skb)8408 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb)
8409 {
8410 const void **tb;
8411 struct ath12k_mac_get_any_chanctx_conf_arg arg;
8412 const struct ath12k_wmi_pdev_radar_event *ev;
8413 struct ath12k *ar;
8414 int ret;
8415
8416 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8417 if (IS_ERR(tb)) {
8418 ret = PTR_ERR(tb);
8419 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8420 return;
8421 }
8422
8423 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT];
8424
8425 if (!ev) {
8426 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev");
8427 kfree(tb);
8428 return;
8429 }
8430
8431 ath12k_dbg(ab, ATH12K_DBG_WMI,
8432 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d",
8433 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width,
8434 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp,
8435 ev->freq_offset, ev->sidx);
8436
8437 rcu_read_lock();
8438
8439 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
8440
8441 if (!ar) {
8442 ath12k_warn(ab, "radar detected in invalid pdev %d\n",
8443 ev->pdev_id);
8444 goto exit;
8445 }
8446
8447 arg.ar = ar;
8448 arg.chanctx_conf = NULL;
8449 ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar),
8450 ath12k_mac_get_any_chanctx_conf_iter, &arg);
8451 if (!arg.chanctx_conf) {
8452 ath12k_warn(ab, "failed to find valid chanctx_conf in radar detected event\n");
8453 goto exit;
8454 }
8455
8456 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n",
8457 ev->pdev_id);
8458
8459 if (ar->dfs_block_radar_events)
8460 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
8461 else
8462 ieee80211_radar_detected(ath12k_ar_to_hw(ar), arg.chanctx_conf);
8463
8464 exit:
8465 rcu_read_unlock();
8466
8467 kfree(tb);
8468 }
8469
ath12k_tm_wmi_event_segmented(struct ath12k_base * ab,u32 cmd_id,struct sk_buff * skb)8470 static void ath12k_tm_wmi_event_segmented(struct ath12k_base *ab, u32 cmd_id,
8471 struct sk_buff *skb)
8472 {
8473 const struct ath12k_wmi_ftm_event *ev;
8474 const void **tb;
8475 int ret;
8476 u16 length;
8477
8478 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8479
8480 if (IS_ERR(tb)) {
8481 ret = PTR_ERR(tb);
8482 ath12k_warn(ab, "failed to parse ftm event tlv: %d\n", ret);
8483 return;
8484 }
8485
8486 ev = tb[WMI_TAG_ARRAY_BYTE];
8487 if (!ev) {
8488 ath12k_warn(ab, "failed to fetch ftm msg\n");
8489 kfree(tb);
8490 return;
8491 }
8492
8493 length = skb->len - TLV_HDR_SIZE;
8494 ath12k_tm_process_event(ab, cmd_id, ev, length);
8495 kfree(tb);
8496 tb = NULL;
8497 }
8498
8499 static void
ath12k_wmi_pdev_temperature_event(struct ath12k_base * ab,struct sk_buff * skb)8500 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
8501 struct sk_buff *skb)
8502 {
8503 struct ath12k *ar;
8504 struct wmi_pdev_temperature_event ev = {0};
8505
8506 if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) {
8507 ath12k_warn(ab, "failed to extract pdev temperature event");
8508 return;
8509 }
8510
8511 ath12k_dbg(ab, ATH12K_DBG_WMI,
8512 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id);
8513
8514 rcu_read_lock();
8515
8516 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id));
8517 if (!ar) {
8518 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id);
8519 goto exit;
8520 }
8521
8522 exit:
8523 rcu_read_unlock();
8524 }
8525
ath12k_fils_discovery_event(struct ath12k_base * ab,struct sk_buff * skb)8526 static void ath12k_fils_discovery_event(struct ath12k_base *ab,
8527 struct sk_buff *skb)
8528 {
8529 const void **tb;
8530 const struct wmi_fils_discovery_event *ev;
8531 int ret;
8532
8533 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8534 if (IS_ERR(tb)) {
8535 ret = PTR_ERR(tb);
8536 ath12k_warn(ab,
8537 "failed to parse FILS discovery event tlv %d\n",
8538 ret);
8539 return;
8540 }
8541
8542 ev = tb[WMI_TAG_HOST_SWFDA_EVENT];
8543 if (!ev) {
8544 ath12k_warn(ab, "failed to fetch FILS discovery event\n");
8545 kfree(tb);
8546 return;
8547 }
8548
8549 ath12k_warn(ab,
8550 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n",
8551 ev->vdev_id, ev->fils_tt, ev->tbtt);
8552
8553 kfree(tb);
8554 }
8555
ath12k_probe_resp_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)8556 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab,
8557 struct sk_buff *skb)
8558 {
8559 const void **tb;
8560 const struct wmi_probe_resp_tx_status_event *ev;
8561 int ret;
8562
8563 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8564 if (IS_ERR(tb)) {
8565 ret = PTR_ERR(tb);
8566 ath12k_warn(ab,
8567 "failed to parse probe response transmission status event tlv: %d\n",
8568 ret);
8569 return;
8570 }
8571
8572 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT];
8573 if (!ev) {
8574 ath12k_warn(ab,
8575 "failed to fetch probe response transmission status event");
8576 kfree(tb);
8577 return;
8578 }
8579
8580 if (ev->tx_status)
8581 ath12k_warn(ab,
8582 "Probe response transmission failed for vdev_id %u, status %u\n",
8583 ev->vdev_id, ev->tx_status);
8584
8585 kfree(tb);
8586 }
8587
ath12k_wmi_p2p_noa_event(struct ath12k_base * ab,struct sk_buff * skb)8588 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab,
8589 struct sk_buff *skb)
8590 {
8591 const void **tb;
8592 const struct wmi_p2p_noa_event *ev;
8593 const struct ath12k_wmi_p2p_noa_info *noa;
8594 struct ath12k *ar;
8595 int ret, vdev_id;
8596
8597 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8598 if (IS_ERR(tb)) {
8599 ret = PTR_ERR(tb);
8600 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret);
8601 return ret;
8602 }
8603
8604 ev = tb[WMI_TAG_P2P_NOA_EVENT];
8605 noa = tb[WMI_TAG_P2P_NOA_INFO];
8606
8607 if (!ev || !noa) {
8608 ret = -EPROTO;
8609 goto out;
8610 }
8611
8612 vdev_id = __le32_to_cpu(ev->vdev_id);
8613
8614 ath12k_dbg(ab, ATH12K_DBG_WMI,
8615 "wmi tlv p2p noa vdev_id %i descriptors %u\n",
8616 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM));
8617
8618 rcu_read_lock();
8619 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
8620 if (!ar) {
8621 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n",
8622 vdev_id);
8623 ret = -EINVAL;
8624 goto unlock;
8625 }
8626
8627 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa);
8628
8629 ret = 0;
8630
8631 unlock:
8632 rcu_read_unlock();
8633 out:
8634 kfree(tb);
8635 return ret;
8636 }
8637
ath12k_rfkill_state_change_event(struct ath12k_base * ab,struct sk_buff * skb)8638 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab,
8639 struct sk_buff *skb)
8640 {
8641 const struct wmi_rfkill_state_change_event *ev;
8642 const void **tb;
8643 int ret;
8644
8645 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8646 if (IS_ERR(tb)) {
8647 ret = PTR_ERR(tb);
8648 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8649 return;
8650 }
8651
8652 ev = tb[WMI_TAG_RFKILL_EVENT];
8653 if (!ev) {
8654 kfree(tb);
8655 return;
8656 }
8657
8658 ath12k_dbg(ab, ATH12K_DBG_MAC,
8659 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n",
8660 le32_to_cpu(ev->gpio_pin_num),
8661 le32_to_cpu(ev->int_type),
8662 le32_to_cpu(ev->radio_state));
8663
8664 spin_lock_bh(&ab->base_lock);
8665 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON));
8666 spin_unlock_bh(&ab->base_lock);
8667
8668 queue_work(ab->workqueue, &ab->rfkill_work);
8669 kfree(tb);
8670 }
8671
8672 static void
ath12k_wmi_diag_event(struct ath12k_base * ab,struct sk_buff * skb)8673 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb)
8674 {
8675 trace_ath12k_wmi_diag(ab, skb->data, skb->len);
8676 }
8677
ath12k_wmi_twt_enable_event(struct ath12k_base * ab,struct sk_buff * skb)8678 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab,
8679 struct sk_buff *skb)
8680 {
8681 const void **tb;
8682 const struct wmi_twt_enable_event *ev;
8683 int ret;
8684
8685 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8686 if (IS_ERR(tb)) {
8687 ret = PTR_ERR(tb);
8688 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n",
8689 ret);
8690 return;
8691 }
8692
8693 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT];
8694 if (!ev) {
8695 ath12k_warn(ab, "failed to fetch twt enable wmi event\n");
8696 goto exit;
8697 }
8698
8699 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n",
8700 le32_to_cpu(ev->pdev_id),
8701 le32_to_cpu(ev->status));
8702
8703 exit:
8704 kfree(tb);
8705 }
8706
ath12k_wmi_twt_disable_event(struct ath12k_base * ab,struct sk_buff * skb)8707 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab,
8708 struct sk_buff *skb)
8709 {
8710 const void **tb;
8711 const struct wmi_twt_disable_event *ev;
8712 int ret;
8713
8714 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8715 if (IS_ERR(tb)) {
8716 ret = PTR_ERR(tb);
8717 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n",
8718 ret);
8719 return;
8720 }
8721
8722 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT];
8723 if (!ev) {
8724 ath12k_warn(ab, "failed to fetch twt disable wmi event\n");
8725 goto exit;
8726 }
8727
8728 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n",
8729 le32_to_cpu(ev->pdev_id),
8730 le32_to_cpu(ev->status));
8731
8732 exit:
8733 kfree(tb);
8734 }
8735
ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8736 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab,
8737 u16 tag, u16 len,
8738 const void *ptr, void *data)
8739 {
8740 const struct wmi_wow_ev_pg_fault_param *pf_param;
8741 const struct wmi_wow_ev_param *param;
8742 struct wmi_wow_ev_arg *arg = data;
8743 int pf_len;
8744
8745 switch (tag) {
8746 case WMI_TAG_WOW_EVENT_INFO:
8747 param = ptr;
8748 arg->wake_reason = le32_to_cpu(param->wake_reason);
8749 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n",
8750 arg->wake_reason, wow_reason(arg->wake_reason));
8751 break;
8752
8753 case WMI_TAG_ARRAY_BYTE:
8754 if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) {
8755 pf_param = ptr;
8756 pf_len = le32_to_cpu(pf_param->len);
8757 if (pf_len > len - sizeof(pf_len) ||
8758 pf_len < 0) {
8759 ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n",
8760 pf_len);
8761 return -EINVAL;
8762 }
8763 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n",
8764 pf_len);
8765 ath12k_dbg_dump(ab, ATH12K_DBG_WMI,
8766 "wow_reason_page_fault packet present",
8767 "wow_pg_fault ",
8768 pf_param->data,
8769 pf_len);
8770 }
8771 break;
8772 default:
8773 break;
8774 }
8775
8776 return 0;
8777 }
8778
ath12k_wmi_event_wow_wakeup_host(struct ath12k_base * ab,struct sk_buff * skb)8779 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb)
8780 {
8781 struct wmi_wow_ev_arg arg = { };
8782 int ret;
8783
8784 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
8785 ath12k_wmi_wow_wakeup_host_parse,
8786 &arg);
8787 if (ret) {
8788 ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n",
8789 ret);
8790 return;
8791 }
8792
8793 complete(&ab->wow.wakeup_completed);
8794 }
8795
ath12k_wmi_gtk_offload_status_event(struct ath12k_base * ab,struct sk_buff * skb)8796 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab,
8797 struct sk_buff *skb)
8798 {
8799 const struct wmi_gtk_offload_status_event *ev;
8800 struct ath12k_link_vif *arvif;
8801 __be64 replay_ctr_be;
8802 u64 replay_ctr;
8803 const void **tb;
8804 int ret;
8805
8806 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8807 if (IS_ERR(tb)) {
8808 ret = PTR_ERR(tb);
8809 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8810 return;
8811 }
8812
8813 ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT];
8814 if (!ev) {
8815 ath12k_warn(ab, "failed to fetch gtk offload status ev");
8816 kfree(tb);
8817 return;
8818 }
8819
8820 rcu_read_lock();
8821 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id));
8822 if (!arvif) {
8823 rcu_read_unlock();
8824 ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n",
8825 le32_to_cpu(ev->vdev_id));
8826 kfree(tb);
8827 return;
8828 }
8829
8830 replay_ctr = le64_to_cpu(ev->replay_ctr);
8831 arvif->rekey_data.replay_ctr = replay_ctr;
8832 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n",
8833 le32_to_cpu(ev->refresh_cnt), replay_ctr);
8834
8835 /* supplicant expects big-endian replay counter */
8836 replay_ctr_be = cpu_to_be64(replay_ctr);
8837
8838 ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid,
8839 (void *)&replay_ctr_be, GFP_ATOMIC);
8840
8841 rcu_read_unlock();
8842
8843 kfree(tb);
8844 }
8845
ath12k_wmi_event_mlo_setup_complete(struct ath12k_base * ab,struct sk_buff * skb)8846 static void ath12k_wmi_event_mlo_setup_complete(struct ath12k_base *ab,
8847 struct sk_buff *skb)
8848 {
8849 const struct wmi_mlo_setup_complete_event *ev;
8850 struct ath12k *ar = NULL;
8851 struct ath12k_pdev *pdev;
8852 const void **tb;
8853 int ret, i;
8854
8855 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8856 if (IS_ERR(tb)) {
8857 ret = PTR_ERR(tb);
8858 ath12k_warn(ab, "failed to parse mlo setup complete event tlv: %d\n",
8859 ret);
8860 return;
8861 }
8862
8863 ev = tb[WMI_TAG_MLO_SETUP_COMPLETE_EVENT];
8864 if (!ev) {
8865 ath12k_warn(ab, "failed to fetch mlo setup complete event\n");
8866 kfree(tb);
8867 return;
8868 }
8869
8870 if (le32_to_cpu(ev->pdev_id) > ab->num_radios)
8871 goto skip_lookup;
8872
8873 for (i = 0; i < ab->num_radios; i++) {
8874 pdev = &ab->pdevs[i];
8875 if (pdev && pdev->pdev_id == le32_to_cpu(ev->pdev_id)) {
8876 ar = pdev->ar;
8877 break;
8878 }
8879 }
8880
8881 skip_lookup:
8882 if (!ar) {
8883 ath12k_warn(ab, "invalid pdev_id %d status %u in setup complete event\n",
8884 ev->pdev_id, ev->status);
8885 goto out;
8886 }
8887
8888 ar->mlo_setup_status = le32_to_cpu(ev->status);
8889 complete(&ar->mlo_setup_done);
8890
8891 out:
8892 kfree(tb);
8893 }
8894
ath12k_wmi_event_teardown_complete(struct ath12k_base * ab,struct sk_buff * skb)8895 static void ath12k_wmi_event_teardown_complete(struct ath12k_base *ab,
8896 struct sk_buff *skb)
8897 {
8898 const struct wmi_mlo_teardown_complete_event *ev;
8899 const void **tb;
8900 int ret;
8901
8902 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8903 if (IS_ERR(tb)) {
8904 ret = PTR_ERR(tb);
8905 ath12k_warn(ab, "failed to parse teardown complete event tlv: %d\n", ret);
8906 return;
8907 }
8908
8909 ev = tb[WMI_TAG_MLO_TEARDOWN_COMPLETE];
8910 if (!ev) {
8911 ath12k_warn(ab, "failed to fetch teardown complete event\n");
8912 kfree(tb);
8913 return;
8914 }
8915
8916 kfree(tb);
8917 }
8918
8919 #ifdef CONFIG_ATH12K_DEBUGFS
ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base * ab,const void * ptr,u16 tag,u16 len,struct wmi_tpc_stats_arg * tpc_stats)8920 static int ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base *ab,
8921 const void *ptr, u16 tag, u16 len,
8922 struct wmi_tpc_stats_arg *tpc_stats)
8923 {
8924 u32 len1, len2, len3, len4;
8925 s16 *dst_ptr;
8926 s8 *dst_ptr_ctl;
8927
8928 len1 = le32_to_cpu(tpc_stats->max_reg_allowed_power.tpc_reg_pwr.reg_array_len);
8929 len2 = le32_to_cpu(tpc_stats->rates_array1.tpc_rates_array.rate_array_len);
8930 len3 = le32_to_cpu(tpc_stats->rates_array2.tpc_rates_array.rate_array_len);
8931 len4 = le32_to_cpu(tpc_stats->ctl_array.tpc_ctl_pwr.ctl_array_len);
8932
8933 switch (tpc_stats->event_count) {
8934 case ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT:
8935 if (len1 > len)
8936 return -ENOBUFS;
8937
8938 if (tpc_stats->tlvs_rcvd & WMI_TPC_REG_PWR_ALLOWED) {
8939 dst_ptr = tpc_stats->max_reg_allowed_power.reg_pwr_array;
8940 memcpy(dst_ptr, ptr, len1);
8941 }
8942 break;
8943 case ATH12K_TPC_STATS_RATES_EVENT1:
8944 if (len2 > len)
8945 return -ENOBUFS;
8946
8947 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY1) {
8948 dst_ptr = tpc_stats->rates_array1.rate_array;
8949 memcpy(dst_ptr, ptr, len2);
8950 }
8951 break;
8952 case ATH12K_TPC_STATS_RATES_EVENT2:
8953 if (len3 > len)
8954 return -ENOBUFS;
8955
8956 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY2) {
8957 dst_ptr = tpc_stats->rates_array2.rate_array;
8958 memcpy(dst_ptr, ptr, len3);
8959 }
8960 break;
8961 case ATH12K_TPC_STATS_CTL_TABLE_EVENT:
8962 if (len4 > len)
8963 return -ENOBUFS;
8964
8965 if (tpc_stats->tlvs_rcvd & WMI_TPC_CTL_PWR_ARRAY) {
8966 dst_ptr_ctl = tpc_stats->ctl_array.ctl_pwr_table;
8967 memcpy(dst_ptr_ctl, ptr, len4);
8968 }
8969 break;
8970 }
8971 return 0;
8972 }
8973
ath12k_tpc_get_reg_pwr(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_max_reg_power_fixed_params * ev)8974 static int ath12k_tpc_get_reg_pwr(struct ath12k_base *ab,
8975 struct wmi_tpc_stats_arg *tpc_stats,
8976 struct wmi_max_reg_power_fixed_params *ev)
8977 {
8978 struct wmi_max_reg_power_allowed_arg *reg_pwr;
8979 u32 total_size;
8980
8981 ath12k_dbg(ab, ATH12K_DBG_WMI,
8982 "Received reg power array type %d length %d for tpc stats\n",
8983 ev->reg_power_type, ev->reg_array_len);
8984
8985 switch (le32_to_cpu(ev->reg_power_type)) {
8986 case TPC_STATS_REG_PWR_ALLOWED_TYPE:
8987 reg_pwr = &tpc_stats->max_reg_allowed_power;
8988 break;
8989 default:
8990 return -EINVAL;
8991 }
8992
8993 /* Each entry is 2 byte hence multiplying the indices with 2 */
8994 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
8995 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4) * 2;
8996 if (le32_to_cpu(ev->reg_array_len) != total_size) {
8997 ath12k_warn(ab,
8998 "Total size and reg_array_len doesn't match for tpc stats\n");
8999 return -EINVAL;
9000 }
9001
9002 memcpy(®_pwr->tpc_reg_pwr, ev, sizeof(struct wmi_max_reg_power_fixed_params));
9003
9004 reg_pwr->reg_pwr_array = kzalloc(le32_to_cpu(reg_pwr->tpc_reg_pwr.reg_array_len),
9005 GFP_ATOMIC);
9006 if (!reg_pwr->reg_pwr_array)
9007 return -ENOMEM;
9008
9009 tpc_stats->tlvs_rcvd |= WMI_TPC_REG_PWR_ALLOWED;
9010
9011 return 0;
9012 }
9013
ath12k_tpc_get_rate_array(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_rates_array_fixed_params * ev)9014 static int ath12k_tpc_get_rate_array(struct ath12k_base *ab,
9015 struct wmi_tpc_stats_arg *tpc_stats,
9016 struct wmi_tpc_rates_array_fixed_params *ev)
9017 {
9018 struct wmi_tpc_rates_array_arg *rates_array;
9019 u32 flag = 0, rate_array_len;
9020
9021 ath12k_dbg(ab, ATH12K_DBG_WMI,
9022 "Received rates array type %d length %d for tpc stats\n",
9023 ev->rate_array_type, ev->rate_array_len);
9024
9025 switch (le32_to_cpu(ev->rate_array_type)) {
9026 case ATH12K_TPC_STATS_RATES_ARRAY1:
9027 rates_array = &tpc_stats->rates_array1;
9028 flag = WMI_TPC_RATES_ARRAY1;
9029 break;
9030 case ATH12K_TPC_STATS_RATES_ARRAY2:
9031 rates_array = &tpc_stats->rates_array2;
9032 flag = WMI_TPC_RATES_ARRAY2;
9033 break;
9034 default:
9035 ath12k_warn(ab,
9036 "Received invalid type of rates array for tpc stats\n");
9037 return -EINVAL;
9038 }
9039 memcpy(&rates_array->tpc_rates_array, ev,
9040 sizeof(struct wmi_tpc_rates_array_fixed_params));
9041 rate_array_len = le32_to_cpu(rates_array->tpc_rates_array.rate_array_len);
9042 rates_array->rate_array = kzalloc(rate_array_len, GFP_ATOMIC);
9043 if (!rates_array->rate_array)
9044 return -ENOMEM;
9045
9046 tpc_stats->tlvs_rcvd |= flag;
9047 return 0;
9048 }
9049
ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_ctl_pwr_fixed_params * ev)9050 static int ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base *ab,
9051 struct wmi_tpc_stats_arg *tpc_stats,
9052 struct wmi_tpc_ctl_pwr_fixed_params *ev)
9053 {
9054 struct wmi_tpc_ctl_pwr_table_arg *ctl_array;
9055 u32 total_size, ctl_array_len, flag = 0;
9056
9057 ath12k_dbg(ab, ATH12K_DBG_WMI,
9058 "Received ctl array type %d length %d for tpc stats\n",
9059 ev->ctl_array_type, ev->ctl_array_len);
9060
9061 switch (le32_to_cpu(ev->ctl_array_type)) {
9062 case ATH12K_TPC_STATS_CTL_ARRAY:
9063 ctl_array = &tpc_stats->ctl_array;
9064 flag = WMI_TPC_CTL_PWR_ARRAY;
9065 break;
9066 default:
9067 ath12k_warn(ab,
9068 "Received invalid type of ctl pwr table for tpc stats\n");
9069 return -EINVAL;
9070 }
9071
9072 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
9073 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4);
9074 if (le32_to_cpu(ev->ctl_array_len) != total_size) {
9075 ath12k_warn(ab,
9076 "Total size and ctl_array_len doesn't match for tpc stats\n");
9077 return -EINVAL;
9078 }
9079
9080 memcpy(&ctl_array->tpc_ctl_pwr, ev, sizeof(struct wmi_tpc_ctl_pwr_fixed_params));
9081 ctl_array_len = le32_to_cpu(ctl_array->tpc_ctl_pwr.ctl_array_len);
9082 ctl_array->ctl_pwr_table = kzalloc(ctl_array_len, GFP_ATOMIC);
9083 if (!ctl_array->ctl_pwr_table)
9084 return -ENOMEM;
9085
9086 tpc_stats->tlvs_rcvd |= flag;
9087 return 0;
9088 }
9089
ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9090 static int ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base *ab,
9091 u16 tag, u16 len,
9092 const void *ptr, void *data)
9093 {
9094 struct wmi_tpc_rates_array_fixed_params *tpc_rates_array;
9095 struct wmi_max_reg_power_fixed_params *tpc_reg_pwr;
9096 struct wmi_tpc_ctl_pwr_fixed_params *tpc_ctl_pwr;
9097 struct wmi_tpc_stats_arg *tpc_stats = data;
9098 struct wmi_tpc_config_params *tpc_config;
9099 int ret = 0;
9100
9101 if (!tpc_stats) {
9102 ath12k_warn(ab, "tpc stats memory unavailable\n");
9103 return -EINVAL;
9104 }
9105
9106 switch (tag) {
9107 case WMI_TAG_TPC_STATS_CONFIG_EVENT:
9108 tpc_config = (struct wmi_tpc_config_params *)ptr;
9109 memcpy(&tpc_stats->tpc_config, tpc_config,
9110 sizeof(struct wmi_tpc_config_params));
9111 break;
9112 case WMI_TAG_TPC_STATS_REG_PWR_ALLOWED:
9113 tpc_reg_pwr = (struct wmi_max_reg_power_fixed_params *)ptr;
9114 ret = ath12k_tpc_get_reg_pwr(ab, tpc_stats, tpc_reg_pwr);
9115 break;
9116 case WMI_TAG_TPC_STATS_RATES_ARRAY:
9117 tpc_rates_array = (struct wmi_tpc_rates_array_fixed_params *)ptr;
9118 ret = ath12k_tpc_get_rate_array(ab, tpc_stats, tpc_rates_array);
9119 break;
9120 case WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT:
9121 tpc_ctl_pwr = (struct wmi_tpc_ctl_pwr_fixed_params *)ptr;
9122 ret = ath12k_tpc_get_ctl_pwr_tbl(ab, tpc_stats, tpc_ctl_pwr);
9123 break;
9124 default:
9125 ath12k_warn(ab,
9126 "Received invalid tag for tpc stats in subtlvs\n");
9127 return -EINVAL;
9128 }
9129 return ret;
9130 }
9131
ath12k_wmi_tpc_stats_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9132 static int ath12k_wmi_tpc_stats_event_parser(struct ath12k_base *ab,
9133 u16 tag, u16 len,
9134 const void *ptr, void *data)
9135 {
9136 struct wmi_tpc_stats_arg *tpc_stats = (struct wmi_tpc_stats_arg *)data;
9137 int ret;
9138
9139 switch (tag) {
9140 case WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM:
9141 ret = 0;
9142 /* Fixed param is already processed*/
9143 break;
9144 case WMI_TAG_ARRAY_STRUCT:
9145 /* len 0 is expected for array of struct when there
9146 * is no content of that type to pack inside that tlv
9147 */
9148 if (len == 0)
9149 return 0;
9150 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
9151 ath12k_wmi_tpc_stats_subtlv_parser,
9152 tpc_stats);
9153 break;
9154 case WMI_TAG_ARRAY_INT16:
9155 if (len == 0)
9156 return 0;
9157 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9158 WMI_TAG_ARRAY_INT16,
9159 len, tpc_stats);
9160 break;
9161 case WMI_TAG_ARRAY_BYTE:
9162 if (len == 0)
9163 return 0;
9164 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9165 WMI_TAG_ARRAY_BYTE,
9166 len, tpc_stats);
9167 break;
9168 default:
9169 ath12k_warn(ab, "Received invalid tag for tpc stats\n");
9170 ret = -EINVAL;
9171 break;
9172 }
9173 return ret;
9174 }
9175
ath12k_wmi_free_tpc_stats_mem(struct ath12k * ar)9176 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar)
9177 {
9178 struct wmi_tpc_stats_arg *tpc_stats = ar->debug.tpc_stats;
9179
9180 lockdep_assert_held(&ar->data_lock);
9181 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc stats mem free\n");
9182 if (tpc_stats) {
9183 kfree(tpc_stats->max_reg_allowed_power.reg_pwr_array);
9184 kfree(tpc_stats->rates_array1.rate_array);
9185 kfree(tpc_stats->rates_array2.rate_array);
9186 kfree(tpc_stats->ctl_array.ctl_pwr_table);
9187 kfree(tpc_stats);
9188 ar->debug.tpc_stats = NULL;
9189 }
9190 }
9191
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)9192 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
9193 struct sk_buff *skb)
9194 {
9195 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *fixed_param;
9196 struct wmi_tpc_stats_arg *tpc_stats;
9197 const struct wmi_tlv *tlv;
9198 void *ptr = skb->data;
9199 struct ath12k *ar;
9200 u16 tlv_tag;
9201 u32 event_count;
9202 int ret;
9203
9204 if (!skb->data) {
9205 ath12k_warn(ab, "No data present in tpc stats event\n");
9206 return;
9207 }
9208
9209 if (skb->len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
9210 ath12k_warn(ab, "TPC stats event size invalid\n");
9211 return;
9212 }
9213
9214 tlv = (struct wmi_tlv *)ptr;
9215 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
9216 ptr += sizeof(*tlv);
9217
9218 if (tlv_tag != WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM) {
9219 ath12k_warn(ab, "TPC stats without fixed param tlv at start\n");
9220 return;
9221 }
9222
9223 fixed_param = (struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *)ptr;
9224 rcu_read_lock();
9225 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(fixed_param->pdev_id) + 1);
9226 if (!ar) {
9227 ath12k_warn(ab, "Failed to get ar for tpc stats\n");
9228 rcu_read_unlock();
9229 return;
9230 }
9231 spin_lock_bh(&ar->data_lock);
9232 if (!ar->debug.tpc_request) {
9233 /* Event is received either without request or the
9234 * timeout, if memory is already allocated free it
9235 */
9236 if (ar->debug.tpc_stats) {
9237 ath12k_warn(ab, "Freeing memory for tpc_stats\n");
9238 ath12k_wmi_free_tpc_stats_mem(ar);
9239 }
9240 goto unlock;
9241 }
9242
9243 event_count = le32_to_cpu(fixed_param->event_count);
9244 if (event_count == 0) {
9245 if (ar->debug.tpc_stats) {
9246 ath12k_warn(ab,
9247 "Invalid tpc memory present\n");
9248 goto unlock;
9249 }
9250 ar->debug.tpc_stats =
9251 kzalloc(sizeof(struct wmi_tpc_stats_arg),
9252 GFP_ATOMIC);
9253 if (!ar->debug.tpc_stats) {
9254 ath12k_warn(ab,
9255 "Failed to allocate memory for tpc stats\n");
9256 goto unlock;
9257 }
9258 }
9259
9260 tpc_stats = ar->debug.tpc_stats;
9261 if (!tpc_stats) {
9262 ath12k_warn(ab, "tpc stats memory unavailable\n");
9263 goto unlock;
9264 }
9265
9266 if (!(event_count == 0)) {
9267 if (event_count != tpc_stats->event_count + 1) {
9268 ath12k_warn(ab,
9269 "Invalid tpc event received\n");
9270 goto unlock;
9271 }
9272 }
9273 tpc_stats->pdev_id = le32_to_cpu(fixed_param->pdev_id);
9274 tpc_stats->end_of_event = le32_to_cpu(fixed_param->end_of_event);
9275 tpc_stats->event_count = le32_to_cpu(fixed_param->event_count);
9276 ath12k_dbg(ab, ATH12K_DBG_WMI,
9277 "tpc stats event_count %d\n",
9278 tpc_stats->event_count);
9279 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
9280 ath12k_wmi_tpc_stats_event_parser,
9281 tpc_stats);
9282 if (ret) {
9283 ath12k_wmi_free_tpc_stats_mem(ar);
9284 ath12k_warn(ab, "failed to parse tpc_stats tlv: %d\n", ret);
9285 goto unlock;
9286 }
9287
9288 if (tpc_stats->end_of_event)
9289 complete(&ar->debug.tpc_complete);
9290
9291 unlock:
9292 spin_unlock_bh(&ar->data_lock);
9293 rcu_read_unlock();
9294 }
9295 #else
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)9296 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
9297 struct sk_buff *skb)
9298 {
9299 }
9300 #endif
9301
ath12k_wmi_op_rx(struct ath12k_base * ab,struct sk_buff * skb)9302 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
9303 {
9304 struct wmi_cmd_hdr *cmd_hdr;
9305 enum wmi_tlv_event_id id;
9306
9307 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
9308 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID);
9309
9310 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
9311 goto out;
9312
9313 switch (id) {
9314 /* Process all the WMI events here */
9315 case WMI_SERVICE_READY_EVENTID:
9316 ath12k_service_ready_event(ab, skb);
9317 break;
9318 case WMI_SERVICE_READY_EXT_EVENTID:
9319 ath12k_service_ready_ext_event(ab, skb);
9320 break;
9321 case WMI_SERVICE_READY_EXT2_EVENTID:
9322 ath12k_service_ready_ext2_event(ab, skb);
9323 break;
9324 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
9325 ath12k_reg_chan_list_event(ab, skb);
9326 break;
9327 case WMI_READY_EVENTID:
9328 ath12k_ready_event(ab, skb);
9329 break;
9330 case WMI_PEER_DELETE_RESP_EVENTID:
9331 ath12k_peer_delete_resp_event(ab, skb);
9332 break;
9333 case WMI_VDEV_START_RESP_EVENTID:
9334 ath12k_vdev_start_resp_event(ab, skb);
9335 break;
9336 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID:
9337 ath12k_bcn_tx_status_event(ab, skb);
9338 break;
9339 case WMI_VDEV_STOPPED_EVENTID:
9340 ath12k_vdev_stopped_event(ab, skb);
9341 break;
9342 case WMI_MGMT_RX_EVENTID:
9343 ath12k_mgmt_rx_event(ab, skb);
9344 /* mgmt_rx_event() owns the skb now! */
9345 return;
9346 case WMI_MGMT_TX_COMPLETION_EVENTID:
9347 ath12k_mgmt_tx_compl_event(ab, skb);
9348 break;
9349 case WMI_SCAN_EVENTID:
9350 ath12k_scan_event(ab, skb);
9351 break;
9352 case WMI_PEER_STA_KICKOUT_EVENTID:
9353 ath12k_peer_sta_kickout_event(ab, skb);
9354 break;
9355 case WMI_ROAM_EVENTID:
9356 ath12k_roam_event(ab, skb);
9357 break;
9358 case WMI_CHAN_INFO_EVENTID:
9359 ath12k_chan_info_event(ab, skb);
9360 break;
9361 case WMI_PDEV_BSS_CHAN_INFO_EVENTID:
9362 ath12k_pdev_bss_chan_info_event(ab, skb);
9363 break;
9364 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
9365 ath12k_vdev_install_key_compl_event(ab, skb);
9366 break;
9367 case WMI_SERVICE_AVAILABLE_EVENTID:
9368 ath12k_service_available_event(ab, skb);
9369 break;
9370 case WMI_PEER_ASSOC_CONF_EVENTID:
9371 ath12k_peer_assoc_conf_event(ab, skb);
9372 break;
9373 case WMI_UPDATE_STATS_EVENTID:
9374 ath12k_update_stats_event(ab, skb);
9375 break;
9376 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID:
9377 ath12k_pdev_ctl_failsafe_check_event(ab, skb);
9378 break;
9379 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
9380 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb);
9381 break;
9382 case WMI_PDEV_TEMPERATURE_EVENTID:
9383 ath12k_wmi_pdev_temperature_event(ab, skb);
9384 break;
9385 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID:
9386 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb);
9387 break;
9388 case WMI_HOST_FILS_DISCOVERY_EVENTID:
9389 ath12k_fils_discovery_event(ab, skb);
9390 break;
9391 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
9392 ath12k_probe_resp_tx_status_event(ab, skb);
9393 break;
9394 case WMI_RFKILL_STATE_CHANGE_EVENTID:
9395 ath12k_rfkill_state_change_event(ab, skb);
9396 break;
9397 case WMI_TWT_ENABLE_EVENTID:
9398 ath12k_wmi_twt_enable_event(ab, skb);
9399 break;
9400 case WMI_TWT_DISABLE_EVENTID:
9401 ath12k_wmi_twt_disable_event(ab, skb);
9402 break;
9403 case WMI_P2P_NOA_EVENTID:
9404 ath12k_wmi_p2p_noa_event(ab, skb);
9405 break;
9406 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID:
9407 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb);
9408 break;
9409 case WMI_VDEV_DELETE_RESP_EVENTID:
9410 ath12k_vdev_delete_resp_event(ab, skb);
9411 break;
9412 case WMI_DIAG_EVENTID:
9413 ath12k_wmi_diag_event(ab, skb);
9414 break;
9415 case WMI_WOW_WAKEUP_HOST_EVENTID:
9416 ath12k_wmi_event_wow_wakeup_host(ab, skb);
9417 break;
9418 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
9419 ath12k_wmi_gtk_offload_status_event(ab, skb);
9420 break;
9421 case WMI_MLO_SETUP_COMPLETE_EVENTID:
9422 ath12k_wmi_event_mlo_setup_complete(ab, skb);
9423 break;
9424 case WMI_MLO_TEARDOWN_COMPLETE_EVENTID:
9425 ath12k_wmi_event_teardown_complete(ab, skb);
9426 break;
9427 case WMI_HALPHY_STATS_CTRL_PATH_EVENTID:
9428 ath12k_wmi_process_tpc_stats(ab, skb);
9429 break;
9430 case WMI_11D_NEW_COUNTRY_EVENTID:
9431 ath12k_reg_11d_new_cc_event(ab, skb);
9432 break;
9433 /* add Unsupported events (rare) here */
9434 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
9435 case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
9436 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID:
9437 ath12k_dbg(ab, ATH12K_DBG_WMI,
9438 "ignoring unsupported event 0x%x\n", id);
9439 break;
9440 /* add Unsupported events (frequent) here */
9441 case WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID:
9442 case WMI_MGMT_RX_FW_CONSUMED_EVENTID:
9443 case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID:
9444 /* debug might flood hence silently ignore (no-op) */
9445 break;
9446 case WMI_PDEV_UTF_EVENTID:
9447 if (test_bit(ATH12K_FLAG_FTM_SEGMENTED, &ab->dev_flags))
9448 ath12k_tm_wmi_event_segmented(ab, id, skb);
9449 else
9450 ath12k_tm_wmi_event_unsegmented(ab, id, skb);
9451 break;
9452 default:
9453 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
9454 break;
9455 }
9456
9457 out:
9458 dev_kfree_skb(skb);
9459 }
9460
ath12k_connect_pdev_htc_service(struct ath12k_base * ab,u32 pdev_idx)9461 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab,
9462 u32 pdev_idx)
9463 {
9464 int status;
9465 static const u32 svc_id[] = {
9466 ATH12K_HTC_SVC_ID_WMI_CONTROL,
9467 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1,
9468 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2
9469 };
9470 struct ath12k_htc_svc_conn_req conn_req = {};
9471 struct ath12k_htc_svc_conn_resp conn_resp = {};
9472
9473 /* these fields are the same for all service endpoints */
9474 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete;
9475 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx;
9476 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits;
9477
9478 /* connect to control service */
9479 conn_req.service_id = svc_id[pdev_idx];
9480
9481 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp);
9482 if (status) {
9483 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n",
9484 status);
9485 return status;
9486 }
9487
9488 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
9489 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
9490 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
9491
9492 return 0;
9493 }
9494
9495 static int
ath12k_wmi_send_unit_test_cmd(struct ath12k * ar,struct wmi_unit_test_cmd ut_cmd,u32 * test_args)9496 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar,
9497 struct wmi_unit_test_cmd ut_cmd,
9498 u32 *test_args)
9499 {
9500 struct ath12k_wmi_pdev *wmi = ar->wmi;
9501 struct wmi_unit_test_cmd *cmd;
9502 struct sk_buff *skb;
9503 struct wmi_tlv *tlv;
9504 void *ptr;
9505 u32 *ut_cmd_args;
9506 int buf_len, arg_len;
9507 int ret;
9508 int i;
9509
9510 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args);
9511 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE;
9512
9513 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
9514 if (!skb)
9515 return -ENOMEM;
9516
9517 cmd = (struct wmi_unit_test_cmd *)skb->data;
9518 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD,
9519 sizeof(ut_cmd));
9520
9521 cmd->vdev_id = ut_cmd.vdev_id;
9522 cmd->module_id = ut_cmd.module_id;
9523 cmd->num_args = ut_cmd.num_args;
9524 cmd->diag_token = ut_cmd.diag_token;
9525
9526 ptr = skb->data + sizeof(ut_cmd);
9527
9528 tlv = ptr;
9529 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
9530
9531 ptr += TLV_HDR_SIZE;
9532
9533 ut_cmd_args = ptr;
9534 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++)
9535 ut_cmd_args[i] = test_args[i];
9536
9537 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
9538 "WMI unit test : module %d vdev %d n_args %d token %d\n",
9539 cmd->module_id, cmd->vdev_id, cmd->num_args,
9540 cmd->diag_token);
9541
9542 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID);
9543
9544 if (ret) {
9545 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n",
9546 ret);
9547 dev_kfree_skb(skb);
9548 }
9549
9550 return ret;
9551 }
9552
ath12k_wmi_simulate_radar(struct ath12k * ar)9553 int ath12k_wmi_simulate_radar(struct ath12k *ar)
9554 {
9555 struct ath12k_link_vif *arvif;
9556 u32 dfs_args[DFS_MAX_TEST_ARGS];
9557 struct wmi_unit_test_cmd wmi_ut;
9558 bool arvif_found = false;
9559
9560 list_for_each_entry(arvif, &ar->arvifs, list) {
9561 if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) {
9562 arvif_found = true;
9563 break;
9564 }
9565 }
9566
9567 if (!arvif_found)
9568 return -EINVAL;
9569
9570 dfs_args[DFS_TEST_CMDID] = 0;
9571 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id;
9572 /* Currently we could pass segment_id(b0 - b1), chirp(b2)
9573 * freq offset (b3 - b10) to unit test. For simulation
9574 * purpose this can be set to 0 which is valid.
9575 */
9576 dfs_args[DFS_TEST_RADAR_PARAM] = 0;
9577
9578 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id);
9579 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE);
9580 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS);
9581 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN);
9582
9583 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n");
9584
9585 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args);
9586 }
9587
ath12k_wmi_send_tpc_stats_request(struct ath12k * ar,enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)9588 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar,
9589 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)
9590 {
9591 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *cmd;
9592 struct ath12k_wmi_pdev *wmi = ar->wmi;
9593 struct sk_buff *skb;
9594 struct wmi_tlv *tlv;
9595 __le32 *pdev_id;
9596 u32 buf_len;
9597 void *ptr;
9598 int ret;
9599
9600 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(u32) + TLV_HDR_SIZE + TLV_HDR_SIZE;
9601
9602 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
9603 if (!skb)
9604 return -ENOMEM;
9605 cmd = (struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *)skb->data;
9606 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM,
9607 sizeof(*cmd));
9608
9609 cmd->stats_id_mask = cpu_to_le32(WMI_REQ_CTRL_PATH_PDEV_TX_STAT);
9610 cmd->action = cpu_to_le32(WMI_REQUEST_CTRL_PATH_STAT_GET);
9611 cmd->subid = cpu_to_le32(tpc_stats_type);
9612
9613 ptr = skb->data + sizeof(*cmd);
9614
9615 /* The below TLV arrays optionally follow this fixed param TLV structure
9616 * 1. ARRAY_UINT32 pdev_ids[]
9617 * If this array is present and non-zero length, stats should only
9618 * be provided from the pdevs identified in the array.
9619 * 2. ARRAY_UNIT32 vdev_ids[]
9620 * If this array is present and non-zero length, stats should only
9621 * be provided from the vdevs identified in the array.
9622 * 3. ath12k_wmi_mac_addr_params peer_macaddr[];
9623 * If this array is present and non-zero length, stats should only
9624 * be provided from the peers with the MAC addresses specified
9625 * in the array
9626 */
9627 tlv = ptr;
9628 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
9629 ptr += TLV_HDR_SIZE;
9630
9631 pdev_id = ptr;
9632 *pdev_id = cpu_to_le32(ath12k_mac_get_target_pdev_id(ar));
9633 ptr += sizeof(*pdev_id);
9634
9635 tlv = ptr;
9636 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
9637 ptr += TLV_HDR_SIZE;
9638
9639 tlv = ptr;
9640 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, 0);
9641 ptr += TLV_HDR_SIZE;
9642
9643 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID);
9644 if (ret) {
9645 ath12k_warn(ar->ab,
9646 "failed to submit WMI_REQUEST_STATS_CTRL_PATH_CMDID\n");
9647 dev_kfree_skb(skb);
9648 return ret;
9649 }
9650 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI get TPC STATS sent on pdev %d\n",
9651 ar->pdev->pdev_id);
9652
9653 return ret;
9654 }
9655
ath12k_wmi_connect(struct ath12k_base * ab)9656 int ath12k_wmi_connect(struct ath12k_base *ab)
9657 {
9658 u32 i;
9659 u8 wmi_ep_count;
9660
9661 wmi_ep_count = ab->htc.wmi_ep_count;
9662 if (wmi_ep_count > ab->hw_params->max_radios)
9663 return -1;
9664
9665 for (i = 0; i < wmi_ep_count; i++)
9666 ath12k_connect_pdev_htc_service(ab, i);
9667
9668 return 0;
9669 }
9670
ath12k_wmi_pdev_detach(struct ath12k_base * ab,u8 pdev_id)9671 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id)
9672 {
9673 if (WARN_ON(pdev_id >= MAX_RADIOS))
9674 return;
9675
9676 /* TODO: Deinit any pdev specific wmi resource */
9677 }
9678
ath12k_wmi_pdev_attach(struct ath12k_base * ab,u8 pdev_id)9679 int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
9680 u8 pdev_id)
9681 {
9682 struct ath12k_wmi_pdev *wmi_handle;
9683
9684 if (pdev_id >= ab->hw_params->max_radios)
9685 return -EINVAL;
9686
9687 wmi_handle = &ab->wmi_ab.wmi[pdev_id];
9688
9689 wmi_handle->wmi_ab = &ab->wmi_ab;
9690
9691 ab->wmi_ab.ab = ab;
9692 /* TODO: Init remaining resource specific to pdev */
9693
9694 return 0;
9695 }
9696
ath12k_wmi_attach(struct ath12k_base * ab)9697 int ath12k_wmi_attach(struct ath12k_base *ab)
9698 {
9699 int ret;
9700
9701 ret = ath12k_wmi_pdev_attach(ab, 0);
9702 if (ret)
9703 return ret;
9704
9705 ab->wmi_ab.ab = ab;
9706 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
9707
9708 /* It's overwritten when service_ext_ready is handled */
9709 if (ab->hw_params->single_pdev_only)
9710 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
9711
9712 /* TODO: Init remaining wmi soc resources required */
9713 init_completion(&ab->wmi_ab.service_ready);
9714 init_completion(&ab->wmi_ab.unified_ready);
9715
9716 return 0;
9717 }
9718
ath12k_wmi_detach(struct ath12k_base * ab)9719 void ath12k_wmi_detach(struct ath12k_base *ab)
9720 {
9721 int i;
9722
9723 /* TODO: Deinit wmi resource specific to SOC as required */
9724
9725 for (i = 0; i < ab->htc.wmi_ep_count; i++)
9726 ath12k_wmi_pdev_detach(ab, i);
9727
9728 ath12k_wmi_free_dbring_caps(ab);
9729 }
9730
ath12k_wmi_hw_data_filter_cmd(struct ath12k * ar,struct wmi_hw_data_filter_arg * arg)9731 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg)
9732 {
9733 struct wmi_hw_data_filter_cmd *cmd;
9734 struct sk_buff *skb;
9735 int len;
9736
9737 len = sizeof(*cmd);
9738 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
9739
9740 if (!skb)
9741 return -ENOMEM;
9742
9743 cmd = (struct wmi_hw_data_filter_cmd *)skb->data;
9744 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD,
9745 sizeof(*cmd));
9746 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
9747 cmd->enable = cpu_to_le32(arg->enable ? 1 : 0);
9748
9749 /* Set all modes in case of disable */
9750 if (arg->enable)
9751 cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap);
9752 else
9753 cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U);
9754
9755 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
9756 "wmi hw data filter enable %d filter_bitmap 0x%x\n",
9757 arg->enable, arg->hw_filter_bitmap);
9758
9759 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID);
9760 }
9761
ath12k_wmi_wow_host_wakeup_ind(struct ath12k * ar)9762 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar)
9763 {
9764 struct wmi_wow_host_wakeup_cmd *cmd;
9765 struct sk_buff *skb;
9766 size_t len;
9767
9768 len = sizeof(*cmd);
9769 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
9770 if (!skb)
9771 return -ENOMEM;
9772
9773 cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data;
9774 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
9775 sizeof(*cmd));
9776
9777 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n");
9778
9779 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID);
9780 }
9781
ath12k_wmi_wow_enable(struct ath12k * ar)9782 int ath12k_wmi_wow_enable(struct ath12k *ar)
9783 {
9784 struct wmi_wow_enable_cmd *cmd;
9785 struct sk_buff *skb;
9786 int len;
9787
9788 len = sizeof(*cmd);
9789 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
9790 if (!skb)
9791 return -ENOMEM;
9792
9793 cmd = (struct wmi_wow_enable_cmd *)skb->data;
9794 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD,
9795 sizeof(*cmd));
9796
9797 cmd->enable = cpu_to_le32(1);
9798 cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED);
9799 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n");
9800
9801 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID);
9802 }
9803
ath12k_wmi_wow_add_wakeup_event(struct ath12k * ar,u32 vdev_id,enum wmi_wow_wakeup_event event,u32 enable)9804 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id,
9805 enum wmi_wow_wakeup_event event,
9806 u32 enable)
9807 {
9808 struct wmi_wow_add_del_event_cmd *cmd;
9809 struct sk_buff *skb;
9810 size_t len;
9811
9812 len = sizeof(*cmd);
9813 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
9814 if (!skb)
9815 return -ENOMEM;
9816
9817 cmd = (struct wmi_wow_add_del_event_cmd *)skb->data;
9818 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD,
9819 sizeof(*cmd));
9820 cmd->vdev_id = cpu_to_le32(vdev_id);
9821 cmd->is_add = cpu_to_le32(enable);
9822 cmd->event_bitmap = cpu_to_le32((1 << event));
9823
9824 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n",
9825 wow_wakeup_event(event), enable, vdev_id);
9826
9827 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID);
9828 }
9829
ath12k_wmi_wow_add_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id,const u8 * pattern,const u8 * mask,int pattern_len,int pattern_offset)9830 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id,
9831 const u8 *pattern, const u8 *mask,
9832 int pattern_len, int pattern_offset)
9833 {
9834 struct wmi_wow_add_pattern_cmd *cmd;
9835 struct wmi_wow_bitmap_pattern_params *bitmap;
9836 struct wmi_tlv *tlv;
9837 struct sk_buff *skb;
9838 void *ptr;
9839 size_t len;
9840
9841 len = sizeof(*cmd) +
9842 sizeof(*tlv) + /* array struct */
9843 sizeof(*bitmap) + /* bitmap */
9844 sizeof(*tlv) + /* empty ipv4 sync */
9845 sizeof(*tlv) + /* empty ipv6 sync */
9846 sizeof(*tlv) + /* empty magic */
9847 sizeof(*tlv) + /* empty info timeout */
9848 sizeof(*tlv) + sizeof(u32); /* ratelimit interval */
9849
9850 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
9851 if (!skb)
9852 return -ENOMEM;
9853
9854 /* cmd */
9855 ptr = skb->data;
9856 cmd = ptr;
9857 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD,
9858 sizeof(*cmd));
9859 cmd->vdev_id = cpu_to_le32(vdev_id);
9860 cmd->pattern_id = cpu_to_le32(pattern_id);
9861 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
9862
9863 ptr += sizeof(*cmd);
9864
9865 /* bitmap */
9866 tlv = ptr;
9867 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap));
9868
9869 ptr += sizeof(*tlv);
9870
9871 bitmap = ptr;
9872 bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T,
9873 sizeof(*bitmap));
9874 memcpy(bitmap->patternbuf, pattern, pattern_len);
9875 memcpy(bitmap->bitmaskbuf, mask, pattern_len);
9876 bitmap->pattern_offset = cpu_to_le32(pattern_offset);
9877 bitmap->pattern_len = cpu_to_le32(pattern_len);
9878 bitmap->bitmask_len = cpu_to_le32(pattern_len);
9879 bitmap->pattern_id = cpu_to_le32(pattern_id);
9880
9881 ptr += sizeof(*bitmap);
9882
9883 /* ipv4 sync */
9884 tlv = ptr;
9885 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
9886
9887 ptr += sizeof(*tlv);
9888
9889 /* ipv6 sync */
9890 tlv = ptr;
9891 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
9892
9893 ptr += sizeof(*tlv);
9894
9895 /* magic */
9896 tlv = ptr;
9897 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
9898
9899 ptr += sizeof(*tlv);
9900
9901 /* pattern info timeout */
9902 tlv = ptr;
9903 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
9904
9905 ptr += sizeof(*tlv);
9906
9907 /* ratelimit interval */
9908 tlv = ptr;
9909 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
9910
9911 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n",
9912 vdev_id, pattern_id, pattern_offset, pattern_len);
9913
9914 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ",
9915 bitmap->patternbuf, pattern_len);
9916 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ",
9917 bitmap->bitmaskbuf, pattern_len);
9918
9919 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID);
9920 }
9921
ath12k_wmi_wow_del_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id)9922 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id)
9923 {
9924 struct wmi_wow_del_pattern_cmd *cmd;
9925 struct sk_buff *skb;
9926 size_t len;
9927
9928 len = sizeof(*cmd);
9929 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
9930 if (!skb)
9931 return -ENOMEM;
9932
9933 cmd = (struct wmi_wow_del_pattern_cmd *)skb->data;
9934 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD,
9935 sizeof(*cmd));
9936 cmd->vdev_id = cpu_to_le32(vdev_id);
9937 cmd->pattern_id = cpu_to_le32(pattern_id);
9938 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
9939
9940 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n",
9941 vdev_id, pattern_id);
9942
9943 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID);
9944 }
9945
9946 static struct sk_buff *
ath12k_wmi_op_gen_config_pno_start(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno)9947 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id,
9948 struct wmi_pno_scan_req_arg *pno)
9949 {
9950 struct nlo_configured_params *nlo_list;
9951 size_t len, nlo_list_len, channel_list_len;
9952 struct wmi_wow_nlo_config_cmd *cmd;
9953 __le32 *channel_list;
9954 struct wmi_tlv *tlv;
9955 struct sk_buff *skb;
9956 void *ptr;
9957 u32 i;
9958
9959 len = sizeof(*cmd) +
9960 sizeof(*tlv) +
9961 /* TLV place holder for array of structures
9962 * nlo_configured_params(nlo_list)
9963 */
9964 sizeof(*tlv);
9965 /* TLV place holder for array of uint32 channel_list */
9966
9967 channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count;
9968 len += channel_list_len;
9969
9970 nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count;
9971 len += nlo_list_len;
9972
9973 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
9974 if (!skb)
9975 return ERR_PTR(-ENOMEM);
9976
9977 ptr = skb->data;
9978 cmd = ptr;
9979 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd));
9980
9981 cmd->vdev_id = cpu_to_le32(pno->vdev_id);
9982 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN);
9983
9984 /* current FW does not support min-max range for dwell time */
9985 cmd->active_dwell_time = cpu_to_le32(pno->active_max_time);
9986 cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time);
9987
9988 if (pno->do_passive_scan)
9989 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE);
9990
9991 cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period);
9992 cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period);
9993 cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles);
9994 cmd->delay_start_time = cpu_to_le32(pno->delay_start_time);
9995
9996 if (pno->enable_pno_scan_randomization) {
9997 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ |
9998 WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ);
9999 ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr);
10000 ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask);
10001 }
10002
10003 ptr += sizeof(*cmd);
10004
10005 /* nlo_configured_params(nlo_list) */
10006 cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count);
10007 tlv = ptr;
10008 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len);
10009
10010 ptr += sizeof(*tlv);
10011 nlo_list = ptr;
10012 for (i = 0; i < pno->uc_networks_count; i++) {
10013 tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header);
10014 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
10015 sizeof(*nlo_list));
10016
10017 nlo_list[i].ssid.valid = cpu_to_le32(1);
10018 nlo_list[i].ssid.ssid.ssid_len =
10019 cpu_to_le32(pno->a_networks[i].ssid.ssid_len);
10020 memcpy(nlo_list[i].ssid.ssid.ssid,
10021 pno->a_networks[i].ssid.ssid,
10022 le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len));
10023
10024 if (pno->a_networks[i].rssi_threshold &&
10025 pno->a_networks[i].rssi_threshold > -300) {
10026 nlo_list[i].rssi_cond.valid = cpu_to_le32(1);
10027 nlo_list[i].rssi_cond.rssi =
10028 cpu_to_le32(pno->a_networks[i].rssi_threshold);
10029 }
10030
10031 nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1);
10032 nlo_list[i].bcast_nw_type.bcast_nw_type =
10033 cpu_to_le32(pno->a_networks[i].bcast_nw_type);
10034 }
10035
10036 ptr += nlo_list_len;
10037 cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count);
10038 tlv = ptr;
10039 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len);
10040 ptr += sizeof(*tlv);
10041 channel_list = ptr;
10042
10043 for (i = 0; i < pno->a_networks[0].channel_count; i++)
10044 channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]);
10045
10046 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n",
10047 vdev_id);
10048
10049 return skb;
10050 }
10051
ath12k_wmi_op_gen_config_pno_stop(struct ath12k * ar,u32 vdev_id)10052 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar,
10053 u32 vdev_id)
10054 {
10055 struct wmi_wow_nlo_config_cmd *cmd;
10056 struct sk_buff *skb;
10057 size_t len;
10058
10059 len = sizeof(*cmd);
10060 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10061 if (!skb)
10062 return ERR_PTR(-ENOMEM);
10063
10064 cmd = (struct wmi_wow_nlo_config_cmd *)skb->data;
10065 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len);
10066
10067 cmd->vdev_id = cpu_to_le32(vdev_id);
10068 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP);
10069
10070 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10071 "wmi tlv stop pno config vdev_id %d\n", vdev_id);
10072 return skb;
10073 }
10074
ath12k_wmi_wow_config_pno(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno_scan)10075 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id,
10076 struct wmi_pno_scan_req_arg *pno_scan)
10077 {
10078 struct sk_buff *skb;
10079
10080 if (pno_scan->enable)
10081 skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan);
10082 else
10083 skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id);
10084
10085 if (IS_ERR_OR_NULL(skb))
10086 return -ENOMEM;
10087
10088 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID);
10089 }
10090
ath12k_wmi_fill_ns_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable,bool ext)10091 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar,
10092 struct wmi_arp_ns_offload_arg *offload,
10093 void **ptr,
10094 bool enable,
10095 bool ext)
10096 {
10097 struct wmi_ns_offload_params *ns;
10098 struct wmi_tlv *tlv;
10099 void *buf_ptr = *ptr;
10100 u32 ns_cnt, ns_ext_tuples;
10101 int i, max_offloads;
10102
10103 ns_cnt = offload->ipv6_count;
10104
10105 tlv = buf_ptr;
10106
10107 if (ext) {
10108 ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS;
10109 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10110 ns_ext_tuples * sizeof(*ns));
10111 i = WMI_MAX_NS_OFFLOADS;
10112 max_offloads = offload->ipv6_count;
10113 } else {
10114 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10115 WMI_MAX_NS_OFFLOADS * sizeof(*ns));
10116 i = 0;
10117 max_offloads = WMI_MAX_NS_OFFLOADS;
10118 }
10119
10120 buf_ptr += sizeof(*tlv);
10121
10122 for (; i < max_offloads; i++) {
10123 ns = buf_ptr;
10124 ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE,
10125 sizeof(*ns));
10126
10127 if (enable) {
10128 if (i < ns_cnt)
10129 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID);
10130
10131 memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16);
10132 memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16);
10133
10134 if (offload->ipv6_type[i])
10135 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST);
10136
10137 memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN);
10138
10139 if (!is_zero_ether_addr(ns->target_mac.addr))
10140 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID);
10141
10142 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10143 "wmi index %d ns_solicited %pI6 target %pI6",
10144 i, ns->solicitation_ipaddr,
10145 ns->target_ipaddr[0]);
10146 }
10147
10148 buf_ptr += sizeof(*ns);
10149 }
10150
10151 *ptr = buf_ptr;
10152 }
10153
ath12k_wmi_fill_arp_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable)10154 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar,
10155 struct wmi_arp_ns_offload_arg *offload,
10156 void **ptr,
10157 bool enable)
10158 {
10159 struct wmi_arp_offload_params *arp;
10160 struct wmi_tlv *tlv;
10161 void *buf_ptr = *ptr;
10162 int i;
10163
10164 /* fill arp tuple */
10165 tlv = buf_ptr;
10166 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10167 WMI_MAX_ARP_OFFLOADS * sizeof(*arp));
10168 buf_ptr += sizeof(*tlv);
10169
10170 for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) {
10171 arp = buf_ptr;
10172 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE,
10173 sizeof(*arp));
10174
10175 if (enable && i < offload->ipv4_count) {
10176 /* Copy the target ip addr and flags */
10177 arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID);
10178 memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4);
10179
10180 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4",
10181 arp->target_ipaddr);
10182 }
10183
10184 buf_ptr += sizeof(*arp);
10185 }
10186
10187 *ptr = buf_ptr;
10188 }
10189
ath12k_wmi_arp_ns_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,struct wmi_arp_ns_offload_arg * offload,bool enable)10190 int ath12k_wmi_arp_ns_offload(struct ath12k *ar,
10191 struct ath12k_link_vif *arvif,
10192 struct wmi_arp_ns_offload_arg *offload,
10193 bool enable)
10194 {
10195 struct wmi_set_arp_ns_offload_cmd *cmd;
10196 struct wmi_tlv *tlv;
10197 struct sk_buff *skb;
10198 void *buf_ptr;
10199 size_t len;
10200 u8 ns_cnt, ns_ext_tuples = 0;
10201
10202 ns_cnt = offload->ipv6_count;
10203
10204 len = sizeof(*cmd) +
10205 sizeof(*tlv) +
10206 WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) +
10207 sizeof(*tlv) +
10208 WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params);
10209
10210 if (ns_cnt > WMI_MAX_NS_OFFLOADS) {
10211 ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS;
10212 len += sizeof(*tlv) +
10213 ns_ext_tuples * sizeof(struct wmi_ns_offload_params);
10214 }
10215
10216 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10217 if (!skb)
10218 return -ENOMEM;
10219
10220 buf_ptr = skb->data;
10221 cmd = buf_ptr;
10222 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
10223 sizeof(*cmd));
10224 cmd->flags = cpu_to_le32(0);
10225 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
10226 cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples);
10227
10228 buf_ptr += sizeof(*cmd);
10229
10230 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0);
10231 ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable);
10232
10233 if (ns_ext_tuples)
10234 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1);
10235
10236 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID);
10237 }
10238
ath12k_wmi_gtk_rekey_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,bool enable)10239 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar,
10240 struct ath12k_link_vif *arvif, bool enable)
10241 {
10242 struct ath12k_rekey_data *rekey_data = &arvif->rekey_data;
10243 struct wmi_gtk_rekey_offload_cmd *cmd;
10244 struct sk_buff *skb;
10245 __le64 replay_ctr;
10246 int len;
10247
10248 len = sizeof(*cmd);
10249 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10250 if (!skb)
10251 return -ENOMEM;
10252
10253 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
10254 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
10255 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
10256
10257 if (enable) {
10258 cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE);
10259
10260 /* the length in rekey_data and cmd is equal */
10261 memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck));
10262 memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek));
10263
10264 replay_ctr = cpu_to_le64(rekey_data->replay_ctr);
10265 memcpy(cmd->replay_ctr, &replay_ctr,
10266 sizeof(replay_ctr));
10267 } else {
10268 cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE);
10269 }
10270
10271 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n",
10272 arvif->vdev_id, enable);
10273 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
10274 }
10275
ath12k_wmi_gtk_rekey_getinfo(struct ath12k * ar,struct ath12k_link_vif * arvif)10276 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar,
10277 struct ath12k_link_vif *arvif)
10278 {
10279 struct wmi_gtk_rekey_offload_cmd *cmd;
10280 struct sk_buff *skb;
10281 int len;
10282
10283 len = sizeof(*cmd);
10284 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10285 if (!skb)
10286 return -ENOMEM;
10287
10288 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
10289 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
10290 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
10291 cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE);
10292
10293 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n",
10294 arvif->vdev_id);
10295 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
10296 }
10297
ath12k_wmi_sta_keepalive(struct ath12k * ar,const struct wmi_sta_keepalive_arg * arg)10298 int ath12k_wmi_sta_keepalive(struct ath12k *ar,
10299 const struct wmi_sta_keepalive_arg *arg)
10300 {
10301 struct wmi_sta_keepalive_arp_resp_params *arp;
10302 struct ath12k_wmi_pdev *wmi = ar->wmi;
10303 struct wmi_sta_keepalive_cmd *cmd;
10304 struct sk_buff *skb;
10305 size_t len;
10306
10307 len = sizeof(*cmd) + sizeof(*arp);
10308 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10309 if (!skb)
10310 return -ENOMEM;
10311
10312 cmd = (struct wmi_sta_keepalive_cmd *)skb->data;
10313 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd));
10314 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
10315 cmd->enabled = cpu_to_le32(arg->enabled);
10316 cmd->interval = cpu_to_le32(arg->interval);
10317 cmd->method = cpu_to_le32(arg->method);
10318
10319 arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1);
10320 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
10321 sizeof(*arp));
10322 if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE ||
10323 arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) {
10324 arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr);
10325 arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr);
10326 ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr);
10327 }
10328
10329 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10330 "wmi sta keepalive vdev %d enabled %d method %d interval %d\n",
10331 arg->vdev_id, arg->enabled, arg->method, arg->interval);
10332
10333 return ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID);
10334 }
10335
ath12k_wmi_mlo_setup(struct ath12k * ar,struct wmi_mlo_setup_arg * mlo_params)10336 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params)
10337 {
10338 struct wmi_mlo_setup_cmd *cmd;
10339 struct ath12k_wmi_pdev *wmi = ar->wmi;
10340 u32 *partner_links, num_links;
10341 int i, ret, buf_len, arg_len;
10342 struct sk_buff *skb;
10343 struct wmi_tlv *tlv;
10344 void *ptr;
10345
10346 num_links = mlo_params->num_partner_links;
10347 arg_len = num_links * sizeof(u32);
10348 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + arg_len;
10349
10350 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
10351 if (!skb)
10352 return -ENOMEM;
10353
10354 cmd = (struct wmi_mlo_setup_cmd *)skb->data;
10355 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_SETUP_CMD,
10356 sizeof(*cmd));
10357 cmd->mld_group_id = mlo_params->group_id;
10358 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
10359 ptr = skb->data + sizeof(*cmd);
10360
10361 tlv = ptr;
10362 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
10363 ptr += TLV_HDR_SIZE;
10364
10365 partner_links = ptr;
10366 for (i = 0; i < num_links; i++)
10367 partner_links[i] = mlo_params->partner_link_id[i];
10368
10369 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_SETUP_CMDID);
10370 if (ret) {
10371 ath12k_warn(ar->ab, "failed to submit WMI_MLO_SETUP_CMDID command: %d\n",
10372 ret);
10373 dev_kfree_skb(skb);
10374 return ret;
10375 }
10376
10377 return 0;
10378 }
10379
ath12k_wmi_mlo_ready(struct ath12k * ar)10380 int ath12k_wmi_mlo_ready(struct ath12k *ar)
10381 {
10382 struct wmi_mlo_ready_cmd *cmd;
10383 struct ath12k_wmi_pdev *wmi = ar->wmi;
10384 struct sk_buff *skb;
10385 int ret, len;
10386
10387 len = sizeof(*cmd);
10388 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10389 if (!skb)
10390 return -ENOMEM;
10391
10392 cmd = (struct wmi_mlo_ready_cmd *)skb->data;
10393 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_READY_CMD,
10394 sizeof(*cmd));
10395 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
10396
10397 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_READY_CMDID);
10398 if (ret) {
10399 ath12k_warn(ar->ab, "failed to submit WMI_MLO_READY_CMDID command: %d\n",
10400 ret);
10401 dev_kfree_skb(skb);
10402 return ret;
10403 }
10404
10405 return 0;
10406 }
10407
ath12k_wmi_mlo_teardown(struct ath12k * ar)10408 int ath12k_wmi_mlo_teardown(struct ath12k *ar)
10409 {
10410 struct wmi_mlo_teardown_cmd *cmd;
10411 struct ath12k_wmi_pdev *wmi = ar->wmi;
10412 struct sk_buff *skb;
10413 int ret, len;
10414
10415 len = sizeof(*cmd);
10416 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10417 if (!skb)
10418 return -ENOMEM;
10419
10420 cmd = (struct wmi_mlo_teardown_cmd *)skb->data;
10421 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TEARDOWN_CMD,
10422 sizeof(*cmd));
10423 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
10424 cmd->reason_code = WMI_MLO_TEARDOWN_SSR_REASON;
10425
10426 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_TEARDOWN_CMDID);
10427 if (ret) {
10428 ath12k_warn(ar->ab, "failed to submit WMI MLO teardown command: %d\n",
10429 ret);
10430 dev_kfree_skb(skb);
10431 return ret;
10432 }
10433
10434 return 0;
10435 }
10436
ath12k_wmi_supports_6ghz_cc_ext(struct ath12k * ar)10437 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar)
10438 {
10439 return test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
10440 ar->ab->wmi_ab.svc_map) && ar->supports_6ghz;
10441 }
10442
ath12k_wmi_send_vdev_set_tpc_power(struct ath12k * ar,u32 vdev_id,struct ath12k_reg_tpc_power_info * param)10443 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar,
10444 u32 vdev_id,
10445 struct ath12k_reg_tpc_power_info *param)
10446 {
10447 struct wmi_vdev_set_tpc_power_cmd *cmd;
10448 struct ath12k_wmi_pdev *wmi = ar->wmi;
10449 struct wmi_vdev_ch_power_params *ch;
10450 int i, ret, len, array_len;
10451 struct sk_buff *skb;
10452 struct wmi_tlv *tlv;
10453 u8 *ptr;
10454
10455 array_len = sizeof(*ch) * param->num_pwr_levels;
10456 len = sizeof(*cmd) + TLV_HDR_SIZE + array_len;
10457
10458 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10459 if (!skb)
10460 return -ENOMEM;
10461
10462 ptr = skb->data;
10463
10464 cmd = (struct wmi_vdev_set_tpc_power_cmd *)ptr;
10465 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_TPC_POWER_CMD,
10466 sizeof(*cmd));
10467 cmd->vdev_id = cpu_to_le32(vdev_id);
10468 cmd->psd_power = cpu_to_le32(param->is_psd_power);
10469 cmd->eirp_power = cpu_to_le32(param->eirp_power);
10470 cmd->power_type_6ghz = cpu_to_le32(param->ap_power_type);
10471
10472 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10473 "tpc vdev id %d is psd power %d eirp power %d 6 ghz power type %d\n",
10474 vdev_id, param->is_psd_power, param->eirp_power, param->ap_power_type);
10475
10476 ptr += sizeof(*cmd);
10477 tlv = (struct wmi_tlv *)ptr;
10478 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, array_len);
10479
10480 ptr += TLV_HDR_SIZE;
10481 ch = (struct wmi_vdev_ch_power_params *)ptr;
10482
10483 for (i = 0; i < param->num_pwr_levels; i++, ch++) {
10484 ch->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CH_POWER_INFO,
10485 sizeof(*ch));
10486 ch->chan_cfreq = cpu_to_le32(param->chan_power_info[i].chan_cfreq);
10487 ch->tx_power = cpu_to_le32(param->chan_power_info[i].tx_power);
10488
10489 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc chan freq %d TX power %d\n",
10490 ch->chan_cfreq, ch->tx_power);
10491 }
10492
10493 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_TPC_POWER_CMDID);
10494 if (ret) {
10495 ath12k_warn(ar->ab, "failed to send WMI_VDEV_SET_TPC_POWER_CMDID\n");
10496 dev_kfree_skb(skb);
10497 return ret;
10498 }
10499
10500 return 0;
10501 }
10502
10503 static int
ath12k_wmi_fill_disallowed_bmap(struct ath12k_base * ab,struct wmi_disallowed_mlo_mode_bitmap_params * dislw_bmap,struct wmi_mlo_link_set_active_arg * arg)10504 ath12k_wmi_fill_disallowed_bmap(struct ath12k_base *ab,
10505 struct wmi_disallowed_mlo_mode_bitmap_params *dislw_bmap,
10506 struct wmi_mlo_link_set_active_arg *arg)
10507 {
10508 struct wmi_ml_disallow_mode_bmap_arg *dislw_bmap_arg;
10509 u8 i;
10510
10511 if (arg->num_disallow_mode_comb >
10512 ARRAY_SIZE(arg->disallow_bmap)) {
10513 ath12k_warn(ab, "invalid num_disallow_mode_comb: %d",
10514 arg->num_disallow_mode_comb);
10515 return -EINVAL;
10516 }
10517
10518 dislw_bmap_arg = &arg->disallow_bmap[0];
10519 for (i = 0; i < arg->num_disallow_mode_comb; i++) {
10520 dislw_bmap->tlv_header =
10521 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*dislw_bmap));
10522 dislw_bmap->disallowed_mode_bitmap =
10523 cpu_to_le32(dislw_bmap_arg->disallowed_mode);
10524 dislw_bmap->ieee_link_id_comb =
10525 le32_encode_bits(dislw_bmap_arg->ieee_link_id[0],
10526 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1) |
10527 le32_encode_bits(dislw_bmap_arg->ieee_link_id[1],
10528 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2) |
10529 le32_encode_bits(dislw_bmap_arg->ieee_link_id[2],
10530 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3) |
10531 le32_encode_bits(dislw_bmap_arg->ieee_link_id[3],
10532 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4);
10533
10534 ath12k_dbg(ab, ATH12K_DBG_WMI,
10535 "entry %d disallowed_mode %d ieee_link_id_comb 0x%x",
10536 i, dislw_bmap_arg->disallowed_mode,
10537 dislw_bmap_arg->ieee_link_id_comb);
10538 dislw_bmap++;
10539 dislw_bmap_arg++;
10540 }
10541
10542 return 0;
10543 }
10544
ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base * ab,struct wmi_mlo_link_set_active_arg * arg)10545 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab,
10546 struct wmi_mlo_link_set_active_arg *arg)
10547 {
10548 struct wmi_disallowed_mlo_mode_bitmap_params *disallowed_mode_bmap;
10549 struct wmi_mlo_set_active_link_number_params *link_num_param;
10550 u32 num_link_num_param = 0, num_vdev_bitmap = 0;
10551 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
10552 struct wmi_mlo_link_set_active_cmd *cmd;
10553 u32 num_inactive_vdev_bitmap = 0;
10554 u32 num_disallow_mode_comb = 0;
10555 struct wmi_tlv *tlv;
10556 struct sk_buff *skb;
10557 __le32 *vdev_bitmap;
10558 void *buf_ptr;
10559 int i, ret;
10560 u32 len;
10561
10562 if (!arg->num_vdev_bitmap && !arg->num_link_entry) {
10563 ath12k_warn(ab, "Invalid num_vdev_bitmap and num_link_entry");
10564 return -EINVAL;
10565 }
10566
10567 switch (arg->force_mode) {
10568 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM:
10569 case WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM:
10570 num_link_num_param = arg->num_link_entry;
10571 fallthrough;
10572 case WMI_MLO_LINK_FORCE_MODE_ACTIVE:
10573 case WMI_MLO_LINK_FORCE_MODE_INACTIVE:
10574 case WMI_MLO_LINK_FORCE_MODE_NO_FORCE:
10575 num_vdev_bitmap = arg->num_vdev_bitmap;
10576 break;
10577 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE:
10578 num_vdev_bitmap = arg->num_vdev_bitmap;
10579 num_inactive_vdev_bitmap = arg->num_inactive_vdev_bitmap;
10580 break;
10581 default:
10582 ath12k_warn(ab, "Invalid force mode: %u", arg->force_mode);
10583 return -EINVAL;
10584 }
10585
10586 num_disallow_mode_comb = arg->num_disallow_mode_comb;
10587 len = sizeof(*cmd) +
10588 TLV_HDR_SIZE + sizeof(*link_num_param) * num_link_num_param +
10589 TLV_HDR_SIZE + sizeof(*vdev_bitmap) * num_vdev_bitmap +
10590 TLV_HDR_SIZE + TLV_HDR_SIZE + TLV_HDR_SIZE +
10591 TLV_HDR_SIZE + sizeof(*disallowed_mode_bmap) * num_disallow_mode_comb;
10592 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE)
10593 len += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
10594
10595 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
10596 if (!skb)
10597 return -ENOMEM;
10598
10599 cmd = (struct wmi_mlo_link_set_active_cmd *)skb->data;
10600 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_LINK_SET_ACTIVE_CMD,
10601 sizeof(*cmd));
10602 cmd->force_mode = cpu_to_le32(arg->force_mode);
10603 cmd->reason = cpu_to_le32(arg->reason);
10604 ath12k_dbg(ab, ATH12K_DBG_WMI,
10605 "mode %d reason %d num_link_num_param %d num_vdev_bitmap %d inactive %d num_disallow_mode_comb %d",
10606 arg->force_mode, arg->reason, num_link_num_param,
10607 num_vdev_bitmap, num_inactive_vdev_bitmap,
10608 num_disallow_mode_comb);
10609
10610 buf_ptr = skb->data + sizeof(*cmd);
10611 tlv = buf_ptr;
10612 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10613 sizeof(*link_num_param) * num_link_num_param);
10614 buf_ptr += TLV_HDR_SIZE;
10615
10616 if (num_link_num_param) {
10617 cmd->ctrl_flags =
10618 le32_encode_bits(arg->ctrl_flags.dync_force_link_num ? 1 : 0,
10619 CRTL_F_DYNC_FORCE_LINK_NUM);
10620
10621 link_num_param = buf_ptr;
10622 for (i = 0; i < num_link_num_param; i++) {
10623 link_num_param->tlv_header =
10624 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*link_num_param));
10625 link_num_param->num_of_link =
10626 cpu_to_le32(arg->link_num[i].num_of_link);
10627 link_num_param->vdev_type =
10628 cpu_to_le32(arg->link_num[i].vdev_type);
10629 link_num_param->vdev_subtype =
10630 cpu_to_le32(arg->link_num[i].vdev_subtype);
10631 link_num_param->home_freq =
10632 cpu_to_le32(arg->link_num[i].home_freq);
10633 ath12k_dbg(ab, ATH12K_DBG_WMI,
10634 "entry %d num_of_link %d vdev type %d subtype %d freq %d control_flags %d",
10635 i, arg->link_num[i].num_of_link,
10636 arg->link_num[i].vdev_type,
10637 arg->link_num[i].vdev_subtype,
10638 arg->link_num[i].home_freq,
10639 __le32_to_cpu(cmd->ctrl_flags));
10640 link_num_param++;
10641 }
10642
10643 buf_ptr += sizeof(*link_num_param) * num_link_num_param;
10644 }
10645
10646 tlv = buf_ptr;
10647 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
10648 sizeof(*vdev_bitmap) * num_vdev_bitmap);
10649 buf_ptr += TLV_HDR_SIZE;
10650
10651 if (num_vdev_bitmap) {
10652 vdev_bitmap = buf_ptr;
10653 for (i = 0; i < num_vdev_bitmap; i++) {
10654 vdev_bitmap[i] = cpu_to_le32(arg->vdev_bitmap[i]);
10655 ath12k_dbg(ab, ATH12K_DBG_WMI, "entry %d vdev_id_bitmap 0x%x",
10656 i, arg->vdev_bitmap[i]);
10657 }
10658
10659 buf_ptr += sizeof(*vdev_bitmap) * num_vdev_bitmap;
10660 }
10661
10662 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) {
10663 tlv = buf_ptr;
10664 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
10665 sizeof(*vdev_bitmap) *
10666 num_inactive_vdev_bitmap);
10667 buf_ptr += TLV_HDR_SIZE;
10668
10669 if (num_inactive_vdev_bitmap) {
10670 vdev_bitmap = buf_ptr;
10671 for (i = 0; i < num_inactive_vdev_bitmap; i++) {
10672 vdev_bitmap[i] =
10673 cpu_to_le32(arg->inactive_vdev_bitmap[i]);
10674 ath12k_dbg(ab, ATH12K_DBG_WMI,
10675 "entry %d inactive_vdev_id_bitmap 0x%x",
10676 i, arg->inactive_vdev_bitmap[i]);
10677 }
10678
10679 buf_ptr += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
10680 }
10681 } else {
10682 /* add empty vdev bitmap2 tlv */
10683 tlv = buf_ptr;
10684 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10685 buf_ptr += TLV_HDR_SIZE;
10686 }
10687
10688 /* add empty ieee_link_id_bitmap tlv */
10689 tlv = buf_ptr;
10690 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10691 buf_ptr += TLV_HDR_SIZE;
10692
10693 /* add empty ieee_link_id_bitmap2 tlv */
10694 tlv = buf_ptr;
10695 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10696 buf_ptr += TLV_HDR_SIZE;
10697
10698 tlv = buf_ptr;
10699 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10700 sizeof(*disallowed_mode_bmap) *
10701 arg->num_disallow_mode_comb);
10702 buf_ptr += TLV_HDR_SIZE;
10703
10704 ret = ath12k_wmi_fill_disallowed_bmap(ab, buf_ptr, arg);
10705 if (ret)
10706 goto free_skb;
10707
10708 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_MLO_LINK_SET_ACTIVE_CMDID);
10709 if (ret) {
10710 ath12k_warn(ab,
10711 "failed to send WMI_MLO_LINK_SET_ACTIVE_CMDID: %d\n", ret);
10712 goto free_skb;
10713 }
10714
10715 ath12k_dbg(ab, ATH12K_DBG_WMI, "WMI mlo link set active cmd");
10716
10717 return ret;
10718
10719 free_skb:
10720 dev_kfree_skb(skb);
10721 return ret;
10722 }
10723