1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2023 Advanced Micro Devices, Inc */
3
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5
6 #include <linux/pci.h>
7
8 #include <linux/pds/pds_common.h>
9
10 #include "core.h"
11
12 MODULE_DESCRIPTION(PDSC_DRV_DESCRIPTION);
13 MODULE_AUTHOR("Advanced Micro Devices, Inc");
14 MODULE_LICENSE("GPL");
15
16 /* Supported devices */
17 static const struct pci_device_id pdsc_id_table[] = {
18 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_CORE_PF) },
19 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_VDPA_VF) },
20 { 0, } /* end of table */
21 };
22 MODULE_DEVICE_TABLE(pci, pdsc_id_table);
23
pdsc_wdtimer_cb(struct timer_list * t)24 static void pdsc_wdtimer_cb(struct timer_list *t)
25 {
26 struct pdsc *pdsc = timer_container_of(pdsc, t, wdtimer);
27
28 dev_dbg(pdsc->dev, "%s: jiffies %ld\n", __func__, jiffies);
29 mod_timer(&pdsc->wdtimer,
30 round_jiffies(jiffies + pdsc->wdtimer_period));
31
32 queue_work(pdsc->wq, &pdsc->health_work);
33 }
34
pdsc_unmap_bars(struct pdsc * pdsc)35 static void pdsc_unmap_bars(struct pdsc *pdsc)
36 {
37 struct pdsc_dev_bar *bars = pdsc->bars;
38 unsigned int i;
39
40 pdsc->info_regs = NULL;
41 pdsc->cmd_regs = NULL;
42 pdsc->intr_status = NULL;
43 pdsc->intr_ctrl = NULL;
44
45 for (i = 0; i < PDS_CORE_BARS_MAX; i++) {
46 if (bars[i].vaddr)
47 pci_iounmap(pdsc->pdev, bars[i].vaddr);
48 bars[i].vaddr = NULL;
49 }
50 }
51
pdsc_map_bars(struct pdsc * pdsc)52 static int pdsc_map_bars(struct pdsc *pdsc)
53 {
54 struct pdsc_dev_bar *bar = pdsc->bars;
55 struct pci_dev *pdev = pdsc->pdev;
56 struct device *dev = pdsc->dev;
57 struct pdsc_dev_bar *bars;
58 unsigned int i, j;
59 int num_bars = 0;
60 int err;
61 u32 sig;
62
63 bars = pdsc->bars;
64
65 /* Since the PCI interface in the hardware is configurable,
66 * we need to poke into all the bars to find the set we're
67 * expecting.
68 */
69 for (i = 0, j = 0; i < PDS_CORE_BARS_MAX; i++) {
70 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
71 continue;
72
73 bars[j].len = pci_resource_len(pdev, i);
74 bars[j].bus_addr = pci_resource_start(pdev, i);
75 bars[j].res_index = i;
76
77 /* only map the whole bar 0 */
78 if (j > 0) {
79 bars[j].vaddr = NULL;
80 } else {
81 bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);
82 if (!bars[j].vaddr) {
83 dev_err(dev, "Cannot map BAR %d, aborting\n", i);
84 return -ENODEV;
85 }
86 }
87
88 j++;
89 }
90 num_bars = j;
91
92 /* BAR0: dev_cmd and interrupts */
93 if (num_bars < 1) {
94 dev_err(dev, "No bars found\n");
95 err = -EFAULT;
96 goto err_out;
97 }
98
99 if (bar->len < PDS_CORE_BAR0_SIZE) {
100 dev_err(dev, "Resource bar size %lu too small\n", bar->len);
101 err = -EFAULT;
102 goto err_out;
103 }
104
105 pdsc->info_regs = bar->vaddr + PDS_CORE_BAR0_DEV_INFO_REGS_OFFSET;
106 pdsc->cmd_regs = bar->vaddr + PDS_CORE_BAR0_DEV_CMD_REGS_OFFSET;
107 pdsc->intr_status = bar->vaddr + PDS_CORE_BAR0_INTR_STATUS_OFFSET;
108 pdsc->intr_ctrl = bar->vaddr + PDS_CORE_BAR0_INTR_CTRL_OFFSET;
109
110 sig = ioread32(&pdsc->info_regs->signature);
111 if (sig != PDS_CORE_DEV_INFO_SIGNATURE) {
112 dev_err(dev, "Incompatible firmware signature %x", sig);
113 err = -EFAULT;
114 goto err_out;
115 }
116
117 /* BAR1: doorbells */
118 bar++;
119 if (num_bars < 2) {
120 dev_err(dev, "Doorbell bar missing\n");
121 err = -EFAULT;
122 goto err_out;
123 }
124
125 pdsc->db_pages = bar->vaddr;
126 pdsc->phy_db_pages = bar->bus_addr;
127
128 return 0;
129
130 err_out:
131 pdsc_unmap_bars(pdsc);
132 return err;
133 }
134
pdsc_map_dbpage(struct pdsc * pdsc,int page_num)135 void __iomem *pdsc_map_dbpage(struct pdsc *pdsc, int page_num)
136 {
137 return pci_iomap_range(pdsc->pdev,
138 pdsc->bars[PDS_CORE_PCI_BAR_DBELL].res_index,
139 (u64)page_num << PAGE_SHIFT, PAGE_SIZE);
140 }
141
pdsc_sriov_configure(struct pci_dev * pdev,int num_vfs)142 static int pdsc_sriov_configure(struct pci_dev *pdev, int num_vfs)
143 {
144 struct pdsc *pdsc = pci_get_drvdata(pdev);
145 struct device *dev = pdsc->dev;
146 int ret = 0;
147
148 if (num_vfs > 0) {
149 pdsc->vfs = kzalloc_objs(struct pdsc_vf, num_vfs);
150 if (!pdsc->vfs)
151 return -ENOMEM;
152 pdsc->num_vfs = num_vfs;
153
154 ret = pci_enable_sriov(pdev, num_vfs);
155 if (ret) {
156 dev_err(dev, "Cannot enable SRIOV: %pe\n",
157 ERR_PTR(ret));
158 goto no_vfs;
159 }
160
161 return num_vfs;
162 }
163
164 no_vfs:
165 pci_disable_sriov(pdev);
166
167 kfree(pdsc->vfs);
168 pdsc->vfs = NULL;
169 pdsc->num_vfs = 0;
170
171 return ret;
172 }
173
pdsc_init_vf(struct pdsc * vf)174 static int pdsc_init_vf(struct pdsc *vf)
175 {
176 struct devlink *dl;
177 struct pdsc *pf;
178 int err;
179
180 pf = pdsc_get_pf_struct(vf->pdev);
181 if (IS_ERR_OR_NULL(pf))
182 return PTR_ERR(pf) ?: -1;
183
184 vf->vf_id = pci_iov_vf_id(vf->pdev);
185
186 dl = priv_to_devlink(vf);
187 devl_lock(dl);
188 devl_register(dl);
189 devl_unlock(dl);
190
191 pf->vfs[vf->vf_id].vf = vf;
192 err = pdsc_auxbus_dev_add(vf, pf, PDS_DEV_TYPE_VDPA,
193 &pf->vfs[vf->vf_id].padev);
194 if (err) {
195 devl_lock(dl);
196 devl_unregister(dl);
197 devl_unlock(dl);
198 }
199
200 return err;
201 }
202
203 static const struct devlink_health_reporter_ops pdsc_fw_reporter_ops = {
204 .name = "fw",
205 .diagnose = pdsc_fw_reporter_diagnose,
206 };
207
208 static const struct devlink_param pdsc_dl_params[] = {
209 DEVLINK_PARAM_GENERIC(ENABLE_VNET,
210 BIT(DEVLINK_PARAM_CMODE_RUNTIME),
211 pdsc_dl_enable_get,
212 pdsc_dl_enable_set,
213 pdsc_dl_enable_validate),
214 };
215
216 #define PDSC_WQ_NAME_LEN 24
217
pdsc_init_pf(struct pdsc * pdsc)218 static int pdsc_init_pf(struct pdsc *pdsc)
219 {
220 struct devlink_health_reporter *hr;
221 char wq_name[PDSC_WQ_NAME_LEN];
222 struct devlink *dl;
223 int err;
224
225 pcie_print_link_status(pdsc->pdev);
226
227 err = pci_request_regions(pdsc->pdev, PDS_CORE_DRV_NAME);
228 if (err) {
229 dev_err(pdsc->dev, "Cannot request PCI regions: %pe\n",
230 ERR_PTR(err));
231 return err;
232 }
233
234 err = pdsc_map_bars(pdsc);
235 if (err)
236 goto err_out_release_regions;
237
238 /* General workqueue and timer, but don't start timer yet */
239 snprintf(wq_name, sizeof(wq_name), "%s.%d", PDS_CORE_DRV_NAME, pdsc->uid);
240 pdsc->wq = create_singlethread_workqueue(wq_name);
241 INIT_WORK(&pdsc->health_work, pdsc_health_thread);
242 INIT_WORK(&pdsc->pci_reset_work, pdsc_pci_reset_thread);
243 timer_setup(&pdsc->wdtimer, pdsc_wdtimer_cb, 0);
244 pdsc->wdtimer_period = PDSC_WATCHDOG_SECS * HZ;
245
246 mutex_init(&pdsc->devcmd_lock);
247 mutex_init(&pdsc->config_lock);
248 spin_lock_init(&pdsc->adminq_lock);
249
250 mutex_lock(&pdsc->config_lock);
251 set_bit(PDSC_S_FW_DEAD, &pdsc->state);
252
253 err = pdsc_setup(pdsc, PDSC_SETUP_INIT);
254 if (err) {
255 mutex_unlock(&pdsc->config_lock);
256 goto err_out_unmap_bars;
257 }
258
259 err = pdsc_start(pdsc);
260 if (err) {
261 mutex_unlock(&pdsc->config_lock);
262 goto err_out_teardown;
263 }
264
265 mutex_unlock(&pdsc->config_lock);
266
267 err = pdsc_auxbus_dev_add(pdsc, pdsc, PDS_DEV_TYPE_FWCTL, &pdsc->padev);
268 if (err)
269 goto err_out_stop;
270
271 dl = priv_to_devlink(pdsc);
272 devl_lock(dl);
273 err = devl_params_register(dl, pdsc_dl_params,
274 ARRAY_SIZE(pdsc_dl_params));
275 if (err) {
276 devl_unlock(dl);
277 dev_warn(pdsc->dev, "Failed to register devlink params: %pe\n",
278 ERR_PTR(err));
279 goto err_out_del_dev;
280 }
281
282 hr = devl_health_reporter_create(dl, &pdsc_fw_reporter_ops, pdsc);
283 if (IS_ERR(hr)) {
284 devl_unlock(dl);
285 dev_warn(pdsc->dev, "Failed to create fw reporter: %pe\n", hr);
286 err = PTR_ERR(hr);
287 goto err_out_unreg_params;
288 }
289 pdsc->fw_reporter = hr;
290
291 devl_register(dl);
292 devl_unlock(dl);
293
294 /* Lastly, start the health check timer */
295 mod_timer(&pdsc->wdtimer, round_jiffies(jiffies + pdsc->wdtimer_period));
296
297 return 0;
298
299 err_out_unreg_params:
300 devlink_params_unregister(dl, pdsc_dl_params,
301 ARRAY_SIZE(pdsc_dl_params));
302 err_out_del_dev:
303 pdsc_auxbus_dev_del(pdsc, pdsc, &pdsc->padev);
304 err_out_stop:
305 pdsc_stop(pdsc);
306 err_out_teardown:
307 pdsc_teardown(pdsc, PDSC_TEARDOWN_REMOVING);
308 err_out_unmap_bars:
309 timer_shutdown_sync(&pdsc->wdtimer);
310 if (pdsc->wq)
311 destroy_workqueue(pdsc->wq);
312 mutex_destroy(&pdsc->config_lock);
313 mutex_destroy(&pdsc->devcmd_lock);
314 pci_free_irq_vectors(pdsc->pdev);
315 pdsc_unmap_bars(pdsc);
316 err_out_release_regions:
317 pci_release_regions(pdsc->pdev);
318
319 return err;
320 }
321
322 static const struct devlink_ops pdsc_dl_ops = {
323 .info_get = pdsc_dl_info_get,
324 .flash_update = pdsc_dl_flash_update,
325 };
326
327 static const struct devlink_ops pdsc_dl_vf_ops = {
328 };
329
330 static DEFINE_IDA(pdsc_ida);
331
pdsc_probe(struct pci_dev * pdev,const struct pci_device_id * ent)332 static int pdsc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
333 {
334 struct device *dev = &pdev->dev;
335 const struct devlink_ops *ops;
336 struct devlink *dl;
337 struct pdsc *pdsc;
338 bool is_pf;
339 int err;
340
341 is_pf = !pdev->is_virtfn;
342 ops = is_pf ? &pdsc_dl_ops : &pdsc_dl_vf_ops;
343 dl = devlink_alloc(ops, sizeof(struct pdsc), dev);
344 if (!dl)
345 return -ENOMEM;
346 pdsc = devlink_priv(dl);
347
348 pdsc->pdev = pdev;
349 pdsc->dev = &pdev->dev;
350 set_bit(PDSC_S_INITING_DRIVER, &pdsc->state);
351 pci_set_drvdata(pdev, pdsc);
352 pdsc_debugfs_add_dev(pdsc);
353
354 err = ida_alloc(&pdsc_ida, GFP_KERNEL);
355 if (err < 0) {
356 dev_err(pdsc->dev, "%s: id alloc failed: %pe\n",
357 __func__, ERR_PTR(err));
358 goto err_out_free_devlink;
359 }
360 pdsc->uid = err;
361
362 /* Query system for DMA addressing limitation for the device. */
363 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(PDS_CORE_ADDR_LEN));
364 if (err) {
365 dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting: %pe\n",
366 ERR_PTR(err));
367 goto err_out_free_ida;
368 }
369
370 err = pci_enable_device(pdev);
371 if (err) {
372 dev_err(dev, "Cannot enable PCI device: %pe\n", ERR_PTR(err));
373 goto err_out_free_ida;
374 }
375 pci_set_master(pdev);
376
377 if (is_pf)
378 err = pdsc_init_pf(pdsc);
379 else
380 err = pdsc_init_vf(pdsc);
381 if (err) {
382 dev_err(dev, "Cannot init device: %pe\n", ERR_PTR(err));
383 goto err_out_disable_device;
384 }
385
386 clear_bit(PDSC_S_INITING_DRIVER, &pdsc->state);
387 return 0;
388
389 err_out_disable_device:
390 pci_disable_device(pdev);
391 err_out_free_ida:
392 ida_free(&pdsc_ida, pdsc->uid);
393 err_out_free_devlink:
394 pdsc_debugfs_del_dev(pdsc);
395 devlink_free(dl);
396
397 return err;
398 }
399
pdsc_remove(struct pci_dev * pdev)400 static void pdsc_remove(struct pci_dev *pdev)
401 {
402 struct pdsc *pdsc = pci_get_drvdata(pdev);
403 struct devlink *dl;
404
405 /* Unhook the registrations first to be sure there
406 * are no requests while we're stopping.
407 */
408 dl = priv_to_devlink(pdsc);
409 devl_lock(dl);
410 devl_unregister(dl);
411 if (!pdev->is_virtfn) {
412 if (pdsc->fw_reporter) {
413 devl_health_reporter_destroy(pdsc->fw_reporter);
414 pdsc->fw_reporter = NULL;
415 }
416 devl_params_unregister(dl, pdsc_dl_params,
417 ARRAY_SIZE(pdsc_dl_params));
418 }
419 devl_unlock(dl);
420
421 if (pdev->is_virtfn) {
422 struct pdsc *pf;
423
424 pf = pdsc_get_pf_struct(pdsc->pdev);
425 if (!IS_ERR(pf)) {
426 pdsc_auxbus_dev_del(pdsc, pf, &pf->vfs[pdsc->vf_id].padev);
427 pf->vfs[pdsc->vf_id].vf = NULL;
428 }
429 } else {
430 /* Remove the VFs and their aux_bus connections before other
431 * cleanup so that the clients can use the AdminQ to cleanly
432 * shut themselves down.
433 */
434 pdsc_sriov_configure(pdev, 0);
435 pdsc_auxbus_dev_del(pdsc, pdsc, &pdsc->padev);
436
437 timer_shutdown_sync(&pdsc->wdtimer);
438 if (pdsc->wq)
439 destroy_workqueue(pdsc->wq);
440
441 mutex_lock(&pdsc->config_lock);
442 set_bit(PDSC_S_STOPPING_DRIVER, &pdsc->state);
443
444 pdsc_stop(pdsc);
445 pdsc_teardown(pdsc, PDSC_TEARDOWN_REMOVING);
446 mutex_unlock(&pdsc->config_lock);
447 mutex_destroy(&pdsc->config_lock);
448 mutex_destroy(&pdsc->devcmd_lock);
449
450 pdsc_unmap_bars(pdsc);
451 pci_release_regions(pdev);
452 }
453
454 pci_disable_device(pdev);
455
456 ida_free(&pdsc_ida, pdsc->uid);
457 pdsc_debugfs_del_dev(pdsc);
458 devlink_free(dl);
459 }
460
pdsc_stop_health_thread(struct pdsc * pdsc)461 static void pdsc_stop_health_thread(struct pdsc *pdsc)
462 {
463 if (pdsc->pdev->is_virtfn)
464 return;
465
466 timer_shutdown_sync(&pdsc->wdtimer);
467 if (pdsc->health_work.func)
468 cancel_work_sync(&pdsc->health_work);
469 }
470
pdsc_restart_health_thread(struct pdsc * pdsc)471 static void pdsc_restart_health_thread(struct pdsc *pdsc)
472 {
473 if (pdsc->pdev->is_virtfn)
474 return;
475
476 timer_setup(&pdsc->wdtimer, pdsc_wdtimer_cb, 0);
477 mod_timer(&pdsc->wdtimer, jiffies + 1);
478 }
479
pdsc_reset_prepare(struct pci_dev * pdev)480 static void pdsc_reset_prepare(struct pci_dev *pdev)
481 {
482 struct pdsc *pdsc = pci_get_drvdata(pdev);
483
484 pdsc_stop_health_thread(pdsc);
485 pdsc_fw_down(pdsc);
486
487 if (pdev->is_virtfn) {
488 struct pdsc *pf;
489
490 pf = pdsc_get_pf_struct(pdsc->pdev);
491 if (!IS_ERR(pf))
492 pdsc_auxbus_dev_del(pdsc, pf,
493 &pf->vfs[pdsc->vf_id].padev);
494 } else {
495 pdsc_auxbus_dev_del(pdsc, pdsc, &pdsc->padev);
496 }
497
498 pdsc_unmap_bars(pdsc);
499 pci_release_regions(pdev);
500 if (pci_is_enabled(pdev))
501 pci_disable_device(pdev);
502 }
503
pdsc_reset_done(struct pci_dev * pdev)504 static void pdsc_reset_done(struct pci_dev *pdev)
505 {
506 struct pdsc *pdsc = pci_get_drvdata(pdev);
507 struct device *dev = pdsc->dev;
508 int err;
509
510 err = pci_enable_device(pdev);
511 if (err) {
512 dev_err(dev, "Cannot enable PCI device: %pe\n", ERR_PTR(err));
513 return;
514 }
515 pci_set_master(pdev);
516
517 if (!pdev->is_virtfn) {
518 pcie_print_link_status(pdsc->pdev);
519
520 err = pci_request_regions(pdsc->pdev, PDS_CORE_DRV_NAME);
521 if (err) {
522 dev_err(pdsc->dev, "Cannot request PCI regions: %pe\n",
523 ERR_PTR(err));
524 return;
525 }
526
527 err = pdsc_map_bars(pdsc);
528 if (err)
529 return;
530 }
531
532 pdsc_fw_up(pdsc);
533 pdsc_restart_health_thread(pdsc);
534
535 if (pdev->is_virtfn) {
536 struct pdsc *pf;
537
538 pf = pdsc_get_pf_struct(pdsc->pdev);
539 if (!IS_ERR(pf))
540 pdsc_auxbus_dev_add(pdsc, pf, PDS_DEV_TYPE_VDPA,
541 &pf->vfs[pdsc->vf_id].padev);
542 } else {
543 pdsc_auxbus_dev_add(pdsc, pdsc, PDS_DEV_TYPE_FWCTL,
544 &pdsc->padev);
545 }
546 }
547
pdsc_pci_error_detected(struct pci_dev * pdev,pci_channel_state_t error)548 static pci_ers_result_t pdsc_pci_error_detected(struct pci_dev *pdev,
549 pci_channel_state_t error)
550 {
551 if (error == pci_channel_io_frozen) {
552 pdsc_reset_prepare(pdev);
553 return PCI_ERS_RESULT_NEED_RESET;
554 }
555
556 return PCI_ERS_RESULT_NONE;
557 }
558
pdsc_pci_error_resume(struct pci_dev * pdev)559 static void pdsc_pci_error_resume(struct pci_dev *pdev)
560 {
561 struct pdsc *pdsc = pci_get_drvdata(pdev);
562
563 if (test_bit(PDSC_S_FW_DEAD, &pdsc->state))
564 pci_reset_function_locked(pdev);
565 }
566
567 static const struct pci_error_handlers pdsc_err_handler = {
568 /* FLR handling */
569 .reset_prepare = pdsc_reset_prepare,
570 .reset_done = pdsc_reset_done,
571
572 /* AER handling */
573 .error_detected = pdsc_pci_error_detected,
574 .resume = pdsc_pci_error_resume,
575 };
576
577 static struct pci_driver pdsc_driver = {
578 .name = PDS_CORE_DRV_NAME,
579 .id_table = pdsc_id_table,
580 .probe = pdsc_probe,
581 .remove = pdsc_remove,
582 .sriov_configure = pdsc_sriov_configure,
583 .err_handler = &pdsc_err_handler,
584 };
585
pdsc_get_pf_struct(struct pci_dev * vf_pdev)586 void *pdsc_get_pf_struct(struct pci_dev *vf_pdev)
587 {
588 return pci_iov_get_pf_drvdata(vf_pdev, &pdsc_driver);
589 }
590 EXPORT_SYMBOL_GPL(pdsc_get_pf_struct);
591
pdsc_init_module(void)592 static int __init pdsc_init_module(void)
593 {
594 if (strcmp(KBUILD_MODNAME, PDS_CORE_DRV_NAME))
595 return -EINVAL;
596
597 pdsc_debugfs_create();
598 return pci_register_driver(&pdsc_driver);
599 }
600
pdsc_cleanup_module(void)601 static void __exit pdsc_cleanup_module(void)
602 {
603 pci_unregister_driver(&pdsc_driver);
604 pdsc_debugfs_destroy();
605 }
606
607 module_init(pdsc_init_module);
608 module_exit(pdsc_cleanup_module);
609