1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
3
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5
6 #include <linux/module.h>
7 #include <linux/types.h>
8 #include <linux/init.h>
9 #include <linux/pci.h>
10 #include <linux/vmalloc.h>
11 #include <linux/pagemap.h>
12 #include <linux/delay.h>
13 #include <linux/netdevice.h>
14 #include <linux/interrupt.h>
15 #include <linux/tcp.h>
16 #include <linux/ipv6.h>
17 #include <linux/slab.h>
18 #include <net/checksum.h>
19 #include <net/ip6_checksum.h>
20 #include <linux/ethtool.h>
21 #include <linux/if_vlan.h>
22 #include <linux/cpu.h>
23 #include <linux/smp.h>
24 #include <linux/pm_qos.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/prefetch.h>
27 #include <linux/suspend.h>
28
29 #include "e1000.h"
30 #define CREATE_TRACE_POINTS
31 #include "e1000e_trace.h"
32
33 char e1000e_driver_name[] = "e1000e";
34
35 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
36 static int debug = -1;
37 module_param(debug, int, 0);
38 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
39
40 static const struct e1000_info *e1000_info_tbl[] = {
41 [board_82571] = &e1000_82571_info,
42 [board_82572] = &e1000_82572_info,
43 [board_82573] = &e1000_82573_info,
44 [board_82574] = &e1000_82574_info,
45 [board_82583] = &e1000_82583_info,
46 [board_80003es2lan] = &e1000_es2_info,
47 [board_ich8lan] = &e1000_ich8_info,
48 [board_ich9lan] = &e1000_ich9_info,
49 [board_ich10lan] = &e1000_ich10_info,
50 [board_pchlan] = &e1000_pch_info,
51 [board_pch2lan] = &e1000_pch2_info,
52 [board_pch_lpt] = &e1000_pch_lpt_info,
53 [board_pch_spt] = &e1000_pch_spt_info,
54 [board_pch_cnp] = &e1000_pch_cnp_info,
55 [board_pch_tgp] = &e1000_pch_tgp_info,
56 [board_pch_adp] = &e1000_pch_adp_info,
57 [board_pch_mtp] = &e1000_pch_mtp_info,
58 [board_pch_ptp] = &e1000_pch_ptp_info,
59 };
60
61 struct e1000_reg_info {
62 u32 ofs;
63 char *name;
64 };
65
66 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
67 /* General Registers */
68 {E1000_CTRL, "CTRL"},
69 {E1000_STATUS, "STATUS"},
70 {E1000_CTRL_EXT, "CTRL_EXT"},
71
72 /* Interrupt Registers */
73 {E1000_ICR, "ICR"},
74
75 /* Rx Registers */
76 {E1000_RCTL, "RCTL"},
77 {E1000_RDLEN(0), "RDLEN"},
78 {E1000_RDH(0), "RDH"},
79 {E1000_RDT(0), "RDT"},
80 {E1000_RDTR, "RDTR"},
81 {E1000_RXDCTL(0), "RXDCTL"},
82 {E1000_ERT, "ERT"},
83 {E1000_RDBAL(0), "RDBAL"},
84 {E1000_RDBAH(0), "RDBAH"},
85 {E1000_RDFH, "RDFH"},
86 {E1000_RDFT, "RDFT"},
87 {E1000_RDFHS, "RDFHS"},
88 {E1000_RDFTS, "RDFTS"},
89 {E1000_RDFPC, "RDFPC"},
90
91 /* Tx Registers */
92 {E1000_TCTL, "TCTL"},
93 {E1000_TDBAL(0), "TDBAL"},
94 {E1000_TDBAH(0), "TDBAH"},
95 {E1000_TDLEN(0), "TDLEN"},
96 {E1000_TDH(0), "TDH"},
97 {E1000_TDT(0), "TDT"},
98 {E1000_TIDV, "TIDV"},
99 {E1000_TXDCTL(0), "TXDCTL"},
100 {E1000_TADV, "TADV"},
101 {E1000_TARC(0), "TARC"},
102 {E1000_TDFH, "TDFH"},
103 {E1000_TDFT, "TDFT"},
104 {E1000_TDFHS, "TDFHS"},
105 {E1000_TDFTS, "TDFTS"},
106 {E1000_TDFPC, "TDFPC"},
107
108 /* List Terminator */
109 {0, NULL}
110 };
111
112 /**
113 * __ew32_prepare - prepare to write to MAC CSR register on certain parts
114 * @hw: pointer to the HW structure
115 *
116 * When updating the MAC CSR registers, the Manageability Engine (ME) could
117 * be accessing the registers at the same time. Normally, this is handled in
118 * h/w by an arbiter but on some parts there is a bug that acknowledges Host
119 * accesses later than it should which could result in the register to have
120 * an incorrect value. Workaround this by checking the FWSM register which
121 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
122 * and try again a number of times.
123 **/
__ew32_prepare(struct e1000_hw * hw)124 static void __ew32_prepare(struct e1000_hw *hw)
125 {
126 s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
127
128 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
129 udelay(50);
130 }
131
__ew32(struct e1000_hw * hw,unsigned long reg,u32 val)132 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
133 {
134 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
135 __ew32_prepare(hw);
136
137 writel(val, hw->hw_addr + reg);
138 }
139
140 /**
141 * e1000_regdump - register printout routine
142 * @hw: pointer to the HW structure
143 * @reginfo: pointer to the register info table
144 **/
e1000_regdump(struct e1000_hw * hw,struct e1000_reg_info * reginfo)145 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
146 {
147 int n = 0;
148 char rname[16];
149 u32 regs[8];
150
151 switch (reginfo->ofs) {
152 case E1000_RXDCTL(0):
153 for (n = 0; n < 2; n++)
154 regs[n] = __er32(hw, E1000_RXDCTL(n));
155 break;
156 case E1000_TXDCTL(0):
157 for (n = 0; n < 2; n++)
158 regs[n] = __er32(hw, E1000_TXDCTL(n));
159 break;
160 case E1000_TARC(0):
161 for (n = 0; n < 2; n++)
162 regs[n] = __er32(hw, E1000_TARC(n));
163 break;
164 default:
165 pr_info("%-15s %08x\n",
166 reginfo->name, __er32(hw, reginfo->ofs));
167 return;
168 }
169
170 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
171 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
172 }
173
e1000e_dump_ps_pages(struct e1000_adapter * adapter,struct e1000_buffer * bi)174 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
175 struct e1000_buffer *bi)
176 {
177 int i;
178 struct e1000_ps_page *ps_page;
179
180 for (i = 0; i < adapter->rx_ps_pages; i++) {
181 ps_page = &bi->ps_pages[i];
182
183 if (ps_page->page) {
184 pr_info("packet dump for ps_page %d:\n", i);
185 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
186 16, 1, page_address(ps_page->page),
187 PAGE_SIZE, true);
188 }
189 }
190 }
191
192 /**
193 * e1000e_dump - Print registers, Tx-ring and Rx-ring
194 * @adapter: board private structure
195 **/
e1000e_dump(struct e1000_adapter * adapter)196 static void e1000e_dump(struct e1000_adapter *adapter)
197 {
198 struct net_device *netdev = adapter->netdev;
199 struct e1000_hw *hw = &adapter->hw;
200 struct e1000_reg_info *reginfo;
201 struct e1000_ring *tx_ring = adapter->tx_ring;
202 struct e1000_tx_desc *tx_desc;
203 struct my_u0 {
204 __le64 a;
205 __le64 b;
206 } *u0;
207 struct e1000_buffer *buffer_info;
208 struct e1000_ring *rx_ring = adapter->rx_ring;
209 union e1000_rx_desc_packet_split *rx_desc_ps;
210 union e1000_rx_desc_extended *rx_desc;
211 struct my_u1 {
212 __le64 a;
213 __le64 b;
214 __le64 c;
215 __le64 d;
216 } *u1;
217 u32 staterr;
218 int i = 0;
219
220 if (!netif_msg_hw(adapter))
221 return;
222
223 /* Print netdevice Info */
224 if (netdev) {
225 dev_info(&adapter->pdev->dev, "Net device Info\n");
226 pr_info("Device Name state trans_start\n");
227 pr_info("%-15s %016lX %016lX\n", netdev->name,
228 netdev->state, dev_trans_start(netdev));
229 }
230
231 /* Print Registers */
232 dev_info(&adapter->pdev->dev, "Register Dump\n");
233 pr_info(" Register Name Value\n");
234 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
235 reginfo->name; reginfo++) {
236 e1000_regdump(hw, reginfo);
237 }
238
239 /* Print Tx Ring Summary */
240 if (!netdev || !netif_running(netdev))
241 return;
242
243 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
244 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
245 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
246 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
247 0, tx_ring->next_to_use, tx_ring->next_to_clean,
248 (unsigned long long)buffer_info->dma,
249 buffer_info->length,
250 buffer_info->next_to_watch,
251 (unsigned long long)buffer_info->time_stamp);
252
253 /* Print Tx Ring */
254 if (!netif_msg_tx_done(adapter))
255 goto rx_ring_summary;
256
257 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
258
259 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
260 *
261 * Legacy Transmit Descriptor
262 * +--------------------------------------------------------------+
263 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
264 * +--------------------------------------------------------------+
265 * 8 | Special | CSS | Status | CMD | CSO | Length |
266 * +--------------------------------------------------------------+
267 * 63 48 47 36 35 32 31 24 23 16 15 0
268 *
269 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
270 * 63 48 47 40 39 32 31 16 15 8 7 0
271 * +----------------------------------------------------------------+
272 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
273 * +----------------------------------------------------------------+
274 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
275 * +----------------------------------------------------------------+
276 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
277 *
278 * Extended Data Descriptor (DTYP=0x1)
279 * +----------------------------------------------------------------+
280 * 0 | Buffer Address [63:0] |
281 * +----------------------------------------------------------------+
282 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
283 * +----------------------------------------------------------------+
284 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
285 */
286 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
287 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
288 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
289 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
290 const char *next_desc;
291 tx_desc = E1000_TX_DESC(*tx_ring, i);
292 buffer_info = &tx_ring->buffer_info[i];
293 u0 = (struct my_u0 *)tx_desc;
294 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
295 next_desc = " NTC/U";
296 else if (i == tx_ring->next_to_use)
297 next_desc = " NTU";
298 else if (i == tx_ring->next_to_clean)
299 next_desc = " NTC";
300 else
301 next_desc = "";
302 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
303 (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
304 ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
305 i,
306 (unsigned long long)le64_to_cpu(u0->a),
307 (unsigned long long)le64_to_cpu(u0->b),
308 (unsigned long long)buffer_info->dma,
309 buffer_info->length, buffer_info->next_to_watch,
310 (unsigned long long)buffer_info->time_stamp,
311 buffer_info->skb, next_desc);
312
313 if (netif_msg_pktdata(adapter) && buffer_info->skb)
314 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
315 16, 1, buffer_info->skb->data,
316 buffer_info->skb->len, true);
317 }
318
319 /* Print Rx Ring Summary */
320 rx_ring_summary:
321 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
322 pr_info("Queue [NTU] [NTC]\n");
323 pr_info(" %5d %5X %5X\n",
324 0, rx_ring->next_to_use, rx_ring->next_to_clean);
325
326 /* Print Rx Ring */
327 if (!netif_msg_rx_status(adapter))
328 return;
329
330 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
331 switch (adapter->rx_ps_pages) {
332 case 1:
333 case 2:
334 case 3:
335 /* [Extended] Packet Split Receive Descriptor Format
336 *
337 * +-----------------------------------------------------+
338 * 0 | Buffer Address 0 [63:0] |
339 * +-----------------------------------------------------+
340 * 8 | Buffer Address 1 [63:0] |
341 * +-----------------------------------------------------+
342 * 16 | Buffer Address 2 [63:0] |
343 * +-----------------------------------------------------+
344 * 24 | Buffer Address 3 [63:0] |
345 * +-----------------------------------------------------+
346 */
347 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
348 /* [Extended] Receive Descriptor (Write-Back) Format
349 *
350 * 63 48 47 32 31 13 12 8 7 4 3 0
351 * +------------------------------------------------------+
352 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
353 * | Checksum | Ident | | Queue | | Type |
354 * +------------------------------------------------------+
355 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
356 * +------------------------------------------------------+
357 * 63 48 47 32 31 20 19 0
358 */
359 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
360 for (i = 0; i < rx_ring->count; i++) {
361 const char *next_desc;
362 buffer_info = &rx_ring->buffer_info[i];
363 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
364 u1 = (struct my_u1 *)rx_desc_ps;
365 staterr =
366 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
367
368 if (i == rx_ring->next_to_use)
369 next_desc = " NTU";
370 else if (i == rx_ring->next_to_clean)
371 next_desc = " NTC";
372 else
373 next_desc = "";
374
375 if (staterr & E1000_RXD_STAT_DD) {
376 /* Descriptor Done */
377 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
378 "RWB", i,
379 (unsigned long long)le64_to_cpu(u1->a),
380 (unsigned long long)le64_to_cpu(u1->b),
381 (unsigned long long)le64_to_cpu(u1->c),
382 (unsigned long long)le64_to_cpu(u1->d),
383 buffer_info->skb, next_desc);
384 } else {
385 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
386 "R ", i,
387 (unsigned long long)le64_to_cpu(u1->a),
388 (unsigned long long)le64_to_cpu(u1->b),
389 (unsigned long long)le64_to_cpu(u1->c),
390 (unsigned long long)le64_to_cpu(u1->d),
391 (unsigned long long)buffer_info->dma,
392 buffer_info->skb, next_desc);
393
394 if (netif_msg_pktdata(adapter))
395 e1000e_dump_ps_pages(adapter,
396 buffer_info);
397 }
398 }
399 break;
400 default:
401 case 0:
402 /* Extended Receive Descriptor (Read) Format
403 *
404 * +-----------------------------------------------------+
405 * 0 | Buffer Address [63:0] |
406 * +-----------------------------------------------------+
407 * 8 | Reserved |
408 * +-----------------------------------------------------+
409 */
410 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
411 /* Extended Receive Descriptor (Write-Back) Format
412 *
413 * 63 48 47 32 31 24 23 4 3 0
414 * +------------------------------------------------------+
415 * | RSS Hash | | | |
416 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
417 * | Packet | IP | | | Type |
418 * | Checksum | Ident | | | |
419 * +------------------------------------------------------+
420 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
421 * +------------------------------------------------------+
422 * 63 48 47 32 31 20 19 0
423 */
424 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
425
426 for (i = 0; i < rx_ring->count; i++) {
427 const char *next_desc;
428
429 buffer_info = &rx_ring->buffer_info[i];
430 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
431 u1 = (struct my_u1 *)rx_desc;
432 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
433
434 if (i == rx_ring->next_to_use)
435 next_desc = " NTU";
436 else if (i == rx_ring->next_to_clean)
437 next_desc = " NTC";
438 else
439 next_desc = "";
440
441 if (staterr & E1000_RXD_STAT_DD) {
442 /* Descriptor Done */
443 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
444 "RWB", i,
445 (unsigned long long)le64_to_cpu(u1->a),
446 (unsigned long long)le64_to_cpu(u1->b),
447 buffer_info->skb, next_desc);
448 } else {
449 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
450 "R ", i,
451 (unsigned long long)le64_to_cpu(u1->a),
452 (unsigned long long)le64_to_cpu(u1->b),
453 (unsigned long long)buffer_info->dma,
454 buffer_info->skb, next_desc);
455
456 if (netif_msg_pktdata(adapter) &&
457 buffer_info->skb)
458 print_hex_dump(KERN_INFO, "",
459 DUMP_PREFIX_ADDRESS, 16,
460 1,
461 buffer_info->skb->data,
462 adapter->rx_buffer_len,
463 true);
464 }
465 }
466 }
467 }
468
469 /**
470 * e1000_desc_unused - calculate if we have unused descriptors
471 * @ring: pointer to ring struct to perform calculation on
472 **/
e1000_desc_unused(struct e1000_ring * ring)473 static int e1000_desc_unused(struct e1000_ring *ring)
474 {
475 if (ring->next_to_clean > ring->next_to_use)
476 return ring->next_to_clean - ring->next_to_use - 1;
477
478 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
479 }
480
481 /**
482 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
483 * @adapter: board private structure
484 * @hwtstamps: time stamp structure to update
485 * @systim: unsigned 64bit system time value.
486 *
487 * Convert the system time value stored in the RX/TXSTMP registers into a
488 * hwtstamp which can be used by the upper level time stamping functions.
489 *
490 * The 'systim_lock' spinlock is used to protect the consistency of the
491 * system time value. This is needed because reading the 64 bit time
492 * value involves reading two 32 bit registers. The first read latches the
493 * value.
494 **/
e1000e_systim_to_hwtstamp(struct e1000_adapter * adapter,struct skb_shared_hwtstamps * hwtstamps,u64 systim)495 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
496 struct skb_shared_hwtstamps *hwtstamps,
497 u64 systim)
498 {
499 u64 ns;
500 unsigned long flags;
501
502 spin_lock_irqsave(&adapter->systim_lock, flags);
503 ns = timecounter_cyc2time(&adapter->tc, systim);
504 spin_unlock_irqrestore(&adapter->systim_lock, flags);
505
506 memset(hwtstamps, 0, sizeof(*hwtstamps));
507 hwtstamps->hwtstamp = ns_to_ktime(ns);
508 }
509
510 /**
511 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
512 * @adapter: board private structure
513 * @status: descriptor extended error and status field
514 * @skb: particular skb to include time stamp
515 *
516 * If the time stamp is valid, convert it into the timecounter ns value
517 * and store that result into the shhwtstamps structure which is passed
518 * up the network stack.
519 **/
e1000e_rx_hwtstamp(struct e1000_adapter * adapter,u32 status,struct sk_buff * skb)520 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
521 struct sk_buff *skb)
522 {
523 struct e1000_hw *hw = &adapter->hw;
524 u64 rxstmp;
525
526 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
527 !(status & E1000_RXDEXT_STATERR_TST) ||
528 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
529 return;
530
531 /* The Rx time stamp registers contain the time stamp. No other
532 * received packet will be time stamped until the Rx time stamp
533 * registers are read. Because only one packet can be time stamped
534 * at a time, the register values must belong to this packet and
535 * therefore none of the other additional attributes need to be
536 * compared.
537 */
538 rxstmp = (u64)er32(RXSTMPL);
539 rxstmp |= (u64)er32(RXSTMPH) << 32;
540 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
541
542 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
543 }
544
545 /**
546 * e1000_receive_skb - helper function to handle Rx indications
547 * @adapter: board private structure
548 * @netdev: pointer to netdev struct
549 * @staterr: descriptor extended error and status field as written by hardware
550 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
551 * @skb: pointer to sk_buff to be indicated to stack
552 **/
e1000_receive_skb(struct e1000_adapter * adapter,struct net_device * netdev,struct sk_buff * skb,u32 staterr,__le16 vlan)553 static void e1000_receive_skb(struct e1000_adapter *adapter,
554 struct net_device *netdev, struct sk_buff *skb,
555 u32 staterr, __le16 vlan)
556 {
557 u16 tag = le16_to_cpu(vlan);
558
559 e1000e_rx_hwtstamp(adapter, staterr, skb);
560
561 skb->protocol = eth_type_trans(skb, netdev);
562
563 if (staterr & E1000_RXD_STAT_VP)
564 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
565
566 napi_gro_receive(&adapter->napi, skb);
567 }
568
569 /**
570 * e1000_rx_checksum - Receive Checksum Offload
571 * @adapter: board private structure
572 * @status_err: receive descriptor status and error fields
573 * @skb: socket buffer with received data
574 **/
e1000_rx_checksum(struct e1000_adapter * adapter,u32 status_err,struct sk_buff * skb)575 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
576 struct sk_buff *skb)
577 {
578 u16 status = (u16)status_err;
579 u8 errors = (u8)(status_err >> 24);
580
581 skb_checksum_none_assert(skb);
582
583 /* Rx checksum disabled */
584 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
585 return;
586
587 /* Ignore Checksum bit is set */
588 if (status & E1000_RXD_STAT_IXSM)
589 return;
590
591 /* TCP/UDP checksum error bit or IP checksum error bit is set */
592 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
593 /* let the stack verify checksum errors */
594 adapter->hw_csum_err++;
595 return;
596 }
597
598 /* TCP/UDP Checksum has not been calculated */
599 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
600 return;
601
602 /* It must be a TCP or UDP packet with a valid checksum */
603 skb->ip_summed = CHECKSUM_UNNECESSARY;
604 adapter->hw_csum_good++;
605 }
606
e1000e_update_rdt_wa(struct e1000_ring * rx_ring,unsigned int i)607 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
608 {
609 struct e1000_adapter *adapter = rx_ring->adapter;
610 struct e1000_hw *hw = &adapter->hw;
611
612 __ew32_prepare(hw);
613 writel(i, rx_ring->tail);
614
615 if (unlikely(i != readl(rx_ring->tail))) {
616 u32 rctl = er32(RCTL);
617
618 ew32(RCTL, rctl & ~E1000_RCTL_EN);
619 e_err("ME firmware caused invalid RDT - resetting\n");
620 schedule_work(&adapter->reset_task);
621 }
622 }
623
e1000e_update_tdt_wa(struct e1000_ring * tx_ring,unsigned int i)624 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
625 {
626 struct e1000_adapter *adapter = tx_ring->adapter;
627 struct e1000_hw *hw = &adapter->hw;
628
629 __ew32_prepare(hw);
630 writel(i, tx_ring->tail);
631
632 if (unlikely(i != readl(tx_ring->tail))) {
633 u32 tctl = er32(TCTL);
634
635 ew32(TCTL, tctl & ~E1000_TCTL_EN);
636 e_err("ME firmware caused invalid TDT - resetting\n");
637 schedule_work(&adapter->reset_task);
638 }
639 }
640
641 /**
642 * e1000_alloc_rx_buffers - Replace used receive buffers
643 * @rx_ring: Rx descriptor ring
644 * @cleaned_count: number to reallocate
645 * @gfp: flags for allocation
646 **/
e1000_alloc_rx_buffers(struct e1000_ring * rx_ring,int cleaned_count,gfp_t gfp)647 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
648 int cleaned_count, gfp_t gfp)
649 {
650 struct e1000_adapter *adapter = rx_ring->adapter;
651 struct net_device *netdev = adapter->netdev;
652 struct pci_dev *pdev = adapter->pdev;
653 union e1000_rx_desc_extended *rx_desc;
654 struct e1000_buffer *buffer_info;
655 struct sk_buff *skb;
656 unsigned int i;
657 unsigned int bufsz = adapter->rx_buffer_len;
658
659 i = rx_ring->next_to_use;
660 buffer_info = &rx_ring->buffer_info[i];
661
662 while (cleaned_count--) {
663 skb = buffer_info->skb;
664 if (skb) {
665 skb_trim(skb, 0);
666 goto map_skb;
667 }
668
669 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
670 if (!skb) {
671 /* Better luck next round */
672 adapter->alloc_rx_buff_failed++;
673 break;
674 }
675
676 buffer_info->skb = skb;
677 map_skb:
678 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
679 adapter->rx_buffer_len,
680 DMA_FROM_DEVICE);
681 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
682 dev_err(&pdev->dev, "Rx DMA map failed\n");
683 adapter->rx_dma_failed++;
684 break;
685 }
686
687 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
688 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
689
690 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
691 /* Force memory writes to complete before letting h/w
692 * know there are new descriptors to fetch. (Only
693 * applicable for weak-ordered memory model archs,
694 * such as IA-64).
695 */
696 wmb();
697 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
698 e1000e_update_rdt_wa(rx_ring, i);
699 else
700 writel(i, rx_ring->tail);
701 }
702 i++;
703 if (i == rx_ring->count)
704 i = 0;
705 buffer_info = &rx_ring->buffer_info[i];
706 }
707
708 rx_ring->next_to_use = i;
709 }
710
711 /**
712 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
713 * @rx_ring: Rx descriptor ring
714 * @cleaned_count: number to reallocate
715 * @gfp: flags for allocation
716 **/
e1000_alloc_rx_buffers_ps(struct e1000_ring * rx_ring,int cleaned_count,gfp_t gfp)717 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
718 int cleaned_count, gfp_t gfp)
719 {
720 struct e1000_adapter *adapter = rx_ring->adapter;
721 struct net_device *netdev = adapter->netdev;
722 struct pci_dev *pdev = adapter->pdev;
723 union e1000_rx_desc_packet_split *rx_desc;
724 struct e1000_buffer *buffer_info;
725 struct e1000_ps_page *ps_page;
726 struct sk_buff *skb;
727 unsigned int i, j;
728
729 i = rx_ring->next_to_use;
730 buffer_info = &rx_ring->buffer_info[i];
731
732 while (cleaned_count--) {
733 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
734
735 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
736 ps_page = &buffer_info->ps_pages[j];
737 if (j >= adapter->rx_ps_pages) {
738 /* all unused desc entries get hw null ptr */
739 rx_desc->read.buffer_addr[j + 1] =
740 ~cpu_to_le64(0);
741 continue;
742 }
743 if (!ps_page->page) {
744 ps_page->page = alloc_page(gfp);
745 if (!ps_page->page) {
746 adapter->alloc_rx_buff_failed++;
747 goto no_buffers;
748 }
749 ps_page->dma = dma_map_page(&pdev->dev,
750 ps_page->page,
751 0, PAGE_SIZE,
752 DMA_FROM_DEVICE);
753 if (dma_mapping_error(&pdev->dev,
754 ps_page->dma)) {
755 dev_err(&adapter->pdev->dev,
756 "Rx DMA page map failed\n");
757 adapter->rx_dma_failed++;
758 goto no_buffers;
759 }
760 }
761 /* Refresh the desc even if buffer_addrs
762 * didn't change because each write-back
763 * erases this info.
764 */
765 rx_desc->read.buffer_addr[j + 1] =
766 cpu_to_le64(ps_page->dma);
767 }
768
769 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
770 gfp);
771
772 if (!skb) {
773 adapter->alloc_rx_buff_failed++;
774 break;
775 }
776
777 buffer_info->skb = skb;
778 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
779 adapter->rx_ps_bsize0,
780 DMA_FROM_DEVICE);
781 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
782 dev_err(&pdev->dev, "Rx DMA map failed\n");
783 adapter->rx_dma_failed++;
784 /* cleanup skb */
785 dev_kfree_skb_any(skb);
786 buffer_info->skb = NULL;
787 break;
788 }
789
790 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
791
792 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
793 /* Force memory writes to complete before letting h/w
794 * know there are new descriptors to fetch. (Only
795 * applicable for weak-ordered memory model archs,
796 * such as IA-64).
797 */
798 wmb();
799 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
800 e1000e_update_rdt_wa(rx_ring, i << 1);
801 else
802 writel(i << 1, rx_ring->tail);
803 }
804
805 i++;
806 if (i == rx_ring->count)
807 i = 0;
808 buffer_info = &rx_ring->buffer_info[i];
809 }
810
811 no_buffers:
812 rx_ring->next_to_use = i;
813 }
814
815 /**
816 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
817 * @rx_ring: Rx descriptor ring
818 * @cleaned_count: number of buffers to allocate this pass
819 * @gfp: flags for allocation
820 **/
821
e1000_alloc_jumbo_rx_buffers(struct e1000_ring * rx_ring,int cleaned_count,gfp_t gfp)822 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
823 int cleaned_count, gfp_t gfp)
824 {
825 struct e1000_adapter *adapter = rx_ring->adapter;
826 struct net_device *netdev = adapter->netdev;
827 struct pci_dev *pdev = adapter->pdev;
828 union e1000_rx_desc_extended *rx_desc;
829 struct e1000_buffer *buffer_info;
830 struct sk_buff *skb;
831 unsigned int i;
832 unsigned int bufsz = 256 - 16; /* for skb_reserve */
833
834 i = rx_ring->next_to_use;
835 buffer_info = &rx_ring->buffer_info[i];
836
837 while (cleaned_count--) {
838 skb = buffer_info->skb;
839 if (skb) {
840 skb_trim(skb, 0);
841 goto check_page;
842 }
843
844 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
845 if (unlikely(!skb)) {
846 /* Better luck next round */
847 adapter->alloc_rx_buff_failed++;
848 break;
849 }
850
851 buffer_info->skb = skb;
852 check_page:
853 /* allocate a new page if necessary */
854 if (!buffer_info->page) {
855 buffer_info->page = alloc_page(gfp);
856 if (unlikely(!buffer_info->page)) {
857 adapter->alloc_rx_buff_failed++;
858 break;
859 }
860 }
861
862 if (!buffer_info->dma) {
863 buffer_info->dma = dma_map_page(&pdev->dev,
864 buffer_info->page, 0,
865 PAGE_SIZE,
866 DMA_FROM_DEVICE);
867 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
868 adapter->alloc_rx_buff_failed++;
869 break;
870 }
871 }
872
873 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
874 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
875
876 if (unlikely(++i == rx_ring->count))
877 i = 0;
878 buffer_info = &rx_ring->buffer_info[i];
879 }
880
881 if (likely(rx_ring->next_to_use != i)) {
882 rx_ring->next_to_use = i;
883 if (unlikely(i-- == 0))
884 i = (rx_ring->count - 1);
885
886 /* Force memory writes to complete before letting h/w
887 * know there are new descriptors to fetch. (Only
888 * applicable for weak-ordered memory model archs,
889 * such as IA-64).
890 */
891 wmb();
892 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
893 e1000e_update_rdt_wa(rx_ring, i);
894 else
895 writel(i, rx_ring->tail);
896 }
897 }
898
e1000_rx_hash(struct net_device * netdev,__le32 rss,struct sk_buff * skb)899 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
900 struct sk_buff *skb)
901 {
902 if (netdev->features & NETIF_F_RXHASH)
903 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
904 }
905
906 /**
907 * e1000_clean_rx_irq - Send received data up the network stack
908 * @rx_ring: Rx descriptor ring
909 * @work_done: output parameter for indicating completed work
910 * @work_to_do: how many packets we can clean
911 *
912 * the return value indicates whether actual cleaning was done, there
913 * is no guarantee that everything was cleaned
914 **/
e1000_clean_rx_irq(struct e1000_ring * rx_ring,int * work_done,int work_to_do)915 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
916 int work_to_do)
917 {
918 struct e1000_adapter *adapter = rx_ring->adapter;
919 struct net_device *netdev = adapter->netdev;
920 struct pci_dev *pdev = adapter->pdev;
921 struct e1000_hw *hw = &adapter->hw;
922 union e1000_rx_desc_extended *rx_desc, *next_rxd;
923 struct e1000_buffer *buffer_info, *next_buffer;
924 u32 length, staterr;
925 unsigned int i;
926 int cleaned_count = 0;
927 bool cleaned = false;
928 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
929
930 i = rx_ring->next_to_clean;
931 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
932 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
933 buffer_info = &rx_ring->buffer_info[i];
934
935 while (staterr & E1000_RXD_STAT_DD) {
936 struct sk_buff *skb;
937
938 if (*work_done >= work_to_do)
939 break;
940 (*work_done)++;
941 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
942
943 skb = buffer_info->skb;
944 buffer_info->skb = NULL;
945
946 prefetch(skb->data - NET_IP_ALIGN);
947
948 i++;
949 if (i == rx_ring->count)
950 i = 0;
951 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
952 prefetch(next_rxd);
953
954 next_buffer = &rx_ring->buffer_info[i];
955
956 cleaned = true;
957 cleaned_count++;
958 dma_unmap_single(&pdev->dev, buffer_info->dma,
959 adapter->rx_buffer_len, DMA_FROM_DEVICE);
960 buffer_info->dma = 0;
961
962 length = le16_to_cpu(rx_desc->wb.upper.length);
963
964 /* !EOP means multiple descriptors were used to store a single
965 * packet, if that's the case we need to toss it. In fact, we
966 * need to toss every packet with the EOP bit clear and the
967 * next frame that _does_ have the EOP bit set, as it is by
968 * definition only a frame fragment
969 */
970 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
971 adapter->flags2 |= FLAG2_IS_DISCARDING;
972
973 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
974 /* All receives must fit into a single buffer */
975 e_dbg("Receive packet consumed multiple buffers\n");
976 /* recycle */
977 buffer_info->skb = skb;
978 if (staterr & E1000_RXD_STAT_EOP)
979 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
980 goto next_desc;
981 }
982
983 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
984 !(netdev->features & NETIF_F_RXALL))) {
985 /* recycle */
986 buffer_info->skb = skb;
987 goto next_desc;
988 }
989
990 /* adjust length to remove Ethernet CRC */
991 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
992 /* If configured to store CRC, don't subtract FCS,
993 * but keep the FCS bytes out of the total_rx_bytes
994 * counter
995 */
996 if (netdev->features & NETIF_F_RXFCS)
997 total_rx_bytes -= 4;
998 else
999 length -= 4;
1000 }
1001
1002 total_rx_bytes += length;
1003 total_rx_packets++;
1004
1005 /* code added for copybreak, this should improve
1006 * performance for small packets with large amounts
1007 * of reassembly being done in the stack
1008 */
1009 if (length < copybreak) {
1010 struct sk_buff *new_skb =
1011 napi_alloc_skb(&adapter->napi, length);
1012 if (new_skb) {
1013 skb_copy_to_linear_data_offset(new_skb,
1014 -NET_IP_ALIGN,
1015 (skb->data -
1016 NET_IP_ALIGN),
1017 (length +
1018 NET_IP_ALIGN));
1019 /* save the skb in buffer_info as good */
1020 buffer_info->skb = skb;
1021 skb = new_skb;
1022 }
1023 /* else just continue with the old one */
1024 }
1025 /* end copybreak code */
1026 skb_put(skb, length);
1027
1028 /* Receive Checksum Offload */
1029 e1000_rx_checksum(adapter, staterr, skb);
1030
1031 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1032
1033 e1000_receive_skb(adapter, netdev, skb, staterr,
1034 rx_desc->wb.upper.vlan);
1035
1036 next_desc:
1037 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1038
1039 /* return some buffers to hardware, one at a time is too slow */
1040 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1041 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1042 GFP_ATOMIC);
1043 cleaned_count = 0;
1044 }
1045
1046 /* use prefetched values */
1047 rx_desc = next_rxd;
1048 buffer_info = next_buffer;
1049
1050 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1051 }
1052 rx_ring->next_to_clean = i;
1053
1054 cleaned_count = e1000_desc_unused(rx_ring);
1055 if (cleaned_count)
1056 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1057
1058 adapter->total_rx_bytes += total_rx_bytes;
1059 adapter->total_rx_packets += total_rx_packets;
1060 return cleaned;
1061 }
1062
e1000_put_txbuf(struct e1000_ring * tx_ring,struct e1000_buffer * buffer_info,bool drop)1063 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1064 struct e1000_buffer *buffer_info,
1065 bool drop)
1066 {
1067 struct e1000_adapter *adapter = tx_ring->adapter;
1068
1069 if (buffer_info->dma) {
1070 if (buffer_info->mapped_as_page)
1071 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1072 buffer_info->length, DMA_TO_DEVICE);
1073 else
1074 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1075 buffer_info->length, DMA_TO_DEVICE);
1076 buffer_info->dma = 0;
1077 }
1078 if (buffer_info->skb) {
1079 if (drop)
1080 dev_kfree_skb_any(buffer_info->skb);
1081 else
1082 dev_consume_skb_any(buffer_info->skb);
1083 buffer_info->skb = NULL;
1084 }
1085 buffer_info->time_stamp = 0;
1086 }
1087
e1000_print_hw_hang(struct work_struct * work)1088 static void e1000_print_hw_hang(struct work_struct *work)
1089 {
1090 struct e1000_adapter *adapter = container_of(work,
1091 struct e1000_adapter,
1092 print_hang_task);
1093 struct net_device *netdev = adapter->netdev;
1094 struct e1000_ring *tx_ring = adapter->tx_ring;
1095 unsigned int i = tx_ring->next_to_clean;
1096 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1097 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1098 struct e1000_hw *hw = &adapter->hw;
1099 u16 phy_status, phy_1000t_status, phy_ext_status;
1100 u16 pci_status;
1101
1102 if (test_bit(__E1000_DOWN, &adapter->state))
1103 return;
1104
1105 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1106 /* May be block on write-back, flush and detect again
1107 * flush pending descriptor writebacks to memory
1108 */
1109 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1110 /* execute the writes immediately */
1111 e1e_flush();
1112 /* Due to rare timing issues, write to TIDV again to ensure
1113 * the write is successful
1114 */
1115 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1116 /* execute the writes immediately */
1117 e1e_flush();
1118 adapter->tx_hang_recheck = true;
1119 return;
1120 }
1121 adapter->tx_hang_recheck = false;
1122
1123 if (er32(TDH(0)) == er32(TDT(0))) {
1124 e_dbg("false hang detected, ignoring\n");
1125 return;
1126 }
1127
1128 /* Real hang detected */
1129 netif_stop_queue(netdev);
1130
1131 e1e_rphy(hw, MII_BMSR, &phy_status);
1132 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1133 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1134
1135 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1136
1137 /* detected Hardware unit hang */
1138 e_err("Detected Hardware Unit Hang:\n"
1139 " TDH <%x>\n"
1140 " TDT <%x>\n"
1141 " next_to_use <%x>\n"
1142 " next_to_clean <%x>\n"
1143 "buffer_info[next_to_clean]:\n"
1144 " time_stamp <%lx>\n"
1145 " next_to_watch <%x>\n"
1146 " jiffies <%lx>\n"
1147 " next_to_watch.status <%x>\n"
1148 "MAC Status <%x>\n"
1149 "PHY Status <%x>\n"
1150 "PHY 1000BASE-T Status <%x>\n"
1151 "PHY Extended Status <%x>\n"
1152 "PCI Status <%x>\n",
1153 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1154 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1155 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1156 phy_status, phy_1000t_status, phy_ext_status, pci_status);
1157
1158 e1000e_dump(adapter);
1159
1160 /* Suggest workaround for known h/w issue */
1161 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1162 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1163 }
1164
1165 /**
1166 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1167 * @work: pointer to work struct
1168 *
1169 * This work function polls the TSYNCTXCTL valid bit to determine when a
1170 * timestamp has been taken for the current stored skb. The timestamp must
1171 * be for this skb because only one such packet is allowed in the queue.
1172 */
e1000e_tx_hwtstamp_work(struct work_struct * work)1173 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1174 {
1175 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1176 tx_hwtstamp_work);
1177 struct e1000_hw *hw = &adapter->hw;
1178
1179 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1180 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1181 struct skb_shared_hwtstamps shhwtstamps;
1182 u64 txstmp;
1183
1184 txstmp = er32(TXSTMPL);
1185 txstmp |= (u64)er32(TXSTMPH) << 32;
1186
1187 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1188
1189 /* Clear the global tx_hwtstamp_skb pointer and force writes
1190 * prior to notifying the stack of a Tx timestamp.
1191 */
1192 adapter->tx_hwtstamp_skb = NULL;
1193 wmb(); /* force write prior to skb_tstamp_tx */
1194
1195 skb_tstamp_tx(skb, &shhwtstamps);
1196 dev_consume_skb_any(skb);
1197 } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1198 + adapter->tx_timeout_factor * HZ)) {
1199 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1200 adapter->tx_hwtstamp_skb = NULL;
1201 adapter->tx_hwtstamp_timeouts++;
1202 e_warn("clearing Tx timestamp hang\n");
1203 } else {
1204 /* reschedule to check later */
1205 schedule_work(&adapter->tx_hwtstamp_work);
1206 }
1207 }
1208
1209 /**
1210 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1211 * @tx_ring: Tx descriptor ring
1212 *
1213 * the return value indicates whether actual cleaning was done, there
1214 * is no guarantee that everything was cleaned
1215 **/
e1000_clean_tx_irq(struct e1000_ring * tx_ring)1216 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1217 {
1218 struct e1000_adapter *adapter = tx_ring->adapter;
1219 struct net_device *netdev = adapter->netdev;
1220 struct e1000_hw *hw = &adapter->hw;
1221 struct e1000_tx_desc *tx_desc, *eop_desc;
1222 struct e1000_buffer *buffer_info;
1223 unsigned int i, eop;
1224 unsigned int count = 0;
1225 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1226 unsigned int bytes_compl = 0, pkts_compl = 0;
1227
1228 i = tx_ring->next_to_clean;
1229 eop = tx_ring->buffer_info[i].next_to_watch;
1230 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1231
1232 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1233 (count < tx_ring->count)) {
1234 bool cleaned = false;
1235
1236 dma_rmb(); /* read buffer_info after eop_desc */
1237 for (; !cleaned; count++) {
1238 tx_desc = E1000_TX_DESC(*tx_ring, i);
1239 buffer_info = &tx_ring->buffer_info[i];
1240 cleaned = (i == eop);
1241
1242 if (cleaned) {
1243 total_tx_packets += buffer_info->segs;
1244 total_tx_bytes += buffer_info->bytecount;
1245 if (buffer_info->skb) {
1246 bytes_compl += buffer_info->skb->len;
1247 pkts_compl++;
1248 }
1249 }
1250
1251 e1000_put_txbuf(tx_ring, buffer_info, false);
1252 tx_desc->upper.data = 0;
1253
1254 i++;
1255 if (i == tx_ring->count)
1256 i = 0;
1257 }
1258
1259 if (i == tx_ring->next_to_use)
1260 break;
1261 eop = tx_ring->buffer_info[i].next_to_watch;
1262 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1263 }
1264
1265 tx_ring->next_to_clean = i;
1266
1267 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1268
1269 #define TX_WAKE_THRESHOLD 32
1270 if (count && netif_carrier_ok(netdev) &&
1271 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1272 /* Make sure that anybody stopping the queue after this
1273 * sees the new next_to_clean.
1274 */
1275 smp_mb();
1276
1277 if (netif_queue_stopped(netdev) &&
1278 !(test_bit(__E1000_DOWN, &adapter->state))) {
1279 netif_wake_queue(netdev);
1280 ++adapter->restart_queue;
1281 }
1282 }
1283
1284 if (adapter->detect_tx_hung) {
1285 /* Detect a transmit hang in hardware, this serializes the
1286 * check with the clearing of time_stamp and movement of i
1287 */
1288 adapter->detect_tx_hung = false;
1289 if (tx_ring->buffer_info[i].time_stamp &&
1290 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1291 + (adapter->tx_timeout_factor * HZ)) &&
1292 !(er32(STATUS) & E1000_STATUS_TXOFF))
1293 schedule_work(&adapter->print_hang_task);
1294 else
1295 adapter->tx_hang_recheck = false;
1296 }
1297 adapter->total_tx_bytes += total_tx_bytes;
1298 adapter->total_tx_packets += total_tx_packets;
1299 return count < tx_ring->count;
1300 }
1301
1302 /**
1303 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1304 * @rx_ring: Rx descriptor ring
1305 * @work_done: output parameter for indicating completed work
1306 * @work_to_do: how many packets we can clean
1307 *
1308 * the return value indicates whether actual cleaning was done, there
1309 * is no guarantee that everything was cleaned
1310 **/
e1000_clean_rx_irq_ps(struct e1000_ring * rx_ring,int * work_done,int work_to_do)1311 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1312 int work_to_do)
1313 {
1314 struct e1000_adapter *adapter = rx_ring->adapter;
1315 struct e1000_hw *hw = &adapter->hw;
1316 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1317 struct net_device *netdev = adapter->netdev;
1318 struct pci_dev *pdev = adapter->pdev;
1319 struct e1000_buffer *buffer_info, *next_buffer;
1320 struct e1000_ps_page *ps_page;
1321 struct sk_buff *skb;
1322 unsigned int i, j;
1323 u32 length, staterr;
1324 int cleaned_count = 0;
1325 bool cleaned = false;
1326 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1327
1328 i = rx_ring->next_to_clean;
1329 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1330 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1331 buffer_info = &rx_ring->buffer_info[i];
1332
1333 while (staterr & E1000_RXD_STAT_DD) {
1334 if (*work_done >= work_to_do)
1335 break;
1336 (*work_done)++;
1337 skb = buffer_info->skb;
1338 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1339
1340 /* in the packet split case this is header only */
1341 prefetch(skb->data - NET_IP_ALIGN);
1342
1343 i++;
1344 if (i == rx_ring->count)
1345 i = 0;
1346 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1347 prefetch(next_rxd);
1348
1349 next_buffer = &rx_ring->buffer_info[i];
1350
1351 cleaned = true;
1352 cleaned_count++;
1353 dma_unmap_single(&pdev->dev, buffer_info->dma,
1354 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1355 buffer_info->dma = 0;
1356
1357 /* see !EOP comment in other Rx routine */
1358 if (!(staterr & E1000_RXD_STAT_EOP))
1359 adapter->flags2 |= FLAG2_IS_DISCARDING;
1360
1361 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1362 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1363 dev_kfree_skb_irq(skb);
1364 if (staterr & E1000_RXD_STAT_EOP)
1365 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1366 goto next_desc;
1367 }
1368
1369 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1370 !(netdev->features & NETIF_F_RXALL))) {
1371 dev_kfree_skb_irq(skb);
1372 goto next_desc;
1373 }
1374
1375 length = le16_to_cpu(rx_desc->wb.middle.length0);
1376
1377 if (!length) {
1378 e_dbg("Last part of the packet spanning multiple descriptors\n");
1379 dev_kfree_skb_irq(skb);
1380 goto next_desc;
1381 }
1382
1383 /* Good Receive */
1384 skb_put(skb, length);
1385
1386 {
1387 /* this looks ugly, but it seems compiler issues make
1388 * it more efficient than reusing j
1389 */
1390 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1391
1392 /* page alloc/put takes too long and effects small
1393 * packet throughput, so unsplit small packets and
1394 * save the alloc/put
1395 */
1396 if (l1 && (l1 <= copybreak) &&
1397 ((length + l1) <= adapter->rx_ps_bsize0)) {
1398 ps_page = &buffer_info->ps_pages[0];
1399
1400 dma_sync_single_for_cpu(&pdev->dev,
1401 ps_page->dma,
1402 PAGE_SIZE,
1403 DMA_FROM_DEVICE);
1404 memcpy(skb_tail_pointer(skb),
1405 page_address(ps_page->page), l1);
1406 dma_sync_single_for_device(&pdev->dev,
1407 ps_page->dma,
1408 PAGE_SIZE,
1409 DMA_FROM_DEVICE);
1410
1411 /* remove the CRC */
1412 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1413 if (!(netdev->features & NETIF_F_RXFCS))
1414 l1 -= 4;
1415 }
1416
1417 skb_put(skb, l1);
1418 goto copydone;
1419 } /* if */
1420 }
1421
1422 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1423 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1424 if (!length)
1425 break;
1426
1427 ps_page = &buffer_info->ps_pages[j];
1428 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1429 DMA_FROM_DEVICE);
1430 ps_page->dma = 0;
1431 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1432 ps_page->page = NULL;
1433 skb->len += length;
1434 skb->data_len += length;
1435 skb->truesize += PAGE_SIZE;
1436 }
1437
1438 /* strip the ethernet crc, problem is we're using pages now so
1439 * this whole operation can get a little cpu intensive
1440 */
1441 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1442 if (!(netdev->features & NETIF_F_RXFCS))
1443 pskb_trim(skb, skb->len - 4);
1444 }
1445
1446 copydone:
1447 total_rx_bytes += skb->len;
1448 total_rx_packets++;
1449
1450 e1000_rx_checksum(adapter, staterr, skb);
1451
1452 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1453
1454 if (rx_desc->wb.upper.header_status &
1455 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1456 adapter->rx_hdr_split++;
1457
1458 e1000_receive_skb(adapter, netdev, skb, staterr,
1459 rx_desc->wb.middle.vlan);
1460
1461 next_desc:
1462 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1463 buffer_info->skb = NULL;
1464
1465 /* return some buffers to hardware, one at a time is too slow */
1466 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1467 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1468 GFP_ATOMIC);
1469 cleaned_count = 0;
1470 }
1471
1472 /* use prefetched values */
1473 rx_desc = next_rxd;
1474 buffer_info = next_buffer;
1475
1476 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1477 }
1478 rx_ring->next_to_clean = i;
1479
1480 cleaned_count = e1000_desc_unused(rx_ring);
1481 if (cleaned_count)
1482 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1483
1484 adapter->total_rx_bytes += total_rx_bytes;
1485 adapter->total_rx_packets += total_rx_packets;
1486 return cleaned;
1487 }
1488
e1000_consume_page(struct e1000_buffer * bi,struct sk_buff * skb,u16 length)1489 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1490 u16 length)
1491 {
1492 bi->page = NULL;
1493 skb->len += length;
1494 skb->data_len += length;
1495 skb->truesize += PAGE_SIZE;
1496 }
1497
1498 /**
1499 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1500 * @rx_ring: Rx descriptor ring
1501 * @work_done: output parameter for indicating completed work
1502 * @work_to_do: how many packets we can clean
1503 *
1504 * the return value indicates whether actual cleaning was done, there
1505 * is no guarantee that everything was cleaned
1506 **/
e1000_clean_jumbo_rx_irq(struct e1000_ring * rx_ring,int * work_done,int work_to_do)1507 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1508 int work_to_do)
1509 {
1510 struct e1000_adapter *adapter = rx_ring->adapter;
1511 struct net_device *netdev = adapter->netdev;
1512 struct pci_dev *pdev = adapter->pdev;
1513 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1514 struct e1000_buffer *buffer_info, *next_buffer;
1515 u32 length, staterr;
1516 unsigned int i;
1517 int cleaned_count = 0;
1518 bool cleaned = false;
1519 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1520 struct skb_shared_info *shinfo;
1521
1522 i = rx_ring->next_to_clean;
1523 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1524 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1525 buffer_info = &rx_ring->buffer_info[i];
1526
1527 while (staterr & E1000_RXD_STAT_DD) {
1528 struct sk_buff *skb;
1529
1530 if (*work_done >= work_to_do)
1531 break;
1532 (*work_done)++;
1533 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1534
1535 skb = buffer_info->skb;
1536 buffer_info->skb = NULL;
1537
1538 ++i;
1539 if (i == rx_ring->count)
1540 i = 0;
1541 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1542 prefetch(next_rxd);
1543
1544 next_buffer = &rx_ring->buffer_info[i];
1545
1546 cleaned = true;
1547 cleaned_count++;
1548 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1549 DMA_FROM_DEVICE);
1550 buffer_info->dma = 0;
1551
1552 length = le16_to_cpu(rx_desc->wb.upper.length);
1553
1554 /* errors is only valid for DD + EOP descriptors */
1555 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1556 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1557 !(netdev->features & NETIF_F_RXALL)))) {
1558 /* recycle both page and skb */
1559 buffer_info->skb = skb;
1560 /* an error means any chain goes out the window too */
1561 if (rx_ring->rx_skb_top)
1562 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1563 rx_ring->rx_skb_top = NULL;
1564 goto next_desc;
1565 }
1566 #define rxtop (rx_ring->rx_skb_top)
1567 if (!(staterr & E1000_RXD_STAT_EOP)) {
1568 /* this descriptor is only the beginning (or middle) */
1569 if (!rxtop) {
1570 /* this is the beginning of a chain */
1571 rxtop = skb;
1572 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1573 0, length);
1574 } else {
1575 /* this is the middle of a chain */
1576 shinfo = skb_shinfo(rxtop);
1577 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1578 buffer_info->page, 0,
1579 length);
1580 /* re-use the skb, only consumed the page */
1581 buffer_info->skb = skb;
1582 }
1583 e1000_consume_page(buffer_info, rxtop, length);
1584 goto next_desc;
1585 } else {
1586 if (rxtop) {
1587 /* end of the chain */
1588 shinfo = skb_shinfo(rxtop);
1589 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1590 buffer_info->page, 0,
1591 length);
1592 /* re-use the current skb, we only consumed the
1593 * page
1594 */
1595 buffer_info->skb = skb;
1596 skb = rxtop;
1597 rxtop = NULL;
1598 e1000_consume_page(buffer_info, skb, length);
1599 } else {
1600 /* no chain, got EOP, this buf is the packet
1601 * copybreak to save the put_page/alloc_page
1602 */
1603 if (length <= copybreak &&
1604 skb_tailroom(skb) >= length) {
1605 memcpy(skb_tail_pointer(skb),
1606 page_address(buffer_info->page),
1607 length);
1608 /* re-use the page, so don't erase
1609 * buffer_info->page
1610 */
1611 skb_put(skb, length);
1612 } else {
1613 skb_fill_page_desc(skb, 0,
1614 buffer_info->page, 0,
1615 length);
1616 e1000_consume_page(buffer_info, skb,
1617 length);
1618 }
1619 }
1620 }
1621
1622 /* Receive Checksum Offload */
1623 e1000_rx_checksum(adapter, staterr, skb);
1624
1625 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1626
1627 /* probably a little skewed due to removing CRC */
1628 total_rx_bytes += skb->len;
1629 total_rx_packets++;
1630
1631 /* eth type trans needs skb->data to point to something */
1632 if (!pskb_may_pull(skb, ETH_HLEN)) {
1633 e_err("pskb_may_pull failed.\n");
1634 dev_kfree_skb_irq(skb);
1635 goto next_desc;
1636 }
1637
1638 e1000_receive_skb(adapter, netdev, skb, staterr,
1639 rx_desc->wb.upper.vlan);
1640
1641 next_desc:
1642 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1643
1644 /* return some buffers to hardware, one at a time is too slow */
1645 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1646 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1647 GFP_ATOMIC);
1648 cleaned_count = 0;
1649 }
1650
1651 /* use prefetched values */
1652 rx_desc = next_rxd;
1653 buffer_info = next_buffer;
1654
1655 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1656 }
1657 rx_ring->next_to_clean = i;
1658
1659 cleaned_count = e1000_desc_unused(rx_ring);
1660 if (cleaned_count)
1661 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1662
1663 adapter->total_rx_bytes += total_rx_bytes;
1664 adapter->total_rx_packets += total_rx_packets;
1665 return cleaned;
1666 }
1667
1668 /**
1669 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1670 * @rx_ring: Rx descriptor ring
1671 **/
e1000_clean_rx_ring(struct e1000_ring * rx_ring)1672 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1673 {
1674 struct e1000_adapter *adapter = rx_ring->adapter;
1675 struct e1000_buffer *buffer_info;
1676 struct e1000_ps_page *ps_page;
1677 struct pci_dev *pdev = adapter->pdev;
1678 unsigned int i, j;
1679
1680 /* Free all the Rx ring sk_buffs */
1681 for (i = 0; i < rx_ring->count; i++) {
1682 buffer_info = &rx_ring->buffer_info[i];
1683 if (buffer_info->dma) {
1684 if (adapter->clean_rx == e1000_clean_rx_irq)
1685 dma_unmap_single(&pdev->dev, buffer_info->dma,
1686 adapter->rx_buffer_len,
1687 DMA_FROM_DEVICE);
1688 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1689 dma_unmap_page(&pdev->dev, buffer_info->dma,
1690 PAGE_SIZE, DMA_FROM_DEVICE);
1691 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1692 dma_unmap_single(&pdev->dev, buffer_info->dma,
1693 adapter->rx_ps_bsize0,
1694 DMA_FROM_DEVICE);
1695 buffer_info->dma = 0;
1696 }
1697
1698 if (buffer_info->page) {
1699 put_page(buffer_info->page);
1700 buffer_info->page = NULL;
1701 }
1702
1703 if (buffer_info->skb) {
1704 dev_kfree_skb(buffer_info->skb);
1705 buffer_info->skb = NULL;
1706 }
1707
1708 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1709 ps_page = &buffer_info->ps_pages[j];
1710 if (!ps_page->page)
1711 break;
1712 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1713 DMA_FROM_DEVICE);
1714 ps_page->dma = 0;
1715 put_page(ps_page->page);
1716 ps_page->page = NULL;
1717 }
1718 }
1719
1720 /* there also may be some cached data from a chained receive */
1721 if (rx_ring->rx_skb_top) {
1722 dev_kfree_skb(rx_ring->rx_skb_top);
1723 rx_ring->rx_skb_top = NULL;
1724 }
1725
1726 /* Zero out the descriptor ring */
1727 memset(rx_ring->desc, 0, rx_ring->size);
1728
1729 rx_ring->next_to_clean = 0;
1730 rx_ring->next_to_use = 0;
1731 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1732 }
1733
e1000e_downshift_workaround(struct work_struct * work)1734 static void e1000e_downshift_workaround(struct work_struct *work)
1735 {
1736 struct e1000_adapter *adapter = container_of(work,
1737 struct e1000_adapter,
1738 downshift_task);
1739
1740 if (test_bit(__E1000_DOWN, &adapter->state))
1741 return;
1742
1743 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1744 }
1745
1746 /**
1747 * e1000_intr_msi - Interrupt Handler
1748 * @irq: interrupt number
1749 * @data: pointer to a network interface device structure
1750 **/
e1000_intr_msi(int __always_unused irq,void * data)1751 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1752 {
1753 struct net_device *netdev = data;
1754 struct e1000_adapter *adapter = netdev_priv(netdev);
1755 struct e1000_hw *hw = &adapter->hw;
1756 u32 icr = er32(ICR);
1757
1758 /* read ICR disables interrupts using IAM */
1759 if (icr & E1000_ICR_LSC) {
1760 hw->mac.get_link_status = true;
1761 /* ICH8 workaround-- Call gig speed drop workaround on cable
1762 * disconnect (LSC) before accessing any PHY registers
1763 */
1764 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1765 (!(er32(STATUS) & E1000_STATUS_LU)))
1766 schedule_work(&adapter->downshift_task);
1767
1768 /* 80003ES2LAN workaround-- For packet buffer work-around on
1769 * link down event; disable receives here in the ISR and reset
1770 * adapter in watchdog
1771 */
1772 if (netif_carrier_ok(netdev) &&
1773 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1774 /* disable receives */
1775 u32 rctl = er32(RCTL);
1776
1777 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1778 adapter->flags |= FLAG_RESTART_NOW;
1779 }
1780 /* guard against interrupt when we're going down */
1781 if (!test_bit(__E1000_DOWN, &adapter->state))
1782 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1783 }
1784
1785 /* Reset on uncorrectable ECC error */
1786 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1787 u32 pbeccsts = er32(PBECCSTS);
1788
1789 adapter->corr_errors +=
1790 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1791 adapter->uncorr_errors +=
1792 FIELD_GET(E1000_PBECCSTS_UNCORR_ERR_CNT_MASK, pbeccsts);
1793
1794 /* Do the reset outside of interrupt context */
1795 schedule_work(&adapter->reset_task);
1796
1797 /* return immediately since reset is imminent */
1798 return IRQ_HANDLED;
1799 }
1800
1801 if (napi_schedule_prep(&adapter->napi)) {
1802 adapter->total_tx_bytes = 0;
1803 adapter->total_tx_packets = 0;
1804 adapter->total_rx_bytes = 0;
1805 adapter->total_rx_packets = 0;
1806 __napi_schedule(&adapter->napi);
1807 }
1808
1809 return IRQ_HANDLED;
1810 }
1811
1812 /**
1813 * e1000_intr - Interrupt Handler
1814 * @irq: interrupt number
1815 * @data: pointer to a network interface device structure
1816 **/
e1000_intr(int __always_unused irq,void * data)1817 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1818 {
1819 struct net_device *netdev = data;
1820 struct e1000_adapter *adapter = netdev_priv(netdev);
1821 struct e1000_hw *hw = &adapter->hw;
1822 u32 rctl, icr = er32(ICR);
1823
1824 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1825 return IRQ_NONE; /* Not our interrupt */
1826
1827 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1828 * not set, then the adapter didn't send an interrupt
1829 */
1830 if (!(icr & E1000_ICR_INT_ASSERTED))
1831 return IRQ_NONE;
1832
1833 /* Interrupt Auto-Mask...upon reading ICR,
1834 * interrupts are masked. No need for the
1835 * IMC write
1836 */
1837
1838 if (icr & E1000_ICR_LSC) {
1839 hw->mac.get_link_status = true;
1840 /* ICH8 workaround-- Call gig speed drop workaround on cable
1841 * disconnect (LSC) before accessing any PHY registers
1842 */
1843 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1844 (!(er32(STATUS) & E1000_STATUS_LU)))
1845 schedule_work(&adapter->downshift_task);
1846
1847 /* 80003ES2LAN workaround--
1848 * For packet buffer work-around on link down event;
1849 * disable receives here in the ISR and
1850 * reset adapter in watchdog
1851 */
1852 if (netif_carrier_ok(netdev) &&
1853 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1854 /* disable receives */
1855 rctl = er32(RCTL);
1856 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1857 adapter->flags |= FLAG_RESTART_NOW;
1858 }
1859 /* guard against interrupt when we're going down */
1860 if (!test_bit(__E1000_DOWN, &adapter->state))
1861 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1862 }
1863
1864 /* Reset on uncorrectable ECC error */
1865 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1866 u32 pbeccsts = er32(PBECCSTS);
1867
1868 adapter->corr_errors +=
1869 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1870 adapter->uncorr_errors +=
1871 FIELD_GET(E1000_PBECCSTS_UNCORR_ERR_CNT_MASK, pbeccsts);
1872
1873 /* Do the reset outside of interrupt context */
1874 schedule_work(&adapter->reset_task);
1875
1876 /* return immediately since reset is imminent */
1877 return IRQ_HANDLED;
1878 }
1879
1880 if (napi_schedule_prep(&adapter->napi)) {
1881 adapter->total_tx_bytes = 0;
1882 adapter->total_tx_packets = 0;
1883 adapter->total_rx_bytes = 0;
1884 adapter->total_rx_packets = 0;
1885 __napi_schedule(&adapter->napi);
1886 }
1887
1888 return IRQ_HANDLED;
1889 }
1890
e1000_msix_other(int __always_unused irq,void * data)1891 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1892 {
1893 struct net_device *netdev = data;
1894 struct e1000_adapter *adapter = netdev_priv(netdev);
1895 struct e1000_hw *hw = &adapter->hw;
1896 u32 icr = er32(ICR);
1897
1898 if (icr & adapter->eiac_mask)
1899 ew32(ICS, (icr & adapter->eiac_mask));
1900
1901 if (icr & E1000_ICR_LSC) {
1902 hw->mac.get_link_status = true;
1903 /* guard against interrupt when we're going down */
1904 if (!test_bit(__E1000_DOWN, &adapter->state))
1905 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1906 }
1907
1908 if (!test_bit(__E1000_DOWN, &adapter->state))
1909 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1910
1911 return IRQ_HANDLED;
1912 }
1913
e1000_intr_msix_tx(int __always_unused irq,void * data)1914 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1915 {
1916 struct net_device *netdev = data;
1917 struct e1000_adapter *adapter = netdev_priv(netdev);
1918 struct e1000_hw *hw = &adapter->hw;
1919 struct e1000_ring *tx_ring = adapter->tx_ring;
1920
1921 adapter->total_tx_bytes = 0;
1922 adapter->total_tx_packets = 0;
1923
1924 if (!e1000_clean_tx_irq(tx_ring))
1925 /* Ring was not completely cleaned, so fire another interrupt */
1926 ew32(ICS, tx_ring->ims_val);
1927
1928 if (!test_bit(__E1000_DOWN, &adapter->state))
1929 ew32(IMS, adapter->tx_ring->ims_val);
1930
1931 return IRQ_HANDLED;
1932 }
1933
e1000_intr_msix_rx(int __always_unused irq,void * data)1934 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1935 {
1936 struct net_device *netdev = data;
1937 struct e1000_adapter *adapter = netdev_priv(netdev);
1938 struct e1000_ring *rx_ring = adapter->rx_ring;
1939
1940 /* Write the ITR value calculated at the end of the
1941 * previous interrupt.
1942 */
1943 if (rx_ring->set_itr) {
1944 u32 itr = rx_ring->itr_val ?
1945 1000000000 / (rx_ring->itr_val * 256) : 0;
1946
1947 writel(itr, rx_ring->itr_register);
1948 rx_ring->set_itr = 0;
1949 }
1950
1951 if (napi_schedule_prep(&adapter->napi)) {
1952 adapter->total_rx_bytes = 0;
1953 adapter->total_rx_packets = 0;
1954 __napi_schedule(&adapter->napi);
1955 }
1956 return IRQ_HANDLED;
1957 }
1958
1959 /**
1960 * e1000_configure_msix - Configure MSI-X hardware
1961 * @adapter: board private structure
1962 *
1963 * e1000_configure_msix sets up the hardware to properly
1964 * generate MSI-X interrupts.
1965 **/
e1000_configure_msix(struct e1000_adapter * adapter)1966 static void e1000_configure_msix(struct e1000_adapter *adapter)
1967 {
1968 struct e1000_hw *hw = &adapter->hw;
1969 struct e1000_ring *rx_ring = adapter->rx_ring;
1970 struct e1000_ring *tx_ring = adapter->tx_ring;
1971 int vector = 0;
1972 u32 ctrl_ext, ivar = 0;
1973
1974 adapter->eiac_mask = 0;
1975
1976 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1977 if (hw->mac.type == e1000_82574) {
1978 u32 rfctl = er32(RFCTL);
1979
1980 rfctl |= E1000_RFCTL_ACK_DIS;
1981 ew32(RFCTL, rfctl);
1982 }
1983
1984 /* Configure Rx vector */
1985 rx_ring->ims_val = E1000_IMS_RXQ0;
1986 adapter->eiac_mask |= rx_ring->ims_val;
1987 if (rx_ring->itr_val)
1988 writel(1000000000 / (rx_ring->itr_val * 256),
1989 rx_ring->itr_register);
1990 else
1991 writel(1, rx_ring->itr_register);
1992 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1993
1994 /* Configure Tx vector */
1995 tx_ring->ims_val = E1000_IMS_TXQ0;
1996 vector++;
1997 if (tx_ring->itr_val)
1998 writel(1000000000 / (tx_ring->itr_val * 256),
1999 tx_ring->itr_register);
2000 else
2001 writel(1, tx_ring->itr_register);
2002 adapter->eiac_mask |= tx_ring->ims_val;
2003 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2004
2005 /* set vector for Other Causes, e.g. link changes */
2006 vector++;
2007 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2008 if (rx_ring->itr_val)
2009 writel(1000000000 / (rx_ring->itr_val * 256),
2010 hw->hw_addr + E1000_EITR_82574(vector));
2011 else
2012 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2013
2014 /* Cause Tx interrupts on every write back */
2015 ivar |= BIT(31);
2016
2017 ew32(IVAR, ivar);
2018
2019 /* enable MSI-X PBA support */
2020 ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2021 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2022 ew32(CTRL_EXT, ctrl_ext);
2023 e1e_flush();
2024 }
2025
e1000e_reset_interrupt_capability(struct e1000_adapter * adapter)2026 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2027 {
2028 if (adapter->msix_entries) {
2029 pci_disable_msix(adapter->pdev);
2030 kfree(adapter->msix_entries);
2031 adapter->msix_entries = NULL;
2032 } else if (adapter->flags & FLAG_MSI_ENABLED) {
2033 pci_disable_msi(adapter->pdev);
2034 adapter->flags &= ~FLAG_MSI_ENABLED;
2035 }
2036 }
2037
2038 /**
2039 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2040 * @adapter: board private structure
2041 *
2042 * Attempt to configure interrupts using the best available
2043 * capabilities of the hardware and kernel.
2044 **/
e1000e_set_interrupt_capability(struct e1000_adapter * adapter)2045 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2046 {
2047 int err;
2048 int i;
2049
2050 switch (adapter->int_mode) {
2051 case E1000E_INT_MODE_MSIX:
2052 if (adapter->flags & FLAG_HAS_MSIX) {
2053 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2054 adapter->msix_entries = kzalloc_objs(struct msix_entry,
2055 adapter->num_vectors);
2056 if (adapter->msix_entries) {
2057 struct e1000_adapter *a = adapter;
2058
2059 for (i = 0; i < adapter->num_vectors; i++)
2060 adapter->msix_entries[i].entry = i;
2061
2062 err = pci_enable_msix_range(a->pdev,
2063 a->msix_entries,
2064 a->num_vectors,
2065 a->num_vectors);
2066 if (err > 0)
2067 return;
2068 }
2069 /* MSI-X failed, so fall through and try MSI */
2070 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2071 e1000e_reset_interrupt_capability(adapter);
2072 }
2073 adapter->int_mode = E1000E_INT_MODE_MSI;
2074 fallthrough;
2075 case E1000E_INT_MODE_MSI:
2076 if (!pci_enable_msi(adapter->pdev)) {
2077 adapter->flags |= FLAG_MSI_ENABLED;
2078 } else {
2079 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2080 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2081 }
2082 fallthrough;
2083 case E1000E_INT_MODE_LEGACY:
2084 /* Don't do anything; this is the system default */
2085 break;
2086 }
2087
2088 /* store the number of vectors being used */
2089 adapter->num_vectors = 1;
2090 }
2091
2092 /**
2093 * e1000_request_msix - Initialize MSI-X interrupts
2094 * @adapter: board private structure
2095 *
2096 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2097 * kernel.
2098 **/
e1000_request_msix(struct e1000_adapter * adapter)2099 static int e1000_request_msix(struct e1000_adapter *adapter)
2100 {
2101 struct net_device *netdev = adapter->netdev;
2102 int err = 0, vector = 0;
2103
2104 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2105 snprintf(adapter->rx_ring->name,
2106 sizeof(adapter->rx_ring->name) - 1,
2107 "%.14s-rx-0", netdev->name);
2108 else
2109 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2110 err = request_irq(adapter->msix_entries[vector].vector,
2111 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2112 netdev);
2113 if (err)
2114 return err;
2115 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2116 E1000_EITR_82574(vector);
2117 adapter->rx_ring->itr_val = adapter->itr;
2118 vector++;
2119
2120 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2121 snprintf(adapter->tx_ring->name,
2122 sizeof(adapter->tx_ring->name) - 1,
2123 "%.14s-tx-0", netdev->name);
2124 else
2125 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2126 err = request_irq(adapter->msix_entries[vector].vector,
2127 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2128 netdev);
2129 if (err)
2130 return err;
2131 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2132 E1000_EITR_82574(vector);
2133 adapter->tx_ring->itr_val = adapter->itr;
2134 vector++;
2135
2136 err = request_irq(adapter->msix_entries[vector].vector,
2137 e1000_msix_other, 0, netdev->name, netdev);
2138 if (err)
2139 return err;
2140
2141 e1000_configure_msix(adapter);
2142
2143 return 0;
2144 }
2145
2146 /**
2147 * e1000_request_irq - initialize interrupts
2148 * @adapter: board private structure
2149 *
2150 * Attempts to configure interrupts using the best available
2151 * capabilities of the hardware and kernel.
2152 **/
e1000_request_irq(struct e1000_adapter * adapter)2153 static int e1000_request_irq(struct e1000_adapter *adapter)
2154 {
2155 struct net_device *netdev = adapter->netdev;
2156 int err;
2157
2158 if (adapter->msix_entries) {
2159 err = e1000_request_msix(adapter);
2160 if (!err)
2161 return err;
2162 /* fall back to MSI */
2163 e1000e_reset_interrupt_capability(adapter);
2164 adapter->int_mode = E1000E_INT_MODE_MSI;
2165 e1000e_set_interrupt_capability(adapter);
2166 }
2167 if (adapter->flags & FLAG_MSI_ENABLED) {
2168 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2169 netdev->name, netdev);
2170 if (!err)
2171 return err;
2172
2173 /* fall back to legacy interrupt */
2174 e1000e_reset_interrupt_capability(adapter);
2175 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2176 }
2177
2178 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2179 netdev->name, netdev);
2180 if (err)
2181 e_err("Unable to allocate interrupt, Error: %d\n", err);
2182
2183 return err;
2184 }
2185
e1000_free_irq(struct e1000_adapter * adapter)2186 static void e1000_free_irq(struct e1000_adapter *adapter)
2187 {
2188 struct net_device *netdev = adapter->netdev;
2189
2190 if (adapter->msix_entries) {
2191 int vector = 0;
2192
2193 free_irq(adapter->msix_entries[vector].vector, netdev);
2194 vector++;
2195
2196 free_irq(adapter->msix_entries[vector].vector, netdev);
2197 vector++;
2198
2199 /* Other Causes interrupt vector */
2200 free_irq(adapter->msix_entries[vector].vector, netdev);
2201 return;
2202 }
2203
2204 free_irq(adapter->pdev->irq, netdev);
2205 }
2206
2207 /**
2208 * e1000_irq_disable - Mask off interrupt generation on the NIC
2209 * @adapter: board private structure
2210 **/
e1000_irq_disable(struct e1000_adapter * adapter)2211 static void e1000_irq_disable(struct e1000_adapter *adapter)
2212 {
2213 struct e1000_hw *hw = &adapter->hw;
2214
2215 ew32(IMC, ~0);
2216 if (adapter->msix_entries)
2217 ew32(EIAC_82574, 0);
2218 e1e_flush();
2219
2220 if (adapter->msix_entries) {
2221 int i;
2222
2223 for (i = 0; i < adapter->num_vectors; i++)
2224 synchronize_irq(adapter->msix_entries[i].vector);
2225 } else {
2226 synchronize_irq(adapter->pdev->irq);
2227 }
2228 }
2229
2230 /**
2231 * e1000_irq_enable - Enable default interrupt generation settings
2232 * @adapter: board private structure
2233 **/
e1000_irq_enable(struct e1000_adapter * adapter)2234 static void e1000_irq_enable(struct e1000_adapter *adapter)
2235 {
2236 struct e1000_hw *hw = &adapter->hw;
2237
2238 if (adapter->msix_entries) {
2239 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2240 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2241 IMS_OTHER_MASK);
2242 } else if (hw->mac.type >= e1000_pch_lpt) {
2243 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2244 } else {
2245 ew32(IMS, IMS_ENABLE_MASK);
2246 }
2247 e1e_flush();
2248 }
2249
2250 /**
2251 * e1000e_get_hw_control - get control of the h/w from f/w
2252 * @adapter: address of board private structure
2253 *
2254 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2255 * For ASF and Pass Through versions of f/w this means that
2256 * the driver is loaded. For AMT version (only with 82573)
2257 * of the f/w this means that the network i/f is open.
2258 **/
e1000e_get_hw_control(struct e1000_adapter * adapter)2259 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2260 {
2261 struct e1000_hw *hw = &adapter->hw;
2262 u32 ctrl_ext;
2263 u32 swsm;
2264
2265 /* Let firmware know the driver has taken over */
2266 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2267 swsm = er32(SWSM);
2268 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2269 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2270 ctrl_ext = er32(CTRL_EXT);
2271 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2272 }
2273 }
2274
2275 /**
2276 * e1000e_release_hw_control - release control of the h/w to f/w
2277 * @adapter: address of board private structure
2278 *
2279 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2280 * For ASF and Pass Through versions of f/w this means that the
2281 * driver is no longer loaded. For AMT version (only with 82573) i
2282 * of the f/w this means that the network i/f is closed.
2283 *
2284 **/
e1000e_release_hw_control(struct e1000_adapter * adapter)2285 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2286 {
2287 struct e1000_hw *hw = &adapter->hw;
2288 u32 ctrl_ext;
2289 u32 swsm;
2290
2291 /* Let firmware taken over control of h/w */
2292 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2293 swsm = er32(SWSM);
2294 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2295 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2296 ctrl_ext = er32(CTRL_EXT);
2297 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2298 }
2299 }
2300
2301 /**
2302 * e1000_alloc_ring_dma - allocate memory for a ring structure
2303 * @adapter: board private structure
2304 * @ring: ring struct for which to allocate dma
2305 **/
e1000_alloc_ring_dma(struct e1000_adapter * adapter,struct e1000_ring * ring)2306 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2307 struct e1000_ring *ring)
2308 {
2309 struct pci_dev *pdev = adapter->pdev;
2310
2311 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2312 GFP_KERNEL);
2313 if (!ring->desc)
2314 return -ENOMEM;
2315
2316 return 0;
2317 }
2318
2319 /**
2320 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2321 * @tx_ring: Tx descriptor ring
2322 *
2323 * Return 0 on success, negative on failure
2324 **/
e1000e_setup_tx_resources(struct e1000_ring * tx_ring)2325 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2326 {
2327 struct e1000_adapter *adapter = tx_ring->adapter;
2328 int err = -ENOMEM, size;
2329
2330 size = sizeof(struct e1000_buffer) * tx_ring->count;
2331 tx_ring->buffer_info = vzalloc(size);
2332 if (!tx_ring->buffer_info)
2333 goto err;
2334
2335 /* round up to nearest 4K */
2336 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2337 tx_ring->size = ALIGN(tx_ring->size, 4096);
2338
2339 err = e1000_alloc_ring_dma(adapter, tx_ring);
2340 if (err)
2341 goto err;
2342
2343 tx_ring->next_to_use = 0;
2344 tx_ring->next_to_clean = 0;
2345
2346 return 0;
2347 err:
2348 vfree(tx_ring->buffer_info);
2349 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2350 return err;
2351 }
2352
2353 /**
2354 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2355 * @rx_ring: Rx descriptor ring
2356 *
2357 * Returns 0 on success, negative on failure
2358 **/
e1000e_setup_rx_resources(struct e1000_ring * rx_ring)2359 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2360 {
2361 struct e1000_adapter *adapter = rx_ring->adapter;
2362 struct e1000_buffer *buffer_info;
2363 int i, size, desc_len, err = -ENOMEM;
2364
2365 size = sizeof(struct e1000_buffer) * rx_ring->count;
2366 rx_ring->buffer_info = vzalloc(size);
2367 if (!rx_ring->buffer_info)
2368 goto err;
2369
2370 for (i = 0; i < rx_ring->count; i++) {
2371 buffer_info = &rx_ring->buffer_info[i];
2372 buffer_info->ps_pages = kzalloc_objs(struct e1000_ps_page,
2373 PS_PAGE_BUFFERS);
2374 if (!buffer_info->ps_pages)
2375 goto err_pages;
2376 }
2377
2378 desc_len = sizeof(union e1000_rx_desc_packet_split);
2379
2380 /* Round up to nearest 4K */
2381 rx_ring->size = rx_ring->count * desc_len;
2382 rx_ring->size = ALIGN(rx_ring->size, 4096);
2383
2384 err = e1000_alloc_ring_dma(adapter, rx_ring);
2385 if (err)
2386 goto err_pages;
2387
2388 rx_ring->next_to_clean = 0;
2389 rx_ring->next_to_use = 0;
2390 rx_ring->rx_skb_top = NULL;
2391
2392 return 0;
2393
2394 err_pages:
2395 for (i = 0; i < rx_ring->count; i++) {
2396 buffer_info = &rx_ring->buffer_info[i];
2397 kfree(buffer_info->ps_pages);
2398 }
2399 err:
2400 vfree(rx_ring->buffer_info);
2401 e_err("Unable to allocate memory for the receive descriptor ring\n");
2402 return err;
2403 }
2404
2405 /**
2406 * e1000_clean_tx_ring - Free Tx Buffers
2407 * @tx_ring: Tx descriptor ring
2408 **/
e1000_clean_tx_ring(struct e1000_ring * tx_ring)2409 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2410 {
2411 struct e1000_adapter *adapter = tx_ring->adapter;
2412 struct e1000_buffer *buffer_info;
2413 unsigned long size;
2414 unsigned int i;
2415
2416 for (i = 0; i < tx_ring->count; i++) {
2417 buffer_info = &tx_ring->buffer_info[i];
2418 e1000_put_txbuf(tx_ring, buffer_info, false);
2419 }
2420
2421 netdev_reset_queue(adapter->netdev);
2422 size = sizeof(struct e1000_buffer) * tx_ring->count;
2423 memset(tx_ring->buffer_info, 0, size);
2424
2425 memset(tx_ring->desc, 0, tx_ring->size);
2426
2427 tx_ring->next_to_use = 0;
2428 tx_ring->next_to_clean = 0;
2429 }
2430
2431 /**
2432 * e1000e_free_tx_resources - Free Tx Resources per Queue
2433 * @tx_ring: Tx descriptor ring
2434 *
2435 * Free all transmit software resources
2436 **/
e1000e_free_tx_resources(struct e1000_ring * tx_ring)2437 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2438 {
2439 struct e1000_adapter *adapter = tx_ring->adapter;
2440 struct pci_dev *pdev = adapter->pdev;
2441
2442 e1000_clean_tx_ring(tx_ring);
2443
2444 vfree(tx_ring->buffer_info);
2445 tx_ring->buffer_info = NULL;
2446
2447 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2448 tx_ring->dma);
2449 tx_ring->desc = NULL;
2450 }
2451
2452 /**
2453 * e1000e_free_rx_resources - Free Rx Resources
2454 * @rx_ring: Rx descriptor ring
2455 *
2456 * Free all receive software resources
2457 **/
e1000e_free_rx_resources(struct e1000_ring * rx_ring)2458 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2459 {
2460 struct e1000_adapter *adapter = rx_ring->adapter;
2461 struct pci_dev *pdev = adapter->pdev;
2462 int i;
2463
2464 e1000_clean_rx_ring(rx_ring);
2465
2466 for (i = 0; i < rx_ring->count; i++)
2467 kfree(rx_ring->buffer_info[i].ps_pages);
2468
2469 vfree(rx_ring->buffer_info);
2470 rx_ring->buffer_info = NULL;
2471
2472 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2473 rx_ring->dma);
2474 rx_ring->desc = NULL;
2475 }
2476
2477 /**
2478 * e1000_update_itr - update the dynamic ITR value based on statistics
2479 * @itr_setting: current adapter->itr
2480 * @packets: the number of packets during this measurement interval
2481 * @bytes: the number of bytes during this measurement interval
2482 *
2483 * Stores a new ITR value based on packets and byte
2484 * counts during the last interrupt. The advantage of per interrupt
2485 * computation is faster updates and more accurate ITR for the current
2486 * traffic pattern. Constants in this function were computed
2487 * based on theoretical maximum wire speed and thresholds were set based
2488 * on testing data as well as attempting to minimize response time
2489 * while increasing bulk throughput. This functionality is controlled
2490 * by the InterruptThrottleRate module parameter.
2491 **/
e1000_update_itr(u16 itr_setting,int packets,int bytes)2492 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2493 {
2494 unsigned int retval = itr_setting;
2495
2496 if (packets == 0)
2497 return itr_setting;
2498
2499 switch (itr_setting) {
2500 case lowest_latency:
2501 /* handle TSO and jumbo frames */
2502 if (bytes / packets > 8000)
2503 retval = bulk_latency;
2504 else if ((packets < 5) && (bytes > 512))
2505 retval = low_latency;
2506 break;
2507 case low_latency: /* 50 usec aka 20000 ints/s */
2508 if (bytes > 10000) {
2509 /* this if handles the TSO accounting */
2510 if (bytes / packets > 8000)
2511 retval = bulk_latency;
2512 else if ((packets < 10) || ((bytes / packets) > 1200))
2513 retval = bulk_latency;
2514 else if ((packets > 35))
2515 retval = lowest_latency;
2516 } else if (bytes / packets > 2000) {
2517 retval = bulk_latency;
2518 } else if (packets <= 2 && bytes < 512) {
2519 retval = lowest_latency;
2520 }
2521 break;
2522 case bulk_latency: /* 250 usec aka 4000 ints/s */
2523 if (bytes > 25000) {
2524 if (packets > 35)
2525 retval = low_latency;
2526 } else if (bytes < 6000) {
2527 retval = low_latency;
2528 }
2529 break;
2530 }
2531
2532 return retval;
2533 }
2534
e1000_set_itr(struct e1000_adapter * adapter)2535 static void e1000_set_itr(struct e1000_adapter *adapter)
2536 {
2537 u16 current_itr;
2538 u32 new_itr = adapter->itr;
2539
2540 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2541 if (adapter->link_speed != SPEED_1000) {
2542 new_itr = 4000;
2543 goto set_itr_now;
2544 }
2545
2546 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2547 new_itr = 0;
2548 goto set_itr_now;
2549 }
2550
2551 adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2552 adapter->total_tx_packets,
2553 adapter->total_tx_bytes);
2554 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2555 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2556 adapter->tx_itr = low_latency;
2557
2558 adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2559 adapter->total_rx_packets,
2560 adapter->total_rx_bytes);
2561 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2562 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2563 adapter->rx_itr = low_latency;
2564
2565 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2566
2567 /* counts and packets in update_itr are dependent on these numbers */
2568 switch (current_itr) {
2569 case lowest_latency:
2570 new_itr = 70000;
2571 break;
2572 case low_latency:
2573 new_itr = 20000; /* aka hwitr = ~200 */
2574 break;
2575 case bulk_latency:
2576 new_itr = 4000;
2577 break;
2578 default:
2579 break;
2580 }
2581
2582 set_itr_now:
2583 if (new_itr != adapter->itr) {
2584 /* this attempts to bias the interrupt rate towards Bulk
2585 * by adding intermediate steps when interrupt rate is
2586 * increasing
2587 */
2588 new_itr = new_itr > adapter->itr ?
2589 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2590 adapter->itr = new_itr;
2591 adapter->rx_ring->itr_val = new_itr;
2592 if (adapter->msix_entries)
2593 adapter->rx_ring->set_itr = 1;
2594 else
2595 e1000e_write_itr(adapter, new_itr);
2596 }
2597 }
2598
2599 /**
2600 * e1000e_write_itr - write the ITR value to the appropriate registers
2601 * @adapter: address of board private structure
2602 * @itr: new ITR value to program
2603 *
2604 * e1000e_write_itr determines if the adapter is in MSI-X mode
2605 * and, if so, writes the EITR registers with the ITR value.
2606 * Otherwise, it writes the ITR value into the ITR register.
2607 **/
e1000e_write_itr(struct e1000_adapter * adapter,u32 itr)2608 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2609 {
2610 struct e1000_hw *hw = &adapter->hw;
2611 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2612
2613 if (adapter->msix_entries) {
2614 int vector;
2615
2616 for (vector = 0; vector < adapter->num_vectors; vector++)
2617 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2618 } else {
2619 ew32(ITR, new_itr);
2620 }
2621 }
2622
2623 /**
2624 * e1000_alloc_queues - Allocate memory for all rings
2625 * @adapter: board private structure to initialize
2626 **/
e1000_alloc_queues(struct e1000_adapter * adapter)2627 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2628 {
2629 int size = sizeof(struct e1000_ring);
2630
2631 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2632 if (!adapter->tx_ring)
2633 goto err;
2634 adapter->tx_ring->count = adapter->tx_ring_count;
2635 adapter->tx_ring->adapter = adapter;
2636
2637 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2638 if (!adapter->rx_ring)
2639 goto err;
2640 adapter->rx_ring->count = adapter->rx_ring_count;
2641 adapter->rx_ring->adapter = adapter;
2642
2643 return 0;
2644 err:
2645 e_err("Unable to allocate memory for queues\n");
2646 kfree(adapter->rx_ring);
2647 kfree(adapter->tx_ring);
2648 return -ENOMEM;
2649 }
2650
2651 /**
2652 * e1000e_poll - NAPI Rx polling callback
2653 * @napi: struct associated with this polling callback
2654 * @budget: number of packets driver is allowed to process this poll
2655 **/
e1000e_poll(struct napi_struct * napi,int budget)2656 static int e1000e_poll(struct napi_struct *napi, int budget)
2657 {
2658 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2659 napi);
2660 struct e1000_hw *hw = &adapter->hw;
2661 struct net_device *poll_dev = adapter->netdev;
2662 int tx_cleaned = 1, work_done = 0;
2663
2664 adapter = netdev_priv(poll_dev);
2665
2666 if (!adapter->msix_entries ||
2667 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2668 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2669
2670 adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2671
2672 if (!tx_cleaned || work_done == budget)
2673 return budget;
2674
2675 /* Exit the polling mode, but don't re-enable interrupts if stack might
2676 * poll us due to busy-polling
2677 */
2678 if (likely(napi_complete_done(napi, work_done))) {
2679 if (adapter->itr_setting & 3)
2680 e1000_set_itr(adapter);
2681 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2682 if (adapter->msix_entries)
2683 ew32(IMS, adapter->rx_ring->ims_val);
2684 else
2685 e1000_irq_enable(adapter);
2686 }
2687 }
2688
2689 return work_done;
2690 }
2691
e1000_vlan_rx_add_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)2692 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2693 __always_unused __be16 proto, u16 vid)
2694 {
2695 struct e1000_adapter *adapter = netdev_priv(netdev);
2696 struct e1000_hw *hw = &adapter->hw;
2697 u32 vfta, index;
2698
2699 /* don't update vlan cookie if already programmed */
2700 if ((adapter->hw.mng_cookie.status &
2701 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2702 (vid == adapter->mng_vlan_id))
2703 return 0;
2704
2705 /* add VID to filter table */
2706 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2707 index = (vid >> 5) & 0x7F;
2708 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2709 vfta |= BIT((vid & 0x1F));
2710 hw->mac.ops.write_vfta(hw, index, vfta);
2711 }
2712
2713 set_bit(vid, adapter->active_vlans);
2714
2715 return 0;
2716 }
2717
e1000_vlan_rx_kill_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)2718 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2719 __always_unused __be16 proto, u16 vid)
2720 {
2721 struct e1000_adapter *adapter = netdev_priv(netdev);
2722 struct e1000_hw *hw = &adapter->hw;
2723 u32 vfta, index;
2724
2725 if ((adapter->hw.mng_cookie.status &
2726 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2727 (vid == adapter->mng_vlan_id)) {
2728 /* release control to f/w */
2729 e1000e_release_hw_control(adapter);
2730 return 0;
2731 }
2732
2733 /* remove VID from filter table */
2734 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2735 index = (vid >> 5) & 0x7F;
2736 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2737 vfta &= ~BIT((vid & 0x1F));
2738 hw->mac.ops.write_vfta(hw, index, vfta);
2739 }
2740
2741 clear_bit(vid, adapter->active_vlans);
2742
2743 return 0;
2744 }
2745
2746 /**
2747 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2748 * @adapter: board private structure to initialize
2749 **/
e1000e_vlan_filter_disable(struct e1000_adapter * adapter)2750 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2751 {
2752 struct net_device *netdev = adapter->netdev;
2753 struct e1000_hw *hw = &adapter->hw;
2754 u32 rctl;
2755
2756 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2757 /* disable VLAN receive filtering */
2758 rctl = er32(RCTL);
2759 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2760 ew32(RCTL, rctl);
2761
2762 if (adapter->mng_vlan_id != E1000_MNG_VLAN_NONE) {
2763 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2764 adapter->mng_vlan_id);
2765 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2766 }
2767 }
2768 }
2769
2770 /**
2771 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2772 * @adapter: board private structure to initialize
2773 **/
e1000e_vlan_filter_enable(struct e1000_adapter * adapter)2774 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2775 {
2776 struct e1000_hw *hw = &adapter->hw;
2777 u32 rctl;
2778
2779 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2780 /* enable VLAN receive filtering */
2781 rctl = er32(RCTL);
2782 rctl |= E1000_RCTL_VFE;
2783 rctl &= ~E1000_RCTL_CFIEN;
2784 ew32(RCTL, rctl);
2785 }
2786 }
2787
2788 /**
2789 * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2790 * @adapter: board private structure to initialize
2791 **/
e1000e_vlan_strip_disable(struct e1000_adapter * adapter)2792 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2793 {
2794 struct e1000_hw *hw = &adapter->hw;
2795 u32 ctrl;
2796
2797 /* disable VLAN tag insert/strip */
2798 ctrl = er32(CTRL);
2799 ctrl &= ~E1000_CTRL_VME;
2800 ew32(CTRL, ctrl);
2801 }
2802
2803 /**
2804 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2805 * @adapter: board private structure to initialize
2806 **/
e1000e_vlan_strip_enable(struct e1000_adapter * adapter)2807 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2808 {
2809 struct e1000_hw *hw = &adapter->hw;
2810 u32 ctrl;
2811
2812 /* enable VLAN tag insert/strip */
2813 ctrl = er32(CTRL);
2814 ctrl |= E1000_CTRL_VME;
2815 ew32(CTRL, ctrl);
2816 }
2817
e1000_update_mng_vlan(struct e1000_adapter * adapter)2818 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2819 {
2820 struct net_device *netdev = adapter->netdev;
2821 u16 vid = adapter->hw.mng_cookie.vlan_id;
2822 u16 old_vid = adapter->mng_vlan_id;
2823
2824 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2825 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2826 adapter->mng_vlan_id = vid;
2827 }
2828
2829 if (old_vid != E1000_MNG_VLAN_NONE && vid != old_vid)
2830 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2831 }
2832
e1000_restore_vlan(struct e1000_adapter * adapter)2833 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2834 {
2835 u16 vid;
2836
2837 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2838
2839 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2840 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2841 }
2842
e1000_init_manageability_pt(struct e1000_adapter * adapter)2843 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2844 {
2845 struct e1000_hw *hw = &adapter->hw;
2846 u32 manc, manc2h, mdef, i, j;
2847
2848 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2849 return;
2850
2851 manc = er32(MANC);
2852
2853 /* enable receiving management packets to the host. this will probably
2854 * generate destination unreachable messages from the host OS, but
2855 * the packets will be handled on SMBUS
2856 */
2857 manc |= E1000_MANC_EN_MNG2HOST;
2858 manc2h = er32(MANC2H);
2859
2860 switch (hw->mac.type) {
2861 default:
2862 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2863 break;
2864 case e1000_82574:
2865 case e1000_82583:
2866 /* Check if IPMI pass-through decision filter already exists;
2867 * if so, enable it.
2868 */
2869 for (i = 0, j = 0; i < 8; i++) {
2870 mdef = er32(MDEF(i));
2871
2872 /* Ignore filters with anything other than IPMI ports */
2873 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2874 continue;
2875
2876 /* Enable this decision filter in MANC2H */
2877 if (mdef)
2878 manc2h |= BIT(i);
2879
2880 j |= mdef;
2881 }
2882
2883 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2884 break;
2885
2886 /* Create new decision filter in an empty filter */
2887 for (i = 0, j = 0; i < 8; i++)
2888 if (er32(MDEF(i)) == 0) {
2889 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2890 E1000_MDEF_PORT_664));
2891 manc2h |= BIT(1);
2892 j++;
2893 break;
2894 }
2895
2896 if (!j)
2897 e_warn("Unable to create IPMI pass-through filter\n");
2898 break;
2899 }
2900
2901 ew32(MANC2H, manc2h);
2902 ew32(MANC, manc);
2903 }
2904
2905 /**
2906 * e1000_configure_tx - Configure Transmit Unit after Reset
2907 * @adapter: board private structure
2908 *
2909 * Configure the Tx unit of the MAC after a reset.
2910 **/
e1000_configure_tx(struct e1000_adapter * adapter)2911 static void e1000_configure_tx(struct e1000_adapter *adapter)
2912 {
2913 struct e1000_hw *hw = &adapter->hw;
2914 struct e1000_ring *tx_ring = adapter->tx_ring;
2915 u64 tdba;
2916 u32 tdlen, tctl, tarc;
2917
2918 /* Setup the HW Tx Head and Tail descriptor pointers */
2919 tdba = tx_ring->dma;
2920 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2921 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2922 ew32(TDBAH(0), (tdba >> 32));
2923 ew32(TDLEN(0), tdlen);
2924 ew32(TDH(0), 0);
2925 ew32(TDT(0), 0);
2926 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2927 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2928
2929 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2930 e1000e_update_tdt_wa(tx_ring, 0);
2931
2932 /* Set the Tx Interrupt Delay register */
2933 ew32(TIDV, adapter->tx_int_delay);
2934 /* Tx irq moderation */
2935 ew32(TADV, adapter->tx_abs_int_delay);
2936
2937 if (adapter->flags2 & FLAG2_DMA_BURST) {
2938 u32 txdctl = er32(TXDCTL(0));
2939
2940 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2941 E1000_TXDCTL_WTHRESH);
2942 /* set up some performance related parameters to encourage the
2943 * hardware to use the bus more efficiently in bursts, depends
2944 * on the tx_int_delay to be enabled,
2945 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2946 * hthresh = 1 ==> prefetch when one or more available
2947 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2948 * BEWARE: this seems to work but should be considered first if
2949 * there are Tx hangs or other Tx related bugs
2950 */
2951 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2952 ew32(TXDCTL(0), txdctl);
2953 }
2954 /* erratum work around: set txdctl the same for both queues */
2955 ew32(TXDCTL(1), er32(TXDCTL(0)));
2956
2957 /* Program the Transmit Control Register */
2958 tctl = er32(TCTL);
2959 tctl &= ~E1000_TCTL_CT;
2960 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2961 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2962
2963 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2964 tarc = er32(TARC(0));
2965 /* set the speed mode bit, we'll clear it if we're not at
2966 * gigabit link later
2967 */
2968 #define SPEED_MODE_BIT BIT(21)
2969 tarc |= SPEED_MODE_BIT;
2970 ew32(TARC(0), tarc);
2971 }
2972
2973 /* errata: program both queues to unweighted RR */
2974 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2975 tarc = er32(TARC(0));
2976 tarc |= 1;
2977 ew32(TARC(0), tarc);
2978 tarc = er32(TARC(1));
2979 tarc |= 1;
2980 ew32(TARC(1), tarc);
2981 }
2982
2983 /* Setup Transmit Descriptor Settings for eop descriptor */
2984 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2985
2986 /* only set IDE if we are delaying interrupts using the timers */
2987 if (adapter->tx_int_delay)
2988 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2989
2990 /* enable Report Status bit */
2991 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2992
2993 ew32(TCTL, tctl);
2994
2995 hw->mac.ops.config_collision_dist(hw);
2996
2997 /* SPT and KBL Si errata workaround to avoid data corruption */
2998 if (hw->mac.type == e1000_pch_spt) {
2999 u32 reg_val;
3000
3001 reg_val = er32(IOSFPC);
3002 reg_val |= E1000_RCTL_RDMTS_HEX;
3003 ew32(IOSFPC, reg_val);
3004
3005 reg_val = er32(TARC(0));
3006 /* SPT and KBL Si errata workaround to avoid Tx hang.
3007 * Dropping the number of outstanding requests from
3008 * 3 to 2 in order to avoid a buffer overrun.
3009 */
3010 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3011 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3012 ew32(TARC(0), reg_val);
3013 }
3014 }
3015
3016 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3017 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3018
3019 /**
3020 * e1000_setup_rctl - configure the receive control registers
3021 * @adapter: Board private structure
3022 **/
e1000_setup_rctl(struct e1000_adapter * adapter)3023 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3024 {
3025 struct e1000_hw *hw = &adapter->hw;
3026 u32 rctl, rfctl;
3027 u32 pages = 0;
3028
3029 /* Workaround Si errata on PCHx - configure jumbo frame flow.
3030 * If jumbo frames not set, program related MAC/PHY registers
3031 * to h/w defaults
3032 */
3033 if (hw->mac.type >= e1000_pch2lan) {
3034 s32 ret_val;
3035
3036 if (adapter->netdev->mtu > ETH_DATA_LEN)
3037 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3038 else
3039 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3040
3041 if (ret_val)
3042 e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3043 }
3044
3045 /* Program MC offset vector base */
3046 rctl = er32(RCTL);
3047 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3048 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3049 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3050 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3051
3052 /* Do not Store bad packets */
3053 rctl &= ~E1000_RCTL_SBP;
3054
3055 /* Enable Long Packet receive */
3056 if (adapter->netdev->mtu <= ETH_DATA_LEN)
3057 rctl &= ~E1000_RCTL_LPE;
3058 else
3059 rctl |= E1000_RCTL_LPE;
3060
3061 /* Some systems expect that the CRC is included in SMBUS traffic. The
3062 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3063 * host memory when this is enabled
3064 */
3065 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3066 rctl |= E1000_RCTL_SECRC;
3067
3068 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3069 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3070 u16 phy_data;
3071
3072 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3073 phy_data &= 0xfff8;
3074 phy_data |= BIT(2);
3075 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3076
3077 e1e_rphy(hw, 22, &phy_data);
3078 phy_data &= 0x0fff;
3079 phy_data |= BIT(14);
3080 e1e_wphy(hw, 0x10, 0x2823);
3081 e1e_wphy(hw, 0x11, 0x0003);
3082 e1e_wphy(hw, 22, phy_data);
3083 }
3084
3085 /* Setup buffer sizes */
3086 rctl &= ~E1000_RCTL_SZ_4096;
3087 rctl |= E1000_RCTL_BSEX;
3088 switch (adapter->rx_buffer_len) {
3089 case 2048:
3090 default:
3091 rctl |= E1000_RCTL_SZ_2048;
3092 rctl &= ~E1000_RCTL_BSEX;
3093 break;
3094 case 4096:
3095 rctl |= E1000_RCTL_SZ_4096;
3096 break;
3097 case 8192:
3098 rctl |= E1000_RCTL_SZ_8192;
3099 break;
3100 case 16384:
3101 rctl |= E1000_RCTL_SZ_16384;
3102 break;
3103 }
3104
3105 /* Enable Extended Status in all Receive Descriptors */
3106 rfctl = er32(RFCTL);
3107 rfctl |= E1000_RFCTL_EXTEN;
3108 ew32(RFCTL, rfctl);
3109
3110 /* 82571 and greater support packet-split where the protocol
3111 * header is placed in skb->data and the packet data is
3112 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3113 * In the case of a non-split, skb->data is linearly filled,
3114 * followed by the page buffers. Therefore, skb->data is
3115 * sized to hold the largest protocol header.
3116 *
3117 * allocations using alloc_page take too long for regular MTU
3118 * so only enable packet split for jumbo frames
3119 *
3120 * Using pages when the page size is greater than 16k wastes
3121 * a lot of memory, since we allocate 3 pages at all times
3122 * per packet.
3123 */
3124 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3125 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3126 adapter->rx_ps_pages = pages;
3127 else
3128 adapter->rx_ps_pages = 0;
3129
3130 if (adapter->rx_ps_pages) {
3131 u32 psrctl = 0;
3132
3133 /* Enable Packet split descriptors */
3134 rctl |= E1000_RCTL_DTYP_PS;
3135
3136 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3137
3138 switch (adapter->rx_ps_pages) {
3139 case 3:
3140 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3141 fallthrough;
3142 case 2:
3143 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3144 fallthrough;
3145 case 1:
3146 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3147 break;
3148 }
3149
3150 ew32(PSRCTL, psrctl);
3151 }
3152
3153 /* This is useful for sniffing bad packets. */
3154 if (adapter->netdev->features & NETIF_F_RXALL) {
3155 /* UPE and MPE will be handled by normal PROMISC logic
3156 * in e1000e_set_rx_mode
3157 */
3158 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3159 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3160 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3161
3162 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3163 E1000_RCTL_DPF | /* Allow filtered pause */
3164 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3165 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3166 * and that breaks VLANs.
3167 */
3168 }
3169
3170 ew32(RCTL, rctl);
3171 /* just started the receive unit, no need to restart */
3172 adapter->flags &= ~FLAG_RESTART_NOW;
3173 }
3174
3175 /**
3176 * e1000_configure_rx - Configure Receive Unit after Reset
3177 * @adapter: board private structure
3178 *
3179 * Configure the Rx unit of the MAC after a reset.
3180 **/
e1000_configure_rx(struct e1000_adapter * adapter)3181 static void e1000_configure_rx(struct e1000_adapter *adapter)
3182 {
3183 struct e1000_hw *hw = &adapter->hw;
3184 struct e1000_ring *rx_ring = adapter->rx_ring;
3185 u64 rdba;
3186 u32 rdlen, rctl, rxcsum, ctrl_ext;
3187
3188 if (adapter->rx_ps_pages) {
3189 /* this is a 32 byte descriptor */
3190 rdlen = rx_ring->count *
3191 sizeof(union e1000_rx_desc_packet_split);
3192 adapter->clean_rx = e1000_clean_rx_irq_ps;
3193 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3194 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3195 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3196 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3197 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3198 } else {
3199 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3200 adapter->clean_rx = e1000_clean_rx_irq;
3201 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3202 }
3203
3204 /* disable receives while setting up the descriptors */
3205 rctl = er32(RCTL);
3206 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3207 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3208 e1e_flush();
3209 usleep_range(10000, 11000);
3210
3211 if (adapter->flags2 & FLAG2_DMA_BURST) {
3212 /* set the writeback threshold (only takes effect if the RDTR
3213 * is set). set GRAN=1 and write back up to 0x4 worth, and
3214 * enable prefetching of 0x20 Rx descriptors
3215 * granularity = 01
3216 * wthresh = 04,
3217 * hthresh = 04,
3218 * pthresh = 0x20
3219 */
3220 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3221 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3222 }
3223
3224 /* set the Receive Delay Timer Register */
3225 ew32(RDTR, adapter->rx_int_delay);
3226
3227 /* irq moderation */
3228 ew32(RADV, adapter->rx_abs_int_delay);
3229 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3230 e1000e_write_itr(adapter, adapter->itr);
3231
3232 ctrl_ext = er32(CTRL_EXT);
3233 /* Auto-Mask interrupts upon ICR access */
3234 ctrl_ext |= E1000_CTRL_EXT_IAME;
3235 ew32(IAM, 0xffffffff);
3236 ew32(CTRL_EXT, ctrl_ext);
3237 e1e_flush();
3238
3239 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3240 * the Base and Length of the Rx Descriptor Ring
3241 */
3242 rdba = rx_ring->dma;
3243 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3244 ew32(RDBAH(0), (rdba >> 32));
3245 ew32(RDLEN(0), rdlen);
3246 ew32(RDH(0), 0);
3247 ew32(RDT(0), 0);
3248 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3249 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3250
3251 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3252 e1000e_update_rdt_wa(rx_ring, 0);
3253
3254 /* Enable Receive Checksum Offload for TCP and UDP */
3255 rxcsum = er32(RXCSUM);
3256 if (adapter->netdev->features & NETIF_F_RXCSUM)
3257 rxcsum |= E1000_RXCSUM_TUOFL;
3258 else
3259 rxcsum &= ~E1000_RXCSUM_TUOFL;
3260 ew32(RXCSUM, rxcsum);
3261
3262 /* With jumbo frames, excessive C-state transition latencies result
3263 * in dropped transactions.
3264 */
3265 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3266 u32 lat =
3267 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3268 adapter->max_frame_size) * 8 / 1000;
3269
3270 if (adapter->flags & FLAG_IS_ICH) {
3271 u32 rxdctl = er32(RXDCTL(0));
3272
3273 ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3274 }
3275
3276 dev_info(&adapter->pdev->dev,
3277 "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3278 cpu_latency_qos_update_request(&adapter->pm_qos_req, lat);
3279 } else {
3280 cpu_latency_qos_update_request(&adapter->pm_qos_req,
3281 PM_QOS_DEFAULT_VALUE);
3282 }
3283
3284 /* Enable Receives */
3285 ew32(RCTL, rctl);
3286 }
3287
3288 /**
3289 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3290 * @netdev: network interface device structure
3291 *
3292 * Writes multicast address list to the MTA hash table.
3293 * Returns: -ENOMEM on failure
3294 * 0 on no addresses written
3295 * X on writing X addresses to MTA
3296 */
e1000e_write_mc_addr_list(struct net_device * netdev)3297 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3298 {
3299 struct e1000_adapter *adapter = netdev_priv(netdev);
3300 struct e1000_hw *hw = &adapter->hw;
3301 struct netdev_hw_addr *ha;
3302 u8 *mta_list;
3303 int i;
3304
3305 if (netdev_mc_empty(netdev)) {
3306 /* nothing to program, so clear mc list */
3307 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3308 return 0;
3309 }
3310
3311 mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3312 if (!mta_list)
3313 return -ENOMEM;
3314
3315 /* update_mc_addr_list expects a packed array of only addresses. */
3316 i = 0;
3317 netdev_for_each_mc_addr(ha, netdev)
3318 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3319
3320 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3321 kfree(mta_list);
3322
3323 return netdev_mc_count(netdev);
3324 }
3325
3326 /**
3327 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3328 * @netdev: network interface device structure
3329 *
3330 * Writes unicast address list to the RAR table.
3331 * Returns: -ENOMEM on failure/insufficient address space
3332 * 0 on no addresses written
3333 * X on writing X addresses to the RAR table
3334 **/
e1000e_write_uc_addr_list(struct net_device * netdev)3335 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3336 {
3337 struct e1000_adapter *adapter = netdev_priv(netdev);
3338 struct e1000_hw *hw = &adapter->hw;
3339 unsigned int rar_entries;
3340 int count = 0;
3341
3342 rar_entries = hw->mac.ops.rar_get_count(hw);
3343
3344 /* save a rar entry for our hardware address */
3345 rar_entries--;
3346
3347 /* save a rar entry for the LAA workaround */
3348 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3349 rar_entries--;
3350
3351 /* return ENOMEM indicating insufficient memory for addresses */
3352 if (netdev_uc_count(netdev) > rar_entries)
3353 return -ENOMEM;
3354
3355 if (!netdev_uc_empty(netdev) && rar_entries) {
3356 struct netdev_hw_addr *ha;
3357
3358 /* write the addresses in reverse order to avoid write
3359 * combining
3360 */
3361 netdev_for_each_uc_addr(ha, netdev) {
3362 int ret_val;
3363
3364 if (!rar_entries)
3365 break;
3366 ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3367 if (ret_val < 0)
3368 return -ENOMEM;
3369 count++;
3370 }
3371 }
3372
3373 /* zero out the remaining RAR entries not used above */
3374 for (; rar_entries > 0; rar_entries--) {
3375 ew32(RAH(rar_entries), 0);
3376 ew32(RAL(rar_entries), 0);
3377 }
3378 e1e_flush();
3379
3380 return count;
3381 }
3382
3383 /**
3384 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3385 * @netdev: network interface device structure
3386 *
3387 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3388 * address list or the network interface flags are updated. This routine is
3389 * responsible for configuring the hardware for proper unicast, multicast,
3390 * promiscuous mode, and all-multi behavior.
3391 **/
e1000e_set_rx_mode(struct net_device * netdev)3392 static void e1000e_set_rx_mode(struct net_device *netdev)
3393 {
3394 struct e1000_adapter *adapter = netdev_priv(netdev);
3395 struct e1000_hw *hw = &adapter->hw;
3396 u32 rctl;
3397
3398 if (pm_runtime_suspended(netdev->dev.parent))
3399 return;
3400
3401 /* Check for Promiscuous and All Multicast modes */
3402 rctl = er32(RCTL);
3403
3404 /* clear the affected bits */
3405 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3406
3407 if (netdev->flags & IFF_PROMISC) {
3408 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3409 /* Do not hardware filter VLANs in promisc mode */
3410 e1000e_vlan_filter_disable(adapter);
3411 } else {
3412 int count;
3413
3414 if (netdev->flags & IFF_ALLMULTI) {
3415 rctl |= E1000_RCTL_MPE;
3416 } else {
3417 /* Write addresses to the MTA, if the attempt fails
3418 * then we should just turn on promiscuous mode so
3419 * that we can at least receive multicast traffic
3420 */
3421 count = e1000e_write_mc_addr_list(netdev);
3422 if (count < 0)
3423 rctl |= E1000_RCTL_MPE;
3424 }
3425 e1000e_vlan_filter_enable(adapter);
3426 /* Write addresses to available RAR registers, if there is not
3427 * sufficient space to store all the addresses then enable
3428 * unicast promiscuous mode
3429 */
3430 count = e1000e_write_uc_addr_list(netdev);
3431 if (count < 0)
3432 rctl |= E1000_RCTL_UPE;
3433 }
3434
3435 ew32(RCTL, rctl);
3436
3437 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3438 e1000e_vlan_strip_enable(adapter);
3439 else
3440 e1000e_vlan_strip_disable(adapter);
3441 }
3442
e1000e_setup_rss_hash(struct e1000_adapter * adapter)3443 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3444 {
3445 struct e1000_hw *hw = &adapter->hw;
3446 u32 mrqc, rxcsum;
3447 u32 rss_key[10];
3448 int i;
3449
3450 netdev_rss_key_fill(rss_key, sizeof(rss_key));
3451 for (i = 0; i < 10; i++)
3452 ew32(RSSRK(i), rss_key[i]);
3453
3454 /* Direct all traffic to queue 0 */
3455 for (i = 0; i < 32; i++)
3456 ew32(RETA(i), 0);
3457
3458 /* Disable raw packet checksumming so that RSS hash is placed in
3459 * descriptor on writeback.
3460 */
3461 rxcsum = er32(RXCSUM);
3462 rxcsum |= E1000_RXCSUM_PCSD;
3463
3464 ew32(RXCSUM, rxcsum);
3465
3466 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3467 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3468 E1000_MRQC_RSS_FIELD_IPV6 |
3469 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3470 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3471
3472 ew32(MRQC, mrqc);
3473 }
3474
3475 /**
3476 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3477 * @adapter: board private structure
3478 * @timinca: pointer to returned time increment attributes
3479 *
3480 * Get attributes for incrementing the System Time Register SYSTIML/H at
3481 * the default base frequency, and set the cyclecounter shift value.
3482 **/
e1000e_get_base_timinca(struct e1000_adapter * adapter,u32 * timinca)3483 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3484 {
3485 struct e1000_hw *hw = &adapter->hw;
3486 u32 incvalue, incperiod, shift;
3487
3488 /* Make sure clock is enabled on I217/I218/I219 before checking
3489 * the frequency
3490 */
3491 if ((hw->mac.type >= e1000_pch_lpt) &&
3492 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3493 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3494 u32 fextnvm7 = er32(FEXTNVM7);
3495
3496 if (!(fextnvm7 & BIT(0))) {
3497 ew32(FEXTNVM7, fextnvm7 | BIT(0));
3498 e1e_flush();
3499 }
3500 }
3501
3502 switch (hw->mac.type) {
3503 case e1000_pch2lan:
3504 /* Stable 96MHz frequency */
3505 incperiod = INCPERIOD_96MHZ;
3506 incvalue = INCVALUE_96MHZ;
3507 shift = INCVALUE_SHIFT_96MHZ;
3508 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3509 break;
3510 case e1000_pch_lpt:
3511 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3512 /* Stable 96MHz frequency */
3513 incperiod = INCPERIOD_96MHZ;
3514 incvalue = INCVALUE_96MHZ;
3515 shift = INCVALUE_SHIFT_96MHZ;
3516 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3517 } else {
3518 /* Stable 25MHz frequency */
3519 incperiod = INCPERIOD_25MHZ;
3520 incvalue = INCVALUE_25MHZ;
3521 shift = INCVALUE_SHIFT_25MHZ;
3522 adapter->cc.shift = shift;
3523 }
3524 break;
3525 case e1000_pch_spt:
3526 /* Stable 24MHz frequency */
3527 incperiod = INCPERIOD_24MHZ;
3528 incvalue = INCVALUE_24MHZ;
3529 shift = INCVALUE_SHIFT_24MHZ;
3530 adapter->cc.shift = shift;
3531 break;
3532 case e1000_pch_cnp:
3533 case e1000_pch_tgp:
3534 case e1000_pch_adp:
3535 case e1000_pch_nvp:
3536 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3537 /* Stable 24MHz frequency */
3538 incperiod = INCPERIOD_24MHZ;
3539 incvalue = INCVALUE_24MHZ;
3540 shift = INCVALUE_SHIFT_24MHZ;
3541 adapter->cc.shift = shift;
3542 } else {
3543 /* Stable 38400KHz frequency */
3544 incperiod = INCPERIOD_38400KHZ;
3545 incvalue = INCVALUE_38400KHZ;
3546 shift = INCVALUE_SHIFT_38400KHZ;
3547 adapter->cc.shift = shift;
3548 }
3549 break;
3550 case e1000_pch_mtp:
3551 case e1000_pch_lnp:
3552 case e1000_pch_ptp:
3553 /* System firmware can misreport this value, so set it to a
3554 * stable 38400KHz frequency.
3555 */
3556 incperiod = INCPERIOD_38400KHZ;
3557 incvalue = INCVALUE_38400KHZ;
3558 shift = INCVALUE_SHIFT_38400KHZ;
3559 adapter->cc.shift = shift;
3560 break;
3561 case e1000_82574:
3562 case e1000_82583:
3563 /* Stable 25MHz frequency */
3564 incperiod = INCPERIOD_25MHZ;
3565 incvalue = INCVALUE_25MHZ;
3566 shift = INCVALUE_SHIFT_25MHZ;
3567 adapter->cc.shift = shift;
3568 break;
3569 default:
3570 return -EINVAL;
3571 }
3572
3573 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3574 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3575
3576 return 0;
3577 }
3578
3579 /**
3580 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3581 * @adapter: board private structure
3582 * @config: timestamp configuration
3583 * @extack: netlink extended ACK for error report
3584 *
3585 * Outgoing time stamping can be enabled and disabled. Play nice and
3586 * disable it when requested, although it shouldn't cause any overhead
3587 * when no packet needs it. At most one packet in the queue may be
3588 * marked for time stamping, otherwise it would be impossible to tell
3589 * for sure to which packet the hardware time stamp belongs.
3590 *
3591 * Incoming time stamping has to be configured via the hardware filters.
3592 * Not all combinations are supported, in particular event type has to be
3593 * specified. Matching the kind of event packet is not supported, with the
3594 * exception of "all V2 events regardless of level 2 or 4".
3595 **/
e1000e_config_hwtstamp(struct e1000_adapter * adapter,struct kernel_hwtstamp_config * config,struct netlink_ext_ack * extack)3596 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3597 struct kernel_hwtstamp_config *config,
3598 struct netlink_ext_ack *extack)
3599 {
3600 struct e1000_hw *hw = &adapter->hw;
3601 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3602 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3603 u32 rxmtrl = 0;
3604 u16 rxudp = 0;
3605 bool is_l4 = false;
3606 bool is_l2 = false;
3607 u32 regval;
3608
3609 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
3610 NL_SET_ERR_MSG(extack, "No HW timestamp support");
3611 return -EINVAL;
3612 }
3613
3614 switch (config->tx_type) {
3615 case HWTSTAMP_TX_OFF:
3616 tsync_tx_ctl = 0;
3617 break;
3618 case HWTSTAMP_TX_ON:
3619 break;
3620 default:
3621 NL_SET_ERR_MSG(extack, "Unsupported TX HW timestamp type");
3622 return -ERANGE;
3623 }
3624
3625 switch (config->rx_filter) {
3626 case HWTSTAMP_FILTER_NONE:
3627 tsync_rx_ctl = 0;
3628 break;
3629 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3630 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3631 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3632 is_l4 = true;
3633 break;
3634 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3635 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3636 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3637 is_l4 = true;
3638 break;
3639 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3640 /* Also time stamps V2 L2 Path Delay Request/Response */
3641 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3642 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3643 is_l2 = true;
3644 break;
3645 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3646 /* Also time stamps V2 L2 Path Delay Request/Response. */
3647 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3648 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3649 is_l2 = true;
3650 break;
3651 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3652 /* Hardware cannot filter just V2 L4 Sync messages */
3653 fallthrough;
3654 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3655 /* Also time stamps V2 Path Delay Request/Response. */
3656 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3657 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3658 is_l2 = true;
3659 is_l4 = true;
3660 break;
3661 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3662 /* Hardware cannot filter just V2 L4 Delay Request messages */
3663 fallthrough;
3664 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3665 /* Also time stamps V2 Path Delay Request/Response. */
3666 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3667 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3668 is_l2 = true;
3669 is_l4 = true;
3670 break;
3671 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3672 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3673 /* Hardware cannot filter just V2 L4 or L2 Event messages */
3674 fallthrough;
3675 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3676 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3677 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3678 is_l2 = true;
3679 is_l4 = true;
3680 break;
3681 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3682 /* For V1, the hardware can only filter Sync messages or
3683 * Delay Request messages but not both so fall-through to
3684 * time stamp all packets.
3685 */
3686 fallthrough;
3687 case HWTSTAMP_FILTER_NTP_ALL:
3688 case HWTSTAMP_FILTER_ALL:
3689 is_l2 = true;
3690 is_l4 = true;
3691 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3692 config->rx_filter = HWTSTAMP_FILTER_ALL;
3693 break;
3694 default:
3695 NL_SET_ERR_MSG(extack, "Unsupported RX HW timestamp filter");
3696 return -ERANGE;
3697 }
3698
3699 adapter->hwtstamp_config = *config;
3700
3701 /* enable/disable Tx h/w time stamping */
3702 regval = er32(TSYNCTXCTL);
3703 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3704 regval |= tsync_tx_ctl;
3705 ew32(TSYNCTXCTL, regval);
3706 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3707 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3708 NL_SET_ERR_MSG(extack,
3709 "Timesync Tx Control register not set as expected");
3710 return -EAGAIN;
3711 }
3712
3713 /* enable/disable Rx h/w time stamping */
3714 regval = er32(TSYNCRXCTL);
3715 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3716 regval |= tsync_rx_ctl;
3717 ew32(TSYNCRXCTL, regval);
3718 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3719 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3720 (regval & (E1000_TSYNCRXCTL_ENABLED |
3721 E1000_TSYNCRXCTL_TYPE_MASK))) {
3722 NL_SET_ERR_MSG(extack,
3723 "Timesync Rx Control register not set as expected");
3724 return -EAGAIN;
3725 }
3726
3727 /* L2: define ethertype filter for time stamped packets */
3728 if (is_l2)
3729 rxmtrl |= ETH_P_1588;
3730
3731 /* define which PTP packets get time stamped */
3732 ew32(RXMTRL, rxmtrl);
3733
3734 /* Filter by destination port */
3735 if (is_l4) {
3736 rxudp = PTP_EV_PORT;
3737 cpu_to_be16s(&rxudp);
3738 }
3739 ew32(RXUDP, rxudp);
3740
3741 e1e_flush();
3742
3743 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3744 er32(RXSTMPH);
3745 er32(TXSTMPH);
3746
3747 return 0;
3748 }
3749
3750 /**
3751 * e1000_configure - configure the hardware for Rx and Tx
3752 * @adapter: private board structure
3753 **/
e1000_configure(struct e1000_adapter * adapter)3754 static void e1000_configure(struct e1000_adapter *adapter)
3755 {
3756 struct e1000_ring *rx_ring = adapter->rx_ring;
3757
3758 e1000e_set_rx_mode(adapter->netdev);
3759
3760 e1000_restore_vlan(adapter);
3761 e1000_init_manageability_pt(adapter);
3762
3763 e1000_configure_tx(adapter);
3764
3765 if (adapter->netdev->features & NETIF_F_RXHASH)
3766 e1000e_setup_rss_hash(adapter);
3767 e1000_setup_rctl(adapter);
3768 e1000_configure_rx(adapter);
3769 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3770 }
3771
3772 /**
3773 * e1000e_power_up_phy - restore link in case the phy was powered down
3774 * @adapter: address of board private structure
3775 *
3776 * The phy may be powered down to save power and turn off link when the
3777 * driver is unloaded and wake on lan is not enabled (among others)
3778 * *** this routine MUST be followed by a call to e1000e_reset ***
3779 **/
e1000e_power_up_phy(struct e1000_adapter * adapter)3780 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3781 {
3782 if (adapter->hw.phy.ops.power_up)
3783 adapter->hw.phy.ops.power_up(&adapter->hw);
3784
3785 adapter->hw.mac.ops.setup_link(&adapter->hw);
3786 }
3787
3788 /**
3789 * e1000_power_down_phy - Power down the PHY
3790 * @adapter: board private structure
3791 *
3792 * Power down the PHY so no link is implied when interface is down.
3793 * The PHY cannot be powered down if management or WoL is active.
3794 */
e1000_power_down_phy(struct e1000_adapter * adapter)3795 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3796 {
3797 if (adapter->hw.phy.ops.power_down)
3798 adapter->hw.phy.ops.power_down(&adapter->hw);
3799 }
3800
3801 /**
3802 * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3803 * @adapter: board private structure
3804 *
3805 * We want to clear all pending descriptors from the TX ring.
3806 * zeroing happens when the HW reads the regs. We assign the ring itself as
3807 * the data of the next descriptor. We don't care about the data we are about
3808 * to reset the HW.
3809 */
e1000_flush_tx_ring(struct e1000_adapter * adapter)3810 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3811 {
3812 struct e1000_hw *hw = &adapter->hw;
3813 struct e1000_ring *tx_ring = adapter->tx_ring;
3814 struct e1000_tx_desc *tx_desc = NULL;
3815 u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3816 u16 size = 512;
3817
3818 tctl = er32(TCTL);
3819 ew32(TCTL, tctl | E1000_TCTL_EN);
3820 tdt = er32(TDT(0));
3821 BUG_ON(tdt != tx_ring->next_to_use);
3822 tx_desc = E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3823 tx_desc->buffer_addr = cpu_to_le64(tx_ring->dma);
3824
3825 tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3826 tx_desc->upper.data = 0;
3827 /* flush descriptors to memory before notifying the HW */
3828 wmb();
3829 tx_ring->next_to_use++;
3830 if (tx_ring->next_to_use == tx_ring->count)
3831 tx_ring->next_to_use = 0;
3832 ew32(TDT(0), tx_ring->next_to_use);
3833 usleep_range(200, 250);
3834 }
3835
3836 /**
3837 * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3838 * @adapter: board private structure
3839 *
3840 * Mark all descriptors in the RX ring as consumed and disable the rx ring
3841 */
e1000_flush_rx_ring(struct e1000_adapter * adapter)3842 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3843 {
3844 u32 rctl, rxdctl;
3845 struct e1000_hw *hw = &adapter->hw;
3846
3847 rctl = er32(RCTL);
3848 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3849 e1e_flush();
3850 usleep_range(100, 150);
3851
3852 rxdctl = er32(RXDCTL(0));
3853 /* zero the lower 14 bits (prefetch and host thresholds) */
3854 rxdctl &= 0xffffc000;
3855
3856 /* update thresholds: prefetch threshold to 31, host threshold to 1
3857 * and make sure the granularity is "descriptors" and not "cache lines"
3858 */
3859 rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3860
3861 ew32(RXDCTL(0), rxdctl);
3862 /* momentarily enable the RX ring for the changes to take effect */
3863 ew32(RCTL, rctl | E1000_RCTL_EN);
3864 e1e_flush();
3865 usleep_range(100, 150);
3866 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3867 }
3868
3869 /**
3870 * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3871 * @adapter: board private structure
3872 *
3873 * In i219, the descriptor rings must be emptied before resetting the HW
3874 * or before changing the device state to D3 during runtime (runtime PM).
3875 *
3876 * Failure to do this will cause the HW to enter a unit hang state which can
3877 * only be released by PCI reset on the device
3878 *
3879 */
3880
e1000_flush_desc_rings(struct e1000_adapter * adapter)3881 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3882 {
3883 u16 hang_state;
3884 u32 fext_nvm11, tdlen;
3885 struct e1000_hw *hw = &adapter->hw;
3886
3887 /* First, disable MULR fix in FEXTNVM11 */
3888 fext_nvm11 = er32(FEXTNVM11);
3889 fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3890 ew32(FEXTNVM11, fext_nvm11);
3891 /* do nothing if we're not in faulty state, or if the queue is empty */
3892 tdlen = er32(TDLEN(0));
3893 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3894 &hang_state);
3895 if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3896 return;
3897 e1000_flush_tx_ring(adapter);
3898 /* recheck, maybe the fault is caused by the rx ring */
3899 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3900 &hang_state);
3901 if (hang_state & FLUSH_DESC_REQUIRED)
3902 e1000_flush_rx_ring(adapter);
3903 }
3904
3905 /**
3906 * e1000e_systim_reset - reset the timesync registers after a hardware reset
3907 * @adapter: board private structure
3908 *
3909 * When the MAC is reset, all hardware bits for timesync will be reset to the
3910 * default values. This function will restore the settings last in place.
3911 * Since the clock SYSTIME registers are reset, we will simply restore the
3912 * cyclecounter to the kernel real clock time.
3913 **/
e1000e_systim_reset(struct e1000_adapter * adapter)3914 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3915 {
3916 struct ptp_clock_info *info = &adapter->ptp_clock_info;
3917 struct e1000_hw *hw = &adapter->hw;
3918 struct netlink_ext_ack extack = {};
3919 unsigned long flags;
3920 u32 timinca;
3921 s32 ret_val;
3922
3923 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3924 return;
3925
3926 if (info->adjfine) {
3927 /* restore the previous ptp frequency delta */
3928 ret_val = info->adjfine(info, adapter->ptp_delta);
3929 } else {
3930 /* set the default base frequency if no adjustment possible */
3931 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3932 if (!ret_val)
3933 ew32(TIMINCA, timinca);
3934 }
3935
3936 if (ret_val) {
3937 dev_warn(&adapter->pdev->dev,
3938 "Failed to restore TIMINCA clock rate delta: %d\n",
3939 ret_val);
3940 return;
3941 }
3942
3943 /* reset the systim ns time counter */
3944 spin_lock_irqsave(&adapter->systim_lock, flags);
3945 timecounter_init(&adapter->tc, &adapter->cc,
3946 ktime_to_ns(ktime_get_real()));
3947 spin_unlock_irqrestore(&adapter->systim_lock, flags);
3948
3949 /* restore the previous hwtstamp configuration settings */
3950 ret_val = e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config,
3951 &extack);
3952 if (ret_val) {
3953 if (extack._msg)
3954 e_err("%s\n", extack._msg);
3955 }
3956 }
3957
3958 /**
3959 * e1000e_reset - bring the hardware into a known good state
3960 * @adapter: board private structure
3961 *
3962 * This function boots the hardware and enables some settings that
3963 * require a configuration cycle of the hardware - those cannot be
3964 * set/changed during runtime. After reset the device needs to be
3965 * properly configured for Rx, Tx etc.
3966 */
e1000e_reset(struct e1000_adapter * adapter)3967 void e1000e_reset(struct e1000_adapter *adapter)
3968 {
3969 struct e1000_mac_info *mac = &adapter->hw.mac;
3970 struct e1000_fc_info *fc = &adapter->hw.fc;
3971 struct e1000_hw *hw = &adapter->hw;
3972 u32 tx_space, min_tx_space, min_rx_space;
3973 u32 pba = adapter->pba;
3974 u16 hwm;
3975
3976 /* reset Packet Buffer Allocation to default */
3977 ew32(PBA, pba);
3978
3979 if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3980 /* To maintain wire speed transmits, the Tx FIFO should be
3981 * large enough to accommodate two full transmit packets,
3982 * rounded up to the next 1KB and expressed in KB. Likewise,
3983 * the Rx FIFO should be large enough to accommodate at least
3984 * one full receive packet and is similarly rounded up and
3985 * expressed in KB.
3986 */
3987 pba = er32(PBA);
3988 /* upper 16 bits has Tx packet buffer allocation size in KB */
3989 tx_space = pba >> 16;
3990 /* lower 16 bits has Rx packet buffer allocation size in KB */
3991 pba &= 0xffff;
3992 /* the Tx fifo also stores 16 bytes of information about the Tx
3993 * but don't include ethernet FCS because hardware appends it
3994 */
3995 min_tx_space = (adapter->max_frame_size +
3996 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3997 min_tx_space = ALIGN(min_tx_space, 1024);
3998 min_tx_space >>= 10;
3999 /* software strips receive CRC, so leave room for it */
4000 min_rx_space = adapter->max_frame_size;
4001 min_rx_space = ALIGN(min_rx_space, 1024);
4002 min_rx_space >>= 10;
4003
4004 /* If current Tx allocation is less than the min Tx FIFO size,
4005 * and the min Tx FIFO size is less than the current Rx FIFO
4006 * allocation, take space away from current Rx allocation
4007 */
4008 if ((tx_space < min_tx_space) &&
4009 ((min_tx_space - tx_space) < pba)) {
4010 pba -= min_tx_space - tx_space;
4011
4012 /* if short on Rx space, Rx wins and must trump Tx
4013 * adjustment
4014 */
4015 if (pba < min_rx_space)
4016 pba = min_rx_space;
4017 }
4018
4019 ew32(PBA, pba);
4020 }
4021
4022 /* flow control settings
4023 *
4024 * The high water mark must be low enough to fit one full frame
4025 * (or the size used for early receive) above it in the Rx FIFO.
4026 * Set it to the lower of:
4027 * - 90% of the Rx FIFO size, and
4028 * - the full Rx FIFO size minus one full frame
4029 */
4030 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4031 fc->pause_time = 0xFFFF;
4032 else
4033 fc->pause_time = E1000_FC_PAUSE_TIME;
4034 fc->send_xon = true;
4035 fc->current_mode = fc->requested_mode;
4036
4037 switch (hw->mac.type) {
4038 case e1000_ich9lan:
4039 case e1000_ich10lan:
4040 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4041 pba = 14;
4042 ew32(PBA, pba);
4043 fc->high_water = 0x2800;
4044 fc->low_water = fc->high_water - 8;
4045 break;
4046 }
4047 fallthrough;
4048 default:
4049 hwm = min(((pba << 10) * 9 / 10),
4050 ((pba << 10) - adapter->max_frame_size));
4051
4052 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4053 fc->low_water = fc->high_water - 8;
4054 break;
4055 case e1000_pchlan:
4056 /* Workaround PCH LOM adapter hangs with certain network
4057 * loads. If hangs persist, try disabling Tx flow control.
4058 */
4059 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4060 fc->high_water = 0x3500;
4061 fc->low_water = 0x1500;
4062 } else {
4063 fc->high_water = 0x5000;
4064 fc->low_water = 0x3000;
4065 }
4066 fc->refresh_time = 0x1000;
4067 break;
4068 case e1000_pch2lan:
4069 case e1000_pch_lpt:
4070 case e1000_pch_spt:
4071 case e1000_pch_cnp:
4072 case e1000_pch_tgp:
4073 case e1000_pch_adp:
4074 case e1000_pch_mtp:
4075 case e1000_pch_lnp:
4076 case e1000_pch_ptp:
4077 case e1000_pch_nvp:
4078 fc->refresh_time = 0xFFFF;
4079 fc->pause_time = 0xFFFF;
4080
4081 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4082 fc->high_water = 0x05C20;
4083 fc->low_water = 0x05048;
4084 break;
4085 }
4086
4087 pba = 14;
4088 ew32(PBA, pba);
4089 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4090 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4091 break;
4092 }
4093
4094 /* Alignment of Tx data is on an arbitrary byte boundary with the
4095 * maximum size per Tx descriptor limited only to the transmit
4096 * allocation of the packet buffer minus 96 bytes with an upper
4097 * limit of 24KB due to receive synchronization limitations.
4098 */
4099 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4100 24 << 10);
4101
4102 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4103 * fit in receive buffer.
4104 */
4105 if (adapter->itr_setting & 0x3) {
4106 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4107 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4108 dev_info(&adapter->pdev->dev,
4109 "Interrupt Throttle Rate off\n");
4110 adapter->flags2 |= FLAG2_DISABLE_AIM;
4111 e1000e_write_itr(adapter, 0);
4112 }
4113 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4114 dev_info(&adapter->pdev->dev,
4115 "Interrupt Throttle Rate on\n");
4116 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4117 adapter->itr = 20000;
4118 e1000e_write_itr(adapter, adapter->itr);
4119 }
4120 }
4121
4122 if (hw->mac.type >= e1000_pch_spt)
4123 e1000_flush_desc_rings(adapter);
4124 /* Allow time for pending master requests to run */
4125 mac->ops.reset_hw(hw);
4126
4127 /* For parts with AMT enabled, let the firmware know
4128 * that the network interface is in control
4129 */
4130 if (adapter->flags & FLAG_HAS_AMT)
4131 e1000e_get_hw_control(adapter);
4132
4133 ew32(WUC, 0);
4134
4135 if (mac->ops.init_hw(hw))
4136 e_err("Hardware Error\n");
4137
4138 e1000_update_mng_vlan(adapter);
4139
4140 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4141 ew32(VET, ETH_P_8021Q);
4142
4143 e1000e_reset_adaptive(hw);
4144
4145 /* restore systim and hwtstamp settings */
4146 e1000e_systim_reset(adapter);
4147
4148 /* Set EEE advertisement as appropriate */
4149 if (adapter->flags2 & FLAG2_HAS_EEE) {
4150 s32 ret_val;
4151 u16 adv_addr;
4152
4153 switch (hw->phy.type) {
4154 case e1000_phy_82579:
4155 adv_addr = I82579_EEE_ADVERTISEMENT;
4156 break;
4157 case e1000_phy_i217:
4158 adv_addr = I217_EEE_ADVERTISEMENT;
4159 break;
4160 default:
4161 dev_err(&adapter->pdev->dev,
4162 "Invalid PHY type setting EEE advertisement\n");
4163 return;
4164 }
4165
4166 ret_val = hw->phy.ops.acquire(hw);
4167 if (ret_val) {
4168 dev_err(&adapter->pdev->dev,
4169 "EEE advertisement - unable to acquire PHY\n");
4170 return;
4171 }
4172
4173 e1000_write_emi_reg_locked(hw, adv_addr,
4174 hw->dev_spec.ich8lan.eee_disable ?
4175 0 : adapter->eee_advert);
4176
4177 hw->phy.ops.release(hw);
4178 }
4179
4180 if (!netif_running(adapter->netdev) &&
4181 !test_bit(__E1000_TESTING, &adapter->state))
4182 e1000_power_down_phy(adapter);
4183
4184 e1000_get_phy_info(hw);
4185
4186 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4187 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4188 u16 phy_data = 0;
4189 /* speed up time to link by disabling smart power down, ignore
4190 * the return value of this function because there is nothing
4191 * different we would do if it failed
4192 */
4193 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4194 phy_data &= ~IGP02E1000_PM_SPD;
4195 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4196 }
4197 if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4198 u32 reg;
4199
4200 /* Fextnvm7 @ 0xe4[2] = 1 */
4201 reg = er32(FEXTNVM7);
4202 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4203 ew32(FEXTNVM7, reg);
4204 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4205 reg = er32(FEXTNVM9);
4206 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4207 E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4208 ew32(FEXTNVM9, reg);
4209 }
4210
4211 }
4212
4213 /**
4214 * e1000e_trigger_lsc - trigger an LSC interrupt
4215 * @adapter: board private structure
4216 *
4217 * Fire a link status change interrupt to start the watchdog.
4218 **/
e1000e_trigger_lsc(struct e1000_adapter * adapter)4219 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4220 {
4221 struct e1000_hw *hw = &adapter->hw;
4222
4223 if (adapter->msix_entries)
4224 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4225 else
4226 ew32(ICS, E1000_ICS_LSC);
4227 }
4228
e1000e_up(struct e1000_adapter * adapter)4229 void e1000e_up(struct e1000_adapter *adapter)
4230 {
4231 /* hardware has been reset, we need to reload some things */
4232 e1000_configure(adapter);
4233
4234 clear_bit(__E1000_DOWN, &adapter->state);
4235
4236 if (adapter->msix_entries)
4237 e1000_configure_msix(adapter);
4238 e1000_irq_enable(adapter);
4239
4240 /* Tx queue started by watchdog timer when link is up */
4241
4242 e1000e_trigger_lsc(adapter);
4243 }
4244
e1000e_flush_descriptors(struct e1000_adapter * adapter)4245 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4246 {
4247 struct e1000_hw *hw = &adapter->hw;
4248
4249 if (!(adapter->flags2 & FLAG2_DMA_BURST))
4250 return;
4251
4252 /* flush pending descriptor writebacks to memory */
4253 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4254 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4255
4256 /* execute the writes immediately */
4257 e1e_flush();
4258
4259 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4260 * write is successful
4261 */
4262 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4263 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4264
4265 /* execute the writes immediately */
4266 e1e_flush();
4267 }
4268
4269 static void e1000e_update_stats(struct e1000_adapter *adapter);
4270
4271 /**
4272 * e1000e_down - quiesce the device and optionally reset the hardware
4273 * @adapter: board private structure
4274 * @reset: boolean flag to reset the hardware or not
4275 */
e1000e_down(struct e1000_adapter * adapter,bool reset)4276 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4277 {
4278 struct net_device *netdev = adapter->netdev;
4279 struct e1000_hw *hw = &adapter->hw;
4280 u32 tctl, rctl;
4281
4282 /* signal that we're down so the interrupt handler does not
4283 * reschedule our watchdog timer
4284 */
4285 set_bit(__E1000_DOWN, &adapter->state);
4286
4287 netif_carrier_off(netdev);
4288
4289 /* disable receives in the hardware */
4290 rctl = er32(RCTL);
4291 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4292 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4293 /* flush and sleep below */
4294
4295 netif_stop_queue(netdev);
4296
4297 /* disable transmits in the hardware */
4298 tctl = er32(TCTL);
4299 tctl &= ~E1000_TCTL_EN;
4300 ew32(TCTL, tctl);
4301
4302 /* flush both disables and wait for them to finish */
4303 e1e_flush();
4304 usleep_range(10000, 11000);
4305
4306 e1000_irq_disable(adapter);
4307
4308 napi_synchronize(&adapter->napi);
4309
4310 timer_delete_sync(&adapter->watchdog_timer);
4311 timer_delete_sync(&adapter->phy_info_timer);
4312
4313 spin_lock(&adapter->stats64_lock);
4314 e1000e_update_stats(adapter);
4315 spin_unlock(&adapter->stats64_lock);
4316
4317 e1000e_flush_descriptors(adapter);
4318
4319 adapter->link_speed = 0;
4320 adapter->link_duplex = 0;
4321
4322 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4323 if ((hw->mac.type >= e1000_pch2lan) &&
4324 (adapter->netdev->mtu > ETH_DATA_LEN) &&
4325 e1000_lv_jumbo_workaround_ich8lan(hw, false))
4326 e_dbg("failed to disable jumbo frame workaround mode\n");
4327
4328 if (!pci_channel_offline(adapter->pdev)) {
4329 if (reset)
4330 e1000e_reset(adapter);
4331 else if (hw->mac.type >= e1000_pch_spt)
4332 e1000_flush_desc_rings(adapter);
4333 }
4334 e1000_clean_tx_ring(adapter->tx_ring);
4335 e1000_clean_rx_ring(adapter->rx_ring);
4336 }
4337
e1000e_reinit_locked(struct e1000_adapter * adapter)4338 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4339 {
4340 might_sleep();
4341 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4342 usleep_range(1000, 1100);
4343 e1000e_down(adapter, true);
4344 e1000e_up(adapter);
4345 clear_bit(__E1000_RESETTING, &adapter->state);
4346 }
4347
4348 /**
4349 * e1000e_sanitize_systim - sanitize raw cycle counter reads
4350 * @hw: pointer to the HW structure
4351 * @systim: PHC time value read, sanitized and returned
4352 * @sts: structure to hold system time before and after reading SYSTIML,
4353 * may be NULL
4354 *
4355 * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4356 * check to see that the time is incrementing at a reasonable
4357 * rate and is a multiple of incvalue.
4358 **/
e1000e_sanitize_systim(struct e1000_hw * hw,u64 systim,struct ptp_system_timestamp * sts)4359 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim,
4360 struct ptp_system_timestamp *sts)
4361 {
4362 u64 time_delta, rem, temp;
4363 u64 systim_next;
4364 u32 incvalue;
4365 int i;
4366
4367 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4368 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4369 /* latch SYSTIMH on read of SYSTIML */
4370 ptp_read_system_prets(sts);
4371 systim_next = (u64)er32(SYSTIML);
4372 ptp_read_system_postts(sts);
4373 systim_next |= (u64)er32(SYSTIMH) << 32;
4374
4375 time_delta = systim_next - systim;
4376 temp = time_delta;
4377 /* VMWare users have seen incvalue of zero, don't div / 0 */
4378 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4379
4380 systim = systim_next;
4381
4382 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4383 break;
4384 }
4385
4386 return systim;
4387 }
4388
4389 /**
4390 * e1000e_read_systim - read SYSTIM register
4391 * @adapter: board private structure
4392 * @sts: structure which will contain system time before and after reading
4393 * SYSTIML, may be NULL
4394 **/
e1000e_read_systim(struct e1000_adapter * adapter,struct ptp_system_timestamp * sts)4395 u64 e1000e_read_systim(struct e1000_adapter *adapter,
4396 struct ptp_system_timestamp *sts)
4397 {
4398 struct e1000_hw *hw = &adapter->hw;
4399 u32 systimel, systimel_2, systimeh;
4400 u64 systim;
4401 /* SYSTIMH latching upon SYSTIML read does not work well.
4402 * This means that if SYSTIML overflows after we read it but before
4403 * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4404 * will experience a huge non linear increment in the systime value
4405 * to fix that we test for overflow and if true, we re-read systime.
4406 */
4407 ptp_read_system_prets(sts);
4408 systimel = er32(SYSTIML);
4409 ptp_read_system_postts(sts);
4410 systimeh = er32(SYSTIMH);
4411 /* Is systimel is so large that overflow is possible? */
4412 if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4413 ptp_read_system_prets(sts);
4414 systimel_2 = er32(SYSTIML);
4415 ptp_read_system_postts(sts);
4416 if (systimel > systimel_2) {
4417 /* There was an overflow, read again SYSTIMH, and use
4418 * systimel_2
4419 */
4420 systimeh = er32(SYSTIMH);
4421 systimel = systimel_2;
4422 }
4423 }
4424 systim = (u64)systimel;
4425 systim |= (u64)systimeh << 32;
4426
4427 if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4428 systim = e1000e_sanitize_systim(hw, systim, sts);
4429
4430 return systim;
4431 }
4432
4433 /**
4434 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4435 * @cc: cyclecounter structure
4436 **/
e1000e_cyclecounter_read(struct cyclecounter * cc)4437 static u64 e1000e_cyclecounter_read(struct cyclecounter *cc)
4438 {
4439 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4440 cc);
4441
4442 return e1000e_read_systim(adapter, NULL);
4443 }
4444
4445 /**
4446 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4447 * @adapter: board private structure to initialize
4448 *
4449 * e1000_sw_init initializes the Adapter private data structure.
4450 * Fields are initialized based on PCI device information and
4451 * OS network device settings (MTU size).
4452 **/
e1000_sw_init(struct e1000_adapter * adapter)4453 static int e1000_sw_init(struct e1000_adapter *adapter)
4454 {
4455 struct net_device *netdev = adapter->netdev;
4456
4457 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4458 adapter->rx_ps_bsize0 = 128;
4459 adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4460 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4461 adapter->tx_ring_count = E1000_DEFAULT_TXD;
4462 adapter->rx_ring_count = E1000_DEFAULT_RXD;
4463
4464 spin_lock_init(&adapter->stats64_lock);
4465
4466 e1000e_set_interrupt_capability(adapter);
4467
4468 if (e1000_alloc_queues(adapter))
4469 return -ENOMEM;
4470
4471 /* Setup hardware time stamping cyclecounter */
4472 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4473 adapter->cc.read = e1000e_cyclecounter_read;
4474 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4475 adapter->cc.mult = 1;
4476 /* cc.shift set in e1000e_get_base_tininca() */
4477
4478 spin_lock_init(&adapter->systim_lock);
4479 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4480 }
4481
4482 /* Explicitly disable IRQ since the NIC can be in any state. */
4483 e1000_irq_disable(adapter);
4484
4485 set_bit(__E1000_DOWN, &adapter->state);
4486 return 0;
4487 }
4488
4489 /**
4490 * e1000_intr_msi_test - Interrupt Handler
4491 * @irq: interrupt number
4492 * @data: pointer to a network interface device structure
4493 **/
e1000_intr_msi_test(int __always_unused irq,void * data)4494 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4495 {
4496 struct net_device *netdev = data;
4497 struct e1000_adapter *adapter = netdev_priv(netdev);
4498 struct e1000_hw *hw = &adapter->hw;
4499 u32 icr = er32(ICR);
4500
4501 e_dbg("icr is %08X\n", icr);
4502 if (icr & E1000_ICR_RXSEQ) {
4503 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4504 /* Force memory writes to complete before acknowledging the
4505 * interrupt is handled.
4506 */
4507 wmb();
4508 }
4509
4510 return IRQ_HANDLED;
4511 }
4512
4513 /**
4514 * e1000_test_msi_interrupt - Returns 0 for successful test
4515 * @adapter: board private struct
4516 *
4517 * code flow taken from tg3.c
4518 **/
e1000_test_msi_interrupt(struct e1000_adapter * adapter)4519 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4520 {
4521 struct net_device *netdev = adapter->netdev;
4522 struct e1000_hw *hw = &adapter->hw;
4523 int err;
4524
4525 /* poll_enable hasn't been called yet, so don't need disable */
4526 /* clear any pending events */
4527 er32(ICR);
4528
4529 /* free the real vector and request a test handler */
4530 e1000_free_irq(adapter);
4531 e1000e_reset_interrupt_capability(adapter);
4532
4533 /* Assume that the test fails, if it succeeds then the test
4534 * MSI irq handler will unset this flag
4535 */
4536 adapter->flags |= FLAG_MSI_TEST_FAILED;
4537
4538 err = pci_enable_msi(adapter->pdev);
4539 if (err)
4540 goto msi_test_failed;
4541
4542 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4543 netdev->name, netdev);
4544 if (err) {
4545 pci_disable_msi(adapter->pdev);
4546 goto msi_test_failed;
4547 }
4548
4549 /* Force memory writes to complete before enabling and firing an
4550 * interrupt.
4551 */
4552 wmb();
4553
4554 e1000_irq_enable(adapter);
4555
4556 /* fire an unusual interrupt on the test handler */
4557 ew32(ICS, E1000_ICS_RXSEQ);
4558 e1e_flush();
4559 msleep(100);
4560
4561 e1000_irq_disable(adapter);
4562
4563 rmb(); /* read flags after interrupt has been fired */
4564
4565 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4566 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4567 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4568 } else {
4569 e_dbg("MSI interrupt test succeeded!\n");
4570 }
4571
4572 free_irq(adapter->pdev->irq, netdev);
4573 pci_disable_msi(adapter->pdev);
4574
4575 msi_test_failed:
4576 e1000e_set_interrupt_capability(adapter);
4577 return e1000_request_irq(adapter);
4578 }
4579
4580 /**
4581 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4582 * @adapter: board private struct
4583 *
4584 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4585 **/
e1000_test_msi(struct e1000_adapter * adapter)4586 static int e1000_test_msi(struct e1000_adapter *adapter)
4587 {
4588 int err;
4589 u16 pci_cmd;
4590
4591 if (!(adapter->flags & FLAG_MSI_ENABLED))
4592 return 0;
4593
4594 /* disable SERR in case the MSI write causes a master abort */
4595 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4596 if (pci_cmd & PCI_COMMAND_SERR)
4597 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4598 pci_cmd & ~PCI_COMMAND_SERR);
4599
4600 err = e1000_test_msi_interrupt(adapter);
4601
4602 /* re-enable SERR */
4603 if (pci_cmd & PCI_COMMAND_SERR) {
4604 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4605 pci_cmd |= PCI_COMMAND_SERR;
4606 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4607 }
4608
4609 return err;
4610 }
4611
4612 /**
4613 * e1000e_open - Called when a network interface is made active
4614 * @netdev: network interface device structure
4615 *
4616 * Returns 0 on success, negative value on failure
4617 *
4618 * The open entry point is called when a network interface is made
4619 * active by the system (IFF_UP). At this point all resources needed
4620 * for transmit and receive operations are allocated, the interrupt
4621 * handler is registered with the OS, the watchdog timer is started,
4622 * and the stack is notified that the interface is ready.
4623 **/
e1000e_open(struct net_device * netdev)4624 int e1000e_open(struct net_device *netdev)
4625 {
4626 struct e1000_adapter *adapter = netdev_priv(netdev);
4627 struct e1000_hw *hw = &adapter->hw;
4628 struct pci_dev *pdev = adapter->pdev;
4629 int err;
4630 int irq;
4631
4632 /* disallow open during test */
4633 if (test_bit(__E1000_TESTING, &adapter->state))
4634 return -EBUSY;
4635
4636 pm_runtime_get_sync(&pdev->dev);
4637
4638 netif_carrier_off(netdev);
4639 netif_stop_queue(netdev);
4640
4641 /* allocate transmit descriptors */
4642 err = e1000e_setup_tx_resources(adapter->tx_ring);
4643 if (err)
4644 goto err_setup_tx;
4645
4646 /* allocate receive descriptors */
4647 err = e1000e_setup_rx_resources(adapter->rx_ring);
4648 if (err)
4649 goto err_setup_rx;
4650
4651 /* If AMT is enabled, let the firmware know that the network
4652 * interface is now open and reset the part to a known state.
4653 */
4654 if (adapter->flags & FLAG_HAS_AMT) {
4655 e1000e_get_hw_control(adapter);
4656 e1000e_reset(adapter);
4657 }
4658
4659 e1000e_power_up_phy(adapter);
4660
4661 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4662 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4663 e1000_update_mng_vlan(adapter);
4664
4665 /* DMA latency requirement to workaround jumbo issue */
4666 cpu_latency_qos_add_request(&adapter->pm_qos_req, PM_QOS_DEFAULT_VALUE);
4667
4668 /* before we allocate an interrupt, we must be ready to handle it.
4669 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4670 * as soon as we call pci_request_irq, so we have to setup our
4671 * clean_rx handler before we do so.
4672 */
4673 e1000_configure(adapter);
4674
4675 err = e1000_request_irq(adapter);
4676 if (err)
4677 goto err_req_irq;
4678
4679 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4680 * ignore e1000e MSI messages, which means we need to test our MSI
4681 * interrupt now
4682 */
4683 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4684 err = e1000_test_msi(adapter);
4685 if (err) {
4686 e_err("Interrupt allocation failed\n");
4687 goto err_req_irq;
4688 }
4689 }
4690
4691 /* From here on the code is the same as e1000e_up() */
4692 clear_bit(__E1000_DOWN, &adapter->state);
4693
4694 if (adapter->int_mode == E1000E_INT_MODE_MSIX)
4695 irq = adapter->msix_entries[0].vector;
4696 else
4697 irq = adapter->pdev->irq;
4698
4699 netif_napi_set_irq(&adapter->napi, irq);
4700 napi_enable(&adapter->napi);
4701 netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_RX, &adapter->napi);
4702 netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_TX, &adapter->napi);
4703
4704 e1000_irq_enable(adapter);
4705
4706 adapter->tx_hang_recheck = false;
4707
4708 hw->mac.get_link_status = true;
4709 pm_runtime_put(&pdev->dev);
4710
4711 e1000e_trigger_lsc(adapter);
4712
4713 return 0;
4714
4715 err_req_irq:
4716 cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4717 e1000e_release_hw_control(adapter);
4718 e1000_power_down_phy(adapter);
4719 e1000e_free_rx_resources(adapter->rx_ring);
4720 err_setup_rx:
4721 e1000e_free_tx_resources(adapter->tx_ring);
4722 err_setup_tx:
4723 e1000e_reset(adapter);
4724 pm_runtime_put_sync(&pdev->dev);
4725
4726 return err;
4727 }
4728
4729 /**
4730 * e1000e_close - Disables a network interface
4731 * @netdev: network interface device structure
4732 *
4733 * Returns 0, this is not allowed to fail
4734 *
4735 * The close entry point is called when an interface is de-activated
4736 * by the OS. The hardware is still under the drivers control, but
4737 * needs to be disabled. A global MAC reset is issued to stop the
4738 * hardware, and all transmit and receive resources are freed.
4739 **/
e1000e_close(struct net_device * netdev)4740 int e1000e_close(struct net_device *netdev)
4741 {
4742 struct e1000_adapter *adapter = netdev_priv(netdev);
4743 struct pci_dev *pdev = adapter->pdev;
4744 int count = E1000_CHECK_RESET_COUNT;
4745
4746 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4747 usleep_range(10000, 11000);
4748
4749 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4750
4751 pm_runtime_get_sync(&pdev->dev);
4752
4753 if (netif_device_present(netdev)) {
4754 e1000e_down(adapter, true);
4755 e1000_free_irq(adapter);
4756
4757 /* Link status message must follow this format */
4758 netdev_info(netdev, "NIC Link is Down\n");
4759 }
4760
4761 netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_RX, NULL);
4762 netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_TX, NULL);
4763 napi_disable(&adapter->napi);
4764
4765 e1000e_free_tx_resources(adapter->tx_ring);
4766 e1000e_free_rx_resources(adapter->rx_ring);
4767
4768 /* kill manageability vlan ID if supported, but not if a vlan with
4769 * the same ID is registered on the host OS (let 8021q kill it)
4770 */
4771 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4772 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4773 adapter->mng_vlan_id);
4774
4775 /* If AMT is enabled, let the firmware know that the network
4776 * interface is now closed
4777 */
4778 if ((adapter->flags & FLAG_HAS_AMT) &&
4779 !test_bit(__E1000_TESTING, &adapter->state))
4780 e1000e_release_hw_control(adapter);
4781
4782 cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4783
4784 pm_runtime_put_sync(&pdev->dev);
4785
4786 return 0;
4787 }
4788
4789 /**
4790 * e1000_set_mac - Change the Ethernet Address of the NIC
4791 * @netdev: network interface device structure
4792 * @p: pointer to an address structure
4793 *
4794 * Returns 0 on success, negative on failure
4795 **/
e1000_set_mac(struct net_device * netdev,void * p)4796 static int e1000_set_mac(struct net_device *netdev, void *p)
4797 {
4798 struct e1000_adapter *adapter = netdev_priv(netdev);
4799 struct e1000_hw *hw = &adapter->hw;
4800 struct sockaddr *addr = p;
4801
4802 if (!is_valid_ether_addr(addr->sa_data))
4803 return -EADDRNOTAVAIL;
4804
4805 eth_hw_addr_set(netdev, addr->sa_data);
4806 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4807
4808 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4809
4810 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4811 /* activate the work around */
4812 e1000e_set_laa_state_82571(&adapter->hw, 1);
4813
4814 /* Hold a copy of the LAA in RAR[14] This is done so that
4815 * between the time RAR[0] gets clobbered and the time it
4816 * gets fixed (in e1000_watchdog), the actual LAA is in one
4817 * of the RARs and no incoming packets directed to this port
4818 * are dropped. Eventually the LAA will be in RAR[0] and
4819 * RAR[14]
4820 */
4821 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4822 adapter->hw.mac.rar_entry_count - 1);
4823 }
4824
4825 return 0;
4826 }
4827
4828 /**
4829 * e1000e_update_phy_task - work thread to update phy
4830 * @work: pointer to our work struct
4831 *
4832 * this worker thread exists because we must acquire a
4833 * semaphore to read the phy, which we could msleep while
4834 * waiting for it, and we can't msleep in a timer.
4835 **/
e1000e_update_phy_task(struct work_struct * work)4836 static void e1000e_update_phy_task(struct work_struct *work)
4837 {
4838 struct e1000_adapter *adapter = container_of(work,
4839 struct e1000_adapter,
4840 update_phy_task);
4841 struct e1000_hw *hw = &adapter->hw;
4842
4843 if (test_bit(__E1000_DOWN, &adapter->state))
4844 return;
4845
4846 e1000_get_phy_info(hw);
4847
4848 /* Enable EEE on 82579 after link up */
4849 if (hw->phy.type >= e1000_phy_82579)
4850 e1000_set_eee_pchlan(hw);
4851 }
4852
4853 /**
4854 * e1000_update_phy_info - timre call-back to update PHY info
4855 * @t: pointer to timer_list containing private info adapter
4856 *
4857 * Need to wait a few seconds after link up to get diagnostic information from
4858 * the phy
4859 **/
e1000_update_phy_info(struct timer_list * t)4860 static void e1000_update_phy_info(struct timer_list *t)
4861 {
4862 struct e1000_adapter *adapter = timer_container_of(adapter, t,
4863 phy_info_timer);
4864
4865 if (test_bit(__E1000_DOWN, &adapter->state))
4866 return;
4867
4868 schedule_work(&adapter->update_phy_task);
4869 }
4870
4871 /**
4872 * e1000e_update_phy_stats - Update the PHY statistics counters
4873 * @adapter: board private structure
4874 *
4875 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4876 **/
e1000e_update_phy_stats(struct e1000_adapter * adapter)4877 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4878 {
4879 struct e1000_hw *hw = &adapter->hw;
4880 s32 ret_val;
4881 u16 phy_data;
4882
4883 ret_val = hw->phy.ops.acquire(hw);
4884 if (ret_val)
4885 return;
4886
4887 /* A page set is expensive so check if already on desired page.
4888 * If not, set to the page with the PHY status registers.
4889 */
4890 hw->phy.addr = 1;
4891 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4892 &phy_data);
4893 if (ret_val)
4894 goto release;
4895 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4896 ret_val = hw->phy.ops.set_page(hw,
4897 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4898 if (ret_val)
4899 goto release;
4900 }
4901
4902 /* Single Collision Count */
4903 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4904 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4905 if (!ret_val)
4906 adapter->stats.scc += phy_data;
4907
4908 /* Excessive Collision Count */
4909 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4910 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4911 if (!ret_val)
4912 adapter->stats.ecol += phy_data;
4913
4914 /* Multiple Collision Count */
4915 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4916 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4917 if (!ret_val)
4918 adapter->stats.mcc += phy_data;
4919
4920 /* Late Collision Count */
4921 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4922 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4923 if (!ret_val)
4924 adapter->stats.latecol += phy_data;
4925
4926 /* Collision Count - also used for adaptive IFS */
4927 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4928 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4929 if (!ret_val)
4930 hw->mac.collision_delta = phy_data;
4931
4932 /* Defer Count */
4933 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4934 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4935 if (!ret_val)
4936 adapter->stats.dc += phy_data;
4937
4938 /* Transmit with no CRS */
4939 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4940 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4941 if (!ret_val)
4942 adapter->stats.tncrs += phy_data;
4943
4944 release:
4945 hw->phy.ops.release(hw);
4946 }
4947
4948 /**
4949 * e1000e_update_stats - Update the board statistics counters
4950 * @adapter: board private structure
4951 **/
e1000e_update_stats(struct e1000_adapter * adapter)4952 static void e1000e_update_stats(struct e1000_adapter *adapter)
4953 {
4954 struct net_device *netdev = adapter->netdev;
4955 struct e1000_hw *hw = &adapter->hw;
4956 struct pci_dev *pdev = adapter->pdev;
4957
4958 /* Prevent stats update while adapter is being reset, or if the pci
4959 * connection is down.
4960 */
4961 if (adapter->link_speed == 0)
4962 return;
4963 if (pci_channel_offline(pdev))
4964 return;
4965
4966 adapter->stats.crcerrs += er32(CRCERRS);
4967 adapter->stats.gprc += er32(GPRC);
4968 adapter->stats.gorc += er32(GORCL);
4969 er32(GORCH); /* Clear gorc */
4970 adapter->stats.bprc += er32(BPRC);
4971 adapter->stats.mprc += er32(MPRC);
4972 adapter->stats.roc += er32(ROC);
4973
4974 adapter->stats.mpc += er32(MPC);
4975
4976 /* Half-duplex statistics */
4977 if (adapter->link_duplex == HALF_DUPLEX) {
4978 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4979 e1000e_update_phy_stats(adapter);
4980 } else {
4981 adapter->stats.scc += er32(SCC);
4982 adapter->stats.ecol += er32(ECOL);
4983 adapter->stats.mcc += er32(MCC);
4984 adapter->stats.latecol += er32(LATECOL);
4985 adapter->stats.dc += er32(DC);
4986
4987 hw->mac.collision_delta = er32(COLC);
4988
4989 if ((hw->mac.type != e1000_82574) &&
4990 (hw->mac.type != e1000_82583))
4991 adapter->stats.tncrs += er32(TNCRS);
4992 }
4993 adapter->stats.colc += hw->mac.collision_delta;
4994 }
4995
4996 adapter->stats.xonrxc += er32(XONRXC);
4997 adapter->stats.xontxc += er32(XONTXC);
4998 adapter->stats.xoffrxc += er32(XOFFRXC);
4999 adapter->stats.xofftxc += er32(XOFFTXC);
5000 adapter->stats.gptc += er32(GPTC);
5001 adapter->stats.gotc += er32(GOTCL);
5002 er32(GOTCH); /* Clear gotc */
5003 adapter->stats.rnbc += er32(RNBC);
5004 adapter->stats.ruc += er32(RUC);
5005
5006 adapter->stats.mptc += er32(MPTC);
5007 adapter->stats.bptc += er32(BPTC);
5008
5009 /* used for adaptive IFS */
5010
5011 hw->mac.tx_packet_delta = er32(TPT);
5012 adapter->stats.tpt += hw->mac.tx_packet_delta;
5013
5014 adapter->stats.algnerrc += er32(ALGNERRC);
5015 adapter->stats.rxerrc += er32(RXERRC);
5016 adapter->stats.cexterr += er32(CEXTERR);
5017 adapter->stats.tsctc += er32(TSCTC);
5018 adapter->stats.tsctfc += er32(TSCTFC);
5019
5020 /* Fill out the OS statistics structure */
5021 netdev->stats.multicast = adapter->stats.mprc;
5022 netdev->stats.collisions = adapter->stats.colc;
5023
5024 /* Rx Errors */
5025
5026 /* RLEC on some newer hardware can be incorrect so build
5027 * our own version based on RUC and ROC
5028 */
5029 netdev->stats.rx_errors = adapter->stats.rxerrc +
5030 adapter->stats.crcerrs + adapter->stats.algnerrc +
5031 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5032 netdev->stats.rx_length_errors = adapter->stats.ruc +
5033 adapter->stats.roc;
5034 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
5035 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
5036 netdev->stats.rx_missed_errors = adapter->stats.mpc;
5037
5038 /* Tx Errors */
5039 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5040 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
5041 netdev->stats.tx_window_errors = adapter->stats.latecol;
5042 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5043
5044 /* Tx Dropped needs to be maintained elsewhere */
5045
5046 /* Management Stats */
5047 adapter->stats.mgptc += er32(MGTPTC);
5048 adapter->stats.mgprc += er32(MGTPRC);
5049 adapter->stats.mgpdc += er32(MGTPDC);
5050
5051 /* Correctable ECC Errors */
5052 if (hw->mac.type >= e1000_pch_lpt) {
5053 u32 pbeccsts = er32(PBECCSTS);
5054
5055 adapter->corr_errors +=
5056 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5057 adapter->uncorr_errors +=
5058 FIELD_GET(E1000_PBECCSTS_UNCORR_ERR_CNT_MASK, pbeccsts);
5059 }
5060 }
5061
5062 /**
5063 * e1000_phy_read_status - Update the PHY register status snapshot
5064 * @adapter: board private structure
5065 **/
e1000_phy_read_status(struct e1000_adapter * adapter)5066 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5067 {
5068 struct e1000_hw *hw = &adapter->hw;
5069 struct e1000_phy_regs *phy = &adapter->phy_regs;
5070
5071 if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5072 (er32(STATUS) & E1000_STATUS_LU) &&
5073 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5074 int ret_val;
5075
5076 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5077 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5078 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5079 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5080 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5081 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5082 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5083 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5084 if (ret_val)
5085 e_warn("Error reading PHY register\n");
5086 } else {
5087 /* Do not read PHY registers if link is not up
5088 * Set values to typical power-on defaults
5089 */
5090 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5091 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5092 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5093 BMSR_ERCAP);
5094 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5095 ADVERTISE_ALL | ADVERTISE_CSMA);
5096 phy->lpa = 0;
5097 phy->expansion = EXPANSION_ENABLENPAGE;
5098 phy->ctrl1000 = ADVERTISE_1000FULL;
5099 phy->stat1000 = 0;
5100 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5101 }
5102 }
5103
e1000_print_link_info(struct e1000_adapter * adapter)5104 static void e1000_print_link_info(struct e1000_adapter *adapter)
5105 {
5106 struct e1000_hw *hw = &adapter->hw;
5107 u32 ctrl = er32(CTRL);
5108
5109 /* Link status message must follow this format for user tools */
5110 netdev_info(adapter->netdev,
5111 "NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5112 adapter->link_speed,
5113 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5114 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5115 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5116 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5117 }
5118
e1000e_has_link(struct e1000_adapter * adapter)5119 static bool e1000e_has_link(struct e1000_adapter *adapter)
5120 {
5121 struct e1000_hw *hw = &adapter->hw;
5122 bool link_active = false;
5123 s32 ret_val = 0;
5124
5125 /* get_link_status is set on LSC (link status) interrupt or
5126 * Rx sequence error interrupt. get_link_status will stay
5127 * true until the check_for_link establishes link
5128 * for copper adapters ONLY
5129 */
5130 switch (hw->phy.media_type) {
5131 case e1000_media_type_copper:
5132 if (hw->mac.get_link_status) {
5133 ret_val = hw->mac.ops.check_for_link(hw);
5134 link_active = !hw->mac.get_link_status;
5135 } else {
5136 link_active = true;
5137 }
5138 break;
5139 case e1000_media_type_fiber:
5140 ret_val = hw->mac.ops.check_for_link(hw);
5141 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5142 break;
5143 case e1000_media_type_internal_serdes:
5144 ret_val = hw->mac.ops.check_for_link(hw);
5145 link_active = hw->mac.serdes_has_link;
5146 break;
5147 default:
5148 case e1000_media_type_unknown:
5149 break;
5150 }
5151
5152 if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5153 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5154 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5155 e_info("Gigabit has been disabled, downgrading speed\n");
5156 }
5157
5158 return link_active;
5159 }
5160
e1000e_enable_receives(struct e1000_adapter * adapter)5161 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5162 {
5163 /* make sure the receive unit is started */
5164 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5165 (adapter->flags & FLAG_RESTART_NOW)) {
5166 struct e1000_hw *hw = &adapter->hw;
5167 u32 rctl = er32(RCTL);
5168
5169 ew32(RCTL, rctl | E1000_RCTL_EN);
5170 adapter->flags &= ~FLAG_RESTART_NOW;
5171 }
5172 }
5173
e1000e_check_82574_phy_workaround(struct e1000_adapter * adapter)5174 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5175 {
5176 struct e1000_hw *hw = &adapter->hw;
5177
5178 /* With 82574 controllers, PHY needs to be checked periodically
5179 * for hung state and reset, if two calls return true
5180 */
5181 if (e1000_check_phy_82574(hw))
5182 adapter->phy_hang_count++;
5183 else
5184 adapter->phy_hang_count = 0;
5185
5186 if (adapter->phy_hang_count > 1) {
5187 adapter->phy_hang_count = 0;
5188 e_dbg("PHY appears hung - resetting\n");
5189 schedule_work(&adapter->reset_task);
5190 }
5191 }
5192
5193 /**
5194 * e1000_watchdog - Timer Call-back
5195 * @t: pointer to timer_list containing private info adapter
5196 **/
e1000_watchdog(struct timer_list * t)5197 static void e1000_watchdog(struct timer_list *t)
5198 {
5199 struct e1000_adapter *adapter = timer_container_of(adapter, t,
5200 watchdog_timer);
5201
5202 /* Do the rest outside of interrupt context */
5203 schedule_work(&adapter->watchdog_task);
5204
5205 /* TODO: make this use queue_delayed_work() */
5206 }
5207
e1000_watchdog_task(struct work_struct * work)5208 static void e1000_watchdog_task(struct work_struct *work)
5209 {
5210 struct e1000_adapter *adapter = container_of(work,
5211 struct e1000_adapter,
5212 watchdog_task);
5213 struct net_device *netdev = adapter->netdev;
5214 struct e1000_mac_info *mac = &adapter->hw.mac;
5215 struct e1000_phy_info *phy = &adapter->hw.phy;
5216 struct e1000_ring *tx_ring = adapter->tx_ring;
5217 u32 dmoff_exit_timeout = 100, tries = 0;
5218 struct e1000_hw *hw = &adapter->hw;
5219 u32 link, tctl, pcim_state;
5220
5221 if (test_bit(__E1000_DOWN, &adapter->state))
5222 return;
5223
5224 link = e1000e_has_link(adapter);
5225 if ((netif_carrier_ok(netdev)) && link) {
5226 /* Cancel scheduled suspend requests. */
5227 pm_runtime_resume(netdev->dev.parent);
5228
5229 e1000e_enable_receives(adapter);
5230 goto link_up;
5231 }
5232
5233 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5234 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5235 e1000_update_mng_vlan(adapter);
5236
5237 if (link) {
5238 if (!netif_carrier_ok(netdev)) {
5239 bool txb2b = true;
5240
5241 /* Cancel scheduled suspend requests. */
5242 pm_runtime_resume(netdev->dev.parent);
5243
5244 /* Checking if MAC is in DMoff state*/
5245 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {
5246 pcim_state = er32(STATUS);
5247 while (pcim_state & E1000_STATUS_PCIM_STATE) {
5248 if (tries++ == dmoff_exit_timeout) {
5249 e_dbg("Error in exiting dmoff\n");
5250 break;
5251 }
5252 usleep_range(10000, 20000);
5253 pcim_state = er32(STATUS);
5254
5255 /* Checking if MAC exited DMoff state */
5256 if (!(pcim_state & E1000_STATUS_PCIM_STATE))
5257 e1000_phy_hw_reset(&adapter->hw);
5258 }
5259 }
5260
5261 /* update snapshot of PHY registers on LSC */
5262 e1000_phy_read_status(adapter);
5263 mac->ops.get_link_up_info(&adapter->hw,
5264 &adapter->link_speed,
5265 &adapter->link_duplex);
5266 e1000_print_link_info(adapter);
5267
5268 /* check if SmartSpeed worked */
5269 e1000e_check_downshift(hw);
5270 if (phy->speed_downgraded)
5271 netdev_warn(netdev,
5272 "Link Speed was downgraded by SmartSpeed\n");
5273
5274 /* On supported PHYs, check for duplex mismatch only
5275 * if link has autonegotiated at 10/100 half
5276 */
5277 if ((hw->phy.type == e1000_phy_igp_3 ||
5278 hw->phy.type == e1000_phy_bm) &&
5279 hw->mac.autoneg &&
5280 (adapter->link_speed == SPEED_10 ||
5281 adapter->link_speed == SPEED_100) &&
5282 (adapter->link_duplex == HALF_DUPLEX)) {
5283 u16 autoneg_exp;
5284
5285 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5286
5287 if (!(autoneg_exp & EXPANSION_NWAY))
5288 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
5289 }
5290
5291 /* adjust timeout factor according to speed/duplex */
5292 adapter->tx_timeout_factor = 1;
5293 switch (adapter->link_speed) {
5294 case SPEED_10:
5295 txb2b = false;
5296 adapter->tx_timeout_factor = 16;
5297 break;
5298 case SPEED_100:
5299 txb2b = false;
5300 adapter->tx_timeout_factor = 10;
5301 break;
5302 }
5303
5304 /* workaround: re-program speed mode bit after
5305 * link-up event
5306 */
5307 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5308 !txb2b) {
5309 u32 tarc0;
5310
5311 tarc0 = er32(TARC(0));
5312 tarc0 &= ~SPEED_MODE_BIT;
5313 ew32(TARC(0), tarc0);
5314 }
5315
5316 /* enable transmits in the hardware, need to do this
5317 * after setting TARC(0)
5318 */
5319 tctl = er32(TCTL);
5320 tctl |= E1000_TCTL_EN;
5321 ew32(TCTL, tctl);
5322
5323 /* Perform any post-link-up configuration before
5324 * reporting link up.
5325 */
5326 if (phy->ops.cfg_on_link_up)
5327 phy->ops.cfg_on_link_up(hw);
5328
5329 netif_wake_queue(netdev);
5330 netif_carrier_on(netdev);
5331
5332 if (!test_bit(__E1000_DOWN, &adapter->state))
5333 mod_timer(&adapter->phy_info_timer,
5334 round_jiffies(jiffies + 2 * HZ));
5335 }
5336 } else {
5337 if (netif_carrier_ok(netdev)) {
5338 adapter->link_speed = 0;
5339 adapter->link_duplex = 0;
5340 /* Link status message must follow this format */
5341 netdev_info(netdev, "NIC Link is Down\n");
5342 netif_carrier_off(netdev);
5343 netif_stop_queue(netdev);
5344 if (!test_bit(__E1000_DOWN, &adapter->state))
5345 mod_timer(&adapter->phy_info_timer,
5346 round_jiffies(jiffies + 2 * HZ));
5347
5348 /* 8000ES2LAN requires a Rx packet buffer work-around
5349 * on link down event; reset the controller to flush
5350 * the Rx packet buffer.
5351 */
5352 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5353 adapter->flags |= FLAG_RESTART_NOW;
5354 else
5355 pm_schedule_suspend(netdev->dev.parent,
5356 LINK_TIMEOUT);
5357 }
5358 }
5359
5360 link_up:
5361 spin_lock(&adapter->stats64_lock);
5362 e1000e_update_stats(adapter);
5363
5364 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5365 adapter->tpt_old = adapter->stats.tpt;
5366 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5367 adapter->colc_old = adapter->stats.colc;
5368
5369 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5370 adapter->gorc_old = adapter->stats.gorc;
5371 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5372 adapter->gotc_old = adapter->stats.gotc;
5373 spin_unlock(&adapter->stats64_lock);
5374
5375 /* If the link is lost the controller stops DMA, but
5376 * if there is queued Tx work it cannot be done. So
5377 * reset the controller to flush the Tx packet buffers.
5378 */
5379 if (!netif_carrier_ok(netdev) &&
5380 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5381 adapter->flags |= FLAG_RESTART_NOW;
5382
5383 /* If reset is necessary, do it outside of interrupt context. */
5384 if (adapter->flags & FLAG_RESTART_NOW) {
5385 schedule_work(&adapter->reset_task);
5386 /* return immediately since reset is imminent */
5387 return;
5388 }
5389
5390 e1000e_update_adaptive(&adapter->hw);
5391
5392 /* Simple mode for Interrupt Throttle Rate (ITR) */
5393 if (adapter->itr_setting == 4) {
5394 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5395 * Total asymmetrical Tx or Rx gets ITR=8000;
5396 * everyone else is between 2000-8000.
5397 */
5398 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5399 u32 dif = (adapter->gotc > adapter->gorc ?
5400 adapter->gotc - adapter->gorc :
5401 adapter->gorc - adapter->gotc) / 10000;
5402 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5403
5404 e1000e_write_itr(adapter, itr);
5405 }
5406
5407 /* Cause software interrupt to ensure Rx ring is cleaned */
5408 if (adapter->msix_entries)
5409 ew32(ICS, adapter->rx_ring->ims_val);
5410 else
5411 ew32(ICS, E1000_ICS_RXDMT0);
5412
5413 /* flush pending descriptors to memory before detecting Tx hang */
5414 e1000e_flush_descriptors(adapter);
5415
5416 /* Force detection of hung controller every watchdog period */
5417 adapter->detect_tx_hung = true;
5418
5419 /* With 82571 controllers, LAA may be overwritten due to controller
5420 * reset from the other port. Set the appropriate LAA in RAR[0]
5421 */
5422 if (e1000e_get_laa_state_82571(hw))
5423 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5424
5425 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5426 e1000e_check_82574_phy_workaround(adapter);
5427
5428 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5429 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5430 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5431 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5432 er32(RXSTMPH);
5433 adapter->rx_hwtstamp_cleared++;
5434 } else {
5435 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5436 }
5437 }
5438
5439 /* Reset the timer */
5440 if (!test_bit(__E1000_DOWN, &adapter->state))
5441 mod_timer(&adapter->watchdog_timer,
5442 round_jiffies(jiffies + 2 * HZ));
5443 }
5444
5445 #define E1000_TX_FLAGS_CSUM 0x00000001
5446 #define E1000_TX_FLAGS_VLAN 0x00000002
5447 #define E1000_TX_FLAGS_TSO 0x00000004
5448 #define E1000_TX_FLAGS_IPV4 0x00000008
5449 #define E1000_TX_FLAGS_NO_FCS 0x00000010
5450 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5451 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5452 #define E1000_TX_FLAGS_VLAN_SHIFT 16
5453
e1000_tso(struct e1000_ring * tx_ring,struct sk_buff * skb,__be16 protocol)5454 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5455 __be16 protocol)
5456 {
5457 struct e1000_context_desc *context_desc;
5458 struct e1000_buffer *buffer_info;
5459 unsigned int i;
5460 u32 cmd_length = 0;
5461 u16 ipcse = 0, mss;
5462 u8 ipcss, ipcso, tucss, tucso, hdr_len;
5463 int err;
5464
5465 if (!skb_is_gso(skb))
5466 return 0;
5467
5468 err = skb_cow_head(skb, 0);
5469 if (err < 0)
5470 return err;
5471
5472 hdr_len = skb_tcp_all_headers(skb);
5473 mss = skb_shinfo(skb)->gso_size;
5474 if (protocol == htons(ETH_P_IP)) {
5475 struct iphdr *iph = ip_hdr(skb);
5476 iph->tot_len = 0;
5477 iph->check = 0;
5478 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5479 0, IPPROTO_TCP, 0);
5480 cmd_length = E1000_TXD_CMD_IP;
5481 ipcse = skb_transport_offset(skb) - 1;
5482 } else if (skb_is_gso_v6(skb)) {
5483 tcp_v6_gso_csum_prep(skb);
5484 ipcse = 0;
5485 }
5486 ipcss = skb_network_offset(skb);
5487 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5488 tucss = skb_transport_offset(skb);
5489 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5490
5491 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5492 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5493
5494 i = tx_ring->next_to_use;
5495 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5496 buffer_info = &tx_ring->buffer_info[i];
5497
5498 context_desc->lower_setup.ip_fields.ipcss = ipcss;
5499 context_desc->lower_setup.ip_fields.ipcso = ipcso;
5500 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5501 context_desc->upper_setup.tcp_fields.tucss = tucss;
5502 context_desc->upper_setup.tcp_fields.tucso = tucso;
5503 context_desc->upper_setup.tcp_fields.tucse = 0;
5504 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5505 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5506 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5507
5508 buffer_info->time_stamp = jiffies;
5509 buffer_info->next_to_watch = i;
5510
5511 i++;
5512 if (i == tx_ring->count)
5513 i = 0;
5514 tx_ring->next_to_use = i;
5515
5516 return 1;
5517 }
5518
e1000_tx_csum(struct e1000_ring * tx_ring,struct sk_buff * skb,__be16 protocol)5519 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5520 __be16 protocol)
5521 {
5522 struct e1000_adapter *adapter = tx_ring->adapter;
5523 struct e1000_context_desc *context_desc;
5524 struct e1000_buffer *buffer_info;
5525 unsigned int i;
5526 u8 css;
5527 u32 cmd_len = E1000_TXD_CMD_DEXT;
5528
5529 if (skb->ip_summed != CHECKSUM_PARTIAL)
5530 return false;
5531
5532 switch (protocol) {
5533 case cpu_to_be16(ETH_P_IP):
5534 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5535 cmd_len |= E1000_TXD_CMD_TCP;
5536 break;
5537 case cpu_to_be16(ETH_P_IPV6):
5538 /* XXX not handling all IPV6 headers */
5539 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5540 cmd_len |= E1000_TXD_CMD_TCP;
5541 break;
5542 default:
5543 if (unlikely(net_ratelimit()))
5544 e_warn("checksum_partial proto=%x!\n",
5545 be16_to_cpu(protocol));
5546 break;
5547 }
5548
5549 css = skb_checksum_start_offset(skb);
5550
5551 i = tx_ring->next_to_use;
5552 buffer_info = &tx_ring->buffer_info[i];
5553 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5554
5555 context_desc->lower_setup.ip_config = 0;
5556 context_desc->upper_setup.tcp_fields.tucss = css;
5557 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5558 context_desc->upper_setup.tcp_fields.tucse = 0;
5559 context_desc->tcp_seg_setup.data = 0;
5560 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5561
5562 buffer_info->time_stamp = jiffies;
5563 buffer_info->next_to_watch = i;
5564
5565 i++;
5566 if (i == tx_ring->count)
5567 i = 0;
5568 tx_ring->next_to_use = i;
5569
5570 return true;
5571 }
5572
e1000_tx_map(struct e1000_ring * tx_ring,struct sk_buff * skb,unsigned int first,unsigned int max_per_txd,unsigned int nr_frags)5573 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5574 unsigned int first, unsigned int max_per_txd,
5575 unsigned int nr_frags)
5576 {
5577 struct e1000_adapter *adapter = tx_ring->adapter;
5578 struct pci_dev *pdev = adapter->pdev;
5579 struct e1000_buffer *buffer_info;
5580 unsigned int len = skb_headlen(skb);
5581 unsigned int offset = 0, size, count = 0, i;
5582 unsigned int f, bytecount, segs;
5583
5584 i = tx_ring->next_to_use;
5585
5586 while (len) {
5587 buffer_info = &tx_ring->buffer_info[i];
5588 size = min(len, max_per_txd);
5589
5590 buffer_info->length = size;
5591 buffer_info->time_stamp = jiffies;
5592 buffer_info->next_to_watch = i;
5593 buffer_info->dma = dma_map_single(&pdev->dev,
5594 skb->data + offset,
5595 size, DMA_TO_DEVICE);
5596 buffer_info->mapped_as_page = false;
5597 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5598 goto dma_error;
5599
5600 len -= size;
5601 offset += size;
5602 count++;
5603
5604 if (len) {
5605 i++;
5606 if (i == tx_ring->count)
5607 i = 0;
5608 }
5609 }
5610
5611 for (f = 0; f < nr_frags; f++) {
5612 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
5613
5614 len = skb_frag_size(frag);
5615 offset = 0;
5616
5617 while (len) {
5618 i++;
5619 if (i == tx_ring->count)
5620 i = 0;
5621
5622 buffer_info = &tx_ring->buffer_info[i];
5623 size = min(len, max_per_txd);
5624
5625 buffer_info->length = size;
5626 buffer_info->time_stamp = jiffies;
5627 buffer_info->next_to_watch = i;
5628 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5629 offset, size,
5630 DMA_TO_DEVICE);
5631 buffer_info->mapped_as_page = true;
5632 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5633 goto dma_error;
5634
5635 len -= size;
5636 offset += size;
5637 count++;
5638 }
5639 }
5640
5641 segs = skb_shinfo(skb)->gso_segs ? : 1;
5642 /* multiply data chunks by size of headers */
5643 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5644
5645 tx_ring->buffer_info[i].skb = skb;
5646 tx_ring->buffer_info[i].segs = segs;
5647 tx_ring->buffer_info[i].bytecount = bytecount;
5648 tx_ring->buffer_info[first].next_to_watch = i;
5649
5650 return count;
5651
5652 dma_error:
5653 dev_err(&pdev->dev, "Tx DMA map failed\n");
5654 buffer_info->dma = 0;
5655 if (count)
5656 count--;
5657
5658 while (count--) {
5659 if (i == 0)
5660 i += tx_ring->count;
5661 i--;
5662 buffer_info = &tx_ring->buffer_info[i];
5663 e1000_put_txbuf(tx_ring, buffer_info, true);
5664 }
5665
5666 return 0;
5667 }
5668
e1000_tx_queue(struct e1000_ring * tx_ring,int tx_flags,int count)5669 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5670 {
5671 struct e1000_adapter *adapter = tx_ring->adapter;
5672 struct e1000_tx_desc *tx_desc = NULL;
5673 struct e1000_buffer *buffer_info;
5674 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5675 unsigned int i;
5676
5677 if (tx_flags & E1000_TX_FLAGS_TSO) {
5678 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5679 E1000_TXD_CMD_TSE;
5680 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5681
5682 if (tx_flags & E1000_TX_FLAGS_IPV4)
5683 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5684 }
5685
5686 if (tx_flags & E1000_TX_FLAGS_CSUM) {
5687 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5688 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5689 }
5690
5691 if (tx_flags & E1000_TX_FLAGS_VLAN) {
5692 txd_lower |= E1000_TXD_CMD_VLE;
5693 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5694 }
5695
5696 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5697 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5698
5699 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5700 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5701 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5702 }
5703
5704 i = tx_ring->next_to_use;
5705
5706 do {
5707 buffer_info = &tx_ring->buffer_info[i];
5708 tx_desc = E1000_TX_DESC(*tx_ring, i);
5709 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5710 tx_desc->lower.data = cpu_to_le32(txd_lower |
5711 buffer_info->length);
5712 tx_desc->upper.data = cpu_to_le32(txd_upper);
5713
5714 i++;
5715 if (i == tx_ring->count)
5716 i = 0;
5717 } while (--count > 0);
5718
5719 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5720
5721 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5722 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5723 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5724
5725 /* Force memory writes to complete before letting h/w
5726 * know there are new descriptors to fetch. (Only
5727 * applicable for weak-ordered memory model archs,
5728 * such as IA-64).
5729 */
5730 wmb();
5731
5732 tx_ring->next_to_use = i;
5733 }
5734
5735 #define MINIMUM_DHCP_PACKET_SIZE 282
e1000_transfer_dhcp_info(struct e1000_adapter * adapter,struct sk_buff * skb)5736 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5737 struct sk_buff *skb)
5738 {
5739 struct e1000_hw *hw = &adapter->hw;
5740 u16 length, offset;
5741
5742 if (skb_vlan_tag_present(skb) &&
5743 !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5744 (adapter->hw.mng_cookie.status &
5745 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5746 return 0;
5747
5748 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5749 return 0;
5750
5751 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5752 return 0;
5753
5754 {
5755 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5756 struct udphdr *udp;
5757
5758 if (ip->protocol != IPPROTO_UDP)
5759 return 0;
5760
5761 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5762 if (ntohs(udp->dest) != 67)
5763 return 0;
5764
5765 offset = (u8 *)udp + 8 - skb->data;
5766 length = skb->len - offset;
5767 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5768 }
5769
5770 return 0;
5771 }
5772
__e1000_maybe_stop_tx(struct e1000_ring * tx_ring,int size)5773 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5774 {
5775 struct e1000_adapter *adapter = tx_ring->adapter;
5776
5777 netif_stop_queue(adapter->netdev);
5778 /* Herbert's original patch had:
5779 * smp_mb__after_netif_stop_queue();
5780 * but since that doesn't exist yet, just open code it.
5781 */
5782 smp_mb();
5783
5784 /* We need to check again in a case another CPU has just
5785 * made room available.
5786 */
5787 if (e1000_desc_unused(tx_ring) < size)
5788 return -EBUSY;
5789
5790 /* A reprieve! */
5791 netif_start_queue(adapter->netdev);
5792 ++adapter->restart_queue;
5793 return 0;
5794 }
5795
e1000_maybe_stop_tx(struct e1000_ring * tx_ring,int size)5796 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5797 {
5798 BUG_ON(size > tx_ring->count);
5799
5800 if (e1000_desc_unused(tx_ring) >= size)
5801 return 0;
5802 return __e1000_maybe_stop_tx(tx_ring, size);
5803 }
5804
e1000_xmit_frame(struct sk_buff * skb,struct net_device * netdev)5805 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5806 struct net_device *netdev)
5807 {
5808 struct e1000_adapter *adapter = netdev_priv(netdev);
5809 struct e1000_ring *tx_ring = adapter->tx_ring;
5810 unsigned int first;
5811 unsigned int tx_flags = 0;
5812 unsigned int len = skb_headlen(skb);
5813 unsigned int nr_frags;
5814 unsigned int mss;
5815 int count = 0;
5816 int tso;
5817 unsigned int f;
5818 __be16 protocol = vlan_get_protocol(skb);
5819
5820 if (test_bit(__E1000_DOWN, &adapter->state)) {
5821 dev_kfree_skb_any(skb);
5822 return NETDEV_TX_OK;
5823 }
5824
5825 if (skb->len <= 0) {
5826 dev_kfree_skb_any(skb);
5827 return NETDEV_TX_OK;
5828 }
5829
5830 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5831 * pad skb in order to meet this minimum size requirement
5832 */
5833 if (skb_put_padto(skb, 17))
5834 return NETDEV_TX_OK;
5835
5836 mss = skb_shinfo(skb)->gso_size;
5837 if (mss) {
5838 u8 hdr_len;
5839
5840 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5841 * points to just header, pull a few bytes of payload from
5842 * frags into skb->data
5843 */
5844 hdr_len = skb_tcp_all_headers(skb);
5845 /* we do this workaround for ES2LAN, but it is un-necessary,
5846 * avoiding it could save a lot of cycles
5847 */
5848 if (skb->data_len && (hdr_len == len)) {
5849 unsigned int pull_size;
5850
5851 pull_size = min_t(unsigned int, 4, skb->data_len);
5852 if (!__pskb_pull_tail(skb, pull_size)) {
5853 e_err("__pskb_pull_tail failed.\n");
5854 dev_kfree_skb_any(skb);
5855 return NETDEV_TX_OK;
5856 }
5857 len = skb_headlen(skb);
5858 }
5859 }
5860
5861 /* reserve a descriptor for the offload context */
5862 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5863 count++;
5864 count++;
5865
5866 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5867
5868 nr_frags = skb_shinfo(skb)->nr_frags;
5869 for (f = 0; f < nr_frags; f++)
5870 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5871 adapter->tx_fifo_limit);
5872
5873 if (adapter->hw.mac.tx_pkt_filtering)
5874 e1000_transfer_dhcp_info(adapter, skb);
5875
5876 /* need: count + 2 desc gap to keep tail from touching
5877 * head, otherwise try next time
5878 */
5879 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5880 return NETDEV_TX_BUSY;
5881
5882 if (skb_vlan_tag_present(skb)) {
5883 tx_flags |= E1000_TX_FLAGS_VLAN;
5884 tx_flags |= (skb_vlan_tag_get(skb) <<
5885 E1000_TX_FLAGS_VLAN_SHIFT);
5886 }
5887
5888 first = tx_ring->next_to_use;
5889
5890 tso = e1000_tso(tx_ring, skb, protocol);
5891 if (tso < 0) {
5892 dev_kfree_skb_any(skb);
5893 return NETDEV_TX_OK;
5894 }
5895
5896 if (tso)
5897 tx_flags |= E1000_TX_FLAGS_TSO;
5898 else if (e1000_tx_csum(tx_ring, skb, protocol))
5899 tx_flags |= E1000_TX_FLAGS_CSUM;
5900
5901 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5902 * 82571 hardware supports TSO capabilities for IPv6 as well...
5903 * no longer assume, we must.
5904 */
5905 if (protocol == htons(ETH_P_IP))
5906 tx_flags |= E1000_TX_FLAGS_IPV4;
5907
5908 if (unlikely(skb->no_fcs))
5909 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5910
5911 /* if count is 0 then mapping error has occurred */
5912 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5913 nr_frags);
5914 if (count) {
5915 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5916 (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5917 if (!adapter->tx_hwtstamp_skb) {
5918 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5919 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5920 adapter->tx_hwtstamp_skb = skb_get(skb);
5921 adapter->tx_hwtstamp_start = jiffies;
5922 schedule_work(&adapter->tx_hwtstamp_work);
5923 } else {
5924 adapter->tx_hwtstamp_skipped++;
5925 }
5926 }
5927
5928 skb_tx_timestamp(skb);
5929
5930 netdev_sent_queue(netdev, skb->len);
5931 e1000_tx_queue(tx_ring, tx_flags, count);
5932 /* Make sure there is space in the ring for the next send. */
5933 e1000_maybe_stop_tx(tx_ring,
5934 ((MAX_SKB_FRAGS + 1) *
5935 DIV_ROUND_UP(PAGE_SIZE,
5936 adapter->tx_fifo_limit) + 4));
5937
5938 if (!netdev_xmit_more() ||
5939 netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5940 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5941 e1000e_update_tdt_wa(tx_ring,
5942 tx_ring->next_to_use);
5943 else
5944 writel(tx_ring->next_to_use, tx_ring->tail);
5945 }
5946 } else {
5947 dev_kfree_skb_any(skb);
5948 tx_ring->buffer_info[first].time_stamp = 0;
5949 tx_ring->next_to_use = first;
5950 }
5951
5952 return NETDEV_TX_OK;
5953 }
5954
5955 /**
5956 * e1000_tx_timeout - Respond to a Tx Hang
5957 * @netdev: network interface device structure
5958 * @txqueue: index of the hung queue (unused)
5959 **/
e1000_tx_timeout(struct net_device * netdev,unsigned int __always_unused txqueue)5960 static void e1000_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
5961 {
5962 struct e1000_adapter *adapter = netdev_priv(netdev);
5963
5964 /* Do the reset outside of interrupt context */
5965 adapter->tx_timeout_count++;
5966 schedule_work(&adapter->reset_task);
5967 }
5968
e1000_reset_task(struct work_struct * work)5969 static void e1000_reset_task(struct work_struct *work)
5970 {
5971 struct e1000_adapter *adapter;
5972 adapter = container_of(work, struct e1000_adapter, reset_task);
5973
5974 rtnl_lock();
5975 /* don't run the task if already down */
5976 if (test_bit(__E1000_DOWN, &adapter->state)) {
5977 rtnl_unlock();
5978 return;
5979 }
5980
5981 if (!(adapter->flags & FLAG_RESTART_NOW)) {
5982 e1000e_dump(adapter);
5983 e_err("Reset adapter unexpectedly\n");
5984 }
5985 e1000e_reinit_locked(adapter);
5986 rtnl_unlock();
5987 }
5988
5989 /**
5990 * e1000e_get_stats64 - Get System Network Statistics
5991 * @netdev: network interface device structure
5992 * @stats: rtnl_link_stats64 pointer
5993 *
5994 * Returns the address of the device statistics structure.
5995 **/
e1000e_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)5996 void e1000e_get_stats64(struct net_device *netdev,
5997 struct rtnl_link_stats64 *stats)
5998 {
5999 struct e1000_adapter *adapter = netdev_priv(netdev);
6000
6001 spin_lock(&adapter->stats64_lock);
6002 e1000e_update_stats(adapter);
6003 /* Fill out the OS statistics structure */
6004 stats->rx_bytes = adapter->stats.gorc;
6005 stats->rx_packets = adapter->stats.gprc;
6006 stats->tx_bytes = adapter->stats.gotc;
6007 stats->tx_packets = adapter->stats.gptc;
6008 stats->multicast = adapter->stats.mprc;
6009 stats->collisions = adapter->stats.colc;
6010
6011 /* Rx Errors */
6012
6013 /* RLEC on some newer hardware can be incorrect so build
6014 * our own version based on RUC and ROC
6015 */
6016 stats->rx_errors = adapter->stats.rxerrc +
6017 adapter->stats.crcerrs + adapter->stats.algnerrc +
6018 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
6019 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
6020 stats->rx_crc_errors = adapter->stats.crcerrs;
6021 stats->rx_frame_errors = adapter->stats.algnerrc;
6022 stats->rx_missed_errors = adapter->stats.mpc;
6023
6024 /* Tx Errors */
6025 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
6026 stats->tx_aborted_errors = adapter->stats.ecol;
6027 stats->tx_window_errors = adapter->stats.latecol;
6028 stats->tx_carrier_errors = adapter->stats.tncrs;
6029
6030 /* Tx Dropped needs to be maintained elsewhere */
6031
6032 spin_unlock(&adapter->stats64_lock);
6033 }
6034
6035 /**
6036 * e1000_change_mtu - Change the Maximum Transfer Unit
6037 * @netdev: network interface device structure
6038 * @new_mtu: new value for maximum frame size
6039 *
6040 * Returns 0 on success, negative on failure
6041 **/
e1000_change_mtu(struct net_device * netdev,int new_mtu)6042 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6043 {
6044 struct e1000_adapter *adapter = netdev_priv(netdev);
6045 int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6046
6047 /* Jumbo frame support */
6048 if ((new_mtu > ETH_DATA_LEN) &&
6049 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6050 e_err("Jumbo Frames not supported.\n");
6051 return -EINVAL;
6052 }
6053
6054 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6055 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6056 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6057 (new_mtu > ETH_DATA_LEN)) {
6058 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6059 return -EINVAL;
6060 }
6061
6062 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6063 usleep_range(1000, 1100);
6064 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6065 adapter->max_frame_size = max_frame;
6066 netdev_dbg(netdev, "changing MTU from %d to %d\n",
6067 netdev->mtu, new_mtu);
6068 WRITE_ONCE(netdev->mtu, new_mtu);
6069
6070 pm_runtime_get_sync(netdev->dev.parent);
6071
6072 if (netif_running(netdev))
6073 e1000e_down(adapter, true);
6074
6075 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6076 * means we reserve 2 more, this pushes us to allocate from the next
6077 * larger slab size.
6078 * i.e. RXBUFFER_2048 --> size-4096 slab
6079 * However with the new *_jumbo_rx* routines, jumbo receives will use
6080 * fragmented skbs
6081 */
6082
6083 if (max_frame <= 2048)
6084 adapter->rx_buffer_len = 2048;
6085 else
6086 adapter->rx_buffer_len = 4096;
6087
6088 /* adjust allocation if LPE protects us, and we aren't using SBP */
6089 if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6090 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6091
6092 if (netif_running(netdev))
6093 e1000e_up(adapter);
6094 else
6095 e1000e_reset(adapter);
6096
6097 pm_runtime_put_sync(netdev->dev.parent);
6098
6099 clear_bit(__E1000_RESETTING, &adapter->state);
6100
6101 return 0;
6102 }
6103
e1000_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)6104 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6105 {
6106 struct e1000_adapter *adapter = netdev_priv(netdev);
6107 struct mii_ioctl_data *data = if_mii(ifr);
6108
6109 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6110 return -EOPNOTSUPP;
6111
6112 switch (cmd) {
6113 case SIOCGMIIPHY:
6114 data->phy_id = adapter->hw.phy.addr;
6115 break;
6116 case SIOCGMIIREG:
6117 e1000_phy_read_status(adapter);
6118
6119 switch (data->reg_num & 0x1F) {
6120 case MII_BMCR:
6121 data->val_out = adapter->phy_regs.bmcr;
6122 break;
6123 case MII_BMSR:
6124 data->val_out = adapter->phy_regs.bmsr;
6125 break;
6126 case MII_PHYSID1:
6127 data->val_out = (adapter->hw.phy.id >> 16);
6128 break;
6129 case MII_PHYSID2:
6130 data->val_out = (adapter->hw.phy.id & 0xFFFF);
6131 break;
6132 case MII_ADVERTISE:
6133 data->val_out = adapter->phy_regs.advertise;
6134 break;
6135 case MII_LPA:
6136 data->val_out = adapter->phy_regs.lpa;
6137 break;
6138 case MII_EXPANSION:
6139 data->val_out = adapter->phy_regs.expansion;
6140 break;
6141 case MII_CTRL1000:
6142 data->val_out = adapter->phy_regs.ctrl1000;
6143 break;
6144 case MII_STAT1000:
6145 data->val_out = adapter->phy_regs.stat1000;
6146 break;
6147 case MII_ESTATUS:
6148 data->val_out = adapter->phy_regs.estatus;
6149 break;
6150 default:
6151 return -EIO;
6152 }
6153 break;
6154 case SIOCSMIIREG:
6155 default:
6156 return -EOPNOTSUPP;
6157 }
6158 return 0;
6159 }
6160
6161 /**
6162 * e1000e_hwtstamp_set - control hardware time stamping
6163 * @netdev: network interface device structure
6164 * @config: timestamp configuration
6165 * @extack: netlink extended ACK report
6166 *
6167 * Outgoing time stamping can be enabled and disabled. Play nice and
6168 * disable it when requested, although it shouldn't cause any overhead
6169 * when no packet needs it. At most one packet in the queue may be
6170 * marked for time stamping, otherwise it would be impossible to tell
6171 * for sure to which packet the hardware time stamp belongs.
6172 *
6173 * Incoming time stamping has to be configured via the hardware filters.
6174 * Not all combinations are supported, in particular event type has to be
6175 * specified. Matching the kind of event packet is not supported, with the
6176 * exception of "all V2 events regardless of level 2 or 4".
6177 **/
e1000e_hwtstamp_set(struct net_device * netdev,struct kernel_hwtstamp_config * config,struct netlink_ext_ack * extack)6178 static int e1000e_hwtstamp_set(struct net_device *netdev,
6179 struct kernel_hwtstamp_config *config,
6180 struct netlink_ext_ack *extack)
6181 {
6182 struct e1000_adapter *adapter = netdev_priv(netdev);
6183 int ret_val;
6184
6185 ret_val = e1000e_config_hwtstamp(adapter, config, extack);
6186 if (ret_val)
6187 return ret_val;
6188
6189 switch (config->rx_filter) {
6190 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6191 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6192 case HWTSTAMP_FILTER_PTP_V2_SYNC:
6193 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6194 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6195 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6196 /* With V2 type filters which specify a Sync or Delay Request,
6197 * Path Delay Request/Response messages are also time stamped
6198 * by hardware so notify the caller the requested packets plus
6199 * some others are time stamped.
6200 */
6201 config->rx_filter = HWTSTAMP_FILTER_SOME;
6202 break;
6203 default:
6204 break;
6205 }
6206
6207 return 0;
6208 }
6209
e1000e_hwtstamp_get(struct net_device * netdev,struct kernel_hwtstamp_config * kernel_config)6210 static int e1000e_hwtstamp_get(struct net_device *netdev,
6211 struct kernel_hwtstamp_config *kernel_config)
6212 {
6213 struct e1000_adapter *adapter = netdev_priv(netdev);
6214
6215 *kernel_config = adapter->hwtstamp_config;
6216
6217 return 0;
6218 }
6219
e1000_init_phy_wakeup(struct e1000_adapter * adapter,u32 wufc)6220 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6221 {
6222 struct e1000_hw *hw = &adapter->hw;
6223 u32 i, mac_reg, wuc;
6224 u16 phy_reg, wuc_enable;
6225 int retval;
6226
6227 /* copy MAC RARs to PHY RARs */
6228 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6229
6230 retval = hw->phy.ops.acquire(hw);
6231 if (retval) {
6232 e_err("Could not acquire PHY\n");
6233 return retval;
6234 }
6235
6236 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6237 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6238 if (retval)
6239 goto release;
6240
6241 /* copy MAC MTA to PHY MTA - only needed for pchlan */
6242 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6243 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6244 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6245 (u16)(mac_reg & 0xFFFF));
6246 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6247 (u16)((mac_reg >> 16) & 0xFFFF));
6248 }
6249
6250 /* configure PHY Rx Control register */
6251 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6252 mac_reg = er32(RCTL);
6253 if (mac_reg & E1000_RCTL_UPE)
6254 phy_reg |= BM_RCTL_UPE;
6255 if (mac_reg & E1000_RCTL_MPE)
6256 phy_reg |= BM_RCTL_MPE;
6257 phy_reg &= ~(BM_RCTL_MO_MASK);
6258 if (mac_reg & E1000_RCTL_MO_3)
6259 phy_reg |= (FIELD_GET(E1000_RCTL_MO_3, mac_reg)
6260 << BM_RCTL_MO_SHIFT);
6261 if (mac_reg & E1000_RCTL_BAM)
6262 phy_reg |= BM_RCTL_BAM;
6263 if (mac_reg & E1000_RCTL_PMCF)
6264 phy_reg |= BM_RCTL_PMCF;
6265 mac_reg = er32(CTRL);
6266 if (mac_reg & E1000_CTRL_RFCE)
6267 phy_reg |= BM_RCTL_RFCE;
6268 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6269
6270 wuc = E1000_WUC_PME_EN;
6271 if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6272 wuc |= E1000_WUC_APME;
6273
6274 /* enable PHY wakeup in MAC register */
6275 ew32(WUFC, wufc);
6276 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6277 E1000_WUC_PME_STATUS | wuc));
6278
6279 /* configure and enable PHY wakeup in PHY registers */
6280 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6281 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6282
6283 /* activate PHY wakeup */
6284 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6285 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6286 if (retval)
6287 e_err("Could not set PHY Host Wakeup bit\n");
6288 release:
6289 hw->phy.ops.release(hw);
6290
6291 return retval;
6292 }
6293
e1000e_flush_lpic(struct pci_dev * pdev)6294 static void e1000e_flush_lpic(struct pci_dev *pdev)
6295 {
6296 struct net_device *netdev = pci_get_drvdata(pdev);
6297 struct e1000_adapter *adapter = netdev_priv(netdev);
6298 struct e1000_hw *hw = &adapter->hw;
6299 u32 ret_val;
6300
6301 pm_runtime_get_sync(netdev->dev.parent);
6302
6303 ret_val = hw->phy.ops.acquire(hw);
6304 if (ret_val)
6305 goto fl_out;
6306
6307 pr_info("EEE TX LPI TIMER: %08X\n",
6308 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6309
6310 hw->phy.ops.release(hw);
6311
6312 fl_out:
6313 pm_runtime_put_sync(netdev->dev.parent);
6314 }
6315
6316 /* S0ix implementation */
e1000e_s0ix_entry_flow(struct e1000_adapter * adapter)6317 static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter)
6318 {
6319 struct e1000_hw *hw = &adapter->hw;
6320 u32 mac_data;
6321 u16 phy_data;
6322
6323 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
6324 hw->mac.type >= e1000_pch_adp) {
6325 /* Request ME configure the device for S0ix */
6326 mac_data = er32(H2ME);
6327 mac_data |= E1000_H2ME_START_DPG;
6328 mac_data &= ~E1000_H2ME_EXIT_DPG;
6329 trace_e1000e_trace_mac_register(mac_data);
6330 ew32(H2ME, mac_data);
6331 } else {
6332 /* Request driver configure the device to S0ix */
6333 /* Disable the periodic inband message,
6334 * don't request PCIe clock in K1 page770_17[10:9] = 10b
6335 */
6336 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6337 phy_data &= ~HV_PM_CTRL_K1_CLK_REQ;
6338 phy_data |= BIT(10);
6339 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6340
6341 /* Make sure we don't exit K1 every time a new packet arrives
6342 * 772_29[5] = 1 CS_Mode_Stay_In_K1
6343 */
6344 e1e_rphy(hw, I217_CGFREG, &phy_data);
6345 phy_data |= BIT(5);
6346 e1e_wphy(hw, I217_CGFREG, phy_data);
6347
6348 /* Change the MAC/PHY interface to SMBus
6349 * Force the SMBus in PHY page769_23[0] = 1
6350 * Force the SMBus in MAC CTRL_EXT[11] = 1
6351 */
6352 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6353 phy_data |= CV_SMB_CTRL_FORCE_SMBUS;
6354 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6355 mac_data = er32(CTRL_EXT);
6356 mac_data |= E1000_CTRL_EXT_FORCE_SMBUS;
6357 ew32(CTRL_EXT, mac_data);
6358
6359 /* DFT control: PHY bit: page769_20[0] = 1
6360 * page769_20[7] - PHY PLL stop
6361 * page769_20[8] - PHY go to the electrical idle
6362 * page769_20[9] - PHY serdes disable
6363 * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1
6364 */
6365 e1e_rphy(hw, I82579_DFT_CTRL, &phy_data);
6366 phy_data |= BIT(0);
6367 phy_data |= BIT(7);
6368 phy_data |= BIT(8);
6369 phy_data |= BIT(9);
6370 e1e_wphy(hw, I82579_DFT_CTRL, phy_data);
6371
6372 mac_data = er32(EXTCNF_CTRL);
6373 mac_data |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;
6374 ew32(EXTCNF_CTRL, mac_data);
6375
6376 /* Disable disconnected cable conditioning for Power Gating */
6377 mac_data = er32(DPGFR);
6378 mac_data |= BIT(2);
6379 ew32(DPGFR, mac_data);
6380
6381 /* Enable the Dynamic Clock Gating in the DMA and MAC */
6382 mac_data = er32(CTRL_EXT);
6383 mac_data |= E1000_CTRL_EXT_DMA_DYN_CLK_EN;
6384 ew32(CTRL_EXT, mac_data);
6385 }
6386
6387 /* Enable the Dynamic Power Gating in the MAC */
6388 mac_data = er32(FEXTNVM7);
6389 mac_data |= BIT(22);
6390 ew32(FEXTNVM7, mac_data);
6391
6392 /* Don't wake from dynamic Power Gating with clock request */
6393 mac_data = er32(FEXTNVM12);
6394 mac_data |= BIT(12);
6395 ew32(FEXTNVM12, mac_data);
6396
6397 /* Ungate PGCB clock */
6398 mac_data = er32(FEXTNVM9);
6399 mac_data &= ~BIT(28);
6400 ew32(FEXTNVM9, mac_data);
6401
6402 /* Enable K1 off to enable mPHY Power Gating */
6403 mac_data = er32(FEXTNVM6);
6404 mac_data |= BIT(31);
6405 ew32(FEXTNVM6, mac_data);
6406
6407 /* Enable mPHY power gating for any link and speed */
6408 mac_data = er32(FEXTNVM8);
6409 mac_data |= BIT(9);
6410 ew32(FEXTNVM8, mac_data);
6411
6412 /* No MAC DPG gating SLP_S0 in modern standby
6413 * Switch the logic of the lanphypc to use PMC counter
6414 */
6415 mac_data = er32(FEXTNVM5);
6416 mac_data |= BIT(7);
6417 ew32(FEXTNVM5, mac_data);
6418
6419 /* Disable the time synchronization clock */
6420 mac_data = er32(FEXTNVM7);
6421 mac_data |= BIT(31);
6422 mac_data &= ~BIT(0);
6423 ew32(FEXTNVM7, mac_data);
6424
6425 /* Dynamic Power Gating Enable */
6426 mac_data = er32(CTRL_EXT);
6427 mac_data |= BIT(3);
6428 ew32(CTRL_EXT, mac_data);
6429
6430 /* Check MAC Tx/Rx packet buffer pointers.
6431 * Reset MAC Tx/Rx packet buffer pointers to suppress any
6432 * pending traffic indication that would prevent power gating.
6433 */
6434 mac_data = er32(TDFH);
6435 if (mac_data)
6436 ew32(TDFH, 0);
6437 mac_data = er32(TDFT);
6438 if (mac_data)
6439 ew32(TDFT, 0);
6440 mac_data = er32(TDFHS);
6441 if (mac_data)
6442 ew32(TDFHS, 0);
6443 mac_data = er32(TDFTS);
6444 if (mac_data)
6445 ew32(TDFTS, 0);
6446 mac_data = er32(TDFPC);
6447 if (mac_data)
6448 ew32(TDFPC, 0);
6449 mac_data = er32(RDFH);
6450 if (mac_data)
6451 ew32(RDFH, 0);
6452 mac_data = er32(RDFT);
6453 if (mac_data)
6454 ew32(RDFT, 0);
6455 mac_data = er32(RDFHS);
6456 if (mac_data)
6457 ew32(RDFHS, 0);
6458 mac_data = er32(RDFTS);
6459 if (mac_data)
6460 ew32(RDFTS, 0);
6461 mac_data = er32(RDFPC);
6462 if (mac_data)
6463 ew32(RDFPC, 0);
6464 }
6465
e1000e_s0ix_exit_flow(struct e1000_adapter * adapter)6466 static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)
6467 {
6468 struct e1000_hw *hw = &adapter->hw;
6469 bool firmware_bug = false;
6470 u32 mac_data;
6471 u16 phy_data;
6472 u32 i = 0;
6473
6474 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
6475 hw->mac.type >= e1000_pch_adp) {
6476 /* Keep the GPT clock enabled for CSME */
6477 mac_data = er32(FEXTNVM);
6478 mac_data |= BIT(3);
6479 ew32(FEXTNVM, mac_data);
6480 /* Request ME unconfigure the device from S0ix */
6481 mac_data = er32(H2ME);
6482 mac_data &= ~E1000_H2ME_START_DPG;
6483 mac_data |= E1000_H2ME_EXIT_DPG;
6484 trace_e1000e_trace_mac_register(mac_data);
6485 ew32(H2ME, mac_data);
6486
6487 /* Poll up to 2.5 seconds for ME to unconfigure DPG.
6488 * If this takes more than 1 second, show a warning indicating a
6489 * firmware bug
6490 */
6491 while (!(er32(EXFWSM) & E1000_EXFWSM_DPG_EXIT_DONE)) {
6492 if (i > 100 && !firmware_bug)
6493 firmware_bug = true;
6494
6495 if (i++ == 250) {
6496 e_dbg("Timeout (firmware bug): %d msec\n",
6497 i * 10);
6498 break;
6499 }
6500
6501 usleep_range(10000, 11000);
6502 }
6503 if (firmware_bug)
6504 e_warn("DPG_EXIT_DONE took %d msec. This is a firmware bug\n",
6505 i * 10);
6506 else
6507 e_dbg("DPG_EXIT_DONE cleared after %d msec\n", i * 10);
6508 } else {
6509 /* Request driver unconfigure the device from S0ix */
6510
6511 /* Cancel disable disconnected cable conditioning
6512 * for Power Gating
6513 */
6514 mac_data = er32(DPGFR);
6515 mac_data &= ~BIT(2);
6516 ew32(DPGFR, mac_data);
6517
6518 /* Disable the Dynamic Clock Gating in the DMA and MAC */
6519 mac_data = er32(CTRL_EXT);
6520 mac_data &= 0xFFF7FFFF;
6521 ew32(CTRL_EXT, mac_data);
6522
6523 /* Enable the periodic inband message,
6524 * Request PCIe clock in K1 page770_17[10:9] =01b
6525 */
6526 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6527 phy_data &= 0xFBFF;
6528 phy_data |= HV_PM_CTRL_K1_CLK_REQ;
6529 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6530
6531 /* Return back configuration
6532 * 772_29[5] = 0 CS_Mode_Stay_In_K1
6533 */
6534 e1e_rphy(hw, I217_CGFREG, &phy_data);
6535 phy_data &= 0xFFDF;
6536 e1e_wphy(hw, I217_CGFREG, phy_data);
6537
6538 /* Change the MAC/PHY interface to Kumeran
6539 * Unforce the SMBus in PHY page769_23[0] = 0
6540 * Unforce the SMBus in MAC CTRL_EXT[11] = 0
6541 */
6542 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6543 phy_data &= ~CV_SMB_CTRL_FORCE_SMBUS;
6544 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6545 mac_data = er32(CTRL_EXT);
6546 mac_data &= ~E1000_CTRL_EXT_FORCE_SMBUS;
6547 ew32(CTRL_EXT, mac_data);
6548 }
6549
6550 /* Disable Dynamic Power Gating */
6551 mac_data = er32(CTRL_EXT);
6552 mac_data &= 0xFFFFFFF7;
6553 ew32(CTRL_EXT, mac_data);
6554
6555 /* Enable the time synchronization clock */
6556 mac_data = er32(FEXTNVM7);
6557 mac_data &= ~BIT(31);
6558 mac_data |= BIT(0);
6559 ew32(FEXTNVM7, mac_data);
6560
6561 /* Disable the Dynamic Power Gating in the MAC */
6562 mac_data = er32(FEXTNVM7);
6563 mac_data &= 0xFFBFFFFF;
6564 ew32(FEXTNVM7, mac_data);
6565
6566 /* Disable mPHY power gating for any link and speed */
6567 mac_data = er32(FEXTNVM8);
6568 mac_data &= ~BIT(9);
6569 ew32(FEXTNVM8, mac_data);
6570
6571 /* Disable K1 off */
6572 mac_data = er32(FEXTNVM6);
6573 mac_data &= ~BIT(31);
6574 ew32(FEXTNVM6, mac_data);
6575
6576 /* Disable Ungate PGCB clock */
6577 mac_data = er32(FEXTNVM9);
6578 mac_data |= BIT(28);
6579 ew32(FEXTNVM9, mac_data);
6580
6581 /* Cancel not waking from dynamic
6582 * Power Gating with clock request
6583 */
6584 mac_data = er32(FEXTNVM12);
6585 mac_data &= ~BIT(12);
6586 ew32(FEXTNVM12, mac_data);
6587
6588 /* Revert the lanphypc logic to use the internal Gbe counter
6589 * and not the PMC counter
6590 */
6591 mac_data = er32(FEXTNVM5);
6592 mac_data &= 0xFFFFFF7F;
6593 ew32(FEXTNVM5, mac_data);
6594 }
6595
e1000e_pm_freeze(struct device * dev)6596 static int e1000e_pm_freeze(struct device *dev)
6597 {
6598 struct net_device *netdev = dev_get_drvdata(dev);
6599 struct e1000_adapter *adapter = netdev_priv(netdev);
6600 bool present;
6601
6602 rtnl_lock();
6603
6604 present = netif_device_present(netdev);
6605 netif_device_detach(netdev);
6606
6607 if (present && netif_running(netdev)) {
6608 int count = E1000_CHECK_RESET_COUNT;
6609
6610 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6611 usleep_range(10000, 11000);
6612
6613 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6614
6615 /* Quiesce the device without resetting the hardware */
6616 e1000e_down(adapter, false);
6617 e1000_free_irq(adapter);
6618 }
6619 rtnl_unlock();
6620
6621 e1000e_reset_interrupt_capability(adapter);
6622
6623 /* Allow time for pending master requests to run */
6624 e1000e_disable_pcie_master(&adapter->hw);
6625
6626 return 0;
6627 }
6628
__e1000_shutdown(struct pci_dev * pdev,bool runtime)6629 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6630 {
6631 struct net_device *netdev = pci_get_drvdata(pdev);
6632 struct e1000_adapter *adapter = netdev_priv(netdev);
6633 struct e1000_hw *hw = &adapter->hw;
6634 u32 ctrl, ctrl_ext, rctl, status, wufc;
6635 int retval = 0;
6636
6637 /* Runtime suspend should only enable wakeup for link changes */
6638 if (runtime)
6639 wufc = E1000_WUFC_LNKC;
6640 else if (device_may_wakeup(&pdev->dev))
6641 wufc = adapter->wol;
6642 else
6643 wufc = 0;
6644
6645 status = er32(STATUS);
6646 if (status & E1000_STATUS_LU)
6647 wufc &= ~E1000_WUFC_LNKC;
6648
6649 if (wufc) {
6650 e1000_setup_rctl(adapter);
6651 e1000e_set_rx_mode(netdev);
6652
6653 /* turn on all-multi mode if wake on multicast is enabled */
6654 if (wufc & E1000_WUFC_MC) {
6655 rctl = er32(RCTL);
6656 rctl |= E1000_RCTL_MPE;
6657 ew32(RCTL, rctl);
6658 }
6659
6660 ctrl = er32(CTRL);
6661 ctrl |= E1000_CTRL_ADVD3WUC;
6662 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6663 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6664 ew32(CTRL, ctrl);
6665
6666 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6667 adapter->hw.phy.media_type ==
6668 e1000_media_type_internal_serdes) {
6669 /* keep the laser running in D3 */
6670 ctrl_ext = er32(CTRL_EXT);
6671 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6672 ew32(CTRL_EXT, ctrl_ext);
6673 }
6674
6675 if (!runtime)
6676 e1000e_power_up_phy(adapter);
6677
6678 if (adapter->flags & FLAG_IS_ICH)
6679 e1000_suspend_workarounds_ich8lan(&adapter->hw);
6680
6681 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6682 /* enable wakeup by the PHY */
6683 retval = e1000_init_phy_wakeup(adapter, wufc);
6684 if (retval) {
6685 e_err("Failed to enable wakeup\n");
6686 goto skip_phy_configurations;
6687 }
6688 } else {
6689 /* enable wakeup by the MAC */
6690 ew32(WUFC, wufc);
6691 ew32(WUC, E1000_WUC_PME_EN);
6692 }
6693 } else {
6694 ew32(WUC, 0);
6695 ew32(WUFC, 0);
6696
6697 e1000_power_down_phy(adapter);
6698 }
6699
6700 if (adapter->hw.phy.type == e1000_phy_igp_3) {
6701 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6702 } else if (hw->mac.type >= e1000_pch_lpt) {
6703 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC))) {
6704 /* ULP does not support wake from unicast, multicast
6705 * or broadcast.
6706 */
6707 retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6708 if (retval) {
6709 e_err("Failed to enable ULP\n");
6710 goto skip_phy_configurations;
6711 }
6712 }
6713 }
6714
6715 /* Ensure that the appropriate bits are set in LPI_CTRL
6716 * for EEE in Sx
6717 */
6718 if ((hw->phy.type >= e1000_phy_i217) &&
6719 adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6720 u16 lpi_ctrl = 0;
6721
6722 retval = hw->phy.ops.acquire(hw);
6723 if (!retval) {
6724 retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6725 &lpi_ctrl);
6726 if (!retval) {
6727 if (adapter->eee_advert &
6728 hw->dev_spec.ich8lan.eee_lp_ability &
6729 I82579_EEE_100_SUPPORTED)
6730 lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6731 if (adapter->eee_advert &
6732 hw->dev_spec.ich8lan.eee_lp_ability &
6733 I82579_EEE_1000_SUPPORTED)
6734 lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6735
6736 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6737 lpi_ctrl);
6738 }
6739 }
6740 hw->phy.ops.release(hw);
6741 }
6742
6743 skip_phy_configurations:
6744 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6745 * would have already happened in close and is redundant.
6746 */
6747 e1000e_release_hw_control(adapter);
6748
6749 pci_clear_master(pdev);
6750
6751 /* The pci-e switch on some quad port adapters will report a
6752 * correctable error when the MAC transitions from D0 to D3. To
6753 * prevent this we need to mask off the correctable errors on the
6754 * downstream port of the pci-e switch.
6755 *
6756 * We don't have the associated upstream bridge while assigning
6757 * the PCI device into guest. For example, the KVM on power is
6758 * one of the cases.
6759 */
6760 if (adapter->flags & FLAG_IS_QUAD_PORT) {
6761 struct pci_dev *us_dev = pdev->bus->self;
6762 u16 devctl;
6763
6764 if (!us_dev)
6765 return 0;
6766
6767 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6768 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6769 (devctl & ~PCI_EXP_DEVCTL_CERE));
6770
6771 pci_save_state(pdev);
6772 pci_prepare_to_sleep(pdev);
6773
6774 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6775 }
6776
6777 return 0;
6778 }
6779
6780 /**
6781 * __e1000e_disable_aspm - Disable ASPM states
6782 * @pdev: pointer to PCI device struct
6783 * @state: bit-mask of ASPM states to disable
6784 * @locked: indication if this context holds pci_bus_sem locked.
6785 *
6786 * Some devices *must* have certain ASPM states disabled per hardware errata.
6787 **/
__e1000e_disable_aspm(struct pci_dev * pdev,u16 state,int locked)6788 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6789 {
6790 struct pci_dev *parent = pdev->bus->self;
6791 u16 aspm_dis_mask = 0;
6792 u16 pdev_aspmc, parent_aspmc;
6793
6794 switch (state) {
6795 case PCIE_LINK_STATE_L0S:
6796 case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6797 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6798 fallthrough; /* can't have L1 without L0s */
6799 case PCIE_LINK_STATE_L1:
6800 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6801 break;
6802 default:
6803 return;
6804 }
6805
6806 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6807 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6808
6809 if (parent) {
6810 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6811 &parent_aspmc);
6812 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6813 }
6814
6815 /* Nothing to do if the ASPM states to be disabled already are */
6816 if (!(pdev_aspmc & aspm_dis_mask) &&
6817 (!parent || !(parent_aspmc & aspm_dis_mask)))
6818 return;
6819
6820 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6821 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6822 "L0s" : "",
6823 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6824 "L1" : "");
6825
6826 #ifdef CONFIG_PCIEASPM
6827 if (locked)
6828 pci_disable_link_state_locked(pdev, state);
6829 else
6830 pci_disable_link_state(pdev, state);
6831
6832 /* Double-check ASPM control. If not disabled by the above, the
6833 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6834 * not enabled); override by writing PCI config space directly.
6835 */
6836 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6837 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6838
6839 if (!(aspm_dis_mask & pdev_aspmc))
6840 return;
6841 #endif
6842
6843 /* Both device and parent should have the same ASPM setting.
6844 * Disable ASPM in downstream component first and then upstream.
6845 */
6846 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6847
6848 if (parent)
6849 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6850 aspm_dis_mask);
6851 }
6852
6853 /**
6854 * e1000e_disable_aspm - Disable ASPM states.
6855 * @pdev: pointer to PCI device struct
6856 * @state: bit-mask of ASPM states to disable
6857 *
6858 * This function acquires the pci_bus_sem!
6859 * Some devices *must* have certain ASPM states disabled per hardware errata.
6860 **/
e1000e_disable_aspm(struct pci_dev * pdev,u16 state)6861 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6862 {
6863 __e1000e_disable_aspm(pdev, state, 0);
6864 }
6865
6866 /**
6867 * e1000e_disable_aspm_locked - Disable ASPM states.
6868 * @pdev: pointer to PCI device struct
6869 * @state: bit-mask of ASPM states to disable
6870 *
6871 * This function must be called with pci_bus_sem acquired!
6872 * Some devices *must* have certain ASPM states disabled per hardware errata.
6873 **/
e1000e_disable_aspm_locked(struct pci_dev * pdev,u16 state)6874 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6875 {
6876 __e1000e_disable_aspm(pdev, state, 1);
6877 }
6878
e1000e_pm_thaw(struct device * dev)6879 static int e1000e_pm_thaw(struct device *dev)
6880 {
6881 struct net_device *netdev = dev_get_drvdata(dev);
6882 struct e1000_adapter *adapter = netdev_priv(netdev);
6883 int rc = 0;
6884
6885 e1000e_set_interrupt_capability(adapter);
6886
6887 rtnl_lock();
6888 if (netif_running(netdev)) {
6889 rc = e1000_request_irq(adapter);
6890 if (rc)
6891 goto err_irq;
6892
6893 e1000e_up(adapter);
6894 }
6895
6896 netif_device_attach(netdev);
6897 err_irq:
6898 rtnl_unlock();
6899
6900 return rc;
6901 }
6902
__e1000_resume(struct pci_dev * pdev)6903 static int __e1000_resume(struct pci_dev *pdev)
6904 {
6905 struct net_device *netdev = pci_get_drvdata(pdev);
6906 struct e1000_adapter *adapter = netdev_priv(netdev);
6907 struct e1000_hw *hw = &adapter->hw;
6908 u16 aspm_disable_flag = 0;
6909
6910 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6911 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6912 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6913 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6914 if (aspm_disable_flag)
6915 e1000e_disable_aspm(pdev, aspm_disable_flag);
6916
6917 pci_set_master(pdev);
6918
6919 if (hw->mac.type >= e1000_pch2lan)
6920 e1000_resume_workarounds_pchlan(&adapter->hw);
6921
6922 e1000e_power_up_phy(adapter);
6923
6924 /* report the system wakeup cause from S3/S4 */
6925 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6926 u16 phy_data;
6927
6928 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6929 if (phy_data) {
6930 e_info("PHY Wakeup cause - %s\n",
6931 phy_data & E1000_WUS_EX ? "Unicast Packet" :
6932 phy_data & E1000_WUS_MC ? "Multicast Packet" :
6933 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6934 phy_data & E1000_WUS_MAG ? "Magic Packet" :
6935 phy_data & E1000_WUS_LNKC ?
6936 "Link Status Change" : "other");
6937 }
6938 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6939 } else {
6940 u32 wus = er32(WUS);
6941
6942 if (wus) {
6943 e_info("MAC Wakeup cause - %s\n",
6944 wus & E1000_WUS_EX ? "Unicast Packet" :
6945 wus & E1000_WUS_MC ? "Multicast Packet" :
6946 wus & E1000_WUS_BC ? "Broadcast Packet" :
6947 wus & E1000_WUS_MAG ? "Magic Packet" :
6948 wus & E1000_WUS_LNKC ? "Link Status Change" :
6949 "other");
6950 }
6951 ew32(WUS, ~0);
6952 }
6953
6954 e1000e_reset(adapter);
6955
6956 e1000_init_manageability_pt(adapter);
6957
6958 /* If the controller has AMT, do not set DRV_LOAD until the interface
6959 * is up. For all other cases, let the f/w know that the h/w is now
6960 * under the control of the driver.
6961 */
6962 if (!(adapter->flags & FLAG_HAS_AMT))
6963 e1000e_get_hw_control(adapter);
6964
6965 return 0;
6966 }
6967
e1000e_pm_prepare(struct device * dev)6968 static int e1000e_pm_prepare(struct device *dev)
6969 {
6970 return pm_runtime_suspended(dev) &&
6971 pm_suspend_via_firmware();
6972 }
6973
e1000e_pm_suspend(struct device * dev)6974 static int e1000e_pm_suspend(struct device *dev)
6975 {
6976 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6977 struct e1000_adapter *adapter = netdev_priv(netdev);
6978 struct pci_dev *pdev = to_pci_dev(dev);
6979 int rc;
6980
6981 e1000e_flush_lpic(pdev);
6982
6983 e1000e_pm_freeze(dev);
6984
6985 rc = __e1000_shutdown(pdev, false);
6986 if (!rc) {
6987 /* Introduce S0ix implementation */
6988 if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
6989 e1000e_s0ix_entry_flow(adapter);
6990 }
6991
6992 return 0;
6993 }
6994
e1000e_pm_resume(struct device * dev)6995 static int e1000e_pm_resume(struct device *dev)
6996 {
6997 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6998 struct e1000_adapter *adapter = netdev_priv(netdev);
6999 struct pci_dev *pdev = to_pci_dev(dev);
7000 int rc;
7001
7002 /* Introduce S0ix implementation */
7003 if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
7004 e1000e_s0ix_exit_flow(adapter);
7005
7006 rc = __e1000_resume(pdev);
7007 if (rc)
7008 return rc;
7009
7010 return e1000e_pm_thaw(dev);
7011 }
7012
e1000e_pm_runtime_idle(struct device * dev)7013 static __maybe_unused int e1000e_pm_runtime_idle(struct device *dev)
7014 {
7015 struct net_device *netdev = dev_get_drvdata(dev);
7016 struct e1000_adapter *adapter = netdev_priv(netdev);
7017 u16 eee_lp;
7018
7019 eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
7020
7021 if (!e1000e_has_link(adapter)) {
7022 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
7023 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
7024 }
7025
7026 return -EBUSY;
7027 }
7028
e1000e_pm_runtime_resume(struct device * dev)7029 static int e1000e_pm_runtime_resume(struct device *dev)
7030 {
7031 struct pci_dev *pdev = to_pci_dev(dev);
7032 struct net_device *netdev = pci_get_drvdata(pdev);
7033 struct e1000_adapter *adapter = netdev_priv(netdev);
7034 int rc;
7035
7036 pdev->pme_poll = true;
7037
7038 rc = __e1000_resume(pdev);
7039 if (rc)
7040 return rc;
7041
7042 if (netdev->flags & IFF_UP)
7043 e1000e_up(adapter);
7044
7045 return rc;
7046 }
7047
e1000e_pm_runtime_suspend(struct device * dev)7048 static int e1000e_pm_runtime_suspend(struct device *dev)
7049 {
7050 struct pci_dev *pdev = to_pci_dev(dev);
7051 struct net_device *netdev = pci_get_drvdata(pdev);
7052 struct e1000_adapter *adapter = netdev_priv(netdev);
7053
7054 if (netdev->flags & IFF_UP) {
7055 int count = E1000_CHECK_RESET_COUNT;
7056
7057 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
7058 usleep_range(10000, 11000);
7059
7060 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
7061
7062 /* Down the device without resetting the hardware */
7063 e1000e_down(adapter, false);
7064 }
7065
7066 if (__e1000_shutdown(pdev, true)) {
7067 e1000e_pm_runtime_resume(dev);
7068 return -EBUSY;
7069 }
7070
7071 return 0;
7072 }
7073
e1000_shutdown(struct pci_dev * pdev)7074 static void e1000_shutdown(struct pci_dev *pdev)
7075 {
7076 e1000e_flush_lpic(pdev);
7077
7078 e1000e_pm_freeze(&pdev->dev);
7079
7080 __e1000_shutdown(pdev, false);
7081 }
7082
7083 #ifdef CONFIG_NET_POLL_CONTROLLER
7084
e1000_intr_msix(int __always_unused irq,void * data)7085 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
7086 {
7087 struct net_device *netdev = data;
7088 struct e1000_adapter *adapter = netdev_priv(netdev);
7089
7090 if (adapter->msix_entries) {
7091 int vector, msix_irq;
7092
7093 vector = 0;
7094 msix_irq = adapter->msix_entries[vector].vector;
7095 if (disable_hardirq(msix_irq))
7096 e1000_intr_msix_rx(msix_irq, netdev);
7097 enable_irq(msix_irq);
7098
7099 vector++;
7100 msix_irq = adapter->msix_entries[vector].vector;
7101 if (disable_hardirq(msix_irq))
7102 e1000_intr_msix_tx(msix_irq, netdev);
7103 enable_irq(msix_irq);
7104
7105 vector++;
7106 msix_irq = adapter->msix_entries[vector].vector;
7107 if (disable_hardirq(msix_irq))
7108 e1000_msix_other(msix_irq, netdev);
7109 enable_irq(msix_irq);
7110 }
7111
7112 return IRQ_HANDLED;
7113 }
7114
7115 /**
7116 * e1000_netpoll
7117 * @netdev: network interface device structure
7118 *
7119 * Polling 'interrupt' - used by things like netconsole to send skbs
7120 * without having to re-enable interrupts. It's not called while
7121 * the interrupt routine is executing.
7122 */
e1000_netpoll(struct net_device * netdev)7123 static void e1000_netpoll(struct net_device *netdev)
7124 {
7125 struct e1000_adapter *adapter = netdev_priv(netdev);
7126
7127 switch (adapter->int_mode) {
7128 case E1000E_INT_MODE_MSIX:
7129 e1000_intr_msix(adapter->pdev->irq, netdev);
7130 break;
7131 case E1000E_INT_MODE_MSI:
7132 if (disable_hardirq(adapter->pdev->irq))
7133 e1000_intr_msi(adapter->pdev->irq, netdev);
7134 enable_irq(adapter->pdev->irq);
7135 break;
7136 default: /* E1000E_INT_MODE_LEGACY */
7137 if (disable_hardirq(adapter->pdev->irq))
7138 e1000_intr(adapter->pdev->irq, netdev);
7139 enable_irq(adapter->pdev->irq);
7140 break;
7141 }
7142 }
7143 #endif
7144
7145 /**
7146 * e1000_io_error_detected - called when PCI error is detected
7147 * @pdev: Pointer to PCI device
7148 * @state: The current pci connection state
7149 *
7150 * This function is called after a PCI bus error affecting
7151 * this device has been detected.
7152 */
e1000_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)7153 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
7154 pci_channel_state_t state)
7155 {
7156 e1000e_pm_freeze(&pdev->dev);
7157
7158 if (state == pci_channel_io_perm_failure)
7159 return PCI_ERS_RESULT_DISCONNECT;
7160
7161 pci_disable_device(pdev);
7162
7163 /* Request a slot reset. */
7164 return PCI_ERS_RESULT_NEED_RESET;
7165 }
7166
7167 /**
7168 * e1000_io_slot_reset - called after the pci bus has been reset.
7169 * @pdev: Pointer to PCI device
7170 *
7171 * Restart the card from scratch, as if from a cold-boot. Implementation
7172 * resembles the first-half of the e1000e_pm_resume routine.
7173 */
e1000_io_slot_reset(struct pci_dev * pdev)7174 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
7175 {
7176 struct net_device *netdev = pci_get_drvdata(pdev);
7177 struct e1000_adapter *adapter = netdev_priv(netdev);
7178 struct e1000_hw *hw = &adapter->hw;
7179 u16 aspm_disable_flag = 0;
7180 int err;
7181 pci_ers_result_t result;
7182
7183 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
7184 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7185 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
7186 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7187 if (aspm_disable_flag)
7188 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
7189
7190 err = pci_enable_device_mem(pdev);
7191 if (err) {
7192 dev_err(&pdev->dev,
7193 "Cannot re-enable PCI device after reset.\n");
7194 result = PCI_ERS_RESULT_DISCONNECT;
7195 } else {
7196 pci_restore_state(pdev);
7197 pci_set_master(pdev);
7198
7199 pci_enable_wake(pdev, PCI_D3hot, 0);
7200 pci_enable_wake(pdev, PCI_D3cold, 0);
7201
7202 e1000e_reset(adapter);
7203 ew32(WUS, ~0);
7204 result = PCI_ERS_RESULT_RECOVERED;
7205 }
7206
7207 return result;
7208 }
7209
7210 /**
7211 * e1000_io_resume - called when traffic can start flowing again.
7212 * @pdev: Pointer to PCI device
7213 *
7214 * This callback is called when the error recovery driver tells us that
7215 * its OK to resume normal operation. Implementation resembles the
7216 * second-half of the e1000e_pm_resume routine.
7217 */
e1000_io_resume(struct pci_dev * pdev)7218 static void e1000_io_resume(struct pci_dev *pdev)
7219 {
7220 struct net_device *netdev = pci_get_drvdata(pdev);
7221 struct e1000_adapter *adapter = netdev_priv(netdev);
7222
7223 e1000_init_manageability_pt(adapter);
7224
7225 e1000e_pm_thaw(&pdev->dev);
7226
7227 /* If the controller has AMT, do not set DRV_LOAD until the interface
7228 * is up. For all other cases, let the f/w know that the h/w is now
7229 * under the control of the driver.
7230 */
7231 if (!(adapter->flags & FLAG_HAS_AMT))
7232 e1000e_get_hw_control(adapter);
7233 }
7234
e1000_print_device_info(struct e1000_adapter * adapter)7235 static void e1000_print_device_info(struct e1000_adapter *adapter)
7236 {
7237 struct e1000_hw *hw = &adapter->hw;
7238 struct net_device *netdev = adapter->netdev;
7239 u32 ret_val;
7240 u8 pba_str[E1000_PBANUM_LENGTH];
7241
7242 /* print bus type/speed/width info */
7243 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
7244 /* bus width */
7245 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
7246 "Width x1"),
7247 /* MAC address */
7248 netdev->dev_addr);
7249 e_info("Intel(R) PRO/%s Network Connection\n",
7250 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
7251 ret_val = e1000_read_pba_string_generic(hw, pba_str,
7252 E1000_PBANUM_LENGTH);
7253 if (ret_val)
7254 strscpy((char *)pba_str, "Unknown", sizeof(pba_str));
7255 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
7256 hw->mac.type, hw->phy.type, pba_str);
7257 }
7258
e1000_eeprom_checks(struct e1000_adapter * adapter)7259 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
7260 {
7261 struct e1000_hw *hw = &adapter->hw;
7262 int ret_val;
7263 u16 buf = 0;
7264
7265 if (hw->mac.type != e1000_82573)
7266 return;
7267
7268 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
7269 le16_to_cpus(&buf);
7270 if (!ret_val && (!(buf & BIT(0)))) {
7271 /* Deep Smart Power Down (DSPD) */
7272 dev_warn(&adapter->pdev->dev,
7273 "Warning: detected DSPD enabled in EEPROM\n");
7274 }
7275 }
7276
e1000_fix_features(struct net_device * netdev,netdev_features_t features)7277 static netdev_features_t e1000_fix_features(struct net_device *netdev,
7278 netdev_features_t features)
7279 {
7280 struct e1000_adapter *adapter = netdev_priv(netdev);
7281 struct e1000_hw *hw = &adapter->hw;
7282
7283 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
7284 if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
7285 features &= ~NETIF_F_RXFCS;
7286
7287 /* Since there is no support for separate Rx/Tx vlan accel
7288 * enable/disable make sure Tx flag is always in same state as Rx.
7289 */
7290 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7291 features |= NETIF_F_HW_VLAN_CTAG_TX;
7292 else
7293 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
7294
7295 return features;
7296 }
7297
e1000_set_features(struct net_device * netdev,netdev_features_t features)7298 static int e1000_set_features(struct net_device *netdev,
7299 netdev_features_t features)
7300 {
7301 struct e1000_adapter *adapter = netdev_priv(netdev);
7302 netdev_features_t changed = features ^ netdev->features;
7303
7304 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
7305 adapter->flags |= FLAG_TSO_FORCE;
7306
7307 if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
7308 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
7309 NETIF_F_RXALL)))
7310 return 0;
7311
7312 if (changed & NETIF_F_RXFCS) {
7313 if (features & NETIF_F_RXFCS) {
7314 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7315 } else {
7316 /* We need to take it back to defaults, which might mean
7317 * stripping is still disabled at the adapter level.
7318 */
7319 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
7320 adapter->flags2 |= FLAG2_CRC_STRIPPING;
7321 else
7322 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7323 }
7324 }
7325
7326 netdev->features = features;
7327
7328 if (netif_running(netdev))
7329 e1000e_reinit_locked(adapter);
7330 else
7331 e1000e_reset(adapter);
7332
7333 return 1;
7334 }
7335
7336 static const struct net_device_ops e1000e_netdev_ops = {
7337 .ndo_open = e1000e_open,
7338 .ndo_stop = e1000e_close,
7339 .ndo_start_xmit = e1000_xmit_frame,
7340 .ndo_get_stats64 = e1000e_get_stats64,
7341 .ndo_set_rx_mode = e1000e_set_rx_mode,
7342 .ndo_set_mac_address = e1000_set_mac,
7343 .ndo_change_mtu = e1000_change_mtu,
7344 .ndo_eth_ioctl = e1000_ioctl,
7345 .ndo_tx_timeout = e1000_tx_timeout,
7346 .ndo_validate_addr = eth_validate_addr,
7347
7348 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
7349 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
7350 #ifdef CONFIG_NET_POLL_CONTROLLER
7351 .ndo_poll_controller = e1000_netpoll,
7352 #endif
7353 .ndo_set_features = e1000_set_features,
7354 .ndo_fix_features = e1000_fix_features,
7355 .ndo_features_check = passthru_features_check,
7356 .ndo_hwtstamp_get = e1000e_hwtstamp_get,
7357 .ndo_hwtstamp_set = e1000e_hwtstamp_set,
7358 };
7359
7360 /**
7361 * e1000_probe - Device Initialization Routine
7362 * @pdev: PCI device information struct
7363 * @ent: entry in e1000_pci_tbl
7364 *
7365 * Returns 0 on success, negative on failure
7366 *
7367 * e1000_probe initializes an adapter identified by a pci_dev structure.
7368 * The OS initialization, configuring of the adapter private structure,
7369 * and a hardware reset occur.
7370 **/
e1000_probe(struct pci_dev * pdev,const struct pci_device_id * ent)7371 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7372 {
7373 struct net_device *netdev;
7374 struct e1000_adapter *adapter;
7375 struct e1000_hw *hw;
7376 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7377 resource_size_t mmio_start, mmio_len;
7378 resource_size_t flash_start, flash_len;
7379 static int cards_found;
7380 u16 aspm_disable_flag = 0;
7381 u16 eeprom_data = 0;
7382 u16 eeprom_apme_mask = E1000_EEPROM_APME;
7383 int bars, i, err;
7384 s32 ret_val = 0;
7385
7386 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7387 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7388 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7389 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7390 if (aspm_disable_flag)
7391 e1000e_disable_aspm(pdev, aspm_disable_flag);
7392
7393 err = pci_enable_device_mem(pdev);
7394 if (err)
7395 return err;
7396
7397 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7398 if (err) {
7399 dev_err(&pdev->dev,
7400 "No usable DMA configuration, aborting\n");
7401 goto err_dma;
7402 }
7403
7404 bars = pci_select_bars(pdev, IORESOURCE_MEM);
7405 err = pci_request_selected_regions_exclusive(pdev, bars,
7406 e1000e_driver_name);
7407 if (err)
7408 goto err_pci_reg;
7409
7410 pci_set_master(pdev);
7411 /* PCI config space info */
7412 err = pci_save_state(pdev);
7413 if (err)
7414 goto err_alloc_etherdev;
7415
7416 err = -ENOMEM;
7417 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7418 if (!netdev)
7419 goto err_alloc_etherdev;
7420
7421 SET_NETDEV_DEV(netdev, &pdev->dev);
7422
7423 netdev->irq = pdev->irq;
7424
7425 pci_set_drvdata(pdev, netdev);
7426 adapter = netdev_priv(netdev);
7427 hw = &adapter->hw;
7428 adapter->netdev = netdev;
7429 adapter->pdev = pdev;
7430 adapter->ei = ei;
7431 adapter->pba = ei->pba;
7432 adapter->flags = ei->flags;
7433 adapter->flags2 = ei->flags2;
7434 adapter->hw.adapter = adapter;
7435 adapter->hw.mac.type = ei->mac;
7436 adapter->max_hw_frame_size = ei->max_hw_frame_size;
7437 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7438
7439 mmio_start = pci_resource_start(pdev, 0);
7440 mmio_len = pci_resource_len(pdev, 0);
7441
7442 err = -EIO;
7443 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7444 if (!adapter->hw.hw_addr)
7445 goto err_ioremap;
7446
7447 if ((adapter->flags & FLAG_HAS_FLASH) &&
7448 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7449 (hw->mac.type < e1000_pch_spt)) {
7450 flash_start = pci_resource_start(pdev, 1);
7451 flash_len = pci_resource_len(pdev, 1);
7452 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7453 if (!adapter->hw.flash_address)
7454 goto err_flashmap;
7455 }
7456
7457 /* Set default EEE advertisement */
7458 if (adapter->flags2 & FLAG2_HAS_EEE)
7459 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7460
7461 /* construct the net_device struct */
7462 netdev->netdev_ops = &e1000e_netdev_ops;
7463 e1000e_set_ethtool_ops(netdev);
7464 netdev->watchdog_timeo = 5 * HZ;
7465 netif_napi_add(netdev, &adapter->napi, e1000e_poll);
7466 strscpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7467
7468 netdev->mem_start = mmio_start;
7469 netdev->mem_end = mmio_start + mmio_len;
7470
7471 adapter->bd_number = cards_found++;
7472
7473 e1000e_check_options(adapter);
7474
7475 /* setup adapter struct */
7476 err = e1000_sw_init(adapter);
7477 if (err)
7478 goto err_sw_init;
7479
7480 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7481 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7482 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7483
7484 err = ei->get_variants(adapter);
7485 if (err)
7486 goto err_hw_init;
7487
7488 if ((adapter->flags & FLAG_IS_ICH) &&
7489 (adapter->flags & FLAG_READ_ONLY_NVM) &&
7490 (hw->mac.type < e1000_pch_spt))
7491 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7492
7493 hw->mac.ops.get_bus_info(&adapter->hw);
7494
7495 adapter->hw.phy.autoneg_wait_to_complete = 0;
7496
7497 /* Copper options */
7498 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7499 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7500 adapter->hw.phy.disable_polarity_correction = 0;
7501 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7502 }
7503
7504 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7505 dev_info(&pdev->dev,
7506 "PHY reset is blocked due to SOL/IDER session.\n");
7507
7508 /* Set initial default active device features */
7509 netdev->features = (NETIF_F_SG |
7510 NETIF_F_HW_VLAN_CTAG_RX |
7511 NETIF_F_HW_VLAN_CTAG_TX |
7512 NETIF_F_TSO |
7513 NETIF_F_TSO6 |
7514 NETIF_F_RXHASH |
7515 NETIF_F_RXCSUM |
7516 NETIF_F_HW_CSUM);
7517
7518 /* disable TSO for pcie and 10/100 speeds to avoid
7519 * some hardware issues and for i219 to fix transfer
7520 * speed being capped at 60%
7521 */
7522 if (!(adapter->flags & FLAG_TSO_FORCE)) {
7523 switch (adapter->link_speed) {
7524 case SPEED_10:
7525 case SPEED_100:
7526 e_info("10/100 speed: disabling TSO\n");
7527 netdev->features &= ~NETIF_F_TSO;
7528 netdev->features &= ~NETIF_F_TSO6;
7529 break;
7530 case SPEED_1000:
7531 netdev->features |= NETIF_F_TSO;
7532 netdev->features |= NETIF_F_TSO6;
7533 break;
7534 default:
7535 /* oops */
7536 break;
7537 }
7538 if (hw->mac.type == e1000_pch_spt) {
7539 netdev->features &= ~NETIF_F_TSO;
7540 netdev->features &= ~NETIF_F_TSO6;
7541 }
7542 }
7543
7544 /* Set user-changeable features (subset of all device features) */
7545 netdev->hw_features = netdev->features;
7546 netdev->hw_features |= NETIF_F_RXFCS;
7547 netdev->priv_flags |= IFF_SUPP_NOFCS;
7548 netdev->hw_features |= NETIF_F_RXALL;
7549
7550 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7551 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7552
7553 netdev->vlan_features |= (NETIF_F_SG |
7554 NETIF_F_TSO |
7555 NETIF_F_TSO6 |
7556 NETIF_F_HW_CSUM);
7557
7558 netdev->priv_flags |= IFF_UNICAST_FLT;
7559
7560 netdev->features |= NETIF_F_HIGHDMA;
7561 netdev->vlan_features |= NETIF_F_HIGHDMA;
7562
7563 /* MTU range: 68 - max_hw_frame_size */
7564 netdev->min_mtu = ETH_MIN_MTU;
7565 netdev->max_mtu = adapter->max_hw_frame_size -
7566 (VLAN_ETH_HLEN + ETH_FCS_LEN);
7567
7568 if (e1000e_enable_mng_pass_thru(&adapter->hw))
7569 adapter->flags |= FLAG_MNG_PT_ENABLED;
7570
7571 /* before reading the NVM, reset the controller to
7572 * put the device in a known good starting state
7573 */
7574 adapter->hw.mac.ops.reset_hw(&adapter->hw);
7575
7576 /* systems with ASPM and others may see the checksum fail on the first
7577 * attempt. Let's give it a few tries
7578 */
7579 for (i = 0;; i++) {
7580 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7581 break;
7582 if (i == 2) {
7583 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7584 err = -EIO;
7585 goto err_eeprom;
7586 }
7587 }
7588
7589 e1000_eeprom_checks(adapter);
7590
7591 /* copy the MAC address */
7592 if (e1000e_read_mac_addr(&adapter->hw))
7593 dev_err(&pdev->dev,
7594 "NVM Read Error while reading MAC address\n");
7595
7596 eth_hw_addr_set(netdev, adapter->hw.mac.addr);
7597
7598 if (!is_valid_ether_addr(netdev->dev_addr)) {
7599 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7600 netdev->dev_addr);
7601 err = -EIO;
7602 goto err_eeprom;
7603 }
7604
7605 timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7606 timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7607
7608 INIT_WORK(&adapter->reset_task, e1000_reset_task);
7609 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7610 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7611 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7612 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7613
7614 /* Initialize link parameters. User can change them with ethtool */
7615 adapter->hw.mac.autoneg = 1;
7616 adapter->fc_autoneg = true;
7617 adapter->hw.fc.requested_mode = e1000_fc_default;
7618 adapter->hw.fc.current_mode = e1000_fc_default;
7619 adapter->hw.phy.autoneg_advertised = 0x2f;
7620
7621 /* Initial Wake on LAN setting - If APM wake is enabled in
7622 * the EEPROM, enable the ACPI Magic Packet filter
7623 */
7624 if (adapter->flags & FLAG_APME_IN_WUC) {
7625 /* APME bit in EEPROM is mapped to WUC.APME */
7626 eeprom_data = er32(WUC);
7627 eeprom_apme_mask = E1000_WUC_APME;
7628 if ((hw->mac.type > e1000_ich10lan) &&
7629 (eeprom_data & E1000_WUC_PHY_WAKE))
7630 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7631 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7632 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7633 (adapter->hw.bus.func == 1))
7634 ret_val = e1000_read_nvm(&adapter->hw,
7635 NVM_INIT_CONTROL3_PORT_B,
7636 1, &eeprom_data);
7637 else
7638 ret_val = e1000_read_nvm(&adapter->hw,
7639 NVM_INIT_CONTROL3_PORT_A,
7640 1, &eeprom_data);
7641 }
7642
7643 /* fetch WoL from EEPROM */
7644 if (ret_val)
7645 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7646 else if (eeprom_data & eeprom_apme_mask)
7647 adapter->eeprom_wol |= E1000_WUFC_MAG;
7648
7649 /* now that we have the eeprom settings, apply the special cases
7650 * where the eeprom may be wrong or the board simply won't support
7651 * wake on lan on a particular port
7652 */
7653 if (!(adapter->flags & FLAG_HAS_WOL))
7654 adapter->eeprom_wol = 0;
7655
7656 /* initialize the wol settings based on the eeprom settings */
7657 adapter->wol = adapter->eeprom_wol;
7658
7659 /* make sure adapter isn't asleep if manageability is enabled */
7660 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7661 (hw->mac.ops.check_mng_mode(hw)))
7662 device_wakeup_enable(&pdev->dev);
7663
7664 /* save off EEPROM version number */
7665 ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7666
7667 if (ret_val) {
7668 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7669 adapter->eeprom_vers = 0;
7670 }
7671
7672 /* init PTP hardware clock */
7673 e1000e_ptp_init(adapter);
7674
7675 if (hw->mac.type >= e1000_pch_mtp)
7676 adapter->flags2 |= FLAG2_DISABLE_K1;
7677
7678 /* reset the hardware with the new settings */
7679 e1000e_reset(adapter);
7680
7681 /* If the controller has AMT, do not set DRV_LOAD until the interface
7682 * is up. For all other cases, let the f/w know that the h/w is now
7683 * under the control of the driver.
7684 */
7685 if (!(adapter->flags & FLAG_HAS_AMT))
7686 e1000e_get_hw_control(adapter);
7687
7688 if (hw->mac.type >= e1000_pch_cnp)
7689 adapter->flags2 |= FLAG2_ENABLE_S0IX_FLOWS;
7690
7691 strscpy(netdev->name, "eth%d", sizeof(netdev->name));
7692 err = register_netdev(netdev);
7693 if (err)
7694 goto err_register;
7695
7696 /* carrier off reporting is important to ethtool even BEFORE open */
7697 netif_carrier_off(netdev);
7698
7699 e1000_print_device_info(adapter);
7700
7701 dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_SMART_PREPARE);
7702
7703 if (pci_dev_run_wake(pdev))
7704 pm_runtime_put_noidle(&pdev->dev);
7705
7706 return 0;
7707
7708 err_register:
7709 if (!(adapter->flags & FLAG_HAS_AMT))
7710 e1000e_release_hw_control(adapter);
7711 err_eeprom:
7712 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7713 e1000_phy_hw_reset(&adapter->hw);
7714 err_hw_init:
7715 kfree(adapter->tx_ring);
7716 kfree(adapter->rx_ring);
7717 err_sw_init:
7718 if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7719 iounmap(adapter->hw.flash_address);
7720 e1000e_reset_interrupt_capability(adapter);
7721 err_flashmap:
7722 iounmap(adapter->hw.hw_addr);
7723 err_ioremap:
7724 free_netdev(netdev);
7725 err_alloc_etherdev:
7726 pci_release_mem_regions(pdev);
7727 err_pci_reg:
7728 err_dma:
7729 pci_disable_device(pdev);
7730 return err;
7731 }
7732
7733 /**
7734 * e1000_remove - Device Removal Routine
7735 * @pdev: PCI device information struct
7736 *
7737 * e1000_remove is called by the PCI subsystem to alert the driver
7738 * that it should release a PCI device. This could be caused by a
7739 * Hot-Plug event, or because the driver is going to be removed from
7740 * memory.
7741 **/
e1000_remove(struct pci_dev * pdev)7742 static void e1000_remove(struct pci_dev *pdev)
7743 {
7744 struct net_device *netdev = pci_get_drvdata(pdev);
7745 struct e1000_adapter *adapter = netdev_priv(netdev);
7746
7747 e1000e_ptp_remove(adapter);
7748
7749 /* The timers may be rescheduled, so explicitly disable them
7750 * from being rescheduled.
7751 */
7752 set_bit(__E1000_DOWN, &adapter->state);
7753 timer_delete_sync(&adapter->watchdog_timer);
7754 timer_delete_sync(&adapter->phy_info_timer);
7755
7756 cancel_work_sync(&adapter->reset_task);
7757 cancel_work_sync(&adapter->watchdog_task);
7758 cancel_work_sync(&adapter->downshift_task);
7759 cancel_work_sync(&adapter->update_phy_task);
7760 cancel_work_sync(&adapter->print_hang_task);
7761
7762 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7763 cancel_work_sync(&adapter->tx_hwtstamp_work);
7764 if (adapter->tx_hwtstamp_skb) {
7765 dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7766 adapter->tx_hwtstamp_skb = NULL;
7767 }
7768 }
7769
7770 unregister_netdev(netdev);
7771
7772 if (pci_dev_run_wake(pdev))
7773 pm_runtime_get_noresume(&pdev->dev);
7774
7775 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7776 * would have already happened in close and is redundant.
7777 */
7778 e1000e_release_hw_control(adapter);
7779
7780 e1000e_reset_interrupt_capability(adapter);
7781 kfree(adapter->tx_ring);
7782 kfree(adapter->rx_ring);
7783
7784 iounmap(adapter->hw.hw_addr);
7785 if ((adapter->hw.flash_address) &&
7786 (adapter->hw.mac.type < e1000_pch_spt))
7787 iounmap(adapter->hw.flash_address);
7788 pci_release_mem_regions(pdev);
7789
7790 free_netdev(netdev);
7791
7792 pci_disable_device(pdev);
7793 }
7794
7795 /* PCI Error Recovery (ERS) */
7796 static const struct pci_error_handlers e1000_err_handler = {
7797 .error_detected = e1000_io_error_detected,
7798 .slot_reset = e1000_io_slot_reset,
7799 .resume = e1000_io_resume,
7800 };
7801
7802 static const struct pci_device_id e1000_pci_tbl[] = {
7803 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7804 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7805 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7806 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7807 board_82571 },
7808 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7809 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7810 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7811 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7812 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7813
7814 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7815 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7816 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7817 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7818
7819 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7820 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7821 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7822
7823 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7824 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7825 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7826
7827 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7828 board_80003es2lan },
7829 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7830 board_80003es2lan },
7831 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7832 board_80003es2lan },
7833 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7834 board_80003es2lan },
7835
7836 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7837 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7838 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7839 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7840 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7841 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7842 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7843 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7844
7845 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7846 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7847 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7848 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7849 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7850 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7851 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7852 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7853 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7854
7855 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7856 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7857 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7858
7859 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7860 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7861 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7862
7863 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7864 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7865 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7866 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7867
7868 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7869 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7870
7871 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7872 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7873 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7874 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7875 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7876 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7877 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7878 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7879 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7880 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7881 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7882 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7883 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7884 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7885 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7886 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7887 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7888 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7889 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7890 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7891 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7892 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7893 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7894 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7895 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7896 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
7897 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
7898 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
7899 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
7900 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
7901 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
7902 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM13), board_pch_tgp },
7903 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V13), board_pch_tgp },
7904 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM14), board_pch_tgp },
7905 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_tgp },
7906 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_tgp },
7907 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_tgp },
7908 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM23), board_pch_adp },
7909 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V23), board_pch_adp },
7910 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_adp },
7911 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_adp },
7912 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_adp },
7913 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_adp },
7914 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_adp },
7915 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_adp },
7916 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM19), board_pch_adp },
7917 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V19), board_pch_adp },
7918 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_mtp },
7919 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_mtp },
7920 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_mtp },
7921 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_mtp },
7922 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_mtp },
7923 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_mtp },
7924 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ARL_I219_LM24), board_pch_mtp },
7925 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ARL_I219_V24), board_pch_mtp },
7926 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM25), board_pch_ptp },
7927 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V25), board_pch_ptp },
7928 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM27), board_pch_ptp },
7929 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V27), board_pch_ptp },
7930 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_LM29), board_pch_ptp },
7931 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_V29), board_pch_ptp },
7932
7933 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7934 };
7935 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7936
7937 static const struct dev_pm_ops e1000e_pm_ops = {
7938 .prepare = e1000e_pm_prepare,
7939 .suspend = e1000e_pm_suspend,
7940 .resume = e1000e_pm_resume,
7941 .freeze = e1000e_pm_freeze,
7942 .thaw = e1000e_pm_thaw,
7943 .poweroff = e1000e_pm_suspend,
7944 .restore = e1000e_pm_resume,
7945 RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7946 e1000e_pm_runtime_idle)
7947 };
7948
7949 /* PCI Device API Driver */
7950 static struct pci_driver e1000_driver = {
7951 .name = e1000e_driver_name,
7952 .id_table = e1000_pci_tbl,
7953 .probe = e1000_probe,
7954 .remove = e1000_remove,
7955 .driver.pm = pm_ptr(&e1000e_pm_ops),
7956 .shutdown = e1000_shutdown,
7957 .err_handler = &e1000_err_handler
7958 };
7959
7960 /**
7961 * e1000_init_module - Driver Registration Routine
7962 *
7963 * e1000_init_module is the first routine called when the driver is
7964 * loaded. All it does is register with the PCI subsystem.
7965 **/
e1000_init_module(void)7966 static int __init e1000_init_module(void)
7967 {
7968 pr_info("Intel(R) PRO/1000 Network Driver\n");
7969 pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7970
7971 return pci_register_driver(&e1000_driver);
7972 }
7973 module_init(e1000_init_module);
7974
7975 /**
7976 * e1000_exit_module - Driver Exit Cleanup Routine
7977 *
7978 * e1000_exit_module is called just before the driver is removed
7979 * from memory.
7980 **/
e1000_exit_module(void)7981 static void __exit e1000_exit_module(void)
7982 {
7983 pci_unregister_driver(&e1000_driver);
7984 }
7985 module_exit(e1000_exit_module);
7986
7987 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7988 MODULE_LICENSE("GPL v2");
7989
7990 /* netdev.c */
7991