1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
5 */
6 #include <linux/skbuff.h>
7 #include <linux/ctype.h>
8 #include <net/mac80211.h>
9 #include <net/cfg80211.h>
10 #include <linux/completion.h>
11 #include <linux/if_ether.h>
12 #include <linux/types.h>
13 #include <linux/pci.h>
14 #include <linux/uuid.h>
15 #include <linux/time.h>
16 #include <linux/of.h>
17 #include <linux/cleanup.h>
18 #include "core.h"
19 #include "debugfs.h"
20 #include "debug.h"
21 #include "mac.h"
22 #include "hw.h"
23 #include "peer.h"
24 #include "p2p.h"
25 #include "testmode.h"
26
27 struct ath12k_wmi_svc_ready_parse {
28 bool wmi_svc_bitmap_done;
29 };
30
31 struct wmi_tlv_fw_stats_parse {
32 const struct wmi_stats_event *ev;
33 struct ath12k_fw_stats *stats;
34 const struct wmi_per_chain_rssi_stat_params *rssi;
35 int rssi_num;
36 bool chain_rssi_done;
37 };
38
39 struct ath12k_wmi_dma_ring_caps_parse {
40 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps;
41 u32 n_dma_ring_caps;
42 };
43
44 struct ath12k_wmi_service_ext_arg {
45 u32 default_conc_scan_config_bits;
46 u32 default_fw_config_bits;
47 struct ath12k_wmi_ppe_threshold_arg ppet;
48 u32 he_cap_info;
49 u32 mpdu_density;
50 u32 max_bssid_rx_filters;
51 u32 num_hw_modes;
52 u32 num_phy;
53 };
54
55 struct ath12k_wmi_svc_rdy_ext_parse {
56 struct ath12k_wmi_service_ext_arg arg;
57 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps;
58 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
59 u32 n_hw_mode_caps;
60 u32 tot_phy_id;
61 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps;
62 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps;
63 u32 n_mac_phy_caps;
64 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps;
65 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps;
66 u32 n_ext_hal_reg_caps;
67 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
68 bool hw_mode_done;
69 bool mac_phy_done;
70 bool ext_hal_reg_done;
71 bool mac_phy_chainmask_combo_done;
72 bool mac_phy_chainmask_cap_done;
73 bool oem_dma_ring_cap_done;
74 bool dma_ring_cap_done;
75 };
76
77 struct ath12k_wmi_svc_rdy_ext2_arg {
78 u32 reg_db_version;
79 u32 hw_min_max_tx_power_2ghz;
80 u32 hw_min_max_tx_power_5ghz;
81 u32 chwidth_num_peer_caps;
82 u32 preamble_puncture_bw;
83 u32 max_user_per_ppdu_ofdma;
84 u32 max_user_per_ppdu_mumimo;
85 u32 target_cap_flags;
86 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
87 u32 max_num_linkview_peers;
88 u32 max_num_msduq_supported_per_tid;
89 u32 default_num_msduq_supported_per_tid;
90 };
91
92 struct ath12k_wmi_svc_rdy_ext2_parse {
93 struct ath12k_wmi_svc_rdy_ext2_arg arg;
94 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
95 bool dma_ring_cap_done;
96 bool spectral_bin_scaling_done;
97 bool mac_phy_caps_ext_done;
98 bool hal_reg_caps_ext2_done;
99 bool scan_radio_caps_ext2_done;
100 bool twt_caps_done;
101 bool htt_msdu_idx_to_qtype_map_done;
102 bool dbs_or_sbs_cap_ext_done;
103 };
104
105 struct ath12k_wmi_rdy_parse {
106 u32 num_extra_mac_addr;
107 };
108
109 struct ath12k_wmi_dma_buf_release_arg {
110 struct ath12k_wmi_dma_buf_release_fixed_params fixed;
111 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry;
112 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data;
113 u32 num_buf_entry;
114 u32 num_meta;
115 bool buf_entry_done;
116 bool meta_data_done;
117 };
118
119 struct ath12k_wmi_tlv_policy {
120 size_t min_len;
121 };
122
123 struct wmi_tlv_mgmt_rx_parse {
124 const struct ath12k_wmi_mgmt_rx_params *fixed;
125 const u8 *frame_buf;
126 bool frame_buf_done;
127 };
128
129 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = {
130 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 },
131 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 },
132 [WMI_TAG_SERVICE_READY_EVENT] = {
133 .min_len = sizeof(struct wmi_service_ready_event) },
134 [WMI_TAG_SERVICE_READY_EXT_EVENT] = {
135 .min_len = sizeof(struct wmi_service_ready_ext_event) },
136 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = {
137 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) },
138 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = {
139 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) },
140 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = {
141 .min_len = sizeof(struct wmi_vdev_start_resp_event) },
142 [WMI_TAG_PEER_DELETE_RESP_EVENT] = {
143 .min_len = sizeof(struct wmi_peer_delete_resp_event) },
144 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = {
145 .min_len = sizeof(struct wmi_bcn_tx_status_event) },
146 [WMI_TAG_VDEV_STOPPED_EVENT] = {
147 .min_len = sizeof(struct wmi_vdev_stopped_event) },
148 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = {
149 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
150 [WMI_TAG_MGMT_RX_HDR] = {
151 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) },
152 [WMI_TAG_MGMT_TX_COMPL_EVENT] = {
153 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) },
154 [WMI_TAG_SCAN_EVENT] = {
155 .min_len = sizeof(struct wmi_scan_event) },
156 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = {
157 .min_len = sizeof(struct wmi_peer_sta_kickout_event) },
158 [WMI_TAG_ROAM_EVENT] = {
159 .min_len = sizeof(struct wmi_roam_event) },
160 [WMI_TAG_CHAN_INFO_EVENT] = {
161 .min_len = sizeof(struct wmi_chan_info_event) },
162 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = {
163 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) },
164 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = {
165 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) },
166 [WMI_TAG_READY_EVENT] = {
167 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) },
168 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = {
169 .min_len = sizeof(struct wmi_service_available_event) },
170 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = {
171 .min_len = sizeof(struct wmi_peer_assoc_conf_event) },
172 [WMI_TAG_RFKILL_EVENT] = {
173 .min_len = sizeof(struct wmi_rfkill_state_change_event) },
174 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = {
175 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) },
176 [WMI_TAG_HOST_SWFDA_EVENT] = {
177 .min_len = sizeof(struct wmi_fils_discovery_event) },
178 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = {
179 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
180 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
181 .min_len = sizeof(struct wmi_vdev_delete_resp_event) },
182 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = {
183 .min_len = sizeof(struct wmi_twt_enable_event) },
184 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = {
185 .min_len = sizeof(struct wmi_twt_disable_event) },
186 [WMI_TAG_P2P_NOA_INFO] = {
187 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) },
188 [WMI_TAG_P2P_NOA_EVENT] = {
189 .min_len = sizeof(struct wmi_p2p_noa_event) },
190 [WMI_TAG_11D_NEW_COUNTRY_EVENT] = {
191 .min_len = sizeof(struct wmi_11d_new_cc_event) },
192 [WMI_TAG_PER_CHAIN_RSSI_STATS] = {
193 .min_len = sizeof(struct wmi_per_chain_rssi_stat_params) },
194 [WMI_TAG_OBSS_COLOR_COLLISION_EVT] = {
195 .min_len = sizeof(struct wmi_obss_color_collision_event) },
196 };
197
ath12k_wmi_tlv_hdr(u32 cmd,u32 len)198 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
199 {
200 return le32_encode_bits(cmd, WMI_TLV_TAG) |
201 le32_encode_bits(len, WMI_TLV_LEN);
202 }
203
ath12k_wmi_tlv_cmd_hdr(u32 cmd,u32 len)204 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
205 {
206 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE);
207 }
208
ath12k_wmi_init_qcn9274(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)209 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
210 struct ath12k_wmi_resource_config_arg *config)
211 {
212 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS(ab);
213 config->num_peers = ab->num_radios *
214 ath12k_core_get_max_peers_per_radio(ab);
215 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS;
216 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS;
217 config->num_peer_keys = TARGET_NUM_PEER_KEYS;
218 config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
219 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
220 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
221 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
222 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
223 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
224 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
225
226 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags))
227 config->rx_decap_mode = TARGET_DECAP_MODE_RAW;
228 else
229 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
230
231 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
232 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
233 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
234 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
235 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS;
236 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS;
237 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE;
238 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
239 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES;
240 config->dma_burst_size = TARGET_DMA_BURST_SIZE;
241 config->rx_skip_defrag_timeout_dup_detection_check =
242 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
243 config->vow_config = TARGET_VOW_CONFIG;
244 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV;
245 config->num_msdu_desc = TARGET_NUM_MSDU_DESC;
246 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD;
247 config->rx_batchmode = TARGET_RX_BATCHMODE;
248 /* Indicates host supports peer map v3 and unmap v2 support */
249 config->peer_map_unmap_version = 0x32;
250 config->twt_ap_pdev_count = ab->num_radios;
251 config->twt_ap_sta_count = 1000;
252 config->ema_max_vap_cnt = ab->num_radios;
253 config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD;
254 config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt;
255
256 if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map))
257 config->peer_metadata_ver = ATH12K_PEER_METADATA_V1B;
258 }
259
ath12k_wmi_init_wcn7850(struct ath12k_base * ab,struct ath12k_wmi_resource_config_arg * config)260 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
261 struct ath12k_wmi_resource_config_arg *config)
262 {
263 config->num_vdevs = 4;
264 config->num_peers = 16;
265 config->num_tids = 32;
266
267 config->num_offload_peers = 3;
268 config->num_offload_reorder_buffs = 3;
269 config->num_peer_keys = TARGET_NUM_PEER_KEYS;
270 config->ast_skid_limit = TARGET_AST_SKID_LIMIT;
271 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
272 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1;
273 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI;
274 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI;
275 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI;
276 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI;
277 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI;
278 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS;
279 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV;
280 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV;
281 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES;
282 config->num_mcast_groups = 0;
283 config->num_mcast_table_elems = 0;
284 config->mcast2ucast_mode = 0;
285 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE;
286 config->num_wds_entries = 0;
287 config->dma_burst_size = 0;
288 config->rx_skip_defrag_timeout_dup_detection_check = 0;
289 config->vow_config = TARGET_VOW_CONFIG;
290 config->gtk_offload_max_vdev = 2;
291 config->num_msdu_desc = 0x400;
292 config->beacon_tx_offload_max_vdev = 2;
293 config->rx_batchmode = TARGET_RX_BATCHMODE;
294
295 config->peer_map_unmap_version = 0x1;
296 config->use_pdev_id = 1;
297 config->max_frag_entries = 0xa;
298 config->num_tdls_vdevs = 0x1;
299 config->num_tdls_conn_table_entries = 8;
300 config->beacon_tx_offload_max_vdev = 0x2;
301 config->num_multicast_filter_entries = 0x20;
302 config->num_wow_filters = 0x16;
303 config->num_keep_alive_pattern = 0;
304 }
305
306 #define PRIMAP(_hw_mode_) \
307 [_hw_mode_] = _hw_mode_##_PRI
308
309 static const int ath12k_hw_mode_pri_map[] = {
310 PRIMAP(WMI_HOST_HW_MODE_SINGLE),
311 PRIMAP(WMI_HOST_HW_MODE_DBS),
312 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE),
313 PRIMAP(WMI_HOST_HW_MODE_SBS),
314 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS),
315 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS),
316 /* keep last */
317 PRIMAP(WMI_HOST_HW_MODE_MAX),
318 };
319
320 static int
ath12k_wmi_tlv_iter(struct ath12k_base * ab,const void * ptr,size_t len,int (* iter)(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data),void * data)321 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len,
322 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len,
323 const void *ptr, void *data),
324 void *data)
325 {
326 const void *begin = ptr;
327 const struct wmi_tlv *tlv;
328 u16 tlv_tag, tlv_len;
329 int ret;
330
331 while (len > 0) {
332 if (len < sizeof(*tlv)) {
333 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
334 ptr - begin, len, sizeof(*tlv));
335 return -EINVAL;
336 }
337
338 tlv = ptr;
339 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
340 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
341 ptr += sizeof(*tlv);
342 len -= sizeof(*tlv);
343
344 if (tlv_len > len) {
345 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
346 tlv_tag, ptr - begin, len, tlv_len);
347 return -EINVAL;
348 }
349
350 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) &&
351 ath12k_wmi_tlv_policies[tlv_tag].min_len &&
352 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) {
353 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n",
354 tlv_tag, ptr - begin, tlv_len,
355 ath12k_wmi_tlv_policies[tlv_tag].min_len);
356 return -EINVAL;
357 }
358
359 ret = iter(ab, tlv_tag, tlv_len, ptr, data);
360 if (ret)
361 return ret;
362
363 ptr += tlv_len;
364 len -= tlv_len;
365 }
366
367 return 0;
368 }
369
ath12k_wmi_tlv_iter_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)370 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len,
371 const void *ptr, void *data)
372 {
373 const void **tb = data;
374
375 if (tag < WMI_TAG_MAX)
376 tb[tag] = ptr;
377
378 return 0;
379 }
380
ath12k_wmi_tlv_parse(struct ath12k_base * ar,const void ** tb,const void * ptr,size_t len)381 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb,
382 const void *ptr, size_t len)
383 {
384 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse,
385 (void *)tb);
386 }
387
388 static const void **
ath12k_wmi_tlv_parse_alloc(struct ath12k_base * ab,struct sk_buff * skb,gfp_t gfp)389 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab,
390 struct sk_buff *skb, gfp_t gfp)
391 {
392 const void **tb;
393 int ret;
394
395 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp);
396 if (!tb)
397 return ERR_PTR(-ENOMEM);
398
399 ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len);
400 if (ret) {
401 kfree(tb);
402 return ERR_PTR(ret);
403 }
404
405 return tb;
406 }
407
ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)408 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
409 u32 cmd_id)
410 {
411 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
412 struct ath12k_base *ab = wmi->wmi_ab->ab;
413 struct wmi_cmd_hdr *cmd_hdr;
414 int ret;
415
416 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr)))
417 return -ENOMEM;
418
419 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
420 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID);
421
422 memset(skb_cb, 0, sizeof(*skb_cb));
423 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb);
424
425 if (ret)
426 goto err_pull;
427
428 return 0;
429
430 err_pull:
431 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
432 return ret;
433 }
434
ath12k_wmi_cmd_send(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)435 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
436 u32 cmd_id)
437 {
438 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab;
439 int ret = -EOPNOTSUPP;
440
441 might_sleep();
442
443 wait_event_timeout(wmi_ab->tx_credits_wq, ({
444 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
445
446 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags))
447 ret = -ESHUTDOWN;
448
449 (ret != -EAGAIN);
450 }), WMI_SEND_TIMEOUT_HZ);
451
452 if (ret == -EAGAIN)
453 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id);
454
455 return ret;
456 }
457
ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_service_ext_arg * arg)458 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
459 const void *ptr,
460 struct ath12k_wmi_service_ext_arg *arg)
461 {
462 const struct wmi_service_ready_ext_event *ev = ptr;
463 int i;
464
465 if (!ev)
466 return -EINVAL;
467
468 /* Move this to host based bitmap */
469 arg->default_conc_scan_config_bits =
470 le32_to_cpu(ev->default_conc_scan_config_bits);
471 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits);
472 arg->he_cap_info = le32_to_cpu(ev->he_cap_info);
473 arg->mpdu_density = le32_to_cpu(ev->mpdu_density);
474 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters);
475 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1);
476 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info);
477
478 for (i = 0; i < WMI_MAX_NUM_SS; i++)
479 arg->ppet.ppet16_ppet8_ru3_ru0[i] =
480 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]);
481
482 return 0;
483 }
484
485 static int
ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,struct ath12k_wmi_svc_rdy_ext_parse * svc,u8 hw_mode_id,u8 phy_id,struct ath12k_pdev * pdev)486 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
487 struct ath12k_wmi_svc_rdy_ext_parse *svc,
488 u8 hw_mode_id, u8 phy_id,
489 struct ath12k_pdev *pdev)
490 {
491 const struct ath12k_wmi_mac_phy_caps_params *mac_caps;
492 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps;
493 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps;
494 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps;
495 struct ath12k_base *ab = wmi_handle->wmi_ab->ab;
496 struct ath12k_band_cap *cap_band;
497 struct ath12k_pdev_cap *pdev_cap = &pdev->cap;
498 struct ath12k_fw_pdev *fw_pdev;
499 u32 phy_map;
500 u32 hw_idx, phy_idx = 0;
501 int i;
502
503 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps)
504 return -EINVAL;
505
506 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) {
507 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id))
508 break;
509
510 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map);
511 phy_idx = fls(phy_map);
512 }
513
514 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes))
515 return -EINVAL;
516
517 phy_idx += phy_id;
518 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy))
519 return -EINVAL;
520
521 mac_caps = wmi_mac_phy_caps + phy_idx;
522
523 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
524 pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps);
525 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands);
526 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density);
527
528 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count];
529 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands);
530 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
531 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id);
532 ab->fw_pdev_count++;
533
534 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
535 * band to band for a single radio, need to see how this should be
536 * handled.
537 */
538 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) {
539 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g);
540 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g);
541 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) {
542 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g);
543 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g);
544 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
545 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
546 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
547 pdev_cap->nss_ratio_enabled =
548 WMI_NSS_RATIO_EN_DIS_GET(mac_caps->nss_ratio);
549 pdev_cap->nss_ratio_info =
550 WMI_NSS_RATIO_INFO_GET(mac_caps->nss_ratio);
551 } else {
552 return -EINVAL;
553 }
554
555 /* tx/rx chainmask reported from fw depends on the actual hw chains used,
556 * For example, for 4x4 capable macphys, first 4 chains can be used for first
557 * mac and the remaining 4 chains can be used for the second mac or vice-versa.
558 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
559 * will be advertised for second mac or vice-versa. Compute the shift value
560 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to
561 * mac80211.
562 */
563 pdev_cap->tx_chain_mask_shift =
564 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32);
565 pdev_cap->rx_chain_mask_shift =
566 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32);
567
568 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) {
569 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
570 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
571 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g);
572 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g);
573 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g);
574 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext);
575 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g);
576 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
577 cap_band->he_cap_phy_info[i] =
578 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]);
579
580 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1);
581 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info);
582
583 for (i = 0; i < WMI_MAX_NUM_SS; i++)
584 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
585 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]);
586 }
587
588 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) {
589 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
590 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
591 cap_band->max_bw_supported =
592 le32_to_cpu(mac_caps->max_bw_supported_5g);
593 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
594 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
595 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
596 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
597 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
598 cap_band->he_cap_phy_info[i] =
599 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
600
601 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
602 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
603
604 for (i = 0; i < WMI_MAX_NUM_SS; i++)
605 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
606 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
607
608 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ];
609 cap_band->max_bw_supported =
610 le32_to_cpu(mac_caps->max_bw_supported_5g);
611 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
612 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
613 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
614 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
615 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
616 cap_band->he_cap_phy_info[i] =
617 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
618
619 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
620 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
621
622 for (i = 0; i < WMI_MAX_NUM_SS; i++)
623 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
624 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
625 }
626
627 return 0;
628 }
629
630 static int
ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev * wmi_handle,const struct ath12k_wmi_soc_hal_reg_caps_params * reg_caps,const struct ath12k_wmi_hal_reg_caps_ext_params * ext_caps,u8 phy_idx,struct ath12k_wmi_hal_reg_capabilities_ext_arg * param)631 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle,
632 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps,
633 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps,
634 u8 phy_idx,
635 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param)
636 {
637 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap;
638
639 if (!reg_caps || !ext_caps)
640 return -EINVAL;
641
642 if (phy_idx >= le32_to_cpu(reg_caps->num_phy))
643 return -EINVAL;
644
645 ext_reg_cap = &ext_caps[phy_idx];
646
647 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id);
648 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain);
649 param->eeprom_reg_domain_ext =
650 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext);
651 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1);
652 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2);
653 /* check if param->wireless_mode is needed */
654 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan);
655 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan);
656 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan);
657 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan);
658
659 return 0;
660 }
661
ath12k_pull_service_ready_tlv(struct ath12k_base * ab,const void * evt_buf,struct ath12k_wmi_target_cap_arg * cap)662 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab,
663 const void *evt_buf,
664 struct ath12k_wmi_target_cap_arg *cap)
665 {
666 const struct wmi_service_ready_event *ev = evt_buf;
667
668 if (!ev) {
669 ath12k_err(ab, "%s: failed by NULL param\n",
670 __func__);
671 return -EINVAL;
672 }
673
674 cap->phy_capability = le32_to_cpu(ev->phy_capability);
675 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry);
676 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains);
677 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info);
678 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info);
679 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs);
680 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power);
681 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power);
682 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info);
683 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable);
684 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size);
685 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels);
686 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs);
687 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps);
688 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask);
689 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index);
690 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc);
691
692 return 0;
693 }
694
695 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in
696 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each
697 * 4-byte word.
698 */
ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev * wmi,const u32 * wmi_svc_bm)699 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi,
700 const u32 *wmi_svc_bm)
701 {
702 int i, j;
703
704 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) {
705 do {
706 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32))
707 set_bit(j, wmi->wmi_ab->svc_map);
708 } while (++j % WMI_SERVICE_BITS_IN_SIZE32);
709 }
710 }
711
ath12k_wmi_svc_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)712 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
713 const void *ptr, void *data)
714 {
715 struct ath12k_wmi_svc_ready_parse *svc_ready = data;
716 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
717 u16 expect_len;
718
719 switch (tag) {
720 case WMI_TAG_SERVICE_READY_EVENT:
721 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps))
722 return -EINVAL;
723 break;
724
725 case WMI_TAG_ARRAY_UINT32:
726 if (!svc_ready->wmi_svc_bitmap_done) {
727 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32);
728 if (len < expect_len) {
729 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n",
730 len, tag);
731 return -EINVAL;
732 }
733
734 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr);
735
736 svc_ready->wmi_svc_bitmap_done = true;
737 }
738 break;
739 default:
740 break;
741 }
742
743 return 0;
744 }
745
ath12k_service_ready_event(struct ath12k_base * ab,struct sk_buff * skb)746 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
747 {
748 struct ath12k_wmi_svc_ready_parse svc_ready = { };
749 int ret;
750
751 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
752 ath12k_wmi_svc_rdy_parse,
753 &svc_ready);
754 if (ret) {
755 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
756 return ret;
757 }
758
759 return 0;
760 }
761
ath12k_wmi_mgmt_get_freq(struct ath12k * ar,struct ieee80211_tx_info * info)762 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar,
763 struct ieee80211_tx_info *info)
764 {
765 struct ath12k_base *ab = ar->ab;
766 u32 freq = 0;
767
768 if (ab->hw_params->single_pdev_only &&
769 ar->scan.is_roc &&
770 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN))
771 freq = ar->scan.roc_freq;
772
773 return freq;
774 }
775
ath12k_wmi_alloc_skb(struct ath12k_wmi_base * wmi_ab,u32 len)776 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len)
777 {
778 struct sk_buff *skb;
779 struct ath12k_base *ab = wmi_ab->ab;
780 u32 round_len = roundup(len, 4);
781
782 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len);
783 if (!skb)
784 return NULL;
785
786 skb_reserve(skb, WMI_SKB_HEADROOM);
787 if (!IS_ALIGNED((unsigned long)skb->data, 4))
788 ath12k_warn(ab, "unaligned WMI skb data\n");
789
790 skb_put(skb, round_len);
791 memset(skb->data, 0, round_len);
792
793 return skb;
794 }
795
ath12k_wmi_mgmt_send(struct ath12k_link_vif * arvif,u32 buf_id,struct sk_buff * frame)796 int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id,
797 struct sk_buff *frame)
798 {
799 struct ath12k *ar = arvif->ar;
800 struct ath12k_wmi_pdev *wmi = ar->wmi;
801 struct wmi_mgmt_send_cmd *cmd;
802 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame);
803 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)frame->data;
804 struct ieee80211_vif *vif = ath12k_ahvif_to_vif(arvif->ahvif);
805 int cmd_len = sizeof(struct ath12k_wmi_mgmt_send_tx_params);
806 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)hdr;
807 struct ath12k_wmi_mlo_mgmt_send_params *ml_params;
808 struct ath12k_base *ab = ar->ab;
809 struct wmi_tlv *frame_tlv, *tlv;
810 struct ath12k_skb_cb *skb_cb;
811 u32 buf_len, buf_len_aligned;
812 u32 vdev_id = arvif->vdev_id;
813 bool link_agnostic = false;
814 struct sk_buff *skb;
815 int ret, len;
816 void *ptr;
817
818 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
819
820 buf_len_aligned = roundup(buf_len, sizeof(u32));
821
822 len = sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
823
824 if (ieee80211_vif_is_mld(vif)) {
825 skb_cb = ATH12K_SKB_CB(frame);
826 if ((skb_cb->flags & ATH12K_SKB_MLO_STA) &&
827 ab->hw_params->hw_ops->is_frame_link_agnostic &&
828 ab->hw_params->hw_ops->is_frame_link_agnostic(arvif, mgmt)) {
829 len += cmd_len + TLV_HDR_SIZE + sizeof(*ml_params);
830 ath12k_generic_dbg(ATH12K_DBG_MGMT,
831 "Sending Mgmt Frame fc 0x%0x as link agnostic",
832 mgmt->frame_control);
833 link_agnostic = true;
834 }
835 }
836
837 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
838 if (!skb)
839 return -ENOMEM;
840
841 cmd = (struct wmi_mgmt_send_cmd *)skb->data;
842 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD,
843 sizeof(*cmd));
844 cmd->vdev_id = cpu_to_le32(vdev_id);
845 cmd->desc_id = cpu_to_le32(buf_id);
846 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info));
847 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr));
848 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr));
849 cmd->frame_len = cpu_to_le32(frame->len);
850 cmd->buf_len = cpu_to_le32(buf_len);
851 cmd->tx_params_valid = 0;
852
853 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
854 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len_aligned);
855
856 memcpy(frame_tlv->value, frame->data, buf_len);
857
858 if (!link_agnostic)
859 goto send;
860
861 ptr = skb->data + sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
862
863 tlv = ptr;
864
865 /* Tx params not used currently */
866 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TX_SEND_PARAMS, cmd_len);
867 ptr += cmd_len;
868
869 tlv = ptr;
870 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*ml_params));
871 ptr += TLV_HDR_SIZE;
872
873 ml_params = ptr;
874 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TX_SEND_PARAMS,
875 sizeof(*ml_params));
876
877 ml_params->hw_link_id = cpu_to_le32(WMI_MGMT_LINK_AGNOSTIC_ID);
878
879 send:
880 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
881 if (ret) {
882 ath12k_warn(ar->ab,
883 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n");
884 dev_kfree_skb(skb);
885 }
886
887 return ret;
888 }
889
ath12k_wmi_send_stats_request_cmd(struct ath12k * ar,u32 stats_id,u32 vdev_id,u32 pdev_id)890 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id,
891 u32 vdev_id, u32 pdev_id)
892 {
893 struct ath12k_wmi_pdev *wmi = ar->wmi;
894 struct wmi_request_stats_cmd *cmd;
895 struct sk_buff *skb;
896 int ret;
897
898 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
899 if (!skb)
900 return -ENOMEM;
901
902 cmd = (struct wmi_request_stats_cmd *)skb->data;
903 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REQUEST_STATS_CMD,
904 sizeof(*cmd));
905
906 cmd->stats_id = cpu_to_le32(stats_id);
907 cmd->vdev_id = cpu_to_le32(vdev_id);
908 cmd->pdev_id = cpu_to_le32(pdev_id);
909
910 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_STATS_CMDID);
911 if (ret) {
912 ath12k_warn(ar->ab, "failed to send WMI_REQUEST_STATS cmd\n");
913 dev_kfree_skb(skb);
914 }
915
916 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
917 "WMI request stats 0x%x vdev id %d pdev id %d\n",
918 stats_id, vdev_id, pdev_id);
919
920 return ret;
921 }
922
ath12k_wmi_vdev_create(struct ath12k * ar,u8 * macaddr,struct ath12k_wmi_vdev_create_arg * args)923 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
924 struct ath12k_wmi_vdev_create_arg *args)
925 {
926 struct ath12k_wmi_pdev *wmi = ar->wmi;
927 struct wmi_vdev_create_cmd *cmd;
928 struct sk_buff *skb;
929 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams;
930 bool is_ml_vdev = is_valid_ether_addr(args->mld_addr);
931 struct wmi_vdev_create_mlo_params *ml_params;
932 struct wmi_tlv *tlv;
933 int ret, len;
934 void *ptr;
935
936 /* It can be optimized my sending tx/rx chain configuration
937 * only for supported bands instead of always sending it for
938 * both the bands.
939 */
940 len = sizeof(*cmd) + TLV_HDR_SIZE +
941 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)) +
942 (is_ml_vdev ? TLV_HDR_SIZE + sizeof(*ml_params) : 0);
943
944 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
945 if (!skb)
946 return -ENOMEM;
947
948 cmd = (struct wmi_vdev_create_cmd *)skb->data;
949 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD,
950 sizeof(*cmd));
951
952 cmd->vdev_id = cpu_to_le32(args->if_id);
953 cmd->vdev_type = cpu_to_le32(args->type);
954 cmd->vdev_subtype = cpu_to_le32(args->subtype);
955 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX);
956 cmd->pdev_id = cpu_to_le32(args->pdev_id);
957 cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags);
958 cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id);
959 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id);
960 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
961
962 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID)
963 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0));
964
965 ptr = skb->data + sizeof(*cmd);
966 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
967
968 tlv = ptr;
969 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
970
971 ptr += TLV_HDR_SIZE;
972 txrx_streams = ptr;
973 len = sizeof(*txrx_streams);
974 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
975 len);
976 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G);
977 txrx_streams->supported_tx_streams =
978 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx);
979 txrx_streams->supported_rx_streams =
980 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx);
981
982 txrx_streams++;
983 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
984 len);
985 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G);
986 txrx_streams->supported_tx_streams =
987 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx);
988 txrx_streams->supported_rx_streams =
989 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx);
990
991 ptr += WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
992
993 if (is_ml_vdev) {
994 tlv = ptr;
995 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
996 sizeof(*ml_params));
997 ptr += TLV_HDR_SIZE;
998 ml_params = ptr;
999
1000 ml_params->tlv_header =
1001 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_CREATE_PARAMS,
1002 sizeof(*ml_params));
1003 ether_addr_copy(ml_params->mld_macaddr.addr, args->mld_addr);
1004 }
1005
1006 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1007 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n",
1008 args->if_id, args->type, args->subtype,
1009 macaddr, args->pdev_id);
1010
1011 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID);
1012 if (ret) {
1013 ath12k_warn(ar->ab,
1014 "failed to submit WMI_VDEV_CREATE_CMDID\n");
1015 dev_kfree_skb(skb);
1016 }
1017
1018 return ret;
1019 }
1020
ath12k_wmi_vdev_delete(struct ath12k * ar,u8 vdev_id)1021 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id)
1022 {
1023 struct ath12k_wmi_pdev *wmi = ar->wmi;
1024 struct wmi_vdev_delete_cmd *cmd;
1025 struct sk_buff *skb;
1026 int ret;
1027
1028 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1029 if (!skb)
1030 return -ENOMEM;
1031
1032 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
1033 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD,
1034 sizeof(*cmd));
1035 cmd->vdev_id = cpu_to_le32(vdev_id);
1036
1037 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id);
1038
1039 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID);
1040 if (ret) {
1041 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n");
1042 dev_kfree_skb(skb);
1043 }
1044
1045 return ret;
1046 }
1047
ath12k_wmi_vdev_stop(struct ath12k * ar,u8 vdev_id)1048 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id)
1049 {
1050 struct ath12k_wmi_pdev *wmi = ar->wmi;
1051 struct wmi_vdev_stop_cmd *cmd;
1052 struct sk_buff *skb;
1053 int ret;
1054
1055 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1056 if (!skb)
1057 return -ENOMEM;
1058
1059 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
1060
1061 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD,
1062 sizeof(*cmd));
1063 cmd->vdev_id = cpu_to_le32(vdev_id);
1064
1065 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id);
1066
1067 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID);
1068 if (ret) {
1069 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n");
1070 dev_kfree_skb(skb);
1071 }
1072
1073 return ret;
1074 }
1075
ath12k_wmi_vdev_down(struct ath12k * ar,u8 vdev_id)1076 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id)
1077 {
1078 struct ath12k_wmi_pdev *wmi = ar->wmi;
1079 struct wmi_vdev_down_cmd *cmd;
1080 struct sk_buff *skb;
1081 int ret;
1082
1083 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1084 if (!skb)
1085 return -ENOMEM;
1086
1087 cmd = (struct wmi_vdev_down_cmd *)skb->data;
1088
1089 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD,
1090 sizeof(*cmd));
1091 cmd->vdev_id = cpu_to_le32(vdev_id);
1092
1093 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id);
1094
1095 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID);
1096 if (ret) {
1097 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n");
1098 dev_kfree_skb(skb);
1099 }
1100
1101 return ret;
1102 }
1103
ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params * chan,struct wmi_vdev_start_req_arg * arg)1104 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
1105 struct wmi_vdev_start_req_arg *arg)
1106 {
1107 u32 center_freq1 = arg->band_center_freq1;
1108
1109 memset(chan, 0, sizeof(*chan));
1110
1111 chan->mhz = cpu_to_le32(arg->freq);
1112 chan->band_center_freq1 = cpu_to_le32(center_freq1);
1113 if (arg->mode == MODE_11BE_EHT320) {
1114 if (arg->freq > center_freq1)
1115 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 80);
1116 else
1117 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 80);
1118
1119 chan->band_center_freq2 = cpu_to_le32(center_freq1);
1120
1121 } else if (arg->mode == MODE_11BE_EHT160 ||
1122 arg->mode == MODE_11AX_HE160) {
1123 if (arg->freq > center_freq1)
1124 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40);
1125 else
1126 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40);
1127
1128 chan->band_center_freq2 = cpu_to_le32(center_freq1);
1129 } else {
1130 chan->band_center_freq2 = 0;
1131 }
1132
1133 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE);
1134 if (arg->passive)
1135 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
1136 if (arg->allow_ibss)
1137 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED);
1138 if (arg->allow_ht)
1139 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
1140 if (arg->allow_vht)
1141 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
1142 if (arg->allow_he)
1143 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
1144 if (arg->ht40plus)
1145 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS);
1146 if (arg->chan_radar)
1147 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
1148 if (arg->freq2_radar)
1149 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2);
1150
1151 chan->reg_info_1 = le32_encode_bits(arg->max_power,
1152 WMI_CHAN_REG_INFO1_MAX_PWR) |
1153 le32_encode_bits(arg->max_reg_power,
1154 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
1155
1156 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain,
1157 WMI_CHAN_REG_INFO2_ANT_MAX) |
1158 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR);
1159 }
1160
ath12k_wmi_vdev_start(struct ath12k * ar,struct wmi_vdev_start_req_arg * arg,bool restart)1161 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
1162 bool restart)
1163 {
1164 struct wmi_vdev_start_mlo_params *ml_params;
1165 struct wmi_partner_link_info *partner_info;
1166 struct ath12k_wmi_pdev *wmi = ar->wmi;
1167 struct wmi_vdev_start_request_cmd *cmd;
1168 struct sk_buff *skb;
1169 struct ath12k_wmi_channel_params *chan;
1170 struct wmi_tlv *tlv;
1171 void *ptr;
1172 int ret, len, i, ml_arg_size = 0;
1173
1174 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
1175 return -EINVAL;
1176
1177 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE;
1178
1179 if (!restart && arg->ml.enabled) {
1180 ml_arg_size = TLV_HDR_SIZE + sizeof(*ml_params) +
1181 TLV_HDR_SIZE + (arg->ml.num_partner_links *
1182 sizeof(*partner_info));
1183 len += ml_arg_size;
1184 }
1185 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1186 if (!skb)
1187 return -ENOMEM;
1188
1189 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
1190 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD,
1191 sizeof(*cmd));
1192 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1193 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval);
1194 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate);
1195 cmd->dtim_period = cpu_to_le32(arg->dtim_period);
1196 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors);
1197 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams);
1198 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams);
1199 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms);
1200 cmd->regdomain = cpu_to_le32(arg->regdomain);
1201 cmd->he_ops = cpu_to_le32(arg->he_ops);
1202 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1203 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags);
1204 cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id);
1205
1206 if (!restart) {
1207 if (arg->ssid) {
1208 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len);
1209 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
1210 }
1211 if (arg->hidden_ssid)
1212 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID);
1213 if (arg->pmf_enabled)
1214 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED);
1215 }
1216
1217 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED);
1218
1219 ptr = skb->data + sizeof(*cmd);
1220 chan = ptr;
1221
1222 ath12k_wmi_put_wmi_channel(chan, arg);
1223
1224 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
1225 sizeof(*chan));
1226 ptr += sizeof(*chan);
1227
1228 tlv = ptr;
1229 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
1230
1231 /* Note: This is a nested TLV containing:
1232 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv]..
1233 */
1234
1235 ptr += sizeof(*tlv);
1236
1237 if (ml_arg_size) {
1238 tlv = ptr;
1239 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1240 sizeof(*ml_params));
1241 ptr += TLV_HDR_SIZE;
1242
1243 ml_params = ptr;
1244
1245 ml_params->tlv_header =
1246 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_START_PARAMS,
1247 sizeof(*ml_params));
1248
1249 ml_params->flags = le32_encode_bits(arg->ml.enabled,
1250 ATH12K_WMI_FLAG_MLO_ENABLED) |
1251 le32_encode_bits(arg->ml.assoc_link,
1252 ATH12K_WMI_FLAG_MLO_ASSOC_LINK) |
1253 le32_encode_bits(arg->ml.mcast_link,
1254 ATH12K_WMI_FLAG_MLO_MCAST_VDEV) |
1255 le32_encode_bits(arg->ml.link_add,
1256 ATH12K_WMI_FLAG_MLO_LINK_ADD);
1257
1258 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %d start ml flags 0x%x\n",
1259 arg->vdev_id, ml_params->flags);
1260
1261 ptr += sizeof(*ml_params);
1262
1263 tlv = ptr;
1264 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1265 arg->ml.num_partner_links *
1266 sizeof(*partner_info));
1267 ptr += TLV_HDR_SIZE;
1268
1269 partner_info = ptr;
1270
1271 for (i = 0; i < arg->ml.num_partner_links; i++) {
1272 partner_info->tlv_header =
1273 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PARTNER_LINK_PARAMS,
1274 sizeof(*partner_info));
1275 partner_info->vdev_id =
1276 cpu_to_le32(arg->ml.partner_info[i].vdev_id);
1277 partner_info->hw_link_id =
1278 cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
1279 ether_addr_copy(partner_info->vdev_addr.addr,
1280 arg->ml.partner_info[i].addr);
1281
1282 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "partner vdev %d hw_link_id %d macaddr%pM\n",
1283 partner_info->vdev_id, partner_info->hw_link_id,
1284 partner_info->vdev_addr.addr);
1285
1286 partner_info++;
1287 }
1288
1289 ptr = partner_info;
1290 }
1291
1292 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n",
1293 restart ? "restart" : "start", arg->vdev_id,
1294 arg->freq, arg->mode);
1295
1296 if (restart)
1297 ret = ath12k_wmi_cmd_send(wmi, skb,
1298 WMI_VDEV_RESTART_REQUEST_CMDID);
1299 else
1300 ret = ath12k_wmi_cmd_send(wmi, skb,
1301 WMI_VDEV_START_REQUEST_CMDID);
1302 if (ret) {
1303 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n",
1304 restart ? "restart" : "start");
1305 dev_kfree_skb(skb);
1306 }
1307
1308 return ret;
1309 }
1310
ath12k_wmi_vdev_up(struct ath12k * ar,struct ath12k_wmi_vdev_up_params * params)1311 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params)
1312 {
1313 struct ath12k_wmi_pdev *wmi = ar->wmi;
1314 struct wmi_vdev_up_cmd *cmd;
1315 struct sk_buff *skb;
1316 int ret;
1317
1318 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1319 if (!skb)
1320 return -ENOMEM;
1321
1322 cmd = (struct wmi_vdev_up_cmd *)skb->data;
1323
1324 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD,
1325 sizeof(*cmd));
1326 cmd->vdev_id = cpu_to_le32(params->vdev_id);
1327 cmd->vdev_assoc_id = cpu_to_le32(params->aid);
1328
1329 ether_addr_copy(cmd->vdev_bssid.addr, params->bssid);
1330
1331 if (params->tx_bssid) {
1332 ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid);
1333 cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx);
1334 cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt);
1335 }
1336
1337 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1338 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
1339 params->vdev_id, params->aid, params->bssid);
1340
1341 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID);
1342 if (ret) {
1343 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n");
1344 dev_kfree_skb(skb);
1345 }
1346
1347 return ret;
1348 }
1349
ath12k_wmi_send_peer_create_cmd(struct ath12k * ar,struct ath12k_wmi_peer_create_arg * arg)1350 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
1351 struct ath12k_wmi_peer_create_arg *arg)
1352 {
1353 struct ath12k_wmi_pdev *wmi = ar->wmi;
1354 struct wmi_peer_create_cmd *cmd;
1355 struct sk_buff *skb;
1356 int ret, len;
1357 struct wmi_peer_create_mlo_params *ml_param;
1358 void *ptr;
1359 struct wmi_tlv *tlv;
1360
1361 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*ml_param);
1362
1363 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1364 if (!skb)
1365 return -ENOMEM;
1366
1367 cmd = (struct wmi_peer_create_cmd *)skb->data;
1368 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD,
1369 sizeof(*cmd));
1370
1371 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr);
1372 cmd->peer_type = cpu_to_le32(arg->peer_type);
1373 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1374
1375 ptr = skb->data + sizeof(*cmd);
1376 tlv = ptr;
1377 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1378 sizeof(*ml_param));
1379 ptr += TLV_HDR_SIZE;
1380 ml_param = ptr;
1381 ml_param->tlv_header =
1382 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_CREATE_PARAMS,
1383 sizeof(*ml_param));
1384 if (arg->ml_enabled)
1385 ml_param->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
1386
1387 ptr += sizeof(*ml_param);
1388
1389 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1390 "WMI peer create vdev_id %d peer_addr %pM ml_flags 0x%x\n",
1391 arg->vdev_id, arg->peer_addr, ml_param->flags);
1392
1393 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID);
1394 if (ret) {
1395 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n");
1396 dev_kfree_skb(skb);
1397 }
1398
1399 return ret;
1400 }
1401
ath12k_wmi_send_peer_delete_cmd(struct ath12k * ar,const u8 * peer_addr,u8 vdev_id)1402 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
1403 const u8 *peer_addr, u8 vdev_id)
1404 {
1405 struct ath12k_wmi_pdev *wmi = ar->wmi;
1406 struct wmi_peer_delete_cmd *cmd;
1407 struct sk_buff *skb;
1408 int ret;
1409
1410 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1411 if (!skb)
1412 return -ENOMEM;
1413
1414 cmd = (struct wmi_peer_delete_cmd *)skb->data;
1415 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD,
1416 sizeof(*cmd));
1417
1418 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1419 cmd->vdev_id = cpu_to_le32(vdev_id);
1420
1421 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1422 "WMI peer delete vdev_id %d peer_addr %pM\n",
1423 vdev_id, peer_addr);
1424
1425 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID);
1426 if (ret) {
1427 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n");
1428 dev_kfree_skb(skb);
1429 }
1430
1431 return ret;
1432 }
1433
ath12k_wmi_send_pdev_set_regdomain(struct ath12k * ar,struct ath12k_wmi_pdev_set_regdomain_arg * arg)1434 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
1435 struct ath12k_wmi_pdev_set_regdomain_arg *arg)
1436 {
1437 struct ath12k_wmi_pdev *wmi = ar->wmi;
1438 struct wmi_pdev_set_regdomain_cmd *cmd;
1439 struct sk_buff *skb;
1440 int ret;
1441
1442 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1443 if (!skb)
1444 return -ENOMEM;
1445
1446 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
1447 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1448 sizeof(*cmd));
1449
1450 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use);
1451 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g);
1452 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g);
1453 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g);
1454 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g);
1455 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain);
1456 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
1457
1458 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1459 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n",
1460 arg->current_rd_in_use, arg->current_rd_2g,
1461 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id);
1462
1463 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
1464 if (ret) {
1465 ath12k_warn(ar->ab,
1466 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n");
1467 dev_kfree_skb(skb);
1468 }
1469
1470 return ret;
1471 }
1472
ath12k_wmi_set_peer_param(struct ath12k * ar,const u8 * peer_addr,u32 vdev_id,u32 param_id,u32 param_val)1473 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
1474 u32 vdev_id, u32 param_id, u32 param_val)
1475 {
1476 struct ath12k_wmi_pdev *wmi = ar->wmi;
1477 struct wmi_peer_set_param_cmd *cmd;
1478 struct sk_buff *skb;
1479 int ret;
1480
1481 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1482 if (!skb)
1483 return -ENOMEM;
1484
1485 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
1486 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD,
1487 sizeof(*cmd));
1488 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1489 cmd->vdev_id = cpu_to_le32(vdev_id);
1490 cmd->param_id = cpu_to_le32(param_id);
1491 cmd->param_value = cpu_to_le32(param_val);
1492
1493 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1494 "WMI vdev %d peer 0x%pM set param %d value %d\n",
1495 vdev_id, peer_addr, param_id, param_val);
1496
1497 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID);
1498 if (ret) {
1499 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n");
1500 dev_kfree_skb(skb);
1501 }
1502
1503 return ret;
1504 }
1505
ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k * ar,u8 peer_addr[ETH_ALEN],u32 peer_tid_bitmap,u8 vdev_id)1506 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
1507 u8 peer_addr[ETH_ALEN],
1508 u32 peer_tid_bitmap,
1509 u8 vdev_id)
1510 {
1511 struct ath12k_wmi_pdev *wmi = ar->wmi;
1512 struct wmi_peer_flush_tids_cmd *cmd;
1513 struct sk_buff *skb;
1514 int ret;
1515
1516 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1517 if (!skb)
1518 return -ENOMEM;
1519
1520 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
1521 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD,
1522 sizeof(*cmd));
1523
1524 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1525 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap);
1526 cmd->vdev_id = cpu_to_le32(vdev_id);
1527
1528 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1529 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n",
1530 vdev_id, peer_addr, peer_tid_bitmap);
1531
1532 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID);
1533 if (ret) {
1534 ath12k_warn(ar->ab,
1535 "failed to send WMI_PEER_FLUSH_TIDS cmd\n");
1536 dev_kfree_skb(skb);
1537 }
1538
1539 return ret;
1540 }
1541
ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k * ar,int vdev_id,const u8 * addr,dma_addr_t paddr,u8 tid,u8 ba_window_size_valid,u32 ba_window_size)1542 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
1543 int vdev_id, const u8 *addr,
1544 dma_addr_t paddr, u8 tid,
1545 u8 ba_window_size_valid,
1546 u32 ba_window_size)
1547 {
1548 struct wmi_peer_reorder_queue_setup_cmd *cmd;
1549 struct sk_buff *skb;
1550 int ret;
1551
1552 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
1553 if (!skb)
1554 return -ENOMEM;
1555
1556 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data;
1557 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1558 sizeof(*cmd));
1559
1560 ether_addr_copy(cmd->peer_macaddr.addr, addr);
1561 cmd->vdev_id = cpu_to_le32(vdev_id);
1562 cmd->tid = cpu_to_le32(tid);
1563 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr));
1564 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr));
1565 cmd->queue_no = cpu_to_le32(tid);
1566 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid);
1567 cmd->ba_window_size = cpu_to_le32(ba_window_size);
1568
1569 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1570 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n",
1571 addr, vdev_id, tid);
1572
1573 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
1574 WMI_PEER_REORDER_QUEUE_SETUP_CMDID);
1575 if (ret) {
1576 ath12k_warn(ar->ab,
1577 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n");
1578 dev_kfree_skb(skb);
1579 }
1580
1581 return ret;
1582 }
1583
1584 int
ath12k_wmi_rx_reord_queue_remove(struct ath12k * ar,struct ath12k_wmi_rx_reorder_queue_remove_arg * arg)1585 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
1586 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg)
1587 {
1588 struct ath12k_wmi_pdev *wmi = ar->wmi;
1589 struct wmi_peer_reorder_queue_remove_cmd *cmd;
1590 struct sk_buff *skb;
1591 int ret;
1592
1593 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1594 if (!skb)
1595 return -ENOMEM;
1596
1597 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data;
1598 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1599 sizeof(*cmd));
1600
1601 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr);
1602 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1603 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap);
1604
1605 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1606 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__,
1607 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap);
1608
1609 ret = ath12k_wmi_cmd_send(wmi, skb,
1610 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID);
1611 if (ret) {
1612 ath12k_warn(ar->ab,
1613 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID");
1614 dev_kfree_skb(skb);
1615 }
1616
1617 return ret;
1618 }
1619
ath12k_wmi_pdev_set_param(struct ath12k * ar,u32 param_id,u32 param_value,u8 pdev_id)1620 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
1621 u32 param_value, u8 pdev_id)
1622 {
1623 struct ath12k_wmi_pdev *wmi = ar->wmi;
1624 struct wmi_pdev_set_param_cmd *cmd;
1625 struct sk_buff *skb;
1626 int ret;
1627
1628 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1629 if (!skb)
1630 return -ENOMEM;
1631
1632 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
1633 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD,
1634 sizeof(*cmd));
1635 cmd->pdev_id = cpu_to_le32(pdev_id);
1636 cmd->param_id = cpu_to_le32(param_id);
1637 cmd->param_value = cpu_to_le32(param_value);
1638
1639 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1640 "WMI pdev set param %d pdev id %d value %d\n",
1641 param_id, pdev_id, param_value);
1642
1643 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID);
1644 if (ret) {
1645 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1646 dev_kfree_skb(skb);
1647 }
1648
1649 return ret;
1650 }
1651
ath12k_wmi_pdev_set_ps_mode(struct ath12k * ar,int vdev_id,u32 enable)1652 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable)
1653 {
1654 struct ath12k_wmi_pdev *wmi = ar->wmi;
1655 struct wmi_pdev_set_ps_mode_cmd *cmd;
1656 struct sk_buff *skb;
1657 int ret;
1658
1659 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1660 if (!skb)
1661 return -ENOMEM;
1662
1663 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data;
1664 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD,
1665 sizeof(*cmd));
1666 cmd->vdev_id = cpu_to_le32(vdev_id);
1667 cmd->sta_ps_mode = cpu_to_le32(enable);
1668
1669 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1670 "WMI vdev set psmode %d vdev id %d\n",
1671 enable, vdev_id);
1672
1673 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
1674 if (ret) {
1675 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1676 dev_kfree_skb(skb);
1677 }
1678
1679 return ret;
1680 }
1681
ath12k_wmi_pdev_suspend(struct ath12k * ar,u32 suspend_opt,u32 pdev_id)1682 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
1683 u32 pdev_id)
1684 {
1685 struct ath12k_wmi_pdev *wmi = ar->wmi;
1686 struct wmi_pdev_suspend_cmd *cmd;
1687 struct sk_buff *skb;
1688 int ret;
1689
1690 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1691 if (!skb)
1692 return -ENOMEM;
1693
1694 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
1695
1696 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD,
1697 sizeof(*cmd));
1698
1699 cmd->suspend_opt = cpu_to_le32(suspend_opt);
1700 cmd->pdev_id = cpu_to_le32(pdev_id);
1701
1702 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1703 "WMI pdev suspend pdev_id %d\n", pdev_id);
1704
1705 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID);
1706 if (ret) {
1707 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n");
1708 dev_kfree_skb(skb);
1709 }
1710
1711 return ret;
1712 }
1713
ath12k_wmi_pdev_resume(struct ath12k * ar,u32 pdev_id)1714 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id)
1715 {
1716 struct ath12k_wmi_pdev *wmi = ar->wmi;
1717 struct wmi_pdev_resume_cmd *cmd;
1718 struct sk_buff *skb;
1719 int ret;
1720
1721 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1722 if (!skb)
1723 return -ENOMEM;
1724
1725 cmd = (struct wmi_pdev_resume_cmd *)skb->data;
1726
1727 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD,
1728 sizeof(*cmd));
1729 cmd->pdev_id = cpu_to_le32(pdev_id);
1730
1731 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1732 "WMI pdev resume pdev id %d\n", pdev_id);
1733
1734 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID);
1735 if (ret) {
1736 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n");
1737 dev_kfree_skb(skb);
1738 }
1739
1740 return ret;
1741 }
1742
1743 /* TODO FW Support for the cmd is not available yet.
1744 * Can be tested once the command and corresponding
1745 * event is implemented in FW
1746 */
ath12k_wmi_pdev_bss_chan_info_request(struct ath12k * ar,enum wmi_bss_chan_info_req_type type)1747 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
1748 enum wmi_bss_chan_info_req_type type)
1749 {
1750 struct ath12k_wmi_pdev *wmi = ar->wmi;
1751 struct wmi_pdev_bss_chan_info_req_cmd *cmd;
1752 struct sk_buff *skb;
1753 int ret;
1754
1755 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1756 if (!skb)
1757 return -ENOMEM;
1758
1759 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data;
1760
1761 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1762 sizeof(*cmd));
1763 cmd->req_type = cpu_to_le32(type);
1764 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1765
1766 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1767 "WMI bss chan info req type %d\n", type);
1768
1769 ret = ath12k_wmi_cmd_send(wmi, skb,
1770 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID);
1771 if (ret) {
1772 ath12k_warn(ar->ab,
1773 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n");
1774 dev_kfree_skb(skb);
1775 }
1776
1777 return ret;
1778 }
1779
ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k * ar,u8 * peer_addr,struct ath12k_wmi_ap_ps_arg * arg)1780 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
1781 struct ath12k_wmi_ap_ps_arg *arg)
1782 {
1783 struct ath12k_wmi_pdev *wmi = ar->wmi;
1784 struct wmi_ap_ps_peer_cmd *cmd;
1785 struct sk_buff *skb;
1786 int ret;
1787
1788 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1789 if (!skb)
1790 return -ENOMEM;
1791
1792 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
1793 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD,
1794 sizeof(*cmd));
1795
1796 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1797 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1798 cmd->param = cpu_to_le32(arg->param);
1799 cmd->value = cpu_to_le32(arg->value);
1800
1801 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1802 "WMI set ap ps vdev id %d peer %pM param %d value %d\n",
1803 arg->vdev_id, peer_addr, arg->param, arg->value);
1804
1805 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID);
1806 if (ret) {
1807 ath12k_warn(ar->ab,
1808 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n");
1809 dev_kfree_skb(skb);
1810 }
1811
1812 return ret;
1813 }
1814
ath12k_wmi_set_sta_ps_param(struct ath12k * ar,u32 vdev_id,u32 param,u32 param_value)1815 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
1816 u32 param, u32 param_value)
1817 {
1818 struct ath12k_wmi_pdev *wmi = ar->wmi;
1819 struct wmi_sta_powersave_param_cmd *cmd;
1820 struct sk_buff *skb;
1821 int ret;
1822
1823 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1824 if (!skb)
1825 return -ENOMEM;
1826
1827 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
1828 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1829 sizeof(*cmd));
1830
1831 cmd->vdev_id = cpu_to_le32(vdev_id);
1832 cmd->param = cpu_to_le32(param);
1833 cmd->value = cpu_to_le32(param_value);
1834
1835 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1836 "WMI set sta ps vdev_id %d param %d value %d\n",
1837 vdev_id, param, param_value);
1838
1839 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
1840 if (ret) {
1841 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID");
1842 dev_kfree_skb(skb);
1843 }
1844
1845 return ret;
1846 }
1847
ath12k_wmi_force_fw_hang_cmd(struct ath12k * ar,u32 type,u32 delay_time_ms)1848 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms)
1849 {
1850 struct ath12k_wmi_pdev *wmi = ar->wmi;
1851 struct wmi_force_fw_hang_cmd *cmd;
1852 struct sk_buff *skb;
1853 int ret, len;
1854
1855 len = sizeof(*cmd);
1856
1857 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1858 if (!skb)
1859 return -ENOMEM;
1860
1861 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
1862 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD,
1863 len);
1864
1865 cmd->type = cpu_to_le32(type);
1866 cmd->delay_time_ms = cpu_to_le32(delay_time_ms);
1867
1868 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID);
1869
1870 if (ret) {
1871 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID");
1872 dev_kfree_skb(skb);
1873 }
1874 return ret;
1875 }
1876
ath12k_wmi_vdev_set_param_cmd(struct ath12k * ar,u32 vdev_id,u32 param_id,u32 param_value)1877 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
1878 u32 param_id, u32 param_value)
1879 {
1880 struct ath12k_wmi_pdev *wmi = ar->wmi;
1881 struct wmi_vdev_set_param_cmd *cmd;
1882 struct sk_buff *skb;
1883 int ret;
1884
1885 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1886 if (!skb)
1887 return -ENOMEM;
1888
1889 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
1890 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD,
1891 sizeof(*cmd));
1892
1893 cmd->vdev_id = cpu_to_le32(vdev_id);
1894 cmd->param_id = cpu_to_le32(param_id);
1895 cmd->param_value = cpu_to_le32(param_value);
1896
1897 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1898 "WMI vdev id 0x%x set param %d value %d\n",
1899 vdev_id, param_id, param_value);
1900
1901 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID);
1902 if (ret) {
1903 ath12k_warn(ar->ab,
1904 "failed to send WMI_VDEV_SET_PARAM_CMDID\n");
1905 dev_kfree_skb(skb);
1906 }
1907
1908 return ret;
1909 }
1910
ath12k_wmi_send_pdev_temperature_cmd(struct ath12k * ar)1911 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar)
1912 {
1913 struct ath12k_wmi_pdev *wmi = ar->wmi;
1914 struct wmi_get_pdev_temperature_cmd *cmd;
1915 struct sk_buff *skb;
1916 int ret;
1917
1918 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1919 if (!skb)
1920 return -ENOMEM;
1921
1922 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
1923 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1924 sizeof(*cmd));
1925 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1926
1927 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1928 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
1929
1930 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
1931 if (ret) {
1932 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
1933 dev_kfree_skb(skb);
1934 }
1935
1936 return ret;
1937 }
1938
ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k * ar,u32 vdev_id,u32 bcn_ctrl_op)1939 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
1940 u32 vdev_id, u32 bcn_ctrl_op)
1941 {
1942 struct ath12k_wmi_pdev *wmi = ar->wmi;
1943 struct wmi_bcn_offload_ctrl_cmd *cmd;
1944 struct sk_buff *skb;
1945 int ret;
1946
1947 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1948 if (!skb)
1949 return -ENOMEM;
1950
1951 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data;
1952 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1953 sizeof(*cmd));
1954
1955 cmd->vdev_id = cpu_to_le32(vdev_id);
1956 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op);
1957
1958 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1959 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n",
1960 vdev_id, bcn_ctrl_op);
1961
1962 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID);
1963 if (ret) {
1964 ath12k_warn(ar->ab,
1965 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n");
1966 dev_kfree_skb(skb);
1967 }
1968
1969 return ret;
1970 }
1971
ath12k_wmi_p2p_go_bcn_ie(struct ath12k * ar,u32 vdev_id,const u8 * p2p_ie)1972 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
1973 const u8 *p2p_ie)
1974 {
1975 struct ath12k_wmi_pdev *wmi = ar->wmi;
1976 struct wmi_p2p_go_set_beacon_ie_cmd *cmd;
1977 size_t p2p_ie_len, aligned_len;
1978 struct wmi_tlv *tlv;
1979 struct sk_buff *skb;
1980 void *ptr;
1981 int ret, len;
1982
1983 p2p_ie_len = p2p_ie[1] + 2;
1984 aligned_len = roundup(p2p_ie_len, sizeof(u32));
1985
1986 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
1987
1988 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1989 if (!skb)
1990 return -ENOMEM;
1991
1992 ptr = skb->data;
1993 cmd = ptr;
1994 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE,
1995 sizeof(*cmd));
1996 cmd->vdev_id = cpu_to_le32(vdev_id);
1997 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len);
1998
1999 ptr += sizeof(*cmd);
2000 tlv = ptr;
2001 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
2002 aligned_len);
2003 memcpy(tlv->value, p2p_ie, p2p_ie_len);
2004
2005 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE);
2006 if (ret) {
2007 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n");
2008 dev_kfree_skb(skb);
2009 }
2010
2011 return ret;
2012 }
2013
ath12k_wmi_bcn_tmpl(struct ath12k_link_vif * arvif,struct ieee80211_mutable_offsets * offs,struct sk_buff * bcn,struct ath12k_wmi_bcn_tmpl_ema_arg * ema_args)2014 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif,
2015 struct ieee80211_mutable_offsets *offs,
2016 struct sk_buff *bcn,
2017 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args)
2018 {
2019 struct ath12k *ar = arvif->ar;
2020 struct ath12k_wmi_pdev *wmi = ar->wmi;
2021 struct ath12k_base *ab = ar->ab;
2022 struct wmi_bcn_tmpl_cmd *cmd;
2023 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info;
2024 struct ath12k_vif *ahvif = arvif->ahvif;
2025 struct ieee80211_bss_conf *conf;
2026 u32 vdev_id = arvif->vdev_id;
2027 struct wmi_tlv *tlv;
2028 struct sk_buff *skb;
2029 u32 ema_params = 0;
2030 void *ptr;
2031 int ret, len;
2032 size_t aligned_len = roundup(bcn->len, 4);
2033
2034 conf = ath12k_mac_get_link_bss_conf(arvif);
2035 if (!conf) {
2036 ath12k_warn(ab,
2037 "unable to access bss link conf in beacon template command for vif %pM link %u\n",
2038 ahvif->vif->addr, arvif->link_id);
2039 return -EINVAL;
2040 }
2041
2042 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
2043
2044 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2045 if (!skb)
2046 return -ENOMEM;
2047
2048 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data;
2049 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD,
2050 sizeof(*cmd));
2051 cmd->vdev_id = cpu_to_le32(vdev_id);
2052 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset);
2053
2054 if (conf->csa_active) {
2055 cmd->csa_switch_count_offset =
2056 cpu_to_le32(offs->cntdwn_counter_offs[0]);
2057 cmd->ext_csa_switch_count_offset =
2058 cpu_to_le32(offs->cntdwn_counter_offs[1]);
2059 cmd->csa_event_bitmap = cpu_to_le32(0xFFFFFFFF);
2060 arvif->current_cntdown_counter = bcn->data[offs->cntdwn_counter_offs[0]];
2061 }
2062
2063 cmd->buf_len = cpu_to_le32(bcn->len);
2064 cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off);
2065 if (ema_args) {
2066 u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT);
2067 u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX);
2068 if (ema_args->bcn_index == 0)
2069 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST);
2070 if (ema_args->bcn_index + 1 == ema_args->bcn_cnt)
2071 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST);
2072 cmd->ema_params = cpu_to_le32(ema_params);
2073 }
2074 cmd->feature_enable_bitmap =
2075 cpu_to_le32(u32_encode_bits(arvif->beacon_prot,
2076 WMI_BEACON_PROTECTION_EN_BIT));
2077
2078 ptr = skb->data + sizeof(*cmd);
2079
2080 bcn_prb_info = ptr;
2081 len = sizeof(*bcn_prb_info);
2082 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
2083 len);
2084 bcn_prb_info->caps = 0;
2085 bcn_prb_info->erp = 0;
2086
2087 ptr += sizeof(*bcn_prb_info);
2088
2089 tlv = ptr;
2090 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
2091 memcpy(tlv->value, bcn->data, bcn->len);
2092
2093 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID);
2094 if (ret) {
2095 ath12k_warn(ab, "failed to send WMI_BCN_TMPL_CMDID\n");
2096 dev_kfree_skb(skb);
2097 }
2098
2099 return ret;
2100 }
2101
ath12k_wmi_vdev_install_key(struct ath12k * ar,struct wmi_vdev_install_key_arg * arg)2102 int ath12k_wmi_vdev_install_key(struct ath12k *ar,
2103 struct wmi_vdev_install_key_arg *arg)
2104 {
2105 struct ath12k_wmi_pdev *wmi = ar->wmi;
2106 struct wmi_vdev_install_key_cmd *cmd;
2107 struct wmi_tlv *tlv;
2108 struct sk_buff *skb;
2109 int ret, len, key_len_aligned;
2110
2111 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key
2112 * length is specified in cmd->key_len.
2113 */
2114 key_len_aligned = roundup(arg->key_len, 4);
2115
2116 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned;
2117
2118 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2119 if (!skb)
2120 return -ENOMEM;
2121
2122 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
2123 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD,
2124 sizeof(*cmd));
2125 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2126 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
2127 cmd->key_idx = cpu_to_le32(arg->key_idx);
2128 cmd->key_flags = cpu_to_le32(arg->key_flags);
2129 cmd->key_cipher = cpu_to_le32(arg->key_cipher);
2130 cmd->key_len = cpu_to_le32(arg->key_len);
2131 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len);
2132 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len);
2133
2134 if (arg->key_rsc_counter)
2135 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter);
2136
2137 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
2138 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned);
2139 memcpy(tlv->value, arg->key_data, arg->key_len);
2140
2141 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2142 "WMI vdev install key idx %d cipher %d len %d\n",
2143 arg->key_idx, arg->key_cipher, arg->key_len);
2144
2145 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
2146 if (ret) {
2147 ath12k_warn(ar->ab,
2148 "failed to send WMI_VDEV_INSTALL_KEY cmd\n");
2149 dev_kfree_skb(skb);
2150 }
2151
2152 return ret;
2153 }
2154
ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd * cmd,struct ath12k_wmi_peer_assoc_arg * arg,bool hw_crypto_disabled)2155 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
2156 struct ath12k_wmi_peer_assoc_arg *arg,
2157 bool hw_crypto_disabled)
2158 {
2159 cmd->peer_flags = 0;
2160 cmd->peer_flags_ext = 0;
2161
2162 if (arg->is_wme_set) {
2163 if (arg->qos_flag)
2164 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS);
2165 if (arg->apsd_flag)
2166 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD);
2167 if (arg->ht_flag)
2168 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT);
2169 if (arg->bw_40)
2170 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ);
2171 if (arg->bw_80)
2172 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ);
2173 if (arg->bw_160)
2174 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ);
2175 if (arg->bw_320)
2176 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ);
2177
2178 /* Typically if STBC is enabled for VHT it should be enabled
2179 * for HT as well
2180 **/
2181 if (arg->stbc_flag)
2182 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC);
2183
2184 /* Typically if LDPC is enabled for VHT it should be enabled
2185 * for HT as well
2186 **/
2187 if (arg->ldpc_flag)
2188 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC);
2189
2190 if (arg->static_mimops_flag)
2191 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS);
2192 if (arg->dynamic_mimops_flag)
2193 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS);
2194 if (arg->spatial_mux_flag)
2195 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX);
2196 if (arg->vht_flag)
2197 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT);
2198 if (arg->he_flag)
2199 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE);
2200 if (arg->twt_requester)
2201 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ);
2202 if (arg->twt_responder)
2203 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP);
2204 if (arg->eht_flag)
2205 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT);
2206 }
2207
2208 /* Suppress authorization for all AUTH modes that need 4-way handshake
2209 * (during re-association).
2210 * Authorization will be done for these modes on key installation.
2211 */
2212 if (arg->auth_flag)
2213 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
2214 if (arg->need_ptk_4_way) {
2215 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
2216 if (!hw_crypto_disabled && arg->is_assoc)
2217 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
2218 }
2219 if (arg->need_gtk_2_way)
2220 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY);
2221 /* safe mode bypass the 4-way handshake */
2222 if (arg->safe_mode_enabled)
2223 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY |
2224 WMI_PEER_NEED_GTK_2_WAY));
2225
2226 if (arg->is_pmf_enabled)
2227 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF);
2228
2229 /* Disable AMSDU for station transmit, if user configures it */
2230 /* Disable AMSDU for AP transmit to 11n Stations, if user configures
2231 * it
2232 * if (arg->amsdu_disable) Add after FW support
2233 **/
2234
2235 /* Target asserts if node is marked HT and all MCS is set to 0.
2236 * Mark the node as non-HT if all the mcs rates are disabled through
2237 * iwpriv
2238 **/
2239 if (arg->peer_ht_rates.num_rates == 0)
2240 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT);
2241 }
2242
ath12k_wmi_send_peer_assoc_cmd(struct ath12k * ar,struct ath12k_wmi_peer_assoc_arg * arg)2243 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
2244 struct ath12k_wmi_peer_assoc_arg *arg)
2245 {
2246 struct ath12k_wmi_pdev *wmi = ar->wmi;
2247 struct wmi_peer_assoc_complete_cmd *cmd;
2248 struct ath12k_wmi_vht_rate_set_params *mcs;
2249 struct ath12k_wmi_he_rate_set_params *he_mcs;
2250 struct ath12k_wmi_eht_rate_set_params *eht_mcs;
2251 struct wmi_peer_assoc_mlo_params *ml_params;
2252 struct wmi_peer_assoc_mlo_partner_info_params *partner_info;
2253 struct sk_buff *skb;
2254 struct wmi_tlv *tlv;
2255 void *ptr;
2256 u32 peer_legacy_rates_align, eml_pad_delay, eml_trans_delay;
2257 u32 peer_ht_rates_align, eml_trans_timeout;
2258 int i, ret, len;
2259 u16 eml_cap;
2260 __le32 v;
2261
2262 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates,
2263 sizeof(u32));
2264 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates,
2265 sizeof(u32));
2266
2267 len = sizeof(*cmd) +
2268 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) +
2269 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) +
2270 sizeof(*mcs) + TLV_HDR_SIZE +
2271 (sizeof(*he_mcs) * arg->peer_he_mcs_count) +
2272 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count);
2273
2274 if (arg->ml.enabled)
2275 len += TLV_HDR_SIZE + sizeof(*ml_params) +
2276 TLV_HDR_SIZE + (arg->ml.num_partner_links * sizeof(*partner_info));
2277 else
2278 len += (2 * TLV_HDR_SIZE);
2279
2280 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2281 if (!skb)
2282 return -ENOMEM;
2283
2284 ptr = skb->data;
2285
2286 cmd = ptr;
2287 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
2288 sizeof(*cmd));
2289
2290 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2291
2292 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc);
2293 cmd->peer_associd = cpu_to_le32(arg->peer_associd);
2294 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
2295
2296 ath12k_wmi_copy_peer_flags(cmd, arg,
2297 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED,
2298 &ar->ab->dev_flags));
2299
2300 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac);
2301
2302 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps);
2303 cmd->peer_caps = cpu_to_le32(arg->peer_caps);
2304 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval);
2305 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps);
2306 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu);
2307 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density);
2308 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps);
2309 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode);
2310
2311 /* Update 11ax capabilities */
2312 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]);
2313 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]);
2314 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal);
2315 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz);
2316 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops);
2317 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
2318 cmd->peer_he_cap_phy[i] =
2319 cpu_to_le32(arg->peer_he_cap_phyinfo[i]);
2320 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1);
2321 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask);
2322 for (i = 0; i < WMI_MAX_NUM_SS; i++)
2323 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] =
2324 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]);
2325
2326 /* Update 11be capabilities */
2327 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac),
2328 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac),
2329 0);
2330 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy),
2331 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy),
2332 0);
2333 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet),
2334 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0);
2335
2336 /* Update peer legacy rate information */
2337 ptr += sizeof(*cmd);
2338
2339 tlv = ptr;
2340 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align);
2341
2342 ptr += TLV_HDR_SIZE;
2343
2344 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates);
2345 memcpy(ptr, arg->peer_legacy_rates.rates,
2346 arg->peer_legacy_rates.num_rates);
2347
2348 /* Update peer HT rate information */
2349 ptr += peer_legacy_rates_align;
2350
2351 tlv = ptr;
2352 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align);
2353 ptr += TLV_HDR_SIZE;
2354 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates);
2355 memcpy(ptr, arg->peer_ht_rates.rates,
2356 arg->peer_ht_rates.num_rates);
2357
2358 /* VHT Rates */
2359 ptr += peer_ht_rates_align;
2360
2361 mcs = ptr;
2362
2363 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET,
2364 sizeof(*mcs));
2365
2366 cmd->peer_nss = cpu_to_le32(arg->peer_nss);
2367
2368 /* Update bandwidth-NSS mapping */
2369 cmd->peer_bw_rxnss_override = 0;
2370 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override);
2371
2372 if (arg->vht_capable) {
2373 /* Firmware interprets mcs->tx_mcs_set field as peer's
2374 * RX capability
2375 */
2376 mcs->rx_max_rate = cpu_to_le32(arg->tx_max_rate);
2377 mcs->rx_mcs_set = cpu_to_le32(arg->tx_mcs_set);
2378 mcs->tx_max_rate = cpu_to_le32(arg->rx_max_rate);
2379 mcs->tx_mcs_set = cpu_to_le32(arg->rx_mcs_set);
2380 }
2381
2382 /* HE Rates */
2383 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count);
2384 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate);
2385
2386 ptr += sizeof(*mcs);
2387
2388 len = arg->peer_he_mcs_count * sizeof(*he_mcs);
2389
2390 tlv = ptr;
2391 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2392 ptr += TLV_HDR_SIZE;
2393
2394 /* Loop through the HE rate set */
2395 for (i = 0; i < arg->peer_he_mcs_count; i++) {
2396 he_mcs = ptr;
2397 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2398 sizeof(*he_mcs));
2399
2400 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]);
2401 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]);
2402 ptr += sizeof(*he_mcs);
2403 }
2404
2405 tlv = ptr;
2406 len = arg->ml.enabled ? sizeof(*ml_params) : 0;
2407 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2408 ptr += TLV_HDR_SIZE;
2409 if (!len)
2410 goto skip_ml_params;
2411
2412 ml_params = ptr;
2413 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_ASSOC_PARAMS,
2414 len);
2415 ml_params->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2416
2417 if (arg->ml.assoc_link)
2418 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2419
2420 if (arg->ml.primary_umac)
2421 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2422
2423 if (arg->ml.logical_link_idx_valid)
2424 ml_params->flags |=
2425 cpu_to_le32(ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID);
2426
2427 if (arg->ml.peer_id_valid)
2428 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PEER_ID_VALID);
2429
2430 ether_addr_copy(ml_params->mld_addr.addr, arg->ml.mld_addr);
2431 ml_params->logical_link_idx = cpu_to_le32(arg->ml.logical_link_idx);
2432 ml_params->ml_peer_id = cpu_to_le32(arg->ml.ml_peer_id);
2433 ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id);
2434
2435 eml_cap = arg->ml.eml_cap;
2436 if (u16_get_bits(eml_cap, IEEE80211_EML_CAP_EMLSR_SUPP)) {
2437 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT);
2438 /* Padding delay */
2439 eml_pad_delay = ieee80211_emlsr_pad_delay_in_us(eml_cap);
2440 ml_params->emlsr_padding_delay_us = cpu_to_le32(eml_pad_delay);
2441 /* Transition delay */
2442 eml_trans_delay = ieee80211_emlsr_trans_delay_in_us(eml_cap);
2443 ml_params->emlsr_trans_delay_us = cpu_to_le32(eml_trans_delay);
2444 /* Transition timeout */
2445 eml_trans_timeout = ieee80211_eml_trans_timeout_in_us(eml_cap);
2446 ml_params->emlsr_trans_timeout_us =
2447 cpu_to_le32(eml_trans_timeout);
2448 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi peer %pM emlsr padding delay %u, trans delay %u trans timeout %u",
2449 arg->peer_mac, eml_pad_delay, eml_trans_delay,
2450 eml_trans_timeout);
2451 }
2452
2453 ptr += sizeof(*ml_params);
2454
2455 skip_ml_params:
2456 /* Loop through the EHT rate set */
2457 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs);
2458 tlv = ptr;
2459 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2460 ptr += TLV_HDR_SIZE;
2461
2462 for (i = 0; i < arg->peer_eht_mcs_count; i++) {
2463 eht_mcs = ptr;
2464 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_EHT_RATE_SET,
2465 sizeof(*eht_mcs));
2466
2467 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]);
2468 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]);
2469 ptr += sizeof(*eht_mcs);
2470 }
2471
2472 /* Update MCS15 capability */
2473 if (arg->eht_disable_mcs15)
2474 cmd->peer_eht_ops = cpu_to_le32(IEEE80211_EHT_OPER_MCS15_DISABLE);
2475
2476 tlv = ptr;
2477 len = arg->ml.enabled ? arg->ml.num_partner_links * sizeof(*partner_info) : 0;
2478 /* fill ML Partner links */
2479 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2480 ptr += TLV_HDR_SIZE;
2481
2482 if (len == 0)
2483 goto send;
2484
2485 for (i = 0; i < arg->ml.num_partner_links; i++) {
2486 u32 cmd = WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC;
2487
2488 partner_info = ptr;
2489 partner_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(cmd,
2490 sizeof(*partner_info));
2491 partner_info->vdev_id = cpu_to_le32(arg->ml.partner_info[i].vdev_id);
2492 partner_info->hw_link_id =
2493 cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
2494 partner_info->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2495
2496 if (arg->ml.partner_info[i].assoc_link)
2497 partner_info->flags |=
2498 cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2499
2500 if (arg->ml.partner_info[i].primary_umac)
2501 partner_info->flags |=
2502 cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2503
2504 if (arg->ml.partner_info[i].logical_link_idx_valid) {
2505 v = cpu_to_le32(ATH12K_WMI_FLAG_MLO_LINK_ID_VALID);
2506 partner_info->flags |= v;
2507 }
2508
2509 partner_info->logical_link_idx =
2510 cpu_to_le32(arg->ml.partner_info[i].logical_link_idx);
2511 ptr += sizeof(*partner_info);
2512 }
2513
2514 send:
2515 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2516 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x peer_eht_ops %x\n",
2517 cmd->vdev_id, cmd->peer_associd, arg->peer_mac,
2518 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps,
2519 cmd->peer_listen_intval, cmd->peer_ht_caps,
2520 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode,
2521 cmd->peer_mpdu_density,
2522 cmd->peer_vht_caps, cmd->peer_he_cap_info,
2523 cmd->peer_he_ops, cmd->peer_he_cap_info_ext,
2524 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1],
2525 cmd->peer_he_cap_phy[2],
2526 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext,
2527 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1],
2528 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1],
2529 cmd->peer_eht_cap_phy[2], cmd->peer_eht_ops);
2530
2531 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID);
2532 if (ret) {
2533 ath12k_warn(ar->ab,
2534 "failed to send WMI_PEER_ASSOC_CMDID\n");
2535 dev_kfree_skb(skb);
2536 }
2537
2538 return ret;
2539 }
2540
ath12k_wmi_start_scan_init(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2541 void ath12k_wmi_start_scan_init(struct ath12k *ar,
2542 struct ath12k_wmi_scan_req_arg *arg)
2543 {
2544 /* setup commonly used values */
2545 arg->scan_req_id = 1;
2546 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2547 arg->dwell_time_active = 50;
2548 arg->dwell_time_active_2g = 0;
2549 arg->dwell_time_passive = 150;
2550 arg->dwell_time_active_6g = 70;
2551 arg->dwell_time_passive_6g = 70;
2552 arg->min_rest_time = 50;
2553 arg->max_rest_time = 500;
2554 arg->repeat_probe_time = 0;
2555 arg->probe_spacing_time = 0;
2556 arg->idle_time = 0;
2557 arg->max_scan_time = 20000;
2558 arg->probe_delay = 5;
2559 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED |
2560 WMI_SCAN_EVENT_COMPLETED |
2561 WMI_SCAN_EVENT_BSS_CHANNEL |
2562 WMI_SCAN_EVENT_FOREIGN_CHAN |
2563 WMI_SCAN_EVENT_DEQUEUED;
2564 arg->scan_f_chan_stat_evnt = 1;
2565 arg->num_bssid = 1;
2566
2567 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
2568 * ZEROs in probe request
2569 */
2570 eth_broadcast_addr(arg->bssid_list[0].addr);
2571 }
2572
ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd * cmd,struct ath12k_wmi_scan_req_arg * arg)2573 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd,
2574 struct ath12k_wmi_scan_req_arg *arg)
2575 {
2576 /* Scan events subscription */
2577 if (arg->scan_ev_started)
2578 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED);
2579 if (arg->scan_ev_completed)
2580 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED);
2581 if (arg->scan_ev_bss_chan)
2582 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL);
2583 if (arg->scan_ev_foreign_chan)
2584 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN);
2585 if (arg->scan_ev_dequeued)
2586 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED);
2587 if (arg->scan_ev_preempted)
2588 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED);
2589 if (arg->scan_ev_start_failed)
2590 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED);
2591 if (arg->scan_ev_restarted)
2592 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED);
2593 if (arg->scan_ev_foreign_chn_exit)
2594 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT);
2595 if (arg->scan_ev_suspended)
2596 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED);
2597 if (arg->scan_ev_resumed)
2598 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED);
2599
2600 /** Set scan control flags */
2601 cmd->scan_ctrl_flags = 0;
2602 if (arg->scan_f_passive)
2603 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE);
2604 if (arg->scan_f_strict_passive_pch)
2605 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN);
2606 if (arg->scan_f_promisc_mode)
2607 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS);
2608 if (arg->scan_f_capture_phy_err)
2609 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR);
2610 if (arg->scan_f_half_rate)
2611 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT);
2612 if (arg->scan_f_quarter_rate)
2613 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT);
2614 if (arg->scan_f_cck_rates)
2615 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES);
2616 if (arg->scan_f_ofdm_rates)
2617 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES);
2618 if (arg->scan_f_chan_stat_evnt)
2619 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT);
2620 if (arg->scan_f_filter_prb_req)
2621 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ);
2622 if (arg->scan_f_bcast_probe)
2623 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ);
2624 if (arg->scan_f_offchan_mgmt_tx)
2625 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX);
2626 if (arg->scan_f_offchan_data_tx)
2627 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX);
2628 if (arg->scan_f_force_active_dfs_chn)
2629 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS);
2630 if (arg->scan_f_add_tpc_ie_in_probe)
2631 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ);
2632 if (arg->scan_f_add_ds_ie_in_probe)
2633 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ);
2634 if (arg->scan_f_add_spoofed_mac_in_probe)
2635 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ);
2636 if (arg->scan_f_add_rand_seq_in_probe)
2637 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ);
2638 if (arg->scan_f_en_ie_whitelist_in_probe)
2639 cmd->scan_ctrl_flags |=
2640 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ);
2641
2642 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode,
2643 WMI_SCAN_DWELL_MODE_MASK);
2644 }
2645
ath12k_wmi_send_scan_start_cmd(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2646 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
2647 struct ath12k_wmi_scan_req_arg *arg)
2648 {
2649 struct ath12k_wmi_pdev *wmi = ar->wmi;
2650 struct wmi_start_scan_cmd *cmd;
2651 struct ath12k_wmi_ssid_params *ssid = NULL;
2652 struct ath12k_wmi_mac_addr_params *bssid;
2653 struct sk_buff *skb;
2654 struct wmi_tlv *tlv;
2655 void *ptr;
2656 int i, ret, len;
2657 u32 *tmp_ptr, extraie_len_with_pad = 0;
2658 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;
2659 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;
2660
2661 len = sizeof(*cmd);
2662
2663 len += TLV_HDR_SIZE;
2664 if (arg->num_chan)
2665 len += arg->num_chan * sizeof(u32);
2666
2667 len += TLV_HDR_SIZE;
2668 if (arg->num_ssids)
2669 len += arg->num_ssids * sizeof(*ssid);
2670
2671 len += TLV_HDR_SIZE;
2672 if (arg->num_bssid)
2673 len += sizeof(*bssid) * arg->num_bssid;
2674
2675 if (arg->num_hint_bssid)
2676 len += TLV_HDR_SIZE +
2677 arg->num_hint_bssid * sizeof(*hint_bssid);
2678
2679 if (arg->num_hint_s_ssid)
2680 len += TLV_HDR_SIZE +
2681 arg->num_hint_s_ssid * sizeof(*s_ssid);
2682
2683 len += TLV_HDR_SIZE;
2684 if (arg->extraie.len)
2685 extraie_len_with_pad =
2686 roundup(arg->extraie.len, sizeof(u32));
2687 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
2688 len += extraie_len_with_pad;
2689 } else {
2690 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
2691 arg->extraie.len);
2692 extraie_len_with_pad = 0;
2693 }
2694
2695 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2696 if (!skb)
2697 return -ENOMEM;
2698
2699 ptr = skb->data;
2700
2701 cmd = ptr;
2702 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD,
2703 sizeof(*cmd));
2704
2705 cmd->scan_id = cpu_to_le32(arg->scan_id);
2706 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
2707 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2708 if (ar->state_11d == ATH12K_11D_PREPARING)
2709 arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM;
2710 else
2711 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2712 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
2713
2714 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
2715
2716 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active);
2717 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g);
2718 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive);
2719 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g);
2720 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g);
2721 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time);
2722 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time);
2723 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time);
2724 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time);
2725 cmd->idle_time = cpu_to_le32(arg->idle_time);
2726 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time);
2727 cmd->probe_delay = cpu_to_le32(arg->probe_delay);
2728 cmd->burst_duration = cpu_to_le32(arg->burst_duration);
2729 cmd->num_chan = cpu_to_le32(arg->num_chan);
2730 cmd->num_bssid = cpu_to_le32(arg->num_bssid);
2731 cmd->num_ssids = cpu_to_le32(arg->num_ssids);
2732 cmd->ie_len = cpu_to_le32(arg->extraie.len);
2733 cmd->n_probes = cpu_to_le32(arg->n_probes);
2734
2735 ptr += sizeof(*cmd);
2736
2737 len = arg->num_chan * sizeof(u32);
2738
2739 tlv = ptr;
2740 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len);
2741 ptr += TLV_HDR_SIZE;
2742 tmp_ptr = (u32 *)ptr;
2743
2744 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4);
2745
2746 ptr += len;
2747
2748 len = arg->num_ssids * sizeof(*ssid);
2749 tlv = ptr;
2750 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2751
2752 ptr += TLV_HDR_SIZE;
2753
2754 if (arg->num_ssids) {
2755 ssid = ptr;
2756 for (i = 0; i < arg->num_ssids; ++i) {
2757 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len);
2758 memcpy(ssid->ssid, arg->ssid[i].ssid,
2759 arg->ssid[i].ssid_len);
2760 ssid++;
2761 }
2762 }
2763
2764 ptr += (arg->num_ssids * sizeof(*ssid));
2765 len = arg->num_bssid * sizeof(*bssid);
2766 tlv = ptr;
2767 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2768
2769 ptr += TLV_HDR_SIZE;
2770 bssid = ptr;
2771
2772 if (arg->num_bssid) {
2773 for (i = 0; i < arg->num_bssid; ++i) {
2774 ether_addr_copy(bssid->addr,
2775 arg->bssid_list[i].addr);
2776 bssid++;
2777 }
2778 }
2779
2780 ptr += arg->num_bssid * sizeof(*bssid);
2781
2782 len = extraie_len_with_pad;
2783 tlv = ptr;
2784 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
2785 ptr += TLV_HDR_SIZE;
2786
2787 if (extraie_len_with_pad)
2788 memcpy(ptr, arg->extraie.ptr,
2789 arg->extraie.len);
2790
2791 ptr += extraie_len_with_pad;
2792
2793 if (arg->num_hint_s_ssid) {
2794 len = arg->num_hint_s_ssid * sizeof(*s_ssid);
2795 tlv = ptr;
2796 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2797 ptr += TLV_HDR_SIZE;
2798 s_ssid = ptr;
2799 for (i = 0; i < arg->num_hint_s_ssid; ++i) {
2800 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags;
2801 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid;
2802 s_ssid++;
2803 }
2804 ptr += len;
2805 }
2806
2807 if (arg->num_hint_bssid) {
2808 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg);
2809 tlv = ptr;
2810 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2811 ptr += TLV_HDR_SIZE;
2812 hint_bssid = ptr;
2813 for (i = 0; i < arg->num_hint_bssid; ++i) {
2814 hint_bssid->freq_flags =
2815 arg->hint_bssid[i].freq_flags;
2816 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0],
2817 &hint_bssid->bssid.addr[0]);
2818 hint_bssid++;
2819 }
2820 }
2821
2822 ret = ath12k_wmi_cmd_send(wmi, skb,
2823 WMI_START_SCAN_CMDID);
2824 if (ret) {
2825 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n");
2826 dev_kfree_skb(skb);
2827 }
2828
2829 return ret;
2830 }
2831
ath12k_wmi_send_scan_stop_cmd(struct ath12k * ar,struct ath12k_wmi_scan_cancel_arg * arg)2832 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
2833 struct ath12k_wmi_scan_cancel_arg *arg)
2834 {
2835 struct ath12k_wmi_pdev *wmi = ar->wmi;
2836 struct wmi_stop_scan_cmd *cmd;
2837 struct sk_buff *skb;
2838 int ret;
2839
2840 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2841 if (!skb)
2842 return -ENOMEM;
2843
2844 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2845
2846 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD,
2847 sizeof(*cmd));
2848
2849 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2850 cmd->requestor = cpu_to_le32(arg->requester);
2851 cmd->scan_id = cpu_to_le32(arg->scan_id);
2852 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2853 /* stop the scan with the corresponding scan_id */
2854 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) {
2855 /* Cancelling all scans */
2856 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL);
2857 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) {
2858 /* Cancelling VAP scans */
2859 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL);
2860 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) {
2861 /* Cancelling specific scan */
2862 cmd->req_type = WMI_SCAN_STOP_ONE;
2863 } else {
2864 ath12k_warn(ar->ab, "invalid scan cancel req_type %d",
2865 arg->req_type);
2866 dev_kfree_skb(skb);
2867 return -EINVAL;
2868 }
2869
2870 ret = ath12k_wmi_cmd_send(wmi, skb,
2871 WMI_STOP_SCAN_CMDID);
2872 if (ret) {
2873 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n");
2874 dev_kfree_skb(skb);
2875 }
2876
2877 return ret;
2878 }
2879
ath12k_wmi_send_scan_chan_list_cmd(struct ath12k * ar,struct ath12k_wmi_scan_chan_list_arg * arg)2880 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
2881 struct ath12k_wmi_scan_chan_list_arg *arg)
2882 {
2883 struct ath12k_wmi_pdev *wmi = ar->wmi;
2884 struct wmi_scan_chan_list_cmd *cmd;
2885 struct sk_buff *skb;
2886 struct ath12k_wmi_channel_params *chan_info;
2887 struct ath12k_wmi_channel_arg *channel_arg;
2888 struct wmi_tlv *tlv;
2889 void *ptr;
2890 int i, ret, len;
2891 u16 num_send_chans, num_sends = 0, max_chan_limit = 0;
2892 __le32 *reg1, *reg2;
2893
2894 channel_arg = &arg->channel[0];
2895 while (arg->nallchans) {
2896 len = sizeof(*cmd) + TLV_HDR_SIZE;
2897 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) /
2898 sizeof(*chan_info);
2899
2900 num_send_chans = min(arg->nallchans, max_chan_limit);
2901
2902 arg->nallchans -= num_send_chans;
2903 len += sizeof(*chan_info) * num_send_chans;
2904
2905 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2906 if (!skb)
2907 return -ENOMEM;
2908
2909 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
2910 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD,
2911 sizeof(*cmd));
2912 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2913 cmd->num_scan_chans = cpu_to_le32(num_send_chans);
2914 if (num_sends)
2915 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG);
2916
2917 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2918 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n",
2919 num_send_chans, len, cmd->pdev_id, num_sends);
2920
2921 ptr = skb->data + sizeof(*cmd);
2922
2923 len = sizeof(*chan_info) * num_send_chans;
2924 tlv = ptr;
2925 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT,
2926 len);
2927 ptr += TLV_HDR_SIZE;
2928
2929 for (i = 0; i < num_send_chans; ++i) {
2930 chan_info = ptr;
2931 memset(chan_info, 0, sizeof(*chan_info));
2932 len = sizeof(*chan_info);
2933 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
2934 len);
2935
2936 reg1 = &chan_info->reg_info_1;
2937 reg2 = &chan_info->reg_info_2;
2938 chan_info->mhz = cpu_to_le32(channel_arg->mhz);
2939 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1);
2940 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2);
2941
2942 if (channel_arg->is_chan_passive)
2943 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
2944 if (channel_arg->allow_he)
2945 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
2946 else if (channel_arg->allow_vht)
2947 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
2948 else if (channel_arg->allow_ht)
2949 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
2950 if (channel_arg->half_rate)
2951 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE);
2952 if (channel_arg->quarter_rate)
2953 chan_info->info |=
2954 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE);
2955
2956 if (channel_arg->psc_channel)
2957 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC);
2958
2959 if (channel_arg->dfs_set)
2960 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
2961
2962 chan_info->info |= le32_encode_bits(channel_arg->phy_mode,
2963 WMI_CHAN_INFO_MODE);
2964 *reg1 |= le32_encode_bits(channel_arg->minpower,
2965 WMI_CHAN_REG_INFO1_MIN_PWR);
2966 *reg1 |= le32_encode_bits(channel_arg->maxpower,
2967 WMI_CHAN_REG_INFO1_MAX_PWR);
2968 *reg1 |= le32_encode_bits(channel_arg->maxregpower,
2969 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
2970 *reg1 |= le32_encode_bits(channel_arg->reg_class_id,
2971 WMI_CHAN_REG_INFO1_REG_CLS);
2972 *reg2 |= le32_encode_bits(channel_arg->antennamax,
2973 WMI_CHAN_REG_INFO2_ANT_MAX);
2974 *reg2 |= le32_encode_bits(channel_arg->maxregpower,
2975 WMI_CHAN_REG_INFO2_MAX_TX_PWR);
2976
2977 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2978 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
2979 i, chan_info->mhz, chan_info->info);
2980
2981 ptr += sizeof(*chan_info);
2982
2983 channel_arg++;
2984 }
2985
2986 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID);
2987 if (ret) {
2988 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n");
2989 dev_kfree_skb(skb);
2990 return ret;
2991 }
2992
2993 num_sends++;
2994 }
2995
2996 return 0;
2997 }
2998
ath12k_wmi_send_wmm_update_cmd(struct ath12k * ar,u32 vdev_id,struct wmi_wmm_params_all_arg * param)2999 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
3000 struct wmi_wmm_params_all_arg *param)
3001 {
3002 struct ath12k_wmi_pdev *wmi = ar->wmi;
3003 struct wmi_vdev_set_wmm_params_cmd *cmd;
3004 struct wmi_wmm_params *wmm_param;
3005 struct wmi_wmm_params_arg *wmi_wmm_arg;
3006 struct sk_buff *skb;
3007 int ret, ac;
3008
3009 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3010 if (!skb)
3011 return -ENOMEM;
3012
3013 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data;
3014 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
3015 sizeof(*cmd));
3016
3017 cmd->vdev_id = cpu_to_le32(vdev_id);
3018 cmd->wmm_param_type = 0;
3019
3020 for (ac = 0; ac < WME_NUM_AC; ac++) {
3021 switch (ac) {
3022 case WME_AC_BE:
3023 wmi_wmm_arg = ¶m->ac_be;
3024 break;
3025 case WME_AC_BK:
3026 wmi_wmm_arg = ¶m->ac_bk;
3027 break;
3028 case WME_AC_VI:
3029 wmi_wmm_arg = ¶m->ac_vi;
3030 break;
3031 case WME_AC_VO:
3032 wmi_wmm_arg = ¶m->ac_vo;
3033 break;
3034 }
3035
3036 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac];
3037 wmm_param->tlv_header =
3038 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
3039 sizeof(*wmm_param));
3040
3041 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs);
3042 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin);
3043 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax);
3044 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop);
3045 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm);
3046 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack);
3047
3048 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3049 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",
3050 ac, wmm_param->aifs, wmm_param->cwmin,
3051 wmm_param->cwmax, wmm_param->txoplimit,
3052 wmm_param->acm, wmm_param->no_ack);
3053 }
3054 ret = ath12k_wmi_cmd_send(wmi, skb,
3055 WMI_VDEV_SET_WMM_PARAMS_CMDID);
3056 if (ret) {
3057 ath12k_warn(ar->ab,
3058 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID");
3059 dev_kfree_skb(skb);
3060 }
3061
3062 return ret;
3063 }
3064
ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k * ar,u32 pdev_id)3065 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
3066 u32 pdev_id)
3067 {
3068 struct ath12k_wmi_pdev *wmi = ar->wmi;
3069 struct wmi_dfs_phyerr_offload_cmd *cmd;
3070 struct sk_buff *skb;
3071 int ret;
3072
3073 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3074 if (!skb)
3075 return -ENOMEM;
3076
3077 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data;
3078 cmd->tlv_header =
3079 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
3080 sizeof(*cmd));
3081
3082 cmd->pdev_id = cpu_to_le32(pdev_id);
3083
3084 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3085 "WMI dfs phy err offload enable pdev id %d\n", pdev_id);
3086
3087 ret = ath12k_wmi_cmd_send(wmi, skb,
3088 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID);
3089 if (ret) {
3090 ath12k_warn(ar->ab,
3091 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n");
3092 dev_kfree_skb(skb);
3093 }
3094
3095 return ret;
3096 }
3097
ath12k_wmi_set_bios_cmd(struct ath12k_base * ab,u32 param_id,const u8 * buf,size_t buf_len)3098 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id,
3099 const u8 *buf, size_t buf_len)
3100 {
3101 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3102 struct wmi_pdev_set_bios_interface_cmd *cmd;
3103 struct wmi_tlv *tlv;
3104 struct sk_buff *skb;
3105 u8 *ptr;
3106 u32 len, len_aligned;
3107 int ret;
3108
3109 len_aligned = roundup(buf_len, sizeof(u32));
3110 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned;
3111
3112 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3113 if (!skb)
3114 return -ENOMEM;
3115
3116 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data;
3117 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD,
3118 sizeof(*cmd));
3119 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3120 cmd->param_type_id = cpu_to_le32(param_id);
3121 cmd->length = cpu_to_le32(buf_len);
3122
3123 ptr = skb->data + sizeof(*cmd);
3124 tlv = (struct wmi_tlv *)ptr;
3125 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned);
3126 ptr += TLV_HDR_SIZE;
3127 memcpy(ptr, buf, buf_len);
3128
3129 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3130 skb,
3131 WMI_PDEV_SET_BIOS_INTERFACE_CMDID);
3132 if (ret) {
3133 ath12k_warn(ab,
3134 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n",
3135 param_id, ret);
3136 dev_kfree_skb(skb);
3137 }
3138
3139 return 0;
3140 }
3141
ath12k_wmi_set_bios_sar_cmd(struct ath12k_base * ab,const u8 * psar_table)3142 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table)
3143 {
3144 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3145 struct wmi_pdev_set_bios_sar_table_cmd *cmd;
3146 struct wmi_tlv *tlv;
3147 struct sk_buff *skb;
3148 int ret;
3149 u8 *buf_ptr;
3150 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned;
3151 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET;
3152 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET;
3153
3154 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32));
3155 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN,
3156 sizeof(u32));
3157 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned +
3158 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned;
3159
3160 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3161 if (!skb)
3162 return -ENOMEM;
3163
3164 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data;
3165 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD,
3166 sizeof(*cmd));
3167 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3168 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3169 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3170
3171 buf_ptr = skb->data + sizeof(*cmd);
3172 tlv = (struct wmi_tlv *)buf_ptr;
3173 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3174 sar_table_len_aligned);
3175 buf_ptr += TLV_HDR_SIZE;
3176 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3177
3178 buf_ptr += sar_table_len_aligned;
3179 tlv = (struct wmi_tlv *)buf_ptr;
3180 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3181 sar_dbs_backoff_len_aligned);
3182 buf_ptr += TLV_HDR_SIZE;
3183 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3184
3185 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3186 skb,
3187 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID);
3188 if (ret) {
3189 ath12k_warn(ab,
3190 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n",
3191 ret);
3192 dev_kfree_skb(skb);
3193 }
3194
3195 return ret;
3196 }
3197
ath12k_wmi_set_bios_geo_cmd(struct ath12k_base * ab,const u8 * pgeo_table)3198 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table)
3199 {
3200 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3201 struct wmi_pdev_set_bios_geo_table_cmd *cmd;
3202 struct wmi_tlv *tlv;
3203 struct sk_buff *skb;
3204 int ret;
3205 u8 *buf_ptr;
3206 u32 len, sar_geo_len_aligned;
3207 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET;
3208
3209 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32));
3210 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned;
3211
3212 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3213 if (!skb)
3214 return -ENOMEM;
3215
3216 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data;
3217 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
3218 sizeof(*cmd));
3219 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3220 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3221
3222 buf_ptr = skb->data + sizeof(*cmd);
3223 tlv = (struct wmi_tlv *)buf_ptr;
3224 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned);
3225 buf_ptr += TLV_HDR_SIZE;
3226 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3227
3228 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3229 skb,
3230 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID);
3231 if (ret) {
3232 ath12k_warn(ab,
3233 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n",
3234 ret);
3235 dev_kfree_skb(skb);
3236 }
3237
3238 return ret;
3239 }
3240
ath12k_wmi_delba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)3241 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3242 u32 tid, u32 initiator, u32 reason)
3243 {
3244 struct ath12k_wmi_pdev *wmi = ar->wmi;
3245 struct wmi_delba_send_cmd *cmd;
3246 struct sk_buff *skb;
3247 int ret;
3248
3249 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3250 if (!skb)
3251 return -ENOMEM;
3252
3253 cmd = (struct wmi_delba_send_cmd *)skb->data;
3254 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD,
3255 sizeof(*cmd));
3256 cmd->vdev_id = cpu_to_le32(vdev_id);
3257 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3258 cmd->tid = cpu_to_le32(tid);
3259 cmd->initiator = cpu_to_le32(initiator);
3260 cmd->reasoncode = cpu_to_le32(reason);
3261
3262 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3263 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
3264 vdev_id, mac, tid, initiator, reason);
3265
3266 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID);
3267
3268 if (ret) {
3269 ath12k_warn(ar->ab,
3270 "failed to send WMI_DELBA_SEND_CMDID cmd\n");
3271 dev_kfree_skb(skb);
3272 }
3273
3274 return ret;
3275 }
3276
ath12k_wmi_addba_set_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)3277 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3278 u32 tid, u32 status)
3279 {
3280 struct ath12k_wmi_pdev *wmi = ar->wmi;
3281 struct wmi_addba_setresponse_cmd *cmd;
3282 struct sk_buff *skb;
3283 int ret;
3284
3285 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3286 if (!skb)
3287 return -ENOMEM;
3288
3289 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
3290 cmd->tlv_header =
3291 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD,
3292 sizeof(*cmd));
3293 cmd->vdev_id = cpu_to_le32(vdev_id);
3294 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3295 cmd->tid = cpu_to_le32(tid);
3296 cmd->statuscode = cpu_to_le32(status);
3297
3298 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3299 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
3300 vdev_id, mac, tid, status);
3301
3302 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID);
3303
3304 if (ret) {
3305 ath12k_warn(ar->ab,
3306 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n");
3307 dev_kfree_skb(skb);
3308 }
3309
3310 return ret;
3311 }
3312
ath12k_wmi_addba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)3313 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3314 u32 tid, u32 buf_size)
3315 {
3316 struct ath12k_wmi_pdev *wmi = ar->wmi;
3317 struct wmi_addba_send_cmd *cmd;
3318 struct sk_buff *skb;
3319 int ret;
3320
3321 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3322 if (!skb)
3323 return -ENOMEM;
3324
3325 cmd = (struct wmi_addba_send_cmd *)skb->data;
3326 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD,
3327 sizeof(*cmd));
3328 cmd->vdev_id = cpu_to_le32(vdev_id);
3329 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3330 cmd->tid = cpu_to_le32(tid);
3331 cmd->buffersize = cpu_to_le32(buf_size);
3332
3333 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3334 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
3335 vdev_id, mac, tid, buf_size);
3336
3337 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID);
3338
3339 if (ret) {
3340 ath12k_warn(ar->ab,
3341 "failed to send WMI_ADDBA_SEND_CMDID cmd\n");
3342 dev_kfree_skb(skb);
3343 }
3344
3345 return ret;
3346 }
3347
ath12k_wmi_addba_clear_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac)3348 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac)
3349 {
3350 struct ath12k_wmi_pdev *wmi = ar->wmi;
3351 struct wmi_addba_clear_resp_cmd *cmd;
3352 struct sk_buff *skb;
3353 int ret;
3354
3355 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3356 if (!skb)
3357 return -ENOMEM;
3358
3359 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
3360 cmd->tlv_header =
3361 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD,
3362 sizeof(*cmd));
3363 cmd->vdev_id = cpu_to_le32(vdev_id);
3364 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3365
3366 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3367 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
3368 vdev_id, mac);
3369
3370 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID);
3371
3372 if (ret) {
3373 ath12k_warn(ar->ab,
3374 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n");
3375 dev_kfree_skb(skb);
3376 }
3377
3378 return ret;
3379 }
3380
ath12k_wmi_send_init_country_cmd(struct ath12k * ar,struct ath12k_wmi_init_country_arg * arg)3381 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
3382 struct ath12k_wmi_init_country_arg *arg)
3383 {
3384 struct ath12k_wmi_pdev *wmi = ar->wmi;
3385 struct wmi_init_country_cmd *cmd;
3386 struct sk_buff *skb;
3387 int ret;
3388
3389 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3390 if (!skb)
3391 return -ENOMEM;
3392
3393 cmd = (struct wmi_init_country_cmd *)skb->data;
3394 cmd->tlv_header =
3395 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD,
3396 sizeof(*cmd));
3397
3398 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3399
3400 switch (arg->flags) {
3401 case ALPHA_IS_SET:
3402 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA;
3403 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3);
3404 break;
3405 case CC_IS_SET:
3406 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE);
3407 cmd->cc_info.country_code =
3408 cpu_to_le32(arg->cc_info.country_code);
3409 break;
3410 case REGDMN_IS_SET:
3411 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN);
3412 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id);
3413 break;
3414 default:
3415 ret = -EINVAL;
3416 goto out;
3417 }
3418
3419 ret = ath12k_wmi_cmd_send(wmi, skb,
3420 WMI_SET_INIT_COUNTRY_CMDID);
3421
3422 out:
3423 if (ret) {
3424 ath12k_warn(ar->ab,
3425 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n",
3426 ret);
3427 dev_kfree_skb(skb);
3428 }
3429
3430 return ret;
3431 }
3432
ath12k_wmi_send_set_current_country_cmd(struct ath12k * ar,struct wmi_set_current_country_arg * arg)3433 int ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar,
3434 struct wmi_set_current_country_arg *arg)
3435 {
3436 struct ath12k_wmi_pdev *wmi = ar->wmi;
3437 struct wmi_set_current_country_cmd *cmd;
3438 struct sk_buff *skb;
3439 int ret;
3440
3441 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3442 if (!skb)
3443 return -ENOMEM;
3444
3445 cmd = (struct wmi_set_current_country_cmd *)skb->data;
3446 cmd->tlv_header =
3447 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_CURRENT_COUNTRY_CMD,
3448 sizeof(*cmd));
3449
3450 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3451 memcpy(&cmd->new_alpha2, &arg->alpha2, sizeof(arg->alpha2));
3452 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SET_CURRENT_COUNTRY_CMDID);
3453
3454 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3455 "set current country pdev id %d alpha2 %c%c\n",
3456 ar->pdev->pdev_id,
3457 arg->alpha2[0],
3458 arg->alpha2[1]);
3459
3460 if (ret) {
3461 ath12k_warn(ar->ab,
3462 "failed to send WMI_SET_CURRENT_COUNTRY_CMDID: %d\n", ret);
3463 dev_kfree_skb(skb);
3464 }
3465
3466 return ret;
3467 }
3468
ath12k_wmi_send_11d_scan_start_cmd(struct ath12k * ar,struct wmi_11d_scan_start_arg * arg)3469 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar,
3470 struct wmi_11d_scan_start_arg *arg)
3471 {
3472 struct ath12k_wmi_pdev *wmi = ar->wmi;
3473 struct wmi_11d_scan_start_cmd *cmd;
3474 struct sk_buff *skb;
3475 int ret;
3476
3477 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3478 if (!skb)
3479 return -ENOMEM;
3480
3481 cmd = (struct wmi_11d_scan_start_cmd *)skb->data;
3482 cmd->tlv_header =
3483 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_START_CMD,
3484 sizeof(*cmd));
3485
3486 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
3487 cmd->scan_period_msec = cpu_to_le32(arg->scan_period_msec);
3488 cmd->start_interval_msec = cpu_to_le32(arg->start_interval_msec);
3489 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_START_CMDID);
3490
3491 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3492 "send 11d scan start vdev id %d period %d ms internal %d ms\n",
3493 arg->vdev_id, arg->scan_period_msec,
3494 arg->start_interval_msec);
3495
3496 if (ret) {
3497 ath12k_warn(ar->ab,
3498 "failed to send WMI_11D_SCAN_START_CMDID: %d\n", ret);
3499 dev_kfree_skb(skb);
3500 }
3501
3502 return ret;
3503 }
3504
ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k * ar,u32 vdev_id)3505 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id)
3506 {
3507 struct ath12k_wmi_pdev *wmi = ar->wmi;
3508 struct wmi_11d_scan_stop_cmd *cmd;
3509 struct sk_buff *skb;
3510 int ret;
3511
3512 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3513 if (!skb)
3514 return -ENOMEM;
3515
3516 cmd = (struct wmi_11d_scan_stop_cmd *)skb->data;
3517 cmd->tlv_header =
3518 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_STOP_CMD,
3519 sizeof(*cmd));
3520
3521 cmd->vdev_id = cpu_to_le32(vdev_id);
3522 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_STOP_CMDID);
3523
3524 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3525 "send 11d scan stop vdev id %d\n",
3526 cmd->vdev_id);
3527
3528 if (ret) {
3529 ath12k_warn(ar->ab,
3530 "failed to send WMI_11D_SCAN_STOP_CMDID: %d\n", ret);
3531 dev_kfree_skb(skb);
3532 }
3533
3534 return ret;
3535 }
3536
3537 int
ath12k_wmi_send_twt_enable_cmd(struct ath12k * ar,u32 pdev_id)3538 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
3539 {
3540 struct ath12k_wmi_pdev *wmi = ar->wmi;
3541 struct ath12k_base *ab = wmi->wmi_ab->ab;
3542 struct wmi_twt_enable_params_cmd *cmd;
3543 struct sk_buff *skb;
3544 int ret, len;
3545
3546 len = sizeof(*cmd);
3547
3548 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3549 if (!skb)
3550 return -ENOMEM;
3551
3552 cmd = (struct wmi_twt_enable_params_cmd *)skb->data;
3553 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD,
3554 len);
3555 cmd->pdev_id = cpu_to_le32(pdev_id);
3556 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS);
3557 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE);
3558 cmd->congestion_thresh_setup =
3559 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP);
3560 cmd->congestion_thresh_teardown =
3561 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN);
3562 cmd->congestion_thresh_critical =
3563 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL);
3564 cmd->interference_thresh_teardown =
3565 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN);
3566 cmd->interference_thresh_setup =
3567 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP);
3568 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP);
3569 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN);
3570 cmd->no_of_bcast_mcast_slots =
3571 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS);
3572 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS);
3573 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT);
3574 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL);
3575 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL);
3576 cmd->remove_sta_slot_interval =
3577 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL);
3578 /* TODO add MBSSID support */
3579 cmd->mbss_support = 0;
3580
3581 ret = ath12k_wmi_cmd_send(wmi, skb,
3582 WMI_TWT_ENABLE_CMDID);
3583 if (ret) {
3584 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID");
3585 dev_kfree_skb(skb);
3586 }
3587 return ret;
3588 }
3589
3590 int
ath12k_wmi_send_twt_disable_cmd(struct ath12k * ar,u32 pdev_id)3591 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id)
3592 {
3593 struct ath12k_wmi_pdev *wmi = ar->wmi;
3594 struct ath12k_base *ab = wmi->wmi_ab->ab;
3595 struct wmi_twt_disable_params_cmd *cmd;
3596 struct sk_buff *skb;
3597 int ret, len;
3598
3599 len = sizeof(*cmd);
3600
3601 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3602 if (!skb)
3603 return -ENOMEM;
3604
3605 cmd = (struct wmi_twt_disable_params_cmd *)skb->data;
3606 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD,
3607 len);
3608 cmd->pdev_id = cpu_to_le32(pdev_id);
3609
3610 ret = ath12k_wmi_cmd_send(wmi, skb,
3611 WMI_TWT_DISABLE_CMDID);
3612 if (ret) {
3613 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID");
3614 dev_kfree_skb(skb);
3615 }
3616 return ret;
3617 }
3618
3619 int
ath12k_wmi_send_obss_spr_cmd(struct ath12k * ar,u32 vdev_id,struct ieee80211_he_obss_pd * he_obss_pd)3620 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
3621 struct ieee80211_he_obss_pd *he_obss_pd)
3622 {
3623 struct ath12k_wmi_pdev *wmi = ar->wmi;
3624 struct ath12k_base *ab = wmi->wmi_ab->ab;
3625 struct wmi_obss_spatial_reuse_params_cmd *cmd;
3626 struct sk_buff *skb;
3627 int ret, len;
3628
3629 len = sizeof(*cmd);
3630
3631 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3632 if (!skb)
3633 return -ENOMEM;
3634
3635 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data;
3636 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
3637 len);
3638 cmd->vdev_id = cpu_to_le32(vdev_id);
3639 cmd->enable = cpu_to_le32(he_obss_pd->enable);
3640 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset);
3641 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset);
3642
3643 ret = ath12k_wmi_cmd_send(wmi, skb,
3644 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID);
3645 if (ret) {
3646 ath12k_warn(ab,
3647 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID");
3648 dev_kfree_skb(skb);
3649 }
3650 return ret;
3651 }
3652
ath12k_wmi_obss_color_cfg_cmd(struct ath12k * ar,u32 vdev_id,u8 bss_color,u32 period,bool enable)3653 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
3654 u8 bss_color, u32 period,
3655 bool enable)
3656 {
3657 struct ath12k_wmi_pdev *wmi = ar->wmi;
3658 struct ath12k_base *ab = wmi->wmi_ab->ab;
3659 struct wmi_obss_color_collision_cfg_params_cmd *cmd;
3660 struct sk_buff *skb;
3661 int ret, len;
3662
3663 len = sizeof(*cmd);
3664
3665 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3666 if (!skb)
3667 return -ENOMEM;
3668
3669 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data;
3670 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
3671 len);
3672 cmd->vdev_id = cpu_to_le32(vdev_id);
3673 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) :
3674 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE);
3675 cmd->current_bss_color = cpu_to_le32(bss_color);
3676 cmd->detection_period_ms = cpu_to_le32(period);
3677 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS);
3678 cmd->free_slot_expiry_time_ms = 0;
3679 cmd->flags = 0;
3680
3681 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3682 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n",
3683 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color,
3684 cmd->detection_period_ms, cmd->scan_period_ms);
3685
3686 ret = ath12k_wmi_cmd_send(wmi, skb,
3687 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID);
3688 if (ret) {
3689 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID");
3690 dev_kfree_skb(skb);
3691 }
3692 return ret;
3693 }
3694
ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k * ar,u32 vdev_id,bool enable)3695 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
3696 bool enable)
3697 {
3698 struct ath12k_wmi_pdev *wmi = ar->wmi;
3699 struct ath12k_base *ab = wmi->wmi_ab->ab;
3700 struct wmi_bss_color_change_enable_params_cmd *cmd;
3701 struct sk_buff *skb;
3702 int ret, len;
3703
3704 len = sizeof(*cmd);
3705
3706 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3707 if (!skb)
3708 return -ENOMEM;
3709
3710 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data;
3711 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
3712 len);
3713 cmd->vdev_id = cpu_to_le32(vdev_id);
3714 cmd->enable = enable ? cpu_to_le32(1) : 0;
3715
3716 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3717 "wmi_send_bss_color_change_enable id %d enable %d\n",
3718 cmd->vdev_id, cmd->enable);
3719
3720 ret = ath12k_wmi_cmd_send(wmi, skb,
3721 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID);
3722 if (ret) {
3723 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID");
3724 dev_kfree_skb(skb);
3725 }
3726 return ret;
3727 }
3728
ath12k_wmi_fils_discovery_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3729 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
3730 struct sk_buff *tmpl)
3731 {
3732 struct wmi_tlv *tlv;
3733 struct sk_buff *skb;
3734 void *ptr;
3735 int ret, len;
3736 size_t aligned_len;
3737 struct wmi_fils_discovery_tmpl_cmd *cmd;
3738
3739 aligned_len = roundup(tmpl->len, 4);
3740 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
3741
3742 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3743 "WMI vdev %i set FILS discovery template\n", vdev_id);
3744
3745 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3746 if (!skb)
3747 return -ENOMEM;
3748
3749 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data;
3750 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD,
3751 sizeof(*cmd));
3752 cmd->vdev_id = cpu_to_le32(vdev_id);
3753 cmd->buf_len = cpu_to_le32(tmpl->len);
3754 ptr = skb->data + sizeof(*cmd);
3755
3756 tlv = ptr;
3757 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3758 memcpy(tlv->value, tmpl->data, tmpl->len);
3759
3760 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID);
3761 if (ret) {
3762 ath12k_warn(ar->ab,
3763 "WMI vdev %i failed to send FILS discovery template command\n",
3764 vdev_id);
3765 dev_kfree_skb(skb);
3766 }
3767 return ret;
3768 }
3769
ath12k_wmi_probe_resp_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3770 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
3771 struct sk_buff *tmpl)
3772 {
3773 struct wmi_probe_tmpl_cmd *cmd;
3774 struct ath12k_wmi_bcn_prb_info_params *probe_info;
3775 struct wmi_tlv *tlv;
3776 struct sk_buff *skb;
3777 void *ptr;
3778 int ret, len;
3779 size_t aligned_len = roundup(tmpl->len, 4);
3780
3781 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3782 "WMI vdev %i set probe response template\n", vdev_id);
3783
3784 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len;
3785
3786 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3787 if (!skb)
3788 return -ENOMEM;
3789
3790 cmd = (struct wmi_probe_tmpl_cmd *)skb->data;
3791 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD,
3792 sizeof(*cmd));
3793 cmd->vdev_id = cpu_to_le32(vdev_id);
3794 cmd->buf_len = cpu_to_le32(tmpl->len);
3795
3796 ptr = skb->data + sizeof(*cmd);
3797
3798 probe_info = ptr;
3799 len = sizeof(*probe_info);
3800 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
3801 len);
3802 probe_info->caps = 0;
3803 probe_info->erp = 0;
3804
3805 ptr += sizeof(*probe_info);
3806
3807 tlv = ptr;
3808 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3809 memcpy(tlv->value, tmpl->data, tmpl->len);
3810
3811 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID);
3812 if (ret) {
3813 ath12k_warn(ar->ab,
3814 "WMI vdev %i failed to send probe response template command\n",
3815 vdev_id);
3816 dev_kfree_skb(skb);
3817 }
3818 return ret;
3819 }
3820
ath12k_wmi_fils_discovery(struct ath12k * ar,u32 vdev_id,u32 interval,bool unsol_bcast_probe_resp_enabled)3821 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
3822 bool unsol_bcast_probe_resp_enabled)
3823 {
3824 struct sk_buff *skb;
3825 int ret, len;
3826 struct wmi_fils_discovery_cmd *cmd;
3827
3828 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3829 "WMI vdev %i set %s interval to %u TU\n",
3830 vdev_id, unsol_bcast_probe_resp_enabled ?
3831 "unsolicited broadcast probe response" : "FILS discovery",
3832 interval);
3833
3834 len = sizeof(*cmd);
3835 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3836 if (!skb)
3837 return -ENOMEM;
3838
3839 cmd = (struct wmi_fils_discovery_cmd *)skb->data;
3840 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD,
3841 len);
3842 cmd->vdev_id = cpu_to_le32(vdev_id);
3843 cmd->interval = cpu_to_le32(interval);
3844 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled);
3845
3846 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID);
3847 if (ret) {
3848 ath12k_warn(ar->ab,
3849 "WMI vdev %i failed to send FILS discovery enable/disable command\n",
3850 vdev_id);
3851 dev_kfree_skb(skb);
3852 }
3853 return ret;
3854 }
3855
3856 static void
ath12k_wmi_obss_color_collision_event(struct ath12k_base * ab,struct sk_buff * skb)3857 ath12k_wmi_obss_color_collision_event(struct ath12k_base *ab, struct sk_buff *skb)
3858 {
3859 const struct wmi_obss_color_collision_event *ev;
3860 struct ath12k_link_vif *arvif;
3861 u32 vdev_id, evt_type;
3862 u64 bitmap;
3863
3864 const void **tb __free(kfree) = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
3865 if (IS_ERR(tb)) {
3866 ath12k_warn(ab, "failed to parse OBSS color collision tlv %ld\n",
3867 PTR_ERR(tb));
3868 return;
3869 }
3870
3871 ev = tb[WMI_TAG_OBSS_COLOR_COLLISION_EVT];
3872 if (!ev) {
3873 ath12k_warn(ab, "failed to fetch OBSS color collision event\n");
3874 return;
3875 }
3876
3877 vdev_id = le32_to_cpu(ev->vdev_id);
3878 evt_type = le32_to_cpu(ev->evt_type);
3879 bitmap = le64_to_cpu(ev->obss_color_bitmap);
3880
3881 guard(rcu)();
3882
3883 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id);
3884 if (!arvif) {
3885 ath12k_warn(ab, "no arvif found for vdev %u in OBSS color collision event\n",
3886 vdev_id);
3887 return;
3888 }
3889
3890 switch (evt_type) {
3891 case WMI_BSS_COLOR_COLLISION_DETECTION:
3892 ieee80211_obss_color_collision_notify(arvif->ahvif->vif,
3893 bitmap,
3894 arvif->link_id);
3895 ath12k_dbg(ab, ATH12K_DBG_WMI,
3896 "obss color collision detected vdev %u event %d bitmap %016llx\n",
3897 vdev_id, evt_type, bitmap);
3898 break;
3899 case WMI_BSS_COLOR_COLLISION_DISABLE:
3900 case WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY:
3901 case WMI_BSS_COLOR_FREE_SLOT_AVAILABLE:
3902 break;
3903 default:
3904 ath12k_warn(ab, "unknown OBSS color collision event type %d\n", evt_type);
3905 }
3906 }
3907
3908 static void
ath12k_fill_band_to_mac_param(struct ath12k_base * soc,struct ath12k_wmi_pdev_band_arg * arg)3909 ath12k_fill_band_to_mac_param(struct ath12k_base *soc,
3910 struct ath12k_wmi_pdev_band_arg *arg)
3911 {
3912 u8 i;
3913 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap;
3914 struct ath12k_pdev *pdev;
3915
3916 for (i = 0; i < soc->num_radios; i++) {
3917 pdev = &soc->pdevs[i];
3918 hal_reg_cap = &soc->hal_reg_cap[i];
3919 arg[i].pdev_id = pdev->pdev_id;
3920
3921 switch (pdev->cap.supported_bands) {
3922 case WMI_HOST_WLAN_2GHZ_5GHZ_CAP:
3923 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3924 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3925 break;
3926 case WMI_HOST_WLAN_2GHZ_CAP:
3927 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
3928 arg[i].end_freq = hal_reg_cap->high_2ghz_chan;
3929 break;
3930 case WMI_HOST_WLAN_5GHZ_CAP:
3931 arg[i].start_freq = hal_reg_cap->low_5ghz_chan;
3932 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
3933 break;
3934 default:
3935 break;
3936 }
3937 }
3938 }
3939
3940 static void
ath12k_wmi_copy_resource_config(struct ath12k_base * ab,struct ath12k_wmi_resource_config_params * wmi_cfg,struct ath12k_wmi_resource_config_arg * tg_cfg)3941 ath12k_wmi_copy_resource_config(struct ath12k_base *ab,
3942 struct ath12k_wmi_resource_config_params *wmi_cfg,
3943 struct ath12k_wmi_resource_config_arg *tg_cfg)
3944 {
3945 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs);
3946 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers);
3947 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers);
3948 wmi_cfg->num_offload_reorder_buffs =
3949 cpu_to_le32(tg_cfg->num_offload_reorder_buffs);
3950 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys);
3951 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids);
3952 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit);
3953 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask);
3954 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask);
3955 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]);
3956 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]);
3957 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]);
3958 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]);
3959 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode);
3960 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req);
3961 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev);
3962 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev);
3963 wmi_cfg->roam_offload_max_ap_profiles =
3964 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles);
3965 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups);
3966 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems);
3967 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode);
3968 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size);
3969 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries);
3970 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size);
3971 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim);
3972 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check =
3973 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check);
3974 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config);
3975 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev);
3976 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc);
3977 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries);
3978 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs);
3979 wmi_cfg->num_tdls_conn_table_entries =
3980 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries);
3981 wmi_cfg->beacon_tx_offload_max_vdev =
3982 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev);
3983 wmi_cfg->num_multicast_filter_entries =
3984 cpu_to_le32(tg_cfg->num_multicast_filter_entries);
3985 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters);
3986 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern);
3987 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size);
3988 wmi_cfg->max_tdls_concurrent_sleep_sta =
3989 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta);
3990 wmi_cfg->max_tdls_concurrent_buffer_sta =
3991 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta);
3992 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate);
3993 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs);
3994 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels);
3995 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules);
3996 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size);
3997 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
3998 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
3999 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config |
4000 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 |
4001 WMI_RSRC_CFG_FLAG1_ACK_RSSI);
4002 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
4003 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
4004 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
4005 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count);
4006 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver,
4007 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION);
4008 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported <<
4009 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT);
4010 if (ab->hw_params->reoq_lut_support)
4011 wmi_cfg->host_service_flags |=
4012 cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT);
4013 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt);
4014 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period);
4015 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET);
4016 }
4017
ath12k_init_cmd_send(struct ath12k_wmi_pdev * wmi,struct ath12k_wmi_init_cmd_arg * arg)4018 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi,
4019 struct ath12k_wmi_init_cmd_arg *arg)
4020 {
4021 struct ath12k_base *ab = wmi->wmi_ab->ab;
4022 struct sk_buff *skb;
4023 struct wmi_init_cmd *cmd;
4024 struct ath12k_wmi_resource_config_params *cfg;
4025 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode;
4026 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac;
4027 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks;
4028 struct wmi_tlv *tlv;
4029 size_t ret, len;
4030 void *ptr;
4031 u32 hw_mode_len = 0;
4032 u16 idx;
4033
4034 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX)
4035 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE +
4036 (arg->num_band_to_mac * sizeof(*band_to_mac));
4037
4038 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len +
4039 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0);
4040
4041 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
4042 if (!skb)
4043 return -ENOMEM;
4044
4045 cmd = (struct wmi_init_cmd *)skb->data;
4046
4047 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD,
4048 sizeof(*cmd));
4049
4050 ptr = skb->data + sizeof(*cmd);
4051 cfg = ptr;
4052
4053 ath12k_wmi_copy_resource_config(ab, cfg, &arg->res_cfg);
4054
4055 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG,
4056 sizeof(*cfg));
4057
4058 ptr += sizeof(*cfg);
4059 host_mem_chunks = ptr + TLV_HDR_SIZE;
4060 len = sizeof(struct ath12k_wmi_host_mem_chunk_params);
4061
4062 for (idx = 0; idx < arg->num_mem_chunks; ++idx) {
4063 host_mem_chunks[idx].tlv_header =
4064 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
4065 len);
4066
4067 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr);
4068 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len);
4069 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id);
4070
4071 ath12k_dbg(ab, ATH12K_DBG_WMI,
4072 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n",
4073 arg->mem_chunks[idx].req_id,
4074 (u64)arg->mem_chunks[idx].paddr,
4075 arg->mem_chunks[idx].len);
4076 }
4077 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks);
4078 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks;
4079
4080 /* num_mem_chunks is zero */
4081 tlv = ptr;
4082 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
4083 ptr += TLV_HDR_SIZE + len;
4084
4085 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
4086 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr;
4087 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
4088 sizeof(*hw_mode));
4089
4090 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id);
4091 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac);
4092
4093 ptr += sizeof(*hw_mode);
4094
4095 len = arg->num_band_to_mac * sizeof(*band_to_mac);
4096 tlv = ptr;
4097 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
4098
4099 ptr += TLV_HDR_SIZE;
4100 len = sizeof(*band_to_mac);
4101
4102 for (idx = 0; idx < arg->num_band_to_mac; idx++) {
4103 band_to_mac = (void *)ptr;
4104
4105 band_to_mac->tlv_header =
4106 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC,
4107 len);
4108 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id);
4109 band_to_mac->start_freq =
4110 cpu_to_le32(arg->band_to_mac[idx].start_freq);
4111 band_to_mac->end_freq =
4112 cpu_to_le32(arg->band_to_mac[idx].end_freq);
4113 ptr += sizeof(*band_to_mac);
4114 }
4115 }
4116
4117 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID);
4118 if (ret) {
4119 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n");
4120 dev_kfree_skb(skb);
4121 }
4122
4123 return ret;
4124 }
4125
ath12k_wmi_pdev_lro_cfg(struct ath12k * ar,int pdev_id)4126 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar,
4127 int pdev_id)
4128 {
4129 struct ath12k_wmi_pdev_lro_config_cmd *cmd;
4130 struct sk_buff *skb;
4131 int ret;
4132
4133 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4134 if (!skb)
4135 return -ENOMEM;
4136
4137 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data;
4138 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD,
4139 sizeof(*cmd));
4140
4141 get_random_bytes(cmd->th_4, sizeof(cmd->th_4));
4142 get_random_bytes(cmd->th_6, sizeof(cmd->th_6));
4143
4144 cmd->pdev_id = cpu_to_le32(pdev_id);
4145
4146 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4147 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id);
4148
4149 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID);
4150 if (ret) {
4151 ath12k_warn(ar->ab,
4152 "failed to send lro cfg req wmi cmd\n");
4153 goto err;
4154 }
4155
4156 return 0;
4157 err:
4158 dev_kfree_skb(skb);
4159 return ret;
4160 }
4161
ath12k_wmi_wait_for_service_ready(struct ath12k_base * ab)4162 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab)
4163 {
4164 unsigned long time_left;
4165
4166 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready,
4167 WMI_SERVICE_READY_TIMEOUT_HZ);
4168 if (!time_left)
4169 return -ETIMEDOUT;
4170
4171 return 0;
4172 }
4173
ath12k_wmi_wait_for_unified_ready(struct ath12k_base * ab)4174 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab)
4175 {
4176 unsigned long time_left;
4177
4178 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready,
4179 WMI_SERVICE_READY_TIMEOUT_HZ);
4180 if (!time_left)
4181 return -ETIMEDOUT;
4182
4183 return 0;
4184 }
4185
ath12k_wmi_set_hw_mode(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type mode)4186 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
4187 enum wmi_host_hw_mode_config_type mode)
4188 {
4189 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd;
4190 struct sk_buff *skb;
4191 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4192 int len;
4193 int ret;
4194
4195 len = sizeof(*cmd);
4196
4197 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
4198 if (!skb)
4199 return -ENOMEM;
4200
4201 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data;
4202
4203 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
4204 sizeof(*cmd));
4205
4206 cmd->pdev_id = WMI_PDEV_ID_SOC;
4207 cmd->hw_mode_index = cpu_to_le32(mode);
4208
4209 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID);
4210 if (ret) {
4211 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n");
4212 dev_kfree_skb(skb);
4213 }
4214
4215 return ret;
4216 }
4217
ath12k_wmi_cmd_init(struct ath12k_base * ab)4218 int ath12k_wmi_cmd_init(struct ath12k_base *ab)
4219 {
4220 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4221 struct ath12k_wmi_init_cmd_arg arg = {};
4222
4223 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
4224 ab->wmi_ab.svc_map))
4225 arg.res_cfg.is_reg_cc_ext_event_supported = true;
4226
4227 ab->hw_params->wmi_init(ab, &arg.res_cfg);
4228 ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode;
4229
4230 arg.num_mem_chunks = wmi_ab->num_mem_chunks;
4231 arg.hw_mode_id = wmi_ab->preferred_hw_mode;
4232 arg.mem_chunks = wmi_ab->mem_chunks;
4233
4234 if (ab->hw_params->single_pdev_only)
4235 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX;
4236
4237 arg.num_band_to_mac = ab->num_radios;
4238 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac);
4239
4240 ab->dp.peer_metadata_ver = arg.res_cfg.peer_metadata_ver;
4241
4242 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg);
4243 }
4244
ath12k_wmi_vdev_spectral_conf(struct ath12k * ar,struct ath12k_wmi_vdev_spectral_conf_arg * arg)4245 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
4246 struct ath12k_wmi_vdev_spectral_conf_arg *arg)
4247 {
4248 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd;
4249 struct sk_buff *skb;
4250 int ret;
4251
4252 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4253 if (!skb)
4254 return -ENOMEM;
4255
4256 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data;
4257 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
4258 sizeof(*cmd));
4259 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
4260 cmd->scan_count = cpu_to_le32(arg->scan_count);
4261 cmd->scan_period = cpu_to_le32(arg->scan_period);
4262 cmd->scan_priority = cpu_to_le32(arg->scan_priority);
4263 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size);
4264 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena);
4265 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena);
4266 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref);
4267 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay);
4268 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr);
4269 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr);
4270 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode);
4271 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode);
4272 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr);
4273 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format);
4274 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode);
4275 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale);
4276 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj);
4277 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask);
4278
4279 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4280 "WMI spectral scan config cmd vdev_id 0x%x\n",
4281 arg->vdev_id);
4282
4283 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4284 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
4285 if (ret) {
4286 ath12k_warn(ar->ab,
4287 "failed to send spectral scan config wmi cmd\n");
4288 goto err;
4289 }
4290
4291 return 0;
4292 err:
4293 dev_kfree_skb(skb);
4294 return ret;
4295 }
4296
ath12k_wmi_vdev_spectral_enable(struct ath12k * ar,u32 vdev_id,u32 trigger,u32 enable)4297 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
4298 u32 trigger, u32 enable)
4299 {
4300 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd;
4301 struct sk_buff *skb;
4302 int ret;
4303
4304 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4305 if (!skb)
4306 return -ENOMEM;
4307
4308 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data;
4309 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
4310 sizeof(*cmd));
4311
4312 cmd->vdev_id = cpu_to_le32(vdev_id);
4313 cmd->trigger_cmd = cpu_to_le32(trigger);
4314 cmd->enable_cmd = cpu_to_le32(enable);
4315
4316 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4317 "WMI spectral enable cmd vdev id 0x%x\n",
4318 vdev_id);
4319
4320 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4321 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
4322 if (ret) {
4323 ath12k_warn(ar->ab,
4324 "failed to send spectral enable wmi cmd\n");
4325 goto err;
4326 }
4327
4328 return 0;
4329 err:
4330 dev_kfree_skb(skb);
4331 return ret;
4332 }
4333
ath12k_wmi_pdev_dma_ring_cfg(struct ath12k * ar,struct ath12k_wmi_pdev_dma_ring_cfg_arg * arg)4334 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
4335 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg)
4336 {
4337 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd;
4338 struct sk_buff *skb;
4339 int ret;
4340
4341 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4342 if (!skb)
4343 return -ENOMEM;
4344
4345 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data;
4346 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ,
4347 sizeof(*cmd));
4348
4349 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
4350 cmd->module_id = cpu_to_le32(arg->module_id);
4351 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo);
4352 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi);
4353 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo);
4354 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi);
4355 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo);
4356 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi);
4357 cmd->num_elems = cpu_to_le32(arg->num_elems);
4358 cmd->buf_size = cpu_to_le32(arg->buf_size);
4359 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event);
4360 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms);
4361
4362 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4363 "WMI DMA ring cfg req cmd pdev_id 0x%x\n",
4364 arg->pdev_id);
4365
4366 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4367 WMI_PDEV_DMA_RING_CFG_REQ_CMDID);
4368 if (ret) {
4369 ath12k_warn(ar->ab,
4370 "failed to send dma ring cfg req wmi cmd\n");
4371 goto err;
4372 }
4373
4374 return 0;
4375 err:
4376 dev_kfree_skb(skb);
4377 return ret;
4378 }
4379
ath12k_wmi_dma_buf_entry_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4380 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc,
4381 u16 tag, u16 len,
4382 const void *ptr, void *data)
4383 {
4384 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4385
4386 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY)
4387 return -EPROTO;
4388
4389 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry))
4390 return -ENOBUFS;
4391
4392 arg->num_buf_entry++;
4393 return 0;
4394 }
4395
ath12k_wmi_dma_buf_meta_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4396 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc,
4397 u16 tag, u16 len,
4398 const void *ptr, void *data)
4399 {
4400 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4401
4402 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA)
4403 return -EPROTO;
4404
4405 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry))
4406 return -ENOBUFS;
4407
4408 arg->num_meta++;
4409
4410 return 0;
4411 }
4412
ath12k_wmi_dma_buf_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4413 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab,
4414 u16 tag, u16 len,
4415 const void *ptr, void *data)
4416 {
4417 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4418 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed;
4419 u32 pdev_id;
4420 int ret;
4421
4422 switch (tag) {
4423 case WMI_TAG_DMA_BUF_RELEASE:
4424 fixed = ptr;
4425 arg->fixed = *fixed;
4426 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id));
4427 arg->fixed.pdev_id = cpu_to_le32(pdev_id);
4428 break;
4429 case WMI_TAG_ARRAY_STRUCT:
4430 if (!arg->buf_entry_done) {
4431 arg->num_buf_entry = 0;
4432 arg->buf_entry = ptr;
4433
4434 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4435 ath12k_wmi_dma_buf_entry_parse,
4436 arg);
4437 if (ret) {
4438 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n",
4439 ret);
4440 return ret;
4441 }
4442
4443 arg->buf_entry_done = true;
4444 } else if (!arg->meta_data_done) {
4445 arg->num_meta = 0;
4446 arg->meta_data = ptr;
4447
4448 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4449 ath12k_wmi_dma_buf_meta_parse,
4450 arg);
4451 if (ret) {
4452 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n",
4453 ret);
4454 return ret;
4455 }
4456
4457 arg->meta_data_done = true;
4458 }
4459 break;
4460 default:
4461 break;
4462 }
4463 return 0;
4464 }
4465
ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base * ab,struct sk_buff * skb)4466 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab,
4467 struct sk_buff *skb)
4468 {
4469 struct ath12k_wmi_dma_buf_release_arg arg = {};
4470 struct ath12k_dbring_buf_release_event param;
4471 int ret;
4472
4473 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4474 ath12k_wmi_dma_buf_parse,
4475 &arg);
4476 if (ret) {
4477 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret);
4478 return;
4479 }
4480
4481 param.fixed = arg.fixed;
4482 param.buf_entry = arg.buf_entry;
4483 param.num_buf_entry = arg.num_buf_entry;
4484 param.meta_data = arg.meta_data;
4485 param.num_meta = arg.num_meta;
4486
4487 ret = ath12k_dbring_buffer_release_event(ab, ¶m);
4488 if (ret) {
4489 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret);
4490 return;
4491 }
4492 }
4493
ath12k_wmi_hw_mode_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4494 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
4495 u16 tag, u16 len,
4496 const void *ptr, void *data)
4497 {
4498 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4499 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
4500 u32 phy_map = 0;
4501
4502 if (tag != WMI_TAG_HW_MODE_CAPABILITIES)
4503 return -EPROTO;
4504
4505 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes)
4506 return -ENOBUFS;
4507
4508 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params,
4509 hw_mode_id);
4510 svc_rdy_ext->n_hw_mode_caps++;
4511
4512 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map);
4513 svc_rdy_ext->tot_phy_id += fls(phy_map);
4514
4515 return 0;
4516 }
4517
ath12k_wmi_hw_mode_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4518 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
4519 u16 len, const void *ptr, void *data)
4520 {
4521 struct ath12k_svc_ext_info *svc_ext_info = &soc->wmi_ab.svc_ext_info;
4522 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4523 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
4524 enum wmi_host_hw_mode_config_type mode, pref;
4525 u32 i;
4526 int ret;
4527
4528 svc_rdy_ext->n_hw_mode_caps = 0;
4529 svc_rdy_ext->hw_mode_caps = ptr;
4530
4531 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4532 ath12k_wmi_hw_mode_caps_parse,
4533 svc_rdy_ext);
4534 if (ret) {
4535 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4536 return ret;
4537 }
4538
4539 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) {
4540 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i];
4541 mode = le32_to_cpu(hw_mode_caps->hw_mode_id);
4542
4543 if (mode >= WMI_HOST_HW_MODE_MAX)
4544 continue;
4545
4546 pref = soc->wmi_ab.preferred_hw_mode;
4547
4548 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) {
4549 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps;
4550 soc->wmi_ab.preferred_hw_mode = mode;
4551 }
4552 }
4553
4554 svc_ext_info->num_hw_modes = svc_rdy_ext->n_hw_mode_caps;
4555
4556 ath12k_dbg(soc, ATH12K_DBG_WMI, "num hw modes %u preferred_hw_mode %d\n",
4557 svc_ext_info->num_hw_modes, soc->wmi_ab.preferred_hw_mode);
4558
4559 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
4560 return -EINVAL;
4561
4562 return 0;
4563 }
4564
ath12k_wmi_mac_phy_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4565 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc,
4566 u16 tag, u16 len,
4567 const void *ptr, void *data)
4568 {
4569 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4570
4571 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES)
4572 return -EPROTO;
4573
4574 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id)
4575 return -ENOBUFS;
4576
4577 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params));
4578 if (!svc_rdy_ext->n_mac_phy_caps) {
4579 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len,
4580 GFP_ATOMIC);
4581 if (!svc_rdy_ext->mac_phy_caps)
4582 return -ENOMEM;
4583 }
4584
4585 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len);
4586 svc_rdy_ext->n_mac_phy_caps++;
4587 return 0;
4588 }
4589
ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4590 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc,
4591 u16 tag, u16 len,
4592 const void *ptr, void *data)
4593 {
4594 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4595
4596 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT)
4597 return -EPROTO;
4598
4599 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy)
4600 return -ENOBUFS;
4601
4602 svc_rdy_ext->n_ext_hal_reg_caps++;
4603 return 0;
4604 }
4605
ath12k_wmi_ext_hal_reg_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4606 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc,
4607 u16 len, const void *ptr, void *data)
4608 {
4609 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4610 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4611 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap;
4612 int ret;
4613 u32 i;
4614
4615 svc_rdy_ext->n_ext_hal_reg_caps = 0;
4616 svc_rdy_ext->ext_hal_reg_caps = ptr;
4617 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4618 ath12k_wmi_ext_hal_reg_caps_parse,
4619 svc_rdy_ext);
4620 if (ret) {
4621 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4622 return ret;
4623 }
4624
4625 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) {
4626 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle,
4627 svc_rdy_ext->soc_hal_reg_caps,
4628 svc_rdy_ext->ext_hal_reg_caps, i,
4629 ®_cap);
4630 if (ret) {
4631 ath12k_warn(soc, "failed to extract reg cap %d\n", i);
4632 return ret;
4633 }
4634
4635 if (reg_cap.phy_id >= MAX_RADIOS) {
4636 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id);
4637 return -EINVAL;
4638 }
4639
4640 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap;
4641 }
4642 return 0;
4643 }
4644
ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4645 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc,
4646 u16 len, const void *ptr,
4647 void *data)
4648 {
4649 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4650 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4651 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id);
4652 u32 phy_id_map;
4653 int pdev_index = 0;
4654 int ret;
4655
4656 svc_rdy_ext->soc_hal_reg_caps = ptr;
4657 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy);
4658
4659 soc->num_radios = 0;
4660 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map);
4661 soc->fw_pdev_count = 0;
4662
4663 while (phy_id_map && soc->num_radios < MAX_RADIOS) {
4664 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle,
4665 svc_rdy_ext,
4666 hw_mode_id, soc->num_radios,
4667 &soc->pdevs[pdev_index]);
4668 if (ret) {
4669 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n",
4670 soc->num_radios);
4671 return ret;
4672 }
4673
4674 soc->num_radios++;
4675
4676 /* For single_pdev_only targets,
4677 * save mac_phy capability in the same pdev
4678 */
4679 if (soc->hw_params->single_pdev_only)
4680 pdev_index = 0;
4681 else
4682 pdev_index = soc->num_radios;
4683
4684 /* TODO: mac_phy_cap prints */
4685 phy_id_map >>= 1;
4686 }
4687
4688 if (soc->hw_params->single_pdev_only) {
4689 soc->num_radios = 1;
4690 soc->pdevs[0].pdev_id = 0;
4691 }
4692
4693 return 0;
4694 }
4695
ath12k_wmi_dma_ring_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4696 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc,
4697 u16 tag, u16 len,
4698 const void *ptr, void *data)
4699 {
4700 struct ath12k_wmi_dma_ring_caps_parse *parse = data;
4701
4702 if (tag != WMI_TAG_DMA_RING_CAPABILITIES)
4703 return -EPROTO;
4704
4705 parse->n_dma_ring_caps++;
4706 return 0;
4707 }
4708
ath12k_wmi_alloc_dbring_caps(struct ath12k_base * ab,u32 num_cap)4709 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab,
4710 u32 num_cap)
4711 {
4712 size_t sz;
4713 void *ptr;
4714
4715 sz = num_cap * sizeof(struct ath12k_dbring_cap);
4716 ptr = kzalloc(sz, GFP_ATOMIC);
4717 if (!ptr)
4718 return -ENOMEM;
4719
4720 ab->db_caps = ptr;
4721 ab->num_db_cap = num_cap;
4722
4723 return 0;
4724 }
4725
ath12k_wmi_free_dbring_caps(struct ath12k_base * ab)4726 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab)
4727 {
4728 kfree(ab->db_caps);
4729 ab->db_caps = NULL;
4730 ab->num_db_cap = 0;
4731 }
4732
ath12k_wmi_dma_ring_caps(struct ath12k_base * ab,u16 len,const void * ptr,void * data)4733 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab,
4734 u16 len, const void *ptr, void *data)
4735 {
4736 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data;
4737 struct ath12k_wmi_dma_ring_caps_params *dma_caps;
4738 struct ath12k_dbring_cap *dir_buff_caps;
4739 int ret;
4740 u32 i;
4741
4742 dma_caps_parse->n_dma_ring_caps = 0;
4743 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr;
4744 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4745 ath12k_wmi_dma_ring_caps_parse,
4746 dma_caps_parse);
4747 if (ret) {
4748 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret);
4749 return ret;
4750 }
4751
4752 if (!dma_caps_parse->n_dma_ring_caps)
4753 return 0;
4754
4755 if (ab->num_db_cap) {
4756 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n");
4757 return 0;
4758 }
4759
4760 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps);
4761 if (ret)
4762 return ret;
4763
4764 dir_buff_caps = ab->db_caps;
4765 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) {
4766 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) {
4767 ath12k_warn(ab, "Invalid module id %d\n",
4768 le32_to_cpu(dma_caps[i].module_id));
4769 ret = -EINVAL;
4770 goto free_dir_buff;
4771 }
4772
4773 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id);
4774 dir_buff_caps[i].pdev_id =
4775 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id));
4776 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem);
4777 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz);
4778 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align);
4779 }
4780
4781 return 0;
4782
4783 free_dir_buff:
4784 ath12k_wmi_free_dbring_caps(ab);
4785 return ret;
4786 }
4787
4788 static void
ath12k_wmi_save_mac_phy_info(struct ath12k_base * ab,const struct ath12k_wmi_mac_phy_caps_params * mac_phy_cap,struct ath12k_svc_ext_mac_phy_info * mac_phy_info)4789 ath12k_wmi_save_mac_phy_info(struct ath12k_base *ab,
4790 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap,
4791 struct ath12k_svc_ext_mac_phy_info *mac_phy_info)
4792 {
4793 mac_phy_info->phy_id = __le32_to_cpu(mac_phy_cap->phy_id);
4794 mac_phy_info->supported_bands = __le32_to_cpu(mac_phy_cap->supported_bands);
4795 mac_phy_info->hw_freq_range.low_2ghz_freq =
4796 __le32_to_cpu(mac_phy_cap->low_2ghz_chan_freq);
4797 mac_phy_info->hw_freq_range.high_2ghz_freq =
4798 __le32_to_cpu(mac_phy_cap->high_2ghz_chan_freq);
4799 mac_phy_info->hw_freq_range.low_5ghz_freq =
4800 __le32_to_cpu(mac_phy_cap->low_5ghz_chan_freq);
4801 mac_phy_info->hw_freq_range.high_5ghz_freq =
4802 __le32_to_cpu(mac_phy_cap->high_5ghz_chan_freq);
4803 }
4804
4805 static void
ath12k_wmi_save_all_mac_phy_info(struct ath12k_base * ab,struct ath12k_wmi_svc_rdy_ext_parse * svc_rdy_ext)4806 ath12k_wmi_save_all_mac_phy_info(struct ath12k_base *ab,
4807 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext)
4808 {
4809 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
4810 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap;
4811 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
4812 struct ath12k_svc_ext_mac_phy_info *mac_phy_info;
4813 u32 hw_mode_id, phy_bit_map;
4814 u8 hw_idx;
4815
4816 mac_phy_info = &svc_ext_info->mac_phy_info[0];
4817 mac_phy_cap = svc_rdy_ext->mac_phy_caps;
4818
4819 for (hw_idx = 0; hw_idx < svc_ext_info->num_hw_modes; hw_idx++) {
4820 hw_mode_cap = &svc_rdy_ext->hw_mode_caps[hw_idx];
4821 hw_mode_id = __le32_to_cpu(hw_mode_cap->hw_mode_id);
4822 phy_bit_map = __le32_to_cpu(hw_mode_cap->phy_id_map);
4823
4824 while (phy_bit_map) {
4825 ath12k_wmi_save_mac_phy_info(ab, mac_phy_cap, mac_phy_info);
4826 mac_phy_info->hw_mode_config_type =
4827 le32_get_bits(hw_mode_cap->hw_mode_config_type,
4828 WMI_HW_MODE_CAP_CFG_TYPE);
4829 ath12k_dbg(ab, ATH12K_DBG_WMI,
4830 "hw_idx %u hw_mode_id %u hw_mode_config_type %u supported_bands %u phy_id %u 2 GHz [%u - %u] 5 GHz [%u - %u]\n",
4831 hw_idx, hw_mode_id,
4832 mac_phy_info->hw_mode_config_type,
4833 mac_phy_info->supported_bands, mac_phy_info->phy_id,
4834 mac_phy_info->hw_freq_range.low_2ghz_freq,
4835 mac_phy_info->hw_freq_range.high_2ghz_freq,
4836 mac_phy_info->hw_freq_range.low_5ghz_freq,
4837 mac_phy_info->hw_freq_range.high_5ghz_freq);
4838
4839 mac_phy_cap++;
4840 mac_phy_info++;
4841
4842 phy_bit_map >>= 1;
4843 }
4844 }
4845 }
4846
ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4847 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
4848 u16 tag, u16 len,
4849 const void *ptr, void *data)
4850 {
4851 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
4852 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4853 int ret;
4854
4855 switch (tag) {
4856 case WMI_TAG_SERVICE_READY_EXT_EVENT:
4857 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr,
4858 &svc_rdy_ext->arg);
4859 if (ret) {
4860 ath12k_warn(ab, "unable to extract ext params\n");
4861 return ret;
4862 }
4863 break;
4864
4865 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS:
4866 svc_rdy_ext->hw_caps = ptr;
4867 svc_rdy_ext->arg.num_hw_modes =
4868 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes);
4869 break;
4870
4871 case WMI_TAG_SOC_HAL_REG_CAPABILITIES:
4872 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr,
4873 svc_rdy_ext);
4874 if (ret)
4875 return ret;
4876 break;
4877
4878 case WMI_TAG_ARRAY_STRUCT:
4879 if (!svc_rdy_ext->hw_mode_done) {
4880 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext);
4881 if (ret)
4882 return ret;
4883
4884 svc_rdy_ext->hw_mode_done = true;
4885 } else if (!svc_rdy_ext->mac_phy_done) {
4886 svc_rdy_ext->n_mac_phy_caps = 0;
4887 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4888 ath12k_wmi_mac_phy_caps_parse,
4889 svc_rdy_ext);
4890 if (ret) {
4891 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4892 return ret;
4893 }
4894
4895 ath12k_wmi_save_all_mac_phy_info(ab, svc_rdy_ext);
4896
4897 svc_rdy_ext->mac_phy_done = true;
4898 } else if (!svc_rdy_ext->ext_hal_reg_done) {
4899 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);
4900 if (ret)
4901 return ret;
4902
4903 svc_rdy_ext->ext_hal_reg_done = true;
4904 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) {
4905 svc_rdy_ext->mac_phy_chainmask_combo_done = true;
4906 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) {
4907 svc_rdy_ext->mac_phy_chainmask_cap_done = true;
4908 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) {
4909 svc_rdy_ext->oem_dma_ring_cap_done = true;
4910 } else if (!svc_rdy_ext->dma_ring_cap_done) {
4911 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
4912 &svc_rdy_ext->dma_caps_parse);
4913 if (ret)
4914 return ret;
4915
4916 svc_rdy_ext->dma_ring_cap_done = true;
4917 }
4918 break;
4919
4920 default:
4921 break;
4922 }
4923 return 0;
4924 }
4925
ath12k_service_ready_ext_event(struct ath12k_base * ab,struct sk_buff * skb)4926 static int ath12k_service_ready_ext_event(struct ath12k_base *ab,
4927 struct sk_buff *skb)
4928 {
4929 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { };
4930 int ret;
4931
4932 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4933 ath12k_wmi_svc_rdy_ext_parse,
4934 &svc_rdy_ext);
4935 if (ret) {
4936 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
4937 goto err;
4938 }
4939
4940 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map))
4941 complete(&ab->wmi_ab.service_ready);
4942
4943 kfree(svc_rdy_ext.mac_phy_caps);
4944 return 0;
4945
4946 err:
4947 kfree(svc_rdy_ext.mac_phy_caps);
4948 ath12k_wmi_free_dbring_caps(ab);
4949 return ret;
4950 }
4951
ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_svc_rdy_ext2_arg * arg)4952 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle,
4953 const void *ptr,
4954 struct ath12k_wmi_svc_rdy_ext2_arg *arg)
4955 {
4956 const struct wmi_service_ready_ext2_event *ev = ptr;
4957
4958 if (!ev)
4959 return -EINVAL;
4960
4961 arg->reg_db_version = le32_to_cpu(ev->reg_db_version);
4962 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz);
4963 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz);
4964 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps);
4965 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw);
4966 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma);
4967 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo);
4968 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags);
4969 return 0;
4970 }
4971
ath12k_wmi_eht_caps_parse(struct ath12k_pdev * pdev,u32 band,const __le32 cap_mac_info[],const __le32 cap_phy_info[],const __le32 supp_mcs[],const struct ath12k_wmi_ppe_threshold_params * ppet,__le32 cap_info_internal)4972 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band,
4973 const __le32 cap_mac_info[],
4974 const __le32 cap_phy_info[],
4975 const __le32 supp_mcs[],
4976 const struct ath12k_wmi_ppe_threshold_params *ppet,
4977 __le32 cap_info_internal)
4978 {
4979 struct ath12k_band_cap *cap_band = &pdev->cap.band[band];
4980 u32 support_320mhz;
4981 u8 i;
4982
4983 if (band == NL80211_BAND_6GHZ)
4984 support_320mhz = cap_band->eht_cap_phy_info[0] &
4985 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
4986
4987 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++)
4988 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]);
4989
4990 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++)
4991 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]);
4992
4993 if (band == NL80211_BAND_6GHZ)
4994 cap_band->eht_cap_phy_info[0] |= support_320mhz;
4995
4996 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]);
4997 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]);
4998 if (band != NL80211_BAND_2GHZ) {
4999 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]);
5000 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]);
5001 }
5002
5003 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1);
5004 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info);
5005 for (i = 0; i < WMI_MAX_NUM_SS; i++)
5006 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] =
5007 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]);
5008
5009 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal);
5010 }
5011
5012 static int
ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base * ab,const struct ath12k_wmi_caps_ext_params * caps,struct ath12k_pdev * pdev)5013 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab,
5014 const struct ath12k_wmi_caps_ext_params *caps,
5015 struct ath12k_pdev *pdev)
5016 {
5017 struct ath12k_band_cap *cap_band;
5018 u32 bands, support_320mhz;
5019 int i;
5020
5021 if (ab->hw_params->single_pdev_only) {
5022 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) {
5023 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) &
5024 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
5025 cap_band = &pdev->cap.band[NL80211_BAND_6GHZ];
5026 cap_band->eht_cap_phy_info[0] |= support_320mhz;
5027 return 0;
5028 }
5029
5030 for (i = 0; i < ab->fw_pdev_count; i++) {
5031 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i];
5032
5033 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) &&
5034 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) {
5035 bands = fw_pdev->supported_bands;
5036 break;
5037 }
5038 }
5039
5040 if (i == ab->fw_pdev_count)
5041 return -EINVAL;
5042 } else {
5043 bands = pdev->cap.supported_bands;
5044 }
5045
5046 if (bands & WMI_HOST_WLAN_2GHZ_CAP) {
5047 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ,
5048 caps->eht_cap_mac_info_2ghz,
5049 caps->eht_cap_phy_info_2ghz,
5050 caps->eht_supp_mcs_ext_2ghz,
5051 &caps->eht_ppet_2ghz,
5052 caps->eht_cap_info_internal);
5053 }
5054
5055 if (bands & WMI_HOST_WLAN_5GHZ_CAP) {
5056 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ,
5057 caps->eht_cap_mac_info_5ghz,
5058 caps->eht_cap_phy_info_5ghz,
5059 caps->eht_supp_mcs_ext_5ghz,
5060 &caps->eht_ppet_5ghz,
5061 caps->eht_cap_info_internal);
5062
5063 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ,
5064 caps->eht_cap_mac_info_5ghz,
5065 caps->eht_cap_phy_info_5ghz,
5066 caps->eht_supp_mcs_ext_5ghz,
5067 &caps->eht_ppet_5ghz,
5068 caps->eht_cap_info_internal);
5069 }
5070
5071 pdev->cap.eml_cap = le32_to_cpu(caps->eml_capability);
5072 pdev->cap.mld_cap = le32_to_cpu(caps->mld_capability);
5073
5074 return 0;
5075 }
5076
ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5077 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag,
5078 u16 len, const void *ptr,
5079 void *data)
5080 {
5081 const struct ath12k_wmi_caps_ext_params *caps = ptr;
5082 int i = 0, ret;
5083
5084 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT)
5085 return -EPROTO;
5086
5087 if (ab->hw_params->single_pdev_only) {
5088 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) &&
5089 caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE)
5090 return 0;
5091 } else {
5092 for (i = 0; i < ab->num_radios; i++) {
5093 if (ab->pdevs[i].pdev_id ==
5094 ath12k_wmi_caps_ext_get_pdev_id(caps))
5095 break;
5096 }
5097
5098 if (i == ab->num_radios)
5099 return -EINVAL;
5100 }
5101
5102 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]);
5103 if (ret) {
5104 ath12k_warn(ab,
5105 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n",
5106 ret, ab->pdevs[i].pdev_id);
5107 return ret;
5108 }
5109
5110 return 0;
5111 }
5112
5113 static void
ath12k_wmi_update_freq_info(struct ath12k_base * ab,struct ath12k_svc_ext_mac_phy_info * mac_cap,enum ath12k_hw_mode mode,u32 phy_id)5114 ath12k_wmi_update_freq_info(struct ath12k_base *ab,
5115 struct ath12k_svc_ext_mac_phy_info *mac_cap,
5116 enum ath12k_hw_mode mode,
5117 u32 phy_id)
5118 {
5119 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5120 struct ath12k_hw_mode_freq_range_arg *mac_range;
5121
5122 mac_range = &hw_mode_info->freq_range_caps[mode][phy_id];
5123
5124 if (mac_cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) {
5125 mac_range->low_2ghz_freq = max_t(u32,
5126 mac_cap->hw_freq_range.low_2ghz_freq,
5127 ATH12K_MIN_2GHZ_FREQ);
5128 mac_range->high_2ghz_freq = mac_cap->hw_freq_range.high_2ghz_freq ?
5129 min_t(u32,
5130 mac_cap->hw_freq_range.high_2ghz_freq,
5131 ATH12K_MAX_2GHZ_FREQ) :
5132 ATH12K_MAX_2GHZ_FREQ;
5133 }
5134
5135 if (mac_cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP) {
5136 mac_range->low_5ghz_freq = max_t(u32,
5137 mac_cap->hw_freq_range.low_5ghz_freq,
5138 ATH12K_MIN_5GHZ_FREQ);
5139 mac_range->high_5ghz_freq = mac_cap->hw_freq_range.high_5ghz_freq ?
5140 min_t(u32,
5141 mac_cap->hw_freq_range.high_5ghz_freq,
5142 ATH12K_MAX_6GHZ_FREQ) :
5143 ATH12K_MAX_6GHZ_FREQ;
5144 }
5145 }
5146
5147 static bool
ath12k_wmi_all_phy_range_updated(struct ath12k_base * ab,enum ath12k_hw_mode hwmode)5148 ath12k_wmi_all_phy_range_updated(struct ath12k_base *ab,
5149 enum ath12k_hw_mode hwmode)
5150 {
5151 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5152 struct ath12k_hw_mode_freq_range_arg *mac_range;
5153 u8 phy_id;
5154
5155 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5156 mac_range = &hw_mode_info->freq_range_caps[hwmode][phy_id];
5157 /* modify SBS/DBS range only when both phy for DBS are filled */
5158 if (!mac_range->low_2ghz_freq && !mac_range->low_5ghz_freq)
5159 return false;
5160 }
5161
5162 return true;
5163 }
5164
ath12k_wmi_update_dbs_freq_info(struct ath12k_base * ab)5165 static void ath12k_wmi_update_dbs_freq_info(struct ath12k_base *ab)
5166 {
5167 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5168 struct ath12k_hw_mode_freq_range_arg *mac_range;
5169 u8 phy_id;
5170
5171 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_DBS];
5172 /* Reset 5 GHz range for shared mac for DBS */
5173 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5174 if (mac_range[phy_id].low_2ghz_freq &&
5175 mac_range[phy_id].low_5ghz_freq) {
5176 mac_range[phy_id].low_5ghz_freq = 0;
5177 mac_range[phy_id].high_5ghz_freq = 0;
5178 }
5179 }
5180 }
5181
5182 static u32
ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5183 ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5184 {
5185 u32 highest_freq = 0;
5186 u8 phy_id;
5187
5188 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5189 if (range[phy_id].high_5ghz_freq > highest_freq)
5190 highest_freq = range[phy_id].high_5ghz_freq;
5191 }
5192
5193 return highest_freq ? highest_freq : ATH12K_MAX_6GHZ_FREQ;
5194 }
5195
5196 static u32
ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5197 ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5198 {
5199 u32 lowest_freq = 0;
5200 u8 phy_id;
5201
5202 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5203 if ((!lowest_freq && range[phy_id].low_5ghz_freq) ||
5204 range[phy_id].low_5ghz_freq < lowest_freq)
5205 lowest_freq = range[phy_id].low_5ghz_freq;
5206 }
5207
5208 return lowest_freq ? lowest_freq : ATH12K_MIN_5GHZ_FREQ;
5209 }
5210
5211 static void
ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5212 ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base *ab,
5213 u16 sbs_range_sep,
5214 struct ath12k_hw_mode_freq_range_arg *ref_freq)
5215 {
5216 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5217 struct ath12k_hw_mode_freq_range_arg *upper_sbs_freq_range;
5218 u8 phy_id;
5219
5220 upper_sbs_freq_range =
5221 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_UPPER_SHARE];
5222
5223 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5224 upper_sbs_freq_range[phy_id].low_2ghz_freq =
5225 ref_freq[phy_id].low_2ghz_freq;
5226 upper_sbs_freq_range[phy_id].high_2ghz_freq =
5227 ref_freq[phy_id].high_2ghz_freq;
5228
5229 /* update for shared mac */
5230 if (upper_sbs_freq_range[phy_id].low_2ghz_freq) {
5231 upper_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5232 upper_sbs_freq_range[phy_id].high_5ghz_freq =
5233 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5234 } else {
5235 upper_sbs_freq_range[phy_id].low_5ghz_freq =
5236 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5237 upper_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5238 }
5239 }
5240 }
5241
5242 static void
ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5243 ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base *ab,
5244 u16 sbs_range_sep,
5245 struct ath12k_hw_mode_freq_range_arg *ref_freq)
5246 {
5247 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5248 struct ath12k_hw_mode_freq_range_arg *lower_sbs_freq_range;
5249 u8 phy_id;
5250
5251 lower_sbs_freq_range =
5252 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_LOWER_SHARE];
5253
5254 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5255 lower_sbs_freq_range[phy_id].low_2ghz_freq =
5256 ref_freq[phy_id].low_2ghz_freq;
5257 lower_sbs_freq_range[phy_id].high_2ghz_freq =
5258 ref_freq[phy_id].high_2ghz_freq;
5259
5260 /* update for shared mac */
5261 if (lower_sbs_freq_range[phy_id].low_2ghz_freq) {
5262 lower_sbs_freq_range[phy_id].low_5ghz_freq =
5263 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5264 lower_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5265 } else {
5266 lower_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5267 lower_sbs_freq_range[phy_id].high_5ghz_freq =
5268 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5269 }
5270 }
5271 }
5272
ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)5273 static const char *ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)
5274 {
5275 static const char * const mode_str[] = {
5276 [ATH12K_HW_MODE_SMM] = "SMM",
5277 [ATH12K_HW_MODE_DBS] = "DBS",
5278 [ATH12K_HW_MODE_SBS] = "SBS",
5279 [ATH12K_HW_MODE_SBS_UPPER_SHARE] = "SBS_UPPER_SHARE",
5280 [ATH12K_HW_MODE_SBS_LOWER_SHARE] = "SBS_LOWER_SHARE",
5281 };
5282
5283 if (hw_mode >= ARRAY_SIZE(mode_str))
5284 return "Unknown";
5285
5286 return mode_str[hw_mode];
5287 }
5288
5289 static void
ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base * ab,struct ath12k_hw_mode_freq_range_arg * freq_range,enum ath12k_hw_mode hw_mode)5290 ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base *ab,
5291 struct ath12k_hw_mode_freq_range_arg *freq_range,
5292 enum ath12k_hw_mode hw_mode)
5293 {
5294 u8 i;
5295
5296 for (i = 0; i < MAX_RADIOS; i++)
5297 if (freq_range[i].low_2ghz_freq || freq_range[i].low_5ghz_freq)
5298 ath12k_dbg(ab, ATH12K_DBG_WMI,
5299 "frequency range: %s(%d) mac %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5300 ath12k_wmi_hw_mode_to_str(hw_mode),
5301 hw_mode, i,
5302 freq_range[i].low_2ghz_freq,
5303 freq_range[i].high_2ghz_freq,
5304 freq_range[i].low_5ghz_freq,
5305 freq_range[i].high_5ghz_freq);
5306 }
5307
ath12k_wmi_dump_freq_range(struct ath12k_base * ab)5308 static void ath12k_wmi_dump_freq_range(struct ath12k_base *ab)
5309 {
5310 struct ath12k_hw_mode_freq_range_arg *freq_range;
5311 u8 i;
5312
5313 for (i = ATH12K_HW_MODE_SMM; i < ATH12K_HW_MODE_MAX; i++) {
5314 freq_range = ab->wmi_ab.hw_mode_info.freq_range_caps[i];
5315 ath12k_wmi_dump_freq_range_per_mac(ab, freq_range, i);
5316 }
5317 }
5318
ath12k_wmi_modify_sbs_freq(struct ath12k_base * ab,u8 phy_id)5319 static int ath12k_wmi_modify_sbs_freq(struct ath12k_base *ab, u8 phy_id)
5320 {
5321 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5322 struct ath12k_hw_mode_freq_range_arg *sbs_mac_range, *shared_mac_range;
5323 struct ath12k_hw_mode_freq_range_arg *non_shared_range;
5324 u8 shared_phy_id;
5325
5326 sbs_mac_range = &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][phy_id];
5327
5328 /* if SBS mac range has both 2.4 and 5 GHz ranges, i.e. shared phy_id
5329 * keep the range as it is in SBS
5330 */
5331 if (sbs_mac_range->low_2ghz_freq && sbs_mac_range->low_5ghz_freq)
5332 return 0;
5333
5334 if (sbs_mac_range->low_2ghz_freq && !sbs_mac_range->low_5ghz_freq) {
5335 ath12k_err(ab, "Invalid DBS/SBS mode with only 2.4Ghz");
5336 ath12k_wmi_dump_freq_range_per_mac(ab, sbs_mac_range, ATH12K_HW_MODE_SBS);
5337 return -EINVAL;
5338 }
5339
5340 non_shared_range = sbs_mac_range;
5341 /* if SBS mac range has only 5 GHz then it's the non-shared phy, so
5342 * modify the range as per the shared mac.
5343 */
5344 shared_phy_id = phy_id ? 0 : 1;
5345 shared_mac_range =
5346 &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][shared_phy_id];
5347
5348 if (shared_mac_range->low_5ghz_freq > non_shared_range->low_5ghz_freq) {
5349 ath12k_dbg(ab, ATH12K_DBG_WMI, "high 5 GHz shared");
5350 /* If the shared mac lower 5 GHz frequency is greater than
5351 * non-shared mac lower 5 GHz frequency then the shared mac has
5352 * high 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz high
5353 * freq should be less than the shared mac's low 5 GHz freq.
5354 */
5355 if (non_shared_range->high_5ghz_freq >=
5356 shared_mac_range->low_5ghz_freq)
5357 non_shared_range->high_5ghz_freq =
5358 max_t(u32, shared_mac_range->low_5ghz_freq - 10,
5359 non_shared_range->low_5ghz_freq);
5360 } else if (shared_mac_range->high_5ghz_freq <
5361 non_shared_range->high_5ghz_freq) {
5362 ath12k_dbg(ab, ATH12K_DBG_WMI, "low 5 GHz shared");
5363 /* If the shared mac high 5 GHz frequency is less than
5364 * non-shared mac high 5 GHz frequency then the shared mac has
5365 * low 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz low
5366 * freq should be greater than the shared mac's high 5 GHz freq.
5367 */
5368 if (shared_mac_range->high_5ghz_freq >=
5369 non_shared_range->low_5ghz_freq)
5370 non_shared_range->low_5ghz_freq =
5371 min_t(u32, shared_mac_range->high_5ghz_freq + 10,
5372 non_shared_range->high_5ghz_freq);
5373 } else {
5374 ath12k_warn(ab, "invalid SBS range with all 5 GHz shared");
5375 return -EINVAL;
5376 }
5377
5378 return 0;
5379 }
5380
ath12k_wmi_update_sbs_freq_info(struct ath12k_base * ab)5381 static void ath12k_wmi_update_sbs_freq_info(struct ath12k_base *ab)
5382 {
5383 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5384 struct ath12k_hw_mode_freq_range_arg *mac_range;
5385 u16 sbs_range_sep;
5386 u8 phy_id;
5387 int ret;
5388
5389 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS];
5390
5391 /* If sbs_lower_band_end_freq has a value, then the frequency range
5392 * will be split using that value.
5393 */
5394 sbs_range_sep = ab->wmi_ab.sbs_lower_band_end_freq;
5395 if (sbs_range_sep) {
5396 ath12k_wmi_fill_upper_share_sbs_freq(ab, sbs_range_sep,
5397 mac_range);
5398 ath12k_wmi_fill_lower_share_sbs_freq(ab, sbs_range_sep,
5399 mac_range);
5400 /* Hardware specifies the range boundary with sbs_range_sep,
5401 * (i.e. the boundary between 5 GHz high and 5 GHz low),
5402 * reset the original one to make sure it will not get used.
5403 */
5404 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5405 return;
5406 }
5407
5408 /* If sbs_lower_band_end_freq is not set that means firmware will send one
5409 * shared mac range and one non-shared mac range. so update that freq.
5410 */
5411 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5412 ret = ath12k_wmi_modify_sbs_freq(ab, phy_id);
5413 if (ret) {
5414 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5415 break;
5416 }
5417 }
5418 }
5419
5420 static void
ath12k_wmi_update_mac_freq_info(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type hw_config_type,u32 phy_id,struct ath12k_svc_ext_mac_phy_info * mac_cap)5421 ath12k_wmi_update_mac_freq_info(struct ath12k_base *ab,
5422 enum wmi_host_hw_mode_config_type hw_config_type,
5423 u32 phy_id,
5424 struct ath12k_svc_ext_mac_phy_info *mac_cap)
5425 {
5426 if (phy_id >= MAX_RADIOS) {
5427 ath12k_err(ab, "mac more than two not supported: %d", phy_id);
5428 return;
5429 }
5430
5431 ath12k_dbg(ab, ATH12K_DBG_WMI,
5432 "hw_mode_cfg %d mac %d band 0x%x SBS cutoff freq %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5433 hw_config_type, phy_id, mac_cap->supported_bands,
5434 ab->wmi_ab.sbs_lower_band_end_freq,
5435 mac_cap->hw_freq_range.low_2ghz_freq,
5436 mac_cap->hw_freq_range.high_2ghz_freq,
5437 mac_cap->hw_freq_range.low_5ghz_freq,
5438 mac_cap->hw_freq_range.high_5ghz_freq);
5439
5440 switch (hw_config_type) {
5441 case WMI_HOST_HW_MODE_SINGLE:
5442 if (phy_id) {
5443 ath12k_dbg(ab, ATH12K_DBG_WMI, "mac phy 1 is not supported");
5444 break;
5445 }
5446 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SMM, phy_id);
5447 break;
5448
5449 case WMI_HOST_HW_MODE_DBS:
5450 if (!ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5451 ath12k_wmi_update_freq_info(ab, mac_cap,
5452 ATH12K_HW_MODE_DBS, phy_id);
5453 break;
5454 case WMI_HOST_HW_MODE_DBS_SBS:
5455 case WMI_HOST_HW_MODE_DBS_OR_SBS:
5456 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_DBS, phy_id);
5457 if (ab->wmi_ab.sbs_lower_band_end_freq ||
5458 mac_cap->hw_freq_range.low_5ghz_freq ||
5459 mac_cap->hw_freq_range.low_2ghz_freq)
5460 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS,
5461 phy_id);
5462
5463 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5464 ath12k_wmi_update_dbs_freq_info(ab);
5465 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5466 ath12k_wmi_update_sbs_freq_info(ab);
5467 break;
5468 case WMI_HOST_HW_MODE_SBS:
5469 case WMI_HOST_HW_MODE_SBS_PASSIVE:
5470 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, phy_id);
5471 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5472 ath12k_wmi_update_sbs_freq_info(ab);
5473
5474 break;
5475 default:
5476 break;
5477 }
5478 }
5479
ath12k_wmi_sbs_range_present(struct ath12k_base * ab)5480 static bool ath12k_wmi_sbs_range_present(struct ath12k_base *ab)
5481 {
5482 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS) ||
5483 (ab->wmi_ab.sbs_lower_band_end_freq &&
5484 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_LOWER_SHARE) &&
5485 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_UPPER_SHARE)))
5486 return true;
5487
5488 return false;
5489 }
5490
ath12k_wmi_update_hw_mode_list(struct ath12k_base * ab)5491 static int ath12k_wmi_update_hw_mode_list(struct ath12k_base *ab)
5492 {
5493 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
5494 struct ath12k_hw_mode_info *info = &ab->wmi_ab.hw_mode_info;
5495 enum wmi_host_hw_mode_config_type hw_config_type;
5496 struct ath12k_svc_ext_mac_phy_info *tmp;
5497 bool dbs_mode = false, sbs_mode = false;
5498 u32 i, j = 0;
5499
5500 if (!svc_ext_info->num_hw_modes) {
5501 ath12k_err(ab, "invalid number of hw modes");
5502 return -EINVAL;
5503 }
5504
5505 ath12k_dbg(ab, ATH12K_DBG_WMI, "updated HW mode list: num modes %d",
5506 svc_ext_info->num_hw_modes);
5507
5508 memset(info->freq_range_caps, 0, sizeof(info->freq_range_caps));
5509
5510 for (i = 0; i < svc_ext_info->num_hw_modes; i++) {
5511 if (j >= ATH12K_MAX_MAC_PHY_CAP)
5512 return -EINVAL;
5513
5514 /* Update for MAC0 */
5515 tmp = &svc_ext_info->mac_phy_info[j++];
5516 hw_config_type = tmp->hw_mode_config_type;
5517 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, tmp->phy_id, tmp);
5518
5519 /* SBS and DBS have dual MAC. Up to 2 MACs are considered. */
5520 if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5521 hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5522 hw_config_type == WMI_HOST_HW_MODE_SBS ||
5523 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) {
5524 if (j >= ATH12K_MAX_MAC_PHY_CAP)
5525 return -EINVAL;
5526 /* Update for MAC1 */
5527 tmp = &svc_ext_info->mac_phy_info[j++];
5528 ath12k_wmi_update_mac_freq_info(ab, hw_config_type,
5529 tmp->phy_id, tmp);
5530
5531 if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5532 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS)
5533 dbs_mode = true;
5534
5535 if (ath12k_wmi_sbs_range_present(ab) &&
5536 (hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5537 hw_config_type == WMI_HOST_HW_MODE_SBS ||
5538 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS))
5539 sbs_mode = true;
5540 }
5541 }
5542
5543 info->support_dbs = dbs_mode;
5544 info->support_sbs = sbs_mode;
5545
5546 ath12k_wmi_dump_freq_range(ab);
5547
5548 return 0;
5549 }
5550
ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5551 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab,
5552 u16 tag, u16 len,
5553 const void *ptr, void *data)
5554 {
5555 const struct ath12k_wmi_dbs_or_sbs_cap_params *dbs_or_sbs_caps;
5556 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
5557 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data;
5558 int ret;
5559
5560 switch (tag) {
5561 case WMI_TAG_SERVICE_READY_EXT2_EVENT:
5562 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr,
5563 &parse->arg);
5564 if (ret) {
5565 ath12k_warn(ab,
5566 "failed to extract wmi service ready ext2 parameters: %d\n",
5567 ret);
5568 return ret;
5569 }
5570 break;
5571
5572 case WMI_TAG_ARRAY_STRUCT:
5573 if (!parse->dma_ring_cap_done) {
5574 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
5575 &parse->dma_caps_parse);
5576 if (ret)
5577 return ret;
5578
5579 parse->dma_ring_cap_done = true;
5580 } else if (!parse->spectral_bin_scaling_done) {
5581 /* TODO: This is a place-holder as WMI tag for
5582 * spectral scaling is before
5583 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT
5584 */
5585 parse->spectral_bin_scaling_done = true;
5586 } else if (!parse->mac_phy_caps_ext_done) {
5587 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
5588 ath12k_wmi_tlv_mac_phy_caps_ext,
5589 parse);
5590 if (ret) {
5591 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n",
5592 ret);
5593 return ret;
5594 }
5595
5596 parse->mac_phy_caps_ext_done = true;
5597 } else if (!parse->hal_reg_caps_ext2_done) {
5598 parse->hal_reg_caps_ext2_done = true;
5599 } else if (!parse->scan_radio_caps_ext2_done) {
5600 parse->scan_radio_caps_ext2_done = true;
5601 } else if (!parse->twt_caps_done) {
5602 parse->twt_caps_done = true;
5603 } else if (!parse->htt_msdu_idx_to_qtype_map_done) {
5604 parse->htt_msdu_idx_to_qtype_map_done = true;
5605 } else if (!parse->dbs_or_sbs_cap_ext_done) {
5606 dbs_or_sbs_caps = ptr;
5607 ab->wmi_ab.sbs_lower_band_end_freq =
5608 __le32_to_cpu(dbs_or_sbs_caps->sbs_lower_band_end_freq);
5609
5610 ath12k_dbg(ab, ATH12K_DBG_WMI, "sbs_lower_band_end_freq %u\n",
5611 ab->wmi_ab.sbs_lower_band_end_freq);
5612
5613 ret = ath12k_wmi_update_hw_mode_list(ab);
5614 if (ret) {
5615 ath12k_warn(ab, "failed to update hw mode list: %d\n",
5616 ret);
5617 return ret;
5618 }
5619
5620 parse->dbs_or_sbs_cap_ext_done = true;
5621 }
5622
5623 break;
5624 default:
5625 break;
5626 }
5627
5628 return 0;
5629 }
5630
ath12k_service_ready_ext2_event(struct ath12k_base * ab,struct sk_buff * skb)5631 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab,
5632 struct sk_buff *skb)
5633 {
5634 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { };
5635 int ret;
5636
5637 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5638 ath12k_wmi_svc_rdy_ext2_parse,
5639 &svc_rdy_ext2);
5640 if (ret) {
5641 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret);
5642 goto err;
5643 }
5644
5645 complete(&ab->wmi_ab.service_ready);
5646
5647 return 0;
5648
5649 err:
5650 ath12k_wmi_free_dbring_caps(ab);
5651 return ret;
5652 }
5653
ath12k_pull_vdev_start_resp_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_start_resp_event * vdev_rsp)5654 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb,
5655 struct wmi_vdev_start_resp_event *vdev_rsp)
5656 {
5657 const void **tb;
5658 const struct wmi_vdev_start_resp_event *ev;
5659 int ret;
5660
5661 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5662 if (IS_ERR(tb)) {
5663 ret = PTR_ERR(tb);
5664 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5665 return ret;
5666 }
5667
5668 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT];
5669 if (!ev) {
5670 ath12k_warn(ab, "failed to fetch vdev start resp ev");
5671 kfree(tb);
5672 return -EPROTO;
5673 }
5674
5675 *vdev_rsp = *ev;
5676
5677 kfree(tb);
5678 return 0;
5679 }
5680
5681 static struct ath12k_reg_rule
create_ext_reg_rules_from_wmi(u32 num_reg_rules,struct ath12k_wmi_reg_rule_ext_params * wmi_reg_rule)5682 *create_ext_reg_rules_from_wmi(u32 num_reg_rules,
5683 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
5684 {
5685 struct ath12k_reg_rule *reg_rule_ptr;
5686 u32 count;
5687
5688 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)),
5689 GFP_ATOMIC);
5690
5691 if (!reg_rule_ptr)
5692 return NULL;
5693
5694 for (count = 0; count < num_reg_rules; count++) {
5695 reg_rule_ptr[count].start_freq =
5696 le32_get_bits(wmi_reg_rule[count].freq_info,
5697 REG_RULE_START_FREQ);
5698 reg_rule_ptr[count].end_freq =
5699 le32_get_bits(wmi_reg_rule[count].freq_info,
5700 REG_RULE_END_FREQ);
5701 reg_rule_ptr[count].max_bw =
5702 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5703 REG_RULE_MAX_BW);
5704 reg_rule_ptr[count].reg_power =
5705 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5706 REG_RULE_REG_PWR);
5707 reg_rule_ptr[count].ant_gain =
5708 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5709 REG_RULE_ANT_GAIN);
5710 reg_rule_ptr[count].flags =
5711 le32_get_bits(wmi_reg_rule[count].flag_info,
5712 REG_RULE_FLAGS);
5713 reg_rule_ptr[count].psd_flag =
5714 le32_get_bits(wmi_reg_rule[count].psd_power_info,
5715 REG_RULE_PSD_INFO);
5716 reg_rule_ptr[count].psd_eirp =
5717 le32_get_bits(wmi_reg_rule[count].psd_power_info,
5718 REG_RULE_PSD_EIRP);
5719 }
5720
5721 return reg_rule_ptr;
5722 }
5723
ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params * rule,u32 num_reg_rules)5724 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule,
5725 u32 num_reg_rules)
5726 {
5727 u8 num_invalid_5ghz_rules = 0;
5728 u32 count, start_freq;
5729
5730 for (count = 0; count < num_reg_rules; count++) {
5731 start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ);
5732
5733 if (start_freq >= ATH12K_MIN_6GHZ_FREQ)
5734 num_invalid_5ghz_rules++;
5735 }
5736
5737 return num_invalid_5ghz_rules;
5738 }
5739
ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_reg_info * reg_info)5740 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
5741 struct sk_buff *skb,
5742 struct ath12k_reg_info *reg_info)
5743 {
5744 const void **tb;
5745 const struct wmi_reg_chan_list_cc_ext_event *ev;
5746 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
5747 u32 num_2g_reg_rules, num_5g_reg_rules;
5748 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
5749 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
5750 u8 num_invalid_5ghz_ext_rules;
5751 u32 total_reg_rules = 0;
5752 int ret, i, j;
5753
5754 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n");
5755
5756 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5757 if (IS_ERR(tb)) {
5758 ret = PTR_ERR(tb);
5759 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5760 return ret;
5761 }
5762
5763 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
5764 if (!ev) {
5765 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n");
5766 kfree(tb);
5767 return -EPROTO;
5768 }
5769
5770 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules);
5771 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules);
5772 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] =
5773 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi);
5774 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] =
5775 le32_to_cpu(ev->num_6g_reg_rules_ap_sp);
5776 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] =
5777 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp);
5778
5779 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5780 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
5781 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]);
5782 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
5783 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]);
5784 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
5785 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]);
5786 }
5787
5788 num_2g_reg_rules = reg_info->num_2g_reg_rules;
5789 total_reg_rules += num_2g_reg_rules;
5790 num_5g_reg_rules = reg_info->num_5g_reg_rules;
5791 total_reg_rules += num_5g_reg_rules;
5792
5793 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) {
5794 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n",
5795 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES);
5796 kfree(tb);
5797 return -EINVAL;
5798 }
5799
5800 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
5801 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i];
5802
5803 if (num_6g_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) {
5804 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n",
5805 i, num_6g_reg_rules_ap[i], MAX_6GHZ_REG_RULES);
5806 kfree(tb);
5807 return -EINVAL;
5808 }
5809
5810 total_reg_rules += num_6g_reg_rules_ap[i];
5811 }
5812
5813 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5814 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
5815 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
5816 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
5817
5818 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
5819 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
5820 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
5821
5822 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
5823 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
5824 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
5825
5826 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES ||
5827 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6GHZ_REG_RULES ||
5828 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6GHZ_REG_RULES) {
5829 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n",
5830 i);
5831 kfree(tb);
5832 return -EINVAL;
5833 }
5834 }
5835
5836 if (!total_reg_rules) {
5837 ath12k_warn(ab, "No reg rules available\n");
5838 kfree(tb);
5839 return -EINVAL;
5840 }
5841
5842 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
5843
5844 reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
5845 reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
5846 reg_info->num_phy = le32_to_cpu(ev->num_phy);
5847 reg_info->phy_id = le32_to_cpu(ev->phy_id);
5848 reg_info->ctry_code = le32_to_cpu(ev->country_id);
5849 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code);
5850
5851 switch (le32_to_cpu(ev->status_code)) {
5852 case WMI_REG_SET_CC_STATUS_PASS:
5853 reg_info->status_code = REG_SET_CC_STATUS_PASS;
5854 break;
5855 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
5856 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
5857 break;
5858 case WMI_REG_INIT_ALPHA2_NOT_FOUND:
5859 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
5860 break;
5861 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
5862 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
5863 break;
5864 case WMI_REG_SET_CC_STATUS_NO_MEMORY:
5865 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
5866 break;
5867 case WMI_REG_SET_CC_STATUS_FAIL:
5868 reg_info->status_code = REG_SET_CC_STATUS_FAIL;
5869 break;
5870 }
5871
5872 reg_info->is_ext_reg_event = true;
5873
5874 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g);
5875 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g);
5876 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g);
5877 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g);
5878 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi);
5879 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi);
5880 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp);
5881 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp);
5882 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp);
5883 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp);
5884
5885 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5886 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] =
5887 le32_to_cpu(ev->min_bw_6g_client_lpi[i]);
5888 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] =
5889 le32_to_cpu(ev->max_bw_6g_client_lpi[i]);
5890 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
5891 le32_to_cpu(ev->min_bw_6g_client_sp[i]);
5892 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
5893 le32_to_cpu(ev->max_bw_6g_client_sp[i]);
5894 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] =
5895 le32_to_cpu(ev->min_bw_6g_client_vlp[i]);
5896 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] =
5897 le32_to_cpu(ev->max_bw_6g_client_vlp[i]);
5898 }
5899
5900 ath12k_dbg(ab, ATH12K_DBG_WMI,
5901 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x",
5902 __func__, reg_info->alpha2, reg_info->dfs_region,
5903 reg_info->min_bw_2g, reg_info->max_bw_2g,
5904 reg_info->min_bw_5g, reg_info->max_bw_5g,
5905 reg_info->phybitmap);
5906
5907 ath12k_dbg(ab, ATH12K_DBG_WMI,
5908 "num_2g_reg_rules %d num_5g_reg_rules %d",
5909 num_2g_reg_rules, num_5g_reg_rules);
5910
5911 ath12k_dbg(ab, ATH12K_DBG_WMI,
5912 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d",
5913 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP],
5914 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP],
5915 num_6g_reg_rules_ap[WMI_REG_VLP_AP]);
5916
5917 ath12k_dbg(ab, ATH12K_DBG_WMI,
5918 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
5919 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT],
5920 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT],
5921 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]);
5922
5923 ath12k_dbg(ab, ATH12K_DBG_WMI,
5924 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
5925 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT],
5926 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT],
5927 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]);
5928
5929 ext_wmi_reg_rule =
5930 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev
5931 + sizeof(*ev)
5932 + sizeof(struct wmi_tlv));
5933
5934 if (num_2g_reg_rules) {
5935 reg_info->reg_rules_2g_ptr =
5936 create_ext_reg_rules_from_wmi(num_2g_reg_rules,
5937 ext_wmi_reg_rule);
5938
5939 if (!reg_info->reg_rules_2g_ptr) {
5940 kfree(tb);
5941 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n");
5942 return -ENOMEM;
5943 }
5944 }
5945
5946 ext_wmi_reg_rule += num_2g_reg_rules;
5947
5948 /* Firmware might include 6 GHz reg rule in 5 GHz rule list
5949 * for few countries along with separate 6 GHz rule.
5950 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
5951 * causes intersect check to be true, and same rules will be
5952 * shown multiple times in iw cmd.
5953 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
5954 */
5955 num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule,
5956 num_5g_reg_rules);
5957
5958 if (num_invalid_5ghz_ext_rules) {
5959 ath12k_dbg(ab, ATH12K_DBG_WMI,
5960 "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
5961 reg_info->alpha2, reg_info->num_5g_reg_rules,
5962 num_invalid_5ghz_ext_rules);
5963
5964 num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules;
5965 reg_info->num_5g_reg_rules = num_5g_reg_rules;
5966 }
5967
5968 if (num_5g_reg_rules) {
5969 reg_info->reg_rules_5g_ptr =
5970 create_ext_reg_rules_from_wmi(num_5g_reg_rules,
5971 ext_wmi_reg_rule);
5972
5973 if (!reg_info->reg_rules_5g_ptr) {
5974 kfree(tb);
5975 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n");
5976 return -ENOMEM;
5977 }
5978 }
5979
5980 /* We have adjusted the number of 5 GHz reg rules above. But still those
5981 * many rules needs to be adjusted in ext_wmi_reg_rule.
5982 *
5983 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
5984 */
5985 ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules);
5986
5987 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
5988 reg_info->reg_rules_6g_ap_ptr[i] =
5989 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i],
5990 ext_wmi_reg_rule);
5991
5992 if (!reg_info->reg_rules_6g_ap_ptr[i]) {
5993 kfree(tb);
5994 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n");
5995 return -ENOMEM;
5996 }
5997
5998 ext_wmi_reg_rule += num_6g_reg_rules_ap[i];
5999 }
6000
6001 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
6002 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6003 reg_info->reg_rules_6g_client_ptr[j][i] =
6004 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i],
6005 ext_wmi_reg_rule);
6006
6007 if (!reg_info->reg_rules_6g_client_ptr[j][i]) {
6008 kfree(tb);
6009 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n");
6010 return -ENOMEM;
6011 }
6012
6013 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i];
6014 }
6015 }
6016
6017 reg_info->client_type = le32_to_cpu(ev->client_type);
6018 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
6019 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable;
6020 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] =
6021 le32_to_cpu(ev->domain_code_6g_ap_lpi);
6022 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] =
6023 le32_to_cpu(ev->domain_code_6g_ap_sp);
6024 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] =
6025 le32_to_cpu(ev->domain_code_6g_ap_vlp);
6026
6027 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6028 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] =
6029 le32_to_cpu(ev->domain_code_6g_client_lpi[i]);
6030 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] =
6031 le32_to_cpu(ev->domain_code_6g_client_sp[i]);
6032 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] =
6033 le32_to_cpu(ev->domain_code_6g_client_vlp[i]);
6034 }
6035
6036 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id);
6037
6038 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d",
6039 reg_info->client_type, reg_info->domain_code_6g_super_id);
6040
6041 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n");
6042
6043 kfree(tb);
6044 return 0;
6045 }
6046
ath12k_pull_peer_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_delete_resp_event * peer_del_resp)6047 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb,
6048 struct wmi_peer_delete_resp_event *peer_del_resp)
6049 {
6050 const void **tb;
6051 const struct wmi_peer_delete_resp_event *ev;
6052 int ret;
6053
6054 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6055 if (IS_ERR(tb)) {
6056 ret = PTR_ERR(tb);
6057 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6058 return ret;
6059 }
6060
6061 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT];
6062 if (!ev) {
6063 ath12k_warn(ab, "failed to fetch peer delete resp ev");
6064 kfree(tb);
6065 return -EPROTO;
6066 }
6067
6068 memset(peer_del_resp, 0, sizeof(*peer_del_resp));
6069
6070 peer_del_resp->vdev_id = ev->vdev_id;
6071 ether_addr_copy(peer_del_resp->peer_macaddr.addr,
6072 ev->peer_macaddr.addr);
6073
6074 kfree(tb);
6075 return 0;
6076 }
6077
ath12k_pull_vdev_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)6078 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab,
6079 struct sk_buff *skb,
6080 u32 *vdev_id)
6081 {
6082 const void **tb;
6083 const struct wmi_vdev_delete_resp_event *ev;
6084 int ret;
6085
6086 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6087 if (IS_ERR(tb)) {
6088 ret = PTR_ERR(tb);
6089 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6090 return ret;
6091 }
6092
6093 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT];
6094 if (!ev) {
6095 ath12k_warn(ab, "failed to fetch vdev delete resp ev");
6096 kfree(tb);
6097 return -EPROTO;
6098 }
6099
6100 *vdev_id = le32_to_cpu(ev->vdev_id);
6101
6102 kfree(tb);
6103 return 0;
6104 }
6105
ath12k_pull_bcn_tx_status_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id,u32 * tx_status)6106 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab,
6107 struct sk_buff *skb,
6108 u32 *vdev_id, u32 *tx_status)
6109 {
6110 const void **tb;
6111 const struct wmi_bcn_tx_status_event *ev;
6112 int ret;
6113
6114 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6115 if (IS_ERR(tb)) {
6116 ret = PTR_ERR(tb);
6117 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6118 return ret;
6119 }
6120
6121 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT];
6122 if (!ev) {
6123 ath12k_warn(ab, "failed to fetch bcn tx status ev");
6124 kfree(tb);
6125 return -EPROTO;
6126 }
6127
6128 *vdev_id = le32_to_cpu(ev->vdev_id);
6129 *tx_status = le32_to_cpu(ev->tx_status);
6130
6131 kfree(tb);
6132 return 0;
6133 }
6134
ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)6135 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb,
6136 u32 *vdev_id)
6137 {
6138 const void **tb;
6139 const struct wmi_vdev_stopped_event *ev;
6140 int ret;
6141
6142 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6143 if (IS_ERR(tb)) {
6144 ret = PTR_ERR(tb);
6145 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6146 return ret;
6147 }
6148
6149 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT];
6150 if (!ev) {
6151 ath12k_warn(ab, "failed to fetch vdev stop ev");
6152 kfree(tb);
6153 return -EPROTO;
6154 }
6155
6156 *vdev_id = le32_to_cpu(ev->vdev_id);
6157
6158 kfree(tb);
6159 return 0;
6160 }
6161
ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6162 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab,
6163 u16 tag, u16 len,
6164 const void *ptr, void *data)
6165 {
6166 struct wmi_tlv_mgmt_rx_parse *parse = data;
6167
6168 switch (tag) {
6169 case WMI_TAG_MGMT_RX_HDR:
6170 parse->fixed = ptr;
6171 break;
6172 case WMI_TAG_ARRAY_BYTE:
6173 if (!parse->frame_buf_done) {
6174 parse->frame_buf = ptr;
6175 parse->frame_buf_done = true;
6176 }
6177 break;
6178 }
6179 return 0;
6180 }
6181
ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_wmi_mgmt_rx_arg * hdr)6182 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
6183 struct sk_buff *skb,
6184 struct ath12k_wmi_mgmt_rx_arg *hdr)
6185 {
6186 struct wmi_tlv_mgmt_rx_parse parse = { };
6187 const struct ath12k_wmi_mgmt_rx_params *ev;
6188 const u8 *frame;
6189 int i, ret;
6190
6191 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6192 ath12k_wmi_tlv_mgmt_rx_parse,
6193 &parse);
6194 if (ret) {
6195 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret);
6196 return ret;
6197 }
6198
6199 ev = parse.fixed;
6200 frame = parse.frame_buf;
6201
6202 if (!ev || !frame) {
6203 ath12k_warn(ab, "failed to fetch mgmt rx hdr");
6204 return -EPROTO;
6205 }
6206
6207 hdr->pdev_id = le32_to_cpu(ev->pdev_id);
6208 hdr->chan_freq = le32_to_cpu(ev->chan_freq);
6209 hdr->channel = le32_to_cpu(ev->channel);
6210 hdr->snr = le32_to_cpu(ev->snr);
6211 hdr->rate = le32_to_cpu(ev->rate);
6212 hdr->phy_mode = le32_to_cpu(ev->phy_mode);
6213 hdr->buf_len = le32_to_cpu(ev->buf_len);
6214 hdr->status = le32_to_cpu(ev->status);
6215 hdr->flags = le32_to_cpu(ev->flags);
6216 hdr->rssi = a_sle32_to_cpu(ev->rssi);
6217 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta);
6218
6219 for (i = 0; i < ATH_MAX_ANTENNA; i++)
6220 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]);
6221
6222 if (skb->len < (frame - skb->data) + hdr->buf_len) {
6223 ath12k_warn(ab, "invalid length in mgmt rx hdr ev");
6224 return -EPROTO;
6225 }
6226
6227 /* shift the sk_buff to point to `frame` */
6228 skb_trim(skb, 0);
6229 skb_put(skb, frame - skb->data);
6230 skb_pull(skb, frame - skb->data);
6231 skb_put(skb, hdr->buf_len);
6232
6233 return 0;
6234 }
6235
wmi_process_mgmt_tx_comp(struct ath12k * ar,u32 desc_id,u32 status,u32 ack_rssi)6236 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
6237 u32 status, u32 ack_rssi)
6238 {
6239 struct sk_buff *msdu;
6240 struct ieee80211_tx_info *info;
6241 struct ath12k_skb_cb *skb_cb;
6242 int num_mgmt;
6243
6244 spin_lock_bh(&ar->txmgmt_idr_lock);
6245 msdu = idr_find(&ar->txmgmt_idr, desc_id);
6246
6247 if (!msdu) {
6248 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
6249 desc_id);
6250 spin_unlock_bh(&ar->txmgmt_idr_lock);
6251 return -ENOENT;
6252 }
6253
6254 idr_remove(&ar->txmgmt_idr, desc_id);
6255 spin_unlock_bh(&ar->txmgmt_idr_lock);
6256
6257 skb_cb = ATH12K_SKB_CB(msdu);
6258 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
6259
6260 info = IEEE80211_SKB_CB(msdu);
6261 memset(&info->status, 0, sizeof(info->status));
6262
6263 /* skip tx rate update from ieee80211_status*/
6264 info->status.rates[0].idx = -1;
6265
6266 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) {
6267 info->flags |= IEEE80211_TX_STAT_ACK;
6268 info->status.ack_signal = ack_rssi;
6269 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
6270 }
6271
6272 if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status)
6273 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
6274
6275 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu);
6276
6277 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx);
6278
6279 /* WARN when we received this event without doing any mgmt tx */
6280 if (num_mgmt < 0)
6281 WARN_ON_ONCE(1);
6282
6283 if (!num_mgmt)
6284 wake_up(&ar->txmgmt_empty_waitq);
6285
6286 return 0;
6287 }
6288
ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_mgmt_tx_compl_event * param)6289 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
6290 struct sk_buff *skb,
6291 struct wmi_mgmt_tx_compl_event *param)
6292 {
6293 const void **tb;
6294 const struct wmi_mgmt_tx_compl_event *ev;
6295 int ret;
6296
6297 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6298 if (IS_ERR(tb)) {
6299 ret = PTR_ERR(tb);
6300 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6301 return ret;
6302 }
6303
6304 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT];
6305 if (!ev) {
6306 ath12k_warn(ab, "failed to fetch mgmt tx compl ev");
6307 kfree(tb);
6308 return -EPROTO;
6309 }
6310
6311 param->pdev_id = ev->pdev_id;
6312 param->desc_id = ev->desc_id;
6313 param->status = ev->status;
6314 param->ppdu_id = ev->ppdu_id;
6315 param->ack_rssi = ev->ack_rssi;
6316
6317 kfree(tb);
6318 return 0;
6319 }
6320
ath12k_wmi_event_scan_started(struct ath12k * ar)6321 static void ath12k_wmi_event_scan_started(struct ath12k *ar)
6322 {
6323 lockdep_assert_held(&ar->data_lock);
6324
6325 switch (ar->scan.state) {
6326 case ATH12K_SCAN_IDLE:
6327 case ATH12K_SCAN_RUNNING:
6328 case ATH12K_SCAN_ABORTING:
6329 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n",
6330 ath12k_scan_state_str(ar->scan.state),
6331 ar->scan.state);
6332 break;
6333 case ATH12K_SCAN_STARTING:
6334 ar->scan.state = ATH12K_SCAN_RUNNING;
6335
6336 if (ar->scan.is_roc)
6337 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar));
6338
6339 complete(&ar->scan.started);
6340 break;
6341 }
6342 }
6343
ath12k_wmi_event_scan_start_failed(struct ath12k * ar)6344 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar)
6345 {
6346 lockdep_assert_held(&ar->data_lock);
6347
6348 switch (ar->scan.state) {
6349 case ATH12K_SCAN_IDLE:
6350 case ATH12K_SCAN_RUNNING:
6351 case ATH12K_SCAN_ABORTING:
6352 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n",
6353 ath12k_scan_state_str(ar->scan.state),
6354 ar->scan.state);
6355 break;
6356 case ATH12K_SCAN_STARTING:
6357 complete(&ar->scan.started);
6358 __ath12k_mac_scan_finish(ar);
6359 break;
6360 }
6361 }
6362
ath12k_wmi_event_scan_completed(struct ath12k * ar)6363 static void ath12k_wmi_event_scan_completed(struct ath12k *ar)
6364 {
6365 lockdep_assert_held(&ar->data_lock);
6366
6367 switch (ar->scan.state) {
6368 case ATH12K_SCAN_IDLE:
6369 case ATH12K_SCAN_STARTING:
6370 /* One suspected reason scan can be completed while starting is
6371 * if firmware fails to deliver all scan events to the host,
6372 * e.g. when transport pipe is full. This has been observed
6373 * with spectral scan phyerr events starving wmi transport
6374 * pipe. In such case the "scan completed" event should be (and
6375 * is) ignored by the host as it may be just firmware's scan
6376 * state machine recovering.
6377 */
6378 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n",
6379 ath12k_scan_state_str(ar->scan.state),
6380 ar->scan.state);
6381 break;
6382 case ATH12K_SCAN_RUNNING:
6383 case ATH12K_SCAN_ABORTING:
6384 __ath12k_mac_scan_finish(ar);
6385 break;
6386 }
6387 }
6388
ath12k_wmi_event_scan_bss_chan(struct ath12k * ar)6389 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar)
6390 {
6391 lockdep_assert_held(&ar->data_lock);
6392
6393 switch (ar->scan.state) {
6394 case ATH12K_SCAN_IDLE:
6395 case ATH12K_SCAN_STARTING:
6396 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n",
6397 ath12k_scan_state_str(ar->scan.state),
6398 ar->scan.state);
6399 break;
6400 case ATH12K_SCAN_RUNNING:
6401 case ATH12K_SCAN_ABORTING:
6402 ar->scan_channel = NULL;
6403 break;
6404 }
6405 }
6406
ath12k_wmi_event_scan_foreign_chan(struct ath12k * ar,u32 freq)6407 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq)
6408 {
6409 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
6410
6411 lockdep_assert_held(&ar->data_lock);
6412
6413 switch (ar->scan.state) {
6414 case ATH12K_SCAN_IDLE:
6415 case ATH12K_SCAN_STARTING:
6416 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
6417 ath12k_scan_state_str(ar->scan.state),
6418 ar->scan.state);
6419 break;
6420 case ATH12K_SCAN_RUNNING:
6421 case ATH12K_SCAN_ABORTING:
6422 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq);
6423
6424 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
6425 complete(&ar->scan.on_channel);
6426
6427 break;
6428 }
6429 }
6430
6431 static const char *
ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)6432 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
6433 enum wmi_scan_completion_reason reason)
6434 {
6435 switch (type) {
6436 case WMI_SCAN_EVENT_STARTED:
6437 return "started";
6438 case WMI_SCAN_EVENT_COMPLETED:
6439 switch (reason) {
6440 case WMI_SCAN_REASON_COMPLETED:
6441 return "completed";
6442 case WMI_SCAN_REASON_CANCELLED:
6443 return "completed [cancelled]";
6444 case WMI_SCAN_REASON_PREEMPTED:
6445 return "completed [preempted]";
6446 case WMI_SCAN_REASON_TIMEDOUT:
6447 return "completed [timedout]";
6448 case WMI_SCAN_REASON_INTERNAL_FAILURE:
6449 return "completed [internal err]";
6450 case WMI_SCAN_REASON_MAX:
6451 break;
6452 }
6453 return "completed [unknown]";
6454 case WMI_SCAN_EVENT_BSS_CHANNEL:
6455 return "bss channel";
6456 case WMI_SCAN_EVENT_FOREIGN_CHAN:
6457 return "foreign channel";
6458 case WMI_SCAN_EVENT_DEQUEUED:
6459 return "dequeued";
6460 case WMI_SCAN_EVENT_PREEMPTED:
6461 return "preempted";
6462 case WMI_SCAN_EVENT_START_FAILED:
6463 return "start failed";
6464 case WMI_SCAN_EVENT_RESTARTED:
6465 return "restarted";
6466 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
6467 return "foreign channel exit";
6468 default:
6469 return "unknown";
6470 }
6471 }
6472
ath12k_pull_scan_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_scan_event * scan_evt_param)6473 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb,
6474 struct wmi_scan_event *scan_evt_param)
6475 {
6476 const void **tb;
6477 const struct wmi_scan_event *ev;
6478 int ret;
6479
6480 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6481 if (IS_ERR(tb)) {
6482 ret = PTR_ERR(tb);
6483 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6484 return ret;
6485 }
6486
6487 ev = tb[WMI_TAG_SCAN_EVENT];
6488 if (!ev) {
6489 ath12k_warn(ab, "failed to fetch scan ev");
6490 kfree(tb);
6491 return -EPROTO;
6492 }
6493
6494 scan_evt_param->event_type = ev->event_type;
6495 scan_evt_param->reason = ev->reason;
6496 scan_evt_param->channel_freq = ev->channel_freq;
6497 scan_evt_param->scan_req_id = ev->scan_req_id;
6498 scan_evt_param->scan_id = ev->scan_id;
6499 scan_evt_param->vdev_id = ev->vdev_id;
6500 scan_evt_param->tsf_timestamp = ev->tsf_timestamp;
6501
6502 kfree(tb);
6503 return 0;
6504 }
6505
ath12k_pull_peer_sta_kickout_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_sta_kickout_arg * arg)6506 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb,
6507 struct wmi_peer_sta_kickout_arg *arg)
6508 {
6509 const void **tb;
6510 const struct wmi_peer_sta_kickout_event *ev;
6511 int ret;
6512
6513 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6514 if (IS_ERR(tb)) {
6515 ret = PTR_ERR(tb);
6516 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6517 return ret;
6518 }
6519
6520 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT];
6521 if (!ev) {
6522 ath12k_warn(ab, "failed to fetch peer sta kickout ev");
6523 kfree(tb);
6524 return -EPROTO;
6525 }
6526
6527 arg->mac_addr = ev->peer_macaddr.addr;
6528 arg->reason = le32_to_cpu(ev->reason);
6529 arg->rssi = le32_to_cpu(ev->rssi);
6530
6531 kfree(tb);
6532 return 0;
6533 }
6534
ath12k_pull_roam_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_roam_event * roam_ev)6535 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb,
6536 struct wmi_roam_event *roam_ev)
6537 {
6538 const void **tb;
6539 const struct wmi_roam_event *ev;
6540 int ret;
6541
6542 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6543 if (IS_ERR(tb)) {
6544 ret = PTR_ERR(tb);
6545 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6546 return ret;
6547 }
6548
6549 ev = tb[WMI_TAG_ROAM_EVENT];
6550 if (!ev) {
6551 ath12k_warn(ab, "failed to fetch roam ev");
6552 kfree(tb);
6553 return -EPROTO;
6554 }
6555
6556 roam_ev->vdev_id = ev->vdev_id;
6557 roam_ev->reason = ev->reason;
6558 roam_ev->rssi = ev->rssi;
6559
6560 kfree(tb);
6561 return 0;
6562 }
6563
freq_to_idx(struct ath12k * ar,int freq)6564 static int freq_to_idx(struct ath12k *ar, int freq)
6565 {
6566 struct ieee80211_supported_band *sband;
6567 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
6568 int band, ch, idx = 0;
6569
6570 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
6571 if (!ar->mac.sbands[band].channels)
6572 continue;
6573
6574 sband = hw->wiphy->bands[band];
6575 if (!sband)
6576 continue;
6577
6578 for (ch = 0; ch < sband->n_channels; ch++, idx++)
6579 if (sband->channels[ch].center_freq == freq)
6580 goto exit;
6581 }
6582
6583 exit:
6584 return idx;
6585 }
6586
ath12k_pull_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_chan_info_event * ch_info_ev)6587 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6588 struct wmi_chan_info_event *ch_info_ev)
6589 {
6590 const void **tb;
6591 const struct wmi_chan_info_event *ev;
6592 int ret;
6593
6594 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6595 if (IS_ERR(tb)) {
6596 ret = PTR_ERR(tb);
6597 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6598 return ret;
6599 }
6600
6601 ev = tb[WMI_TAG_CHAN_INFO_EVENT];
6602 if (!ev) {
6603 ath12k_warn(ab, "failed to fetch chan info ev");
6604 kfree(tb);
6605 return -EPROTO;
6606 }
6607
6608 ch_info_ev->err_code = ev->err_code;
6609 ch_info_ev->freq = ev->freq;
6610 ch_info_ev->cmd_flags = ev->cmd_flags;
6611 ch_info_ev->noise_floor = ev->noise_floor;
6612 ch_info_ev->rx_clear_count = ev->rx_clear_count;
6613 ch_info_ev->cycle_count = ev->cycle_count;
6614 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range;
6615 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
6616 ch_info_ev->rx_frame_count = ev->rx_frame_count;
6617 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt;
6618 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz;
6619 ch_info_ev->vdev_id = ev->vdev_id;
6620
6621 kfree(tb);
6622 return 0;
6623 }
6624
6625 static int
ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_pdev_bss_chan_info_event * bss_ch_info_ev)6626 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6627 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev)
6628 {
6629 const void **tb;
6630 const struct wmi_pdev_bss_chan_info_event *ev;
6631 int ret;
6632
6633 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6634 if (IS_ERR(tb)) {
6635 ret = PTR_ERR(tb);
6636 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6637 return ret;
6638 }
6639
6640 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT];
6641 if (!ev) {
6642 ath12k_warn(ab, "failed to fetch pdev bss chan info ev");
6643 kfree(tb);
6644 return -EPROTO;
6645 }
6646
6647 bss_ch_info_ev->pdev_id = ev->pdev_id;
6648 bss_ch_info_ev->freq = ev->freq;
6649 bss_ch_info_ev->noise_floor = ev->noise_floor;
6650 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low;
6651 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high;
6652 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low;
6653 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high;
6654 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low;
6655 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high;
6656 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low;
6657 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high;
6658 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low;
6659 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high;
6660
6661 kfree(tb);
6662 return 0;
6663 }
6664
6665 static int
ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_install_key_complete_arg * arg)6666 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb,
6667 struct wmi_vdev_install_key_complete_arg *arg)
6668 {
6669 const void **tb;
6670 const struct wmi_vdev_install_key_compl_event *ev;
6671 int ret;
6672
6673 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6674 if (IS_ERR(tb)) {
6675 ret = PTR_ERR(tb);
6676 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6677 return ret;
6678 }
6679
6680 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT];
6681 if (!ev) {
6682 ath12k_warn(ab, "failed to fetch vdev install key compl ev");
6683 kfree(tb);
6684 return -EPROTO;
6685 }
6686
6687 arg->vdev_id = le32_to_cpu(ev->vdev_id);
6688 arg->macaddr = ev->peer_macaddr.addr;
6689 arg->key_idx = le32_to_cpu(ev->key_idx);
6690 arg->key_flags = le32_to_cpu(ev->key_flags);
6691 arg->status = le32_to_cpu(ev->status);
6692
6693 kfree(tb);
6694 return 0;
6695 }
6696
ath12k_pull_peer_assoc_conf_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_assoc_conf_arg * peer_assoc_conf)6697 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb,
6698 struct wmi_peer_assoc_conf_arg *peer_assoc_conf)
6699 {
6700 const void **tb;
6701 const struct wmi_peer_assoc_conf_event *ev;
6702 int ret;
6703
6704 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6705 if (IS_ERR(tb)) {
6706 ret = PTR_ERR(tb);
6707 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6708 return ret;
6709 }
6710
6711 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT];
6712 if (!ev) {
6713 ath12k_warn(ab, "failed to fetch peer assoc conf ev");
6714 kfree(tb);
6715 return -EPROTO;
6716 }
6717
6718 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id);
6719 peer_assoc_conf->macaddr = ev->peer_macaddr.addr;
6720
6721 kfree(tb);
6722 return 0;
6723 }
6724
6725 static int
ath12k_pull_pdev_temp_ev(struct ath12k_base * ab,struct sk_buff * skb,const struct wmi_pdev_temperature_event * ev)6726 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb,
6727 const struct wmi_pdev_temperature_event *ev)
6728 {
6729 const void **tb;
6730 int ret;
6731
6732 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6733 if (IS_ERR(tb)) {
6734 ret = PTR_ERR(tb);
6735 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6736 return ret;
6737 }
6738
6739 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
6740 if (!ev) {
6741 ath12k_warn(ab, "failed to fetch pdev temp ev");
6742 kfree(tb);
6743 return -EPROTO;
6744 }
6745
6746 kfree(tb);
6747 return 0;
6748 }
6749
ath12k_wmi_op_ep_tx_credits(struct ath12k_base * ab)6750 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab)
6751 {
6752 /* try to send pending beacons first. they take priority */
6753 wake_up(&ab->wmi_ab.tx_credits_wq);
6754 }
6755
ath12k_reg_11d_new_cc_event(struct ath12k_base * ab,struct sk_buff * skb)6756 static int ath12k_reg_11d_new_cc_event(struct ath12k_base *ab, struct sk_buff *skb)
6757 {
6758 const struct wmi_11d_new_cc_event *ev;
6759 struct ath12k *ar;
6760 struct ath12k_pdev *pdev;
6761 const void **tb;
6762 int ret, i;
6763
6764 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6765 if (IS_ERR(tb)) {
6766 ret = PTR_ERR(tb);
6767 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6768 return ret;
6769 }
6770
6771 ev = tb[WMI_TAG_11D_NEW_COUNTRY_EVENT];
6772 if (!ev) {
6773 kfree(tb);
6774 ath12k_warn(ab, "failed to fetch 11d new cc ev");
6775 return -EPROTO;
6776 }
6777
6778 spin_lock_bh(&ab->base_lock);
6779 memcpy(&ab->new_alpha2, &ev->new_alpha2, REG_ALPHA2_LEN);
6780 spin_unlock_bh(&ab->base_lock);
6781
6782 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi 11d new cc %c%c\n",
6783 ab->new_alpha2[0],
6784 ab->new_alpha2[1]);
6785
6786 kfree(tb);
6787
6788 for (i = 0; i < ab->num_radios; i++) {
6789 pdev = &ab->pdevs[i];
6790 ar = pdev->ar;
6791 ar->state_11d = ATH12K_11D_IDLE;
6792 ar->ah->regd_updated = false;
6793 complete(&ar->completed_11d_scan);
6794 }
6795
6796 queue_work(ab->workqueue, &ab->update_11d_work);
6797
6798 return 0;
6799 }
6800
ath12k_wmi_htc_tx_complete(struct ath12k_base * ab,struct sk_buff * skb)6801 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
6802 struct sk_buff *skb)
6803 {
6804 dev_kfree_skb(skb);
6805 }
6806
ath12k_reg_chan_list_event(struct ath12k_base * ab,struct sk_buff * skb)6807 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb)
6808 {
6809 struct ath12k_reg_info *reg_info;
6810 struct ath12k *ar = NULL;
6811 u8 pdev_idx = 255;
6812 int ret;
6813
6814 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC);
6815 if (!reg_info) {
6816 ret = -ENOMEM;
6817 goto fallback;
6818 }
6819
6820 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
6821 if (ret) {
6822 ath12k_warn(ab, "failed to extract regulatory info from received event\n");
6823 goto mem_free;
6824 }
6825
6826 ret = ath12k_reg_validate_reg_info(ab, reg_info);
6827 if (ret == ATH12K_REG_STATUS_FALLBACK) {
6828 ath12k_warn(ab, "failed to validate reg info %d\n", ret);
6829 /* firmware has successfully switches to new regd but host can not
6830 * continue, so free reginfo and fallback to old regd
6831 */
6832 goto mem_free;
6833 } else if (ret == ATH12K_REG_STATUS_DROP) {
6834 /* reg info is valid but we will not store it and
6835 * not going to create new regd for it
6836 */
6837 ret = ATH12K_REG_STATUS_VALID;
6838 goto mem_free;
6839 }
6840
6841 /* free old reg_info if it exist */
6842 pdev_idx = reg_info->phy_id;
6843 if (ab->reg_info[pdev_idx]) {
6844 ath12k_reg_reset_reg_info(ab->reg_info[pdev_idx]);
6845 kfree(ab->reg_info[pdev_idx]);
6846 }
6847 /* reg_info is valid, we store it for later use
6848 * even below regd build failed
6849 */
6850 ab->reg_info[pdev_idx] = reg_info;
6851
6852 ret = ath12k_reg_handle_chan_list(ab, reg_info, WMI_VDEV_TYPE_UNSPEC,
6853 IEEE80211_REG_UNSET_AP);
6854 if (ret) {
6855 ath12k_warn(ab, "failed to handle chan list %d\n", ret);
6856 goto fallback;
6857 }
6858
6859 goto out;
6860
6861 mem_free:
6862 ath12k_reg_reset_reg_info(reg_info);
6863 kfree(reg_info);
6864
6865 if (ret == ATH12K_REG_STATUS_VALID)
6866 goto out;
6867
6868 fallback:
6869 /* Fallback to older reg (by sending previous country setting
6870 * again if fw has succeeded and we failed to process here.
6871 * The Regdomain should be uniform across driver and fw. Since the
6872 * FW has processed the command and sent a success status, we expect
6873 * this function to succeed as well. If it doesn't, CTRY needs to be
6874 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent.
6875 */
6876 /* TODO: This is rare, but still should also be handled */
6877 WARN_ON(1);
6878
6879 out:
6880 /* In some error cases, even a valid pdev_idx might not be available */
6881 if (pdev_idx != 255)
6882 ar = ab->pdevs[pdev_idx].ar;
6883
6884 /* During the boot-time update, 'ar' might not be allocated,
6885 * so the completion cannot be marked at that point.
6886 * This boot-time update is handled in ath12k_mac_hw_register()
6887 * before registering the hardware.
6888 */
6889 if (ar)
6890 complete_all(&ar->regd_update_completed);
6891
6892 return ret;
6893 }
6894
ath12k_wmi_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6895 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
6896 const void *ptr, void *data)
6897 {
6898 struct ath12k_wmi_rdy_parse *rdy_parse = data;
6899 struct wmi_ready_event fixed_param;
6900 struct ath12k_wmi_mac_addr_params *addr_list;
6901 struct ath12k_pdev *pdev;
6902 u32 num_mac_addr;
6903 int i;
6904
6905 switch (tag) {
6906 case WMI_TAG_READY_EVENT:
6907 memset(&fixed_param, 0, sizeof(fixed_param));
6908 memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
6909 min_t(u16, sizeof(fixed_param), len));
6910 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status);
6911 rdy_parse->num_extra_mac_addr =
6912 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr);
6913
6914 ether_addr_copy(ab->mac_addr,
6915 fixed_param.ready_event_min.mac_addr.addr);
6916 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum);
6917 ab->wmi_ready = true;
6918 break;
6919 case WMI_TAG_ARRAY_FIXED_STRUCT:
6920 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr;
6921 num_mac_addr = rdy_parse->num_extra_mac_addr;
6922
6923 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios))
6924 break;
6925
6926 for (i = 0; i < ab->num_radios; i++) {
6927 pdev = &ab->pdevs[i];
6928 ether_addr_copy(pdev->mac_addr, addr_list[i].addr);
6929 }
6930 ab->pdevs_macaddr_valid = true;
6931 break;
6932 default:
6933 break;
6934 }
6935
6936 return 0;
6937 }
6938
ath12k_ready_event(struct ath12k_base * ab,struct sk_buff * skb)6939 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
6940 {
6941 struct ath12k_wmi_rdy_parse rdy_parse = { };
6942 int ret;
6943
6944 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6945 ath12k_wmi_rdy_parse, &rdy_parse);
6946 if (ret) {
6947 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
6948 return ret;
6949 }
6950
6951 complete(&ab->wmi_ab.unified_ready);
6952 return 0;
6953 }
6954
ath12k_peer_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6955 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
6956 {
6957 struct wmi_peer_delete_resp_event peer_del_resp;
6958 struct ath12k *ar;
6959
6960 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) {
6961 ath12k_warn(ab, "failed to extract peer delete resp");
6962 return;
6963 }
6964
6965 rcu_read_lock();
6966 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id));
6967 if (!ar) {
6968 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d",
6969 peer_del_resp.vdev_id);
6970 rcu_read_unlock();
6971 return;
6972 }
6973
6974 complete(&ar->peer_delete_done);
6975 rcu_read_unlock();
6976 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n",
6977 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr);
6978 }
6979
ath12k_vdev_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)6980 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab,
6981 struct sk_buff *skb)
6982 {
6983 struct ath12k *ar;
6984 u32 vdev_id = 0;
6985
6986 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) {
6987 ath12k_warn(ab, "failed to extract vdev delete resp");
6988 return;
6989 }
6990
6991 rcu_read_lock();
6992 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
6993 if (!ar) {
6994 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d",
6995 vdev_id);
6996 rcu_read_unlock();
6997 return;
6998 }
6999
7000 complete(&ar->vdev_delete_done);
7001
7002 rcu_read_unlock();
7003
7004 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n",
7005 vdev_id);
7006 }
7007
ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)7008 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)
7009 {
7010 switch (vdev_resp_status) {
7011 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID:
7012 return "invalid vdev id";
7013 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED:
7014 return "not supported";
7015 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION:
7016 return "dfs violation";
7017 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN:
7018 return "invalid regdomain";
7019 default:
7020 return "unknown";
7021 }
7022 }
7023
ath12k_vdev_start_resp_event(struct ath12k_base * ab,struct sk_buff * skb)7024 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
7025 {
7026 struct wmi_vdev_start_resp_event vdev_start_resp;
7027 struct ath12k *ar;
7028 u32 status;
7029
7030 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) {
7031 ath12k_warn(ab, "failed to extract vdev start resp");
7032 return;
7033 }
7034
7035 rcu_read_lock();
7036 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id));
7037 if (!ar) {
7038 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d",
7039 vdev_start_resp.vdev_id);
7040 rcu_read_unlock();
7041 return;
7042 }
7043
7044 ar->last_wmi_vdev_start_status = 0;
7045
7046 status = le32_to_cpu(vdev_start_resp.status);
7047 if (WARN_ON_ONCE(status)) {
7048 ath12k_warn(ab, "vdev start resp error status %d (%s)\n",
7049 status, ath12k_wmi_vdev_resp_print(status));
7050 ar->last_wmi_vdev_start_status = status;
7051 }
7052
7053 ar->max_allowed_tx_power = (s8)le32_to_cpu(vdev_start_resp.max_allowed_tx_power);
7054
7055 complete(&ar->vdev_setup_done);
7056
7057 rcu_read_unlock();
7058
7059 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d",
7060 vdev_start_resp.vdev_id);
7061 }
7062
ath12k_bcn_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)7063 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb)
7064 {
7065 struct ath12k_link_vif *arvif;
7066 struct ath12k *ar;
7067 u32 vdev_id, tx_status;
7068
7069 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) {
7070 ath12k_warn(ab, "failed to extract bcn tx status");
7071 return;
7072 }
7073
7074 guard(rcu)();
7075
7076 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id);
7077 if (!arvif) {
7078 ath12k_warn(ab, "invalid vdev %u in bcn tx status\n",
7079 vdev_id);
7080 return;
7081 }
7082
7083 ar = arvif->ar;
7084 wiphy_work_queue(ath12k_ar_to_hw(ar)->wiphy, &arvif->bcn_tx_work);
7085 }
7086
ath12k_vdev_stopped_event(struct ath12k_base * ab,struct sk_buff * skb)7087 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb)
7088 {
7089 struct ath12k *ar;
7090 u32 vdev_id = 0;
7091
7092 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) {
7093 ath12k_warn(ab, "failed to extract vdev stopped event");
7094 return;
7095 }
7096
7097 rcu_read_lock();
7098 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7099 if (!ar) {
7100 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d",
7101 vdev_id);
7102 rcu_read_unlock();
7103 return;
7104 }
7105
7106 complete(&ar->vdev_setup_done);
7107
7108 rcu_read_unlock();
7109
7110 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id);
7111 }
7112
ath12k_mgmt_rx_event(struct ath12k_base * ab,struct sk_buff * skb)7113 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
7114 {
7115 struct ath12k_wmi_mgmt_rx_arg rx_ev = {};
7116 struct ath12k *ar;
7117 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
7118 struct ieee80211_hdr *hdr;
7119 u16 fc;
7120 struct ieee80211_supported_band *sband;
7121 s32 noise_floor;
7122
7123 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
7124 ath12k_warn(ab, "failed to extract mgmt rx event");
7125 dev_kfree_skb(skb);
7126 return;
7127 }
7128
7129 memset(status, 0, sizeof(*status));
7130
7131 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n",
7132 rx_ev.status);
7133
7134 rcu_read_lock();
7135 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id);
7136
7137 if (!ar) {
7138 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n",
7139 rx_ev.pdev_id);
7140 dev_kfree_skb(skb);
7141 goto exit;
7142 }
7143
7144 if ((test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) ||
7145 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT |
7146 WMI_RX_STATUS_ERR_KEY_CACHE_MISS |
7147 WMI_RX_STATUS_ERR_CRC))) {
7148 dev_kfree_skb(skb);
7149 goto exit;
7150 }
7151
7152 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC)
7153 status->flag |= RX_FLAG_MMIC_ERROR;
7154
7155 if (rx_ev.chan_freq >= ATH12K_MIN_6GHZ_FREQ &&
7156 rx_ev.chan_freq <= ATH12K_MAX_6GHZ_FREQ) {
7157 status->band = NL80211_BAND_6GHZ;
7158 status->freq = rx_ev.chan_freq;
7159 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) {
7160 status->band = NL80211_BAND_2GHZ;
7161 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5GHZ_CHAN) {
7162 status->band = NL80211_BAND_5GHZ;
7163 } else {
7164 /* Shouldn't happen unless list of advertised channels to
7165 * mac80211 has been changed.
7166 */
7167 WARN_ON_ONCE(1);
7168 dev_kfree_skb(skb);
7169 goto exit;
7170 }
7171
7172 if (rx_ev.phy_mode == MODE_11B &&
7173 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ))
7174 ath12k_dbg(ab, ATH12K_DBG_WMI,
7175 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band);
7176
7177 sband = &ar->mac.sbands[status->band];
7178
7179 if (status->band != NL80211_BAND_6GHZ)
7180 status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
7181 status->band);
7182
7183 spin_lock_bh(&ar->data_lock);
7184 noise_floor = ath12k_pdev_get_noise_floor(ar);
7185 spin_unlock_bh(&ar->data_lock);
7186
7187 status->signal = rx_ev.snr + noise_floor;
7188 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
7189
7190 hdr = (struct ieee80211_hdr *)skb->data;
7191 fc = le16_to_cpu(hdr->frame_control);
7192
7193 /* Firmware is guaranteed to report all essential management frames via
7194 * WMI while it can deliver some extra via HTT. Since there can be
7195 * duplicates split the reporting wrt monitor/sniffing.
7196 */
7197 status->flag |= RX_FLAG_SKIP_MONITOR;
7198
7199 /* In case of PMF, FW delivers decrypted frames with Protected Bit set
7200 * including group privacy action frames.
7201 */
7202 if (ieee80211_has_protected(hdr->frame_control)) {
7203 status->flag |= RX_FLAG_DECRYPTED;
7204
7205 if (!ieee80211_is_robust_mgmt_frame(skb)) {
7206 status->flag |= RX_FLAG_IV_STRIPPED |
7207 RX_FLAG_MMIC_STRIPPED;
7208 hdr->frame_control = __cpu_to_le16(fc &
7209 ~IEEE80211_FCTL_PROTECTED);
7210 }
7211 }
7212
7213 if (ieee80211_is_beacon(hdr->frame_control))
7214 ath12k_mac_handle_beacon(ar, skb);
7215
7216 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7217 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
7218 skb, skb->len,
7219 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
7220
7221 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7222 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
7223 status->freq, status->band, status->signal,
7224 status->rate_idx);
7225
7226 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb);
7227
7228 exit:
7229 rcu_read_unlock();
7230 }
7231
ath12k_mgmt_tx_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7232 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
7233 {
7234 struct wmi_mgmt_tx_compl_event tx_compl_param = {};
7235 struct ath12k *ar;
7236
7237 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
7238 ath12k_warn(ab, "failed to extract mgmt tx compl event");
7239 return;
7240 }
7241
7242 rcu_read_lock();
7243 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id));
7244 if (!ar) {
7245 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n",
7246 tx_compl_param.pdev_id);
7247 goto exit;
7248 }
7249
7250 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
7251 le32_to_cpu(tx_compl_param.status),
7252 le32_to_cpu(tx_compl_param.ack_rssi));
7253
7254 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7255 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
7256 tx_compl_param.pdev_id, tx_compl_param.desc_id,
7257 tx_compl_param.status);
7258
7259 exit:
7260 rcu_read_unlock();
7261 }
7262
ath12k_get_ar_on_scan_state(struct ath12k_base * ab,u32 vdev_id,enum ath12k_scan_state state)7263 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab,
7264 u32 vdev_id,
7265 enum ath12k_scan_state state)
7266 {
7267 int i;
7268 struct ath12k_pdev *pdev;
7269 struct ath12k *ar;
7270
7271 for (i = 0; i < ab->num_radios; i++) {
7272 pdev = rcu_dereference(ab->pdevs_active[i]);
7273 if (pdev && pdev->ar) {
7274 ar = pdev->ar;
7275
7276 spin_lock_bh(&ar->data_lock);
7277 if (ar->scan.state == state &&
7278 ar->scan.arvif &&
7279 ar->scan.arvif->vdev_id == vdev_id) {
7280 spin_unlock_bh(&ar->data_lock);
7281 return ar;
7282 }
7283 spin_unlock_bh(&ar->data_lock);
7284 }
7285 }
7286 return NULL;
7287 }
7288
ath12k_scan_event(struct ath12k_base * ab,struct sk_buff * skb)7289 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
7290 {
7291 struct ath12k *ar;
7292 struct wmi_scan_event scan_ev = {};
7293
7294 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
7295 ath12k_warn(ab, "failed to extract scan event");
7296 return;
7297 }
7298
7299 rcu_read_lock();
7300
7301 /* In case the scan was cancelled, ex. during interface teardown,
7302 * the interface will not be found in active interfaces.
7303 * Rather, in such scenarios, iterate over the active pdev's to
7304 * search 'ar' if the corresponding 'ar' scan is ABORTING and the
7305 * aborting scan's vdev id matches this event info.
7306 */
7307 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED &&
7308 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) {
7309 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7310 ATH12K_SCAN_ABORTING);
7311 if (!ar)
7312 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7313 ATH12K_SCAN_RUNNING);
7314 } else {
7315 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id));
7316 }
7317
7318 if (!ar) {
7319 ath12k_warn(ab, "Received scan event for unknown vdev");
7320 rcu_read_unlock();
7321 return;
7322 }
7323
7324 spin_lock_bh(&ar->data_lock);
7325
7326 ath12k_dbg(ab, ATH12K_DBG_WMI,
7327 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
7328 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type),
7329 le32_to_cpu(scan_ev.reason)),
7330 le32_to_cpu(scan_ev.event_type),
7331 le32_to_cpu(scan_ev.reason),
7332 le32_to_cpu(scan_ev.channel_freq),
7333 le32_to_cpu(scan_ev.scan_req_id),
7334 le32_to_cpu(scan_ev.scan_id),
7335 le32_to_cpu(scan_ev.vdev_id),
7336 ath12k_scan_state_str(ar->scan.state), ar->scan.state);
7337
7338 switch (le32_to_cpu(scan_ev.event_type)) {
7339 case WMI_SCAN_EVENT_STARTED:
7340 ath12k_wmi_event_scan_started(ar);
7341 break;
7342 case WMI_SCAN_EVENT_COMPLETED:
7343 ath12k_wmi_event_scan_completed(ar);
7344 break;
7345 case WMI_SCAN_EVENT_BSS_CHANNEL:
7346 ath12k_wmi_event_scan_bss_chan(ar);
7347 break;
7348 case WMI_SCAN_EVENT_FOREIGN_CHAN:
7349 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq));
7350 break;
7351 case WMI_SCAN_EVENT_START_FAILED:
7352 ath12k_warn(ab, "received scan start failure event\n");
7353 ath12k_wmi_event_scan_start_failed(ar);
7354 break;
7355 case WMI_SCAN_EVENT_DEQUEUED:
7356 __ath12k_mac_scan_finish(ar);
7357 break;
7358 case WMI_SCAN_EVENT_PREEMPTED:
7359 case WMI_SCAN_EVENT_RESTARTED:
7360 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
7361 default:
7362 break;
7363 }
7364
7365 spin_unlock_bh(&ar->data_lock);
7366
7367 rcu_read_unlock();
7368 }
7369
ath12k_peer_sta_kickout_event(struct ath12k_base * ab,struct sk_buff * skb)7370 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb)
7371 {
7372 struct wmi_peer_sta_kickout_arg arg = {};
7373 struct ath12k_link_vif *arvif;
7374 struct ieee80211_sta *sta;
7375 struct ath12k_peer *peer;
7376 unsigned int link_id;
7377 struct ath12k *ar;
7378
7379 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
7380 ath12k_warn(ab, "failed to extract peer sta kickout event");
7381 return;
7382 }
7383
7384 rcu_read_lock();
7385
7386 spin_lock_bh(&ab->base_lock);
7387
7388 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr);
7389
7390 if (!peer) {
7391 ath12k_warn(ab, "peer not found %pM\n",
7392 arg.mac_addr);
7393 goto exit;
7394 }
7395
7396 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, peer->vdev_id);
7397 if (!arvif) {
7398 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d",
7399 peer->vdev_id);
7400 goto exit;
7401 }
7402
7403 ar = arvif->ar;
7404
7405 if (peer->mlo) {
7406 sta = ieee80211_find_sta_by_link_addrs(ath12k_ar_to_hw(ar),
7407 arg.mac_addr,
7408 NULL, &link_id);
7409 if (peer->link_id != link_id) {
7410 ath12k_warn(ab,
7411 "Spurious quick kickout for MLO STA %pM with invalid link_id, peer: %d, sta: %d\n",
7412 arg.mac_addr, peer->link_id, link_id);
7413 goto exit;
7414 }
7415 } else {
7416 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar),
7417 arg.mac_addr, NULL);
7418 }
7419 if (!sta) {
7420 ath12k_warn(ab, "Spurious quick kickout for %sSTA %pM\n",
7421 peer->mlo ? "MLO " : "", arg.mac_addr);
7422 goto exit;
7423 }
7424
7425 ath12k_dbg(ab, ATH12K_DBG_WMI,
7426 "peer sta kickout event %pM reason: %d rssi: %d\n",
7427 arg.mac_addr, arg.reason, arg.rssi);
7428
7429 switch (arg.reason) {
7430 case WMI_PEER_STA_KICKOUT_REASON_INACTIVITY:
7431 if (arvif->ahvif->vif->type == NL80211_IFTYPE_STATION) {
7432 ath12k_mac_handle_beacon_miss(ar, arvif);
7433 break;
7434 }
7435 fallthrough;
7436 default:
7437 ieee80211_report_low_ack(sta, 10);
7438 }
7439
7440 exit:
7441 spin_unlock_bh(&ab->base_lock);
7442 rcu_read_unlock();
7443 }
7444
ath12k_roam_event(struct ath12k_base * ab,struct sk_buff * skb)7445 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
7446 {
7447 struct ath12k_link_vif *arvif;
7448 struct wmi_roam_event roam_ev = {};
7449 struct ath12k *ar;
7450 u32 vdev_id;
7451 u8 roam_reason;
7452
7453 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) {
7454 ath12k_warn(ab, "failed to extract roam event");
7455 return;
7456 }
7457
7458 vdev_id = le32_to_cpu(roam_ev.vdev_id);
7459 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason),
7460 WMI_ROAM_REASON_MASK);
7461
7462 ath12k_dbg(ab, ATH12K_DBG_WMI,
7463 "wmi roam event vdev %u reason %d rssi %d\n",
7464 vdev_id, roam_reason, roam_ev.rssi);
7465
7466 guard(rcu)();
7467 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id);
7468 if (!arvif) {
7469 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id);
7470 return;
7471 }
7472
7473 ar = arvif->ar;
7474
7475 if (roam_reason >= WMI_ROAM_REASON_MAX)
7476 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n",
7477 roam_reason, vdev_id);
7478
7479 switch (roam_reason) {
7480 case WMI_ROAM_REASON_BEACON_MISS:
7481 ath12k_mac_handle_beacon_miss(ar, arvif);
7482 break;
7483 case WMI_ROAM_REASON_BETTER_AP:
7484 case WMI_ROAM_REASON_LOW_RSSI:
7485 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
7486 case WMI_ROAM_REASON_HO_FAILED:
7487 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n",
7488 roam_reason, vdev_id);
7489 break;
7490 }
7491 }
7492
ath12k_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7493 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7494 {
7495 struct wmi_chan_info_event ch_info_ev = {};
7496 struct ath12k *ar;
7497 struct survey_info *survey;
7498 int idx;
7499 /* HW channel counters frequency value in hertz */
7500 u32 cc_freq_hz = ab->cc_freq_hz;
7501
7502 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) {
7503 ath12k_warn(ab, "failed to extract chan info event");
7504 return;
7505 }
7506
7507 ath12k_dbg(ab, ATH12K_DBG_WMI,
7508 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n",
7509 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq,
7510 ch_info_ev.cmd_flags, ch_info_ev.noise_floor,
7511 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count,
7512 ch_info_ev.mac_clk_mhz);
7513
7514 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) {
7515 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n");
7516 return;
7517 }
7518
7519 rcu_read_lock();
7520 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id));
7521 if (!ar) {
7522 ath12k_warn(ab, "invalid vdev id in chan info ev %d",
7523 ch_info_ev.vdev_id);
7524 rcu_read_unlock();
7525 return;
7526 }
7527 spin_lock_bh(&ar->data_lock);
7528
7529 switch (ar->scan.state) {
7530 case ATH12K_SCAN_IDLE:
7531 case ATH12K_SCAN_STARTING:
7532 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n");
7533 goto exit;
7534 case ATH12K_SCAN_RUNNING:
7535 case ATH12K_SCAN_ABORTING:
7536 break;
7537 }
7538
7539 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq));
7540 if (idx >= ARRAY_SIZE(ar->survey)) {
7541 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n",
7542 ch_info_ev.freq, idx);
7543 goto exit;
7544 }
7545
7546 /* If FW provides MAC clock frequency in Mhz, overriding the initialized
7547 * HW channel counters frequency value
7548 */
7549 if (ch_info_ev.mac_clk_mhz)
7550 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000);
7551
7552 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) {
7553 survey = &ar->survey[idx];
7554 memset(survey, 0, sizeof(*survey));
7555 survey->noise = le32_to_cpu(ch_info_ev.noise_floor);
7556 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
7557 SURVEY_INFO_TIME_BUSY;
7558 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz);
7559 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count),
7560 cc_freq_hz);
7561 }
7562 exit:
7563 spin_unlock_bh(&ar->data_lock);
7564 rcu_read_unlock();
7565 }
7566
7567 static void
ath12k_pdev_bss_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7568 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7569 {
7570 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {};
7571 struct survey_info *survey;
7572 struct ath12k *ar;
7573 u32 cc_freq_hz = ab->cc_freq_hz;
7574 u64 busy, total, tx, rx, rx_bss;
7575 int idx;
7576
7577 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) {
7578 ath12k_warn(ab, "failed to extract pdev bss chan info event");
7579 return;
7580 }
7581
7582 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 |
7583 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low);
7584
7585 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 |
7586 le32_to_cpu(bss_ch_info_ev.cycle_count_low);
7587
7588 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 |
7589 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low);
7590
7591 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 |
7592 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low);
7593
7594 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 |
7595 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low);
7596
7597 ath12k_dbg(ab, ATH12K_DBG_WMI,
7598 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
7599 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
7600 bss_ch_info_ev.noise_floor, busy, total,
7601 tx, rx, rx_bss);
7602
7603 rcu_read_lock();
7604 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id));
7605
7606 if (!ar) {
7607 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n",
7608 bss_ch_info_ev.pdev_id);
7609 rcu_read_unlock();
7610 return;
7611 }
7612
7613 spin_lock_bh(&ar->data_lock);
7614 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq));
7615 if (idx >= ARRAY_SIZE(ar->survey)) {
7616 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
7617 bss_ch_info_ev.freq, idx);
7618 goto exit;
7619 }
7620
7621 survey = &ar->survey[idx];
7622
7623 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor);
7624 survey->time = div_u64(total, cc_freq_hz);
7625 survey->time_busy = div_u64(busy, cc_freq_hz);
7626 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
7627 survey->time_tx = div_u64(tx, cc_freq_hz);
7628 survey->filled |= (SURVEY_INFO_NOISE_DBM |
7629 SURVEY_INFO_TIME |
7630 SURVEY_INFO_TIME_BUSY |
7631 SURVEY_INFO_TIME_RX |
7632 SURVEY_INFO_TIME_TX);
7633 exit:
7634 spin_unlock_bh(&ar->data_lock);
7635 complete(&ar->bss_survey_done);
7636
7637 rcu_read_unlock();
7638 }
7639
ath12k_vdev_install_key_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7640 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
7641 struct sk_buff *skb)
7642 {
7643 struct wmi_vdev_install_key_complete_arg install_key_compl = {};
7644 struct ath12k *ar;
7645
7646 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
7647 ath12k_warn(ab, "failed to extract install key compl event");
7648 return;
7649 }
7650
7651 ath12k_dbg(ab, ATH12K_DBG_WMI,
7652 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n",
7653 install_key_compl.key_idx, install_key_compl.key_flags,
7654 install_key_compl.macaddr, install_key_compl.status);
7655
7656 rcu_read_lock();
7657 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id);
7658 if (!ar) {
7659 ath12k_warn(ab, "invalid vdev id in install key compl ev %d",
7660 install_key_compl.vdev_id);
7661 rcu_read_unlock();
7662 return;
7663 }
7664
7665 ar->install_key_status = 0;
7666
7667 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) {
7668 ath12k_warn(ab, "install key failed for %pM status %d\n",
7669 install_key_compl.macaddr, install_key_compl.status);
7670 ar->install_key_status = install_key_compl.status;
7671 }
7672
7673 complete(&ar->install_key_done);
7674 rcu_read_unlock();
7675 }
7676
ath12k_wmi_tlv_services_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)7677 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
7678 u16 tag, u16 len,
7679 const void *ptr,
7680 void *data)
7681 {
7682 const struct wmi_service_available_event *ev;
7683 u16 wmi_ext2_service_words;
7684 __le32 *wmi_ext2_service_bitmap;
7685 int i, j;
7686 u16 expected_len;
7687
7688 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32);
7689 if (len < expected_len) {
7690 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n",
7691 len, tag);
7692 return -EINVAL;
7693 }
7694
7695 switch (tag) {
7696 case WMI_TAG_SERVICE_AVAILABLE_EVENT:
7697 ev = (struct wmi_service_available_event *)ptr;
7698 for (i = 0, j = WMI_MAX_SERVICE;
7699 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE;
7700 i++) {
7701 do {
7702 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) &
7703 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
7704 set_bit(j, ab->wmi_ab.svc_map);
7705 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
7706 }
7707
7708 ath12k_dbg(ab, ATH12K_DBG_WMI,
7709 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x",
7710 ev->wmi_service_segment_bitmap[0],
7711 ev->wmi_service_segment_bitmap[1],
7712 ev->wmi_service_segment_bitmap[2],
7713 ev->wmi_service_segment_bitmap[3]);
7714 break;
7715 case WMI_TAG_ARRAY_UINT32:
7716 wmi_ext2_service_bitmap = (__le32 *)ptr;
7717 wmi_ext2_service_words = len / sizeof(u32);
7718 for (i = 0, j = WMI_MAX_EXT_SERVICE;
7719 i < wmi_ext2_service_words && j < WMI_MAX_EXT2_SERVICE;
7720 i++) {
7721 do {
7722 if (__le32_to_cpu(wmi_ext2_service_bitmap[i]) &
7723 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
7724 set_bit(j, ab->wmi_ab.svc_map);
7725 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
7726 ath12k_dbg(ab, ATH12K_DBG_WMI,
7727 "wmi_ext2_service bitmap 0x%08x\n",
7728 __le32_to_cpu(wmi_ext2_service_bitmap[i]));
7729 }
7730
7731 break;
7732 }
7733 return 0;
7734 }
7735
ath12k_service_available_event(struct ath12k_base * ab,struct sk_buff * skb)7736 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb)
7737 {
7738 int ret;
7739
7740 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
7741 ath12k_wmi_tlv_services_parser,
7742 NULL);
7743 return ret;
7744 }
7745
ath12k_peer_assoc_conf_event(struct ath12k_base * ab,struct sk_buff * skb)7746 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
7747 {
7748 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {};
7749 struct ath12k *ar;
7750
7751 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
7752 ath12k_warn(ab, "failed to extract peer assoc conf event");
7753 return;
7754 }
7755
7756 ath12k_dbg(ab, ATH12K_DBG_WMI,
7757 "peer assoc conf ev vdev id %d macaddr %pM\n",
7758 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
7759
7760 rcu_read_lock();
7761 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
7762
7763 if (!ar) {
7764 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
7765 peer_assoc_conf.vdev_id);
7766 rcu_read_unlock();
7767 return;
7768 }
7769
7770 complete(&ar->peer_assoc_done);
7771 rcu_read_unlock();
7772 }
7773
7774 static void
ath12k_wmi_fw_vdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)7775 ath12k_wmi_fw_vdev_stats_dump(struct ath12k *ar,
7776 struct ath12k_fw_stats *fw_stats,
7777 char *buf, u32 *length)
7778 {
7779 const struct ath12k_fw_stats_vdev *vdev;
7780 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7781 struct ath12k_link_vif *arvif;
7782 u32 len = *length;
7783 u8 *vif_macaddr;
7784 int i;
7785
7786 len += scnprintf(buf + len, buf_len - len, "\n");
7787 len += scnprintf(buf + len, buf_len - len, "%30s\n",
7788 "ath12k VDEV stats");
7789 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7790 "=================");
7791
7792 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7793 arvif = ath12k_mac_get_arvif(ar, vdev->vdev_id);
7794 if (!arvif)
7795 continue;
7796 vif_macaddr = arvif->ahvif->vif->addr;
7797
7798 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7799 "VDEV ID", vdev->vdev_id);
7800 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7801 "VDEV MAC address", vif_macaddr);
7802 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7803 "beacon snr", vdev->beacon_snr);
7804 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7805 "data snr", vdev->data_snr);
7806 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7807 "num rx frames", vdev->num_rx_frames);
7808 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7809 "num rts fail", vdev->num_rts_fail);
7810 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7811 "num rts success", vdev->num_rts_success);
7812 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7813 "num rx err", vdev->num_rx_err);
7814 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7815 "num rx discard", vdev->num_rx_discard);
7816 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7817 "num tx not acked", vdev->num_tx_not_acked);
7818
7819 for (i = 0 ; i < WLAN_MAX_AC; i++)
7820 len += scnprintf(buf + len, buf_len - len,
7821 "%25s [%02d] %u\n",
7822 "num tx frames", i,
7823 vdev->num_tx_frames[i]);
7824
7825 for (i = 0 ; i < WLAN_MAX_AC; i++)
7826 len += scnprintf(buf + len, buf_len - len,
7827 "%25s [%02d] %u\n",
7828 "num tx frames retries", i,
7829 vdev->num_tx_frames_retries[i]);
7830
7831 for (i = 0 ; i < WLAN_MAX_AC; i++)
7832 len += scnprintf(buf + len, buf_len - len,
7833 "%25s [%02d] %u\n",
7834 "num tx frames failures", i,
7835 vdev->num_tx_frames_failures[i]);
7836
7837 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
7838 len += scnprintf(buf + len, buf_len - len,
7839 "%25s [%02d] 0x%08x\n",
7840 "tx rate history", i,
7841 vdev->tx_rate_history[i]);
7842 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
7843 len += scnprintf(buf + len, buf_len - len,
7844 "%25s [%02d] %u\n",
7845 "beacon rssi history", i,
7846 vdev->beacon_rssi_history[i]);
7847
7848 len += scnprintf(buf + len, buf_len - len, "\n");
7849 *length = len;
7850 }
7851 }
7852
7853 static void
ath12k_wmi_fw_bcn_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)7854 ath12k_wmi_fw_bcn_stats_dump(struct ath12k *ar,
7855 struct ath12k_fw_stats *fw_stats,
7856 char *buf, u32 *length)
7857 {
7858 const struct ath12k_fw_stats_bcn *bcn;
7859 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7860 struct ath12k_link_vif *arvif;
7861 u32 len = *length;
7862 size_t num_bcn;
7863
7864 num_bcn = list_count_nodes(&fw_stats->bcn);
7865
7866 len += scnprintf(buf + len, buf_len - len, "\n");
7867 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7868 "ath12k Beacon stats", num_bcn);
7869 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7870 "===================");
7871
7872 list_for_each_entry(bcn, &fw_stats->bcn, list) {
7873 arvif = ath12k_mac_get_arvif(ar, bcn->vdev_id);
7874 if (!arvif)
7875 continue;
7876 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7877 "VDEV ID", bcn->vdev_id);
7878 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7879 "VDEV MAC address", arvif->ahvif->vif->addr);
7880 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7881 "================");
7882 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7883 "Num of beacon tx success", bcn->tx_bcn_succ_cnt);
7884 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7885 "Num of beacon tx failures", bcn->tx_bcn_outage_cnt);
7886
7887 len += scnprintf(buf + len, buf_len - len, "\n");
7888 *length = len;
7889 }
7890 }
7891
7892 static void
ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length,u64 fw_soc_drop_cnt)7893 ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
7894 char *buf, u32 *length, u64 fw_soc_drop_cnt)
7895 {
7896 u32 len = *length;
7897 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7898
7899 len = scnprintf(buf + len, buf_len - len, "\n");
7900 len += scnprintf(buf + len, buf_len - len, "%30s\n",
7901 "ath12k PDEV stats");
7902 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7903 "=================");
7904
7905 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7906 "Channel noise floor", pdev->ch_noise_floor);
7907 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7908 "Channel TX power", pdev->chan_tx_power);
7909 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7910 "TX frame count", pdev->tx_frame_count);
7911 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7912 "RX frame count", pdev->rx_frame_count);
7913 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7914 "RX clear count", pdev->rx_clear_count);
7915 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7916 "Cycle count", pdev->cycle_count);
7917 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7918 "PHY error count", pdev->phy_err_count);
7919 len += scnprintf(buf + len, buf_len - len, "%30s %10llu\n",
7920 "soc drop count", fw_soc_drop_cnt);
7921
7922 *length = len;
7923 }
7924
7925 static void
ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)7926 ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
7927 char *buf, u32 *length)
7928 {
7929 u32 len = *length;
7930 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7931
7932 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7933 "ath12k PDEV TX stats");
7934 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7935 "====================");
7936
7937 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7938 "HTT cookies queued", pdev->comp_queued);
7939 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7940 "HTT cookies disp.", pdev->comp_delivered);
7941 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7942 "MSDU queued", pdev->msdu_enqued);
7943 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7944 "MPDU queued", pdev->mpdu_enqued);
7945 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7946 "MSDUs dropped", pdev->wmm_drop);
7947 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7948 "Local enqued", pdev->local_enqued);
7949 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7950 "Local freed", pdev->local_freed);
7951 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7952 "HW queued", pdev->hw_queued);
7953 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7954 "PPDUs reaped", pdev->hw_reaped);
7955 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7956 "Num underruns", pdev->underrun);
7957 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7958 "PPDUs cleaned", pdev->tx_abort);
7959 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7960 "MPDUs requeued", pdev->mpdus_requed);
7961 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7962 "Excessive retries", pdev->tx_ko);
7963 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7964 "HW rate", pdev->data_rc);
7965 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7966 "Sched self triggers", pdev->self_triggers);
7967 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7968 "Dropped due to SW retries",
7969 pdev->sw_retry_failure);
7970 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7971 "Illegal rate phy errors",
7972 pdev->illgl_rate_phy_err);
7973 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7974 "PDEV continuous xretry", pdev->pdev_cont_xretry);
7975 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7976 "TX timeout", pdev->pdev_tx_timeout);
7977 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7978 "PDEV resets", pdev->pdev_resets);
7979 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7980 "Stateless TIDs alloc failures",
7981 pdev->stateless_tid_alloc_failure);
7982 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7983 "PHY underrun", pdev->phy_underrun);
7984 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7985 "MPDU is more than txop limit", pdev->txop_ovf);
7986 *length = len;
7987 }
7988
7989 static void
ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)7990 ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
7991 char *buf, u32 *length)
7992 {
7993 u32 len = *length;
7994 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7995
7996 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7997 "ath12k PDEV RX stats");
7998 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7999 "====================");
8000
8001 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8002 "Mid PPDU route change",
8003 pdev->mid_ppdu_route_change);
8004 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8005 "Tot. number of statuses", pdev->status_rcvd);
8006 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8007 "Extra frags on rings 0", pdev->r0_frags);
8008 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8009 "Extra frags on rings 1", pdev->r1_frags);
8010 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8011 "Extra frags on rings 2", pdev->r2_frags);
8012 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8013 "Extra frags on rings 3", pdev->r3_frags);
8014 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8015 "MSDUs delivered to HTT", pdev->htt_msdus);
8016 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8017 "MPDUs delivered to HTT", pdev->htt_mpdus);
8018 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8019 "MSDUs delivered to stack", pdev->loc_msdus);
8020 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8021 "MPDUs delivered to stack", pdev->loc_mpdus);
8022 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8023 "Oversized AMSUs", pdev->oversize_amsdu);
8024 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8025 "PHY errors", pdev->phy_errs);
8026 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8027 "PHY errors drops", pdev->phy_err_drop);
8028 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8029 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
8030 *length = len;
8031 }
8032
8033 static void
ath12k_wmi_fw_pdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)8034 ath12k_wmi_fw_pdev_stats_dump(struct ath12k *ar,
8035 struct ath12k_fw_stats *fw_stats,
8036 char *buf, u32 *length)
8037 {
8038 const struct ath12k_fw_stats_pdev *pdev;
8039 u32 len = *length;
8040
8041 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8042 struct ath12k_fw_stats_pdev, list);
8043 if (!pdev) {
8044 ath12k_warn(ar->ab, "failed to get pdev stats\n");
8045 return;
8046 }
8047
8048 ath12k_wmi_fw_pdev_base_stats_dump(pdev, buf, &len,
8049 ar->ab->fw_soc_drop_count);
8050 ath12k_wmi_fw_pdev_tx_stats_dump(pdev, buf, &len);
8051 ath12k_wmi_fw_pdev_rx_stats_dump(pdev, buf, &len);
8052
8053 *length = len;
8054 }
8055
ath12k_wmi_fw_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,u32 stats_id,char * buf)8056 void ath12k_wmi_fw_stats_dump(struct ath12k *ar,
8057 struct ath12k_fw_stats *fw_stats,
8058 u32 stats_id, char *buf)
8059 {
8060 u32 len = 0;
8061 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8062
8063 spin_lock_bh(&ar->data_lock);
8064
8065 switch (stats_id) {
8066 case WMI_REQUEST_VDEV_STAT:
8067 ath12k_wmi_fw_vdev_stats_dump(ar, fw_stats, buf, &len);
8068 break;
8069 case WMI_REQUEST_BCN_STAT:
8070 ath12k_wmi_fw_bcn_stats_dump(ar, fw_stats, buf, &len);
8071 break;
8072 case WMI_REQUEST_PDEV_STAT:
8073 ath12k_wmi_fw_pdev_stats_dump(ar, fw_stats, buf, &len);
8074 break;
8075 default:
8076 break;
8077 }
8078
8079 spin_unlock_bh(&ar->data_lock);
8080
8081 if (len >= buf_len)
8082 buf[len - 1] = 0;
8083 else
8084 buf[len] = 0;
8085 }
8086
8087 static void
ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params * src,struct ath12k_fw_stats_vdev * dst)8088 ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params *src,
8089 struct ath12k_fw_stats_vdev *dst)
8090 {
8091 int i;
8092
8093 dst->vdev_id = le32_to_cpu(src->vdev_id);
8094 dst->beacon_snr = le32_to_cpu(src->beacon_snr);
8095 dst->data_snr = le32_to_cpu(src->data_snr);
8096 dst->num_rx_frames = le32_to_cpu(src->num_rx_frames);
8097 dst->num_rts_fail = le32_to_cpu(src->num_rts_fail);
8098 dst->num_rts_success = le32_to_cpu(src->num_rts_success);
8099 dst->num_rx_err = le32_to_cpu(src->num_rx_err);
8100 dst->num_rx_discard = le32_to_cpu(src->num_rx_discard);
8101 dst->num_tx_not_acked = le32_to_cpu(src->num_tx_not_acked);
8102
8103 for (i = 0; i < WLAN_MAX_AC; i++)
8104 dst->num_tx_frames[i] =
8105 le32_to_cpu(src->num_tx_frames[i]);
8106
8107 for (i = 0; i < WLAN_MAX_AC; i++)
8108 dst->num_tx_frames_retries[i] =
8109 le32_to_cpu(src->num_tx_frames_retries[i]);
8110
8111 for (i = 0; i < WLAN_MAX_AC; i++)
8112 dst->num_tx_frames_failures[i] =
8113 le32_to_cpu(src->num_tx_frames_failures[i]);
8114
8115 for (i = 0; i < MAX_TX_RATE_VALUES; i++)
8116 dst->tx_rate_history[i] =
8117 le32_to_cpu(src->tx_rate_history[i]);
8118
8119 for (i = 0; i < MAX_TX_RATE_VALUES; i++)
8120 dst->beacon_rssi_history[i] =
8121 le32_to_cpu(src->beacon_rssi_history[i]);
8122 }
8123
8124 static void
ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params * src,struct ath12k_fw_stats_bcn * dst)8125 ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params *src,
8126 struct ath12k_fw_stats_bcn *dst)
8127 {
8128 dst->vdev_id = le32_to_cpu(src->vdev_id);
8129 dst->tx_bcn_succ_cnt = le32_to_cpu(src->tx_bcn_succ_cnt);
8130 dst->tx_bcn_outage_cnt = le32_to_cpu(src->tx_bcn_outage_cnt);
8131 }
8132
8133 static void
ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params * src,struct ath12k_fw_stats_pdev * dst)8134 ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params *src,
8135 struct ath12k_fw_stats_pdev *dst)
8136 {
8137 dst->ch_noise_floor = a_sle32_to_cpu(src->chan_nf);
8138 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
8139 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
8140 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
8141 dst->cycle_count = __le32_to_cpu(src->cycle_count);
8142 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
8143 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
8144 }
8145
8146 static void
ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params * src,struct ath12k_fw_stats_pdev * dst)8147 ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params *src,
8148 struct ath12k_fw_stats_pdev *dst)
8149 {
8150 dst->comp_queued = a_sle32_to_cpu(src->comp_queued);
8151 dst->comp_delivered = a_sle32_to_cpu(src->comp_delivered);
8152 dst->msdu_enqued = a_sle32_to_cpu(src->msdu_enqued);
8153 dst->mpdu_enqued = a_sle32_to_cpu(src->mpdu_enqued);
8154 dst->wmm_drop = a_sle32_to_cpu(src->wmm_drop);
8155 dst->local_enqued = a_sle32_to_cpu(src->local_enqued);
8156 dst->local_freed = a_sle32_to_cpu(src->local_freed);
8157 dst->hw_queued = a_sle32_to_cpu(src->hw_queued);
8158 dst->hw_reaped = a_sle32_to_cpu(src->hw_reaped);
8159 dst->underrun = a_sle32_to_cpu(src->underrun);
8160 dst->tx_abort = a_sle32_to_cpu(src->tx_abort);
8161 dst->mpdus_requed = a_sle32_to_cpu(src->mpdus_requed);
8162 dst->tx_ko = __le32_to_cpu(src->tx_ko);
8163 dst->data_rc = __le32_to_cpu(src->data_rc);
8164 dst->self_triggers = __le32_to_cpu(src->self_triggers);
8165 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
8166 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
8167 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
8168 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
8169 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
8170 dst->stateless_tid_alloc_failure =
8171 __le32_to_cpu(src->stateless_tid_alloc_failure);
8172 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
8173 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
8174 }
8175
8176 static void
ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params * src,struct ath12k_fw_stats_pdev * dst)8177 ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params *src,
8178 struct ath12k_fw_stats_pdev *dst)
8179 {
8180 dst->mid_ppdu_route_change =
8181 a_sle32_to_cpu(src->mid_ppdu_route_change);
8182 dst->status_rcvd = a_sle32_to_cpu(src->status_rcvd);
8183 dst->r0_frags = a_sle32_to_cpu(src->r0_frags);
8184 dst->r1_frags = a_sle32_to_cpu(src->r1_frags);
8185 dst->r2_frags = a_sle32_to_cpu(src->r2_frags);
8186 dst->r3_frags = a_sle32_to_cpu(src->r3_frags);
8187 dst->htt_msdus = a_sle32_to_cpu(src->htt_msdus);
8188 dst->htt_mpdus = a_sle32_to_cpu(src->htt_mpdus);
8189 dst->loc_msdus = a_sle32_to_cpu(src->loc_msdus);
8190 dst->loc_mpdus = a_sle32_to_cpu(src->loc_mpdus);
8191 dst->oversize_amsdu = a_sle32_to_cpu(src->oversize_amsdu);
8192 dst->phy_errs = a_sle32_to_cpu(src->phy_errs);
8193 dst->phy_err_drop = a_sle32_to_cpu(src->phy_err_drop);
8194 dst->mpdu_errs = a_sle32_to_cpu(src->mpdu_errs);
8195 }
8196
ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base * ab,struct wmi_tlv_fw_stats_parse * parse,const void * ptr,u16 len)8197 static int ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base *ab,
8198 struct wmi_tlv_fw_stats_parse *parse,
8199 const void *ptr,
8200 u16 len)
8201 {
8202 const struct wmi_stats_event *ev = parse->ev;
8203 struct ath12k_fw_stats *stats = parse->stats;
8204 struct ath12k *ar;
8205 struct ath12k_link_vif *arvif;
8206 struct ieee80211_sta *sta;
8207 struct ath12k_sta *ahsta;
8208 struct ath12k_link_sta *arsta;
8209 int i, ret = 0;
8210 const void *data = ptr;
8211
8212 if (!ev) {
8213 ath12k_warn(ab, "failed to fetch update stats ev");
8214 return -EPROTO;
8215 }
8216
8217 if (!stats)
8218 return -EINVAL;
8219
8220 rcu_read_lock();
8221
8222 stats->pdev_id = le32_to_cpu(ev->pdev_id);
8223 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id);
8224 if (!ar) {
8225 ath12k_warn(ab, "invalid pdev id %d in update stats event\n",
8226 le32_to_cpu(ev->pdev_id));
8227 ret = -EPROTO;
8228 goto exit;
8229 }
8230
8231 for (i = 0; i < le32_to_cpu(ev->num_vdev_stats); i++) {
8232 const struct wmi_vdev_stats_params *src;
8233 struct ath12k_fw_stats_vdev *dst;
8234
8235 src = data;
8236 if (len < sizeof(*src)) {
8237 ret = -EPROTO;
8238 goto exit;
8239 }
8240
8241 arvif = ath12k_mac_get_arvif(ar, le32_to_cpu(src->vdev_id));
8242 if (arvif) {
8243 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar),
8244 arvif->bssid,
8245 NULL);
8246 if (sta) {
8247 ahsta = ath12k_sta_to_ahsta(sta);
8248 arsta = &ahsta->deflink;
8249 arsta->rssi_beacon = le32_to_cpu(src->beacon_snr);
8250 ath12k_dbg(ab, ATH12K_DBG_WMI,
8251 "wmi stats vdev id %d snr %d\n",
8252 src->vdev_id, src->beacon_snr);
8253 } else {
8254 ath12k_dbg(ab, ATH12K_DBG_WMI,
8255 "not found station bssid %pM for vdev stat\n",
8256 arvif->bssid);
8257 }
8258 }
8259
8260 data += sizeof(*src);
8261 len -= sizeof(*src);
8262 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
8263 if (!dst)
8264 continue;
8265 ath12k_wmi_pull_vdev_stats(src, dst);
8266 stats->stats_id = WMI_REQUEST_VDEV_STAT;
8267 list_add_tail(&dst->list, &stats->vdevs);
8268 }
8269 for (i = 0; i < le32_to_cpu(ev->num_bcn_stats); i++) {
8270 const struct ath12k_wmi_bcn_stats_params *src;
8271 struct ath12k_fw_stats_bcn *dst;
8272
8273 src = data;
8274 if (len < sizeof(*src)) {
8275 ret = -EPROTO;
8276 goto exit;
8277 }
8278
8279 data += sizeof(*src);
8280 len -= sizeof(*src);
8281 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
8282 if (!dst)
8283 continue;
8284 ath12k_wmi_pull_bcn_stats(src, dst);
8285 stats->stats_id = WMI_REQUEST_BCN_STAT;
8286 list_add_tail(&dst->list, &stats->bcn);
8287 }
8288 for (i = 0; i < le32_to_cpu(ev->num_pdev_stats); i++) {
8289 const struct ath12k_wmi_pdev_stats_params *src;
8290 struct ath12k_fw_stats_pdev *dst;
8291
8292 src = data;
8293 if (len < sizeof(*src)) {
8294 ret = -EPROTO;
8295 goto exit;
8296 }
8297
8298 stats->stats_id = WMI_REQUEST_PDEV_STAT;
8299
8300 data += sizeof(*src);
8301 len -= sizeof(*src);
8302
8303 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
8304 if (!dst)
8305 continue;
8306
8307 ath12k_wmi_pull_pdev_stats_base(&src->base, dst);
8308 ath12k_wmi_pull_pdev_stats_tx(&src->tx, dst);
8309 ath12k_wmi_pull_pdev_stats_rx(&src->rx, dst);
8310 list_add_tail(&dst->list, &stats->pdevs);
8311 }
8312
8313 exit:
8314 rcu_read_unlock();
8315 return ret;
8316 }
8317
ath12k_wmi_tlv_rssi_chain_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8318 static int ath12k_wmi_tlv_rssi_chain_parse(struct ath12k_base *ab,
8319 u16 tag, u16 len,
8320 const void *ptr, void *data)
8321 {
8322 const struct wmi_rssi_stat_params *stats_rssi = ptr;
8323 struct wmi_tlv_fw_stats_parse *parse = data;
8324 const struct wmi_stats_event *ev = parse->ev;
8325 struct ath12k_fw_stats *stats = parse->stats;
8326 struct ath12k_link_vif *arvif;
8327 struct ath12k_link_sta *arsta;
8328 struct ieee80211_sta *sta;
8329 struct ath12k_sta *ahsta;
8330 struct ath12k *ar;
8331 int vdev_id;
8332 int j;
8333
8334 if (!ev) {
8335 ath12k_warn(ab, "failed to fetch update stats ev");
8336 return -EPROTO;
8337 }
8338
8339 if (tag != WMI_TAG_RSSI_STATS)
8340 return -EPROTO;
8341
8342 if (!stats)
8343 return -EINVAL;
8344
8345 stats->pdev_id = le32_to_cpu(ev->pdev_id);
8346 vdev_id = le32_to_cpu(stats_rssi->vdev_id);
8347 guard(rcu)();
8348 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id);
8349 if (!ar) {
8350 ath12k_warn(ab, "invalid pdev id %d in rssi chain parse\n",
8351 stats->pdev_id);
8352 return -EPROTO;
8353 }
8354
8355 arvif = ath12k_mac_get_arvif(ar, vdev_id);
8356 if (!arvif) {
8357 ath12k_warn(ab, "not found vif for vdev id %d\n", vdev_id);
8358 return -EPROTO;
8359 }
8360
8361 ath12k_dbg(ab, ATH12K_DBG_WMI,
8362 "stats bssid %pM vif %p\n",
8363 arvif->bssid, arvif->ahvif->vif);
8364
8365 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar),
8366 arvif->bssid,
8367 NULL);
8368 if (!sta) {
8369 ath12k_dbg(ab, ATH12K_DBG_WMI,
8370 "not found station of bssid %pM for rssi chain\n",
8371 arvif->bssid);
8372 return -EPROTO;
8373 }
8374
8375 ahsta = ath12k_sta_to_ahsta(sta);
8376 arsta = &ahsta->deflink;
8377
8378 BUILD_BUG_ON(ARRAY_SIZE(arsta->chain_signal) >
8379 ARRAY_SIZE(stats_rssi->rssi_avg_beacon));
8380
8381 for (j = 0; j < ARRAY_SIZE(arsta->chain_signal); j++)
8382 arsta->chain_signal[j] = le32_to_cpu(stats_rssi->rssi_avg_beacon[j]);
8383
8384 stats->stats_id = WMI_REQUEST_RSSI_PER_CHAIN_STAT;
8385
8386 return 0;
8387 }
8388
ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8389 static int ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base *ab,
8390 u16 tag, u16 len,
8391 const void *ptr, void *data)
8392 {
8393 struct wmi_tlv_fw_stats_parse *parse = data;
8394 int ret = 0;
8395
8396 switch (tag) {
8397 case WMI_TAG_STATS_EVENT:
8398 parse->ev = ptr;
8399 break;
8400 case WMI_TAG_ARRAY_BYTE:
8401 ret = ath12k_wmi_tlv_fw_stats_data_parse(ab, parse, ptr, len);
8402 break;
8403 case WMI_TAG_PER_CHAIN_RSSI_STATS:
8404 parse->rssi = ptr;
8405 if (le32_to_cpu(parse->ev->stats_id) & WMI_REQUEST_RSSI_PER_CHAIN_STAT)
8406 parse->rssi_num = le32_to_cpu(parse->rssi->num_per_chain_rssi);
8407 break;
8408 case WMI_TAG_ARRAY_STRUCT:
8409 if (parse->rssi_num && !parse->chain_rssi_done) {
8410 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
8411 ath12k_wmi_tlv_rssi_chain_parse,
8412 parse);
8413 if (ret)
8414 return ret;
8415
8416 parse->chain_rssi_done = true;
8417 }
8418 break;
8419 default:
8420 break;
8421 }
8422 return ret;
8423 }
8424
ath12k_wmi_pull_fw_stats(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_fw_stats * stats)8425 static int ath12k_wmi_pull_fw_stats(struct ath12k_base *ab, struct sk_buff *skb,
8426 struct ath12k_fw_stats *stats)
8427 {
8428 struct wmi_tlv_fw_stats_parse parse = {};
8429
8430 stats->stats_id = 0;
8431 parse.stats = stats;
8432
8433 return ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
8434 ath12k_wmi_tlv_fw_stats_parse,
8435 &parse);
8436 }
8437
ath12k_wmi_fw_stats_process(struct ath12k * ar,struct ath12k_fw_stats * stats)8438 static void ath12k_wmi_fw_stats_process(struct ath12k *ar,
8439 struct ath12k_fw_stats *stats)
8440 {
8441 struct ath12k_base *ab = ar->ab;
8442 struct ath12k_pdev *pdev;
8443 bool is_end = true;
8444 size_t total_vdevs_started = 0;
8445 int i;
8446
8447 if (stats->stats_id == WMI_REQUEST_VDEV_STAT) {
8448 if (list_empty(&stats->vdevs)) {
8449 ath12k_warn(ab, "empty vdev stats");
8450 return;
8451 }
8452 /* FW sends all the active VDEV stats irrespective of PDEV,
8453 * hence limit until the count of all VDEVs started
8454 */
8455 rcu_read_lock();
8456 for (i = 0; i < ab->num_radios; i++) {
8457 pdev = rcu_dereference(ab->pdevs_active[i]);
8458 if (pdev && pdev->ar)
8459 total_vdevs_started += pdev->ar->num_started_vdevs;
8460 }
8461 rcu_read_unlock();
8462
8463 if (total_vdevs_started)
8464 is_end = ((++ar->fw_stats.num_vdev_recvd) ==
8465 total_vdevs_started);
8466
8467 list_splice_tail_init(&stats->vdevs,
8468 &ar->fw_stats.vdevs);
8469
8470 if (is_end)
8471 complete(&ar->fw_stats_done);
8472
8473 return;
8474 }
8475
8476 if (stats->stats_id == WMI_REQUEST_BCN_STAT) {
8477 if (list_empty(&stats->bcn)) {
8478 ath12k_warn(ab, "empty beacon stats");
8479 return;
8480 }
8481
8482 list_splice_tail_init(&stats->bcn,
8483 &ar->fw_stats.bcn);
8484 complete(&ar->fw_stats_done);
8485 }
8486 }
8487
ath12k_update_stats_event(struct ath12k_base * ab,struct sk_buff * skb)8488 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb)
8489 {
8490 struct ath12k_fw_stats stats = {};
8491 struct ath12k *ar;
8492 int ret;
8493
8494 INIT_LIST_HEAD(&stats.pdevs);
8495 INIT_LIST_HEAD(&stats.vdevs);
8496 INIT_LIST_HEAD(&stats.bcn);
8497
8498 ret = ath12k_wmi_pull_fw_stats(ab, skb, &stats);
8499 if (ret) {
8500 ath12k_warn(ab, "failed to pull fw stats: %d\n", ret);
8501 goto free;
8502 }
8503
8504 ath12k_dbg(ab, ATH12K_DBG_WMI, "event update stats");
8505
8506 rcu_read_lock();
8507 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats.pdev_id);
8508 if (!ar) {
8509 rcu_read_unlock();
8510 ath12k_warn(ab, "failed to get ar for pdev_id %d: %d\n",
8511 stats.pdev_id, ret);
8512 goto free;
8513 }
8514
8515 spin_lock_bh(&ar->data_lock);
8516
8517 /* Handle WMI_REQUEST_PDEV_STAT status update */
8518 if (stats.stats_id == WMI_REQUEST_PDEV_STAT) {
8519 list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs);
8520 complete(&ar->fw_stats_done);
8521 goto complete;
8522 }
8523
8524 /* Handle WMI_REQUEST_RSSI_PER_CHAIN_STAT status update */
8525 if (stats.stats_id == WMI_REQUEST_RSSI_PER_CHAIN_STAT) {
8526 complete(&ar->fw_stats_done);
8527 goto complete;
8528 }
8529
8530 /* Handle WMI_REQUEST_VDEV_STAT and WMI_REQUEST_BCN_STAT updates. */
8531 ath12k_wmi_fw_stats_process(ar, &stats);
8532
8533 complete:
8534 complete(&ar->fw_stats_complete);
8535 spin_unlock_bh(&ar->data_lock);
8536 rcu_read_unlock();
8537
8538 /* Since the stats's pdev, vdev and beacon list are spliced and reinitialised
8539 * at this point, no need to free the individual list.
8540 */
8541 return;
8542
8543 free:
8544 ath12k_fw_stats_free(&stats);
8545 }
8546
8547 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned
8548 * is not part of BDF CTL(Conformance test limits) table entries.
8549 */
ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base * ab,struct sk_buff * skb)8550 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab,
8551 struct sk_buff *skb)
8552 {
8553 const void **tb;
8554 const struct wmi_pdev_ctl_failsafe_chk_event *ev;
8555 int ret;
8556
8557 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8558 if (IS_ERR(tb)) {
8559 ret = PTR_ERR(tb);
8560 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8561 return;
8562 }
8563
8564 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT];
8565 if (!ev) {
8566 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev");
8567 kfree(tb);
8568 return;
8569 }
8570
8571 ath12k_dbg(ab, ATH12K_DBG_WMI,
8572 "pdev ctl failsafe check ev status %d\n",
8573 ev->ctl_failsafe_status);
8574
8575 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power
8576 * to 10 dBm else the CTL power entry in the BDF would be picked up.
8577 */
8578 if (ev->ctl_failsafe_status != 0)
8579 ath12k_warn(ab, "pdev ctl failsafe failure status %d",
8580 ev->ctl_failsafe_status);
8581
8582 kfree(tb);
8583 }
8584
8585 static void
ath12k_wmi_process_csa_switch_count_event(struct ath12k_base * ab,const struct ath12k_wmi_pdev_csa_event * ev,const u32 * vdev_ids)8586 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab,
8587 const struct ath12k_wmi_pdev_csa_event *ev,
8588 const u32 *vdev_ids)
8589 {
8590 u32 current_switch_count = le32_to_cpu(ev->current_switch_count);
8591 u32 num_vdevs = le32_to_cpu(ev->num_vdevs);
8592 struct ieee80211_bss_conf *conf;
8593 struct ath12k_link_vif *arvif;
8594 struct ath12k_vif *ahvif;
8595 int i;
8596
8597 rcu_read_lock();
8598 for (i = 0; i < num_vdevs; i++) {
8599 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]);
8600
8601 if (!arvif) {
8602 ath12k_warn(ab, "Recvd csa status for unknown vdev %d",
8603 vdev_ids[i]);
8604 continue;
8605 }
8606 ahvif = arvif->ahvif;
8607
8608 if (arvif->link_id >= IEEE80211_MLD_MAX_NUM_LINKS) {
8609 ath12k_warn(ab, "Invalid CSA switch count even link id: %d\n",
8610 arvif->link_id);
8611 continue;
8612 }
8613
8614 conf = rcu_dereference(ahvif->vif->link_conf[arvif->link_id]);
8615 if (!conf) {
8616 ath12k_warn(ab, "unable to access bss link conf in process csa for vif %pM link %u\n",
8617 ahvif->vif->addr, arvif->link_id);
8618 continue;
8619 }
8620
8621 if (!arvif->is_up || !conf->csa_active)
8622 continue;
8623
8624 /* Finish CSA when counter reaches zero */
8625 if (!current_switch_count) {
8626 ieee80211_csa_finish(ahvif->vif, arvif->link_id);
8627 arvif->current_cntdown_counter = 0;
8628 } else if (current_switch_count > 1) {
8629 /* If the count in event is not what we expect, don't update the
8630 * mac80211 count. Since during beacon Tx failure, count in the
8631 * firmware will not decrement and this event will come with the
8632 * previous count value again
8633 */
8634 if (current_switch_count != arvif->current_cntdown_counter)
8635 continue;
8636
8637 arvif->current_cntdown_counter =
8638 ieee80211_beacon_update_cntdwn(ahvif->vif,
8639 arvif->link_id);
8640 }
8641 }
8642 rcu_read_unlock();
8643 }
8644
8645 static void
ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base * ab,struct sk_buff * skb)8646 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab,
8647 struct sk_buff *skb)
8648 {
8649 const void **tb;
8650 const struct ath12k_wmi_pdev_csa_event *ev;
8651 const u32 *vdev_ids;
8652 int ret;
8653
8654 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8655 if (IS_ERR(tb)) {
8656 ret = PTR_ERR(tb);
8657 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8658 return;
8659 }
8660
8661 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT];
8662 vdev_ids = tb[WMI_TAG_ARRAY_UINT32];
8663
8664 if (!ev || !vdev_ids) {
8665 ath12k_warn(ab, "failed to fetch pdev csa switch count ev");
8666 kfree(tb);
8667 return;
8668 }
8669
8670 ath12k_dbg(ab, ATH12K_DBG_WMI,
8671 "pdev csa switch count %d for pdev %d, num_vdevs %d",
8672 ev->current_switch_count, ev->pdev_id,
8673 ev->num_vdevs);
8674
8675 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids);
8676
8677 kfree(tb);
8678 }
8679
8680 static void
ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base * ab,struct sk_buff * skb)8681 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb)
8682 {
8683 const void **tb;
8684 struct ath12k_mac_get_any_chanctx_conf_arg arg;
8685 const struct ath12k_wmi_pdev_radar_event *ev;
8686 struct ath12k *ar;
8687 int ret;
8688
8689 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8690 if (IS_ERR(tb)) {
8691 ret = PTR_ERR(tb);
8692 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8693 return;
8694 }
8695
8696 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT];
8697
8698 if (!ev) {
8699 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev");
8700 kfree(tb);
8701 return;
8702 }
8703
8704 ath12k_dbg(ab, ATH12K_DBG_WMI,
8705 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d",
8706 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width,
8707 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp,
8708 ev->freq_offset, ev->sidx);
8709
8710 rcu_read_lock();
8711
8712 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
8713
8714 if (!ar) {
8715 ath12k_warn(ab, "radar detected in invalid pdev %d\n",
8716 ev->pdev_id);
8717 goto exit;
8718 }
8719
8720 arg.ar = ar;
8721 arg.chanctx_conf = NULL;
8722 ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar),
8723 ath12k_mac_get_any_chanctx_conf_iter, &arg);
8724 if (!arg.chanctx_conf) {
8725 ath12k_warn(ab, "failed to find valid chanctx_conf in radar detected event\n");
8726 goto exit;
8727 }
8728
8729 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n",
8730 ev->pdev_id);
8731
8732 if (ar->dfs_block_radar_events)
8733 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
8734 else
8735 ieee80211_radar_detected(ath12k_ar_to_hw(ar), arg.chanctx_conf);
8736
8737 exit:
8738 rcu_read_unlock();
8739
8740 kfree(tb);
8741 }
8742
ath12k_tm_wmi_event_segmented(struct ath12k_base * ab,u32 cmd_id,struct sk_buff * skb)8743 static void ath12k_tm_wmi_event_segmented(struct ath12k_base *ab, u32 cmd_id,
8744 struct sk_buff *skb)
8745 {
8746 const struct ath12k_wmi_ftm_event *ev;
8747 const void **tb;
8748 int ret;
8749 u16 length;
8750
8751 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8752
8753 if (IS_ERR(tb)) {
8754 ret = PTR_ERR(tb);
8755 ath12k_warn(ab, "failed to parse ftm event tlv: %d\n", ret);
8756 return;
8757 }
8758
8759 ev = tb[WMI_TAG_ARRAY_BYTE];
8760 if (!ev) {
8761 ath12k_warn(ab, "failed to fetch ftm msg\n");
8762 kfree(tb);
8763 return;
8764 }
8765
8766 length = skb->len - TLV_HDR_SIZE;
8767 ath12k_tm_process_event(ab, cmd_id, ev, length);
8768 kfree(tb);
8769 tb = NULL;
8770 }
8771
8772 static void
ath12k_wmi_pdev_temperature_event(struct ath12k_base * ab,struct sk_buff * skb)8773 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
8774 struct sk_buff *skb)
8775 {
8776 struct ath12k *ar;
8777 struct wmi_pdev_temperature_event ev = {};
8778
8779 if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) {
8780 ath12k_warn(ab, "failed to extract pdev temperature event");
8781 return;
8782 }
8783
8784 ath12k_dbg(ab, ATH12K_DBG_WMI,
8785 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id);
8786
8787 rcu_read_lock();
8788
8789 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id));
8790 if (!ar) {
8791 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id);
8792 goto exit;
8793 }
8794
8795 exit:
8796 rcu_read_unlock();
8797 }
8798
ath12k_fils_discovery_event(struct ath12k_base * ab,struct sk_buff * skb)8799 static void ath12k_fils_discovery_event(struct ath12k_base *ab,
8800 struct sk_buff *skb)
8801 {
8802 const void **tb;
8803 const struct wmi_fils_discovery_event *ev;
8804 int ret;
8805
8806 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8807 if (IS_ERR(tb)) {
8808 ret = PTR_ERR(tb);
8809 ath12k_warn(ab,
8810 "failed to parse FILS discovery event tlv %d\n",
8811 ret);
8812 return;
8813 }
8814
8815 ev = tb[WMI_TAG_HOST_SWFDA_EVENT];
8816 if (!ev) {
8817 ath12k_warn(ab, "failed to fetch FILS discovery event\n");
8818 kfree(tb);
8819 return;
8820 }
8821
8822 ath12k_warn(ab,
8823 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n",
8824 ev->vdev_id, ev->fils_tt, ev->tbtt);
8825
8826 kfree(tb);
8827 }
8828
ath12k_probe_resp_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)8829 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab,
8830 struct sk_buff *skb)
8831 {
8832 const void **tb;
8833 const struct wmi_probe_resp_tx_status_event *ev;
8834 int ret;
8835
8836 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8837 if (IS_ERR(tb)) {
8838 ret = PTR_ERR(tb);
8839 ath12k_warn(ab,
8840 "failed to parse probe response transmission status event tlv: %d\n",
8841 ret);
8842 return;
8843 }
8844
8845 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT];
8846 if (!ev) {
8847 ath12k_warn(ab,
8848 "failed to fetch probe response transmission status event");
8849 kfree(tb);
8850 return;
8851 }
8852
8853 if (ev->tx_status)
8854 ath12k_warn(ab,
8855 "Probe response transmission failed for vdev_id %u, status %u\n",
8856 ev->vdev_id, ev->tx_status);
8857
8858 kfree(tb);
8859 }
8860
ath12k_wmi_p2p_noa_event(struct ath12k_base * ab,struct sk_buff * skb)8861 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab,
8862 struct sk_buff *skb)
8863 {
8864 const void **tb;
8865 const struct wmi_p2p_noa_event *ev;
8866 const struct ath12k_wmi_p2p_noa_info *noa;
8867 struct ath12k *ar;
8868 int ret, vdev_id;
8869
8870 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8871 if (IS_ERR(tb)) {
8872 ret = PTR_ERR(tb);
8873 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret);
8874 return ret;
8875 }
8876
8877 ev = tb[WMI_TAG_P2P_NOA_EVENT];
8878 noa = tb[WMI_TAG_P2P_NOA_INFO];
8879
8880 if (!ev || !noa) {
8881 ret = -EPROTO;
8882 goto out;
8883 }
8884
8885 vdev_id = __le32_to_cpu(ev->vdev_id);
8886
8887 ath12k_dbg(ab, ATH12K_DBG_WMI,
8888 "wmi tlv p2p noa vdev_id %i descriptors %u\n",
8889 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM));
8890
8891 rcu_read_lock();
8892 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
8893 if (!ar) {
8894 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n",
8895 vdev_id);
8896 ret = -EINVAL;
8897 goto unlock;
8898 }
8899
8900 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa);
8901
8902 ret = 0;
8903
8904 unlock:
8905 rcu_read_unlock();
8906 out:
8907 kfree(tb);
8908 return ret;
8909 }
8910
ath12k_rfkill_state_change_event(struct ath12k_base * ab,struct sk_buff * skb)8911 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab,
8912 struct sk_buff *skb)
8913 {
8914 const struct wmi_rfkill_state_change_event *ev;
8915 const void **tb;
8916 int ret;
8917
8918 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8919 if (IS_ERR(tb)) {
8920 ret = PTR_ERR(tb);
8921 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8922 return;
8923 }
8924
8925 ev = tb[WMI_TAG_RFKILL_EVENT];
8926 if (!ev) {
8927 kfree(tb);
8928 return;
8929 }
8930
8931 ath12k_dbg(ab, ATH12K_DBG_MAC,
8932 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n",
8933 le32_to_cpu(ev->gpio_pin_num),
8934 le32_to_cpu(ev->int_type),
8935 le32_to_cpu(ev->radio_state));
8936
8937 spin_lock_bh(&ab->base_lock);
8938 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON));
8939 spin_unlock_bh(&ab->base_lock);
8940
8941 queue_work(ab->workqueue, &ab->rfkill_work);
8942 kfree(tb);
8943 }
8944
8945 static void
ath12k_wmi_diag_event(struct ath12k_base * ab,struct sk_buff * skb)8946 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb)
8947 {
8948 trace_ath12k_wmi_diag(ab, skb->data, skb->len);
8949 }
8950
ath12k_wmi_twt_enable_event(struct ath12k_base * ab,struct sk_buff * skb)8951 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab,
8952 struct sk_buff *skb)
8953 {
8954 const void **tb;
8955 const struct wmi_twt_enable_event *ev;
8956 int ret;
8957
8958 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8959 if (IS_ERR(tb)) {
8960 ret = PTR_ERR(tb);
8961 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n",
8962 ret);
8963 return;
8964 }
8965
8966 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT];
8967 if (!ev) {
8968 ath12k_warn(ab, "failed to fetch twt enable wmi event\n");
8969 goto exit;
8970 }
8971
8972 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n",
8973 le32_to_cpu(ev->pdev_id),
8974 le32_to_cpu(ev->status));
8975
8976 exit:
8977 kfree(tb);
8978 }
8979
ath12k_wmi_twt_disable_event(struct ath12k_base * ab,struct sk_buff * skb)8980 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab,
8981 struct sk_buff *skb)
8982 {
8983 const void **tb;
8984 const struct wmi_twt_disable_event *ev;
8985 int ret;
8986
8987 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8988 if (IS_ERR(tb)) {
8989 ret = PTR_ERR(tb);
8990 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n",
8991 ret);
8992 return;
8993 }
8994
8995 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT];
8996 if (!ev) {
8997 ath12k_warn(ab, "failed to fetch twt disable wmi event\n");
8998 goto exit;
8999 }
9000
9001 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n",
9002 le32_to_cpu(ev->pdev_id),
9003 le32_to_cpu(ev->status));
9004
9005 exit:
9006 kfree(tb);
9007 }
9008
ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9009 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab,
9010 u16 tag, u16 len,
9011 const void *ptr, void *data)
9012 {
9013 const struct wmi_wow_ev_pg_fault_param *pf_param;
9014 const struct wmi_wow_ev_param *param;
9015 struct wmi_wow_ev_arg *arg = data;
9016 int pf_len;
9017
9018 switch (tag) {
9019 case WMI_TAG_WOW_EVENT_INFO:
9020 param = ptr;
9021 arg->wake_reason = le32_to_cpu(param->wake_reason);
9022 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n",
9023 arg->wake_reason, wow_reason(arg->wake_reason));
9024 break;
9025
9026 case WMI_TAG_ARRAY_BYTE:
9027 if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) {
9028 pf_param = ptr;
9029 pf_len = le32_to_cpu(pf_param->len);
9030 if (pf_len > len - sizeof(pf_len) ||
9031 pf_len < 0) {
9032 ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n",
9033 pf_len);
9034 return -EINVAL;
9035 }
9036 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n",
9037 pf_len);
9038 ath12k_dbg_dump(ab, ATH12K_DBG_WMI,
9039 "wow_reason_page_fault packet present",
9040 "wow_pg_fault ",
9041 pf_param->data,
9042 pf_len);
9043 }
9044 break;
9045 default:
9046 break;
9047 }
9048
9049 return 0;
9050 }
9051
ath12k_wmi_event_wow_wakeup_host(struct ath12k_base * ab,struct sk_buff * skb)9052 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb)
9053 {
9054 struct wmi_wow_ev_arg arg = { };
9055 int ret;
9056
9057 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
9058 ath12k_wmi_wow_wakeup_host_parse,
9059 &arg);
9060 if (ret) {
9061 ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n",
9062 ret);
9063 return;
9064 }
9065
9066 complete(&ab->wow.wakeup_completed);
9067 }
9068
ath12k_wmi_gtk_offload_status_event(struct ath12k_base * ab,struct sk_buff * skb)9069 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab,
9070 struct sk_buff *skb)
9071 {
9072 const struct wmi_gtk_offload_status_event *ev;
9073 struct ath12k_link_vif *arvif;
9074 __be64 replay_ctr_be;
9075 u64 replay_ctr;
9076 const void **tb;
9077 int ret;
9078
9079 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9080 if (IS_ERR(tb)) {
9081 ret = PTR_ERR(tb);
9082 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
9083 return;
9084 }
9085
9086 ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT];
9087 if (!ev) {
9088 ath12k_warn(ab, "failed to fetch gtk offload status ev");
9089 kfree(tb);
9090 return;
9091 }
9092
9093 rcu_read_lock();
9094 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id));
9095 if (!arvif) {
9096 rcu_read_unlock();
9097 ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n",
9098 le32_to_cpu(ev->vdev_id));
9099 kfree(tb);
9100 return;
9101 }
9102
9103 replay_ctr = le64_to_cpu(ev->replay_ctr);
9104 arvif->rekey_data.replay_ctr = replay_ctr;
9105 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n",
9106 le32_to_cpu(ev->refresh_cnt), replay_ctr);
9107
9108 /* supplicant expects big-endian replay counter */
9109 replay_ctr_be = cpu_to_be64(replay_ctr);
9110
9111 ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid,
9112 (void *)&replay_ctr_be, GFP_ATOMIC);
9113
9114 rcu_read_unlock();
9115
9116 kfree(tb);
9117 }
9118
ath12k_wmi_event_mlo_setup_complete(struct ath12k_base * ab,struct sk_buff * skb)9119 static void ath12k_wmi_event_mlo_setup_complete(struct ath12k_base *ab,
9120 struct sk_buff *skb)
9121 {
9122 const struct wmi_mlo_setup_complete_event *ev;
9123 struct ath12k *ar = NULL;
9124 struct ath12k_pdev *pdev;
9125 const void **tb;
9126 int ret, i;
9127
9128 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9129 if (IS_ERR(tb)) {
9130 ret = PTR_ERR(tb);
9131 ath12k_warn(ab, "failed to parse mlo setup complete event tlv: %d\n",
9132 ret);
9133 return;
9134 }
9135
9136 ev = tb[WMI_TAG_MLO_SETUP_COMPLETE_EVENT];
9137 if (!ev) {
9138 ath12k_warn(ab, "failed to fetch mlo setup complete event\n");
9139 kfree(tb);
9140 return;
9141 }
9142
9143 if (le32_to_cpu(ev->pdev_id) > ab->num_radios)
9144 goto skip_lookup;
9145
9146 for (i = 0; i < ab->num_radios; i++) {
9147 pdev = &ab->pdevs[i];
9148 if (pdev && pdev->pdev_id == le32_to_cpu(ev->pdev_id)) {
9149 ar = pdev->ar;
9150 break;
9151 }
9152 }
9153
9154 skip_lookup:
9155 if (!ar) {
9156 ath12k_warn(ab, "invalid pdev_id %d status %u in setup complete event\n",
9157 ev->pdev_id, ev->status);
9158 goto out;
9159 }
9160
9161 ar->mlo_setup_status = le32_to_cpu(ev->status);
9162 complete(&ar->mlo_setup_done);
9163
9164 out:
9165 kfree(tb);
9166 }
9167
ath12k_wmi_event_teardown_complete(struct ath12k_base * ab,struct sk_buff * skb)9168 static void ath12k_wmi_event_teardown_complete(struct ath12k_base *ab,
9169 struct sk_buff *skb)
9170 {
9171 const struct wmi_mlo_teardown_complete_event *ev;
9172 const void **tb;
9173 int ret;
9174
9175 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9176 if (IS_ERR(tb)) {
9177 ret = PTR_ERR(tb);
9178 ath12k_warn(ab, "failed to parse teardown complete event tlv: %d\n", ret);
9179 return;
9180 }
9181
9182 ev = tb[WMI_TAG_MLO_TEARDOWN_COMPLETE];
9183 if (!ev) {
9184 ath12k_warn(ab, "failed to fetch teardown complete event\n");
9185 kfree(tb);
9186 return;
9187 }
9188
9189 kfree(tb);
9190 }
9191
9192 #ifdef CONFIG_ATH12K_DEBUGFS
ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base * ab,const void * ptr,u16 tag,u16 len,struct wmi_tpc_stats_arg * tpc_stats)9193 static int ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base *ab,
9194 const void *ptr, u16 tag, u16 len,
9195 struct wmi_tpc_stats_arg *tpc_stats)
9196 {
9197 u32 len1, len2, len3, len4;
9198 s16 *dst_ptr;
9199 s8 *dst_ptr_ctl;
9200
9201 len1 = le32_to_cpu(tpc_stats->max_reg_allowed_power.tpc_reg_pwr.reg_array_len);
9202 len2 = le32_to_cpu(tpc_stats->rates_array1.tpc_rates_array.rate_array_len);
9203 len3 = le32_to_cpu(tpc_stats->rates_array2.tpc_rates_array.rate_array_len);
9204 len4 = le32_to_cpu(tpc_stats->ctl_array.tpc_ctl_pwr.ctl_array_len);
9205
9206 switch (tpc_stats->event_count) {
9207 case ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT:
9208 if (len1 > len)
9209 return -ENOBUFS;
9210
9211 if (tpc_stats->tlvs_rcvd & WMI_TPC_REG_PWR_ALLOWED) {
9212 dst_ptr = tpc_stats->max_reg_allowed_power.reg_pwr_array;
9213 memcpy(dst_ptr, ptr, len1);
9214 }
9215 break;
9216 case ATH12K_TPC_STATS_RATES_EVENT1:
9217 if (len2 > len)
9218 return -ENOBUFS;
9219
9220 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY1) {
9221 dst_ptr = tpc_stats->rates_array1.rate_array;
9222 memcpy(dst_ptr, ptr, len2);
9223 }
9224 break;
9225 case ATH12K_TPC_STATS_RATES_EVENT2:
9226 if (len3 > len)
9227 return -ENOBUFS;
9228
9229 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY2) {
9230 dst_ptr = tpc_stats->rates_array2.rate_array;
9231 memcpy(dst_ptr, ptr, len3);
9232 }
9233 break;
9234 case ATH12K_TPC_STATS_CTL_TABLE_EVENT:
9235 if (len4 > len)
9236 return -ENOBUFS;
9237
9238 if (tpc_stats->tlvs_rcvd & WMI_TPC_CTL_PWR_ARRAY) {
9239 dst_ptr_ctl = tpc_stats->ctl_array.ctl_pwr_table;
9240 memcpy(dst_ptr_ctl, ptr, len4);
9241 }
9242 break;
9243 }
9244 return 0;
9245 }
9246
ath12k_tpc_get_reg_pwr(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_max_reg_power_fixed_params * ev)9247 static int ath12k_tpc_get_reg_pwr(struct ath12k_base *ab,
9248 struct wmi_tpc_stats_arg *tpc_stats,
9249 struct wmi_max_reg_power_fixed_params *ev)
9250 {
9251 struct wmi_max_reg_power_allowed_arg *reg_pwr;
9252 u32 total_size;
9253
9254 ath12k_dbg(ab, ATH12K_DBG_WMI,
9255 "Received reg power array type %d length %d for tpc stats\n",
9256 ev->reg_power_type, ev->reg_array_len);
9257
9258 switch (le32_to_cpu(ev->reg_power_type)) {
9259 case TPC_STATS_REG_PWR_ALLOWED_TYPE:
9260 reg_pwr = &tpc_stats->max_reg_allowed_power;
9261 break;
9262 default:
9263 return -EINVAL;
9264 }
9265
9266 /* Each entry is 2 byte hence multiplying the indices with 2 */
9267 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
9268 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4) * 2;
9269 if (le32_to_cpu(ev->reg_array_len) != total_size) {
9270 ath12k_warn(ab,
9271 "Total size and reg_array_len doesn't match for tpc stats\n");
9272 return -EINVAL;
9273 }
9274
9275 memcpy(®_pwr->tpc_reg_pwr, ev, sizeof(struct wmi_max_reg_power_fixed_params));
9276
9277 reg_pwr->reg_pwr_array = kzalloc(le32_to_cpu(reg_pwr->tpc_reg_pwr.reg_array_len),
9278 GFP_ATOMIC);
9279 if (!reg_pwr->reg_pwr_array)
9280 return -ENOMEM;
9281
9282 tpc_stats->tlvs_rcvd |= WMI_TPC_REG_PWR_ALLOWED;
9283
9284 return 0;
9285 }
9286
ath12k_tpc_get_rate_array(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_rates_array_fixed_params * ev)9287 static int ath12k_tpc_get_rate_array(struct ath12k_base *ab,
9288 struct wmi_tpc_stats_arg *tpc_stats,
9289 struct wmi_tpc_rates_array_fixed_params *ev)
9290 {
9291 struct wmi_tpc_rates_array_arg *rates_array;
9292 u32 flag = 0, rate_array_len;
9293
9294 ath12k_dbg(ab, ATH12K_DBG_WMI,
9295 "Received rates array type %d length %d for tpc stats\n",
9296 ev->rate_array_type, ev->rate_array_len);
9297
9298 switch (le32_to_cpu(ev->rate_array_type)) {
9299 case ATH12K_TPC_STATS_RATES_ARRAY1:
9300 rates_array = &tpc_stats->rates_array1;
9301 flag = WMI_TPC_RATES_ARRAY1;
9302 break;
9303 case ATH12K_TPC_STATS_RATES_ARRAY2:
9304 rates_array = &tpc_stats->rates_array2;
9305 flag = WMI_TPC_RATES_ARRAY2;
9306 break;
9307 default:
9308 ath12k_warn(ab,
9309 "Received invalid type of rates array for tpc stats\n");
9310 return -EINVAL;
9311 }
9312 memcpy(&rates_array->tpc_rates_array, ev,
9313 sizeof(struct wmi_tpc_rates_array_fixed_params));
9314 rate_array_len = le32_to_cpu(rates_array->tpc_rates_array.rate_array_len);
9315 rates_array->rate_array = kzalloc(rate_array_len, GFP_ATOMIC);
9316 if (!rates_array->rate_array)
9317 return -ENOMEM;
9318
9319 tpc_stats->tlvs_rcvd |= flag;
9320 return 0;
9321 }
9322
ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_ctl_pwr_fixed_params * ev)9323 static int ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base *ab,
9324 struct wmi_tpc_stats_arg *tpc_stats,
9325 struct wmi_tpc_ctl_pwr_fixed_params *ev)
9326 {
9327 struct wmi_tpc_ctl_pwr_table_arg *ctl_array;
9328 u32 total_size, ctl_array_len, flag = 0;
9329
9330 ath12k_dbg(ab, ATH12K_DBG_WMI,
9331 "Received ctl array type %d length %d for tpc stats\n",
9332 ev->ctl_array_type, ev->ctl_array_len);
9333
9334 switch (le32_to_cpu(ev->ctl_array_type)) {
9335 case ATH12K_TPC_STATS_CTL_ARRAY:
9336 ctl_array = &tpc_stats->ctl_array;
9337 flag = WMI_TPC_CTL_PWR_ARRAY;
9338 break;
9339 default:
9340 ath12k_warn(ab,
9341 "Received invalid type of ctl pwr table for tpc stats\n");
9342 return -EINVAL;
9343 }
9344
9345 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
9346 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4);
9347 if (le32_to_cpu(ev->ctl_array_len) != total_size) {
9348 ath12k_warn(ab,
9349 "Total size and ctl_array_len doesn't match for tpc stats\n");
9350 return -EINVAL;
9351 }
9352
9353 memcpy(&ctl_array->tpc_ctl_pwr, ev, sizeof(struct wmi_tpc_ctl_pwr_fixed_params));
9354 ctl_array_len = le32_to_cpu(ctl_array->tpc_ctl_pwr.ctl_array_len);
9355 ctl_array->ctl_pwr_table = kzalloc(ctl_array_len, GFP_ATOMIC);
9356 if (!ctl_array->ctl_pwr_table)
9357 return -ENOMEM;
9358
9359 tpc_stats->tlvs_rcvd |= flag;
9360 return 0;
9361 }
9362
ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9363 static int ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base *ab,
9364 u16 tag, u16 len,
9365 const void *ptr, void *data)
9366 {
9367 struct wmi_tpc_rates_array_fixed_params *tpc_rates_array;
9368 struct wmi_max_reg_power_fixed_params *tpc_reg_pwr;
9369 struct wmi_tpc_ctl_pwr_fixed_params *tpc_ctl_pwr;
9370 struct wmi_tpc_stats_arg *tpc_stats = data;
9371 struct wmi_tpc_config_params *tpc_config;
9372 int ret = 0;
9373
9374 if (!tpc_stats) {
9375 ath12k_warn(ab, "tpc stats memory unavailable\n");
9376 return -EINVAL;
9377 }
9378
9379 switch (tag) {
9380 case WMI_TAG_TPC_STATS_CONFIG_EVENT:
9381 tpc_config = (struct wmi_tpc_config_params *)ptr;
9382 memcpy(&tpc_stats->tpc_config, tpc_config,
9383 sizeof(struct wmi_tpc_config_params));
9384 break;
9385 case WMI_TAG_TPC_STATS_REG_PWR_ALLOWED:
9386 tpc_reg_pwr = (struct wmi_max_reg_power_fixed_params *)ptr;
9387 ret = ath12k_tpc_get_reg_pwr(ab, tpc_stats, tpc_reg_pwr);
9388 break;
9389 case WMI_TAG_TPC_STATS_RATES_ARRAY:
9390 tpc_rates_array = (struct wmi_tpc_rates_array_fixed_params *)ptr;
9391 ret = ath12k_tpc_get_rate_array(ab, tpc_stats, tpc_rates_array);
9392 break;
9393 case WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT:
9394 tpc_ctl_pwr = (struct wmi_tpc_ctl_pwr_fixed_params *)ptr;
9395 ret = ath12k_tpc_get_ctl_pwr_tbl(ab, tpc_stats, tpc_ctl_pwr);
9396 break;
9397 default:
9398 ath12k_warn(ab,
9399 "Received invalid tag for tpc stats in subtlvs\n");
9400 return -EINVAL;
9401 }
9402 return ret;
9403 }
9404
ath12k_wmi_tpc_stats_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9405 static int ath12k_wmi_tpc_stats_event_parser(struct ath12k_base *ab,
9406 u16 tag, u16 len,
9407 const void *ptr, void *data)
9408 {
9409 struct wmi_tpc_stats_arg *tpc_stats = (struct wmi_tpc_stats_arg *)data;
9410 int ret;
9411
9412 switch (tag) {
9413 case WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM:
9414 ret = 0;
9415 /* Fixed param is already processed*/
9416 break;
9417 case WMI_TAG_ARRAY_STRUCT:
9418 /* len 0 is expected for array of struct when there
9419 * is no content of that type to pack inside that tlv
9420 */
9421 if (len == 0)
9422 return 0;
9423 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
9424 ath12k_wmi_tpc_stats_subtlv_parser,
9425 tpc_stats);
9426 break;
9427 case WMI_TAG_ARRAY_INT16:
9428 if (len == 0)
9429 return 0;
9430 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9431 WMI_TAG_ARRAY_INT16,
9432 len, tpc_stats);
9433 break;
9434 case WMI_TAG_ARRAY_BYTE:
9435 if (len == 0)
9436 return 0;
9437 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9438 WMI_TAG_ARRAY_BYTE,
9439 len, tpc_stats);
9440 break;
9441 default:
9442 ath12k_warn(ab, "Received invalid tag for tpc stats\n");
9443 ret = -EINVAL;
9444 break;
9445 }
9446 return ret;
9447 }
9448
ath12k_wmi_free_tpc_stats_mem(struct ath12k * ar)9449 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar)
9450 {
9451 struct wmi_tpc_stats_arg *tpc_stats = ar->debug.tpc_stats;
9452
9453 lockdep_assert_held(&ar->data_lock);
9454 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc stats mem free\n");
9455 if (tpc_stats) {
9456 kfree(tpc_stats->max_reg_allowed_power.reg_pwr_array);
9457 kfree(tpc_stats->rates_array1.rate_array);
9458 kfree(tpc_stats->rates_array2.rate_array);
9459 kfree(tpc_stats->ctl_array.ctl_pwr_table);
9460 kfree(tpc_stats);
9461 ar->debug.tpc_stats = NULL;
9462 }
9463 }
9464
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)9465 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
9466 struct sk_buff *skb)
9467 {
9468 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *fixed_param;
9469 struct wmi_tpc_stats_arg *tpc_stats;
9470 const struct wmi_tlv *tlv;
9471 void *ptr = skb->data;
9472 struct ath12k *ar;
9473 u16 tlv_tag;
9474 u32 event_count;
9475 int ret;
9476
9477 if (!skb->data) {
9478 ath12k_warn(ab, "No data present in tpc stats event\n");
9479 return;
9480 }
9481
9482 if (skb->len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
9483 ath12k_warn(ab, "TPC stats event size invalid\n");
9484 return;
9485 }
9486
9487 tlv = (struct wmi_tlv *)ptr;
9488 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
9489 ptr += sizeof(*tlv);
9490
9491 if (tlv_tag != WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM) {
9492 ath12k_warn(ab, "TPC stats without fixed param tlv at start\n");
9493 return;
9494 }
9495
9496 fixed_param = (struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *)ptr;
9497 rcu_read_lock();
9498 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(fixed_param->pdev_id) + 1);
9499 if (!ar) {
9500 ath12k_warn(ab, "Failed to get ar for tpc stats\n");
9501 rcu_read_unlock();
9502 return;
9503 }
9504 spin_lock_bh(&ar->data_lock);
9505 if (!ar->debug.tpc_request) {
9506 /* Event is received either without request or the
9507 * timeout, if memory is already allocated free it
9508 */
9509 if (ar->debug.tpc_stats) {
9510 ath12k_warn(ab, "Freeing memory for tpc_stats\n");
9511 ath12k_wmi_free_tpc_stats_mem(ar);
9512 }
9513 goto unlock;
9514 }
9515
9516 event_count = le32_to_cpu(fixed_param->event_count);
9517 if (event_count == 0) {
9518 if (ar->debug.tpc_stats) {
9519 ath12k_warn(ab,
9520 "Invalid tpc memory present\n");
9521 goto unlock;
9522 }
9523 ar->debug.tpc_stats =
9524 kzalloc(sizeof(struct wmi_tpc_stats_arg),
9525 GFP_ATOMIC);
9526 if (!ar->debug.tpc_stats) {
9527 ath12k_warn(ab,
9528 "Failed to allocate memory for tpc stats\n");
9529 goto unlock;
9530 }
9531 }
9532
9533 tpc_stats = ar->debug.tpc_stats;
9534 if (!tpc_stats) {
9535 ath12k_warn(ab, "tpc stats memory unavailable\n");
9536 goto unlock;
9537 }
9538
9539 if (!(event_count == 0)) {
9540 if (event_count != tpc_stats->event_count + 1) {
9541 ath12k_warn(ab,
9542 "Invalid tpc event received\n");
9543 goto unlock;
9544 }
9545 }
9546 tpc_stats->pdev_id = le32_to_cpu(fixed_param->pdev_id);
9547 tpc_stats->end_of_event = le32_to_cpu(fixed_param->end_of_event);
9548 tpc_stats->event_count = le32_to_cpu(fixed_param->event_count);
9549 ath12k_dbg(ab, ATH12K_DBG_WMI,
9550 "tpc stats event_count %d\n",
9551 tpc_stats->event_count);
9552 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
9553 ath12k_wmi_tpc_stats_event_parser,
9554 tpc_stats);
9555 if (ret) {
9556 ath12k_wmi_free_tpc_stats_mem(ar);
9557 ath12k_warn(ab, "failed to parse tpc_stats tlv: %d\n", ret);
9558 goto unlock;
9559 }
9560
9561 if (tpc_stats->end_of_event)
9562 complete(&ar->debug.tpc_complete);
9563
9564 unlock:
9565 spin_unlock_bh(&ar->data_lock);
9566 rcu_read_unlock();
9567 }
9568 #else
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)9569 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
9570 struct sk_buff *skb)
9571 {
9572 }
9573 #endif
9574
9575 static int
ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9576 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base *ab,
9577 u16 tag, u16 len,
9578 const void *ptr, void *data)
9579 {
9580 const struct ath12k_wmi_rssi_dbm_conv_temp_info_params *temp_info;
9581 const struct ath12k_wmi_rssi_dbm_conv_info_params *param_info;
9582 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info = data;
9583 struct ath12k_wmi_rssi_dbm_conv_param_arg param_arg;
9584 s32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM];
9585 u8 num_20mhz_segments;
9586 s8 min_nf, *nf_ptr;
9587 int i, j;
9588
9589 switch (tag) {
9590 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO:
9591 if (len < sizeof(*param_info)) {
9592 ath12k_warn(ab,
9593 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
9594 tag, len);
9595 return -EINVAL;
9596 }
9597
9598 param_info = ptr;
9599
9600 param_arg.curr_bw = le32_to_cpu(param_info->curr_bw);
9601 param_arg.curr_rx_chainmask = le32_to_cpu(param_info->curr_rx_chainmask);
9602
9603 /* The received array is actually a 2D byte-array for per chain,
9604 * per 20MHz subband. Convert to 2D byte-array
9605 */
9606 nf_ptr = ¶m_arg.nf_hw_dbm[0][0];
9607
9608 for (i = 0; i < ATH12K_MAX_NUM_NF_HW_DBM; i++) {
9609 nf_hw_dbm[i] = a_sle32_to_cpu(param_info->nf_hw_dbm[i]);
9610
9611 for (j = 0; j < 4; j++) {
9612 *nf_ptr = (nf_hw_dbm[i] >> (j * 8)) & 0xFF;
9613 nf_ptr++;
9614 }
9615 }
9616
9617 switch (param_arg.curr_bw) {
9618 case WMI_CHAN_WIDTH_20:
9619 num_20mhz_segments = 1;
9620 break;
9621 case WMI_CHAN_WIDTH_40:
9622 num_20mhz_segments = 2;
9623 break;
9624 case WMI_CHAN_WIDTH_80:
9625 num_20mhz_segments = 4;
9626 break;
9627 case WMI_CHAN_WIDTH_160:
9628 num_20mhz_segments = 8;
9629 break;
9630 case WMI_CHAN_WIDTH_320:
9631 num_20mhz_segments = 16;
9632 break;
9633 default:
9634 ath12k_warn(ab, "Invalid current bandwidth %d in RSSI dbm event",
9635 param_arg.curr_bw);
9636 /* In error case, still consider the primary 20 MHz segment since
9637 * that would be much better than instead of dropping the whole
9638 * event
9639 */
9640 num_20mhz_segments = 1;
9641 }
9642
9643 min_nf = ATH12K_DEFAULT_NOISE_FLOOR;
9644
9645 for (i = 0; i < ATH12K_MAX_NUM_ANTENNA; i++) {
9646 if (!(param_arg.curr_rx_chainmask & BIT(i)))
9647 continue;
9648
9649 for (j = 0; j < num_20mhz_segments; j++) {
9650 if (param_arg.nf_hw_dbm[i][j] < min_nf)
9651 min_nf = param_arg.nf_hw_dbm[i][j];
9652 }
9653 }
9654
9655 rssi_info->min_nf_dbm = min_nf;
9656 rssi_info->nf_dbm_present = true;
9657 break;
9658 case WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO:
9659 if (len < sizeof(*temp_info)) {
9660 ath12k_warn(ab,
9661 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
9662 tag, len);
9663 return -EINVAL;
9664 }
9665
9666 temp_info = ptr;
9667 rssi_info->temp_offset = a_sle32_to_cpu(temp_info->offset);
9668 rssi_info->temp_offset_present = true;
9669 break;
9670 default:
9671 ath12k_dbg(ab, ATH12K_DBG_WMI,
9672 "Unknown subtlv 0x%x in RSSI dbm conversion event\n", tag);
9673 }
9674
9675 return 0;
9676 }
9677
9678 static int
ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9679 ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base *ab,
9680 u16 tag, u16 len,
9681 const void *ptr, void *data)
9682 {
9683 int ret = 0;
9684
9685 switch (tag) {
9686 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM:
9687 /* Fixed param is already processed*/
9688 break;
9689 case WMI_TAG_ARRAY_STRUCT:
9690 /* len 0 is expected for array of struct when there
9691 * is no content of that type inside that tlv
9692 */
9693 if (len == 0)
9694 return 0;
9695
9696 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
9697 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser,
9698 data);
9699 break;
9700 default:
9701 ath12k_dbg(ab, ATH12K_DBG_WMI,
9702 "Received invalid tag 0x%x for RSSI dbm conv info event\n",
9703 tag);
9704 break;
9705 }
9706
9707 return ret;
9708 }
9709
9710 static int
ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base * ab,u8 * ptr,size_t len,int * pdev_id)9711 ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base *ab, u8 *ptr,
9712 size_t len, int *pdev_id)
9713 {
9714 struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *fixed_param;
9715 const struct wmi_tlv *tlv;
9716 u16 tlv_tag;
9717
9718 if (len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
9719 ath12k_warn(ab, "invalid RSSI dbm conv event size %zu\n", len);
9720 return -EINVAL;
9721 }
9722
9723 tlv = (struct wmi_tlv *)ptr;
9724 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
9725 ptr += sizeof(*tlv);
9726
9727 if (tlv_tag != WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM) {
9728 ath12k_warn(ab, "RSSI dbm conv event received without fixed param tlv\n");
9729 return -EINVAL;
9730 }
9731
9732 fixed_param = (struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *)ptr;
9733 *pdev_id = le32_to_cpu(fixed_param->pdev_id);
9734
9735 return 0;
9736 }
9737
9738 static void
ath12k_wmi_update_rssi_offsets(struct ath12k * ar,struct ath12k_wmi_rssi_dbm_conv_info_arg * rssi_info)9739 ath12k_wmi_update_rssi_offsets(struct ath12k *ar,
9740 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info)
9741 {
9742 struct ath12k_pdev_rssi_offsets *info = &ar->rssi_info;
9743
9744 lockdep_assert_held(&ar->data_lock);
9745
9746 if (rssi_info->temp_offset_present)
9747 info->temp_offset = rssi_info->temp_offset;
9748
9749 if (rssi_info->nf_dbm_present)
9750 info->min_nf_dbm = rssi_info->min_nf_dbm;
9751
9752 info->noise_floor = info->min_nf_dbm + info->temp_offset;
9753 }
9754
9755 static void
ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base * ab,struct sk_buff * skb)9756 ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base *ab,
9757 struct sk_buff *skb)
9758 {
9759 struct ath12k_wmi_rssi_dbm_conv_info_arg rssi_info;
9760 struct ath12k *ar;
9761 s32 noise_floor;
9762 u32 pdev_id;
9763 int ret;
9764
9765 ret = ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(ab, skb->data, skb->len,
9766 &pdev_id);
9767 if (ret) {
9768 ath12k_warn(ab, "failed to parse fixed param in RSSI dbm conv event: %d\n",
9769 ret);
9770 return;
9771 }
9772
9773 rcu_read_lock();
9774 ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id);
9775 /* If pdev is not active, ignore the event */
9776 if (!ar)
9777 goto out_unlock;
9778
9779 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
9780 ath12k_wmi_rssi_dbm_conv_info_event_parser,
9781 &rssi_info);
9782 if (ret) {
9783 ath12k_warn(ab, "unable to parse RSSI dbm conversion event\n");
9784 goto out_unlock;
9785 }
9786
9787 spin_lock_bh(&ar->data_lock);
9788 ath12k_wmi_update_rssi_offsets(ar, &rssi_info);
9789 noise_floor = ath12k_pdev_get_noise_floor(ar);
9790 spin_unlock_bh(&ar->data_lock);
9791
9792 ath12k_dbg(ab, ATH12K_DBG_WMI,
9793 "RSSI noise floor updated, new value is %d dbm\n", noise_floor);
9794 out_unlock:
9795 rcu_read_unlock();
9796 }
9797
ath12k_wmi_op_rx(struct ath12k_base * ab,struct sk_buff * skb)9798 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
9799 {
9800 struct wmi_cmd_hdr *cmd_hdr;
9801 enum wmi_tlv_event_id id;
9802
9803 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
9804 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID);
9805
9806 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
9807 goto out;
9808
9809 switch (id) {
9810 /* Process all the WMI events here */
9811 case WMI_SERVICE_READY_EVENTID:
9812 ath12k_service_ready_event(ab, skb);
9813 break;
9814 case WMI_SERVICE_READY_EXT_EVENTID:
9815 ath12k_service_ready_ext_event(ab, skb);
9816 break;
9817 case WMI_SERVICE_READY_EXT2_EVENTID:
9818 ath12k_service_ready_ext2_event(ab, skb);
9819 break;
9820 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
9821 ath12k_reg_chan_list_event(ab, skb);
9822 break;
9823 case WMI_READY_EVENTID:
9824 ath12k_ready_event(ab, skb);
9825 break;
9826 case WMI_PEER_DELETE_RESP_EVENTID:
9827 ath12k_peer_delete_resp_event(ab, skb);
9828 break;
9829 case WMI_VDEV_START_RESP_EVENTID:
9830 ath12k_vdev_start_resp_event(ab, skb);
9831 break;
9832 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID:
9833 ath12k_bcn_tx_status_event(ab, skb);
9834 break;
9835 case WMI_VDEV_STOPPED_EVENTID:
9836 ath12k_vdev_stopped_event(ab, skb);
9837 break;
9838 case WMI_MGMT_RX_EVENTID:
9839 ath12k_mgmt_rx_event(ab, skb);
9840 /* mgmt_rx_event() owns the skb now! */
9841 return;
9842 case WMI_MGMT_TX_COMPLETION_EVENTID:
9843 ath12k_mgmt_tx_compl_event(ab, skb);
9844 break;
9845 case WMI_SCAN_EVENTID:
9846 ath12k_scan_event(ab, skb);
9847 break;
9848 case WMI_PEER_STA_KICKOUT_EVENTID:
9849 ath12k_peer_sta_kickout_event(ab, skb);
9850 break;
9851 case WMI_ROAM_EVENTID:
9852 ath12k_roam_event(ab, skb);
9853 break;
9854 case WMI_CHAN_INFO_EVENTID:
9855 ath12k_chan_info_event(ab, skb);
9856 break;
9857 case WMI_PDEV_BSS_CHAN_INFO_EVENTID:
9858 ath12k_pdev_bss_chan_info_event(ab, skb);
9859 break;
9860 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
9861 ath12k_vdev_install_key_compl_event(ab, skb);
9862 break;
9863 case WMI_SERVICE_AVAILABLE_EVENTID:
9864 ath12k_service_available_event(ab, skb);
9865 break;
9866 case WMI_PEER_ASSOC_CONF_EVENTID:
9867 ath12k_peer_assoc_conf_event(ab, skb);
9868 break;
9869 case WMI_UPDATE_STATS_EVENTID:
9870 ath12k_update_stats_event(ab, skb);
9871 break;
9872 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID:
9873 ath12k_pdev_ctl_failsafe_check_event(ab, skb);
9874 break;
9875 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
9876 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb);
9877 break;
9878 case WMI_PDEV_TEMPERATURE_EVENTID:
9879 ath12k_wmi_pdev_temperature_event(ab, skb);
9880 break;
9881 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID:
9882 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb);
9883 break;
9884 case WMI_HOST_FILS_DISCOVERY_EVENTID:
9885 ath12k_fils_discovery_event(ab, skb);
9886 break;
9887 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
9888 ath12k_probe_resp_tx_status_event(ab, skb);
9889 break;
9890 case WMI_RFKILL_STATE_CHANGE_EVENTID:
9891 ath12k_rfkill_state_change_event(ab, skb);
9892 break;
9893 case WMI_TWT_ENABLE_EVENTID:
9894 ath12k_wmi_twt_enable_event(ab, skb);
9895 break;
9896 case WMI_TWT_DISABLE_EVENTID:
9897 ath12k_wmi_twt_disable_event(ab, skb);
9898 break;
9899 case WMI_P2P_NOA_EVENTID:
9900 ath12k_wmi_p2p_noa_event(ab, skb);
9901 break;
9902 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID:
9903 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb);
9904 break;
9905 case WMI_VDEV_DELETE_RESP_EVENTID:
9906 ath12k_vdev_delete_resp_event(ab, skb);
9907 break;
9908 case WMI_DIAG_EVENTID:
9909 ath12k_wmi_diag_event(ab, skb);
9910 break;
9911 case WMI_WOW_WAKEUP_HOST_EVENTID:
9912 ath12k_wmi_event_wow_wakeup_host(ab, skb);
9913 break;
9914 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
9915 ath12k_wmi_gtk_offload_status_event(ab, skb);
9916 break;
9917 case WMI_MLO_SETUP_COMPLETE_EVENTID:
9918 ath12k_wmi_event_mlo_setup_complete(ab, skb);
9919 break;
9920 case WMI_MLO_TEARDOWN_COMPLETE_EVENTID:
9921 ath12k_wmi_event_teardown_complete(ab, skb);
9922 break;
9923 case WMI_HALPHY_STATS_CTRL_PATH_EVENTID:
9924 ath12k_wmi_process_tpc_stats(ab, skb);
9925 break;
9926 case WMI_11D_NEW_COUNTRY_EVENTID:
9927 ath12k_reg_11d_new_cc_event(ab, skb);
9928 break;
9929 case WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID:
9930 ath12k_wmi_rssi_dbm_conversion_params_info_event(ab, skb);
9931 break;
9932 case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID:
9933 ath12k_wmi_obss_color_collision_event(ab, skb);
9934 break;
9935 /* add Unsupported events (rare) here */
9936 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
9937 case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
9938 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID:
9939 ath12k_dbg(ab, ATH12K_DBG_WMI,
9940 "ignoring unsupported event 0x%x\n", id);
9941 break;
9942 /* add Unsupported events (frequent) here */
9943 case WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID:
9944 case WMI_MGMT_RX_FW_CONSUMED_EVENTID:
9945 /* debug might flood hence silently ignore (no-op) */
9946 break;
9947 case WMI_PDEV_UTF_EVENTID:
9948 if (test_bit(ATH12K_FLAG_FTM_SEGMENTED, &ab->dev_flags))
9949 ath12k_tm_wmi_event_segmented(ab, id, skb);
9950 else
9951 ath12k_tm_wmi_event_unsegmented(ab, id, skb);
9952 break;
9953 default:
9954 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
9955 break;
9956 }
9957
9958 out:
9959 dev_kfree_skb(skb);
9960 }
9961
ath12k_connect_pdev_htc_service(struct ath12k_base * ab,u32 pdev_idx)9962 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab,
9963 u32 pdev_idx)
9964 {
9965 int status;
9966 static const u32 svc_id[] = {
9967 ATH12K_HTC_SVC_ID_WMI_CONTROL,
9968 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1,
9969 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2
9970 };
9971 struct ath12k_htc_svc_conn_req conn_req = {};
9972 struct ath12k_htc_svc_conn_resp conn_resp = {};
9973
9974 /* these fields are the same for all service endpoints */
9975 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete;
9976 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx;
9977 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits;
9978
9979 /* connect to control service */
9980 conn_req.service_id = svc_id[pdev_idx];
9981
9982 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp);
9983 if (status) {
9984 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n",
9985 status);
9986 return status;
9987 }
9988
9989 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
9990 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
9991 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
9992
9993 return 0;
9994 }
9995
9996 static int
ath12k_wmi_send_unit_test_cmd(struct ath12k * ar,struct wmi_unit_test_cmd ut_cmd,u32 * test_args)9997 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar,
9998 struct wmi_unit_test_cmd ut_cmd,
9999 u32 *test_args)
10000 {
10001 struct ath12k_wmi_pdev *wmi = ar->wmi;
10002 struct wmi_unit_test_cmd *cmd;
10003 struct sk_buff *skb;
10004 struct wmi_tlv *tlv;
10005 void *ptr;
10006 u32 *ut_cmd_args;
10007 int buf_len, arg_len;
10008 int ret;
10009 int i;
10010
10011 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args);
10012 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE;
10013
10014 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
10015 if (!skb)
10016 return -ENOMEM;
10017
10018 cmd = (struct wmi_unit_test_cmd *)skb->data;
10019 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD,
10020 sizeof(ut_cmd));
10021
10022 cmd->vdev_id = ut_cmd.vdev_id;
10023 cmd->module_id = ut_cmd.module_id;
10024 cmd->num_args = ut_cmd.num_args;
10025 cmd->diag_token = ut_cmd.diag_token;
10026
10027 ptr = skb->data + sizeof(ut_cmd);
10028
10029 tlv = ptr;
10030 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
10031
10032 ptr += TLV_HDR_SIZE;
10033
10034 ut_cmd_args = ptr;
10035 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++)
10036 ut_cmd_args[i] = test_args[i];
10037
10038 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10039 "WMI unit test : module %d vdev %d n_args %d token %d\n",
10040 cmd->module_id, cmd->vdev_id, cmd->num_args,
10041 cmd->diag_token);
10042
10043 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID);
10044
10045 if (ret) {
10046 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n",
10047 ret);
10048 dev_kfree_skb(skb);
10049 }
10050
10051 return ret;
10052 }
10053
ath12k_wmi_simulate_radar(struct ath12k * ar)10054 int ath12k_wmi_simulate_radar(struct ath12k *ar)
10055 {
10056 struct ath12k_link_vif *arvif;
10057 u32 dfs_args[DFS_MAX_TEST_ARGS];
10058 struct wmi_unit_test_cmd wmi_ut;
10059 bool arvif_found = false;
10060
10061 list_for_each_entry(arvif, &ar->arvifs, list) {
10062 if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) {
10063 arvif_found = true;
10064 break;
10065 }
10066 }
10067
10068 if (!arvif_found)
10069 return -EINVAL;
10070
10071 dfs_args[DFS_TEST_CMDID] = 0;
10072 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id;
10073 /* Currently we could pass segment_id(b0 - b1), chirp(b2)
10074 * freq offset (b3 - b10) to unit test. For simulation
10075 * purpose this can be set to 0 which is valid.
10076 */
10077 dfs_args[DFS_TEST_RADAR_PARAM] = 0;
10078
10079 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id);
10080 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE);
10081 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS);
10082 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN);
10083
10084 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n");
10085
10086 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args);
10087 }
10088
ath12k_wmi_send_tpc_stats_request(struct ath12k * ar,enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)10089 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar,
10090 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)
10091 {
10092 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *cmd;
10093 struct ath12k_wmi_pdev *wmi = ar->wmi;
10094 struct sk_buff *skb;
10095 struct wmi_tlv *tlv;
10096 __le32 *pdev_id;
10097 u32 buf_len;
10098 void *ptr;
10099 int ret;
10100
10101 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(u32) + TLV_HDR_SIZE + TLV_HDR_SIZE;
10102
10103 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
10104 if (!skb)
10105 return -ENOMEM;
10106 cmd = (struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *)skb->data;
10107 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM,
10108 sizeof(*cmd));
10109
10110 cmd->stats_id_mask = cpu_to_le32(WMI_REQ_CTRL_PATH_PDEV_TX_STAT);
10111 cmd->action = cpu_to_le32(WMI_REQUEST_CTRL_PATH_STAT_GET);
10112 cmd->subid = cpu_to_le32(tpc_stats_type);
10113
10114 ptr = skb->data + sizeof(*cmd);
10115
10116 /* The below TLV arrays optionally follow this fixed param TLV structure
10117 * 1. ARRAY_UINT32 pdev_ids[]
10118 * If this array is present and non-zero length, stats should only
10119 * be provided from the pdevs identified in the array.
10120 * 2. ARRAY_UNIT32 vdev_ids[]
10121 * If this array is present and non-zero length, stats should only
10122 * be provided from the vdevs identified in the array.
10123 * 3. ath12k_wmi_mac_addr_params peer_macaddr[];
10124 * If this array is present and non-zero length, stats should only
10125 * be provided from the peers with the MAC addresses specified
10126 * in the array
10127 */
10128 tlv = ptr;
10129 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
10130 ptr += TLV_HDR_SIZE;
10131
10132 pdev_id = ptr;
10133 *pdev_id = cpu_to_le32(ath12k_mac_get_target_pdev_id(ar));
10134 ptr += sizeof(*pdev_id);
10135
10136 tlv = ptr;
10137 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10138 ptr += TLV_HDR_SIZE;
10139
10140 tlv = ptr;
10141 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, 0);
10142 ptr += TLV_HDR_SIZE;
10143
10144 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID);
10145 if (ret) {
10146 ath12k_warn(ar->ab,
10147 "failed to submit WMI_REQUEST_STATS_CTRL_PATH_CMDID\n");
10148 dev_kfree_skb(skb);
10149 return ret;
10150 }
10151 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI get TPC STATS sent on pdev %d\n",
10152 ar->pdev->pdev_id);
10153
10154 return ret;
10155 }
10156
ath12k_wmi_connect(struct ath12k_base * ab)10157 int ath12k_wmi_connect(struct ath12k_base *ab)
10158 {
10159 u32 i;
10160 u8 wmi_ep_count;
10161
10162 wmi_ep_count = ab->htc.wmi_ep_count;
10163 if (wmi_ep_count > ab->hw_params->max_radios)
10164 return -1;
10165
10166 for (i = 0; i < wmi_ep_count; i++)
10167 ath12k_connect_pdev_htc_service(ab, i);
10168
10169 return 0;
10170 }
10171
ath12k_wmi_pdev_detach(struct ath12k_base * ab,u8 pdev_id)10172 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id)
10173 {
10174 if (WARN_ON(pdev_id >= MAX_RADIOS))
10175 return;
10176
10177 /* TODO: Deinit any pdev specific wmi resource */
10178 }
10179
ath12k_wmi_pdev_attach(struct ath12k_base * ab,u8 pdev_id)10180 int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
10181 u8 pdev_id)
10182 {
10183 struct ath12k_wmi_pdev *wmi_handle;
10184
10185 if (pdev_id >= ab->hw_params->max_radios)
10186 return -EINVAL;
10187
10188 wmi_handle = &ab->wmi_ab.wmi[pdev_id];
10189
10190 wmi_handle->wmi_ab = &ab->wmi_ab;
10191
10192 ab->wmi_ab.ab = ab;
10193 /* TODO: Init remaining resource specific to pdev */
10194
10195 return 0;
10196 }
10197
ath12k_wmi_attach(struct ath12k_base * ab)10198 int ath12k_wmi_attach(struct ath12k_base *ab)
10199 {
10200 int ret;
10201
10202 ret = ath12k_wmi_pdev_attach(ab, 0);
10203 if (ret)
10204 return ret;
10205
10206 ab->wmi_ab.ab = ab;
10207 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
10208
10209 /* It's overwritten when service_ext_ready is handled */
10210 if (ab->hw_params->single_pdev_only)
10211 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
10212
10213 /* TODO: Init remaining wmi soc resources required */
10214 init_completion(&ab->wmi_ab.service_ready);
10215 init_completion(&ab->wmi_ab.unified_ready);
10216
10217 return 0;
10218 }
10219
ath12k_wmi_detach(struct ath12k_base * ab)10220 void ath12k_wmi_detach(struct ath12k_base *ab)
10221 {
10222 int i;
10223
10224 /* TODO: Deinit wmi resource specific to SOC as required */
10225
10226 for (i = 0; i < ab->htc.wmi_ep_count; i++)
10227 ath12k_wmi_pdev_detach(ab, i);
10228
10229 ath12k_wmi_free_dbring_caps(ab);
10230 }
10231
ath12k_wmi_hw_data_filter_cmd(struct ath12k * ar,struct wmi_hw_data_filter_arg * arg)10232 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg)
10233 {
10234 struct wmi_hw_data_filter_cmd *cmd;
10235 struct sk_buff *skb;
10236 int len;
10237
10238 len = sizeof(*cmd);
10239 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10240
10241 if (!skb)
10242 return -ENOMEM;
10243
10244 cmd = (struct wmi_hw_data_filter_cmd *)skb->data;
10245 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD,
10246 sizeof(*cmd));
10247 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
10248 cmd->enable = cpu_to_le32(arg->enable ? 1 : 0);
10249
10250 /* Set all modes in case of disable */
10251 if (arg->enable)
10252 cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap);
10253 else
10254 cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U);
10255
10256 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10257 "wmi hw data filter enable %d filter_bitmap 0x%x\n",
10258 arg->enable, arg->hw_filter_bitmap);
10259
10260 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID);
10261 }
10262
ath12k_wmi_wow_host_wakeup_ind(struct ath12k * ar)10263 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar)
10264 {
10265 struct wmi_wow_host_wakeup_cmd *cmd;
10266 struct sk_buff *skb;
10267 size_t len;
10268
10269 len = sizeof(*cmd);
10270 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10271 if (!skb)
10272 return -ENOMEM;
10273
10274 cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data;
10275 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
10276 sizeof(*cmd));
10277
10278 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n");
10279
10280 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID);
10281 }
10282
ath12k_wmi_wow_enable(struct ath12k * ar)10283 int ath12k_wmi_wow_enable(struct ath12k *ar)
10284 {
10285 struct wmi_wow_enable_cmd *cmd;
10286 struct sk_buff *skb;
10287 int len;
10288
10289 len = sizeof(*cmd);
10290 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10291 if (!skb)
10292 return -ENOMEM;
10293
10294 cmd = (struct wmi_wow_enable_cmd *)skb->data;
10295 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD,
10296 sizeof(*cmd));
10297
10298 cmd->enable = cpu_to_le32(1);
10299 cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED);
10300 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n");
10301
10302 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID);
10303 }
10304
ath12k_wmi_wow_add_wakeup_event(struct ath12k * ar,u32 vdev_id,enum wmi_wow_wakeup_event event,u32 enable)10305 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id,
10306 enum wmi_wow_wakeup_event event,
10307 u32 enable)
10308 {
10309 struct wmi_wow_add_del_event_cmd *cmd;
10310 struct sk_buff *skb;
10311 size_t len;
10312
10313 len = sizeof(*cmd);
10314 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10315 if (!skb)
10316 return -ENOMEM;
10317
10318 cmd = (struct wmi_wow_add_del_event_cmd *)skb->data;
10319 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD,
10320 sizeof(*cmd));
10321 cmd->vdev_id = cpu_to_le32(vdev_id);
10322 cmd->is_add = cpu_to_le32(enable);
10323 cmd->event_bitmap = cpu_to_le32((1 << event));
10324
10325 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n",
10326 wow_wakeup_event(event), enable, vdev_id);
10327
10328 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID);
10329 }
10330
ath12k_wmi_wow_add_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id,const u8 * pattern,const u8 * mask,int pattern_len,int pattern_offset)10331 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id,
10332 const u8 *pattern, const u8 *mask,
10333 int pattern_len, int pattern_offset)
10334 {
10335 struct wmi_wow_add_pattern_cmd *cmd;
10336 struct wmi_wow_bitmap_pattern_params *bitmap;
10337 struct wmi_tlv *tlv;
10338 struct sk_buff *skb;
10339 void *ptr;
10340 size_t len;
10341
10342 len = sizeof(*cmd) +
10343 sizeof(*tlv) + /* array struct */
10344 sizeof(*bitmap) + /* bitmap */
10345 sizeof(*tlv) + /* empty ipv4 sync */
10346 sizeof(*tlv) + /* empty ipv6 sync */
10347 sizeof(*tlv) + /* empty magic */
10348 sizeof(*tlv) + /* empty info timeout */
10349 sizeof(*tlv) + sizeof(u32); /* ratelimit interval */
10350
10351 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10352 if (!skb)
10353 return -ENOMEM;
10354
10355 /* cmd */
10356 ptr = skb->data;
10357 cmd = ptr;
10358 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD,
10359 sizeof(*cmd));
10360 cmd->vdev_id = cpu_to_le32(vdev_id);
10361 cmd->pattern_id = cpu_to_le32(pattern_id);
10362 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
10363
10364 ptr += sizeof(*cmd);
10365
10366 /* bitmap */
10367 tlv = ptr;
10368 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap));
10369
10370 ptr += sizeof(*tlv);
10371
10372 bitmap = ptr;
10373 bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T,
10374 sizeof(*bitmap));
10375 memcpy(bitmap->patternbuf, pattern, pattern_len);
10376 memcpy(bitmap->bitmaskbuf, mask, pattern_len);
10377 bitmap->pattern_offset = cpu_to_le32(pattern_offset);
10378 bitmap->pattern_len = cpu_to_le32(pattern_len);
10379 bitmap->bitmask_len = cpu_to_le32(pattern_len);
10380 bitmap->pattern_id = cpu_to_le32(pattern_id);
10381
10382 ptr += sizeof(*bitmap);
10383
10384 /* ipv4 sync */
10385 tlv = ptr;
10386 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10387
10388 ptr += sizeof(*tlv);
10389
10390 /* ipv6 sync */
10391 tlv = ptr;
10392 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10393
10394 ptr += sizeof(*tlv);
10395
10396 /* magic */
10397 tlv = ptr;
10398 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10399
10400 ptr += sizeof(*tlv);
10401
10402 /* pattern info timeout */
10403 tlv = ptr;
10404 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10405
10406 ptr += sizeof(*tlv);
10407
10408 /* ratelimit interval */
10409 tlv = ptr;
10410 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
10411
10412 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n",
10413 vdev_id, pattern_id, pattern_offset, pattern_len);
10414
10415 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ",
10416 bitmap->patternbuf, pattern_len);
10417 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ",
10418 bitmap->bitmaskbuf, pattern_len);
10419
10420 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID);
10421 }
10422
ath12k_wmi_wow_del_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id)10423 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id)
10424 {
10425 struct wmi_wow_del_pattern_cmd *cmd;
10426 struct sk_buff *skb;
10427 size_t len;
10428
10429 len = sizeof(*cmd);
10430 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10431 if (!skb)
10432 return -ENOMEM;
10433
10434 cmd = (struct wmi_wow_del_pattern_cmd *)skb->data;
10435 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD,
10436 sizeof(*cmd));
10437 cmd->vdev_id = cpu_to_le32(vdev_id);
10438 cmd->pattern_id = cpu_to_le32(pattern_id);
10439 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
10440
10441 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n",
10442 vdev_id, pattern_id);
10443
10444 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID);
10445 }
10446
10447 static struct sk_buff *
ath12k_wmi_op_gen_config_pno_start(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno)10448 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id,
10449 struct wmi_pno_scan_req_arg *pno)
10450 {
10451 struct nlo_configured_params *nlo_list;
10452 size_t len, nlo_list_len, channel_list_len;
10453 struct wmi_wow_nlo_config_cmd *cmd;
10454 __le32 *channel_list;
10455 struct wmi_tlv *tlv;
10456 struct sk_buff *skb;
10457 void *ptr;
10458 u32 i;
10459
10460 len = sizeof(*cmd) +
10461 sizeof(*tlv) +
10462 /* TLV place holder for array of structures
10463 * nlo_configured_params(nlo_list)
10464 */
10465 sizeof(*tlv);
10466 /* TLV place holder for array of uint32 channel_list */
10467
10468 channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count;
10469 len += channel_list_len;
10470
10471 nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count;
10472 len += nlo_list_len;
10473
10474 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10475 if (!skb)
10476 return ERR_PTR(-ENOMEM);
10477
10478 ptr = skb->data;
10479 cmd = ptr;
10480 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd));
10481
10482 cmd->vdev_id = cpu_to_le32(pno->vdev_id);
10483 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN);
10484
10485 /* current FW does not support min-max range for dwell time */
10486 cmd->active_dwell_time = cpu_to_le32(pno->active_max_time);
10487 cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time);
10488
10489 if (pno->do_passive_scan)
10490 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE);
10491
10492 cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period);
10493 cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period);
10494 cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles);
10495 cmd->delay_start_time = cpu_to_le32(pno->delay_start_time);
10496
10497 if (pno->enable_pno_scan_randomization) {
10498 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ |
10499 WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ);
10500 ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr);
10501 ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask);
10502 }
10503
10504 ptr += sizeof(*cmd);
10505
10506 /* nlo_configured_params(nlo_list) */
10507 cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count);
10508 tlv = ptr;
10509 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len);
10510
10511 ptr += sizeof(*tlv);
10512 nlo_list = ptr;
10513 for (i = 0; i < pno->uc_networks_count; i++) {
10514 tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header);
10515 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
10516 sizeof(*nlo_list));
10517
10518 nlo_list[i].ssid.valid = cpu_to_le32(1);
10519 nlo_list[i].ssid.ssid.ssid_len =
10520 cpu_to_le32(pno->a_networks[i].ssid.ssid_len);
10521 memcpy(nlo_list[i].ssid.ssid.ssid,
10522 pno->a_networks[i].ssid.ssid,
10523 le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len));
10524
10525 if (pno->a_networks[i].rssi_threshold &&
10526 pno->a_networks[i].rssi_threshold > -300) {
10527 nlo_list[i].rssi_cond.valid = cpu_to_le32(1);
10528 nlo_list[i].rssi_cond.rssi =
10529 cpu_to_le32(pno->a_networks[i].rssi_threshold);
10530 }
10531
10532 nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1);
10533 nlo_list[i].bcast_nw_type.bcast_nw_type =
10534 cpu_to_le32(pno->a_networks[i].bcast_nw_type);
10535 }
10536
10537 ptr += nlo_list_len;
10538 cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count);
10539 tlv = ptr;
10540 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len);
10541 ptr += sizeof(*tlv);
10542 channel_list = ptr;
10543
10544 for (i = 0; i < pno->a_networks[0].channel_count; i++)
10545 channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]);
10546
10547 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n",
10548 vdev_id);
10549
10550 return skb;
10551 }
10552
ath12k_wmi_op_gen_config_pno_stop(struct ath12k * ar,u32 vdev_id)10553 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar,
10554 u32 vdev_id)
10555 {
10556 struct wmi_wow_nlo_config_cmd *cmd;
10557 struct sk_buff *skb;
10558 size_t len;
10559
10560 len = sizeof(*cmd);
10561 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10562 if (!skb)
10563 return ERR_PTR(-ENOMEM);
10564
10565 cmd = (struct wmi_wow_nlo_config_cmd *)skb->data;
10566 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len);
10567
10568 cmd->vdev_id = cpu_to_le32(vdev_id);
10569 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP);
10570
10571 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10572 "wmi tlv stop pno config vdev_id %d\n", vdev_id);
10573 return skb;
10574 }
10575
ath12k_wmi_wow_config_pno(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno_scan)10576 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id,
10577 struct wmi_pno_scan_req_arg *pno_scan)
10578 {
10579 struct sk_buff *skb;
10580
10581 if (pno_scan->enable)
10582 skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan);
10583 else
10584 skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id);
10585
10586 if (IS_ERR_OR_NULL(skb))
10587 return -ENOMEM;
10588
10589 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID);
10590 }
10591
ath12k_wmi_fill_ns_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable,bool ext)10592 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar,
10593 struct wmi_arp_ns_offload_arg *offload,
10594 void **ptr,
10595 bool enable,
10596 bool ext)
10597 {
10598 struct wmi_ns_offload_params *ns;
10599 struct wmi_tlv *tlv;
10600 void *buf_ptr = *ptr;
10601 u32 ns_cnt, ns_ext_tuples;
10602 int i, max_offloads;
10603
10604 ns_cnt = offload->ipv6_count;
10605
10606 tlv = buf_ptr;
10607
10608 if (ext) {
10609 ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS;
10610 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10611 ns_ext_tuples * sizeof(*ns));
10612 i = WMI_MAX_NS_OFFLOADS;
10613 max_offloads = offload->ipv6_count;
10614 } else {
10615 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10616 WMI_MAX_NS_OFFLOADS * sizeof(*ns));
10617 i = 0;
10618 max_offloads = WMI_MAX_NS_OFFLOADS;
10619 }
10620
10621 buf_ptr += sizeof(*tlv);
10622
10623 for (; i < max_offloads; i++) {
10624 ns = buf_ptr;
10625 ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE,
10626 sizeof(*ns));
10627
10628 if (enable) {
10629 if (i < ns_cnt)
10630 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID);
10631
10632 memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16);
10633 memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16);
10634
10635 if (offload->ipv6_type[i])
10636 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST);
10637
10638 memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN);
10639
10640 if (!is_zero_ether_addr(ns->target_mac.addr))
10641 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID);
10642
10643 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10644 "wmi index %d ns_solicited %pI6 target %pI6",
10645 i, ns->solicitation_ipaddr,
10646 ns->target_ipaddr[0]);
10647 }
10648
10649 buf_ptr += sizeof(*ns);
10650 }
10651
10652 *ptr = buf_ptr;
10653 }
10654
ath12k_wmi_fill_arp_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable)10655 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar,
10656 struct wmi_arp_ns_offload_arg *offload,
10657 void **ptr,
10658 bool enable)
10659 {
10660 struct wmi_arp_offload_params *arp;
10661 struct wmi_tlv *tlv;
10662 void *buf_ptr = *ptr;
10663 int i;
10664
10665 /* fill arp tuple */
10666 tlv = buf_ptr;
10667 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10668 WMI_MAX_ARP_OFFLOADS * sizeof(*arp));
10669 buf_ptr += sizeof(*tlv);
10670
10671 for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) {
10672 arp = buf_ptr;
10673 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE,
10674 sizeof(*arp));
10675
10676 if (enable && i < offload->ipv4_count) {
10677 /* Copy the target ip addr and flags */
10678 arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID);
10679 memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4);
10680
10681 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4",
10682 arp->target_ipaddr);
10683 }
10684
10685 buf_ptr += sizeof(*arp);
10686 }
10687
10688 *ptr = buf_ptr;
10689 }
10690
ath12k_wmi_arp_ns_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,struct wmi_arp_ns_offload_arg * offload,bool enable)10691 int ath12k_wmi_arp_ns_offload(struct ath12k *ar,
10692 struct ath12k_link_vif *arvif,
10693 struct wmi_arp_ns_offload_arg *offload,
10694 bool enable)
10695 {
10696 struct wmi_set_arp_ns_offload_cmd *cmd;
10697 struct wmi_tlv *tlv;
10698 struct sk_buff *skb;
10699 void *buf_ptr;
10700 size_t len;
10701 u8 ns_cnt, ns_ext_tuples = 0;
10702
10703 ns_cnt = offload->ipv6_count;
10704
10705 len = sizeof(*cmd) +
10706 sizeof(*tlv) +
10707 WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) +
10708 sizeof(*tlv) +
10709 WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params);
10710
10711 if (ns_cnt > WMI_MAX_NS_OFFLOADS) {
10712 ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS;
10713 len += sizeof(*tlv) +
10714 ns_ext_tuples * sizeof(struct wmi_ns_offload_params);
10715 }
10716
10717 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10718 if (!skb)
10719 return -ENOMEM;
10720
10721 buf_ptr = skb->data;
10722 cmd = buf_ptr;
10723 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
10724 sizeof(*cmd));
10725 cmd->flags = cpu_to_le32(0);
10726 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
10727 cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples);
10728
10729 buf_ptr += sizeof(*cmd);
10730
10731 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0);
10732 ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable);
10733
10734 if (ns_ext_tuples)
10735 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1);
10736
10737 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID);
10738 }
10739
ath12k_wmi_gtk_rekey_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,bool enable)10740 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar,
10741 struct ath12k_link_vif *arvif, bool enable)
10742 {
10743 struct ath12k_rekey_data *rekey_data = &arvif->rekey_data;
10744 struct wmi_gtk_rekey_offload_cmd *cmd;
10745 struct sk_buff *skb;
10746 __le64 replay_ctr;
10747 int len;
10748
10749 len = sizeof(*cmd);
10750 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10751 if (!skb)
10752 return -ENOMEM;
10753
10754 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
10755 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
10756 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
10757
10758 if (enable) {
10759 cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE);
10760
10761 /* the length in rekey_data and cmd is equal */
10762 memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck));
10763 memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek));
10764
10765 replay_ctr = cpu_to_le64(rekey_data->replay_ctr);
10766 memcpy(cmd->replay_ctr, &replay_ctr,
10767 sizeof(replay_ctr));
10768 } else {
10769 cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE);
10770 }
10771
10772 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n",
10773 arvif->vdev_id, enable);
10774 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
10775 }
10776
ath12k_wmi_gtk_rekey_getinfo(struct ath12k * ar,struct ath12k_link_vif * arvif)10777 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar,
10778 struct ath12k_link_vif *arvif)
10779 {
10780 struct wmi_gtk_rekey_offload_cmd *cmd;
10781 struct sk_buff *skb;
10782 int len;
10783
10784 len = sizeof(*cmd);
10785 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10786 if (!skb)
10787 return -ENOMEM;
10788
10789 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
10790 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
10791 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
10792 cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE);
10793
10794 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n",
10795 arvif->vdev_id);
10796 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
10797 }
10798
ath12k_wmi_sta_keepalive(struct ath12k * ar,const struct wmi_sta_keepalive_arg * arg)10799 int ath12k_wmi_sta_keepalive(struct ath12k *ar,
10800 const struct wmi_sta_keepalive_arg *arg)
10801 {
10802 struct wmi_sta_keepalive_arp_resp_params *arp;
10803 struct ath12k_wmi_pdev *wmi = ar->wmi;
10804 struct wmi_sta_keepalive_cmd *cmd;
10805 struct sk_buff *skb;
10806 size_t len;
10807
10808 len = sizeof(*cmd) + sizeof(*arp);
10809 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10810 if (!skb)
10811 return -ENOMEM;
10812
10813 cmd = (struct wmi_sta_keepalive_cmd *)skb->data;
10814 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd));
10815 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
10816 cmd->enabled = cpu_to_le32(arg->enabled);
10817 cmd->interval = cpu_to_le32(arg->interval);
10818 cmd->method = cpu_to_le32(arg->method);
10819
10820 arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1);
10821 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
10822 sizeof(*arp));
10823 if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE ||
10824 arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) {
10825 arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr);
10826 arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr);
10827 ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr);
10828 }
10829
10830 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10831 "wmi sta keepalive vdev %d enabled %d method %d interval %d\n",
10832 arg->vdev_id, arg->enabled, arg->method, arg->interval);
10833
10834 return ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID);
10835 }
10836
ath12k_wmi_mlo_setup(struct ath12k * ar,struct wmi_mlo_setup_arg * mlo_params)10837 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params)
10838 {
10839 struct wmi_mlo_setup_cmd *cmd;
10840 struct ath12k_wmi_pdev *wmi = ar->wmi;
10841 u32 *partner_links, num_links;
10842 int i, ret, buf_len, arg_len;
10843 struct sk_buff *skb;
10844 struct wmi_tlv *tlv;
10845 void *ptr;
10846
10847 num_links = mlo_params->num_partner_links;
10848 arg_len = num_links * sizeof(u32);
10849 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + arg_len;
10850
10851 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
10852 if (!skb)
10853 return -ENOMEM;
10854
10855 cmd = (struct wmi_mlo_setup_cmd *)skb->data;
10856 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_SETUP_CMD,
10857 sizeof(*cmd));
10858 cmd->mld_group_id = mlo_params->group_id;
10859 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
10860 ptr = skb->data + sizeof(*cmd);
10861
10862 tlv = ptr;
10863 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
10864 ptr += TLV_HDR_SIZE;
10865
10866 partner_links = ptr;
10867 for (i = 0; i < num_links; i++)
10868 partner_links[i] = mlo_params->partner_link_id[i];
10869
10870 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_SETUP_CMDID);
10871 if (ret) {
10872 ath12k_warn(ar->ab, "failed to submit WMI_MLO_SETUP_CMDID command: %d\n",
10873 ret);
10874 dev_kfree_skb(skb);
10875 return ret;
10876 }
10877
10878 return 0;
10879 }
10880
ath12k_wmi_mlo_ready(struct ath12k * ar)10881 int ath12k_wmi_mlo_ready(struct ath12k *ar)
10882 {
10883 struct wmi_mlo_ready_cmd *cmd;
10884 struct ath12k_wmi_pdev *wmi = ar->wmi;
10885 struct sk_buff *skb;
10886 int ret, len;
10887
10888 len = sizeof(*cmd);
10889 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10890 if (!skb)
10891 return -ENOMEM;
10892
10893 cmd = (struct wmi_mlo_ready_cmd *)skb->data;
10894 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_READY_CMD,
10895 sizeof(*cmd));
10896 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
10897
10898 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_READY_CMDID);
10899 if (ret) {
10900 ath12k_warn(ar->ab, "failed to submit WMI_MLO_READY_CMDID command: %d\n",
10901 ret);
10902 dev_kfree_skb(skb);
10903 return ret;
10904 }
10905
10906 return 0;
10907 }
10908
ath12k_wmi_mlo_teardown(struct ath12k * ar)10909 int ath12k_wmi_mlo_teardown(struct ath12k *ar)
10910 {
10911 struct wmi_mlo_teardown_cmd *cmd;
10912 struct ath12k_wmi_pdev *wmi = ar->wmi;
10913 struct sk_buff *skb;
10914 int ret, len;
10915
10916 len = sizeof(*cmd);
10917 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10918 if (!skb)
10919 return -ENOMEM;
10920
10921 cmd = (struct wmi_mlo_teardown_cmd *)skb->data;
10922 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TEARDOWN_CMD,
10923 sizeof(*cmd));
10924 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
10925 cmd->reason_code = WMI_MLO_TEARDOWN_SSR_REASON;
10926
10927 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_TEARDOWN_CMDID);
10928 if (ret) {
10929 ath12k_warn(ar->ab, "failed to submit WMI MLO teardown command: %d\n",
10930 ret);
10931 dev_kfree_skb(skb);
10932 return ret;
10933 }
10934
10935 return 0;
10936 }
10937
ath12k_wmi_supports_6ghz_cc_ext(struct ath12k * ar)10938 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar)
10939 {
10940 return test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
10941 ar->ab->wmi_ab.svc_map) && ar->supports_6ghz;
10942 }
10943
ath12k_wmi_send_vdev_set_tpc_power(struct ath12k * ar,u32 vdev_id,struct ath12k_reg_tpc_power_info * param)10944 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar,
10945 u32 vdev_id,
10946 struct ath12k_reg_tpc_power_info *param)
10947 {
10948 struct wmi_vdev_set_tpc_power_cmd *cmd;
10949 struct ath12k_wmi_pdev *wmi = ar->wmi;
10950 struct wmi_vdev_ch_power_params *ch;
10951 int i, ret, len, array_len;
10952 struct sk_buff *skb;
10953 struct wmi_tlv *tlv;
10954 u8 *ptr;
10955
10956 array_len = sizeof(*ch) * param->num_pwr_levels;
10957 len = sizeof(*cmd) + TLV_HDR_SIZE + array_len;
10958
10959 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
10960 if (!skb)
10961 return -ENOMEM;
10962
10963 ptr = skb->data;
10964
10965 cmd = (struct wmi_vdev_set_tpc_power_cmd *)ptr;
10966 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_TPC_POWER_CMD,
10967 sizeof(*cmd));
10968 cmd->vdev_id = cpu_to_le32(vdev_id);
10969 cmd->psd_power = cpu_to_le32(param->is_psd_power);
10970 cmd->eirp_power = cpu_to_le32(param->eirp_power);
10971 cmd->power_type_6ghz = cpu_to_le32(param->ap_power_type);
10972
10973 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10974 "tpc vdev id %d is psd power %d eirp power %d 6 ghz power type %d\n",
10975 vdev_id, param->is_psd_power, param->eirp_power, param->ap_power_type);
10976
10977 ptr += sizeof(*cmd);
10978 tlv = (struct wmi_tlv *)ptr;
10979 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, array_len);
10980
10981 ptr += TLV_HDR_SIZE;
10982 ch = (struct wmi_vdev_ch_power_params *)ptr;
10983
10984 for (i = 0; i < param->num_pwr_levels; i++, ch++) {
10985 ch->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CH_POWER_INFO,
10986 sizeof(*ch));
10987 ch->chan_cfreq = cpu_to_le32(param->chan_power_info[i].chan_cfreq);
10988 ch->tx_power = cpu_to_le32(param->chan_power_info[i].tx_power);
10989
10990 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc chan freq %d TX power %d\n",
10991 ch->chan_cfreq, ch->tx_power);
10992 }
10993
10994 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_TPC_POWER_CMDID);
10995 if (ret) {
10996 ath12k_warn(ar->ab, "failed to send WMI_VDEV_SET_TPC_POWER_CMDID\n");
10997 dev_kfree_skb(skb);
10998 return ret;
10999 }
11000
11001 return 0;
11002 }
11003
11004 static int
ath12k_wmi_fill_disallowed_bmap(struct ath12k_base * ab,struct wmi_disallowed_mlo_mode_bitmap_params * dislw_bmap,struct wmi_mlo_link_set_active_arg * arg)11005 ath12k_wmi_fill_disallowed_bmap(struct ath12k_base *ab,
11006 struct wmi_disallowed_mlo_mode_bitmap_params *dislw_bmap,
11007 struct wmi_mlo_link_set_active_arg *arg)
11008 {
11009 struct wmi_ml_disallow_mode_bmap_arg *dislw_bmap_arg;
11010 u8 i;
11011
11012 if (arg->num_disallow_mode_comb >
11013 ARRAY_SIZE(arg->disallow_bmap)) {
11014 ath12k_warn(ab, "invalid num_disallow_mode_comb: %d",
11015 arg->num_disallow_mode_comb);
11016 return -EINVAL;
11017 }
11018
11019 dislw_bmap_arg = &arg->disallow_bmap[0];
11020 for (i = 0; i < arg->num_disallow_mode_comb; i++) {
11021 dislw_bmap->tlv_header =
11022 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*dislw_bmap));
11023 dislw_bmap->disallowed_mode_bitmap =
11024 cpu_to_le32(dislw_bmap_arg->disallowed_mode);
11025 dislw_bmap->ieee_link_id_comb =
11026 le32_encode_bits(dislw_bmap_arg->ieee_link_id[0],
11027 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1) |
11028 le32_encode_bits(dislw_bmap_arg->ieee_link_id[1],
11029 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2) |
11030 le32_encode_bits(dislw_bmap_arg->ieee_link_id[2],
11031 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3) |
11032 le32_encode_bits(dislw_bmap_arg->ieee_link_id[3],
11033 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4);
11034
11035 ath12k_dbg(ab, ATH12K_DBG_WMI,
11036 "entry %d disallowed_mode %d ieee_link_id_comb 0x%x",
11037 i, dislw_bmap_arg->disallowed_mode,
11038 dislw_bmap_arg->ieee_link_id_comb);
11039 dislw_bmap++;
11040 dislw_bmap_arg++;
11041 }
11042
11043 return 0;
11044 }
11045
ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base * ab,struct wmi_mlo_link_set_active_arg * arg)11046 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab,
11047 struct wmi_mlo_link_set_active_arg *arg)
11048 {
11049 struct wmi_disallowed_mlo_mode_bitmap_params *disallowed_mode_bmap;
11050 struct wmi_mlo_set_active_link_number_params *link_num_param;
11051 u32 num_link_num_param = 0, num_vdev_bitmap = 0;
11052 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
11053 struct wmi_mlo_link_set_active_cmd *cmd;
11054 u32 num_inactive_vdev_bitmap = 0;
11055 u32 num_disallow_mode_comb = 0;
11056 struct wmi_tlv *tlv;
11057 struct sk_buff *skb;
11058 __le32 *vdev_bitmap;
11059 void *buf_ptr;
11060 int i, ret;
11061 u32 len;
11062
11063 if (!arg->num_vdev_bitmap && !arg->num_link_entry) {
11064 ath12k_warn(ab, "Invalid num_vdev_bitmap and num_link_entry");
11065 return -EINVAL;
11066 }
11067
11068 switch (arg->force_mode) {
11069 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM:
11070 case WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM:
11071 num_link_num_param = arg->num_link_entry;
11072 fallthrough;
11073 case WMI_MLO_LINK_FORCE_MODE_ACTIVE:
11074 case WMI_MLO_LINK_FORCE_MODE_INACTIVE:
11075 case WMI_MLO_LINK_FORCE_MODE_NO_FORCE:
11076 num_vdev_bitmap = arg->num_vdev_bitmap;
11077 break;
11078 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE:
11079 num_vdev_bitmap = arg->num_vdev_bitmap;
11080 num_inactive_vdev_bitmap = arg->num_inactive_vdev_bitmap;
11081 break;
11082 default:
11083 ath12k_warn(ab, "Invalid force mode: %u", arg->force_mode);
11084 return -EINVAL;
11085 }
11086
11087 num_disallow_mode_comb = arg->num_disallow_mode_comb;
11088 len = sizeof(*cmd) +
11089 TLV_HDR_SIZE + sizeof(*link_num_param) * num_link_num_param +
11090 TLV_HDR_SIZE + sizeof(*vdev_bitmap) * num_vdev_bitmap +
11091 TLV_HDR_SIZE + TLV_HDR_SIZE + TLV_HDR_SIZE +
11092 TLV_HDR_SIZE + sizeof(*disallowed_mode_bmap) * num_disallow_mode_comb;
11093 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE)
11094 len += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
11095
11096 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
11097 if (!skb)
11098 return -ENOMEM;
11099
11100 cmd = (struct wmi_mlo_link_set_active_cmd *)skb->data;
11101 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_LINK_SET_ACTIVE_CMD,
11102 sizeof(*cmd));
11103 cmd->force_mode = cpu_to_le32(arg->force_mode);
11104 cmd->reason = cpu_to_le32(arg->reason);
11105 ath12k_dbg(ab, ATH12K_DBG_WMI,
11106 "mode %d reason %d num_link_num_param %d num_vdev_bitmap %d inactive %d num_disallow_mode_comb %d",
11107 arg->force_mode, arg->reason, num_link_num_param,
11108 num_vdev_bitmap, num_inactive_vdev_bitmap,
11109 num_disallow_mode_comb);
11110
11111 buf_ptr = skb->data + sizeof(*cmd);
11112 tlv = buf_ptr;
11113 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11114 sizeof(*link_num_param) * num_link_num_param);
11115 buf_ptr += TLV_HDR_SIZE;
11116
11117 if (num_link_num_param) {
11118 cmd->ctrl_flags =
11119 le32_encode_bits(arg->ctrl_flags.dync_force_link_num ? 1 : 0,
11120 CRTL_F_DYNC_FORCE_LINK_NUM);
11121
11122 link_num_param = buf_ptr;
11123 for (i = 0; i < num_link_num_param; i++) {
11124 link_num_param->tlv_header =
11125 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*link_num_param));
11126 link_num_param->num_of_link =
11127 cpu_to_le32(arg->link_num[i].num_of_link);
11128 link_num_param->vdev_type =
11129 cpu_to_le32(arg->link_num[i].vdev_type);
11130 link_num_param->vdev_subtype =
11131 cpu_to_le32(arg->link_num[i].vdev_subtype);
11132 link_num_param->home_freq =
11133 cpu_to_le32(arg->link_num[i].home_freq);
11134 ath12k_dbg(ab, ATH12K_DBG_WMI,
11135 "entry %d num_of_link %d vdev type %d subtype %d freq %d control_flags %d",
11136 i, arg->link_num[i].num_of_link,
11137 arg->link_num[i].vdev_type,
11138 arg->link_num[i].vdev_subtype,
11139 arg->link_num[i].home_freq,
11140 __le32_to_cpu(cmd->ctrl_flags));
11141 link_num_param++;
11142 }
11143
11144 buf_ptr += sizeof(*link_num_param) * num_link_num_param;
11145 }
11146
11147 tlv = buf_ptr;
11148 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
11149 sizeof(*vdev_bitmap) * num_vdev_bitmap);
11150 buf_ptr += TLV_HDR_SIZE;
11151
11152 if (num_vdev_bitmap) {
11153 vdev_bitmap = buf_ptr;
11154 for (i = 0; i < num_vdev_bitmap; i++) {
11155 vdev_bitmap[i] = cpu_to_le32(arg->vdev_bitmap[i]);
11156 ath12k_dbg(ab, ATH12K_DBG_WMI, "entry %d vdev_id_bitmap 0x%x",
11157 i, arg->vdev_bitmap[i]);
11158 }
11159
11160 buf_ptr += sizeof(*vdev_bitmap) * num_vdev_bitmap;
11161 }
11162
11163 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) {
11164 tlv = buf_ptr;
11165 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
11166 sizeof(*vdev_bitmap) *
11167 num_inactive_vdev_bitmap);
11168 buf_ptr += TLV_HDR_SIZE;
11169
11170 if (num_inactive_vdev_bitmap) {
11171 vdev_bitmap = buf_ptr;
11172 for (i = 0; i < num_inactive_vdev_bitmap; i++) {
11173 vdev_bitmap[i] =
11174 cpu_to_le32(arg->inactive_vdev_bitmap[i]);
11175 ath12k_dbg(ab, ATH12K_DBG_WMI,
11176 "entry %d inactive_vdev_id_bitmap 0x%x",
11177 i, arg->inactive_vdev_bitmap[i]);
11178 }
11179
11180 buf_ptr += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
11181 }
11182 } else {
11183 /* add empty vdev bitmap2 tlv */
11184 tlv = buf_ptr;
11185 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11186 buf_ptr += TLV_HDR_SIZE;
11187 }
11188
11189 /* add empty ieee_link_id_bitmap tlv */
11190 tlv = buf_ptr;
11191 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11192 buf_ptr += TLV_HDR_SIZE;
11193
11194 /* add empty ieee_link_id_bitmap2 tlv */
11195 tlv = buf_ptr;
11196 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11197 buf_ptr += TLV_HDR_SIZE;
11198
11199 tlv = buf_ptr;
11200 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11201 sizeof(*disallowed_mode_bmap) *
11202 arg->num_disallow_mode_comb);
11203 buf_ptr += TLV_HDR_SIZE;
11204
11205 ret = ath12k_wmi_fill_disallowed_bmap(ab, buf_ptr, arg);
11206 if (ret)
11207 goto free_skb;
11208
11209 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_MLO_LINK_SET_ACTIVE_CMDID);
11210 if (ret) {
11211 ath12k_warn(ab,
11212 "failed to send WMI_MLO_LINK_SET_ACTIVE_CMDID: %d\n", ret);
11213 goto free_skb;
11214 }
11215
11216 ath12k_dbg(ab, ATH12K_DBG_WMI, "WMI mlo link set active cmd");
11217
11218 return ret;
11219
11220 free_skb:
11221 dev_kfree_skb(skb);
11222 return ret;
11223 }
11224