1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2014, 2015 Intel Corporation
4 *
5 * Authors:
6 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
7 *
8 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
9 *
10 * This file contains TPM2 protocol implementations of the commands
11 * used by the kernel internally.
12 */
13
14 #include "linux/dev_printk.h"
15 #include "linux/tpm.h"
16 #include "tpm.h"
17 #include <crypto/hash_info.h>
18 #include <linux/unaligned.h>
19
20 static bool disable_pcr_integrity;
21 module_param(disable_pcr_integrity, bool, 0444);
22 MODULE_PARM_DESC(disable_pcr_integrity, "Disable integrity protection of TPM2_PCR_Extend");
23
24 static const struct tpm2_hash tpm2_hash_map[] = {
25 {HASH_ALGO_SHA1, TPM_ALG_SHA1},
26 {HASH_ALGO_SHA256, TPM_ALG_SHA256},
27 {HASH_ALGO_SHA384, TPM_ALG_SHA384},
28 {HASH_ALGO_SHA512, TPM_ALG_SHA512},
29 {HASH_ALGO_SM3_256, TPM_ALG_SM3_256},
30 };
31
tpm2_find_hash_alg(unsigned int crypto_id)32 int tpm2_find_hash_alg(unsigned int crypto_id)
33 {
34 int i;
35
36 for (i = 0; i < ARRAY_SIZE(tpm2_hash_map); i++)
37 if (crypto_id == tpm2_hash_map[i].crypto_id)
38 return tpm2_hash_map[i].tpm_id;
39
40 return -EINVAL;
41 }
42 EXPORT_SYMBOL_GPL(tpm2_find_hash_alg);
43
tpm2_get_timeouts(struct tpm_chip * chip)44 int tpm2_get_timeouts(struct tpm_chip *chip)
45 {
46 chip->timeout_a = msecs_to_jiffies(TPM2_TIMEOUT_A);
47 chip->timeout_b = msecs_to_jiffies(TPM2_TIMEOUT_B);
48 chip->timeout_c = msecs_to_jiffies(TPM2_TIMEOUT_C);
49 chip->timeout_d = msecs_to_jiffies(TPM2_TIMEOUT_D);
50 chip->flags |= TPM_CHIP_FLAG_HAVE_TIMEOUTS;
51 return 0;
52 }
53
54 /*
55 * Contains the maximum durations in milliseconds for TPM2 commands.
56 */
57 static const struct {
58 unsigned long ordinal;
59 unsigned long duration;
60 } tpm2_ordinal_duration_map[] = {
61 {TPM2_CC_STARTUP, 750},
62 {TPM2_CC_SELF_TEST, 3000},
63 {TPM2_CC_GET_RANDOM, 2000},
64 {TPM2_CC_SEQUENCE_UPDATE, 750},
65 {TPM2_CC_SEQUENCE_COMPLETE, 750},
66 {TPM2_CC_EVENT_SEQUENCE_COMPLETE, 750},
67 {TPM2_CC_HASH_SEQUENCE_START, 750},
68 {TPM2_CC_VERIFY_SIGNATURE, 30000},
69 {TPM2_CC_PCR_EXTEND, 750},
70 {TPM2_CC_HIERARCHY_CONTROL, 2000},
71 {TPM2_CC_HIERARCHY_CHANGE_AUTH, 2000},
72 {TPM2_CC_GET_CAPABILITY, 750},
73 {TPM2_CC_NV_READ, 2000},
74 {TPM2_CC_CREATE_PRIMARY, 300000},
75 {TPM2_CC_CREATE, 300000},
76 {TPM2_CC_CREATE_LOADED, 300000},
77 };
78
79 /**
80 * tpm2_calc_ordinal_duration() - Calculate the maximum command duration
81 * @ordinal: TPM command ordinal.
82 *
83 * Returns the maximum amount of time the chip is expected by kernel to
84 * take in jiffies.
85 */
tpm2_calc_ordinal_duration(u32 ordinal)86 unsigned long tpm2_calc_ordinal_duration(u32 ordinal)
87 {
88 int i;
89
90 for (i = 0; i < ARRAY_SIZE(tpm2_ordinal_duration_map); i++)
91 if (ordinal == tpm2_ordinal_duration_map[i].ordinal)
92 return msecs_to_jiffies(tpm2_ordinal_duration_map[i].duration);
93
94 return msecs_to_jiffies(TPM2_DURATION_DEFAULT);
95 }
96
97 /**
98 * tpm2_pcr_read() - read a PCR value
99 * @chip: TPM chip to use.
100 * @pcr_idx: index of the PCR to read.
101 * @digest: PCR bank and buffer current PCR value is written to.
102 * @digest_size_ptr: pointer to variable that stores the digest size.
103 *
104 * Return: Same as with tpm_transmit_cmd.
105 */
tpm2_pcr_read(struct tpm_chip * chip,u32 pcr_idx,struct tpm_digest * digest,u16 * digest_size_ptr)106 int tpm2_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
107 struct tpm_digest *digest, u16 *digest_size_ptr)
108 {
109 int i;
110 int rc;
111 struct tpm2_pcr_read_out *out;
112 u8 pcr_select[TPM2_PCR_SELECT_MIN] = {0};
113 u16 digest_size;
114 u16 expected_digest_size = 0;
115
116 struct tpm_buf *buf __free(kfree) = NULL;
117
118 if (pcr_idx >= TPM2_PLATFORM_PCR)
119 return -EINVAL;
120
121 if (!digest_size_ptr) {
122 for (i = 0; i < chip->nr_allocated_banks &&
123 chip->allocated_banks[i].alg_id != digest->alg_id; i++)
124 ;
125
126 if (i == chip->nr_allocated_banks)
127 return -EINVAL;
128
129 expected_digest_size = chip->allocated_banks[i].digest_size;
130 }
131
132 buf = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
133 if (!buf)
134 return -ENOMEM;
135
136 tpm_buf_init(buf, TPM_BUFSIZE);
137 tpm_buf_reset(buf, TPM2_ST_NO_SESSIONS, TPM2_CC_PCR_READ);
138
139 pcr_select[pcr_idx >> 3] = 1 << (pcr_idx & 0x7);
140
141 tpm_buf_append_u32(buf, 1);
142 tpm_buf_append_u16(buf, digest->alg_id);
143 tpm_buf_append_u8(buf, TPM2_PCR_SELECT_MIN);
144 tpm_buf_append(buf, (const unsigned char *)pcr_select,
145 sizeof(pcr_select));
146
147 rc = tpm_transmit_cmd(chip, buf, 0, "attempting to read a pcr value");
148 if (rc)
149 return rc;
150
151 out = (struct tpm2_pcr_read_out *)&buf->data[TPM_HEADER_SIZE];
152 digest_size = be16_to_cpu(out->digest_size);
153 if (digest_size > sizeof(digest->digest) ||
154 (!digest_size_ptr && digest_size != expected_digest_size))
155 return -EINVAL;
156
157 if (digest_size_ptr)
158 *digest_size_ptr = digest_size;
159
160 memcpy(digest->digest, out->digest, digest_size);
161 return rc;
162 }
163
164 /**
165 * tpm2_pcr_extend() - extend a PCR value
166 *
167 * @chip: TPM chip to use.
168 * @pcr_idx: index of the PCR.
169 * @digests: list of pcr banks and corresponding digest values to extend.
170 *
171 * Return: Same as with tpm_transmit_cmd.
172 */
tpm2_pcr_extend(struct tpm_chip * chip,u32 pcr_idx,struct tpm_digest * digests)173 int tpm2_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
174 struct tpm_digest *digests)
175 {
176 struct tpm_buf *buf __free(kfree) = NULL;
177 int rc;
178 int i;
179
180 if (!disable_pcr_integrity) {
181 rc = tpm2_start_auth_session(chip);
182 if (rc)
183 return rc;
184 }
185
186 buf = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
187 if (!buf) {
188 if (!disable_pcr_integrity)
189 tpm2_end_auth_session(chip);
190 return -ENOMEM;
191 }
192
193 tpm_buf_init(buf, TPM_BUFSIZE);
194 tpm_buf_reset(buf, TPM2_ST_SESSIONS, TPM2_CC_PCR_EXTEND);
195
196 if (!disable_pcr_integrity) {
197 rc = tpm_buf_append_name(chip, buf, pcr_idx, NULL);
198 if (rc) {
199 tpm2_end_auth_session(chip);
200 return rc;
201 }
202 tpm_buf_append_hmac_session(chip, buf, 0, NULL, 0);
203 } else {
204 tpm_buf_append_handle(buf, pcr_idx);
205 tpm_buf_append_auth(chip, buf, NULL, 0);
206 }
207
208 tpm_buf_append_u32(buf, chip->nr_allocated_banks);
209
210 for (i = 0; i < chip->nr_allocated_banks; i++) {
211 tpm_buf_append_u16(buf, digests[i].alg_id);
212 tpm_buf_append(buf, (const unsigned char *)&digests[i].digest,
213 chip->allocated_banks[i].digest_size);
214 }
215
216 if (!disable_pcr_integrity) {
217 rc = tpm_buf_fill_hmac_session(chip, buf);
218 if (rc)
219 return rc;
220 }
221
222 rc = tpm_transmit_cmd(chip, buf, 0, "attempting extend a PCR value");
223 if (!disable_pcr_integrity)
224 rc = tpm_buf_check_hmac_response(chip, buf, rc);
225
226 return rc;
227 }
228
229 /**
230 * tpm2_get_random() - get random bytes from the TPM RNG
231 *
232 * @chip: a &tpm_chip instance
233 * @dest: destination buffer
234 * @max: the max number of random bytes to pull
235 *
236 * Return:
237 * size of the buffer on success,
238 * -errno otherwise (positive TPM return codes are masked to -EIO)
239 */
tpm2_get_random(struct tpm_chip * chip,u8 * dest,size_t max)240 int tpm2_get_random(struct tpm_chip *chip, u8 *dest, size_t max)
241 {
242 struct tpm2_get_random_out *out;
243 struct tpm_header *head;
244 u32 recd;
245 u32 num_bytes = max;
246 int err;
247 int total = 0;
248 int retries = 5;
249 u8 *dest_ptr = dest;
250 off_t offset;
251
252 struct tpm_buf *buf __free(kfree) = NULL;
253
254 if (!num_bytes || max > TPM_MAX_RNG_DATA)
255 return -EINVAL;
256
257 err = tpm2_start_auth_session(chip);
258 if (err)
259 return err;
260
261 buf = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
262 if (!buf) {
263 tpm2_end_auth_session(chip);
264 return -ENOMEM;
265 }
266
267 tpm_buf_init(buf, TPM_BUFSIZE);
268
269 do {
270 tpm_buf_reset(buf, TPM2_ST_SESSIONS, TPM2_CC_GET_RANDOM);
271 if (tpm2_chip_auth(chip)) {
272 tpm_buf_append_hmac_session(chip, buf,
273 TPM2_SA_ENCRYPT |
274 TPM2_SA_CONTINUE_SESSION,
275 NULL, 0);
276 } else {
277 offset = buf->handles * 4 + TPM_HEADER_SIZE;
278 head = (struct tpm_header *)buf->data;
279 if (tpm_buf_length(buf) == offset)
280 head->tag = cpu_to_be16(TPM2_ST_NO_SESSIONS);
281 }
282 tpm_buf_append_u16(buf, num_bytes);
283 err = tpm_buf_fill_hmac_session(chip, buf);
284 if (err) {
285 tpm2_end_auth_session(chip);
286 return err;
287 }
288
289 err = tpm_transmit_cmd(chip, buf,
290 offsetof(struct tpm2_get_random_out,
291 buffer),
292 "attempting get random");
293 err = tpm_buf_check_hmac_response(chip, buf, err);
294 if (err) {
295 if (err > 0)
296 err = -EIO;
297 tpm2_end_auth_session(chip);
298 return err;
299 }
300
301 head = (struct tpm_header *)buf->data;
302 offset = TPM_HEADER_SIZE;
303 /* Skip the parameter size field: */
304 if (be16_to_cpu(head->tag) == TPM2_ST_SESSIONS)
305 offset += 4;
306
307 out = (struct tpm2_get_random_out *)&buf->data[offset];
308 recd = min_t(u32, be16_to_cpu(out->size), num_bytes);
309 if (tpm_buf_length(buf) <
310 offset +
311 offsetof(struct tpm2_get_random_out, buffer) +
312 recd) {
313 tpm2_end_auth_session(chip);
314 return -EFAULT;
315 }
316 memcpy(dest_ptr, out->buffer, recd);
317
318 dest_ptr += recd;
319 total += recd;
320 num_bytes -= recd;
321 } while (retries-- && total < max);
322
323 return total ? total : -EIO;
324 }
325
326 /**
327 * tpm2_flush_context() - execute a TPM2_FlushContext command
328 * @chip: TPM chip to use
329 * @handle: context handle
330 */
tpm2_flush_context(struct tpm_chip * chip,u32 handle)331 void tpm2_flush_context(struct tpm_chip *chip, u32 handle)
332 {
333 struct tpm_buf *buf __free(kfree) = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
334 if (!buf) {
335 dev_warn(&chip->dev, "0x%08x was not flushed, out of memory\n",
336 handle);
337 return;
338 }
339
340 tpm_buf_init(buf, TPM_BUFSIZE);
341 tpm_buf_reset(buf, TPM2_ST_NO_SESSIONS, TPM2_CC_FLUSH_CONTEXT);
342 tpm_buf_append_u32(buf, handle);
343
344 tpm_transmit_cmd(chip, buf, 0, "flushing context");
345 }
346 EXPORT_SYMBOL_GPL(tpm2_flush_context);
347
348 /**
349 * tpm2_get_tpm_pt() - get value of a TPM_CAP_TPM_PROPERTIES type property
350 * @chip: a &tpm_chip instance
351 * @property_id: property ID.
352 * @value: output variable.
353 * @desc: passed to tpm_transmit_cmd()
354 *
355 * Return:
356 * 0 on success,
357 * -errno or a TPM return code otherwise
358 */
tpm2_get_tpm_pt(struct tpm_chip * chip,u32 property_id,u32 * value,const char * desc)359 ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id, u32 *value,
360 const char *desc)
361 {
362 struct tpm2_get_cap_out *out;
363 int rc;
364
365 struct tpm_buf *buf __free(kfree) = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
366 if (!buf)
367 return -ENOMEM;
368
369 tpm_buf_init(buf, TPM_BUFSIZE);
370 tpm_buf_reset(buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
371 tpm_buf_append_u32(buf, TPM2_CAP_TPM_PROPERTIES);
372 tpm_buf_append_u32(buf, property_id);
373 tpm_buf_append_u32(buf, 1);
374 rc = tpm_transmit_cmd(chip, buf, 0, NULL);
375 if (!rc) {
376 out = (struct tpm2_get_cap_out *)
377 &buf->data[TPM_HEADER_SIZE];
378 /*
379 * To prevent failing boot up of some systems, Infineon TPM2.0
380 * returns SUCCESS on TPM2_Startup in field upgrade mode. Also
381 * the TPM2_Getcapability command returns a zero length list
382 * in field upgrade mode.
383 */
384 if (be32_to_cpu(out->property_cnt) > 0)
385 *value = be32_to_cpu(out->value);
386 else
387 rc = -ENODATA;
388 }
389 return rc;
390 }
391 EXPORT_SYMBOL_GPL(tpm2_get_tpm_pt);
392
393 /**
394 * tpm2_shutdown() - send a TPM shutdown command
395 *
396 * Sends a TPM shutdown command. The shutdown command is used in call
397 * sites where the system is going down. If it fails, there is not much
398 * that can be done except print an error message.
399 *
400 * @chip: a &tpm_chip instance
401 * @shutdown_type: TPM_SU_CLEAR or TPM_SU_STATE.
402 */
tpm2_shutdown(struct tpm_chip * chip,u16 shutdown_type)403 void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type)
404 {
405 struct tpm_buf *buf __free(kfree) = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
406 if (!buf)
407 return;
408
409 tpm_buf_init(buf, TPM_BUFSIZE);
410 tpm_buf_reset(buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SHUTDOWN);
411 tpm_buf_append_u16(buf, shutdown_type);
412 tpm_transmit_cmd(chip, buf, 0, "stopping the TPM");
413 }
414
415 /**
416 * tpm2_do_selftest() - ensure that all self tests have passed
417 *
418 * @chip: TPM chip to use
419 *
420 * Return: Same as with tpm_transmit_cmd.
421 *
422 * The TPM can either run all self tests synchronously and then return
423 * RC_SUCCESS once all tests were successful. Or it can choose to run the tests
424 * asynchronously and return RC_TESTING immediately while the self tests still
425 * execute in the background. This function handles both cases and waits until
426 * all tests have completed.
427 */
tpm2_do_selftest(struct tpm_chip * chip)428 static int tpm2_do_selftest(struct tpm_chip *chip)
429 {
430 int full;
431 int rc;
432
433 for (full = 0; full < 2; full++) {
434 struct tpm_buf *buf __free(kfree) = NULL;
435
436 buf = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
437 if (!buf)
438 return -ENOMEM;
439
440 tpm_buf_init(buf, TPM_BUFSIZE);
441 tpm_buf_reset(buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SELF_TEST);
442 tpm_buf_append_u8(buf, full);
443 rc = tpm_transmit_cmd(chip, buf, 0,
444 "attempting the self test");
445 if (rc == TPM2_RC_TESTING)
446 rc = TPM2_RC_SUCCESS;
447 if (rc == TPM2_RC_INITIALIZE || rc == TPM2_RC_SUCCESS)
448 return rc;
449 }
450
451 return rc;
452 }
453
454 /**
455 * tpm2_probe() - probe for the TPM 2.0 protocol
456 * @chip: a &tpm_chip instance
457 *
458 * Send an idempotent TPM 2.0 command and see whether there is TPM2 chip in the
459 * other end based on the response tag. The flag TPM_CHIP_FLAG_TPM2 is set by
460 * this function if this is the case.
461 *
462 * Return:
463 * 0 on success,
464 * -errno otherwise
465 */
tpm2_probe(struct tpm_chip * chip)466 int tpm2_probe(struct tpm_chip *chip)
467 {
468 struct tpm_header *out;
469 int rc;
470
471 struct tpm_buf *buf __free(kfree) = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
472 if (!buf)
473 return -ENOMEM;
474
475 tpm_buf_init(buf, TPM_BUFSIZE);
476 tpm_buf_reset(buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
477 tpm_buf_append_u32(buf, TPM2_CAP_TPM_PROPERTIES);
478 tpm_buf_append_u32(buf, TPM_PT_TOTAL_COMMANDS);
479 tpm_buf_append_u32(buf, 1);
480 rc = tpm_transmit_cmd(chip, buf, 0, NULL);
481 /* We ignore TPM return codes on purpose. */
482 if (rc >= 0) {
483 out = (struct tpm_header *)buf->data;
484 if (be16_to_cpu(out->tag) == TPM2_ST_NO_SESSIONS)
485 chip->flags |= TPM_CHIP_FLAG_TPM2;
486 }
487 return 0;
488 }
489 EXPORT_SYMBOL_GPL(tpm2_probe);
490
tpm2_init_bank_info(struct tpm_chip * chip,u32 bank_index)491 static int tpm2_init_bank_info(struct tpm_chip *chip, u32 bank_index)
492 {
493 struct tpm_bank_info *bank = chip->allocated_banks + bank_index;
494 struct tpm_digest digest = { .alg_id = bank->alg_id };
495 int i;
496
497 /*
498 * Avoid unnecessary PCR read operations to reduce overhead
499 * and obtain identifiers of the crypto subsystem.
500 */
501 for (i = 0; i < ARRAY_SIZE(tpm2_hash_map); i++) {
502 enum hash_algo crypto_algo = tpm2_hash_map[i].crypto_id;
503
504 if (bank->alg_id != tpm2_hash_map[i].tpm_id)
505 continue;
506
507 bank->digest_size = hash_digest_size[crypto_algo];
508 bank->crypto_id = crypto_algo;
509 return 0;
510 }
511
512 bank->crypto_id = HASH_ALGO__LAST;
513
514 return tpm2_pcr_read(chip, 0, &digest, &bank->digest_size);
515 }
516
tpm2_get_pcr_allocation(struct tpm_chip * chip)517 ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip)
518 {
519 struct tpm2_pcr_selection pcr_selection;
520 void *marker;
521 void *end;
522 void *pcr_select_offset;
523 u32 sizeof_pcr_selection;
524 u32 nr_possible_banks;
525 u32 nr_alloc_banks = 0;
526 u16 hash_alg;
527 u32 rsp_len;
528 int rc;
529 int i = 0;
530
531 struct tpm_buf *buf __free(kfree) = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
532 if (!buf)
533 return -ENOMEM;
534
535 tpm_buf_init(buf, TPM_BUFSIZE);
536 tpm_buf_reset(buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
537 tpm_buf_append_u32(buf, TPM2_CAP_PCRS);
538 tpm_buf_append_u32(buf, 0);
539 tpm_buf_append_u32(buf, 1);
540
541 rc = tpm_transmit_cmd(chip, buf, 9, "get tpm pcr allocation");
542 if (rc)
543 return rc;
544
545 nr_possible_banks = be32_to_cpup(
546 (__be32 *)&buf->data[TPM_HEADER_SIZE + 5]);
547 if (nr_possible_banks > TPM2_MAX_PCR_BANKS) {
548 pr_err("tpm: out of bank capacity: %u > %u\n",
549 nr_possible_banks, TPM2_MAX_PCR_BANKS);
550 return -ENOMEM;
551 }
552
553 marker = &buf->data[TPM_HEADER_SIZE + 9];
554
555 rsp_len = be32_to_cpup((__be32 *)&buf->data[2]);
556 end = &buf->data[rsp_len];
557
558 for (i = 0; i < nr_possible_banks; i++) {
559 pcr_select_offset = marker +
560 offsetof(struct tpm2_pcr_selection, size_of_select);
561 if (pcr_select_offset >= end) {
562 rc = -EFAULT;
563 break;
564 }
565
566 memcpy(&pcr_selection, marker, sizeof(pcr_selection));
567 hash_alg = be16_to_cpu(pcr_selection.hash_alg);
568
569 pcr_select_offset = memchr_inv(pcr_selection.pcr_select, 0,
570 pcr_selection.size_of_select);
571 if (pcr_select_offset) {
572 chip->allocated_banks[nr_alloc_banks].alg_id = hash_alg;
573
574 rc = tpm2_init_bank_info(chip, nr_alloc_banks);
575 if (rc < 0)
576 break;
577
578 nr_alloc_banks++;
579 }
580
581 sizeof_pcr_selection = sizeof(pcr_selection.hash_alg) +
582 sizeof(pcr_selection.size_of_select) +
583 pcr_selection.size_of_select;
584 marker = marker + sizeof_pcr_selection;
585 }
586
587 chip->nr_allocated_banks = nr_alloc_banks;
588
589 return rc;
590 }
591
tpm2_get_cc_attrs_tbl(struct tpm_chip * chip)592 int tpm2_get_cc_attrs_tbl(struct tpm_chip *chip)
593 {
594 u32 nr_commands;
595 __be32 *attrs;
596 u32 cc;
597 int i;
598 int rc;
599
600 struct tpm_buf *buf __free(kfree) = NULL;
601
602 rc = tpm2_get_tpm_pt(chip, TPM_PT_TOTAL_COMMANDS, &nr_commands, NULL);
603 if (rc)
604 goto out;
605
606 if (nr_commands > 0xFFFFF) {
607 rc = -EFAULT;
608 goto out;
609 }
610
611 chip->cc_attrs_tbl = devm_kcalloc(&chip->dev, 4, nr_commands,
612 GFP_KERNEL);
613 if (!chip->cc_attrs_tbl) {
614 rc = -ENOMEM;
615 goto out;
616 }
617
618 buf = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
619 if (!buf) {
620 rc = -ENOMEM;
621 goto out;
622 }
623
624 tpm_buf_init(buf, TPM_BUFSIZE);
625 tpm_buf_reset(buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
626 tpm_buf_append_u32(buf, TPM2_CAP_COMMANDS);
627 tpm_buf_append_u32(buf, TPM2_CC_FIRST);
628 tpm_buf_append_u32(buf, nr_commands);
629
630 rc = tpm_transmit_cmd(chip, buf, 9 + 4 * nr_commands, NULL);
631 if (rc)
632 goto out;
633
634 if (nr_commands !=
635 be32_to_cpup((__be32 *)&buf->data[TPM_HEADER_SIZE + 5])) {
636 rc = -EFAULT;
637 goto out;
638 }
639
640 chip->nr_commands = nr_commands;
641
642 attrs = (__be32 *)&buf->data[TPM_HEADER_SIZE + 9];
643 for (i = 0; i < nr_commands; i++, attrs++) {
644 chip->cc_attrs_tbl[i] = be32_to_cpup(attrs);
645 cc = chip->cc_attrs_tbl[i] & 0xFFFF;
646
647 if (cc == TPM2_CC_CONTEXT_SAVE || cc == TPM2_CC_FLUSH_CONTEXT) {
648 chip->cc_attrs_tbl[i] &=
649 ~(GENMASK(2, 0) << TPM2_CC_ATTR_CHANDLES);
650 chip->cc_attrs_tbl[i] |= 1 << TPM2_CC_ATTR_CHANDLES;
651 }
652 }
653
654 out:
655 if (rc > 0)
656 rc = -ENODEV;
657 return rc;
658 }
659 EXPORT_SYMBOL_GPL(tpm2_get_cc_attrs_tbl);
660
661 /**
662 * tpm2_startup - turn on the TPM
663 * @chip: TPM chip to use
664 *
665 * Normally the firmware should start the TPM. This function is provided as a
666 * workaround if this does not happen. A legal case for this could be for
667 * example when a TPM emulator is used.
668 *
669 * Return: same as tpm_transmit_cmd()
670 */
671
tpm2_startup(struct tpm_chip * chip)672 static int tpm2_startup(struct tpm_chip *chip)
673 {
674 struct tpm_buf *buf __free(kfree) = NULL;
675
676 dev_info(&chip->dev, "starting up the TPM manually\n");
677
678 buf = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
679 if (!buf)
680 return -ENOMEM;
681
682 tpm_buf_init(buf, TPM_BUFSIZE);
683 tpm_buf_reset(buf, TPM2_ST_NO_SESSIONS, TPM2_CC_STARTUP);
684 tpm_buf_append_u16(buf, TPM2_SU_CLEAR);
685 return tpm_transmit_cmd(chip, buf, 0, "attempting to start the TPM");
686 }
687
688 /**
689 * tpm2_auto_startup - Perform the standard automatic TPM initialization
690 * sequence
691 * @chip: TPM chip to use
692 *
693 * Returns 0 on success, < 0 in case of fatal error.
694 */
tpm2_auto_startup(struct tpm_chip * chip)695 int tpm2_auto_startup(struct tpm_chip *chip)
696 {
697 int rc;
698
699 rc = tpm2_get_timeouts(chip);
700 if (rc)
701 goto out;
702
703 rc = tpm2_do_selftest(chip);
704 if (rc && rc != TPM2_RC_INITIALIZE)
705 goto out;
706
707 if (rc == TPM2_RC_INITIALIZE) {
708 rc = tpm2_startup(chip);
709 if (rc)
710 goto out;
711
712 rc = tpm2_do_selftest(chip);
713 if (rc)
714 goto out;
715 }
716
717 rc = tpm2_get_cc_attrs_tbl(chip);
718 if (rc == TPM2_RC_FAILURE || (rc < 0 && rc != -ENOMEM)) {
719 dev_info(&chip->dev,
720 "TPM in field failure mode, requires firmware upgrade\n");
721 chip->flags |= TPM_CHIP_FLAG_FIRMWARE_UPGRADE;
722 rc = 0;
723 }
724
725 if (rc)
726 goto out;
727
728 rc = tpm2_sessions_init(chip);
729
730 out:
731 /*
732 * Infineon TPM in field upgrade mode will return no data for the number
733 * of supported commands.
734 */
735 if (rc == TPM2_RC_UPGRADE || rc == -ENODATA) {
736 dev_info(&chip->dev, "TPM in field upgrade mode, requires firmware upgrade\n");
737 chip->flags |= TPM_CHIP_FLAG_FIRMWARE_UPGRADE;
738 rc = 0;
739 }
740
741 if (rc > 0)
742 rc = -ENODEV;
743 return rc;
744 }
745
tpm2_find_cc(struct tpm_chip * chip,u32 cc)746 int tpm2_find_cc(struct tpm_chip *chip, u32 cc)
747 {
748 u32 cc_mask;
749 int i;
750
751 cc_mask = 1 << TPM2_CC_ATTR_VENDOR | GENMASK(15, 0);
752 for (i = 0; i < chip->nr_commands; i++)
753 if (cc == (chip->cc_attrs_tbl[i] & cc_mask))
754 return i;
755
756 return -1;
757 }
758