1 // SPDX-License-Identifier: GPL-2.0 or MIT 2 /* Copyright 2025 ARM Limited. All rights reserved. */ 3 4 #include <linux/nvmem-consumer.h> 5 #include <drm/drm_print.h> 6 7 #include "panthor_device.h" 8 #include "panthor_gpu.h" 9 #include "panthor_hw.h" 10 #include "panthor_pwr.h" 11 #include "panthor_regs.h" 12 13 #define GPU_PROD_ID_MAKE(arch_major, prod_major) \ 14 (((arch_major) << 24) | (prod_major)) 15 16 /** struct panthor_hw_entry - HW arch major to panthor_hw binding entry */ 17 struct panthor_hw_entry { 18 /** @arch_min: Minimum supported architecture major value (inclusive) */ 19 u8 arch_min; 20 21 /** @arch_max: Maximum supported architecture major value (inclusive) */ 22 u8 arch_max; 23 24 /** @hwdev: Pointer to panthor_hw structure */ 25 struct panthor_hw *hwdev; 26 }; 27 28 static struct panthor_hw panthor_hw_arch_v10 = { 29 .ops = { 30 .soft_reset = panthor_gpu_soft_reset, 31 .l2_power_off = panthor_gpu_l2_power_off, 32 .l2_power_on = panthor_gpu_l2_power_on, 33 }, 34 }; 35 36 static struct panthor_hw panthor_hw_arch_v14 = { 37 .ops = { 38 .soft_reset = panthor_pwr_reset_soft, 39 .l2_power_off = panthor_pwr_l2_power_off, 40 .l2_power_on = panthor_pwr_l2_power_on, 41 }, 42 }; 43 44 static struct panthor_hw_entry panthor_hw_match[] = { 45 { 46 .arch_min = 10, 47 .arch_max = 13, 48 .hwdev = &panthor_hw_arch_v10, 49 }, 50 { 51 .arch_min = 14, 52 .arch_max = 14, 53 .hwdev = &panthor_hw_arch_v14, 54 }, 55 }; 56 57 static char *get_gpu_model_name(struct panthor_device *ptdev) 58 { 59 const u32 gpu_id = ptdev->gpu_info.gpu_id; 60 const u32 product_id = GPU_PROD_ID_MAKE(GPU_ARCH_MAJOR(gpu_id), 61 GPU_PROD_MAJOR(gpu_id)); 62 const bool ray_intersection = !!(ptdev->gpu_info.gpu_features & 63 GPU_FEATURES_RAY_INTERSECTION); 64 const u8 shader_core_count = hweight64(ptdev->gpu_info.shader_present); 65 66 switch (product_id) { 67 case GPU_PROD_ID_MAKE(10, 2): 68 return "Mali-G710"; 69 case GPU_PROD_ID_MAKE(10, 3): 70 return "Mali-G510"; 71 case GPU_PROD_ID_MAKE(10, 4): 72 return "Mali-G310"; 73 case GPU_PROD_ID_MAKE(10, 7): 74 return "Mali-G610"; 75 case GPU_PROD_ID_MAKE(11, 2): 76 if (shader_core_count > 10 && ray_intersection) 77 return "Mali-G715-Immortalis"; 78 else if (shader_core_count >= 7) 79 return "Mali-G715"; 80 81 fallthrough; 82 case GPU_PROD_ID_MAKE(11, 3): 83 return "Mali-G615"; 84 case GPU_PROD_ID_MAKE(12, 0): 85 if (shader_core_count >= 10 && ray_intersection) 86 return "Mali-G720-Immortalis"; 87 else if (shader_core_count >= 6) 88 return "Mali-G720"; 89 90 fallthrough; 91 case GPU_PROD_ID_MAKE(12, 1): 92 return "Mali-G620"; 93 case GPU_PROD_ID_MAKE(13, 0): 94 if (shader_core_count >= 10 && ray_intersection) 95 return "Mali-G925-Immortalis"; 96 else if (shader_core_count >= 6) 97 return "Mali-G725"; 98 99 fallthrough; 100 case GPU_PROD_ID_MAKE(13, 1): 101 return "Mali-G625"; 102 case GPU_PROD_ID_MAKE(14, 0): 103 return "Mali-G1-Ultra"; 104 case GPU_PROD_ID_MAKE(14, 1): 105 return "Mali-G1-Premium"; 106 case GPU_PROD_ID_MAKE(14, 3): 107 return "Mali-G1-Pro"; 108 } 109 110 return "(Unknown Mali GPU)"; 111 } 112 113 static int overload_shader_present(struct panthor_device *ptdev) 114 { 115 u64 contents; 116 int ret; 117 118 ret = nvmem_cell_read_variable_le_u64(ptdev->base.dev, "shader-present", 119 &contents); 120 if (!ret) 121 ptdev->gpu_info.shader_present = contents; 122 else if (ret == -ENOENT) 123 return 0; 124 else 125 return dev_err_probe(ptdev->base.dev, ret, 126 "Failed to read shader-present nvmem cell\n"); 127 128 return 0; 129 } 130 131 static int panthor_gpu_info_init(struct panthor_device *ptdev) 132 { 133 unsigned int i; 134 135 ptdev->gpu_info.csf_id = gpu_read(ptdev, GPU_CSF_ID); 136 ptdev->gpu_info.gpu_rev = gpu_read(ptdev, GPU_REVID); 137 ptdev->gpu_info.core_features = gpu_read(ptdev, GPU_CORE_FEATURES); 138 ptdev->gpu_info.l2_features = gpu_read(ptdev, GPU_L2_FEATURES); 139 ptdev->gpu_info.tiler_features = gpu_read(ptdev, GPU_TILER_FEATURES); 140 ptdev->gpu_info.mem_features = gpu_read(ptdev, GPU_MEM_FEATURES); 141 ptdev->gpu_info.mmu_features = gpu_read(ptdev, GPU_MMU_FEATURES); 142 ptdev->gpu_info.thread_features = gpu_read(ptdev, GPU_THREAD_FEATURES); 143 ptdev->gpu_info.max_threads = gpu_read(ptdev, GPU_THREAD_MAX_THREADS); 144 ptdev->gpu_info.thread_max_workgroup_size = gpu_read(ptdev, GPU_THREAD_MAX_WORKGROUP_SIZE); 145 ptdev->gpu_info.thread_max_barrier_size = gpu_read(ptdev, GPU_THREAD_MAX_BARRIER_SIZE); 146 ptdev->gpu_info.coherency_features = gpu_read(ptdev, GPU_COHERENCY_FEATURES); 147 for (i = 0; i < 4; i++) 148 ptdev->gpu_info.texture_features[i] = gpu_read(ptdev, GPU_TEXTURE_FEATURES(i)); 149 150 ptdev->gpu_info.as_present = gpu_read(ptdev, GPU_AS_PRESENT); 151 152 /* Introduced in arch 11.x */ 153 ptdev->gpu_info.gpu_features = gpu_read64(ptdev, GPU_FEATURES); 154 155 if (panthor_hw_has_pwr_ctrl(ptdev)) { 156 /* Introduced in arch 14.x */ 157 ptdev->gpu_info.l2_present = gpu_read64(ptdev, PWR_L2_PRESENT); 158 ptdev->gpu_info.tiler_present = gpu_read64(ptdev, PWR_TILER_PRESENT); 159 ptdev->gpu_info.shader_present = gpu_read64(ptdev, PWR_SHADER_PRESENT); 160 } else { 161 ptdev->gpu_info.shader_present = gpu_read64(ptdev, GPU_SHADER_PRESENT); 162 ptdev->gpu_info.tiler_present = gpu_read64(ptdev, GPU_TILER_PRESENT); 163 ptdev->gpu_info.l2_present = gpu_read64(ptdev, GPU_L2_PRESENT); 164 } 165 166 return overload_shader_present(ptdev); 167 } 168 169 static int panthor_hw_info_init(struct panthor_device *ptdev) 170 { 171 u32 major, minor, status; 172 int ret; 173 174 ret = panthor_gpu_info_init(ptdev); 175 if (ret) 176 return ret; 177 178 major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id); 179 minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id); 180 status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id); 181 182 drm_info(&ptdev->base, 183 "%s id 0x%x major 0x%x minor 0x%x status 0x%x", 184 get_gpu_model_name(ptdev), ptdev->gpu_info.gpu_id >> 16, 185 major, minor, status); 186 187 drm_info(&ptdev->base, 188 "Features: L2:%#x Tiler:%#x Mem:%#x MMU:%#x AS:%#x", 189 ptdev->gpu_info.l2_features, 190 ptdev->gpu_info.tiler_features, 191 ptdev->gpu_info.mem_features, 192 ptdev->gpu_info.mmu_features, 193 ptdev->gpu_info.as_present); 194 195 drm_info(&ptdev->base, 196 "shader_present=0x%0llx l2_present=0x%0llx tiler_present=0x%0llx", 197 ptdev->gpu_info.shader_present, ptdev->gpu_info.l2_present, 198 ptdev->gpu_info.tiler_present); 199 200 return 0; 201 } 202 203 static int panthor_hw_bind_device(struct panthor_device *ptdev) 204 { 205 struct panthor_hw *hdev = NULL; 206 const u32 arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id); 207 int i = 0; 208 209 for (i = 0; i < ARRAY_SIZE(panthor_hw_match); i++) { 210 struct panthor_hw_entry *entry = &panthor_hw_match[i]; 211 212 if (arch_major >= entry->arch_min && arch_major <= entry->arch_max) { 213 hdev = entry->hwdev; 214 break; 215 } 216 } 217 218 if (!hdev) 219 return -EOPNOTSUPP; 220 221 ptdev->hw = hdev; 222 223 return 0; 224 } 225 226 static int panthor_hw_gpu_id_init(struct panthor_device *ptdev) 227 { 228 ptdev->gpu_info.gpu_id = gpu_read(ptdev, GPU_ID); 229 if (!ptdev->gpu_info.gpu_id) 230 return -ENXIO; 231 232 return 0; 233 } 234 235 int panthor_hw_init(struct panthor_device *ptdev) 236 { 237 int ret = 0; 238 239 ret = panthor_hw_gpu_id_init(ptdev); 240 if (ret) 241 return ret; 242 243 ret = panthor_hw_bind_device(ptdev); 244 if (ret) 245 return ret; 246 247 return panthor_hw_info_init(ptdev); 248 } 249