1// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/leds/common.h> 11#include <dt-bindings/regulator/st,stm32mp25-regulator.h> 12#include "stm32mp257.dtsi" 13#include "stm32mp25xf.dtsi" 14#include "stm32mp25-pinctrl.dtsi" 15#include "stm32mp25xxai-pinctrl.dtsi" 16 17/ { 18 model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board"; 19 compatible = "st,stm32mp257f-ev1", "st,stm32mp257"; 20 21 aliases { 22 ethernet0 = ðernet2; 23 ethernet1 = ðernet1; 24 serial0 = &usart2; 25 serial1 = &usart6; 26 }; 27 28 chosen { 29 stdout-path = "serial0:115200n8"; 30 }; 31 32 clocks { 33 clk_ext_camera: clk-ext-camera { 34 #clock-cells = <0>; 35 compatible = "fixed-clock"; 36 clock-frequency = <24000000>; 37 }; 38 39 pad_clk: pad-clk { 40 #clock-cells = <0>; 41 compatible = "fixed-clock"; 42 clock-frequency = <100000000>; 43 }; 44 }; 45 46 gpio-leds { 47 compatible = "gpio-leds"; 48 49 led_blue: led-blue { 50 function = LED_FUNCTION_HEARTBEAT; 51 color = <LED_COLOR_ID_BLUE>; 52 gpios = <&gpioj 7 GPIO_ACTIVE_HIGH>; 53 linux,default-trigger = "heartbeat"; 54 default-state = "off"; 55 }; 56 57 led-green { 58 color = <LED_COLOR_ID_GREEN>; 59 gpios = <&gpiod 8 GPIO_ACTIVE_HIGH>; 60 }; 61 62 led-orange { 63 color = <LED_COLOR_ID_ORANGE>; 64 gpios = <&gpioj 6 GPIO_ACTIVE_HIGH>; 65 }; 66 }; 67 68 ddr_channel: sdram-channel-0 { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 compatible = "jedec,ddr4-channel"; 72 io-width = <32>; 73 }; 74 75 imx335_2v9: regulator-2v9 { 76 compatible = "regulator-fixed"; 77 regulator-name = "imx335-avdd"; 78 regulator-min-microvolt = <2900000>; 79 regulator-max-microvolt = <2900000>; 80 regulator-always-on; 81 }; 82 83 imx335_1v8: regulator-1v8 { 84 compatible = "regulator-fixed"; 85 regulator-name = "imx335-ovdd"; 86 regulator-min-microvolt = <1800000>; 87 regulator-max-microvolt = <1800000>; 88 regulator-always-on; 89 }; 90 91 imx335_1v2: regulator-1v2 { 92 compatible = "regulator-fixed"; 93 regulator-name = "imx335-dvdd"; 94 regulator-min-microvolt = <1200000>; 95 regulator-max-microvolt = <1200000>; 96 regulator-always-on; 97 }; 98 99 memory@80000000 { 100 device_type = "memory"; 101 reg = <0x0 0x80000000 0x1 0x0>; 102 }; 103 104 options { 105 u-boot { 106 compatible = "u-boot,config"; 107 boot-led = <&led_blue>; 108 }; 109 }; 110 111 panel_lvds: display { 112 compatible = "edt,etml0700z9ndha", "panel-lvds"; 113 enable-gpios = <&gpiog 15 GPIO_ACTIVE_HIGH>; 114 backlight = <&panel_lvds_backlight>; 115 power-supply = <&scmi_v3v3>; 116 width-mm = <156>; 117 height-mm = <92>; 118 data-mapping = "vesa-24"; 119 status = "okay"; 120 121 panel-timing { 122 clock-frequency = <54000000>; 123 hactive = <1024>; 124 vactive = <600>; 125 hfront-porch = <150>; 126 hback-porch = <150>; 127 hsync-len = <21>; 128 vfront-porch = <24>; 129 vback-porch = <24>; 130 vsync-len = <21>; 131 }; 132 133 port { 134 lvds_panel_in: endpoint { 135 remote-endpoint = <&lvds_out0>; 136 }; 137 }; 138 }; 139 140 panel_lvds_backlight: backlight { 141 compatible = "gpio-backlight"; 142 gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>; 143 default-on; 144 status = "okay"; 145 }; 146 147 reserved-memory { 148 #address-cells = <2>; 149 #size-cells = <2>; 150 ranges; 151 152 fw@80000000 { 153 compatible = "shared-dma-pool"; 154 reg = <0x0 0x80000000 0x0 0x4000000>; 155 no-map; 156 }; 157 158 mm_ospi1: mm-ospi@60000000 { 159 reg = <0x0 0x60000000 0x0 0x10000000>; 160 no-map; 161 }; 162 }; 163}; 164 165&arm_wdt { 166 timeout-sec = <32>; 167 status = "okay"; 168}; 169 170&combophy { 171 clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>, <&pad_clk>; 172 clock-names = "apb", "ker", "pad"; 173 status = "okay"; 174}; 175 176&csi { 177 vdd-supply = <&scmi_vddcore>; 178 vdda18-supply = <&scmi_v1v8>; 179 status = "okay"; 180 ports { 181 #address-cells = <1>; 182 #size-cells = <0>; 183 port@0 { 184 reg = <0>; 185 csi_sink: endpoint { 186 remote-endpoint = <&imx335_ep>; 187 data-lanes = <1 2>; 188 bus-type = <4>; 189 }; 190 }; 191 port@1 { 192 reg = <1>; 193 csi_source: endpoint { 194 remote-endpoint = <&dcmipp_0>; 195 }; 196 }; 197 }; 198}; 199 200&dcmipp { 201 status = "okay"; 202 port { 203 dcmipp_0: endpoint { 204 remote-endpoint = <&csi_source>; 205 bus-type = <4>; 206 }; 207 }; 208}; 209 210ðernet1 { 211 pinctrl-0 = <ð1_rgmii_pins_a ð1_mdio_pins_a>; 212 pinctrl-1 = <ð1_rgmii_sleep_pins_a ð1_mdio_sleep_pins_a>; 213 pinctrl-names = "default", "sleep"; 214 phy-handle = <&phy1_eth1>; 215 phy-mode = "rgmii-id"; 216 st,ext-phyclk; 217 status = "okay"; 218 219 mdio { 220 #address-cells = <1>; 221 #size-cells = <0>; 222 compatible = "snps,dwmac-mdio"; 223 phy1_eth1: ethernet-phy@4 { 224 compatible = "ethernet-phy-id001c.c916"; 225 reg = <4>; 226 reset-gpios = <&gpioj 9 GPIO_ACTIVE_LOW>; 227 reset-assert-us = <10000>; 228 reset-deassert-us = <80000>; 229 }; 230 }; 231}; 232 233ðernet2 { 234 pinctrl-names = "default", "sleep"; 235 pinctrl-0 = <ð2_rgmii_pins_a>; 236 pinctrl-1 = <ð2_rgmii_sleep_pins_a>; 237 max-speed = <1000>; 238 phy-handle = <&phy0_eth2>; 239 phy-mode = "rgmii-id"; 240 status = "okay"; 241 242 mdio { 243 #address-cells = <1>; 244 #size-cells = <0>; 245 compatible = "snps,dwmac-mdio"; 246 phy0_eth2: ethernet-phy@1 { 247 compatible = "ethernet-phy-id001c.c916"; 248 reg = <1>; 249 reset-assert-us = <10000>; 250 reset-deassert-us = <300>; 251 reset-gpios = <&gpiog 6 GPIO_ACTIVE_LOW>; 252 }; 253 }; 254}; 255 256&i2c2 { 257 pinctrl-names = "default", "sleep"; 258 pinctrl-0 = <&i2c2_pins_a>; 259 pinctrl-1 = <&i2c2_sleep_pins_a>; 260 i2c-scl-rising-time-ns = <100>; 261 i2c-scl-falling-time-ns = <13>; 262 clock-frequency = <400000>; 263 status = "okay"; 264 265 imx335: camera@1a { 266 compatible = "sony,imx335"; 267 reg = <0x1a>; 268 clocks = <&clk_ext_camera>; 269 avdd-supply = <&imx335_2v9>; 270 ovdd-supply = <&imx335_1v8>; 271 dvdd-supply = <&imx335_1v2>; 272 reset-gpios = <&gpioi 7 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; 273 274 port { 275 imx335_ep: endpoint { 276 remote-endpoint = <&csi_sink>; 277 clock-lanes = <0>; 278 data-lanes = <1 2>; 279 link-frequencies = /bits/ 64 <594000000>; 280 }; 281 }; 282 }; 283 284 ili2511: ili2511@41 { 285 compatible = "ilitek,ili251x"; 286 reg = <0x41>; 287 interrupt-parent = <&gpioi>; 288 interrupts = <13 IRQ_TYPE_EDGE_FALLING>; 289 reset-gpios = <&gpiog 14 GPIO_ACTIVE_LOW>; 290 status = "okay"; 291 }; 292}; 293 294&i2c8 { 295 pinctrl-names = "default", "sleep"; 296 pinctrl-0 = <&i2c8_pins_a>; 297 pinctrl-1 = <&i2c8_sleep_pins_a>; 298 i2c-scl-rising-time-ns = <57>; 299 i2c-scl-falling-time-ns = <7>; 300 clock-frequency = <400000>; 301 status = "disabled"; 302}; 303 304&ommanager { 305 memory-region = <&mm_ospi1>; 306 memory-region-names = "ospi1"; 307 pinctrl-0 = <&ospi_port1_clk_pins_a 308 &ospi_port1_io03_pins_a 309 &ospi_port1_cs0_pins_a>; 310 pinctrl-1 = <&ospi_port1_clk_sleep_pins_a 311 &ospi_port1_io03_sleep_pins_a 312 &ospi_port1_cs0_sleep_pins_a>; 313 pinctrl-names = "default", "sleep"; 314 status = "okay"; 315 316 spi@0 { 317 #address-cells = <1>; 318 #size-cells = <0>; 319 memory-region = <&mm_ospi1>; 320 status = "okay"; 321 322 flash0: flash@0 { 323 compatible = "jedec,spi-nor"; 324 reg = <0>; 325 spi-rx-bus-width = <4>; 326 spi-tx-bus-width = <4>; 327 spi-max-frequency = <50000000>; 328 }; 329 }; 330}; 331 332/* use LPTIMER with tick broadcast for suspend mode */ 333&lptimer3 { 334 status = "okay"; 335 timer { 336 status = "okay"; 337 }; 338}; 339 340<dc { 341 status = "okay"; 342 port { 343 ltdc_ep0_out: endpoint { 344 remote-endpoint = <&lvds_in>; 345 }; 346 }; 347}; 348 349&lvds { 350 status = "okay"; 351 ports { 352 #address-cells = <1>; 353 #size-cells = <0>; 354 355 port@0 { 356 reg = <0>; 357 lvds_in: endpoint { 358 remote-endpoint = <<dc_ep0_out>; 359 }; 360 }; 361 362 port@1 { 363 reg = <1>; 364 lvds_out0: endpoint { 365 remote-endpoint = <&lvds_panel_in>; 366 }; 367 }; 368 }; 369}; 370 371&pcie_ep { 372 pinctrl-names = "default", "init"; 373 pinctrl-0 = <&pcie_pins_a>; 374 pinctrl-1 = <&pcie_init_pins_a>; 375 reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; 376 status = "disabled"; 377}; 378 379&pcie_rc { 380 pinctrl-names = "default", "init", "sleep"; 381 pinctrl-0 = <&pcie_pins_a>; 382 pinctrl-1 = <&pcie_init_pins_a>; 383 pinctrl-2 = <&pcie_sleep_pins_a>; 384 status = "okay"; 385 386 pcie@0,0 { 387 reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; 388 wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 389 }; 390}; 391 392&rtc { 393 status = "okay"; 394}; 395 396&scmi_regu { 397 scmi_vddio1: regulator@0 { 398 regulator-min-microvolt = <1800000>; 399 regulator-max-microvolt = <3300000>; 400 }; 401 scmi_vddcore: regulator@11 { 402 reg = <VOLTD_SCMI_STPMIC2_BUCK2>; 403 regulator-name = "vddcore"; 404 }; 405 scmi_v1v8: regulator@14 { 406 reg = <VOLTD_SCMI_STPMIC2_BUCK5>; 407 regulator-name = "v1v8"; 408 }; 409 scmi_v3v3: regulator@16 { 410 reg = <VOLTD_SCMI_STPMIC2_BUCK7>; 411 regulator-name = "v3v3"; 412 }; 413 scmi_vdd_emmc: regulator@18 { 414 reg = <VOLTD_SCMI_STPMIC2_LDO2>; 415 regulator-name = "vdd_emmc"; 416 }; 417 scmi_vdd3v3_usb: regulator@20 { 418 reg = <VOLTD_SCMI_STPMIC2_LDO4>; 419 regulator-name = "vdd3v3_usb"; 420 }; 421 scmi_vdd_sdcard: regulator@23 { 422 reg = <VOLTD_SCMI_STPMIC2_LDO7>; 423 regulator-name = "vdd_sdcard"; 424 }; 425}; 426 427&sdmmc1 { 428 pinctrl-names = "default", "opendrain", "sleep"; 429 pinctrl-0 = <&sdmmc1_b4_pins_a>; 430 pinctrl-1 = <&sdmmc1_b4_od_pins_a>; 431 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; 432 cd-gpios = <&gpiod 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 433 disable-wp; 434 st,neg-edge; 435 bus-width = <4>; 436 vmmc-supply = <&scmi_vdd_sdcard>; 437 vqmmc-supply = <&scmi_vddio1>; 438 status = "okay"; 439}; 440 441&spi3 { 442 pinctrl-names = "default", "sleep"; 443 pinctrl-0 = <&spi3_pins_a>; 444 pinctrl-1 = <&spi3_sleep_pins_a>; 445 status = "disabled"; 446}; 447 448&spi8 { 449 pinctrl-names = "default", "sleep"; 450 pinctrl-0 = <&spi8_pins_a>; 451 pinctrl-1 = <&spi8_sleep_pins_a>; 452 status = "disabled"; 453}; 454 455&timers3 { 456 status = "disabled"; 457 counter { 458 status = "okay"; 459 }; 460 pwm { 461 pinctrl-0 = <&pwm3_pins_a>; 462 pinctrl-1 = <&pwm3_sleep_pins_a>; 463 pinctrl-names = "default", "sleep"; 464 status = "okay"; 465 }; 466 timer@2 { 467 status = "okay"; 468 }; 469}; 470 471&timers8 { 472 status = "disabled"; 473 counter { 474 status = "okay"; 475 }; 476 pwm { 477 pinctrl-0 = <&pwm8_pins_a>; 478 pinctrl-1 = <&pwm8_sleep_pins_a>; 479 pinctrl-names = "default", "sleep"; 480 status = "okay"; 481 }; 482 timer@7 { 483 status = "okay"; 484 }; 485}; 486 487&timers10 { 488 status = "disabled"; 489 counter { 490 pinctrl-0 = <&tim10_counter_pins_a>; 491 pinctrl-1 = <&tim10_counter_sleep_pins_a>; 492 pinctrl-names = "default", "sleep"; 493 status = "okay"; 494 }; 495}; 496 497&timers12 { 498 status = "disabled"; 499 counter { 500 status = "okay"; 501 }; 502 pwm { 503 pinctrl-0 = <&pwm12_pins_a>; 504 pinctrl-1 = <&pwm12_sleep_pins_a>; 505 pinctrl-names = "default", "sleep"; 506 status = "okay"; 507 }; 508 timer@11 { 509 status = "okay"; 510 }; 511}; 512 513&usart2 { 514 pinctrl-names = "default", "idle", "sleep"; 515 pinctrl-0 = <&usart2_pins_a>; 516 pinctrl-1 = <&usart2_idle_pins_a>; 517 pinctrl-2 = <&usart2_sleep_pins_a>; 518 /delete-property/dmas; 519 /delete-property/dma-names; 520 status = "okay"; 521}; 522 523&usart6 { 524 pinctrl-names = "default", "idle", "sleep"; 525 pinctrl-0 = <&usart6_pins_a>; 526 pinctrl-1 = <&usart6_idle_pins_a>; 527 pinctrl-2 = <&usart6_sleep_pins_a>; 528 uart-has-rtscts; 529 status = "disabled"; 530}; 531