xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/priv.h (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1 /* SPDX-License-Identifier: MIT */
2 #ifndef __NVKM_I2C_PRIV_H__
3 #define __NVKM_I2C_PRIV_H__
4 #define nvkm_i2c(p) container_of((p), struct nvkm_i2c, subdev)
5 #include <subdev/i2c.h>
6 
7 int nvkm_i2c_new_(const struct nvkm_i2c_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
8 		  struct nvkm_i2c **);
9 
10 struct nvkm_i2c_func {
11 	int (*pad_x_new)(struct nvkm_i2c *, int id, struct nvkm_i2c_pad **);
12 	int (*pad_s_new)(struct nvkm_i2c *, int id, struct nvkm_i2c_pad **);
13 
14 	/* number of native dp aux channels present */
15 	int aux;
16 
17 	/* read and ack pending interrupts, returning only data
18 	 * for ports that have not been masked off, while still
19 	 * performing the ack for anything that was pending.
20 	 */
21 	void (*aux_stat)(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
22 
23 	/* mask on/off interrupt types for a given set of auxch
24 	 */
25 	void (*aux_mask)(struct nvkm_i2c *, u32, u32, u32);
26 
27 	/* enable/disable HW-initiated DPCD reads
28 	 */
29 	void (*aux_autodpcd)(struct nvkm_i2c *, int aux, bool enable);
30 };
31 
32 void g94_aux_stat(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
33 void g94_aux_mask(struct nvkm_i2c *, u32, u32, u32);
34 
35 void gk104_aux_stat(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
36 void gk104_aux_mask(struct nvkm_i2c *, u32, u32, u32);
37 #endif
38