xref: /linux/drivers/net/wireless/intersil/p54/p54spi.c (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
4  * Copyright 2008       Johannes Berg <johannes@sipsolutions.net>
5  *
6  * This driver is a port from stlc45xx:
7  *	Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
8  */
9 
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/interrupt.h>
13 #include <linux/firmware.h>
14 #include <linux/delay.h>
15 #include <linux/irq.h>
16 #include <linux/spi/spi.h>
17 #include <linux/etherdevice.h>
18 #include <linux/gpio.h>
19 #include <linux/slab.h>
20 
21 #include "p54spi.h"
22 #include "p54.h"
23 
24 #include "lmac.h"
25 
26 #ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
27 #include "p54spi_eeprom.h"
28 #endif /* CONFIG_P54_SPI_DEFAULT_EEPROM */
29 
30 MODULE_FIRMWARE("3826.arm");
31 MODULE_FIRMWARE("3826.eeprom");
32 
33 /* gpios should be handled in board files and provided via platform data,
34  * but because it's currently impossible for p54spi to have a header file
35  * in include/linux, let's use module paramaters for now
36  */
37 
38 static int p54spi_gpio_power = 97;
39 module_param(p54spi_gpio_power, int, 0444);
40 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
41 
42 static int p54spi_gpio_irq = 87;
43 module_param(p54spi_gpio_irq, int, 0444);
44 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
45 
p54spi_spi_read(struct p54s_priv * priv,u8 address,void * buf,size_t len)46 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
47 			      void *buf, size_t len)
48 {
49 	struct spi_transfer t[2];
50 	struct spi_message m;
51 	__le16 addr;
52 
53 	/* We first push the address */
54 	addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
55 
56 	spi_message_init(&m);
57 	memset(t, 0, sizeof(t));
58 
59 	t[0].tx_buf = &addr;
60 	t[0].len = sizeof(addr);
61 	spi_message_add_tail(&t[0], &m);
62 
63 	t[1].rx_buf = buf;
64 	t[1].len = len;
65 	spi_message_add_tail(&t[1], &m);
66 
67 	spi_sync(priv->spi, &m);
68 }
69 
70 
p54spi_spi_write(struct p54s_priv * priv,u8 address,const void * buf,size_t len)71 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
72 			     const void *buf, size_t len)
73 {
74 	struct spi_transfer t[3];
75 	struct spi_message m;
76 	__le16 addr;
77 
78 	/* We first push the address */
79 	addr = cpu_to_le16(address << 8);
80 
81 	spi_message_init(&m);
82 	memset(t, 0, sizeof(t));
83 
84 	t[0].tx_buf = &addr;
85 	t[0].len = sizeof(addr);
86 	spi_message_add_tail(&t[0], &m);
87 
88 	t[1].tx_buf = buf;
89 	t[1].len = len & ~1;
90 	spi_message_add_tail(&t[1], &m);
91 
92 	if (len % 2) {
93 		__le16 last_word;
94 		last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
95 
96 		t[2].tx_buf = &last_word;
97 		t[2].len = sizeof(last_word);
98 		spi_message_add_tail(&t[2], &m);
99 	}
100 
101 	spi_sync(priv->spi, &m);
102 }
103 
p54spi_read32(struct p54s_priv * priv,u8 addr)104 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
105 {
106 	__le32 val;
107 
108 	p54spi_spi_read(priv, addr, &val, sizeof(val));
109 
110 	return le32_to_cpu(val);
111 }
112 
p54spi_write16(struct p54s_priv * priv,u8 addr,__le16 val)113 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
114 {
115 	p54spi_spi_write(priv, addr, &val, sizeof(val));
116 }
117 
p54spi_write32(struct p54s_priv * priv,u8 addr,__le32 val)118 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
119 {
120 	p54spi_spi_write(priv, addr, &val, sizeof(val));
121 }
122 
p54spi_wait_bit(struct p54s_priv * priv,u16 reg,u32 bits)123 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, u32 bits)
124 {
125 	int i;
126 
127 	for (i = 0; i < 2000; i++) {
128 		u32 buffer = p54spi_read32(priv, reg);
129 		if ((buffer & bits) == bits)
130 			return 1;
131 	}
132 	return 0;
133 }
134 
p54spi_spi_write_dma(struct p54s_priv * priv,__le32 base,const void * buf,size_t len)135 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
136 				const void *buf, size_t len)
137 {
138 	if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, HOST_ALLOWED)) {
139 		dev_err(&priv->spi->dev, "spi_write_dma not allowed "
140 			"to DMA write.\n");
141 		return -EAGAIN;
142 	}
143 
144 	p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
145 		       cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
146 
147 	p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
148 	p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
149 	p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
150 	return 0;
151 }
152 
p54spi_request_firmware(struct ieee80211_hw * dev)153 static int p54spi_request_firmware(struct ieee80211_hw *dev)
154 {
155 	struct p54s_priv *priv = dev->priv;
156 	int ret;
157 
158 	/* FIXME: should driver use it's own struct device? */
159 	ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
160 
161 	if (ret < 0) {
162 		dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
163 		return ret;
164 	}
165 
166 	ret = p54_parse_firmware(dev, priv->firmware);
167 	if (ret) {
168 		/* the firmware is released by the caller */
169 		return ret;
170 	}
171 
172 	return 0;
173 }
174 
p54spi_request_eeprom(struct ieee80211_hw * dev)175 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
176 {
177 	struct p54s_priv *priv = dev->priv;
178 	const struct firmware *eeprom;
179 	int ret;
180 
181 	/* allow users to customize their eeprom.
182 	 */
183 
184 	ret = request_firmware_direct(&eeprom, "3826.eeprom", &priv->spi->dev);
185 	if (ret < 0) {
186 #ifdef CONFIG_P54_SPI_DEFAULT_EEPROM
187 		dev_info(&priv->spi->dev, "loading default eeprom...\n");
188 		ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
189 				       sizeof(p54spi_eeprom));
190 #else
191 		dev_err(&priv->spi->dev, "Failed to request user eeprom\n");
192 #endif /* CONFIG_P54_SPI_DEFAULT_EEPROM */
193 	} else {
194 		dev_info(&priv->spi->dev, "loading user eeprom...\n");
195 		ret = p54_parse_eeprom(dev, (void *) eeprom->data,
196 				       (int)eeprom->size);
197 		release_firmware(eeprom);
198 	}
199 	return ret;
200 }
201 
p54spi_upload_firmware(struct ieee80211_hw * dev)202 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
203 {
204 	struct p54s_priv *priv = dev->priv;
205 	unsigned long fw_len, _fw_len;
206 	unsigned int offset = 0;
207 	int err = 0;
208 	u8 *fw;
209 
210 	fw_len = priv->firmware->size;
211 	fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
212 	if (!fw)
213 		return -ENOMEM;
214 
215 	/* stop the device */
216 	p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
217 		       SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
218 		       SPI_CTRL_STAT_START_HALTED));
219 
220 	msleep(TARGET_BOOT_SLEEP);
221 
222 	p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
223 		       SPI_CTRL_STAT_HOST_OVERRIDE |
224 		       SPI_CTRL_STAT_START_HALTED));
225 
226 	msleep(TARGET_BOOT_SLEEP);
227 
228 	while (fw_len > 0) {
229 		_fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
230 
231 		err = p54spi_spi_write_dma(priv, cpu_to_le32(
232 					   ISL38XX_DEV_FIRMWARE_ADDR + offset),
233 					   (fw + offset), _fw_len);
234 		if (err < 0)
235 			goto out;
236 
237 		fw_len -= _fw_len;
238 		offset += _fw_len;
239 	}
240 
241 	BUG_ON(fw_len != 0);
242 
243 	/* enable host interrupts */
244 	p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
245 		       cpu_to_le32(SPI_HOST_INTS_DEFAULT));
246 
247 	/* boot the device */
248 	p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
249 		       SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
250 		       SPI_CTRL_STAT_RAM_BOOT));
251 
252 	msleep(TARGET_BOOT_SLEEP);
253 
254 	p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
255 		       SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
256 	msleep(TARGET_BOOT_SLEEP);
257 
258 out:
259 	kfree(fw);
260 	return err;
261 }
262 
p54spi_power_off(struct p54s_priv * priv)263 static void p54spi_power_off(struct p54s_priv *priv)
264 {
265 	disable_irq(gpio_to_irq(p54spi_gpio_irq));
266 	gpio_set_value(p54spi_gpio_power, 0);
267 }
268 
p54spi_power_on(struct p54s_priv * priv)269 static void p54spi_power_on(struct p54s_priv *priv)
270 {
271 	gpio_set_value(p54spi_gpio_power, 1);
272 	enable_irq(gpio_to_irq(p54spi_gpio_irq));
273 
274 	/* need to wait a while before device can be accessed, the length
275 	 * is just a guess
276 	 */
277 	msleep(10);
278 }
279 
p54spi_int_ack(struct p54s_priv * priv,u32 val)280 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
281 {
282 	p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
283 }
284 
p54spi_wakeup(struct p54s_priv * priv)285 static int p54spi_wakeup(struct p54s_priv *priv)
286 {
287 	/* wake the chip */
288 	p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
289 		       cpu_to_le32(SPI_TARGET_INT_WAKEUP));
290 
291 	/* And wait for the READY interrupt */
292 	if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
293 			     SPI_HOST_INT_READY)) {
294 		dev_err(&priv->spi->dev, "INT_READY timeout\n");
295 		return -EBUSY;
296 	}
297 
298 	p54spi_int_ack(priv, SPI_HOST_INT_READY);
299 	return 0;
300 }
301 
p54spi_sleep(struct p54s_priv * priv)302 static inline void p54spi_sleep(struct p54s_priv *priv)
303 {
304 	p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
305 		       cpu_to_le32(SPI_TARGET_INT_SLEEP));
306 }
307 
p54spi_int_ready(struct p54s_priv * priv)308 static void p54spi_int_ready(struct p54s_priv *priv)
309 {
310 	p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
311 		       SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
312 
313 	switch (priv->fw_state) {
314 	case FW_STATE_BOOTING:
315 		priv->fw_state = FW_STATE_READY;
316 		complete(&priv->fw_comp);
317 		break;
318 	case FW_STATE_RESETTING:
319 		priv->fw_state = FW_STATE_READY;
320 		/* TODO: reinitialize state */
321 		break;
322 	default:
323 		break;
324 	}
325 }
326 
p54spi_rx(struct p54s_priv * priv)327 static int p54spi_rx(struct p54s_priv *priv)
328 {
329 	struct sk_buff *skb;
330 	u16 len;
331 	u16 rx_head[2];
332 #define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
333 
334 	if (p54spi_wakeup(priv) < 0)
335 		return -EBUSY;
336 
337 	/* Read data size and first data word in one SPI transaction
338 	 * This is workaround for firmware/DMA bug,
339 	 * when first data word gets lost under high load.
340 	 */
341 	p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
342 	len = rx_head[0];
343 
344 	if (len == 0) {
345 		p54spi_sleep(priv);
346 		dev_err(&priv->spi->dev, "rx request of zero bytes\n");
347 		return 0;
348 	}
349 
350 	/* Firmware may insert up to 4 padding bytes after the lmac header,
351 	 * but it does not amend the size of SPI data transfer.
352 	 * Such packets has correct data size in header, thus referencing
353 	 * past the end of allocated skb. Reserve extra 4 bytes for this case
354 	 */
355 	skb = dev_alloc_skb(len + 4);
356 	if (!skb) {
357 		p54spi_sleep(priv);
358 		dev_err(&priv->spi->dev, "could not alloc skb");
359 		return -ENOMEM;
360 	}
361 
362 	if (len <= READAHEAD_SZ) {
363 		skb_put_data(skb, rx_head + 1, len);
364 	} else {
365 		skb_put_data(skb, rx_head + 1, READAHEAD_SZ);
366 		p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
367 				skb_put(skb, len - READAHEAD_SZ),
368 				len - READAHEAD_SZ);
369 	}
370 	p54spi_sleep(priv);
371 	/* Put additional bytes to compensate for the possible
372 	 * alignment-caused truncation
373 	 */
374 	skb_put(skb, 4);
375 
376 	if (p54_rx(priv->hw, skb) == 0)
377 		dev_kfree_skb(skb);
378 
379 	return 0;
380 }
381 
382 
p54spi_interrupt(int irq,void * config)383 static irqreturn_t p54spi_interrupt(int irq, void *config)
384 {
385 	struct spi_device *spi = config;
386 	struct p54s_priv *priv = spi_get_drvdata(spi);
387 
388 	ieee80211_queue_work(priv->hw, &priv->work);
389 
390 	return IRQ_HANDLED;
391 }
392 
p54spi_tx_frame(struct p54s_priv * priv,struct sk_buff * skb)393 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
394 {
395 	struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
396 	int ret = 0;
397 
398 	if (p54spi_wakeup(priv) < 0)
399 		return -EBUSY;
400 
401 	ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
402 	if (ret < 0)
403 		goto out;
404 
405 	if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
406 			     SPI_HOST_INT_WR_READY)) {
407 		dev_err(&priv->spi->dev, "WR_READY timeout\n");
408 		ret = -EAGAIN;
409 		goto out;
410 	}
411 
412 	p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
413 
414 	if (FREE_AFTER_TX(skb))
415 		p54_free_skb(priv->hw, skb);
416 out:
417 	p54spi_sleep(priv);
418 	return ret;
419 }
420 
p54spi_wq_tx(struct p54s_priv * priv)421 static int p54spi_wq_tx(struct p54s_priv *priv)
422 {
423 	struct p54s_tx_info *entry;
424 	struct sk_buff *skb;
425 	struct ieee80211_tx_info *info;
426 	struct p54_tx_info *minfo;
427 	struct p54s_tx_info *dinfo;
428 	unsigned long flags;
429 	int ret = 0;
430 
431 	spin_lock_irqsave(&priv->tx_lock, flags);
432 
433 	while (!list_empty(&priv->tx_pending)) {
434 		entry = list_entry(priv->tx_pending.next,
435 				   struct p54s_tx_info, tx_list);
436 
437 		list_del_init(&entry->tx_list);
438 
439 		spin_unlock_irqrestore(&priv->tx_lock, flags);
440 
441 		dinfo = container_of((void *) entry, struct p54s_tx_info,
442 				     tx_list);
443 		minfo = container_of((void *) dinfo, struct p54_tx_info,
444 				     data);
445 		info = container_of((void *) minfo, struct ieee80211_tx_info,
446 				    rate_driver_data);
447 		skb = container_of((void *) info, struct sk_buff, cb);
448 
449 		ret = p54spi_tx_frame(priv, skb);
450 
451 		if (ret < 0) {
452 			p54_free_skb(priv->hw, skb);
453 			return ret;
454 		}
455 
456 		spin_lock_irqsave(&priv->tx_lock, flags);
457 	}
458 	spin_unlock_irqrestore(&priv->tx_lock, flags);
459 	return ret;
460 }
461 
p54spi_op_tx(struct ieee80211_hw * dev,struct sk_buff * skb)462 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
463 {
464 	struct p54s_priv *priv = dev->priv;
465 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
466 	struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
467 	struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
468 	unsigned long flags;
469 
470 	BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
471 
472 	spin_lock_irqsave(&priv->tx_lock, flags);
473 	list_add_tail(&di->tx_list, &priv->tx_pending);
474 	spin_unlock_irqrestore(&priv->tx_lock, flags);
475 
476 	ieee80211_queue_work(priv->hw, &priv->work);
477 }
478 
p54spi_work(struct work_struct * work)479 static void p54spi_work(struct work_struct *work)
480 {
481 	struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
482 	u32 ints;
483 	int ret;
484 
485 	mutex_lock(&priv->mutex);
486 
487 	if (priv->fw_state == FW_STATE_OFF)
488 		goto out;
489 
490 	ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
491 
492 	if (ints & SPI_HOST_INT_READY) {
493 		p54spi_int_ready(priv);
494 		p54spi_int_ack(priv, SPI_HOST_INT_READY);
495 	}
496 
497 	if (priv->fw_state != FW_STATE_READY)
498 		goto out;
499 
500 	if (ints & SPI_HOST_INT_UPDATE) {
501 		p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
502 		ret = p54spi_rx(priv);
503 		if (ret < 0)
504 			goto out;
505 	}
506 	if (ints & SPI_HOST_INT_SW_UPDATE) {
507 		p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
508 		ret = p54spi_rx(priv);
509 		if (ret < 0)
510 			goto out;
511 	}
512 
513 	ret = p54spi_wq_tx(priv);
514 out:
515 	mutex_unlock(&priv->mutex);
516 }
517 
p54spi_op_start(struct ieee80211_hw * dev)518 static int p54spi_op_start(struct ieee80211_hw *dev)
519 {
520 	struct p54s_priv *priv = dev->priv;
521 	long time_left;
522 	int ret = 0;
523 
524 	if (mutex_lock_interruptible(&priv->mutex)) {
525 		ret = -EINTR;
526 		goto out;
527 	}
528 
529 	priv->fw_state = FW_STATE_BOOTING;
530 
531 	p54spi_power_on(priv);
532 
533 	ret = p54spi_upload_firmware(dev);
534 	if (ret < 0) {
535 		p54spi_power_off(priv);
536 		goto out_unlock;
537 	}
538 
539 	mutex_unlock(&priv->mutex);
540 
541 	time_left = msecs_to_jiffies(2000);
542 	time_left = wait_for_completion_interruptible_timeout(&priv->fw_comp,
543 							      time_left);
544 	if (!time_left) {
545 		dev_err(&priv->spi->dev, "firmware boot failed");
546 		p54spi_power_off(priv);
547 		ret = -1;
548 		goto out;
549 	}
550 
551 	if (mutex_lock_interruptible(&priv->mutex)) {
552 		ret = -EINTR;
553 		p54spi_power_off(priv);
554 		goto out;
555 	}
556 
557 	WARN_ON(priv->fw_state != FW_STATE_READY);
558 
559 out_unlock:
560 	mutex_unlock(&priv->mutex);
561 
562 out:
563 	return ret;
564 }
565 
p54spi_op_stop(struct ieee80211_hw * dev)566 static void p54spi_op_stop(struct ieee80211_hw *dev)
567 {
568 	struct p54s_priv *priv = dev->priv;
569 	unsigned long flags;
570 
571 	mutex_lock(&priv->mutex);
572 	WARN_ON(priv->fw_state != FW_STATE_READY);
573 
574 	p54spi_power_off(priv);
575 	spin_lock_irqsave(&priv->tx_lock, flags);
576 	INIT_LIST_HEAD(&priv->tx_pending);
577 	spin_unlock_irqrestore(&priv->tx_lock, flags);
578 
579 	priv->fw_state = FW_STATE_OFF;
580 	mutex_unlock(&priv->mutex);
581 
582 	cancel_work_sync(&priv->work);
583 }
584 
p54spi_probe(struct spi_device * spi)585 static int p54spi_probe(struct spi_device *spi)
586 {
587 	struct p54s_priv *priv = NULL;
588 	struct ieee80211_hw *hw;
589 	int ret = -EINVAL;
590 
591 	hw = p54_init_common(sizeof(*priv));
592 	if (!hw) {
593 		dev_err(&spi->dev, "could not alloc ieee80211_hw");
594 		return -ENOMEM;
595 	}
596 
597 	priv = hw->priv;
598 	priv->hw = hw;
599 	spi_set_drvdata(spi, priv);
600 	priv->spi = spi;
601 
602 	spi->bits_per_word = 16;
603 	spi->max_speed_hz = 24000000;
604 
605 	ret = spi_setup(spi);
606 	if (ret < 0) {
607 		dev_err(&priv->spi->dev, "spi_setup failed");
608 		goto err_free;
609 	}
610 
611 	ret = gpio_request(p54spi_gpio_power, "p54spi power");
612 	if (ret < 0) {
613 		dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
614 		goto err_free;
615 	}
616 
617 	ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
618 	if (ret < 0) {
619 		dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
620 		goto err_free_gpio_power;
621 	}
622 
623 	gpio_direction_output(p54spi_gpio_power, 0);
624 	gpio_direction_input(p54spi_gpio_irq);
625 
626 	ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
627 			  p54spi_interrupt, 0, "p54spi",
628 			  priv->spi);
629 	if (ret < 0) {
630 		dev_err(&priv->spi->dev, "request_irq() failed");
631 		goto err_free_gpio_irq;
632 	}
633 
634 	irq_set_irq_type(gpio_to_irq(p54spi_gpio_irq), IRQ_TYPE_EDGE_RISING);
635 
636 	disable_irq(gpio_to_irq(p54spi_gpio_irq));
637 
638 	INIT_WORK(&priv->work, p54spi_work);
639 	init_completion(&priv->fw_comp);
640 	INIT_LIST_HEAD(&priv->tx_pending);
641 	mutex_init(&priv->mutex);
642 	spin_lock_init(&priv->tx_lock);
643 	SET_IEEE80211_DEV(hw, &spi->dev);
644 	priv->common.open = p54spi_op_start;
645 	priv->common.stop = p54spi_op_stop;
646 	priv->common.tx = p54spi_op_tx;
647 
648 	ret = p54spi_request_firmware(hw);
649 	if (ret < 0)
650 		goto err_free_common;
651 
652 	ret = p54spi_request_eeprom(hw);
653 	if (ret)
654 		goto err_free_common;
655 
656 	ret = p54_register_common(hw, &priv->spi->dev);
657 	if (ret)
658 		goto err_free_common;
659 
660 	return 0;
661 
662 err_free_common:
663 	release_firmware(priv->firmware);
664 	free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
665 err_free_gpio_irq:
666 	gpio_free(p54spi_gpio_irq);
667 err_free_gpio_power:
668 	gpio_free(p54spi_gpio_power);
669 err_free:
670 	p54_free_common(priv->hw);
671 	return ret;
672 }
673 
p54spi_remove(struct spi_device * spi)674 static void p54spi_remove(struct spi_device *spi)
675 {
676 	struct p54s_priv *priv = spi_get_drvdata(spi);
677 
678 	p54_unregister_common(priv->hw);
679 
680 	free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
681 
682 	gpio_free(p54spi_gpio_power);
683 	gpio_free(p54spi_gpio_irq);
684 	release_firmware(priv->firmware);
685 
686 	mutex_destroy(&priv->mutex);
687 
688 	p54_free_common(priv->hw);
689 }
690 
691 
692 static struct spi_driver p54spi_driver = {
693 	.driver = {
694 		.name		= "p54spi",
695 	},
696 
697 	.probe		= p54spi_probe,
698 	.remove		= p54spi_remove,
699 };
700 
701 module_spi_driver(p54spi_driver);
702 
703 MODULE_DESCRIPTION("Prism54 SPI wireless driver");
704 MODULE_LICENSE("GPL");
705 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");
706 MODULE_ALIAS("spi:cx3110x");
707 MODULE_ALIAS("spi:p54spi");
708 MODULE_ALIAS("spi:stlc45xx");
709