1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell RVU Ethernet driver
3 *
4 * Copyright (C) 2020 Marvell.
5 *
6 */
7
8 #include <net/ipv6.h>
9 #include <linux/sort.h>
10
11 #include "otx2_common.h"
12
13 #define OTX2_DEFAULT_ACTION 0x1
14
15 struct otx2_flow {
16 struct ethtool_rx_flow_spec flow_spec;
17 struct list_head list;
18 u32 location;
19 u32 entry;
20 bool is_vf;
21 u8 rss_ctx_id;
22 #define DMAC_FILTER_RULE BIT(0)
23 #define PFC_FLOWCTRL_RULE BIT(1)
24 u16 rule_type;
25 int vf;
26 };
27
28 enum dmac_req {
29 DMAC_ADDR_UPDATE,
30 DMAC_ADDR_DEL
31 };
32
otx2_clear_ntuple_flow_info(struct otx2_nic * pfvf,struct otx2_flow_config * flow_cfg)33 static void otx2_clear_ntuple_flow_info(struct otx2_nic *pfvf, struct otx2_flow_config *flow_cfg)
34 {
35 devm_kfree(pfvf->dev, flow_cfg->flow_ent);
36 flow_cfg->flow_ent = NULL;
37 flow_cfg->max_flows = 0;
38 }
39
otx2_mcam_pfl_info_get(struct otx2_nic * pfvf,u16 * x4_slots,u8 * kw_type)40 static int otx2_mcam_pfl_info_get(struct otx2_nic *pfvf, u16 *x4_slots, u8 *kw_type)
41 {
42 struct npc_get_pfl_info_rsp *rsp;
43 struct msg_req *req;
44 static struct {
45 bool is_set;
46 u8 kw_type;
47 u16 x4_slots;
48 } pfl_info;
49
50 /* Avoid sending mboxes for constant information
51 * like x4_slots
52 */
53 mutex_lock(&pfvf->mbox.lock);
54 if (pfl_info.is_set) {
55 *x4_slots = pfl_info.x4_slots;
56 *kw_type = pfl_info.kw_type;
57 mutex_unlock(&pfvf->mbox.lock);
58 return 0;
59 }
60
61 req = otx2_mbox_alloc_msg_npc_get_pfl_info(&pfvf->mbox);
62 if (!req) {
63 mutex_unlock(&pfvf->mbox.lock);
64 return -ENOMEM;
65 }
66
67 /* Send message to AF */
68 if (otx2_sync_mbox_msg(&pfvf->mbox)) {
69 mutex_unlock(&pfvf->mbox.lock);
70 return -EFAULT;
71 }
72
73 rsp = (struct npc_get_pfl_info_rsp *)otx2_mbox_get_rsp
74 (&pfvf->mbox.mbox, 0, &req->hdr);
75
76 if (IS_ERR(rsp)) {
77 mutex_unlock(&pfvf->mbox.lock);
78 return -EFAULT;
79 }
80
81 pfl_info.kw_type = rsp->kw_type;
82 if (rsp->kw_type == NPC_MCAM_KEY_X2)
83 pfl_info.x4_slots = 0;
84 else
85 pfl_info.x4_slots = rsp->x4_slots;
86 pfl_info.is_set = true;
87
88 *x4_slots = pfl_info.x4_slots;
89 *kw_type = pfl_info.kw_type;
90
91 mutex_unlock(&pfvf->mbox.lock);
92 return 0;
93 }
94
otx2_get_dft_rl_idx(struct otx2_nic * pfvf,u16 * mcam_idx)95 static int otx2_get_dft_rl_idx(struct otx2_nic *pfvf, u16 *mcam_idx)
96 {
97 struct npc_get_dft_rl_idxs_rsp *rsp;
98 struct msg_req *req;
99
100 mutex_lock(&pfvf->mbox.lock);
101
102 req = otx2_mbox_alloc_msg_npc_get_dft_rl_idxs(&pfvf->mbox);
103 if (!req) {
104 mutex_unlock(&pfvf->mbox.lock);
105 return -ENOMEM;
106 }
107
108 /* Send message to AF */
109 if (otx2_sync_mbox_msg(&pfvf->mbox)) {
110 mutex_unlock(&pfvf->mbox.lock);
111 return -EINVAL;
112 }
113
114 rsp = (struct npc_get_dft_rl_idxs_rsp *)otx2_mbox_get_rsp
115 (&pfvf->mbox.mbox, 0, &req->hdr);
116
117 if (IS_ERR(rsp)) {
118 mutex_unlock(&pfvf->mbox.lock);
119 return -EFAULT;
120 }
121
122 if (is_otx2_lbkvf(pfvf->pdev))
123 *mcam_idx = rsp->promisc;
124 else
125 *mcam_idx = rsp->ucast;
126
127 mutex_unlock(&pfvf->mbox.lock);
128 return 0;
129 }
130
otx2_free_ntuple_mcam_entries(struct otx2_nic * pfvf)131 static int otx2_free_ntuple_mcam_entries(struct otx2_nic *pfvf)
132 {
133 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
134 struct npc_mcam_free_entry_req *req;
135 int ent, err;
136
137 if (!flow_cfg->max_flows)
138 return 0;
139
140 mutex_lock(&pfvf->mbox.lock);
141 for (ent = 0; ent < flow_cfg->max_flows; ent++) {
142 req = otx2_mbox_alloc_msg_npc_mcam_free_entry(&pfvf->mbox);
143 if (!req)
144 break;
145
146 req->entry = flow_cfg->flow_ent[ent];
147
148 /* Send message to AF to free MCAM entries */
149 err = otx2_sync_mbox_msg(&pfvf->mbox);
150 if (err)
151 break;
152 }
153 mutex_unlock(&pfvf->mbox.lock);
154 otx2_clear_ntuple_flow_info(pfvf, flow_cfg);
155 return 0;
156 }
157
otx2_alloc_mcam_entries(struct otx2_nic * pfvf,u16 count)158 int otx2_alloc_mcam_entries(struct otx2_nic *pfvf, u16 count)
159 {
160 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
161 struct npc_mcam_alloc_entry_req *req;
162 struct npc_mcam_alloc_entry_rsp *rsp;
163 u16 dft_idx = 0, x4_slots = 0;
164 int ent, allocated = 0, ref;
165 bool is_x2 = false;
166 u8 kw_type = 0;
167 int rc;
168
169 /* Free current ones and allocate new ones with requested count */
170 otx2_free_ntuple_mcam_entries(pfvf);
171
172 if (!count)
173 return 0;
174
175 flow_cfg->flow_ent = devm_kmalloc_array(pfvf->dev, count,
176 sizeof(u16), GFP_KERNEL);
177 if (!flow_cfg->flow_ent) {
178 netdev_err(pfvf->netdev,
179 "%s: Unable to allocate memory for flow entries\n",
180 __func__);
181 return -ENOMEM;
182 }
183
184 if (is_cn20k(pfvf->pdev)) {
185 rc = otx2_mcam_pfl_info_get(pfvf, &x4_slots, &kw_type);
186 if (rc) {
187 netdev_err(pfvf->netdev, "Error to retrieve profile info\n");
188 return rc;
189 }
190
191 is_x2 = kw_type == NPC_MCAM_KEY_X2;
192
193 rc = otx2_get_dft_rl_idx(pfvf, &dft_idx);
194 if (rc) {
195 netdev_err(pfvf->netdev,
196 "Error to retrieve ucast mcam idx for pcifunc %#x\n",
197 pfvf->pcifunc);
198 return rc;
199 }
200 }
201
202 mutex_lock(&pfvf->mbox.lock);
203
204 /* In a single request a max of NPC_MAX_NONCONTIG_ENTRIES MCAM entries
205 * can only be allocated.
206 */
207 while (allocated < count) {
208 req = otx2_mbox_alloc_msg_npc_mcam_alloc_entry(&pfvf->mbox);
209 if (!req)
210 goto exit;
211
212 req->kw_type = is_x2 ? NPC_MCAM_KEY_X2 : NPC_MCAM_KEY_X4;
213 req->contig = false;
214 req->count = (count - allocated) > NPC_MAX_NONCONTIG_ENTRIES ?
215 NPC_MAX_NONCONTIG_ENTRIES : count - allocated;
216
217 ref = 0;
218
219 if (is_cn20k(pfvf->pdev)) {
220 req->ref_prio = NPC_MCAM_HIGHER_PRIO;
221 ref = dft_idx;
222 }
223
224 /* Allocate higher priority entries for PFs, so that VF's entries
225 * will be on top of PF.
226 */
227 if (!is_otx2_vf(pfvf->pcifunc)) {
228 req->ref_prio = NPC_MCAM_HIGHER_PRIO;
229 ref = flow_cfg->def_ent[0];
230 }
231
232 if (is_cn20k(pfvf->pdev))
233 ref = is_x2 ? ref : ref & (x4_slots - 1);
234
235 req->ref_entry = ref;
236
237 /* Send message to AF */
238 if (otx2_sync_mbox_msg(&pfvf->mbox))
239 goto exit;
240
241 rsp = (struct npc_mcam_alloc_entry_rsp *)otx2_mbox_get_rsp
242 (&pfvf->mbox.mbox, 0, &req->hdr);
243 if (IS_ERR(rsp))
244 goto exit;
245
246 for (ent = 0; ent < rsp->count; ent++)
247 flow_cfg->flow_ent[ent + allocated] = rsp->entry_list[ent];
248
249 allocated += rsp->count;
250
251 /* If this request is not fulfilled, no need to send
252 * further requests.
253 */
254 if (rsp->count != req->count)
255 break;
256 }
257
258 /* Multiple MCAM entry alloc requests could result in non-sequential
259 * MCAM entries in the flow_ent[] array. Sort them in an ascending order,
260 * otherwise user installed ntuple filter index and MCAM entry index will
261 * not be in sync.
262 */
263 if (allocated)
264 sort(&flow_cfg->flow_ent[0], allocated,
265 sizeof(flow_cfg->flow_ent[0]), mcam_entry_cmp, NULL);
266
267 exit:
268 mutex_unlock(&pfvf->mbox.lock);
269
270 flow_cfg->max_flows = allocated;
271
272 if (allocated) {
273 pfvf->flags |= OTX2_FLAG_MCAM_ENTRIES_ALLOC;
274 pfvf->flags |= OTX2_FLAG_NTUPLE_SUPPORT;
275 pfvf->flags |= OTX2_FLAG_TC_FLOWER_SUPPORT;
276 }
277
278 if (allocated != count)
279 netdev_info(pfvf->netdev,
280 "Unable to allocate %d MCAM entries, got only %d\n",
281 count, allocated);
282 return allocated;
283 }
284 EXPORT_SYMBOL(otx2_alloc_mcam_entries);
285
otx2_mcam_entry_init(struct otx2_nic * pfvf)286 int otx2_mcam_entry_init(struct otx2_nic *pfvf)
287 {
288 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
289 struct npc_get_field_status_req *freq;
290 struct npc_get_field_status_rsp *frsp;
291 struct npc_mcam_alloc_entry_req *req;
292 struct npc_mcam_alloc_entry_rsp *rsp;
293 int vf_vlan_max_flows, count;
294 int rc, ref, prio, ent;
295 u8 kw_type = 0;
296 u16 x4_slots;
297 u16 dft_idx;
298
299 ref = 0;
300 prio = 0;
301 if (is_cn20k(pfvf->pdev)) {
302 rc = otx2_get_dft_rl_idx(pfvf, &dft_idx);
303 if (rc) {
304 netdev_err(pfvf->netdev,
305 "Error to retrieve ucast mcam idx for pcifunc %#x\n",
306 pfvf->pcifunc);
307 return rc;
308 }
309
310 ref = dft_idx;
311 prio = NPC_MCAM_HIGHER_PRIO;
312 }
313
314 vf_vlan_max_flows = pfvf->total_vfs * OTX2_PER_VF_VLAN_FLOWS;
315 count = flow_cfg->ucast_flt_cnt +
316 OTX2_MAX_VLAN_FLOWS + vf_vlan_max_flows;
317
318 flow_cfg->def_ent = devm_kmalloc_array(pfvf->dev, count,
319 sizeof(u16), GFP_KERNEL);
320 if (!flow_cfg->def_ent)
321 return -ENOMEM;
322
323 kw_type = NPC_MCAM_KEY_X2;
324 if (is_cn20k(pfvf->pdev)) {
325 rc = otx2_mcam_pfl_info_get(pfvf, &x4_slots, &kw_type);
326 if (rc) {
327 netdev_err(pfvf->netdev,
328 "Error to get pfl info\n");
329 return rc;
330 }
331 }
332
333 mutex_lock(&pfvf->mbox.lock);
334
335 req = otx2_mbox_alloc_msg_npc_mcam_alloc_entry(&pfvf->mbox);
336 if (!req) {
337 mutex_unlock(&pfvf->mbox.lock);
338 return -ENOMEM;
339 }
340
341 req->kw_type = NPC_MCAM_KEY_X2;
342 if (is_cn20k(pfvf->pdev) && kw_type == NPC_MCAM_KEY_X4) {
343 req->kw_type = NPC_MCAM_KEY_X4;
344 ref &= (x4_slots - 1);
345 }
346 req->contig = false;
347 req->count = count;
348 req->ref_prio = prio;
349 req->ref_entry = ref;
350
351 /* Send message to AF */
352 if (otx2_sync_mbox_msg(&pfvf->mbox)) {
353 mutex_unlock(&pfvf->mbox.lock);
354 return -EINVAL;
355 }
356
357 rsp = (struct npc_mcam_alloc_entry_rsp *)otx2_mbox_get_rsp
358 (&pfvf->mbox.mbox, 0, &req->hdr);
359 if (IS_ERR(rsp)) {
360 mutex_unlock(&pfvf->mbox.lock);
361 return PTR_ERR(rsp);
362 }
363
364 if (rsp->count != req->count) {
365 netdev_info(pfvf->netdev,
366 "Unable to allocate MCAM entries for ucast, vlan and vf_vlan\n");
367 mutex_unlock(&pfvf->mbox.lock);
368 devm_kfree(pfvf->dev, flow_cfg->def_ent);
369 return 0;
370 }
371
372 for (ent = 0; ent < rsp->count; ent++)
373 flow_cfg->def_ent[ent] = rsp->entry_list[ent];
374
375 flow_cfg->vf_vlan_offset = 0;
376 flow_cfg->unicast_offset = vf_vlan_max_flows;
377 flow_cfg->rx_vlan_offset = flow_cfg->unicast_offset +
378 flow_cfg->ucast_flt_cnt;
379 pfvf->flags |= OTX2_FLAG_UCAST_FLTR_SUPPORT;
380
381 /* Check if NPC_DMAC field is supported
382 * by the mkex profile before setting VLAN support flag.
383 */
384 freq = otx2_mbox_alloc_msg_npc_get_field_status(&pfvf->mbox);
385 if (!freq) {
386 mutex_unlock(&pfvf->mbox.lock);
387 return -ENOMEM;
388 }
389
390 freq->field = NPC_DMAC;
391 if (otx2_sync_mbox_msg(&pfvf->mbox)) {
392 mutex_unlock(&pfvf->mbox.lock);
393 return -EINVAL;
394 }
395
396 frsp = (struct npc_get_field_status_rsp *)otx2_mbox_get_rsp
397 (&pfvf->mbox.mbox, 0, &freq->hdr);
398 if (IS_ERR(frsp)) {
399 mutex_unlock(&pfvf->mbox.lock);
400 return PTR_ERR(frsp);
401 }
402
403 if (frsp->enable) {
404 pfvf->flags |= OTX2_FLAG_RX_VLAN_SUPPORT;
405 pfvf->flags |= OTX2_FLAG_VF_VLAN_SUPPORT;
406 }
407
408 pfvf->flags |= OTX2_FLAG_MCAM_ENTRIES_ALLOC;
409 mutex_unlock(&pfvf->mbox.lock);
410
411 /* Allocate entries for Ntuple filters */
412 count = otx2_alloc_mcam_entries(pfvf, flow_cfg->ntuple_cnt);
413 if (count <= 0) {
414 otx2_clear_ntuple_flow_info(pfvf, flow_cfg);
415 return 0;
416 }
417
418 pfvf->flags |= OTX2_FLAG_TC_FLOWER_SUPPORT;
419
420 refcount_set(&flow_cfg->mark_flows, 1);
421 return 0;
422 }
423 EXPORT_SYMBOL(otx2_mcam_entry_init);
424
425 /* TODO : revisit on size */
426 #define OTX2_DMAC_FLTR_BITMAP_SZ (4 * 2048 + 32)
427
otx2vf_mcam_flow_init(struct otx2_nic * pfvf)428 int otx2vf_mcam_flow_init(struct otx2_nic *pfvf)
429 {
430 struct otx2_flow_config *flow_cfg;
431
432 pfvf->flow_cfg = devm_kzalloc(pfvf->dev,
433 sizeof(struct otx2_flow_config),
434 GFP_KERNEL);
435 if (!pfvf->flow_cfg)
436 return -ENOMEM;
437
438 pfvf->flow_cfg->dmacflt_bmap = devm_kcalloc(pfvf->dev,
439 BITS_TO_LONGS(OTX2_DMAC_FLTR_BITMAP_SZ),
440 sizeof(long), GFP_KERNEL);
441 if (!pfvf->flow_cfg->dmacflt_bmap)
442 return -ENOMEM;
443
444 flow_cfg = pfvf->flow_cfg;
445 INIT_LIST_HEAD(&flow_cfg->flow_list);
446 INIT_LIST_HEAD(&flow_cfg->flow_list_tc);
447 flow_cfg->max_flows = 0;
448
449 return 0;
450 }
451 EXPORT_SYMBOL(otx2vf_mcam_flow_init);
452
otx2_mcam_flow_init(struct otx2_nic * pf)453 int otx2_mcam_flow_init(struct otx2_nic *pf)
454 {
455 int err;
456
457 pf->flow_cfg = devm_kzalloc(pf->dev, sizeof(struct otx2_flow_config),
458 GFP_KERNEL);
459 if (!pf->flow_cfg)
460 return -ENOMEM;
461
462 pf->flow_cfg->dmacflt_bmap = devm_kcalloc(pf->dev,
463 BITS_TO_LONGS(OTX2_DMAC_FLTR_BITMAP_SZ),
464 sizeof(long), GFP_KERNEL);
465 if (!pf->flow_cfg->dmacflt_bmap)
466 return -ENOMEM;
467
468 INIT_LIST_HEAD(&pf->flow_cfg->flow_list);
469 INIT_LIST_HEAD(&pf->flow_cfg->flow_list_tc);
470
471 pf->flow_cfg->ucast_flt_cnt = OTX2_DEFAULT_UNICAST_FLOWS;
472 pf->flow_cfg->ntuple_cnt = OTX2_DEFAULT_FLOWCOUNT;
473
474 /* Allocate bare minimum number of MCAM entries needed for
475 * unicast and ntuple filters.
476 */
477 err = otx2_mcam_entry_init(pf);
478 if (err)
479 return err;
480
481 /* Check if MCAM entries are allocate or not */
482 if (!(pf->flags & OTX2_FLAG_UCAST_FLTR_SUPPORT))
483 return 0;
484
485 pf->mac_table = devm_kzalloc(pf->dev, sizeof(struct otx2_mac_table)
486 * pf->flow_cfg->ucast_flt_cnt, GFP_KERNEL);
487 if (!pf->mac_table)
488 return -ENOMEM;
489
490 otx2_dmacflt_get_max_cnt(pf);
491
492 /* DMAC filters are not allocated */
493 if (!pf->flow_cfg->dmacflt_max_flows)
494 return 0;
495
496 pf->flow_cfg->bmap_to_dmacindex =
497 devm_kzalloc(pf->dev, sizeof(u32) *
498 pf->flow_cfg->dmacflt_max_flows,
499 GFP_KERNEL);
500
501 if (!pf->flow_cfg->bmap_to_dmacindex)
502 return -ENOMEM;
503
504 pf->flags |= OTX2_FLAG_DMACFLTR_SUPPORT;
505
506 return 0;
507 }
508
otx2_mcam_flow_del(struct otx2_nic * pf)509 void otx2_mcam_flow_del(struct otx2_nic *pf)
510 {
511 otx2_destroy_mcam_flows(pf);
512 }
513 EXPORT_SYMBOL(otx2_mcam_flow_del);
514
515 /* On success adds mcam entry
516 * On failure enable promisous mode
517 */
otx2_do_add_macfilter(struct otx2_nic * pf,const u8 * mac)518 static int otx2_do_add_macfilter(struct otx2_nic *pf, const u8 *mac)
519 {
520 struct otx2_flow_config *flow_cfg = pf->flow_cfg;
521 struct npc_install_flow_req *req;
522 int err, i;
523
524 if (!(pf->flags & OTX2_FLAG_UCAST_FLTR_SUPPORT))
525 return -ENOMEM;
526
527 /* dont have free mcam entries or uc list is greater than alloted */
528 if (netdev_uc_count(pf->netdev) > pf->flow_cfg->ucast_flt_cnt)
529 return -ENOMEM;
530
531 mutex_lock(&pf->mbox.lock);
532 req = otx2_mbox_alloc_msg_npc_install_flow(&pf->mbox);
533 if (!req) {
534 mutex_unlock(&pf->mbox.lock);
535 return -ENOMEM;
536 }
537
538 /* unicast offset starts with 32 0..31 for ntuple */
539 for (i = 0; i < pf->flow_cfg->ucast_flt_cnt; i++) {
540 if (pf->mac_table[i].inuse)
541 continue;
542 ether_addr_copy(pf->mac_table[i].addr, mac);
543 pf->mac_table[i].inuse = true;
544 pf->mac_table[i].mcam_entry =
545 flow_cfg->def_ent[i + flow_cfg->unicast_offset];
546 req->entry = pf->mac_table[i].mcam_entry;
547 break;
548 }
549
550 ether_addr_copy(req->packet.dmac, mac);
551 eth_broadcast_addr((u8 *)&req->mask.dmac);
552 req->features = BIT_ULL(NPC_DMAC);
553 req->channel = pf->hw.rx_chan_base;
554 req->intf = NIX_INTF_RX;
555 req->op = NIX_RX_ACTION_DEFAULT;
556 req->set_cntr = 1;
557
558 err = otx2_sync_mbox_msg(&pf->mbox);
559 mutex_unlock(&pf->mbox.lock);
560
561 return err;
562 }
563
otx2_add_macfilter(struct net_device * netdev,const u8 * mac)564 int otx2_add_macfilter(struct net_device *netdev, const u8 *mac)
565 {
566 struct otx2_nic *pf = netdev_priv(netdev);
567
568 if (!bitmap_empty(pf->flow_cfg->dmacflt_bmap,
569 pf->flow_cfg->dmacflt_max_flows))
570 netdev_warn(netdev,
571 "Add %pM to CGX/RPM DMAC filters list as well\n",
572 mac);
573
574 return otx2_do_add_macfilter(pf, mac);
575 }
576
otx2_get_mcamentry_for_mac(struct otx2_nic * pf,const u8 * mac,int * mcam_entry)577 static bool otx2_get_mcamentry_for_mac(struct otx2_nic *pf, const u8 *mac,
578 int *mcam_entry)
579 {
580 int i;
581
582 for (i = 0; i < pf->flow_cfg->ucast_flt_cnt; i++) {
583 if (!pf->mac_table[i].inuse)
584 continue;
585
586 if (ether_addr_equal(pf->mac_table[i].addr, mac)) {
587 *mcam_entry = pf->mac_table[i].mcam_entry;
588 pf->mac_table[i].inuse = false;
589 return true;
590 }
591 }
592 return false;
593 }
594
otx2_del_macfilter(struct net_device * netdev,const u8 * mac)595 int otx2_del_macfilter(struct net_device *netdev, const u8 *mac)
596 {
597 struct otx2_nic *pf = netdev_priv(netdev);
598 struct npc_delete_flow_req *req;
599 int err, mcam_entry;
600
601 /* check does mcam entry exists for given mac */
602 if (!otx2_get_mcamentry_for_mac(pf, mac, &mcam_entry))
603 return 0;
604
605 mutex_lock(&pf->mbox.lock);
606 req = otx2_mbox_alloc_msg_npc_delete_flow(&pf->mbox);
607 if (!req) {
608 mutex_unlock(&pf->mbox.lock);
609 return -ENOMEM;
610 }
611 req->entry = mcam_entry;
612 /* Send message to AF */
613 err = otx2_sync_mbox_msg(&pf->mbox);
614 mutex_unlock(&pf->mbox.lock);
615
616 return err;
617 }
618
otx2_find_flow(struct otx2_nic * pfvf,u32 location)619 static struct otx2_flow *otx2_find_flow(struct otx2_nic *pfvf, u32 location)
620 {
621 struct otx2_flow *iter;
622
623 list_for_each_entry(iter, &pfvf->flow_cfg->flow_list, list) {
624 if (iter->location == location)
625 return iter;
626 }
627
628 return NULL;
629 }
630
otx2_add_flow_to_list(struct otx2_nic * pfvf,struct otx2_flow * flow)631 static void otx2_add_flow_to_list(struct otx2_nic *pfvf, struct otx2_flow *flow)
632 {
633 struct list_head *head = &pfvf->flow_cfg->flow_list;
634 struct otx2_flow *iter;
635
636 list_for_each_entry(iter, &pfvf->flow_cfg->flow_list, list) {
637 if (iter->location > flow->location)
638 break;
639 head = &iter->list;
640 }
641
642 list_add(&flow->list, head);
643 }
644
otx2_get_maxflows(struct otx2_flow_config * flow_cfg)645 int otx2_get_maxflows(struct otx2_flow_config *flow_cfg)
646 {
647 if (!flow_cfg)
648 return 0;
649
650 if (flow_cfg->nr_flows == flow_cfg->max_flows ||
651 !bitmap_empty(flow_cfg->dmacflt_bmap,
652 flow_cfg->dmacflt_max_flows))
653 return flow_cfg->max_flows + flow_cfg->dmacflt_max_flows;
654 else
655 return flow_cfg->max_flows;
656 }
657 EXPORT_SYMBOL(otx2_get_maxflows);
658
otx2_get_flow(struct otx2_nic * pfvf,struct ethtool_rxnfc * nfc,u32 location)659 int otx2_get_flow(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc,
660 u32 location)
661 {
662 struct otx2_flow *iter;
663
664 if (location >= otx2_get_maxflows(pfvf->flow_cfg))
665 return -EINVAL;
666
667 list_for_each_entry(iter, &pfvf->flow_cfg->flow_list, list) {
668 if (iter->location == location) {
669 nfc->fs = iter->flow_spec;
670 nfc->rss_context = iter->rss_ctx_id;
671 return 0;
672 }
673 }
674
675 return -ENOENT;
676 }
677
otx2_get_all_flows(struct otx2_nic * pfvf,struct ethtool_rxnfc * nfc,u32 * rule_locs)678 int otx2_get_all_flows(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc,
679 u32 *rule_locs)
680 {
681 u32 rule_cnt = nfc->rule_cnt;
682 u32 location = 0;
683 int idx = 0;
684 int err = 0;
685
686 nfc->data = otx2_get_maxflows(pfvf->flow_cfg);
687 while ((!err || err == -ENOENT) && idx < rule_cnt) {
688 err = otx2_get_flow(pfvf, nfc, location);
689 if (!err)
690 rule_locs[idx++] = location;
691 location++;
692 }
693 nfc->rule_cnt = rule_cnt;
694
695 return err;
696 }
697
otx2_prepare_ipv4_flow(struct ethtool_rx_flow_spec * fsp,struct npc_install_flow_req * req,u32 flow_type)698 static int otx2_prepare_ipv4_flow(struct ethtool_rx_flow_spec *fsp,
699 struct npc_install_flow_req *req,
700 u32 flow_type)
701 {
702 struct ethtool_usrip4_spec *ipv4_usr_mask = &fsp->m_u.usr_ip4_spec;
703 struct ethtool_usrip4_spec *ipv4_usr_hdr = &fsp->h_u.usr_ip4_spec;
704 struct ethtool_tcpip4_spec *ipv4_l4_mask = &fsp->m_u.tcp_ip4_spec;
705 struct ethtool_tcpip4_spec *ipv4_l4_hdr = &fsp->h_u.tcp_ip4_spec;
706 struct ethtool_ah_espip4_spec *ah_esp_hdr = &fsp->h_u.ah_ip4_spec;
707 struct ethtool_ah_espip4_spec *ah_esp_mask = &fsp->m_u.ah_ip4_spec;
708 struct flow_msg *pmask = &req->mask;
709 struct flow_msg *pkt = &req->packet;
710
711 switch (flow_type) {
712 case IP_USER_FLOW:
713 if (ipv4_usr_mask->ip4src) {
714 memcpy(&pkt->ip4src, &ipv4_usr_hdr->ip4src,
715 sizeof(pkt->ip4src));
716 memcpy(&pmask->ip4src, &ipv4_usr_mask->ip4src,
717 sizeof(pmask->ip4src));
718 req->features |= BIT_ULL(NPC_SIP_IPV4);
719 }
720 if (ipv4_usr_mask->ip4dst) {
721 memcpy(&pkt->ip4dst, &ipv4_usr_hdr->ip4dst,
722 sizeof(pkt->ip4dst));
723 memcpy(&pmask->ip4dst, &ipv4_usr_mask->ip4dst,
724 sizeof(pmask->ip4dst));
725 req->features |= BIT_ULL(NPC_DIP_IPV4);
726 }
727 if (ipv4_usr_mask->tos) {
728 pkt->tos = ipv4_usr_hdr->tos;
729 pmask->tos = ipv4_usr_mask->tos;
730 req->features |= BIT_ULL(NPC_TOS);
731 }
732 if (ipv4_usr_mask->proto) {
733 switch (ipv4_usr_hdr->proto) {
734 case IPPROTO_ICMP:
735 req->features |= BIT_ULL(NPC_IPPROTO_ICMP);
736 break;
737 case IPPROTO_TCP:
738 req->features |= BIT_ULL(NPC_IPPROTO_TCP);
739 break;
740 case IPPROTO_UDP:
741 req->features |= BIT_ULL(NPC_IPPROTO_UDP);
742 break;
743 case IPPROTO_SCTP:
744 req->features |= BIT_ULL(NPC_IPPROTO_SCTP);
745 break;
746 case IPPROTO_AH:
747 req->features |= BIT_ULL(NPC_IPPROTO_AH);
748 break;
749 case IPPROTO_ESP:
750 req->features |= BIT_ULL(NPC_IPPROTO_ESP);
751 break;
752 default:
753 return -EOPNOTSUPP;
754 }
755 }
756 pkt->etype = cpu_to_be16(ETH_P_IP);
757 pmask->etype = cpu_to_be16(0xFFFF);
758 req->features |= BIT_ULL(NPC_ETYPE);
759 break;
760 case TCP_V4_FLOW:
761 case UDP_V4_FLOW:
762 case SCTP_V4_FLOW:
763 pkt->etype = cpu_to_be16(ETH_P_IP);
764 pmask->etype = cpu_to_be16(0xFFFF);
765 req->features |= BIT_ULL(NPC_ETYPE);
766 if (ipv4_l4_mask->ip4src) {
767 memcpy(&pkt->ip4src, &ipv4_l4_hdr->ip4src,
768 sizeof(pkt->ip4src));
769 memcpy(&pmask->ip4src, &ipv4_l4_mask->ip4src,
770 sizeof(pmask->ip4src));
771 req->features |= BIT_ULL(NPC_SIP_IPV4);
772 }
773 if (ipv4_l4_mask->ip4dst) {
774 memcpy(&pkt->ip4dst, &ipv4_l4_hdr->ip4dst,
775 sizeof(pkt->ip4dst));
776 memcpy(&pmask->ip4dst, &ipv4_l4_mask->ip4dst,
777 sizeof(pmask->ip4dst));
778 req->features |= BIT_ULL(NPC_DIP_IPV4);
779 }
780 if (ipv4_l4_mask->tos) {
781 pkt->tos = ipv4_l4_hdr->tos;
782 pmask->tos = ipv4_l4_mask->tos;
783 req->features |= BIT_ULL(NPC_TOS);
784 }
785 if (ipv4_l4_mask->psrc) {
786 memcpy(&pkt->sport, &ipv4_l4_hdr->psrc,
787 sizeof(pkt->sport));
788 memcpy(&pmask->sport, &ipv4_l4_mask->psrc,
789 sizeof(pmask->sport));
790 if (flow_type == UDP_V4_FLOW)
791 req->features |= BIT_ULL(NPC_SPORT_UDP);
792 else if (flow_type == TCP_V4_FLOW)
793 req->features |= BIT_ULL(NPC_SPORT_TCP);
794 else
795 req->features |= BIT_ULL(NPC_SPORT_SCTP);
796 }
797 if (ipv4_l4_mask->pdst) {
798 memcpy(&pkt->dport, &ipv4_l4_hdr->pdst,
799 sizeof(pkt->dport));
800 memcpy(&pmask->dport, &ipv4_l4_mask->pdst,
801 sizeof(pmask->dport));
802 if (flow_type == UDP_V4_FLOW)
803 req->features |= BIT_ULL(NPC_DPORT_UDP);
804 else if (flow_type == TCP_V4_FLOW)
805 req->features |= BIT_ULL(NPC_DPORT_TCP);
806 else
807 req->features |= BIT_ULL(NPC_DPORT_SCTP);
808 }
809 if (flow_type == UDP_V4_FLOW)
810 req->features |= BIT_ULL(NPC_IPPROTO_UDP);
811 else if (flow_type == TCP_V4_FLOW)
812 req->features |= BIT_ULL(NPC_IPPROTO_TCP);
813 else
814 req->features |= BIT_ULL(NPC_IPPROTO_SCTP);
815 break;
816 case AH_V4_FLOW:
817 case ESP_V4_FLOW:
818 pkt->etype = cpu_to_be16(ETH_P_IP);
819 pmask->etype = cpu_to_be16(0xFFFF);
820 req->features |= BIT_ULL(NPC_ETYPE);
821 if (ah_esp_mask->ip4src) {
822 memcpy(&pkt->ip4src, &ah_esp_hdr->ip4src,
823 sizeof(pkt->ip4src));
824 memcpy(&pmask->ip4src, &ah_esp_mask->ip4src,
825 sizeof(pmask->ip4src));
826 req->features |= BIT_ULL(NPC_SIP_IPV4);
827 }
828 if (ah_esp_mask->ip4dst) {
829 memcpy(&pkt->ip4dst, &ah_esp_hdr->ip4dst,
830 sizeof(pkt->ip4dst));
831 memcpy(&pmask->ip4dst, &ah_esp_mask->ip4dst,
832 sizeof(pmask->ip4dst));
833 req->features |= BIT_ULL(NPC_DIP_IPV4);
834 }
835 if (ah_esp_mask->tos) {
836 pkt->tos = ah_esp_hdr->tos;
837 pmask->tos = ah_esp_mask->tos;
838 req->features |= BIT_ULL(NPC_TOS);
839 }
840
841 /* NPC profile doesn't extract AH/ESP header fields */
842 if (ah_esp_mask->spi & ah_esp_hdr->spi)
843 return -EOPNOTSUPP;
844
845 if (flow_type == AH_V4_FLOW)
846 req->features |= BIT_ULL(NPC_IPPROTO_AH);
847 else
848 req->features |= BIT_ULL(NPC_IPPROTO_ESP);
849 break;
850 default:
851 break;
852 }
853
854 return 0;
855 }
856
otx2_prepare_ipv6_flow(struct ethtool_rx_flow_spec * fsp,struct npc_install_flow_req * req,u32 flow_type)857 static int otx2_prepare_ipv6_flow(struct ethtool_rx_flow_spec *fsp,
858 struct npc_install_flow_req *req,
859 u32 flow_type)
860 {
861 struct ethtool_usrip6_spec *ipv6_usr_mask = &fsp->m_u.usr_ip6_spec;
862 struct ethtool_usrip6_spec *ipv6_usr_hdr = &fsp->h_u.usr_ip6_spec;
863 struct ethtool_tcpip6_spec *ipv6_l4_mask = &fsp->m_u.tcp_ip6_spec;
864 struct ethtool_tcpip6_spec *ipv6_l4_hdr = &fsp->h_u.tcp_ip6_spec;
865 struct ethtool_ah_espip6_spec *ah_esp_hdr = &fsp->h_u.ah_ip6_spec;
866 struct ethtool_ah_espip6_spec *ah_esp_mask = &fsp->m_u.ah_ip6_spec;
867 struct flow_msg *pmask = &req->mask;
868 struct flow_msg *pkt = &req->packet;
869
870 switch (flow_type) {
871 case IPV6_USER_FLOW:
872 if (!ipv6_addr_any((struct in6_addr *)ipv6_usr_mask->ip6src)) {
873 memcpy(&pkt->ip6src, &ipv6_usr_hdr->ip6src,
874 sizeof(pkt->ip6src));
875 memcpy(&pmask->ip6src, &ipv6_usr_mask->ip6src,
876 sizeof(pmask->ip6src));
877 req->features |= BIT_ULL(NPC_SIP_IPV6);
878 }
879 if (!ipv6_addr_any((struct in6_addr *)ipv6_usr_mask->ip6dst)) {
880 memcpy(&pkt->ip6dst, &ipv6_usr_hdr->ip6dst,
881 sizeof(pkt->ip6dst));
882 memcpy(&pmask->ip6dst, &ipv6_usr_mask->ip6dst,
883 sizeof(pmask->ip6dst));
884 req->features |= BIT_ULL(NPC_DIP_IPV6);
885 }
886 if (ipv6_usr_hdr->l4_proto == IPPROTO_FRAGMENT) {
887 pkt->next_header = ipv6_usr_hdr->l4_proto;
888 pmask->next_header = ipv6_usr_mask->l4_proto;
889 req->features |= BIT_ULL(NPC_IPFRAG_IPV6);
890 }
891 pkt->etype = cpu_to_be16(ETH_P_IPV6);
892 pmask->etype = cpu_to_be16(0xFFFF);
893 req->features |= BIT_ULL(NPC_ETYPE);
894 break;
895 case TCP_V6_FLOW:
896 case UDP_V6_FLOW:
897 case SCTP_V6_FLOW:
898 pkt->etype = cpu_to_be16(ETH_P_IPV6);
899 pmask->etype = cpu_to_be16(0xFFFF);
900 req->features |= BIT_ULL(NPC_ETYPE);
901 if (!ipv6_addr_any((struct in6_addr *)ipv6_l4_mask->ip6src)) {
902 memcpy(&pkt->ip6src, &ipv6_l4_hdr->ip6src,
903 sizeof(pkt->ip6src));
904 memcpy(&pmask->ip6src, &ipv6_l4_mask->ip6src,
905 sizeof(pmask->ip6src));
906 req->features |= BIT_ULL(NPC_SIP_IPV6);
907 }
908 if (!ipv6_addr_any((struct in6_addr *)ipv6_l4_mask->ip6dst)) {
909 memcpy(&pkt->ip6dst, &ipv6_l4_hdr->ip6dst,
910 sizeof(pkt->ip6dst));
911 memcpy(&pmask->ip6dst, &ipv6_l4_mask->ip6dst,
912 sizeof(pmask->ip6dst));
913 req->features |= BIT_ULL(NPC_DIP_IPV6);
914 }
915 if (ipv6_l4_mask->psrc) {
916 memcpy(&pkt->sport, &ipv6_l4_hdr->psrc,
917 sizeof(pkt->sport));
918 memcpy(&pmask->sport, &ipv6_l4_mask->psrc,
919 sizeof(pmask->sport));
920 if (flow_type == UDP_V6_FLOW)
921 req->features |= BIT_ULL(NPC_SPORT_UDP);
922 else if (flow_type == TCP_V6_FLOW)
923 req->features |= BIT_ULL(NPC_SPORT_TCP);
924 else
925 req->features |= BIT_ULL(NPC_SPORT_SCTP);
926 }
927 if (ipv6_l4_mask->pdst) {
928 memcpy(&pkt->dport, &ipv6_l4_hdr->pdst,
929 sizeof(pkt->dport));
930 memcpy(&pmask->dport, &ipv6_l4_mask->pdst,
931 sizeof(pmask->dport));
932 if (flow_type == UDP_V6_FLOW)
933 req->features |= BIT_ULL(NPC_DPORT_UDP);
934 else if (flow_type == TCP_V6_FLOW)
935 req->features |= BIT_ULL(NPC_DPORT_TCP);
936 else
937 req->features |= BIT_ULL(NPC_DPORT_SCTP);
938 }
939 if (flow_type == UDP_V6_FLOW)
940 req->features |= BIT_ULL(NPC_IPPROTO_UDP);
941 else if (flow_type == TCP_V6_FLOW)
942 req->features |= BIT_ULL(NPC_IPPROTO_TCP);
943 else
944 req->features |= BIT_ULL(NPC_IPPROTO_SCTP);
945 break;
946 case AH_V6_FLOW:
947 case ESP_V6_FLOW:
948 pkt->etype = cpu_to_be16(ETH_P_IPV6);
949 pmask->etype = cpu_to_be16(0xFFFF);
950 req->features |= BIT_ULL(NPC_ETYPE);
951 if (!ipv6_addr_any((struct in6_addr *)ah_esp_hdr->ip6src)) {
952 memcpy(&pkt->ip6src, &ah_esp_hdr->ip6src,
953 sizeof(pkt->ip6src));
954 memcpy(&pmask->ip6src, &ah_esp_mask->ip6src,
955 sizeof(pmask->ip6src));
956 req->features |= BIT_ULL(NPC_SIP_IPV6);
957 }
958 if (!ipv6_addr_any((struct in6_addr *)ah_esp_hdr->ip6dst)) {
959 memcpy(&pkt->ip6dst, &ah_esp_hdr->ip6dst,
960 sizeof(pkt->ip6dst));
961 memcpy(&pmask->ip6dst, &ah_esp_mask->ip6dst,
962 sizeof(pmask->ip6dst));
963 req->features |= BIT_ULL(NPC_DIP_IPV6);
964 }
965
966 /* NPC profile doesn't extract AH/ESP header fields */
967 if ((ah_esp_mask->spi & ah_esp_hdr->spi) ||
968 (ah_esp_mask->tclass & ah_esp_hdr->tclass))
969 return -EOPNOTSUPP;
970
971 if (flow_type == AH_V6_FLOW)
972 req->features |= BIT_ULL(NPC_IPPROTO_AH);
973 else
974 req->features |= BIT_ULL(NPC_IPPROTO_ESP);
975 break;
976 default:
977 break;
978 }
979
980 return 0;
981 }
982
otx2_prepare_flow_request(struct ethtool_rx_flow_spec * fsp,struct npc_install_flow_req * req)983 static int otx2_prepare_flow_request(struct ethtool_rx_flow_spec *fsp,
984 struct npc_install_flow_req *req)
985 {
986 struct ethhdr *eth_mask = &fsp->m_u.ether_spec;
987 struct ethhdr *eth_hdr = &fsp->h_u.ether_spec;
988 struct flow_msg *pmask = &req->mask;
989 struct flow_msg *pkt = &req->packet;
990 u32 flow_type;
991 int ret;
992
993 flow_type = fsp->flow_type & ~(FLOW_EXT | FLOW_MAC_EXT | FLOW_RSS);
994 switch (flow_type) {
995 /* bits not set in mask are don't care */
996 case ETHER_FLOW:
997 if (!is_zero_ether_addr(eth_mask->h_source)) {
998 ether_addr_copy(pkt->smac, eth_hdr->h_source);
999 ether_addr_copy(pmask->smac, eth_mask->h_source);
1000 req->features |= BIT_ULL(NPC_SMAC);
1001 }
1002 if (!is_zero_ether_addr(eth_mask->h_dest)) {
1003 ether_addr_copy(pkt->dmac, eth_hdr->h_dest);
1004 ether_addr_copy(pmask->dmac, eth_mask->h_dest);
1005 req->features |= BIT_ULL(NPC_DMAC);
1006 }
1007 if (eth_hdr->h_proto) {
1008 memcpy(&pkt->etype, ð_hdr->h_proto,
1009 sizeof(pkt->etype));
1010 memcpy(&pmask->etype, ð_mask->h_proto,
1011 sizeof(pmask->etype));
1012 req->features |= BIT_ULL(NPC_ETYPE);
1013 }
1014 break;
1015 case IP_USER_FLOW:
1016 case TCP_V4_FLOW:
1017 case UDP_V4_FLOW:
1018 case SCTP_V4_FLOW:
1019 case AH_V4_FLOW:
1020 case ESP_V4_FLOW:
1021 ret = otx2_prepare_ipv4_flow(fsp, req, flow_type);
1022 if (ret)
1023 return ret;
1024 break;
1025 case IPV6_USER_FLOW:
1026 case TCP_V6_FLOW:
1027 case UDP_V6_FLOW:
1028 case SCTP_V6_FLOW:
1029 case AH_V6_FLOW:
1030 case ESP_V6_FLOW:
1031 ret = otx2_prepare_ipv6_flow(fsp, req, flow_type);
1032 if (ret)
1033 return ret;
1034 break;
1035 default:
1036 return -EOPNOTSUPP;
1037 }
1038 if (fsp->flow_type & FLOW_EXT) {
1039 u16 vlan_etype;
1040
1041 if (fsp->m_ext.vlan_etype) {
1042 /* Partial masks not supported */
1043 if (be16_to_cpu(fsp->m_ext.vlan_etype) != 0xFFFF)
1044 return -EINVAL;
1045
1046 vlan_etype = be16_to_cpu(fsp->h_ext.vlan_etype);
1047
1048 /* Drop rule with vlan_etype == 802.1Q
1049 * and vlan_id == 0 is not supported
1050 */
1051 if (vlan_etype == ETH_P_8021Q && !fsp->m_ext.vlan_tci &&
1052 fsp->ring_cookie == RX_CLS_FLOW_DISC)
1053 return -EINVAL;
1054
1055 /* Only ETH_P_8021Q and ETH_P_802AD types supported */
1056 if (vlan_etype != ETH_P_8021Q &&
1057 vlan_etype != ETH_P_8021AD)
1058 return -EINVAL;
1059
1060 memcpy(&pkt->vlan_etype, &fsp->h_ext.vlan_etype,
1061 sizeof(pkt->vlan_etype));
1062 memcpy(&pmask->vlan_etype, &fsp->m_ext.vlan_etype,
1063 sizeof(pmask->vlan_etype));
1064
1065 if (vlan_etype == ETH_P_8021Q)
1066 req->features |= BIT_ULL(NPC_VLAN_ETYPE_CTAG);
1067 else
1068 req->features |= BIT_ULL(NPC_VLAN_ETYPE_STAG);
1069 }
1070
1071 if (fsp->m_ext.vlan_tci) {
1072 memcpy(&pkt->vlan_tci, &fsp->h_ext.vlan_tci,
1073 sizeof(pkt->vlan_tci));
1074 memcpy(&pmask->vlan_tci, &fsp->m_ext.vlan_tci,
1075 sizeof(pmask->vlan_tci));
1076 req->features |= BIT_ULL(NPC_OUTER_VID);
1077 }
1078
1079 if (fsp->m_ext.data[1]) {
1080 if (flow_type == IP_USER_FLOW) {
1081 if (be32_to_cpu(fsp->h_ext.data[1]) != IPV4_FLAG_MORE)
1082 return -EINVAL;
1083
1084 pkt->ip_flag = be32_to_cpu(fsp->h_ext.data[1]);
1085 pmask->ip_flag = be32_to_cpu(fsp->m_ext.data[1]);
1086 req->features |= BIT_ULL(NPC_IPFRAG_IPV4);
1087 } else if (fsp->h_ext.data[1] ==
1088 cpu_to_be32(OTX2_DEFAULT_ACTION)) {
1089 /* Not Drop/Direct to queue but use action
1090 * in default entry
1091 */
1092 req->op = NIX_RX_ACTION_DEFAULT;
1093 }
1094 }
1095 }
1096
1097 if (fsp->flow_type & FLOW_MAC_EXT &&
1098 !is_zero_ether_addr(fsp->m_ext.h_dest)) {
1099 ether_addr_copy(pkt->dmac, fsp->h_ext.h_dest);
1100 ether_addr_copy(pmask->dmac, fsp->m_ext.h_dest);
1101 req->features |= BIT_ULL(NPC_DMAC);
1102 }
1103
1104 if (!req->features)
1105 return -EOPNOTSUPP;
1106
1107 return 0;
1108 }
1109
otx2_get_kw_type(struct otx2_nic * pfvf,struct npc_install_flow_req * fl_req,u8 * kw_type)1110 static int otx2_get_kw_type(struct otx2_nic *pfvf,
1111 struct npc_install_flow_req *fl_req,
1112 u8 *kw_type)
1113 {
1114 struct npc_get_num_kws_req *req;
1115 struct npc_get_num_kws_rsp *rsp;
1116 u8 *src, *dst;
1117 int off, err;
1118 int kw_bits;
1119
1120 off = offsetof(struct npc_install_flow_req, packet);
1121
1122 mutex_lock(&pfvf->mbox.lock);
1123
1124 req = otx2_mbox_alloc_msg_npc_get_num_kws(&pfvf->mbox);
1125 if (!req) {
1126 mutex_unlock(&pfvf->mbox.lock);
1127 return -ENOMEM;
1128 }
1129
1130 dst = (u8 *)&req->fl + off;
1131 src = (u8 *)fl_req + off;
1132
1133 memcpy(dst, src, sizeof(struct npc_install_flow_req) - off);
1134
1135 err = otx2_sync_mbox_msg(&pfvf->mbox);
1136 if (err) {
1137 mutex_unlock(&pfvf->mbox.lock);
1138 netdev_err(pfvf->netdev,
1139 "Error to get default number of keywords\n");
1140 return err;
1141 }
1142
1143 rsp = (struct npc_get_num_kws_rsp *)otx2_mbox_get_rsp
1144 (&pfvf->mbox.mbox, 0, &req->hdr);
1145 if (IS_ERR(rsp)) {
1146 mutex_unlock(&pfvf->mbox.lock);
1147 return -EFAULT;
1148 }
1149
1150 kw_bits = rsp->kws * 64;
1151
1152 if (kw_bits <= 256)
1153 *kw_type = NPC_MCAM_KEY_X2;
1154 else
1155 *kw_type = NPC_MCAM_KEY_X4;
1156
1157 mutex_unlock(&pfvf->mbox.lock);
1158
1159 return 0;
1160 }
1161
otx2_is_flow_rule_dmacfilter(struct otx2_nic * pfvf,struct ethtool_rx_flow_spec * fsp)1162 static int otx2_is_flow_rule_dmacfilter(struct otx2_nic *pfvf,
1163 struct ethtool_rx_flow_spec *fsp)
1164 {
1165 struct ethhdr *eth_mask = &fsp->m_u.ether_spec;
1166 struct ethhdr *eth_hdr = &fsp->h_u.ether_spec;
1167 u64 ring_cookie = fsp->ring_cookie;
1168 u32 flow_type;
1169
1170 if (!(pfvf->flags & OTX2_FLAG_DMACFLTR_SUPPORT))
1171 return false;
1172
1173 flow_type = fsp->flow_type & ~(FLOW_EXT | FLOW_MAC_EXT | FLOW_RSS);
1174
1175 /* CGX/RPM block dmac filtering configured for white listing
1176 * check for action other than DROP
1177 */
1178 if (flow_type == ETHER_FLOW && ring_cookie != RX_CLS_FLOW_DISC &&
1179 !ethtool_get_flow_spec_ring_vf(ring_cookie)) {
1180 if (is_zero_ether_addr(eth_mask->h_dest) &&
1181 is_valid_ether_addr(eth_hdr->h_dest))
1182 return true;
1183 }
1184
1185 return false;
1186 }
1187
otx2_add_flow_msg(struct otx2_nic * pfvf,struct otx2_flow * flow)1188 static int otx2_add_flow_msg(struct otx2_nic *pfvf, struct otx2_flow *flow)
1189 {
1190 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
1191 struct npc_install_flow_req *req, treq = { 0 };
1192 u64 ring_cookie = flow->flow_spec.ring_cookie;
1193 #ifdef CONFIG_DCB
1194 int vlan_prio, qidx, pfc_rule = 0;
1195 #endif
1196 bool modify = false, is_x2;
1197 int err, vf = 0, off, sz;
1198 u8 kw_type = 0;
1199 u8 *src, *dst;
1200 u16 x4_slots;
1201
1202 if (is_cn20k(pfvf->pdev)) {
1203 err = otx2_mcam_pfl_info_get(pfvf, &x4_slots, &kw_type);
1204 if (err) {
1205 netdev_err(pfvf->netdev,
1206 "Error to retrieve NPC profile info, pcifunc=%#x\n",
1207 pfvf->pcifunc);
1208 return -EFAULT;
1209 }
1210
1211 is_x2 = kw_type == NPC_MCAM_KEY_X2;
1212 if (!is_x2) {
1213 err = otx2_prepare_flow_request(&flow->flow_spec,
1214 &treq);
1215 if (err)
1216 return err;
1217
1218 err = otx2_get_kw_type(pfvf, &treq, &kw_type);
1219 if (err)
1220 return err;
1221
1222 modify = true;
1223 }
1224 }
1225
1226 mutex_lock(&pfvf->mbox.lock);
1227 req = otx2_mbox_alloc_msg_npc_install_flow(&pfvf->mbox);
1228 if (!req) {
1229 mutex_unlock(&pfvf->mbox.lock);
1230 return -ENOMEM;
1231 }
1232
1233 if (modify) {
1234 off = offsetof(struct npc_install_flow_req, packet);
1235 sz = sizeof(struct npc_install_flow_req) - off;
1236 dst = (u8 *)req + off;
1237 src = (u8 *)&treq + off;
1238
1239 memcpy(dst, src, sz);
1240 req->req_kw_type = kw_type;
1241 } else {
1242 err = otx2_prepare_flow_request(&flow->flow_spec, req);
1243 if (err) {
1244 /* free the allocated msg above */
1245 otx2_mbox_reset(&pfvf->mbox.mbox, 0);
1246 mutex_unlock(&pfvf->mbox.lock);
1247 return err;
1248 }
1249 }
1250
1251 netdev_dbg(pfvf->netdev,
1252 "flow entry (%u) installed at loc:%u kw_type=%u\n",
1253 flow_cfg->flow_ent[flow->location],
1254 flow->location, kw_type);
1255
1256 req->entry = flow->entry;
1257 req->intf = NIX_INTF_RX;
1258 req->set_cntr = 1;
1259 req->channel = pfvf->hw.rx_chan_base;
1260 if (ring_cookie == RX_CLS_FLOW_DISC) {
1261 req->op = NIX_RX_ACTIONOP_DROP;
1262 } else {
1263 /* change to unicast only if action of default entry is not
1264 * requested by user
1265 */
1266 if (flow->flow_spec.flow_type & FLOW_RSS) {
1267 req->op = NIX_RX_ACTIONOP_RSS;
1268 req->index = flow->rss_ctx_id;
1269 req->flow_key_alg = pfvf->hw.flowkey_alg_idx;
1270 } else {
1271 req->op = NIX_RX_ACTIONOP_UCAST;
1272 req->index = ethtool_get_flow_spec_ring(ring_cookie);
1273 }
1274 vf = ethtool_get_flow_spec_ring_vf(ring_cookie);
1275 if (vf > pci_num_vf(pfvf->pdev)) {
1276 mutex_unlock(&pfvf->mbox.lock);
1277 return -EINVAL;
1278 }
1279
1280 #ifdef CONFIG_DCB
1281 /* Identify PFC rule if PFC enabled and ntuple rule is vlan */
1282 if (!vf && (req->features & BIT_ULL(NPC_OUTER_VID)) &&
1283 pfvf->pfc_en && req->op != NIX_RX_ACTIONOP_RSS) {
1284 vlan_prio = ntohs(req->packet.vlan_tci) &
1285 ntohs(req->mask.vlan_tci);
1286
1287 /* Get the priority */
1288 vlan_prio >>= 13;
1289 flow->rule_type |= PFC_FLOWCTRL_RULE;
1290 /* Check if PFC enabled for this priority */
1291 if (pfvf->pfc_en & BIT(vlan_prio)) {
1292 pfc_rule = true;
1293 qidx = req->index;
1294 }
1295 }
1296 #endif
1297 }
1298
1299 /* ethtool ring_cookie has (VF + 1) for VF */
1300 if (vf) {
1301 req->vf = vf;
1302 flow->is_vf = true;
1303 flow->vf = vf;
1304 }
1305
1306 /* Send message to AF */
1307 err = otx2_sync_mbox_msg(&pfvf->mbox);
1308
1309 #ifdef CONFIG_DCB
1310 if (!err && pfc_rule)
1311 otx2_update_bpid_in_rqctx(pfvf, vlan_prio, qidx, true);
1312 #endif
1313
1314 mutex_unlock(&pfvf->mbox.lock);
1315 return err;
1316 }
1317
otx2_add_flow_with_pfmac(struct otx2_nic * pfvf,struct otx2_flow * flow)1318 static int otx2_add_flow_with_pfmac(struct otx2_nic *pfvf,
1319 struct otx2_flow *flow)
1320 {
1321 struct otx2_flow *pf_mac;
1322 struct ethhdr *eth_hdr;
1323
1324 pf_mac = kzalloc_obj(*pf_mac);
1325 if (!pf_mac)
1326 return -ENOMEM;
1327
1328 pf_mac->entry = 0;
1329 pf_mac->rule_type |= DMAC_FILTER_RULE;
1330 pf_mac->location = pfvf->flow_cfg->max_flows;
1331 memcpy(&pf_mac->flow_spec, &flow->flow_spec,
1332 sizeof(struct ethtool_rx_flow_spec));
1333 pf_mac->flow_spec.location = pf_mac->location;
1334
1335 /* Copy PF mac address */
1336 eth_hdr = &pf_mac->flow_spec.h_u.ether_spec;
1337 ether_addr_copy(eth_hdr->h_dest, pfvf->netdev->dev_addr);
1338
1339 /* Install DMAC filter with PF mac address */
1340 otx2_dmacflt_add(pfvf, eth_hdr->h_dest, 0);
1341
1342 otx2_add_flow_to_list(pfvf, pf_mac);
1343 pfvf->flow_cfg->nr_flows++;
1344 set_bit(0, pfvf->flow_cfg->dmacflt_bmap);
1345
1346 return 0;
1347 }
1348
otx2_add_flow(struct otx2_nic * pfvf,struct ethtool_rxnfc * nfc)1349 int otx2_add_flow(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc)
1350 {
1351 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
1352 struct ethtool_rx_flow_spec *fsp = &nfc->fs;
1353 struct otx2_flow *flow;
1354 struct ethhdr *eth_hdr;
1355 bool new = false;
1356 int err = 0;
1357 u64 vf_num;
1358 u32 ring;
1359
1360 if (!flow_cfg->max_flows) {
1361 netdev_err(pfvf->netdev,
1362 "Ntuple rule count is 0, allocate and retry\n");
1363 return -EINVAL;
1364 }
1365
1366 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
1367 if (!(pfvf->flags & OTX2_FLAG_NTUPLE_SUPPORT))
1368 return -ENOMEM;
1369
1370 /* Number of queues on a VF can be greater or less than
1371 * the PF's queue. Hence no need to check for the
1372 * queue count. Hence no need to check queue count if PF
1373 * is installing for its VF. Below is the expected vf_num value
1374 * based on the ethtool commands.
1375 *
1376 * e.g.
1377 * 1. ethtool -U <netdev> ... action -1 ==> vf_num:255
1378 * 2. ethtool -U <netdev> ... action <queue_num> ==> vf_num:0
1379 * 3. ethtool -U <netdev> ... vf <vf_idx> queue <queue_num> ==>
1380 * vf_num:vf_idx+1
1381 */
1382 vf_num = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
1383 if (!is_otx2_vf(pfvf->pcifunc) && !vf_num &&
1384 ring >= pfvf->hw.rx_queues && fsp->ring_cookie != RX_CLS_FLOW_DISC)
1385 return -EINVAL;
1386
1387 if (fsp->location >= otx2_get_maxflows(flow_cfg))
1388 return -EINVAL;
1389
1390 flow = otx2_find_flow(pfvf, fsp->location);
1391 if (!flow) {
1392 flow = kzalloc_obj(*flow);
1393 if (!flow)
1394 return -ENOMEM;
1395 flow->location = fsp->location;
1396 flow->entry = flow_cfg->flow_ent[flow->location];
1397 new = true;
1398 }
1399 /* struct copy */
1400 flow->flow_spec = *fsp;
1401
1402 if (fsp->flow_type & FLOW_RSS)
1403 flow->rss_ctx_id = nfc->rss_context;
1404
1405 if (otx2_is_flow_rule_dmacfilter(pfvf, &flow->flow_spec)) {
1406 eth_hdr = &flow->flow_spec.h_u.ether_spec;
1407
1408 /* Sync dmac filter table with updated fields */
1409 if (flow->rule_type & DMAC_FILTER_RULE)
1410 return otx2_dmacflt_update(pfvf, eth_hdr->h_dest,
1411 flow->entry);
1412
1413 if (bitmap_full(flow_cfg->dmacflt_bmap,
1414 flow_cfg->dmacflt_max_flows)) {
1415 netdev_warn(pfvf->netdev,
1416 "Can't insert the rule %d as max allowed dmac filters are %d\n",
1417 flow->location +
1418 flow_cfg->dmacflt_max_flows,
1419 flow_cfg->dmacflt_max_flows);
1420 err = -EINVAL;
1421 if (new)
1422 kfree(flow);
1423 return err;
1424 }
1425
1426 /* Install PF mac address to DMAC filter list */
1427 if (!test_bit(0, flow_cfg->dmacflt_bmap))
1428 otx2_add_flow_with_pfmac(pfvf, flow);
1429
1430 flow->rule_type |= DMAC_FILTER_RULE;
1431 flow->entry = find_first_zero_bit(flow_cfg->dmacflt_bmap,
1432 flow_cfg->dmacflt_max_flows);
1433 fsp->location = flow_cfg->max_flows + flow->entry;
1434 flow->flow_spec.location = fsp->location;
1435 flow->location = fsp->location;
1436
1437 set_bit(flow->entry, flow_cfg->dmacflt_bmap);
1438 otx2_dmacflt_add(pfvf, eth_hdr->h_dest, flow->entry);
1439
1440 } else {
1441 if (flow->location >= pfvf->flow_cfg->max_flows) {
1442 netdev_warn(pfvf->netdev,
1443 "Can't insert non dmac ntuple rule at %d, allowed range %d-0\n",
1444 flow->location,
1445 flow_cfg->max_flows - 1);
1446 err = -EINVAL;
1447 } else {
1448 err = otx2_add_flow_msg(pfvf, flow);
1449 }
1450 }
1451
1452 if (err) {
1453 if (err == MBOX_MSG_INVALID)
1454 err = -EINVAL;
1455 if (new)
1456 kfree(flow);
1457 return err;
1458 }
1459
1460 /* add the new flow installed to list */
1461 if (new) {
1462 otx2_add_flow_to_list(pfvf, flow);
1463 flow_cfg->nr_flows++;
1464 }
1465
1466 if (flow->is_vf)
1467 netdev_info(pfvf->netdev,
1468 "Make sure that VF's queue number is within its queue limit\n");
1469 return 0;
1470 }
1471
otx2_remove_flow_msg(struct otx2_nic * pfvf,u16 entry,bool all)1472 static int otx2_remove_flow_msg(struct otx2_nic *pfvf, u16 entry, bool all)
1473 {
1474 struct npc_delete_flow_req *req;
1475 int err;
1476
1477 mutex_lock(&pfvf->mbox.lock);
1478 req = otx2_mbox_alloc_msg_npc_delete_flow(&pfvf->mbox);
1479 if (!req) {
1480 mutex_unlock(&pfvf->mbox.lock);
1481 return -ENOMEM;
1482 }
1483
1484 req->entry = entry;
1485 if (all)
1486 req->all = 1;
1487
1488 /* Send message to AF */
1489 err = otx2_sync_mbox_msg(&pfvf->mbox);
1490 mutex_unlock(&pfvf->mbox.lock);
1491 return err;
1492 }
1493
otx2_update_rem_pfmac(struct otx2_nic * pfvf,int req)1494 static void otx2_update_rem_pfmac(struct otx2_nic *pfvf, int req)
1495 {
1496 struct otx2_flow *iter;
1497 struct ethhdr *eth_hdr;
1498 bool found = false;
1499
1500 list_for_each_entry(iter, &pfvf->flow_cfg->flow_list, list) {
1501 if ((iter->rule_type & DMAC_FILTER_RULE) && iter->entry == 0) {
1502 eth_hdr = &iter->flow_spec.h_u.ether_spec;
1503 if (req == DMAC_ADDR_DEL) {
1504 otx2_dmacflt_remove(pfvf, eth_hdr->h_dest,
1505 0);
1506 clear_bit(0, pfvf->flow_cfg->dmacflt_bmap);
1507 found = true;
1508 } else {
1509 ether_addr_copy(eth_hdr->h_dest,
1510 pfvf->netdev->dev_addr);
1511
1512 otx2_dmacflt_update(pfvf, eth_hdr->h_dest, 0);
1513 }
1514 break;
1515 }
1516 }
1517
1518 if (found) {
1519 list_del(&iter->list);
1520 kfree(iter);
1521 pfvf->flow_cfg->nr_flows--;
1522 }
1523 }
1524
otx2_remove_flow(struct otx2_nic * pfvf,u32 location)1525 int otx2_remove_flow(struct otx2_nic *pfvf, u32 location)
1526 {
1527 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
1528 struct otx2_flow *flow;
1529 int err;
1530
1531 if (location >= otx2_get_maxflows(flow_cfg))
1532 return -EINVAL;
1533
1534 flow = otx2_find_flow(pfvf, location);
1535 if (!flow)
1536 return -ENOENT;
1537
1538 if (flow->rule_type & DMAC_FILTER_RULE) {
1539 struct ethhdr *eth_hdr = &flow->flow_spec.h_u.ether_spec;
1540
1541 /* user not allowed to remove dmac filter with interface mac */
1542 if (ether_addr_equal(pfvf->netdev->dev_addr, eth_hdr->h_dest))
1543 return -EPERM;
1544
1545 err = otx2_dmacflt_remove(pfvf, eth_hdr->h_dest,
1546 flow->entry);
1547 clear_bit(flow->entry, flow_cfg->dmacflt_bmap);
1548 /* If all dmac filters are removed delete macfilter with
1549 * interface mac address and configure CGX/RPM block in
1550 * promiscuous mode
1551 */
1552 if (bitmap_weight(flow_cfg->dmacflt_bmap,
1553 flow_cfg->dmacflt_max_flows) == 1)
1554 otx2_update_rem_pfmac(pfvf, DMAC_ADDR_DEL);
1555 } else {
1556 #ifdef CONFIG_DCB
1557 if (flow->rule_type & PFC_FLOWCTRL_RULE)
1558 otx2_update_bpid_in_rqctx(pfvf, 0,
1559 flow->flow_spec.ring_cookie,
1560 false);
1561 #endif
1562
1563 err = otx2_remove_flow_msg(pfvf, flow->entry, false);
1564 }
1565
1566 if (err)
1567 return err;
1568
1569 list_del(&flow->list);
1570 kfree(flow);
1571 flow_cfg->nr_flows--;
1572
1573 return 0;
1574 }
1575
otx2_rss_ctx_flow_del(struct otx2_nic * pfvf,int ctx_id)1576 void otx2_rss_ctx_flow_del(struct otx2_nic *pfvf, int ctx_id)
1577 {
1578 struct otx2_flow *flow, *tmp;
1579 int err;
1580
1581 list_for_each_entry_safe(flow, tmp, &pfvf->flow_cfg->flow_list, list) {
1582 if (flow->rss_ctx_id != ctx_id)
1583 continue;
1584 err = otx2_remove_flow(pfvf, flow->location);
1585 if (err)
1586 netdev_warn(pfvf->netdev,
1587 "Can't delete the rule %d associated with this rss group err:%d",
1588 flow->location, err);
1589 }
1590 }
1591
otx2_destroy_ntuple_flows(struct otx2_nic * pfvf)1592 int otx2_destroy_ntuple_flows(struct otx2_nic *pfvf)
1593 {
1594 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
1595 struct npc_delete_flow_req *req;
1596 struct otx2_flow *iter, *tmp;
1597 int err;
1598
1599 if (!(pfvf->flags & OTX2_FLAG_NTUPLE_SUPPORT))
1600 return 0;
1601
1602 if (!flow_cfg->max_flows)
1603 return 0;
1604
1605 mutex_lock(&pfvf->mbox.lock);
1606 req = otx2_mbox_alloc_msg_npc_delete_flow(&pfvf->mbox);
1607 if (!req) {
1608 mutex_unlock(&pfvf->mbox.lock);
1609 return -ENOMEM;
1610 }
1611
1612 req->start = flow_cfg->flow_ent[0];
1613 req->end = flow_cfg->flow_ent[flow_cfg->max_flows - 1];
1614 err = otx2_sync_mbox_msg(&pfvf->mbox);
1615 mutex_unlock(&pfvf->mbox.lock);
1616
1617 list_for_each_entry_safe(iter, tmp, &flow_cfg->flow_list, list) {
1618 list_del(&iter->list);
1619 kfree(iter);
1620 flow_cfg->nr_flows--;
1621 }
1622 return err;
1623 }
1624
otx2_destroy_mcam_flows(struct otx2_nic * pfvf)1625 int otx2_destroy_mcam_flows(struct otx2_nic *pfvf)
1626 {
1627 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
1628 struct npc_mcam_free_entry_req *req;
1629 struct otx2_flow *iter, *tmp;
1630 int err;
1631
1632 if (!(pfvf->flags & OTX2_FLAG_MCAM_ENTRIES_ALLOC))
1633 return 0;
1634
1635 /* remove all flows */
1636 err = otx2_remove_flow_msg(pfvf, 0, true);
1637 if (err)
1638 return err;
1639
1640 list_for_each_entry_safe(iter, tmp, &flow_cfg->flow_list, list) {
1641 list_del(&iter->list);
1642 kfree(iter);
1643 flow_cfg->nr_flows--;
1644 }
1645
1646 mutex_lock(&pfvf->mbox.lock);
1647 req = otx2_mbox_alloc_msg_npc_mcam_free_entry(&pfvf->mbox);
1648 if (!req) {
1649 mutex_unlock(&pfvf->mbox.lock);
1650 return -ENOMEM;
1651 }
1652
1653 req->all = 1;
1654 /* Send message to AF to free MCAM entries */
1655 err = otx2_sync_mbox_msg(&pfvf->mbox);
1656 if (err) {
1657 mutex_unlock(&pfvf->mbox.lock);
1658 return err;
1659 }
1660
1661 pfvf->flags &= ~OTX2_FLAG_MCAM_ENTRIES_ALLOC;
1662 flow_cfg->max_flows = 0;
1663 mutex_unlock(&pfvf->mbox.lock);
1664
1665 return 0;
1666 }
1667
otx2_install_rxvlan_offload_flow(struct otx2_nic * pfvf)1668 int otx2_install_rxvlan_offload_flow(struct otx2_nic *pfvf)
1669 {
1670 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
1671 struct npc_install_flow_req *req;
1672 int err;
1673
1674 mutex_lock(&pfvf->mbox.lock);
1675 req = otx2_mbox_alloc_msg_npc_install_flow(&pfvf->mbox);
1676 if (!req) {
1677 mutex_unlock(&pfvf->mbox.lock);
1678 return -ENOMEM;
1679 }
1680
1681 req->entry = flow_cfg->def_ent[flow_cfg->rx_vlan_offset];
1682 req->intf = NIX_INTF_RX;
1683 ether_addr_copy(req->packet.dmac, pfvf->netdev->dev_addr);
1684 eth_broadcast_addr((u8 *)&req->mask.dmac);
1685 req->channel = pfvf->hw.rx_chan_base;
1686 req->op = NIX_RX_ACTION_DEFAULT;
1687 req->features = BIT_ULL(NPC_OUTER_VID) | BIT_ULL(NPC_DMAC);
1688 req->vtag0_valid = true;
1689 req->vtag0_type = NIX_AF_LFX_RX_VTAG_TYPE0;
1690
1691 /* Send message to AF */
1692 err = otx2_sync_mbox_msg(&pfvf->mbox);
1693 mutex_unlock(&pfvf->mbox.lock);
1694 return err;
1695 }
1696
otx2_delete_rxvlan_offload_flow(struct otx2_nic * pfvf)1697 static int otx2_delete_rxvlan_offload_flow(struct otx2_nic *pfvf)
1698 {
1699 struct otx2_flow_config *flow_cfg = pfvf->flow_cfg;
1700 struct npc_delete_flow_req *req;
1701 int err;
1702
1703 mutex_lock(&pfvf->mbox.lock);
1704 req = otx2_mbox_alloc_msg_npc_delete_flow(&pfvf->mbox);
1705 if (!req) {
1706 mutex_unlock(&pfvf->mbox.lock);
1707 return -ENOMEM;
1708 }
1709
1710 req->entry = flow_cfg->def_ent[flow_cfg->rx_vlan_offset];
1711 /* Send message to AF */
1712 err = otx2_sync_mbox_msg(&pfvf->mbox);
1713 mutex_unlock(&pfvf->mbox.lock);
1714 return err;
1715 }
1716
otx2_enable_rxvlan(struct otx2_nic * pf,bool enable)1717 int otx2_enable_rxvlan(struct otx2_nic *pf, bool enable)
1718 {
1719 struct nix_vtag_config *req;
1720 struct mbox_msghdr *rsp_hdr;
1721 int err;
1722
1723 /* Dont have enough mcam entries */
1724 if (!(pf->flags & OTX2_FLAG_RX_VLAN_SUPPORT))
1725 return -ENOMEM;
1726
1727 if (enable) {
1728 err = otx2_install_rxvlan_offload_flow(pf);
1729 if (err)
1730 return err;
1731 } else {
1732 err = otx2_delete_rxvlan_offload_flow(pf);
1733 if (err)
1734 return err;
1735 }
1736
1737 mutex_lock(&pf->mbox.lock);
1738 req = otx2_mbox_alloc_msg_nix_vtag_cfg(&pf->mbox);
1739 if (!req) {
1740 mutex_unlock(&pf->mbox.lock);
1741 return -ENOMEM;
1742 }
1743
1744 /* config strip, capture and size */
1745 req->vtag_size = VTAGSIZE_T4;
1746 req->cfg_type = 1; /* rx vlan cfg */
1747 req->rx.vtag_type = NIX_AF_LFX_RX_VTAG_TYPE0;
1748 req->rx.strip_vtag = enable;
1749 req->rx.capture_vtag = enable;
1750
1751 err = otx2_sync_mbox_msg(&pf->mbox);
1752 if (err) {
1753 mutex_unlock(&pf->mbox.lock);
1754 return err;
1755 }
1756
1757 rsp_hdr = otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &req->hdr);
1758 if (IS_ERR(rsp_hdr)) {
1759 mutex_unlock(&pf->mbox.lock);
1760 return PTR_ERR(rsp_hdr);
1761 }
1762
1763 mutex_unlock(&pf->mbox.lock);
1764 return rsp_hdr->rc;
1765 }
1766
otx2_dmacflt_reinstall_flows(struct otx2_nic * pf)1767 void otx2_dmacflt_reinstall_flows(struct otx2_nic *pf)
1768 {
1769 struct otx2_flow *iter;
1770 struct ethhdr *eth_hdr;
1771
1772 list_for_each_entry(iter, &pf->flow_cfg->flow_list, list) {
1773 if (iter->rule_type & DMAC_FILTER_RULE) {
1774 eth_hdr = &iter->flow_spec.h_u.ether_spec;
1775 otx2_dmacflt_add(pf, eth_hdr->h_dest,
1776 iter->entry);
1777 }
1778 }
1779 }
1780
otx2_dmacflt_update_pfmac_flow(struct otx2_nic * pfvf)1781 void otx2_dmacflt_update_pfmac_flow(struct otx2_nic *pfvf)
1782 {
1783 otx2_update_rem_pfmac(pfvf, DMAC_ADDR_UPDATE);
1784 }
1785