1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Intel Low Power Subsystem PWM controller driver */ 3 4 #ifndef __PLATFORM_DATA_X86_PWM_LPSS_H 5 #define __PLATFORM_DATA_X86_PWM_LPSS_H 6 7 #include <linux/types.h> 8 9 struct device; 10 11 struct pwm_lpss_chip; 12 13 struct pwm_lpss_boardinfo { 14 unsigned long clk_rate; 15 unsigned int npwm; 16 unsigned long base_unit_bits; 17 /* 18 * Some versions of the IP may stuck in the state machine if enable 19 * bit is not set, and hence update bit will show busy status till 20 * the reset. For the rest it may be otherwise. 21 */ 22 bool bypass; 23 /* 24 * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device 25 * messes with the PWM0 controllers state, 26 */ 27 bool other_devices_aml_touches_pwm_regs; 28 }; 29 30 struct pwm_chip *devm_pwm_lpss_probe(struct device *dev, void __iomem *base, 31 const struct pwm_lpss_boardinfo *info); 32 33 #endif /* __PLATFORM_DATA_X86_PWM_LPSS_H */ 34