1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * CZ.NIC's Turris Omnia MCU GPIO and IRQ driver
4 *
5 * 2024 by Marek Behún <kabel@kernel.org>
6 */
7
8 #include <linux/array_size.h>
9 #include <linux/bitfield.h>
10 #include <linux/bitops.h>
11 #include <linux/bug.h>
12 #include <linux/cleanup.h>
13 #include <linux/device.h>
14 #include <linux/devm-helpers.h>
15 #include <linux/errno.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/gpio/driver.h>
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
20 #include <linux/mutex.h>
21 #include <linux/sysfs.h>
22 #include <linux/types.h>
23 #include <linux/workqueue.h>
24 #include <linux/unaligned.h>
25
26 #include <linux/turris-omnia-mcu-interface.h>
27 #include "turris-omnia-mcu.h"
28
29 #define OMNIA_CMD_INT_ARG_LEN 8
30 #define FRONT_BUTTON_RELEASE_DELAY_MS 50
31
32 static const char * const omnia_mcu_gpio_names[64] = {
33 /* GPIOs with value read from the 16-bit wide status */
34 [4] = "MiniPCIe0 Card Detect",
35 [5] = "MiniPCIe0 mSATA Indicator",
36 [6] = "Front USB3 port over-current",
37 [7] = "Rear USB3 port over-current",
38 [8] = "Front USB3 port power",
39 [9] = "Rear USB3 port power",
40 [12] = "Front Button",
41
42 /* GPIOs with value read from the 32-bit wide extended status */
43 [16] = "SFP nDET",
44 [28] = "MiniPCIe0 LED",
45 [29] = "MiniPCIe1 LED",
46 [30] = "MiniPCIe2 LED",
47 [31] = "MiniPCIe0 PAN LED",
48 [32] = "MiniPCIe1 PAN LED",
49 [33] = "MiniPCIe2 PAN LED",
50 [34] = "WAN PHY LED0",
51 [35] = "WAN PHY LED1",
52 [36] = "LAN switch p0 LED0",
53 [37] = "LAN switch p0 LED1",
54 [38] = "LAN switch p1 LED0",
55 [39] = "LAN switch p1 LED1",
56 [40] = "LAN switch p2 LED0",
57 [41] = "LAN switch p2 LED1",
58 [42] = "LAN switch p3 LED0",
59 [43] = "LAN switch p3 LED1",
60 [44] = "LAN switch p4 LED0",
61 [45] = "LAN switch p4 LED1",
62 [46] = "LAN switch p5 LED0",
63 [47] = "LAN switch p5 LED1",
64
65 /* GPIOs with value read from the 16-bit wide extended control status */
66 [48] = "eMMC nRESET",
67 [49] = "LAN switch nRESET",
68 [50] = "WAN PHY nRESET",
69 [51] = "MiniPCIe0 nPERST",
70 [52] = "MiniPCIe1 nPERST",
71 [53] = "MiniPCIe2 nPERST",
72 [54] = "WAN PHY SFP mux",
73 [56] = "VHV power disable",
74 };
75
76 struct omnia_gpio {
77 u8 cmd;
78 u8 ctl_cmd;
79 u8 bit;
80 u8 ctl_bit;
81 u8 int_bit;
82 u16 feat;
83 u16 feat_mask;
84 };
85
86 #define OMNIA_GPIO_INVALID_INT_BIT 0xff
87
88 #define _DEF_GPIO(_cmd, _ctl_cmd, _bit, _ctl_bit, _int_bit, _feat, _feat_mask) \
89 { \
90 .cmd = _cmd, \
91 .ctl_cmd = _ctl_cmd, \
92 .bit = _bit, \
93 .ctl_bit = _ctl_bit, \
94 .int_bit = (_int_bit) < 0 ? OMNIA_GPIO_INVALID_INT_BIT \
95 : (_int_bit), \
96 .feat = _feat, \
97 .feat_mask = _feat_mask, \
98 }
99
100 #define _DEF_GPIO_STS(_name) \
101 _DEF_GPIO(OMNIA_CMD_GET_STATUS_WORD, 0, __bf_shf(OMNIA_STS_ ## _name), \
102 0, __bf_shf(OMNIA_INT_ ## _name), 0, 0)
103
104 #define _DEF_GPIO_CTL(_name) \
105 _DEF_GPIO(OMNIA_CMD_GET_STATUS_WORD, OMNIA_CMD_GENERAL_CONTROL, \
106 __bf_shf(OMNIA_STS_ ## _name), __bf_shf(OMNIA_CTL_ ## _name), \
107 -1, 0, 0)
108
109 #define _DEF_GPIO_EXT_STS(_name, _feat) \
110 _DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \
111 __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \
112 __bf_shf(OMNIA_INT_ ## _name), \
113 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS, \
114 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS)
115
116 #define _DEF_GPIO_EXT_STS_LED(_name, _ledext) \
117 _DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \
118 __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \
119 __bf_shf(OMNIA_INT_ ## _name), \
120 OMNIA_FEAT_LED_STATE_ ## _ledext, \
121 OMNIA_FEAT_LED_STATE_EXT_MASK)
122
123 #define _DEF_GPIO_EXT_STS_LEDALL(_name) \
124 _DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \
125 __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \
126 __bf_shf(OMNIA_INT_ ## _name), \
127 OMNIA_FEAT_LED_STATE_EXT_MASK, 0)
128
129 #define _DEF_GPIO_EXT_CTL(_name, _feat) \
130 _DEF_GPIO(OMNIA_CMD_GET_EXT_CONTROL_STATUS, OMNIA_CMD_EXT_CONTROL, \
131 __bf_shf(OMNIA_EXT_CTL_ ## _name), \
132 __bf_shf(OMNIA_EXT_CTL_ ## _name), -1, \
133 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS, \
134 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS)
135
136 #define _DEF_INT(_name) \
137 _DEF_GPIO(0, 0, 0, 0, __bf_shf(OMNIA_INT_ ## _name), 0, 0)
138
is_int_bit_valid(const struct omnia_gpio * gpio)139 static inline bool is_int_bit_valid(const struct omnia_gpio *gpio)
140 {
141 return gpio->int_bit != OMNIA_GPIO_INVALID_INT_BIT;
142 }
143
144 static const struct omnia_gpio omnia_gpios[64] = {
145 /* GPIOs with value read from the 16-bit wide status */
146 [4] = _DEF_GPIO_STS(CARD_DET),
147 [5] = _DEF_GPIO_STS(MSATA_IND),
148 [6] = _DEF_GPIO_STS(USB30_OVC),
149 [7] = _DEF_GPIO_STS(USB31_OVC),
150 [8] = _DEF_GPIO_CTL(USB30_PWRON),
151 [9] = _DEF_GPIO_CTL(USB31_PWRON),
152
153 /* brightness changed interrupt, no GPIO */
154 [11] = _DEF_INT(BRIGHTNESS_CHANGED),
155
156 [12] = _DEF_GPIO_STS(BUTTON_PRESSED),
157
158 /* TRNG interrupt, no GPIO */
159 [13] = _DEF_INT(TRNG),
160
161 /* MESSAGE_SIGNED interrupt, no GPIO */
162 [14] = _DEF_INT(MESSAGE_SIGNED),
163
164 /* GPIOs with value read from the 32-bit wide extended status */
165 [16] = _DEF_GPIO_EXT_STS(SFP_nDET, PERIPH_MCU),
166 [28] = _DEF_GPIO_EXT_STS_LEDALL(WLAN0_MSATA_LED),
167 [29] = _DEF_GPIO_EXT_STS_LEDALL(WLAN1_LED),
168 [30] = _DEF_GPIO_EXT_STS_LEDALL(WLAN2_LED),
169 [31] = _DEF_GPIO_EXT_STS_LED(WPAN0_LED, EXT),
170 [32] = _DEF_GPIO_EXT_STS_LED(WPAN1_LED, EXT),
171 [33] = _DEF_GPIO_EXT_STS_LED(WPAN2_LED, EXT),
172 [34] = _DEF_GPIO_EXT_STS_LEDALL(WAN_LED0),
173 [35] = _DEF_GPIO_EXT_STS_LED(WAN_LED1, EXT_V32),
174 [36] = _DEF_GPIO_EXT_STS_LEDALL(LAN0_LED0),
175 [37] = _DEF_GPIO_EXT_STS_LEDALL(LAN0_LED1),
176 [38] = _DEF_GPIO_EXT_STS_LEDALL(LAN1_LED0),
177 [39] = _DEF_GPIO_EXT_STS_LEDALL(LAN1_LED1),
178 [40] = _DEF_GPIO_EXT_STS_LEDALL(LAN2_LED0),
179 [41] = _DEF_GPIO_EXT_STS_LEDALL(LAN2_LED1),
180 [42] = _DEF_GPIO_EXT_STS_LEDALL(LAN3_LED0),
181 [43] = _DEF_GPIO_EXT_STS_LEDALL(LAN3_LED1),
182 [44] = _DEF_GPIO_EXT_STS_LEDALL(LAN4_LED0),
183 [45] = _DEF_GPIO_EXT_STS_LEDALL(LAN4_LED1),
184 [46] = _DEF_GPIO_EXT_STS_LEDALL(LAN5_LED0),
185 [47] = _DEF_GPIO_EXT_STS_LEDALL(LAN5_LED1),
186
187 /* GPIOs with value read from the 16-bit wide extended control status */
188 [48] = _DEF_GPIO_EXT_CTL(nRES_MMC, PERIPH_MCU),
189 [49] = _DEF_GPIO_EXT_CTL(nRES_LAN, PERIPH_MCU),
190 [50] = _DEF_GPIO_EXT_CTL(nRES_PHY, PERIPH_MCU),
191 [51] = _DEF_GPIO_EXT_CTL(nPERST0, PERIPH_MCU),
192 [52] = _DEF_GPIO_EXT_CTL(nPERST1, PERIPH_MCU),
193 [53] = _DEF_GPIO_EXT_CTL(nPERST2, PERIPH_MCU),
194 [54] = _DEF_GPIO_EXT_CTL(PHY_SFP, PERIPH_MCU),
195 [56] = _DEF_GPIO_EXT_CTL(nVHV_CTRL, PERIPH_MCU),
196 };
197
198 /* mapping from interrupts to indexes of GPIOs in the omnia_gpios array */
199 static const u8 omnia_int_to_gpio_idx[32] = {
200 [__bf_shf(OMNIA_INT_CARD_DET)] = 4,
201 [__bf_shf(OMNIA_INT_MSATA_IND)] = 5,
202 [__bf_shf(OMNIA_INT_USB30_OVC)] = 6,
203 [__bf_shf(OMNIA_INT_USB31_OVC)] = 7,
204 [__bf_shf(OMNIA_INT_BUTTON_PRESSED)] = 12,
205 [__bf_shf(OMNIA_INT_TRNG)] = 13,
206 [__bf_shf(OMNIA_INT_MESSAGE_SIGNED)] = 14,
207 [__bf_shf(OMNIA_INT_SFP_nDET)] = 16,
208 [__bf_shf(OMNIA_INT_BRIGHTNESS_CHANGED)] = 11,
209 [__bf_shf(OMNIA_INT_WLAN0_MSATA_LED)] = 28,
210 [__bf_shf(OMNIA_INT_WLAN1_LED)] = 29,
211 [__bf_shf(OMNIA_INT_WLAN2_LED)] = 30,
212 [__bf_shf(OMNIA_INT_WPAN0_LED)] = 31,
213 [__bf_shf(OMNIA_INT_WPAN1_LED)] = 32,
214 [__bf_shf(OMNIA_INT_WPAN2_LED)] = 33,
215 [__bf_shf(OMNIA_INT_WAN_LED0)] = 34,
216 [__bf_shf(OMNIA_INT_WAN_LED1)] = 35,
217 [__bf_shf(OMNIA_INT_LAN0_LED0)] = 36,
218 [__bf_shf(OMNIA_INT_LAN0_LED1)] = 37,
219 [__bf_shf(OMNIA_INT_LAN1_LED0)] = 38,
220 [__bf_shf(OMNIA_INT_LAN1_LED1)] = 39,
221 [__bf_shf(OMNIA_INT_LAN2_LED0)] = 40,
222 [__bf_shf(OMNIA_INT_LAN2_LED1)] = 41,
223 [__bf_shf(OMNIA_INT_LAN3_LED0)] = 42,
224 [__bf_shf(OMNIA_INT_LAN3_LED1)] = 43,
225 [__bf_shf(OMNIA_INT_LAN4_LED0)] = 44,
226 [__bf_shf(OMNIA_INT_LAN4_LED1)] = 45,
227 [__bf_shf(OMNIA_INT_LAN5_LED0)] = 46,
228 [__bf_shf(OMNIA_INT_LAN5_LED1)] = 47,
229 };
230
231 /* index of PHY_SFP GPIO in the omnia_gpios array */
232 #define OMNIA_GPIO_PHY_SFP_OFFSET 54
233
omnia_ctl_cmd_locked(struct omnia_mcu * mcu,u8 cmd,u16 val,u16 mask)234 static int omnia_ctl_cmd_locked(struct omnia_mcu *mcu, u8 cmd, u16 val, u16 mask)
235 {
236 unsigned int len;
237 u8 buf[5];
238
239 buf[0] = cmd;
240
241 switch (cmd) {
242 case OMNIA_CMD_GENERAL_CONTROL:
243 buf[1] = val;
244 buf[2] = mask;
245 len = 3;
246 break;
247
248 case OMNIA_CMD_EXT_CONTROL:
249 put_unaligned_le16(val, &buf[1]);
250 put_unaligned_le16(mask, &buf[3]);
251 len = 5;
252 break;
253
254 default:
255 BUG();
256 }
257
258 return omnia_cmd_write(mcu->client, buf, len);
259 }
260
omnia_ctl_cmd(struct omnia_mcu * mcu,u8 cmd,u16 val,u16 mask)261 static int omnia_ctl_cmd(struct omnia_mcu *mcu, u8 cmd, u16 val, u16 mask)
262 {
263 guard(mutex)(&mcu->lock);
264
265 return omnia_ctl_cmd_locked(mcu, cmd, val, mask);
266 }
267
omnia_gpio_request(struct gpio_chip * gc,unsigned int offset)268 static int omnia_gpio_request(struct gpio_chip *gc, unsigned int offset)
269 {
270 if (!omnia_gpios[offset].cmd)
271 return -EINVAL;
272
273 return 0;
274 }
275
omnia_gpio_get_direction(struct gpio_chip * gc,unsigned int offset)276 static int omnia_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
277 {
278 struct omnia_mcu *mcu = gpiochip_get_data(gc);
279
280 if (offset == OMNIA_GPIO_PHY_SFP_OFFSET) {
281 int val;
282
283 scoped_guard(mutex, &mcu->lock) {
284 val = omnia_cmd_read_bit(mcu->client,
285 OMNIA_CMD_GET_EXT_CONTROL_STATUS,
286 OMNIA_EXT_CTL_PHY_SFP_AUTO);
287 if (val < 0)
288 return val;
289 }
290
291 if (val)
292 return GPIO_LINE_DIRECTION_IN;
293
294 return GPIO_LINE_DIRECTION_OUT;
295 }
296
297 if (omnia_gpios[offset].ctl_cmd)
298 return GPIO_LINE_DIRECTION_OUT;
299
300 return GPIO_LINE_DIRECTION_IN;
301 }
302
omnia_gpio_direction_input(struct gpio_chip * gc,unsigned int offset)303 static int omnia_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
304 {
305 const struct omnia_gpio *gpio = &omnia_gpios[offset];
306 struct omnia_mcu *mcu = gpiochip_get_data(gc);
307
308 if (offset == OMNIA_GPIO_PHY_SFP_OFFSET)
309 return omnia_ctl_cmd(mcu, OMNIA_CMD_EXT_CONTROL,
310 OMNIA_EXT_CTL_PHY_SFP_AUTO,
311 OMNIA_EXT_CTL_PHY_SFP_AUTO);
312
313 if (gpio->ctl_cmd)
314 return -ENOTSUPP;
315
316 return 0;
317 }
318
omnia_gpio_direction_output(struct gpio_chip * gc,unsigned int offset,int value)319 static int omnia_gpio_direction_output(struct gpio_chip *gc,
320 unsigned int offset, int value)
321 {
322 const struct omnia_gpio *gpio = &omnia_gpios[offset];
323 struct omnia_mcu *mcu = gpiochip_get_data(gc);
324 u16 val, mask;
325
326 if (!gpio->ctl_cmd)
327 return -ENOTSUPP;
328
329 mask = BIT(gpio->ctl_bit);
330 val = value ? mask : 0;
331
332 if (offset == OMNIA_GPIO_PHY_SFP_OFFSET)
333 mask |= OMNIA_EXT_CTL_PHY_SFP_AUTO;
334
335 return omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask);
336 }
337
omnia_gpio_get(struct gpio_chip * gc,unsigned int offset)338 static int omnia_gpio_get(struct gpio_chip *gc, unsigned int offset)
339 {
340 const struct omnia_gpio *gpio = &omnia_gpios[offset];
341 struct omnia_mcu *mcu = gpiochip_get_data(gc);
342
343 /*
344 * If firmware does not support the new interrupt API, we are informed
345 * of every change of the status word by an interrupt from MCU and save
346 * its value in the interrupt service routine. Simply return the saved
347 * value.
348 */
349 if (gpio->cmd == OMNIA_CMD_GET_STATUS_WORD &&
350 !(mcu->features & OMNIA_FEAT_NEW_INT_API))
351 return test_bit(gpio->bit, &mcu->last_status);
352
353 guard(mutex)(&mcu->lock);
354
355 /*
356 * If firmware does support the new interrupt API, we may have cached
357 * the value of a GPIO in the interrupt service routine. If not, read
358 * the relevant bit now.
359 */
360 if (is_int_bit_valid(gpio) && test_bit(gpio->int_bit, &mcu->is_cached))
361 return test_bit(gpio->int_bit, &mcu->cached);
362
363 return omnia_cmd_read_bit(mcu->client, gpio->cmd, BIT(gpio->bit));
364 }
365
366 static unsigned long *
_relevant_field_for_sts_cmd(u8 cmd,unsigned long * sts,unsigned long * ext_sts,unsigned long * ext_ctl)367 _relevant_field_for_sts_cmd(u8 cmd, unsigned long *sts, unsigned long *ext_sts,
368 unsigned long *ext_ctl)
369 {
370 switch (cmd) {
371 case OMNIA_CMD_GET_STATUS_WORD:
372 return sts;
373 case OMNIA_CMD_GET_EXT_STATUS_DWORD:
374 return ext_sts;
375 case OMNIA_CMD_GET_EXT_CONTROL_STATUS:
376 return ext_ctl;
377 default:
378 return NULL;
379 }
380 }
381
omnia_gpio_get_multiple(struct gpio_chip * gc,unsigned long * mask,unsigned long * bits)382 static int omnia_gpio_get_multiple(struct gpio_chip *gc, unsigned long *mask,
383 unsigned long *bits)
384 {
385 unsigned long sts = 0, ext_sts = 0, ext_ctl = 0, *field;
386 struct omnia_mcu *mcu = gpiochip_get_data(gc);
387 struct i2c_client *client = mcu->client;
388 unsigned int i;
389 int err;
390
391 /* determine which bits to read from the 3 possible commands */
392 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {
393 field = _relevant_field_for_sts_cmd(omnia_gpios[i].cmd,
394 &sts, &ext_sts, &ext_ctl);
395 if (!field)
396 continue;
397
398 __set_bit(omnia_gpios[i].bit, field);
399 }
400
401 guard(mutex)(&mcu->lock);
402
403 if (mcu->features & OMNIA_FEAT_NEW_INT_API) {
404 /* read relevant bits from status */
405 err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_STATUS_WORD,
406 sts, &sts);
407 if (err)
408 return err;
409 } else {
410 /*
411 * Use status word value cached in the interrupt service routine
412 * if firmware does not support the new interrupt API.
413 */
414 sts = mcu->last_status;
415 }
416
417 /* read relevant bits from extended status */
418 err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_EXT_STATUS_DWORD,
419 ext_sts, &ext_sts);
420 if (err)
421 return err;
422
423 /* read relevant bits from extended control */
424 err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_EXT_CONTROL_STATUS,
425 ext_ctl, &ext_ctl);
426 if (err)
427 return err;
428
429 /* assign relevant bits in result */
430 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {
431 field = _relevant_field_for_sts_cmd(omnia_gpios[i].cmd,
432 &sts, &ext_sts, &ext_ctl);
433 if (!field)
434 continue;
435
436 __assign_bit(i, bits, test_bit(omnia_gpios[i].bit, field));
437 }
438
439 return 0;
440 }
441
omnia_gpio_set(struct gpio_chip * gc,unsigned int offset,int value)442 static void omnia_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
443 {
444 const struct omnia_gpio *gpio = &omnia_gpios[offset];
445 struct omnia_mcu *mcu = gpiochip_get_data(gc);
446 u16 val, mask;
447
448 if (!gpio->ctl_cmd)
449 return;
450
451 mask = BIT(gpio->ctl_bit);
452 val = value ? mask : 0;
453
454 omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask);
455 }
456
omnia_gpio_set_multiple(struct gpio_chip * gc,unsigned long * mask,unsigned long * bits)457 static void omnia_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
458 unsigned long *bits)
459 {
460 unsigned long ctl = 0, ctl_mask = 0, ext_ctl = 0, ext_ctl_mask = 0;
461 struct omnia_mcu *mcu = gpiochip_get_data(gc);
462 unsigned int i;
463
464 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {
465 unsigned long *field, *field_mask;
466 u8 bit = omnia_gpios[i].ctl_bit;
467
468 switch (omnia_gpios[i].ctl_cmd) {
469 case OMNIA_CMD_GENERAL_CONTROL:
470 field = &ctl;
471 field_mask = &ctl_mask;
472 break;
473 case OMNIA_CMD_EXT_CONTROL:
474 field = &ext_ctl;
475 field_mask = &ext_ctl_mask;
476 break;
477 default:
478 field = field_mask = NULL;
479 break;
480 }
481
482 if (!field)
483 continue;
484
485 __set_bit(bit, field_mask);
486 __assign_bit(bit, field, test_bit(i, bits));
487 }
488
489 guard(mutex)(&mcu->lock);
490
491 if (ctl_mask)
492 omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL,
493 ctl, ctl_mask);
494
495 if (ext_ctl_mask)
496 omnia_ctl_cmd_locked(mcu, OMNIA_CMD_EXT_CONTROL,
497 ext_ctl, ext_ctl_mask);
498 }
499
omnia_gpio_available(struct omnia_mcu * mcu,const struct omnia_gpio * gpio)500 static bool omnia_gpio_available(struct omnia_mcu *mcu,
501 const struct omnia_gpio *gpio)
502 {
503 if (gpio->feat_mask)
504 return (mcu->features & gpio->feat_mask) == gpio->feat;
505
506 if (gpio->feat)
507 return mcu->features & gpio->feat;
508
509 return true;
510 }
511
omnia_gpio_init_valid_mask(struct gpio_chip * gc,unsigned long * valid_mask,unsigned int ngpios)512 static int omnia_gpio_init_valid_mask(struct gpio_chip *gc,
513 unsigned long *valid_mask,
514 unsigned int ngpios)
515 {
516 struct omnia_mcu *mcu = gpiochip_get_data(gc);
517
518 for (unsigned int i = 0; i < ngpios; i++) {
519 const struct omnia_gpio *gpio = &omnia_gpios[i];
520
521 if (gpio->cmd || is_int_bit_valid(gpio))
522 __assign_bit(i, valid_mask,
523 omnia_gpio_available(mcu, gpio));
524 else
525 __clear_bit(i, valid_mask);
526 }
527
528 return 0;
529 }
530
omnia_gpio_of_xlate(struct gpio_chip * gc,const struct of_phandle_args * gpiospec,u32 * flags)531 static int omnia_gpio_of_xlate(struct gpio_chip *gc,
532 const struct of_phandle_args *gpiospec,
533 u32 *flags)
534 {
535 u32 bank, gpio;
536
537 if (WARN_ON(gpiospec->args_count != 3))
538 return -EINVAL;
539
540 if (flags)
541 *flags = gpiospec->args[2];
542
543 bank = gpiospec->args[0];
544 gpio = gpiospec->args[1];
545
546 switch (bank) {
547 case 0:
548 return gpio < 16 ? gpio : -EINVAL;
549 case 1:
550 return gpio < 32 ? 16 + gpio : -EINVAL;
551 case 2:
552 return gpio < 16 ? 48 + gpio : -EINVAL;
553 default:
554 return -EINVAL;
555 }
556 }
557
omnia_irq_shutdown(struct irq_data * d)558 static void omnia_irq_shutdown(struct irq_data *d)
559 {
560 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
561 struct omnia_mcu *mcu = gpiochip_get_data(gc);
562 irq_hw_number_t hwirq = irqd_to_hwirq(d);
563 u8 bit = omnia_gpios[hwirq].int_bit;
564
565 __clear_bit(bit, &mcu->rising);
566 __clear_bit(bit, &mcu->falling);
567 }
568
omnia_irq_mask(struct irq_data * d)569 static void omnia_irq_mask(struct irq_data *d)
570 {
571 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
572 struct omnia_mcu *mcu = gpiochip_get_data(gc);
573 irq_hw_number_t hwirq = irqd_to_hwirq(d);
574 u8 bit = omnia_gpios[hwirq].int_bit;
575
576 if (!omnia_gpios[hwirq].cmd)
577 __clear_bit(bit, &mcu->rising);
578 __clear_bit(bit, &mcu->mask);
579 gpiochip_disable_irq(gc, hwirq);
580 }
581
omnia_irq_unmask(struct irq_data * d)582 static void omnia_irq_unmask(struct irq_data *d)
583 {
584 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
585 struct omnia_mcu *mcu = gpiochip_get_data(gc);
586 irq_hw_number_t hwirq = irqd_to_hwirq(d);
587 u8 bit = omnia_gpios[hwirq].int_bit;
588
589 gpiochip_enable_irq(gc, hwirq);
590 __set_bit(bit, &mcu->mask);
591 if (!omnia_gpios[hwirq].cmd)
592 __set_bit(bit, &mcu->rising);
593 }
594
omnia_irq_set_type(struct irq_data * d,unsigned int type)595 static int omnia_irq_set_type(struct irq_data *d, unsigned int type)
596 {
597 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
598 struct omnia_mcu *mcu = gpiochip_get_data(gc);
599 irq_hw_number_t hwirq = irqd_to_hwirq(d);
600 struct device *dev = &mcu->client->dev;
601 u8 bit = omnia_gpios[hwirq].int_bit;
602
603 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
604 dev_err(dev, "irq %u: unsupported type %u\n", d->irq, type);
605 return -EINVAL;
606 }
607
608 __assign_bit(bit, &mcu->rising, type & IRQ_TYPE_EDGE_RISING);
609 __assign_bit(bit, &mcu->falling, type & IRQ_TYPE_EDGE_FALLING);
610
611 return 0;
612 }
613
omnia_irq_bus_lock(struct irq_data * d)614 static void omnia_irq_bus_lock(struct irq_data *d)
615 {
616 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
617 struct omnia_mcu *mcu = gpiochip_get_data(gc);
618
619 /* nothing to do if MCU firmware does not support new interrupt API */
620 if (!(mcu->features & OMNIA_FEAT_NEW_INT_API))
621 return;
622
623 mutex_lock(&mcu->lock);
624 }
625
626 /**
627 * omnia_mask_interleave - Interleaves the bytes from @rising and @falling
628 * @dst: the destination u8 array of interleaved bytes
629 * @rising: rising mask
630 * @falling: falling mask
631 *
632 * Interleaves the little-endian bytes from @rising and @falling words.
633 *
634 * If @rising = (r0, r1, r2, r3) and @falling = (f0, f1, f2, f3), the result is
635 * @dst = (r0, f0, r1, f1, r2, f2, r3, f3).
636 *
637 * The MCU receives an interrupt mask and reports a pending interrupt bitmap in
638 * this interleaved format. The rationale behind this is that the low-indexed
639 * bits are more important - in many cases, the user will be interested only in
640 * interrupts with indexes 0 to 7, and so the system can stop reading after
641 * first 2 bytes (r0, f0), to save time on the slow I2C bus.
642 *
643 * Feel free to remove this function and its inverse, omnia_mask_deinterleave,
644 * and use an appropriate bitmap_*() function once such a function exists.
645 */
646 static void
omnia_mask_interleave(u8 * dst,unsigned long rising,unsigned long falling)647 omnia_mask_interleave(u8 *dst, unsigned long rising, unsigned long falling)
648 {
649 for (unsigned int i = 0; i < sizeof(u32); i++) {
650 dst[2 * i] = rising >> (8 * i);
651 dst[2 * i + 1] = falling >> (8 * i);
652 }
653 }
654
655 /**
656 * omnia_mask_deinterleave - Deinterleaves the bytes into @rising and @falling
657 * @src: the source u8 array containing the interleaved bytes
658 * @rising: pointer where to store the rising mask gathered from @src
659 * @falling: pointer where to store the falling mask gathered from @src
660 *
661 * This is the inverse function to omnia_mask_interleave.
662 */
omnia_mask_deinterleave(const u8 * src,unsigned long * rising,unsigned long * falling)663 static void omnia_mask_deinterleave(const u8 *src, unsigned long *rising,
664 unsigned long *falling)
665 {
666 *rising = *falling = 0;
667
668 for (unsigned int i = 0; i < sizeof(u32); i++) {
669 *rising |= src[2 * i] << (8 * i);
670 *falling |= src[2 * i + 1] << (8 * i);
671 }
672 }
673
omnia_irq_bus_sync_unlock(struct irq_data * d)674 static void omnia_irq_bus_sync_unlock(struct irq_data *d)
675 {
676 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
677 struct omnia_mcu *mcu = gpiochip_get_data(gc);
678 struct device *dev = &mcu->client->dev;
679 u8 cmd[1 + OMNIA_CMD_INT_ARG_LEN];
680 unsigned long rising, falling;
681 int err;
682
683 /* nothing to do if MCU firmware does not support new interrupt API */
684 if (!(mcu->features & OMNIA_FEAT_NEW_INT_API))
685 return;
686
687 cmd[0] = OMNIA_CMD_SET_INT_MASK;
688
689 rising = mcu->rising & mcu->mask;
690 falling = mcu->falling & mcu->mask;
691
692 /* interleave the rising and falling bytes into the command arguments */
693 omnia_mask_interleave(&cmd[1], rising, falling);
694
695 dev_dbg(dev, "set int mask %8ph\n", &cmd[1]);
696
697 err = omnia_cmd_write(mcu->client, cmd, sizeof(cmd));
698 if (err) {
699 dev_err(dev, "Cannot set mask: %d\n", err);
700 goto unlock;
701 }
702
703 /*
704 * Remember which GPIOs have both rising and falling interrupts enabled.
705 * For those we will cache their value so that .get() method is faster.
706 * We also need to forget cached values of GPIOs that aren't cached
707 * anymore.
708 */
709 mcu->both = rising & falling;
710 mcu->is_cached &= mcu->both;
711
712 unlock:
713 mutex_unlock(&mcu->lock);
714 }
715
716 static const struct irq_chip omnia_mcu_irq_chip = {
717 .name = "Turris Omnia MCU interrupts",
718 .irq_shutdown = omnia_irq_shutdown,
719 .irq_mask = omnia_irq_mask,
720 .irq_unmask = omnia_irq_unmask,
721 .irq_set_type = omnia_irq_set_type,
722 .irq_bus_lock = omnia_irq_bus_lock,
723 .irq_bus_sync_unlock = omnia_irq_bus_sync_unlock,
724 .flags = IRQCHIP_IMMUTABLE,
725 GPIOCHIP_IRQ_RESOURCE_HELPERS,
726 };
727
omnia_irq_init_valid_mask(struct gpio_chip * gc,unsigned long * valid_mask,unsigned int ngpios)728 static void omnia_irq_init_valid_mask(struct gpio_chip *gc,
729 unsigned long *valid_mask,
730 unsigned int ngpios)
731 {
732 struct omnia_mcu *mcu = gpiochip_get_data(gc);
733
734 for (unsigned int i = 0; i < ngpios; i++) {
735 const struct omnia_gpio *gpio = &omnia_gpios[i];
736
737 if (is_int_bit_valid(gpio))
738 __assign_bit(i, valid_mask,
739 omnia_gpio_available(mcu, gpio));
740 else
741 __clear_bit(i, valid_mask);
742 }
743 }
744
omnia_irq_init_hw(struct gpio_chip * gc)745 static int omnia_irq_init_hw(struct gpio_chip *gc)
746 {
747 struct omnia_mcu *mcu = gpiochip_get_data(gc);
748 u8 cmd[1 + OMNIA_CMD_INT_ARG_LEN] = {};
749
750 cmd[0] = OMNIA_CMD_SET_INT_MASK;
751
752 return omnia_cmd_write(mcu->client, cmd, sizeof(cmd));
753 }
754
755 /*
756 * Determine how many bytes we need to read from the reply to the
757 * OMNIA_CMD_GET_INT_AND_CLEAR command in order to retrieve all unmasked
758 * interrupts.
759 */
760 static unsigned int
omnia_irq_compute_pending_length(unsigned long rising,unsigned long falling)761 omnia_irq_compute_pending_length(unsigned long rising, unsigned long falling)
762 {
763 return max(omnia_compute_reply_length(rising, true, 0),
764 omnia_compute_reply_length(falling, true, 1));
765 }
766
omnia_irq_read_pending_new(struct omnia_mcu * mcu,unsigned long * pending)767 static bool omnia_irq_read_pending_new(struct omnia_mcu *mcu,
768 unsigned long *pending)
769 {
770 struct device *dev = &mcu->client->dev;
771 u8 reply[OMNIA_CMD_INT_ARG_LEN] = {};
772 unsigned long rising, falling;
773 unsigned int len;
774 int err;
775
776 len = omnia_irq_compute_pending_length(mcu->rising & mcu->mask,
777 mcu->falling & mcu->mask);
778 if (!len)
779 return false;
780
781 guard(mutex)(&mcu->lock);
782
783 err = omnia_cmd_read(mcu->client, OMNIA_CMD_GET_INT_AND_CLEAR, reply,
784 len);
785 if (err) {
786 dev_err(dev, "Cannot read pending IRQs: %d\n", err);
787 return false;
788 }
789
790 /* deinterleave the reply bytes into rising and falling */
791 omnia_mask_deinterleave(reply, &rising, &falling);
792
793 rising &= mcu->mask;
794 falling &= mcu->mask;
795 *pending = rising | falling;
796
797 /* cache values for GPIOs that have both edges enabled */
798 mcu->is_cached &= ~(rising & falling);
799 mcu->is_cached |= mcu->both & (rising ^ falling);
800 mcu->cached = (mcu->cached | rising) & ~falling;
801
802 return true;
803 }
804
omnia_read_status_word_old_fw(struct omnia_mcu * mcu,unsigned long * status)805 static int omnia_read_status_word_old_fw(struct omnia_mcu *mcu,
806 unsigned long *status)
807 {
808 u16 raw_status;
809 int err;
810
811 err = omnia_cmd_read_u16(mcu->client, OMNIA_CMD_GET_STATUS_WORD,
812 &raw_status);
813 if (err)
814 return err;
815
816 /*
817 * Old firmware has a bug wherein it never resets the USB port
818 * overcurrent bits back to zero. Ignore them.
819 */
820 *status = raw_status & ~(OMNIA_STS_USB30_OVC | OMNIA_STS_USB31_OVC);
821
822 return 0;
823 }
824
button_release_emul_fn(struct work_struct * work)825 static void button_release_emul_fn(struct work_struct *work)
826 {
827 struct omnia_mcu *mcu = container_of(to_delayed_work(work),
828 struct omnia_mcu,
829 button_release_emul_work);
830
831 mcu->button_pressed_emul = false;
832 generic_handle_irq_safe(mcu->client->irq);
833 }
834
835 static void
fill_int_from_sts(unsigned long * rising,unsigned long * falling,unsigned long rising_sts,unsigned long falling_sts,unsigned long sts_bit,unsigned long int_bit)836 fill_int_from_sts(unsigned long *rising, unsigned long *falling,
837 unsigned long rising_sts, unsigned long falling_sts,
838 unsigned long sts_bit, unsigned long int_bit)
839 {
840 if (rising_sts & sts_bit)
841 *rising |= int_bit;
842 if (falling_sts & sts_bit)
843 *falling |= int_bit;
844 }
845
omnia_irq_read_pending_old(struct omnia_mcu * mcu,unsigned long * pending)846 static bool omnia_irq_read_pending_old(struct omnia_mcu *mcu,
847 unsigned long *pending)
848 {
849 unsigned long status, rising_sts, falling_sts, rising, falling;
850 struct device *dev = &mcu->client->dev;
851 int err;
852
853 guard(mutex)(&mcu->lock);
854
855 err = omnia_read_status_word_old_fw(mcu, &status);
856 if (err) {
857 dev_err(dev, "Cannot read pending IRQs: %d\n", err);
858 return false;
859 }
860
861 /*
862 * The old firmware triggers an interrupt whenever status word changes,
863 * but does not inform about which bits rose or fell. We need to compute
864 * this here by comparing with the last status word value.
865 *
866 * The OMNIA_STS_BUTTON_PRESSED bit needs special handling, because the
867 * old firmware clears the OMNIA_STS_BUTTON_PRESSED bit on successful
868 * completion of the OMNIA_CMD_GET_STATUS_WORD command, resulting in
869 * another interrupt:
870 * - first we get an interrupt, we read the status word where
871 * OMNIA_STS_BUTTON_PRESSED is present,
872 * - MCU clears the OMNIA_STS_BUTTON_PRESSED bit because we read the
873 * status word,
874 * - we get another interrupt because the status word changed again
875 * (the OMNIA_STS_BUTTON_PRESSED bit was cleared).
876 *
877 * The gpiolib-cdev, gpiolib-sysfs and gpio-keys input driver all call
878 * the gpiochip's .get() method after an edge event on a requested GPIO
879 * occurs.
880 *
881 * We ensure that the .get() method reads 1 for the button GPIO for some
882 * time.
883 */
884
885 if (status & OMNIA_STS_BUTTON_PRESSED) {
886 mcu->button_pressed_emul = true;
887 mod_delayed_work(system_wq, &mcu->button_release_emul_work,
888 msecs_to_jiffies(FRONT_BUTTON_RELEASE_DELAY_MS));
889 } else if (mcu->button_pressed_emul) {
890 status |= OMNIA_STS_BUTTON_PRESSED;
891 }
892
893 rising_sts = ~mcu->last_status & status;
894 falling_sts = mcu->last_status & ~status;
895
896 mcu->last_status = status;
897
898 /*
899 * Fill in the relevant interrupt bits from status bits for CARD_DET,
900 * MSATA_IND and BUTTON_PRESSED.
901 */
902 rising = 0;
903 falling = 0;
904 fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,
905 OMNIA_STS_CARD_DET, OMNIA_INT_CARD_DET);
906 fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,
907 OMNIA_STS_MSATA_IND, OMNIA_INT_MSATA_IND);
908 fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,
909 OMNIA_STS_BUTTON_PRESSED, OMNIA_INT_BUTTON_PRESSED);
910
911 /* Use only bits that are enabled */
912 rising &= mcu->rising & mcu->mask;
913 falling &= mcu->falling & mcu->mask;
914 *pending = rising | falling;
915
916 return true;
917 }
918
omnia_irq_read_pending(struct omnia_mcu * mcu,unsigned long * pending)919 static bool omnia_irq_read_pending(struct omnia_mcu *mcu,
920 unsigned long *pending)
921 {
922 if (mcu->features & OMNIA_FEAT_NEW_INT_API)
923 return omnia_irq_read_pending_new(mcu, pending);
924 else
925 return omnia_irq_read_pending_old(mcu, pending);
926 }
927
omnia_irq_thread_handler(int irq,void * dev_id)928 static irqreturn_t omnia_irq_thread_handler(int irq, void *dev_id)
929 {
930 struct omnia_mcu *mcu = dev_id;
931 struct irq_domain *domain;
932 unsigned long pending;
933 unsigned int i;
934
935 if (!omnia_irq_read_pending(mcu, &pending))
936 return IRQ_NONE;
937
938 domain = mcu->gc.irq.domain;
939
940 for_each_set_bit(i, &pending, 32) {
941 unsigned int nested_irq;
942
943 nested_irq = irq_find_mapping(domain, omnia_int_to_gpio_idx[i]);
944
945 handle_nested_irq(nested_irq);
946 }
947
948 return IRQ_RETVAL(pending);
949 }
950
951 static const char * const front_button_modes[] = { "mcu", "cpu" };
952
front_button_mode_show(struct device * dev,struct device_attribute * a,char * buf)953 static ssize_t front_button_mode_show(struct device *dev,
954 struct device_attribute *a, char *buf)
955 {
956 struct omnia_mcu *mcu = dev_get_drvdata(dev);
957 int val;
958
959 if (mcu->features & OMNIA_FEAT_NEW_INT_API) {
960 val = omnia_cmd_read_bit(mcu->client, OMNIA_CMD_GET_STATUS_WORD,
961 OMNIA_STS_BUTTON_MODE);
962 if (val < 0)
963 return val;
964 } else {
965 val = !!(mcu->last_status & OMNIA_STS_BUTTON_MODE);
966 }
967
968 return sysfs_emit(buf, "%s\n", front_button_modes[val]);
969 }
970
front_button_mode_store(struct device * dev,struct device_attribute * a,const char * buf,size_t count)971 static ssize_t front_button_mode_store(struct device *dev,
972 struct device_attribute *a,
973 const char *buf, size_t count)
974 {
975 struct omnia_mcu *mcu = dev_get_drvdata(dev);
976 int err, i;
977
978 i = sysfs_match_string(front_button_modes, buf);
979 if (i < 0)
980 return i;
981
982 err = omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL,
983 i ? OMNIA_CTL_BUTTON_MODE : 0,
984 OMNIA_CTL_BUTTON_MODE);
985 if (err)
986 return err;
987
988 return count;
989 }
990 static DEVICE_ATTR_RW(front_button_mode);
991
992 static struct attribute *omnia_mcu_gpio_attrs[] = {
993 &dev_attr_front_button_mode.attr,
994 NULL
995 };
996
997 const struct attribute_group omnia_mcu_gpio_group = {
998 .attrs = omnia_mcu_gpio_attrs,
999 };
1000
omnia_mcu_register_gpiochip(struct omnia_mcu * mcu)1001 int omnia_mcu_register_gpiochip(struct omnia_mcu *mcu)
1002 {
1003 bool new_api = mcu->features & OMNIA_FEAT_NEW_INT_API;
1004 struct device *dev = &mcu->client->dev;
1005 unsigned long irqflags;
1006 int err;
1007
1008 err = devm_mutex_init(dev, &mcu->lock);
1009 if (err)
1010 return err;
1011
1012 mcu->gc.request = omnia_gpio_request;
1013 mcu->gc.get_direction = omnia_gpio_get_direction;
1014 mcu->gc.direction_input = omnia_gpio_direction_input;
1015 mcu->gc.direction_output = omnia_gpio_direction_output;
1016 mcu->gc.get = omnia_gpio_get;
1017 mcu->gc.get_multiple = omnia_gpio_get_multiple;
1018 mcu->gc.set = omnia_gpio_set;
1019 mcu->gc.set_multiple = omnia_gpio_set_multiple;
1020 mcu->gc.init_valid_mask = omnia_gpio_init_valid_mask;
1021 mcu->gc.can_sleep = true;
1022 mcu->gc.names = omnia_mcu_gpio_names;
1023 mcu->gc.base = -1;
1024 mcu->gc.ngpio = ARRAY_SIZE(omnia_gpios);
1025 mcu->gc.label = "Turris Omnia MCU GPIOs";
1026 mcu->gc.parent = dev;
1027 mcu->gc.owner = THIS_MODULE;
1028 mcu->gc.of_gpio_n_cells = 3;
1029 mcu->gc.of_xlate = omnia_gpio_of_xlate;
1030
1031 gpio_irq_chip_set_chip(&mcu->gc.irq, &omnia_mcu_irq_chip);
1032 /* This will let us handle the parent IRQ in the driver */
1033 mcu->gc.irq.parent_handler = NULL;
1034 mcu->gc.irq.num_parents = 0;
1035 mcu->gc.irq.parents = NULL;
1036 mcu->gc.irq.default_type = IRQ_TYPE_NONE;
1037 mcu->gc.irq.handler = handle_bad_irq;
1038 mcu->gc.irq.threaded = true;
1039 if (new_api)
1040 mcu->gc.irq.init_hw = omnia_irq_init_hw;
1041 mcu->gc.irq.init_valid_mask = omnia_irq_init_valid_mask;
1042
1043 err = devm_gpiochip_add_data(dev, &mcu->gc, mcu);
1044 if (err)
1045 return dev_err_probe(dev, err, "Cannot add GPIO chip\n");
1046
1047 /*
1048 * Before requesting the interrupt, if firmware does not support the new
1049 * interrupt API, we need to cache the value of the status word, so that
1050 * when it changes, we may compare the new value with the cached one in
1051 * the interrupt handler.
1052 */
1053 if (!new_api) {
1054 err = omnia_read_status_word_old_fw(mcu, &mcu->last_status);
1055 if (err)
1056 return dev_err_probe(dev, err,
1057 "Cannot read status word\n");
1058
1059 INIT_DELAYED_WORK(&mcu->button_release_emul_work,
1060 button_release_emul_fn);
1061 }
1062
1063 irqflags = IRQF_ONESHOT;
1064 if (new_api)
1065 irqflags |= IRQF_TRIGGER_LOW;
1066 else
1067 irqflags |= IRQF_TRIGGER_FALLING;
1068
1069 err = devm_request_threaded_irq(dev, mcu->client->irq, NULL,
1070 omnia_irq_thread_handler, irqflags,
1071 "turris-omnia-mcu", mcu);
1072 if (err)
1073 return dev_err_probe(dev, err, "Cannot request IRQ\n");
1074
1075 if (!new_api) {
1076 /*
1077 * The button_release_emul_work has to be initialized before the
1078 * thread is requested, and on driver remove it needs to be
1079 * canceled before the thread is freed. Therefore we can't use
1080 * devm_delayed_work_autocancel() directly, because the order
1081 * devm_delayed_work_autocancel();
1082 * devm_request_threaded_irq();
1083 * would cause improper release order:
1084 * free_irq();
1085 * cancel_delayed_work_sync();
1086 * Instead we first initialize the work above, and only now
1087 * after IRQ is requested we add the work devm action.
1088 */
1089 err = devm_add_action(dev, devm_delayed_work_drop,
1090 &mcu->button_release_emul_work);
1091 if (err)
1092 return err;
1093 }
1094
1095 return 0;
1096 }
1097
omnia_mcu_request_irq(struct omnia_mcu * mcu,u32 spec,irq_handler_t thread_fn,const char * devname)1098 int omnia_mcu_request_irq(struct omnia_mcu *mcu, u32 spec,
1099 irq_handler_t thread_fn, const char *devname)
1100 {
1101 u8 irq_idx;
1102 int irq;
1103
1104 if (!spec)
1105 return -EINVAL;
1106
1107 irq_idx = omnia_int_to_gpio_idx[ffs(spec) - 1];
1108 irq = gpiod_to_irq(gpio_device_get_desc(mcu->gc.gpiodev, irq_idx));
1109 if (irq < 0)
1110 return irq;
1111
1112 return devm_request_threaded_irq(&mcu->client->dev, irq, NULL,
1113 thread_fn, IRQF_ONESHOT, devname, mcu);
1114 }
1115