1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Common code for the NVMe target. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/hex.h> 8 #include <linux/module.h> 9 #include <linux/random.h> 10 #include <linux/rculist.h> 11 #include <linux/pci-p2pdma.h> 12 #include <linux/scatterlist.h> 13 14 #include <generated/utsrelease.h> 15 16 #define CREATE_TRACE_POINTS 17 #include "trace.h" 18 19 #include "nvmet.h" 20 #include "debugfs.h" 21 22 struct kmem_cache *nvmet_bvec_cache; 23 struct workqueue_struct *buffered_io_wq; 24 struct workqueue_struct *zbd_wq; 25 static const struct nvmet_fabrics_ops *nvmet_transports[NVMF_TRTYPE_MAX]; 26 static DEFINE_IDA(cntlid_ida); 27 28 struct workqueue_struct *nvmet_wq; 29 EXPORT_SYMBOL_GPL(nvmet_wq); 30 struct workqueue_struct *nvmet_aen_wq; 31 EXPORT_SYMBOL_GPL(nvmet_aen_wq); 32 33 /* 34 * This read/write semaphore is used to synchronize access to configuration 35 * information on a target system that will result in discovery log page 36 * information change for at least one host. 37 * The full list of resources to protected by this semaphore is: 38 * 39 * - subsystems list 40 * - per-subsystem allowed hosts list 41 * - allow_any_host subsystem attribute 42 * - nvmet_genctr 43 * - the nvmet_transports array 44 * 45 * When updating any of those lists/structures write lock should be obtained, 46 * while when reading (populating discovery log page or checking host-subsystem 47 * link) read lock is obtained to allow concurrent reads. 48 */ 49 DECLARE_RWSEM(nvmet_config_sem); 50 51 u32 nvmet_ana_group_enabled[NVMET_MAX_ANAGRPS + 1]; 52 u64 nvmet_ana_chgcnt; 53 DECLARE_RWSEM(nvmet_ana_sem); 54 55 inline u16 errno_to_nvme_status(struct nvmet_req *req, int errno) 56 { 57 switch (errno) { 58 case 0: 59 return NVME_SC_SUCCESS; 60 case -ENOSPC: 61 req->error_loc = offsetof(struct nvme_rw_command, length); 62 return NVME_SC_CAP_EXCEEDED | NVME_STATUS_DNR; 63 case -EREMOTEIO: 64 req->error_loc = offsetof(struct nvme_rw_command, slba); 65 return NVME_SC_LBA_RANGE | NVME_STATUS_DNR; 66 case -EOPNOTSUPP: 67 req->error_loc = offsetof(struct nvme_common_command, opcode); 68 return NVME_SC_INVALID_OPCODE | NVME_STATUS_DNR; 69 case -ENODATA: 70 req->error_loc = offsetof(struct nvme_rw_command, nsid); 71 return NVME_SC_ACCESS_DENIED; 72 case -EIO: 73 fallthrough; 74 default: 75 req->error_loc = offsetof(struct nvme_common_command, opcode); 76 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 77 } 78 } 79 80 u16 nvmet_report_invalid_opcode(struct nvmet_req *req) 81 { 82 pr_debug("unhandled cmd %d on qid %d\n", req->cmd->common.opcode, 83 req->sq->qid); 84 85 req->error_loc = offsetof(struct nvme_common_command, opcode); 86 return NVME_SC_INVALID_OPCODE | NVME_STATUS_DNR; 87 } 88 89 static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port, 90 const char *subsysnqn); 91 92 u16 nvmet_copy_to_sgl(struct nvmet_req *req, off_t off, const void *buf, 93 size_t len) 94 { 95 if (sg_pcopy_from_buffer(req->sg, req->sg_cnt, buf, len, off) != len) { 96 req->error_loc = offsetof(struct nvme_common_command, dptr); 97 return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR; 98 } 99 return 0; 100 } 101 102 u16 nvmet_copy_from_sgl(struct nvmet_req *req, off_t off, void *buf, size_t len) 103 { 104 if (sg_pcopy_to_buffer(req->sg, req->sg_cnt, buf, len, off) != len) { 105 req->error_loc = offsetof(struct nvme_common_command, dptr); 106 return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR; 107 } 108 return 0; 109 } 110 111 u16 nvmet_zero_sgl(struct nvmet_req *req, off_t off, size_t len) 112 { 113 if (sg_zero_buffer(req->sg, req->sg_cnt, len, off) != len) { 114 req->error_loc = offsetof(struct nvme_common_command, dptr); 115 return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR; 116 } 117 return 0; 118 } 119 120 static u32 nvmet_max_nsid(struct nvmet_subsys *subsys) 121 { 122 struct nvmet_ns *cur; 123 unsigned long idx; 124 u32 nsid = 0; 125 126 nvmet_for_each_enabled_ns(&subsys->namespaces, idx, cur) 127 nsid = cur->nsid; 128 129 return nsid; 130 } 131 132 static u32 nvmet_async_event_result(struct nvmet_async_event *aen) 133 { 134 return aen->event_type | (aen->event_info << 8) | (aen->log_page << 16); 135 } 136 137 static void nvmet_async_events_failall(struct nvmet_ctrl *ctrl) 138 { 139 struct nvmet_req *req; 140 141 mutex_lock(&ctrl->lock); 142 while (ctrl->nr_async_event_cmds) { 143 req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds]; 144 mutex_unlock(&ctrl->lock); 145 nvmet_req_complete(req, NVME_SC_INTERNAL | NVME_STATUS_DNR); 146 mutex_lock(&ctrl->lock); 147 } 148 mutex_unlock(&ctrl->lock); 149 } 150 151 static void nvmet_async_events_process(struct nvmet_ctrl *ctrl) 152 { 153 struct nvmet_async_event *aen; 154 struct nvmet_req *req; 155 156 mutex_lock(&ctrl->lock); 157 while (ctrl->nr_async_event_cmds && !list_empty(&ctrl->async_events)) { 158 aen = list_first_entry(&ctrl->async_events, 159 struct nvmet_async_event, entry); 160 req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds]; 161 nvmet_set_result(req, nvmet_async_event_result(aen)); 162 163 list_del(&aen->entry); 164 kfree(aen); 165 166 mutex_unlock(&ctrl->lock); 167 trace_nvmet_async_event(ctrl, req->cqe->result.u32); 168 nvmet_req_complete(req, 0); 169 mutex_lock(&ctrl->lock); 170 } 171 mutex_unlock(&ctrl->lock); 172 } 173 174 static void nvmet_async_events_free(struct nvmet_ctrl *ctrl) 175 { 176 struct nvmet_async_event *aen, *tmp; 177 178 mutex_lock(&ctrl->lock); 179 list_for_each_entry_safe(aen, tmp, &ctrl->async_events, entry) { 180 list_del(&aen->entry); 181 kfree(aen); 182 } 183 mutex_unlock(&ctrl->lock); 184 } 185 186 static void nvmet_async_event_work(struct work_struct *work) 187 { 188 struct nvmet_ctrl *ctrl = 189 container_of(work, struct nvmet_ctrl, async_event_work); 190 191 nvmet_async_events_process(ctrl); 192 } 193 194 void nvmet_add_async_event(struct nvmet_ctrl *ctrl, u8 event_type, 195 u8 event_info, u8 log_page) 196 { 197 struct nvmet_async_event *aen; 198 199 aen = kmalloc_obj(*aen); 200 if (!aen) 201 return; 202 203 aen->event_type = event_type; 204 aen->event_info = event_info; 205 aen->log_page = log_page; 206 207 mutex_lock(&ctrl->lock); 208 list_add_tail(&aen->entry, &ctrl->async_events); 209 mutex_unlock(&ctrl->lock); 210 211 queue_work(nvmet_aen_wq, &ctrl->async_event_work); 212 } 213 214 static void nvmet_add_to_changed_ns_log(struct nvmet_ctrl *ctrl, __le32 nsid) 215 { 216 u32 i; 217 218 mutex_lock(&ctrl->lock); 219 if (ctrl->nr_changed_ns > NVME_MAX_CHANGED_NAMESPACES) 220 goto out_unlock; 221 222 for (i = 0; i < ctrl->nr_changed_ns; i++) { 223 if (ctrl->changed_ns_list[i] == nsid) 224 goto out_unlock; 225 } 226 227 if (ctrl->nr_changed_ns == NVME_MAX_CHANGED_NAMESPACES) { 228 ctrl->changed_ns_list[0] = cpu_to_le32(0xffffffff); 229 ctrl->nr_changed_ns = U32_MAX; 230 goto out_unlock; 231 } 232 233 ctrl->changed_ns_list[ctrl->nr_changed_ns++] = nsid; 234 out_unlock: 235 mutex_unlock(&ctrl->lock); 236 } 237 238 void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid) 239 { 240 struct nvmet_ctrl *ctrl; 241 242 lockdep_assert_held(&subsys->lock); 243 244 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 245 nvmet_add_to_changed_ns_log(ctrl, cpu_to_le32(nsid)); 246 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_NS_ATTR)) 247 continue; 248 nvmet_add_async_event(ctrl, NVME_AER_NOTICE, 249 NVME_AER_NOTICE_NS_CHANGED, 250 NVME_LOG_CHANGED_NS); 251 } 252 } 253 254 void nvmet_send_ana_event(struct nvmet_subsys *subsys, 255 struct nvmet_port *port) 256 { 257 struct nvmet_ctrl *ctrl; 258 259 mutex_lock(&subsys->lock); 260 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 261 if (port && ctrl->port != port) 262 continue; 263 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_ANA_CHANGE)) 264 continue; 265 nvmet_add_async_event(ctrl, NVME_AER_NOTICE, 266 NVME_AER_NOTICE_ANA, NVME_LOG_ANA); 267 } 268 mutex_unlock(&subsys->lock); 269 } 270 271 void nvmet_port_send_ana_event(struct nvmet_port *port) 272 { 273 struct nvmet_subsys_link *p; 274 275 down_read(&nvmet_config_sem); 276 list_for_each_entry(p, &port->subsystems, entry) 277 nvmet_send_ana_event(p->subsys, port); 278 up_read(&nvmet_config_sem); 279 } 280 281 int nvmet_register_transport(const struct nvmet_fabrics_ops *ops) 282 { 283 int ret = 0; 284 285 down_write(&nvmet_config_sem); 286 if (nvmet_transports[ops->type]) 287 ret = -EINVAL; 288 else 289 nvmet_transports[ops->type] = ops; 290 up_write(&nvmet_config_sem); 291 292 return ret; 293 } 294 EXPORT_SYMBOL_GPL(nvmet_register_transport); 295 296 void nvmet_unregister_transport(const struct nvmet_fabrics_ops *ops) 297 { 298 down_write(&nvmet_config_sem); 299 nvmet_transports[ops->type] = NULL; 300 up_write(&nvmet_config_sem); 301 } 302 EXPORT_SYMBOL_GPL(nvmet_unregister_transport); 303 304 void nvmet_port_del_ctrls(struct nvmet_port *port, struct nvmet_subsys *subsys) 305 { 306 struct nvmet_ctrl *ctrl; 307 308 mutex_lock(&subsys->lock); 309 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 310 if (ctrl->port == port) 311 ctrl->ops->delete_ctrl(ctrl); 312 } 313 mutex_unlock(&subsys->lock); 314 } 315 316 int nvmet_enable_port(struct nvmet_port *port) 317 { 318 const struct nvmet_fabrics_ops *ops; 319 int ret; 320 321 lockdep_assert_held(&nvmet_config_sem); 322 323 if (port->disc_addr.trtype == NVMF_TRTYPE_MAX) 324 return -EINVAL; 325 326 ops = nvmet_transports[port->disc_addr.trtype]; 327 if (!ops) { 328 up_write(&nvmet_config_sem); 329 request_module("nvmet-transport-%d", port->disc_addr.trtype); 330 down_write(&nvmet_config_sem); 331 ops = nvmet_transports[port->disc_addr.trtype]; 332 if (!ops) { 333 pr_err("transport type %d not supported\n", 334 port->disc_addr.trtype); 335 return -EINVAL; 336 } 337 } 338 339 if (!try_module_get(ops->owner)) 340 return -EINVAL; 341 342 /* 343 * If the user requested PI support and the transport isn't pi capable, 344 * don't enable the port. 345 */ 346 if (port->pi_enable && !(ops->flags & NVMF_METADATA_SUPPORTED)) { 347 pr_err("T10-PI is not supported by transport type %d\n", 348 port->disc_addr.trtype); 349 ret = -EINVAL; 350 goto out_put; 351 } 352 353 ret = ops->add_port(port); 354 if (ret) 355 goto out_put; 356 357 /* If the transport didn't set inline_data_size, then disable it. */ 358 if (port->inline_data_size < 0) 359 port->inline_data_size = 0; 360 361 /* 362 * If the transport didn't set the max_queue_size properly, then clamp 363 * it to the target limits. Also set default values in case the 364 * transport didn't set it at all. 365 */ 366 if (port->max_queue_size < 0) 367 port->max_queue_size = NVMET_MAX_QUEUE_SIZE; 368 else 369 port->max_queue_size = clamp_t(int, port->max_queue_size, 370 NVMET_MIN_QUEUE_SIZE, 371 NVMET_MAX_QUEUE_SIZE); 372 373 /* 374 * If the transport didn't set the mdts properly, then clamp it to the 375 * target limits. Also set default values in case the transport didn't 376 * set it at all. 377 */ 378 if (port->mdts < 0 || port->mdts > NVMET_MAX_MDTS) 379 port->mdts = 0; 380 381 port->enabled = true; 382 port->tr_ops = ops; 383 return 0; 384 385 out_put: 386 module_put(ops->owner); 387 return ret; 388 } 389 390 void nvmet_disable_port(struct nvmet_port *port) 391 { 392 const struct nvmet_fabrics_ops *ops; 393 394 lockdep_assert_held(&nvmet_config_sem); 395 396 port->enabled = false; 397 port->tr_ops = NULL; 398 399 ops = nvmet_transports[port->disc_addr.trtype]; 400 ops->remove_port(port); 401 module_put(ops->owner); 402 } 403 404 static void nvmet_keep_alive_timer(struct work_struct *work) 405 { 406 struct nvmet_ctrl *ctrl = container_of(to_delayed_work(work), 407 struct nvmet_ctrl, ka_work); 408 bool reset_tbkas = ctrl->reset_tbkas; 409 410 ctrl->reset_tbkas = false; 411 if (reset_tbkas) { 412 pr_debug("ctrl %d reschedule traffic based keep-alive timer\n", 413 ctrl->cntlid); 414 queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ); 415 return; 416 } 417 418 pr_err("ctrl %d keep-alive timer (%d seconds) expired!\n", 419 ctrl->cntlid, ctrl->kato); 420 421 nvmet_ctrl_fatal_error(ctrl); 422 } 423 424 void nvmet_start_keep_alive_timer(struct nvmet_ctrl *ctrl) 425 { 426 if (unlikely(ctrl->kato == 0)) 427 return; 428 429 pr_debug("ctrl %d start keep-alive timer for %d secs\n", 430 ctrl->cntlid, ctrl->kato); 431 432 queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ); 433 } 434 435 void nvmet_stop_keep_alive_timer(struct nvmet_ctrl *ctrl) 436 { 437 if (unlikely(ctrl->kato == 0)) 438 return; 439 440 pr_debug("ctrl %d stop keep-alive\n", ctrl->cntlid); 441 442 cancel_delayed_work_sync(&ctrl->ka_work); 443 } 444 445 u16 nvmet_req_find_ns(struct nvmet_req *req) 446 { 447 u32 nsid = le32_to_cpu(req->cmd->common.nsid); 448 struct nvmet_subsys *subsys = nvmet_req_subsys(req); 449 u16 status = NVME_SC_SUCCESS; 450 451 rcu_read_lock(); 452 req->ns = xa_load(&subsys->namespaces, nsid); 453 if (unlikely(!req->ns) || 454 !test_bit(NVMET_NS_IO_LIVE, &req->ns->flags) || 455 !percpu_ref_tryget_live_rcu(&req->ns->ref)) { 456 req->error_loc = offsetof(struct nvme_common_command, nsid); 457 if (!req->ns) { /* ns doesn't exist! */ 458 status = NVME_SC_INVALID_NS | NVME_STATUS_DNR; 459 goto unlock; 460 } 461 462 /* ns exists but it's disabled */ 463 req->ns = NULL; 464 status = NVME_SC_INTERNAL_PATH_ERROR; 465 } 466 unlock: 467 rcu_read_unlock(); 468 469 return status; 470 } 471 472 static void nvmet_destroy_namespace(struct percpu_ref *ref) 473 { 474 struct nvmet_ns *ns = container_of(ref, struct nvmet_ns, ref); 475 476 complete(&ns->disable_done); 477 } 478 479 void nvmet_put_namespace(struct nvmet_ns *ns) 480 { 481 percpu_ref_put(&ns->ref); 482 } 483 484 static void nvmet_ns_dev_disable(struct nvmet_ns *ns) 485 { 486 nvmet_bdev_ns_disable(ns); 487 nvmet_file_ns_disable(ns); 488 } 489 490 static int nvmet_p2pmem_ns_enable(struct nvmet_ns *ns) 491 { 492 int ret; 493 struct pci_dev *p2p_dev; 494 495 if (!ns->use_p2pmem) 496 return 0; 497 498 if (!ns->bdev) { 499 pr_err("peer-to-peer DMA is not supported by non-block device namespaces\n"); 500 return -EINVAL; 501 } 502 503 if (!blk_queue_pci_p2pdma(ns->bdev->bd_disk->queue)) { 504 pr_err("peer-to-peer DMA is not supported by the driver of %s\n", 505 ns->device_path); 506 return -EINVAL; 507 } 508 509 if (ns->p2p_dev) { 510 ret = pci_p2pdma_distance(ns->p2p_dev, nvmet_ns_dev(ns), true); 511 if (ret < 0) 512 return -EINVAL; 513 } else { 514 /* 515 * Right now we just check that there is p2pmem available so 516 * we can report an error to the user right away if there 517 * is not. We'll find the actual device to use once we 518 * setup the controller when the port's device is available. 519 */ 520 521 p2p_dev = pci_p2pmem_find(nvmet_ns_dev(ns)); 522 if (!p2p_dev) { 523 pr_err("no peer-to-peer memory is available for %s\n", 524 ns->device_path); 525 return -EINVAL; 526 } 527 528 pci_dev_put(p2p_dev); 529 } 530 531 return 0; 532 } 533 534 static void nvmet_p2pmem_ns_add_p2p(struct nvmet_ctrl *ctrl, 535 struct nvmet_ns *ns) 536 { 537 struct device *clients[2]; 538 struct pci_dev *p2p_dev; 539 int ret; 540 541 lockdep_assert_held(&ctrl->subsys->lock); 542 543 if (!ctrl->p2p_client || !ns->use_p2pmem) 544 return; 545 546 if (ns->p2p_dev) { 547 ret = pci_p2pdma_distance(ns->p2p_dev, ctrl->p2p_client, true); 548 if (ret < 0) 549 return; 550 551 p2p_dev = pci_dev_get(ns->p2p_dev); 552 } else { 553 clients[0] = ctrl->p2p_client; 554 clients[1] = nvmet_ns_dev(ns); 555 556 p2p_dev = pci_p2pmem_find_many(clients, ARRAY_SIZE(clients)); 557 if (!p2p_dev) { 558 pr_err("no peer-to-peer memory is available that's supported by %s and %s\n", 559 dev_name(ctrl->p2p_client), ns->device_path); 560 return; 561 } 562 } 563 564 ret = radix_tree_insert(&ctrl->p2p_ns_map, ns->nsid, p2p_dev); 565 if (ret < 0) 566 pci_dev_put(p2p_dev); 567 568 pr_info("using p2pmem on %s for nsid %u\n", pci_name(p2p_dev), 569 ns->nsid); 570 } 571 572 bool nvmet_ns_revalidate(struct nvmet_ns *ns) 573 { 574 loff_t oldsize = ns->size; 575 576 if (ns->bdev) 577 nvmet_bdev_ns_revalidate(ns); 578 else 579 nvmet_file_ns_revalidate(ns); 580 581 return oldsize != ns->size; 582 } 583 584 int nvmet_ns_enable(struct nvmet_ns *ns) 585 { 586 struct nvmet_subsys *subsys = ns->subsys; 587 struct nvmet_ctrl *ctrl; 588 int ret; 589 590 mutex_lock(&subsys->lock); 591 ret = 0; 592 593 if (nvmet_is_passthru_subsys(subsys)) { 594 pr_info("cannot enable both passthru and regular namespaces for a single subsystem"); 595 goto out_unlock; 596 } 597 598 if (ns->enabled) 599 goto out_unlock; 600 601 if (!ns->device_path) { 602 ret = -EINVAL; 603 goto out_unlock; 604 } 605 606 ret = nvmet_bdev_ns_enable(ns); 607 if (ret == -ENOTBLK) 608 ret = nvmet_file_ns_enable(ns); 609 if (ret) 610 goto out_unlock; 611 612 ret = nvmet_p2pmem_ns_enable(ns); 613 if (ret) 614 goto out_dev_disable; 615 616 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 617 nvmet_p2pmem_ns_add_p2p(ctrl, ns); 618 619 if (ns->pr.enable) { 620 ret = nvmet_pr_init_ns(ns); 621 if (ret) 622 goto out_dev_put; 623 } 624 625 ret = percpu_ref_init(&ns->ref, nvmet_destroy_namespace, 0, GFP_KERNEL); 626 if (ret) 627 goto out_pr_exit; 628 629 nvmet_ns_changed(subsys, ns->nsid); 630 ns->enabled = true; 631 xa_set_mark(&subsys->namespaces, ns->nsid, NVMET_NS_ENABLED); 632 nvmet_debugfs_ns_setup(ns); 633 set_bit(NVMET_NS_IO_LIVE, &ns->flags); 634 ret = 0; 635 out_unlock: 636 mutex_unlock(&subsys->lock); 637 return ret; 638 out_pr_exit: 639 if (ns->pr.enable) 640 nvmet_pr_exit_ns(ns); 641 out_dev_put: 642 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 643 pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid)); 644 out_dev_disable: 645 nvmet_ns_dev_disable(ns); 646 goto out_unlock; 647 } 648 649 void nvmet_ns_disable(struct nvmet_ns *ns) 650 { 651 struct nvmet_subsys *subsys = ns->subsys; 652 struct nvmet_ctrl *ctrl; 653 654 if (!test_and_clear_bit(NVMET_NS_IO_LIVE, &ns->flags)) 655 return; 656 657 mutex_lock(&subsys->lock); 658 659 xa_clear_mark(&subsys->namespaces, ns->nsid, NVMET_NS_ENABLED); 660 nvmet_debugfs_ns_free(ns); 661 662 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 663 pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid)); 664 665 mutex_unlock(&subsys->lock); 666 667 /* 668 * Now that we removed the namespaces from the lookup list, we 669 * can kill the per_cpu ref and wait for any remaining references 670 * to be dropped, as well as a RCU grace period for anyone only 671 * using the namespace under rcu_read_lock(). Note that we can't 672 * use call_rcu here as we need to ensure the namespaces have 673 * been fully destroyed before unloading the module. 674 */ 675 percpu_ref_kill(&ns->ref); 676 synchronize_rcu(); 677 wait_for_completion(&ns->disable_done); 678 percpu_ref_exit(&ns->ref); 679 680 if (ns->pr.enable) 681 nvmet_pr_exit_ns(ns); 682 683 mutex_lock(&subsys->lock); 684 nvmet_ns_changed(subsys, ns->nsid); 685 nvmet_ns_dev_disable(ns); 686 ns->enabled = false; 687 mutex_unlock(&subsys->lock); 688 } 689 690 void nvmet_ns_free(struct nvmet_ns *ns) 691 { 692 struct nvmet_subsys *subsys = ns->subsys; 693 694 nvmet_ns_disable(ns); 695 696 mutex_lock(&subsys->lock); 697 698 xa_erase(&subsys->namespaces, ns->nsid); 699 if (ns->nsid == subsys->max_nsid) 700 subsys->max_nsid = nvmet_max_nsid(subsys); 701 702 subsys->nr_namespaces--; 703 mutex_unlock(&subsys->lock); 704 705 down_write(&nvmet_ana_sem); 706 nvmet_ana_group_enabled[ns->anagrpid]--; 707 up_write(&nvmet_ana_sem); 708 709 kfree(ns->device_path); 710 kfree(ns); 711 } 712 713 struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid) 714 { 715 struct nvmet_ns *ns; 716 717 mutex_lock(&subsys->lock); 718 719 if (subsys->nr_namespaces == NVMET_MAX_NAMESPACES) 720 goto out_unlock; 721 722 ns = kzalloc_obj(*ns); 723 if (!ns) 724 goto out_unlock; 725 726 init_completion(&ns->disable_done); 727 728 ns->nsid = nsid; 729 ns->subsys = subsys; 730 731 if (ns->nsid > subsys->max_nsid) 732 subsys->max_nsid = nsid; 733 734 if (xa_insert(&subsys->namespaces, ns->nsid, ns, GFP_KERNEL)) 735 goto out_exit; 736 737 subsys->nr_namespaces++; 738 739 mutex_unlock(&subsys->lock); 740 741 down_write(&nvmet_ana_sem); 742 ns->anagrpid = NVMET_DEFAULT_ANA_GRPID; 743 nvmet_ana_group_enabled[ns->anagrpid]++; 744 up_write(&nvmet_ana_sem); 745 746 uuid_gen(&ns->uuid); 747 ns->buffered_io = false; 748 ns->csi = NVME_CSI_NVM; 749 750 return ns; 751 out_exit: 752 subsys->max_nsid = nvmet_max_nsid(subsys); 753 kfree(ns); 754 out_unlock: 755 mutex_unlock(&subsys->lock); 756 return NULL; 757 } 758 759 static void nvmet_update_sq_head(struct nvmet_req *req) 760 { 761 if (req->sq->size) { 762 u32 old_sqhd, new_sqhd; 763 764 old_sqhd = READ_ONCE(req->sq->sqhd); 765 do { 766 new_sqhd = (old_sqhd + 1) % req->sq->size; 767 } while (!try_cmpxchg(&req->sq->sqhd, &old_sqhd, new_sqhd)); 768 } 769 req->cqe->sq_head = cpu_to_le16(req->sq->sqhd & 0x0000FFFF); 770 } 771 772 static void nvmet_set_error(struct nvmet_req *req, u16 status) 773 { 774 struct nvmet_ctrl *ctrl = req->sq->ctrl; 775 struct nvme_error_slot *new_error_slot; 776 unsigned long flags; 777 778 req->cqe->status = cpu_to_le16(status << 1); 779 780 if (!ctrl || req->error_loc == NVMET_NO_ERROR_LOC) 781 return; 782 783 spin_lock_irqsave(&ctrl->error_lock, flags); 784 ctrl->err_counter++; 785 new_error_slot = 786 &ctrl->slots[ctrl->err_counter % NVMET_ERROR_LOG_SLOTS]; 787 788 new_error_slot->error_count = cpu_to_le64(ctrl->err_counter); 789 new_error_slot->sqid = cpu_to_le16(req->sq->qid); 790 new_error_slot->cmdid = cpu_to_le16(req->cmd->common.command_id); 791 new_error_slot->status_field = cpu_to_le16(status << 1); 792 new_error_slot->param_error_location = cpu_to_le16(req->error_loc); 793 new_error_slot->lba = cpu_to_le64(req->error_slba); 794 new_error_slot->nsid = req->cmd->common.nsid; 795 spin_unlock_irqrestore(&ctrl->error_lock, flags); 796 797 /* set the more bit for this request */ 798 req->cqe->status |= cpu_to_le16(1 << 14); 799 } 800 801 static void __nvmet_req_complete(struct nvmet_req *req, u16 status) 802 { 803 struct nvmet_ns *ns = req->ns; 804 struct nvmet_pr_per_ctrl_ref *pc_ref = req->pc_ref; 805 806 if (!req->sq->sqhd_disabled) 807 nvmet_update_sq_head(req); 808 req->cqe->sq_id = cpu_to_le16(req->sq->qid); 809 req->cqe->command_id = req->cmd->common.command_id; 810 811 if (unlikely(status)) 812 nvmet_set_error(req, status); 813 814 trace_nvmet_req_complete(req); 815 816 req->ops->queue_response(req); 817 818 if (pc_ref) 819 nvmet_pr_put_ns_pc_ref(pc_ref); 820 if (ns) 821 nvmet_put_namespace(ns); 822 823 nvmet_put_passthru_ref(req); 824 } 825 826 void nvmet_req_complete(struct nvmet_req *req, u16 status) 827 { 828 struct nvmet_sq *sq = req->sq; 829 830 __nvmet_req_complete(req, status); 831 percpu_ref_put(&sq->ref); 832 } 833 EXPORT_SYMBOL_GPL(nvmet_req_complete); 834 835 void nvmet_cq_init(struct nvmet_cq *cq) 836 { 837 refcount_set(&cq->ref, 1); 838 } 839 EXPORT_SYMBOL_GPL(nvmet_cq_init); 840 841 bool nvmet_cq_get(struct nvmet_cq *cq) 842 { 843 return refcount_inc_not_zero(&cq->ref); 844 } 845 EXPORT_SYMBOL_GPL(nvmet_cq_get); 846 847 void nvmet_cq_put(struct nvmet_cq *cq) 848 { 849 if (refcount_dec_and_test(&cq->ref)) 850 nvmet_cq_destroy(cq); 851 } 852 EXPORT_SYMBOL_GPL(nvmet_cq_put); 853 854 void nvmet_cq_setup(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, 855 u16 qid, u16 size) 856 { 857 cq->qid = qid; 858 cq->size = size; 859 860 ctrl->cqs[qid] = cq; 861 } 862 863 void nvmet_cq_destroy(struct nvmet_cq *cq) 864 { 865 struct nvmet_ctrl *ctrl = cq->ctrl; 866 867 if (ctrl) { 868 ctrl->cqs[cq->qid] = NULL; 869 nvmet_ctrl_put(cq->ctrl); 870 cq->ctrl = NULL; 871 } 872 } 873 874 void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, 875 u16 qid, u16 size) 876 { 877 sq->sqhd = 0; 878 sq->qid = qid; 879 sq->size = size; 880 881 ctrl->sqs[qid] = sq; 882 } 883 884 static void nvmet_confirm_sq(struct percpu_ref *ref) 885 { 886 struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref); 887 888 complete(&sq->confirm_done); 889 } 890 891 u16 nvmet_check_cqid(struct nvmet_ctrl *ctrl, u16 cqid, bool create) 892 { 893 if (!ctrl->cqs) 894 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 895 896 if (cqid > ctrl->max_qid) 897 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 898 899 if ((create && ctrl->cqs[cqid]) || (!create && !ctrl->cqs[cqid])) 900 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 901 902 return NVME_SC_SUCCESS; 903 } 904 905 u16 nvmet_check_io_cqid(struct nvmet_ctrl *ctrl, u16 cqid, bool create) 906 { 907 if (!cqid) 908 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 909 return nvmet_check_cqid(ctrl, cqid, create); 910 } 911 912 bool nvmet_cq_in_use(struct nvmet_cq *cq) 913 { 914 return refcount_read(&cq->ref) > 1; 915 } 916 EXPORT_SYMBOL_GPL(nvmet_cq_in_use); 917 918 u16 nvmet_cq_create(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, 919 u16 qid, u16 size) 920 { 921 u16 status; 922 923 status = nvmet_check_cqid(ctrl, qid, true); 924 if (status != NVME_SC_SUCCESS) 925 return status; 926 927 if (!kref_get_unless_zero(&ctrl->ref)) 928 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 929 cq->ctrl = ctrl; 930 931 nvmet_cq_init(cq); 932 nvmet_cq_setup(ctrl, cq, qid, size); 933 934 return NVME_SC_SUCCESS; 935 } 936 EXPORT_SYMBOL_GPL(nvmet_cq_create); 937 938 u16 nvmet_check_sqid(struct nvmet_ctrl *ctrl, u16 sqid, 939 bool create) 940 { 941 if (!ctrl->sqs) 942 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 943 944 if (sqid > ctrl->max_qid) 945 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 946 947 if ((create && ctrl->sqs[sqid]) || 948 (!create && !ctrl->sqs[sqid])) 949 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 950 951 return NVME_SC_SUCCESS; 952 } 953 954 u16 nvmet_sq_create(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, 955 struct nvmet_cq *cq, u16 sqid, u16 size) 956 { 957 u16 status; 958 int ret; 959 960 if (!kref_get_unless_zero(&ctrl->ref)) 961 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 962 963 status = nvmet_check_sqid(ctrl, sqid, true); 964 if (status != NVME_SC_SUCCESS) 965 goto ctrl_put; 966 967 ret = nvmet_sq_init(sq, cq); 968 if (ret) { 969 status = NVME_SC_INTERNAL | NVME_STATUS_DNR; 970 goto ctrl_put; 971 } 972 973 nvmet_sq_setup(ctrl, sq, sqid, size); 974 sq->ctrl = ctrl; 975 976 return NVME_SC_SUCCESS; 977 978 ctrl_put: 979 nvmet_ctrl_put(ctrl); 980 return status; 981 } 982 EXPORT_SYMBOL_GPL(nvmet_sq_create); 983 984 void nvmet_sq_destroy(struct nvmet_sq *sq) 985 { 986 struct nvmet_ctrl *ctrl = sq->ctrl; 987 988 /* 989 * If this is the admin queue, complete all AERs so that our 990 * queue doesn't have outstanding requests on it. 991 */ 992 if (ctrl && ctrl->sqs && ctrl->sqs[0] == sq) 993 nvmet_async_events_failall(ctrl); 994 percpu_ref_kill_and_confirm(&sq->ref, nvmet_confirm_sq); 995 wait_for_completion(&sq->confirm_done); 996 wait_for_completion(&sq->free_done); 997 percpu_ref_exit(&sq->ref); 998 nvmet_auth_sq_destroy(sq); 999 nvmet_cq_put(sq->cq); 1000 1001 /* 1002 * we must reference the ctrl again after waiting for inflight IO 1003 * to complete. Because admin connect may have sneaked in after we 1004 * store sq->ctrl locally, but before we killed the percpu_ref. the 1005 * admin connect allocates and assigns sq->ctrl, which now needs a 1006 * final ref put, as this ctrl is going away. 1007 */ 1008 ctrl = sq->ctrl; 1009 1010 if (ctrl) { 1011 /* 1012 * The teardown flow may take some time, and the host may not 1013 * send us keep-alive during this period, hence reset the 1014 * traffic based keep-alive timer so we don't trigger a 1015 * controller teardown as a result of a keep-alive expiration. 1016 */ 1017 ctrl->reset_tbkas = true; 1018 sq->ctrl->sqs[sq->qid] = NULL; 1019 nvmet_ctrl_put(ctrl); 1020 sq->ctrl = NULL; /* allows reusing the queue later */ 1021 } 1022 } 1023 EXPORT_SYMBOL_GPL(nvmet_sq_destroy); 1024 1025 static void nvmet_sq_free(struct percpu_ref *ref) 1026 { 1027 struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref); 1028 1029 complete(&sq->free_done); 1030 } 1031 1032 int nvmet_sq_init(struct nvmet_sq *sq, struct nvmet_cq *cq) 1033 { 1034 int ret; 1035 1036 if (!nvmet_cq_get(cq)) 1037 return -EINVAL; 1038 1039 ret = percpu_ref_init(&sq->ref, nvmet_sq_free, 0, GFP_KERNEL); 1040 if (ret) { 1041 pr_err("percpu_ref init failed!\n"); 1042 nvmet_cq_put(cq); 1043 return ret; 1044 } 1045 init_completion(&sq->free_done); 1046 init_completion(&sq->confirm_done); 1047 nvmet_auth_sq_init(sq); 1048 sq->cq = cq; 1049 1050 return 0; 1051 } 1052 EXPORT_SYMBOL_GPL(nvmet_sq_init); 1053 1054 static inline u16 nvmet_check_ana_state(struct nvmet_port *port, 1055 struct nvmet_ns *ns) 1056 { 1057 enum nvme_ana_state state = port->ana_state[ns->anagrpid]; 1058 1059 if (unlikely(state == NVME_ANA_INACCESSIBLE)) 1060 return NVME_SC_ANA_INACCESSIBLE; 1061 if (unlikely(state == NVME_ANA_PERSISTENT_LOSS)) 1062 return NVME_SC_ANA_PERSISTENT_LOSS; 1063 if (unlikely(state == NVME_ANA_CHANGE)) 1064 return NVME_SC_ANA_TRANSITION; 1065 return 0; 1066 } 1067 1068 static inline u16 nvmet_io_cmd_check_access(struct nvmet_req *req) 1069 { 1070 if (unlikely(req->ns->readonly)) { 1071 switch (req->cmd->common.opcode) { 1072 case nvme_cmd_read: 1073 case nvme_cmd_flush: 1074 break; 1075 default: 1076 return NVME_SC_NS_WRITE_PROTECTED; 1077 } 1078 } 1079 1080 return 0; 1081 } 1082 1083 static u32 nvmet_io_cmd_transfer_len(struct nvmet_req *req) 1084 { 1085 struct nvme_command *cmd = req->cmd; 1086 u32 metadata_len = 0; 1087 1088 if (nvme_is_fabrics(cmd)) 1089 return nvmet_fabrics_io_cmd_data_len(req); 1090 1091 if (!req->ns) 1092 return 0; 1093 1094 switch (req->cmd->common.opcode) { 1095 case nvme_cmd_read: 1096 case nvme_cmd_write: 1097 case nvme_cmd_zone_append: 1098 if (req->sq->ctrl->pi_support && nvmet_ns_has_pi(req->ns)) 1099 metadata_len = nvmet_rw_metadata_len(req); 1100 return nvmet_rw_data_len(req) + metadata_len; 1101 case nvme_cmd_dsm: 1102 return nvmet_dsm_len(req); 1103 case nvme_cmd_zone_mgmt_recv: 1104 return (le32_to_cpu(req->cmd->zmr.numd) + 1) << 2; 1105 default: 1106 return 0; 1107 } 1108 } 1109 1110 static u16 nvmet_parse_io_cmd(struct nvmet_req *req) 1111 { 1112 struct nvme_command *cmd = req->cmd; 1113 u16 ret; 1114 1115 if (nvme_is_fabrics(cmd)) 1116 return nvmet_parse_fabrics_io_cmd(req); 1117 1118 if (unlikely(!nvmet_check_auth_status(req))) 1119 return NVME_SC_AUTH_REQUIRED | NVME_STATUS_DNR; 1120 1121 ret = nvmet_check_ctrl_status(req); 1122 if (unlikely(ret)) 1123 return ret; 1124 1125 if (nvmet_is_passthru_req(req)) 1126 return nvmet_parse_passthru_io_cmd(req); 1127 1128 ret = nvmet_req_find_ns(req); 1129 if (unlikely(ret)) 1130 return ret; 1131 1132 ret = nvmet_check_ana_state(req->port, req->ns); 1133 if (unlikely(ret)) { 1134 req->error_loc = offsetof(struct nvme_common_command, nsid); 1135 return ret; 1136 } 1137 ret = nvmet_io_cmd_check_access(req); 1138 if (unlikely(ret)) { 1139 req->error_loc = offsetof(struct nvme_common_command, nsid); 1140 return ret; 1141 } 1142 1143 if (req->ns->pr.enable) { 1144 ret = nvmet_parse_pr_cmd(req); 1145 if (!ret) 1146 return ret; 1147 } 1148 1149 switch (req->ns->csi) { 1150 case NVME_CSI_NVM: 1151 if (req->ns->file) 1152 ret = nvmet_file_parse_io_cmd(req); 1153 else 1154 ret = nvmet_bdev_parse_io_cmd(req); 1155 break; 1156 case NVME_CSI_ZNS: 1157 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED)) 1158 ret = nvmet_bdev_zns_parse_io_cmd(req); 1159 else 1160 ret = NVME_SC_INVALID_IO_CMD_SET; 1161 break; 1162 default: 1163 ret = NVME_SC_INVALID_IO_CMD_SET; 1164 } 1165 if (ret) 1166 return ret; 1167 1168 if (req->ns->pr.enable) { 1169 ret = nvmet_pr_check_cmd_access(req); 1170 if (ret) 1171 return ret; 1172 1173 ret = nvmet_pr_get_ns_pc_ref(req); 1174 } 1175 return ret; 1176 } 1177 1178 bool nvmet_req_init(struct nvmet_req *req, struct nvmet_sq *sq, 1179 const struct nvmet_fabrics_ops *ops) 1180 { 1181 u8 flags = req->cmd->common.flags; 1182 u16 status; 1183 1184 req->cq = sq->cq; 1185 req->sq = sq; 1186 req->ops = ops; 1187 req->sg = NULL; 1188 req->metadata_sg = NULL; 1189 req->sg_cnt = 0; 1190 req->metadata_sg_cnt = 0; 1191 req->transfer_len = 0; 1192 req->metadata_len = 0; 1193 req->cqe->result.u64 = 0; 1194 req->cqe->status = 0; 1195 req->cqe->sq_head = 0; 1196 req->ns = NULL; 1197 req->error_loc = NVMET_NO_ERROR_LOC; 1198 req->error_slba = 0; 1199 req->pc_ref = NULL; 1200 req->p.ref_held = false; 1201 1202 /* no support for fused commands yet */ 1203 if (unlikely(flags & (NVME_CMD_FUSE_FIRST | NVME_CMD_FUSE_SECOND))) { 1204 req->error_loc = offsetof(struct nvme_common_command, flags); 1205 status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR; 1206 goto fail; 1207 } 1208 1209 /* 1210 * For fabrics, PSDT field shall describe metadata pointer (MPTR) that 1211 * contains an address of a single contiguous physical buffer that is 1212 * byte aligned. For PCI controllers, this is optional so not enforced. 1213 */ 1214 if (unlikely((flags & NVME_CMD_SGL_ALL) != NVME_CMD_SGL_METABUF)) { 1215 if (!req->sq->ctrl || !nvmet_is_pci_ctrl(req->sq->ctrl)) { 1216 req->error_loc = 1217 offsetof(struct nvme_common_command, flags); 1218 status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR; 1219 goto fail; 1220 } 1221 } 1222 1223 if (unlikely(!req->sq->ctrl)) 1224 /* will return an error for any non-connect command: */ 1225 status = nvmet_parse_connect_cmd(req); 1226 else if (likely(req->sq->qid != 0)) 1227 status = nvmet_parse_io_cmd(req); 1228 else 1229 status = nvmet_parse_admin_cmd(req); 1230 1231 if (status) 1232 goto fail; 1233 1234 trace_nvmet_req_init(req, req->cmd); 1235 1236 if (unlikely(!percpu_ref_tryget_live(&sq->ref))) { 1237 status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR; 1238 goto fail; 1239 } 1240 1241 if (sq->ctrl && sq->ctrl->tbkas) 1242 sq->ctrl->reset_tbkas = true; 1243 1244 return true; 1245 1246 fail: 1247 __nvmet_req_complete(req, status); 1248 return false; 1249 } 1250 EXPORT_SYMBOL_GPL(nvmet_req_init); 1251 1252 void nvmet_req_uninit(struct nvmet_req *req) 1253 { 1254 percpu_ref_put(&req->sq->ref); 1255 if (req->pc_ref) 1256 nvmet_pr_put_ns_pc_ref(req->pc_ref); 1257 if (req->ns) 1258 nvmet_put_namespace(req->ns); 1259 } 1260 EXPORT_SYMBOL_GPL(nvmet_req_uninit); 1261 1262 size_t nvmet_req_transfer_len(struct nvmet_req *req) 1263 { 1264 if (likely(req->sq->qid != 0)) 1265 return nvmet_io_cmd_transfer_len(req); 1266 if (unlikely(!req->sq->ctrl)) 1267 return nvmet_connect_cmd_data_len(req); 1268 return nvmet_admin_cmd_data_len(req); 1269 } 1270 EXPORT_SYMBOL_GPL(nvmet_req_transfer_len); 1271 1272 bool nvmet_check_transfer_len(struct nvmet_req *req, size_t len) 1273 { 1274 if (unlikely(len != req->transfer_len)) { 1275 u16 status; 1276 1277 req->error_loc = offsetof(struct nvme_common_command, dptr); 1278 if (req->cmd->common.flags & NVME_CMD_SGL_ALL) 1279 status = NVME_SC_SGL_INVALID_DATA; 1280 else 1281 status = NVME_SC_INVALID_FIELD; 1282 nvmet_req_complete(req, status | NVME_STATUS_DNR); 1283 return false; 1284 } 1285 1286 return true; 1287 } 1288 EXPORT_SYMBOL_GPL(nvmet_check_transfer_len); 1289 1290 bool nvmet_check_data_len_lte(struct nvmet_req *req, size_t data_len) 1291 { 1292 if (unlikely(data_len > req->transfer_len)) { 1293 u16 status; 1294 1295 req->error_loc = offsetof(struct nvme_common_command, dptr); 1296 if (req->cmd->common.flags & NVME_CMD_SGL_ALL) 1297 status = NVME_SC_SGL_INVALID_DATA; 1298 else 1299 status = NVME_SC_INVALID_FIELD; 1300 nvmet_req_complete(req, status | NVME_STATUS_DNR); 1301 return false; 1302 } 1303 1304 return true; 1305 } 1306 1307 static unsigned int nvmet_data_transfer_len(struct nvmet_req *req) 1308 { 1309 return req->transfer_len - req->metadata_len; 1310 } 1311 1312 static int nvmet_req_alloc_p2pmem_sgls(struct pci_dev *p2p_dev, 1313 struct nvmet_req *req) 1314 { 1315 req->sg = pci_p2pmem_alloc_sgl(p2p_dev, &req->sg_cnt, 1316 nvmet_data_transfer_len(req)); 1317 if (!req->sg) 1318 goto out_err; 1319 1320 if (req->metadata_len) { 1321 req->metadata_sg = pci_p2pmem_alloc_sgl(p2p_dev, 1322 &req->metadata_sg_cnt, req->metadata_len); 1323 if (!req->metadata_sg) 1324 goto out_free_sg; 1325 } 1326 1327 req->p2p_dev = p2p_dev; 1328 1329 return 0; 1330 out_free_sg: 1331 pci_p2pmem_free_sgl(p2p_dev, req->sg); 1332 out_err: 1333 return -ENOMEM; 1334 } 1335 1336 static struct pci_dev *nvmet_req_find_p2p_dev(struct nvmet_req *req) 1337 { 1338 if (!IS_ENABLED(CONFIG_PCI_P2PDMA) || 1339 !req->sq->ctrl || !req->sq->qid || !req->ns) 1340 return NULL; 1341 return radix_tree_lookup(&req->sq->ctrl->p2p_ns_map, req->ns->nsid); 1342 } 1343 1344 int nvmet_req_alloc_sgls(struct nvmet_req *req) 1345 { 1346 struct pci_dev *p2p_dev = nvmet_req_find_p2p_dev(req); 1347 1348 if (p2p_dev && !nvmet_req_alloc_p2pmem_sgls(p2p_dev, req)) 1349 return 0; 1350 1351 req->sg = sgl_alloc(nvmet_data_transfer_len(req), GFP_KERNEL, 1352 &req->sg_cnt); 1353 if (unlikely(!req->sg)) 1354 goto out; 1355 1356 if (req->metadata_len) { 1357 req->metadata_sg = sgl_alloc(req->metadata_len, GFP_KERNEL, 1358 &req->metadata_sg_cnt); 1359 if (unlikely(!req->metadata_sg)) 1360 goto out_free; 1361 } 1362 1363 return 0; 1364 out_free: 1365 sgl_free(req->sg); 1366 out: 1367 return -ENOMEM; 1368 } 1369 EXPORT_SYMBOL_GPL(nvmet_req_alloc_sgls); 1370 1371 void nvmet_req_free_sgls(struct nvmet_req *req) 1372 { 1373 if (req->p2p_dev) { 1374 pci_p2pmem_free_sgl(req->p2p_dev, req->sg); 1375 if (req->metadata_sg) 1376 pci_p2pmem_free_sgl(req->p2p_dev, req->metadata_sg); 1377 req->p2p_dev = NULL; 1378 } else { 1379 sgl_free(req->sg); 1380 if (req->metadata_sg) 1381 sgl_free(req->metadata_sg); 1382 } 1383 1384 req->sg = NULL; 1385 req->metadata_sg = NULL; 1386 req->sg_cnt = 0; 1387 req->metadata_sg_cnt = 0; 1388 } 1389 EXPORT_SYMBOL_GPL(nvmet_req_free_sgls); 1390 1391 static inline bool nvmet_css_supported(u8 cc_css) 1392 { 1393 switch (cc_css << NVME_CC_CSS_SHIFT) { 1394 case NVME_CC_CSS_NVM: 1395 case NVME_CC_CSS_CSI: 1396 return true; 1397 default: 1398 return false; 1399 } 1400 } 1401 1402 static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl) 1403 { 1404 lockdep_assert_held(&ctrl->lock); 1405 1406 /* 1407 * Only I/O controllers should verify iosqes,iocqes. 1408 * Strictly speaking, the spec says a discovery controller 1409 * should verify iosqes,iocqes are zeroed, however that 1410 * would break backwards compatibility, so don't enforce it. 1411 */ 1412 if (!nvmet_is_disc_subsys(ctrl->subsys) && 1413 (nvmet_cc_iosqes(ctrl->cc) != NVME_NVM_IOSQES || 1414 nvmet_cc_iocqes(ctrl->cc) != NVME_NVM_IOCQES)) { 1415 ctrl->csts = NVME_CSTS_CFS; 1416 return; 1417 } 1418 1419 if (nvmet_cc_mps(ctrl->cc) != 0 || 1420 nvmet_cc_ams(ctrl->cc) != 0 || 1421 !nvmet_css_supported(nvmet_cc_css(ctrl->cc))) { 1422 ctrl->csts = NVME_CSTS_CFS; 1423 return; 1424 } 1425 1426 ctrl->csts = NVME_CSTS_RDY; 1427 1428 /* 1429 * Controllers that are not yet enabled should not really enforce the 1430 * keep alive timeout, but we still want to track a timeout and cleanup 1431 * in case a host died before it enabled the controller. Hence, simply 1432 * reset the keep alive timer when the controller is enabled. 1433 */ 1434 if (ctrl->kato) 1435 mod_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ); 1436 } 1437 1438 static void nvmet_clear_ctrl(struct nvmet_ctrl *ctrl) 1439 { 1440 lockdep_assert_held(&ctrl->lock); 1441 1442 /* XXX: tear down queues? */ 1443 ctrl->csts &= ~NVME_CSTS_RDY; 1444 ctrl->cc = 0; 1445 } 1446 1447 void nvmet_update_cc(struct nvmet_ctrl *ctrl, u32 new) 1448 { 1449 u32 old; 1450 1451 mutex_lock(&ctrl->lock); 1452 old = ctrl->cc; 1453 ctrl->cc = new; 1454 1455 if (nvmet_cc_en(new) && !nvmet_cc_en(old)) 1456 nvmet_start_ctrl(ctrl); 1457 if (!nvmet_cc_en(new) && nvmet_cc_en(old)) 1458 nvmet_clear_ctrl(ctrl); 1459 if (nvmet_cc_shn(new) && !nvmet_cc_shn(old)) { 1460 nvmet_clear_ctrl(ctrl); 1461 ctrl->csts |= NVME_CSTS_SHST_CMPLT; 1462 } 1463 if (!nvmet_cc_shn(new) && nvmet_cc_shn(old)) 1464 ctrl->csts &= ~NVME_CSTS_SHST_CMPLT; 1465 mutex_unlock(&ctrl->lock); 1466 } 1467 EXPORT_SYMBOL_GPL(nvmet_update_cc); 1468 1469 static void nvmet_init_cap(struct nvmet_ctrl *ctrl) 1470 { 1471 /* command sets supported: NVMe command set: */ 1472 ctrl->cap = (1ULL << 37); 1473 /* Controller supports one or more I/O Command Sets */ 1474 ctrl->cap |= (1ULL << 43); 1475 /* CC.EN timeout in 500msec units: */ 1476 ctrl->cap |= (15ULL << 24); 1477 /* maximum queue entries supported: */ 1478 if (ctrl->ops->get_max_queue_size) 1479 ctrl->cap |= min_t(u16, ctrl->ops->get_max_queue_size(ctrl), 1480 ctrl->port->max_queue_size) - 1; 1481 else 1482 ctrl->cap |= ctrl->port->max_queue_size - 1; 1483 1484 if (nvmet_is_passthru_subsys(ctrl->subsys)) 1485 nvmet_passthrough_override_cap(ctrl); 1486 } 1487 1488 struct nvmet_ctrl *nvmet_ctrl_find_get(const char *subsysnqn, 1489 const char *hostnqn, u16 cntlid, 1490 struct nvmet_req *req) 1491 { 1492 struct nvmet_ctrl *ctrl = NULL; 1493 struct nvmet_subsys *subsys; 1494 1495 subsys = nvmet_find_get_subsys(req->port, subsysnqn); 1496 if (!subsys) { 1497 pr_warn("connect request for invalid subsystem %s!\n", 1498 subsysnqn); 1499 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(subsysnqn); 1500 goto out; 1501 } 1502 1503 mutex_lock(&subsys->lock); 1504 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 1505 if (ctrl->cntlid == cntlid) { 1506 if (strncmp(hostnqn, ctrl->hostnqn, NVMF_NQN_SIZE)) { 1507 pr_warn("hostnqn mismatch.\n"); 1508 continue; 1509 } 1510 if (!kref_get_unless_zero(&ctrl->ref)) 1511 continue; 1512 1513 /* ctrl found */ 1514 goto found; 1515 } 1516 } 1517 1518 ctrl = NULL; /* ctrl not found */ 1519 pr_warn("could not find controller %d for subsys %s / host %s\n", 1520 cntlid, subsysnqn, hostnqn); 1521 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(cntlid); 1522 1523 found: 1524 mutex_unlock(&subsys->lock); 1525 nvmet_subsys_put(subsys); 1526 out: 1527 return ctrl; 1528 } 1529 1530 u16 nvmet_check_ctrl_status(struct nvmet_req *req) 1531 { 1532 if (unlikely(!(req->sq->ctrl->cc & NVME_CC_ENABLE))) { 1533 pr_err("got cmd %d while CC.EN == 0 on qid = %d\n", 1534 req->cmd->common.opcode, req->sq->qid); 1535 return NVME_SC_CMD_SEQ_ERROR | NVME_STATUS_DNR; 1536 } 1537 1538 if (unlikely(!(req->sq->ctrl->csts & NVME_CSTS_RDY))) { 1539 pr_err("got cmd %d while CSTS.RDY == 0 on qid = %d\n", 1540 req->cmd->common.opcode, req->sq->qid); 1541 return NVME_SC_CMD_SEQ_ERROR | NVME_STATUS_DNR; 1542 } 1543 1544 if (unlikely(!nvmet_check_auth_status(req))) { 1545 pr_warn("qid %d not authenticated\n", req->sq->qid); 1546 return NVME_SC_AUTH_REQUIRED | NVME_STATUS_DNR; 1547 } 1548 return 0; 1549 } 1550 1551 bool nvmet_host_allowed(struct nvmet_subsys *subsys, const char *hostnqn) 1552 { 1553 struct nvmet_host_link *p; 1554 1555 lockdep_assert_held(&nvmet_config_sem); 1556 1557 if (subsys->allow_any_host) 1558 return true; 1559 1560 if (nvmet_is_disc_subsys(subsys)) /* allow all access to disc subsys */ 1561 return true; 1562 1563 list_for_each_entry(p, &subsys->hosts, entry) { 1564 if (!strcmp(nvmet_host_name(p->host), hostnqn)) 1565 return true; 1566 } 1567 1568 return false; 1569 } 1570 1571 static void nvmet_setup_p2p_ns_map(struct nvmet_ctrl *ctrl, 1572 struct device *p2p_client) 1573 { 1574 struct nvmet_ns *ns; 1575 unsigned long idx; 1576 1577 lockdep_assert_held(&ctrl->subsys->lock); 1578 1579 if (!p2p_client) 1580 return; 1581 1582 ctrl->p2p_client = get_device(p2p_client); 1583 1584 nvmet_for_each_enabled_ns(&ctrl->subsys->namespaces, idx, ns) 1585 nvmet_p2pmem_ns_add_p2p(ctrl, ns); 1586 } 1587 1588 static void nvmet_release_p2p_ns_map(struct nvmet_ctrl *ctrl) 1589 { 1590 struct radix_tree_iter iter; 1591 void __rcu **slot; 1592 1593 lockdep_assert_held(&ctrl->subsys->lock); 1594 1595 radix_tree_for_each_slot(slot, &ctrl->p2p_ns_map, &iter, 0) 1596 pci_dev_put(radix_tree_deref_slot(slot)); 1597 1598 put_device(ctrl->p2p_client); 1599 } 1600 1601 static void nvmet_fatal_error_handler(struct work_struct *work) 1602 { 1603 struct nvmet_ctrl *ctrl = 1604 container_of(work, struct nvmet_ctrl, fatal_err_work); 1605 1606 pr_err("ctrl %d fatal error occurred!\n", ctrl->cntlid); 1607 ctrl->ops->delete_ctrl(ctrl); 1608 } 1609 1610 struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args) 1611 { 1612 struct nvmet_subsys *subsys; 1613 struct nvmet_ctrl *ctrl; 1614 u32 kato = args->kato; 1615 u8 dhchap_status; 1616 int ret; 1617 1618 args->status = NVME_SC_CONNECT_INVALID_PARAM | NVME_STATUS_DNR; 1619 subsys = nvmet_find_get_subsys(args->port, args->subsysnqn); 1620 if (!subsys) { 1621 pr_warn("connect request for invalid subsystem %s!\n", 1622 args->subsysnqn); 1623 args->result = IPO_IATTR_CONNECT_DATA(subsysnqn); 1624 args->error_loc = offsetof(struct nvme_common_command, dptr); 1625 return NULL; 1626 } 1627 1628 down_read(&nvmet_config_sem); 1629 if (!nvmet_host_allowed(subsys, args->hostnqn)) { 1630 pr_info("connect by host %s for subsystem %s not allowed\n", 1631 args->hostnqn, args->subsysnqn); 1632 args->result = IPO_IATTR_CONNECT_DATA(hostnqn); 1633 up_read(&nvmet_config_sem); 1634 args->status = NVME_SC_CONNECT_INVALID_HOST | NVME_STATUS_DNR; 1635 args->error_loc = offsetof(struct nvme_common_command, dptr); 1636 goto out_put_subsystem; 1637 } 1638 up_read(&nvmet_config_sem); 1639 1640 args->status = NVME_SC_INTERNAL; 1641 ctrl = kzalloc_obj(*ctrl); 1642 if (!ctrl) 1643 goto out_put_subsystem; 1644 mutex_init(&ctrl->lock); 1645 1646 ctrl->port = args->port; 1647 ctrl->ops = args->ops; 1648 1649 #ifdef CONFIG_NVME_TARGET_PASSTHRU 1650 /* By default, set loop targets to clear IDS by default */ 1651 if (ctrl->port->disc_addr.trtype == NVMF_TRTYPE_LOOP) { 1652 mutex_lock(&subsys->lock); 1653 subsys->passthru = nvmet_subsys_passthru(subsys); 1654 if (!subsys->passthru) { 1655 mutex_unlock(&subsys->lock); 1656 goto out_free_ctrl; 1657 } 1658 subsys->passthru->clear_ids = 1; 1659 mutex_unlock(&subsys->lock); 1660 } 1661 #endif 1662 1663 INIT_WORK(&ctrl->async_event_work, nvmet_async_event_work); 1664 INIT_LIST_HEAD(&ctrl->async_events); 1665 INIT_RADIX_TREE(&ctrl->p2p_ns_map, GFP_KERNEL); 1666 INIT_WORK(&ctrl->fatal_err_work, nvmet_fatal_error_handler); 1667 INIT_DELAYED_WORK(&ctrl->ka_work, nvmet_keep_alive_timer); 1668 1669 memcpy(ctrl->hostnqn, args->hostnqn, NVMF_NQN_SIZE); 1670 if (args->hostid) 1671 uuid_copy(&ctrl->hostid, args->hostid); 1672 1673 kref_init(&ctrl->ref); 1674 ctrl->subsys = subsys; 1675 ctrl->pi_support = ctrl->port->pi_enable && ctrl->subsys->pi_support; 1676 nvmet_init_cap(ctrl); 1677 WRITE_ONCE(ctrl->aen_enabled, NVMET_AEN_CFG_OPTIONAL); 1678 1679 ctrl->changed_ns_list = kmalloc_array(NVME_MAX_CHANGED_NAMESPACES, 1680 sizeof(__le32), GFP_KERNEL); 1681 if (!ctrl->changed_ns_list) 1682 goto out_free_ctrl; 1683 1684 /* 1685 * Discovery controllers may use some arbitrary high value 1686 * in order to cleanup stale discovery sessions 1687 */ 1688 if (nvmet_is_disc_subsys(ctrl->subsys) && !kato) 1689 kato = NVMET_DISC_KATO_MS; 1690 1691 /* keep-alive timeout in seconds */ 1692 ctrl->kato = DIV_ROUND_UP(kato, 1000); 1693 1694 ctrl->err_counter = 0; 1695 spin_lock_init(&ctrl->error_lock); 1696 1697 down_read(&nvmet_config_sem); 1698 mutex_lock(&subsys->lock); 1699 1700 ctrl->max_qid = subsys->max_qid; 1701 ctrl->tbkas = subsys->tbkas; 1702 1703 ctrl->sqs = kzalloc_objs(struct nvmet_sq *, ctrl->max_qid + 1); 1704 if (!ctrl->sqs) 1705 goto out_free_changed_ns_list; 1706 1707 ctrl->cqs = kzalloc_objs(struct nvmet_cq *, ctrl->max_qid + 1); 1708 if (!ctrl->cqs) 1709 goto out_free_sqs; 1710 1711 ret = ida_alloc_range(&cntlid_ida, 1712 subsys->cntlid_min, subsys->cntlid_max, 1713 GFP_KERNEL); 1714 if (ret < 0) { 1715 args->status = NVME_SC_CONNECT_CTRL_BUSY | NVME_STATUS_DNR; 1716 goto out_free_cqs; 1717 } 1718 ctrl->cntlid = ret; 1719 1720 ret = nvmet_ctrl_init_pr(ctrl); 1721 if (ret) 1722 goto init_pr_fail; 1723 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 1724 nvmet_setup_p2p_ns_map(ctrl, args->p2p_client); 1725 nvmet_debugfs_ctrl_setup(ctrl); 1726 mutex_unlock(&subsys->lock); 1727 up_read(&nvmet_config_sem); 1728 1729 nvmet_start_keep_alive_timer(ctrl); 1730 1731 dhchap_status = nvmet_setup_auth(ctrl, args->sq, false); 1732 if (dhchap_status) { 1733 pr_err("Failed to setup authentication, dhchap status %u\n", 1734 dhchap_status); 1735 nvmet_ctrl_put(ctrl); 1736 if (dhchap_status == NVME_AUTH_DHCHAP_FAILURE_FAILED) 1737 args->status = 1738 NVME_SC_CONNECT_INVALID_HOST | NVME_STATUS_DNR; 1739 else 1740 args->status = NVME_SC_INTERNAL; 1741 return NULL; 1742 } 1743 1744 args->status = NVME_SC_SUCCESS; 1745 1746 pr_info("Created %s controller %d for subsystem %s for NQN %s%s%s%s.\n", 1747 nvmet_is_disc_subsys(ctrl->subsys) ? "discovery" : "nvm", 1748 ctrl->cntlid, ctrl->subsys->subsysnqn, ctrl->hostnqn, 1749 ctrl->pi_support ? " T10-PI is enabled" : "", 1750 nvmet_has_auth(ctrl, args->sq) ? " with DH-HMAC-CHAP" : "", 1751 nvmet_queue_tls_keyid(args->sq) ? ", TLS" : ""); 1752 1753 return ctrl; 1754 1755 init_pr_fail: 1756 ida_free(&cntlid_ida, ctrl->cntlid); 1757 out_free_cqs: 1758 kfree(ctrl->cqs); 1759 out_free_sqs: 1760 kfree(ctrl->sqs); 1761 out_free_changed_ns_list: 1762 mutex_unlock(&subsys->lock); 1763 up_read(&nvmet_config_sem); 1764 kfree(ctrl->changed_ns_list); 1765 out_free_ctrl: 1766 kfree(ctrl); 1767 out_put_subsystem: 1768 nvmet_subsys_put(subsys); 1769 return NULL; 1770 } 1771 EXPORT_SYMBOL_GPL(nvmet_alloc_ctrl); 1772 1773 static void nvmet_ctrl_free(struct kref *ref) 1774 { 1775 struct nvmet_ctrl *ctrl = container_of(ref, struct nvmet_ctrl, ref); 1776 struct nvmet_subsys *subsys = ctrl->subsys; 1777 1778 mutex_lock(&subsys->lock); 1779 nvmet_ctrl_destroy_pr(ctrl); 1780 nvmet_release_p2p_ns_map(ctrl); 1781 list_del(&ctrl->subsys_entry); 1782 mutex_unlock(&subsys->lock); 1783 1784 nvmet_stop_keep_alive_timer(ctrl); 1785 1786 cancel_work_sync(&ctrl->async_event_work); 1787 cancel_work_sync(&ctrl->fatal_err_work); 1788 1789 nvmet_destroy_auth(ctrl); 1790 1791 nvmet_debugfs_ctrl_free(ctrl); 1792 1793 ida_free(&cntlid_ida, ctrl->cntlid); 1794 1795 nvmet_async_events_free(ctrl); 1796 kfree(ctrl->sqs); 1797 kfree(ctrl->cqs); 1798 kfree(ctrl->changed_ns_list); 1799 kfree(ctrl); 1800 1801 nvmet_subsys_put(subsys); 1802 } 1803 1804 void nvmet_ctrl_put(struct nvmet_ctrl *ctrl) 1805 { 1806 kref_put(&ctrl->ref, nvmet_ctrl_free); 1807 } 1808 EXPORT_SYMBOL_GPL(nvmet_ctrl_put); 1809 1810 void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl) 1811 { 1812 mutex_lock(&ctrl->lock); 1813 if (!(ctrl->csts & NVME_CSTS_CFS)) { 1814 ctrl->csts |= NVME_CSTS_CFS; 1815 queue_work(nvmet_wq, &ctrl->fatal_err_work); 1816 } 1817 mutex_unlock(&ctrl->lock); 1818 } 1819 EXPORT_SYMBOL_GPL(nvmet_ctrl_fatal_error); 1820 1821 ssize_t nvmet_ctrl_host_traddr(struct nvmet_ctrl *ctrl, 1822 char *traddr, size_t traddr_len) 1823 { 1824 if (!ctrl->ops->host_traddr) 1825 return -EOPNOTSUPP; 1826 return ctrl->ops->host_traddr(ctrl, traddr, traddr_len); 1827 } 1828 1829 static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port, 1830 const char *subsysnqn) 1831 { 1832 struct nvmet_subsys_link *p; 1833 1834 if (!port) 1835 return NULL; 1836 1837 if (!strcmp(NVME_DISC_SUBSYS_NAME, subsysnqn)) { 1838 if (!kref_get_unless_zero(&nvmet_disc_subsys->ref)) 1839 return NULL; 1840 return nvmet_disc_subsys; 1841 } 1842 1843 down_read(&nvmet_config_sem); 1844 if (!strncmp(nvmet_disc_subsys->subsysnqn, subsysnqn, 1845 NVMF_NQN_SIZE)) { 1846 if (kref_get_unless_zero(&nvmet_disc_subsys->ref)) { 1847 up_read(&nvmet_config_sem); 1848 return nvmet_disc_subsys; 1849 } 1850 } 1851 list_for_each_entry(p, &port->subsystems, entry) { 1852 if (!strncmp(p->subsys->subsysnqn, subsysnqn, 1853 NVMF_NQN_SIZE)) { 1854 if (!kref_get_unless_zero(&p->subsys->ref)) 1855 break; 1856 up_read(&nvmet_config_sem); 1857 return p->subsys; 1858 } 1859 } 1860 up_read(&nvmet_config_sem); 1861 return NULL; 1862 } 1863 1864 struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn, 1865 enum nvme_subsys_type type) 1866 { 1867 struct nvmet_subsys *subsys; 1868 char serial[NVMET_SN_MAX_SIZE / 2]; 1869 int ret; 1870 1871 subsys = kzalloc_obj(*subsys); 1872 if (!subsys) 1873 return ERR_PTR(-ENOMEM); 1874 1875 subsys->ver = NVMET_DEFAULT_VS; 1876 /* generate a random serial number as our controllers are ephemeral: */ 1877 get_random_bytes(&serial, sizeof(serial)); 1878 bin2hex(subsys->serial, &serial, sizeof(serial)); 1879 1880 subsys->model_number = kstrdup(NVMET_DEFAULT_CTRL_MODEL, GFP_KERNEL); 1881 if (!subsys->model_number) { 1882 ret = -ENOMEM; 1883 goto free_subsys; 1884 } 1885 1886 subsys->ieee_oui = 0; 1887 subsys->tbkas = true; 1888 1889 subsys->firmware_rev = kstrndup(UTS_RELEASE, NVMET_FR_MAX_SIZE, GFP_KERNEL); 1890 if (!subsys->firmware_rev) { 1891 ret = -ENOMEM; 1892 goto free_mn; 1893 } 1894 1895 switch (type) { 1896 case NVME_NQN_NVME: 1897 subsys->max_qid = NVMET_NR_QUEUES; 1898 break; 1899 case NVME_NQN_DISC: 1900 case NVME_NQN_CURR: 1901 subsys->max_qid = 0; 1902 break; 1903 default: 1904 pr_err("%s: Unknown Subsystem type - %d\n", __func__, type); 1905 ret = -EINVAL; 1906 goto free_fr; 1907 } 1908 subsys->type = type; 1909 subsys->subsysnqn = kstrndup(subsysnqn, NVMF_NQN_SIZE, 1910 GFP_KERNEL); 1911 if (!subsys->subsysnqn) { 1912 ret = -ENOMEM; 1913 goto free_fr; 1914 } 1915 subsys->cntlid_min = NVME_CNTLID_MIN; 1916 subsys->cntlid_max = NVME_CNTLID_MAX; 1917 kref_init(&subsys->ref); 1918 1919 mutex_init(&subsys->lock); 1920 xa_init(&subsys->namespaces); 1921 INIT_LIST_HEAD(&subsys->ctrls); 1922 INIT_LIST_HEAD(&subsys->hosts); 1923 1924 ret = nvmet_debugfs_subsys_setup(subsys); 1925 if (ret) 1926 goto free_subsysnqn; 1927 1928 return subsys; 1929 1930 free_subsysnqn: 1931 kfree(subsys->subsysnqn); 1932 free_fr: 1933 kfree(subsys->firmware_rev); 1934 free_mn: 1935 kfree(subsys->model_number); 1936 free_subsys: 1937 kfree(subsys); 1938 return ERR_PTR(ret); 1939 } 1940 1941 static void nvmet_subsys_free(struct kref *ref) 1942 { 1943 struct nvmet_subsys *subsys = 1944 container_of(ref, struct nvmet_subsys, ref); 1945 1946 WARN_ON_ONCE(!list_empty(&subsys->ctrls)); 1947 WARN_ON_ONCE(!list_empty(&subsys->hosts)); 1948 WARN_ON_ONCE(!xa_empty(&subsys->namespaces)); 1949 1950 nvmet_debugfs_subsys_free(subsys); 1951 1952 xa_destroy(&subsys->namespaces); 1953 nvmet_passthru_subsys_free(subsys); 1954 1955 kfree(subsys->subsysnqn); 1956 kfree(subsys->model_number); 1957 kfree(subsys->firmware_rev); 1958 kfree(subsys); 1959 } 1960 1961 void nvmet_subsys_del_ctrls(struct nvmet_subsys *subsys) 1962 { 1963 struct nvmet_ctrl *ctrl; 1964 1965 mutex_lock(&subsys->lock); 1966 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 1967 ctrl->ops->delete_ctrl(ctrl); 1968 mutex_unlock(&subsys->lock); 1969 } 1970 1971 void nvmet_subsys_put(struct nvmet_subsys *subsys) 1972 { 1973 kref_put(&subsys->ref, nvmet_subsys_free); 1974 } 1975 1976 static int __init nvmet_init(void) 1977 { 1978 int error = -ENOMEM; 1979 1980 nvmet_ana_group_enabled[NVMET_DEFAULT_ANA_GRPID] = 1; 1981 1982 nvmet_bvec_cache = kmem_cache_create("nvmet-bvec", 1983 NVMET_MAX_MPOOL_BVEC * sizeof(struct bio_vec), 0, 1984 SLAB_HWCACHE_ALIGN, NULL); 1985 if (!nvmet_bvec_cache) 1986 return -ENOMEM; 1987 1988 zbd_wq = alloc_workqueue("nvmet-zbd-wq", WQ_MEM_RECLAIM | WQ_PERCPU, 1989 0); 1990 if (!zbd_wq) 1991 goto out_destroy_bvec_cache; 1992 1993 buffered_io_wq = alloc_workqueue("nvmet-buffered-io-wq", 1994 WQ_MEM_RECLAIM | WQ_PERCPU, 0); 1995 if (!buffered_io_wq) 1996 goto out_free_zbd_work_queue; 1997 1998 nvmet_wq = alloc_workqueue("nvmet-wq", 1999 WQ_MEM_RECLAIM | WQ_UNBOUND | WQ_SYSFS, 0); 2000 if (!nvmet_wq) 2001 goto out_free_buffered_work_queue; 2002 2003 nvmet_aen_wq = alloc_workqueue("nvmet-aen-wq", 2004 WQ_MEM_RECLAIM | WQ_UNBOUND, 0); 2005 if (!nvmet_aen_wq) 2006 goto out_free_nvmet_work_queue; 2007 2008 error = nvmet_init_debugfs(); 2009 if (error) 2010 goto out_free_nvmet_aen_work_queue; 2011 2012 error = nvmet_init_discovery(); 2013 if (error) 2014 goto out_exit_debugfs; 2015 2016 error = nvmet_init_configfs(); 2017 if (error) 2018 goto out_exit_discovery; 2019 2020 return 0; 2021 2022 out_exit_discovery: 2023 nvmet_exit_discovery(); 2024 out_exit_debugfs: 2025 nvmet_exit_debugfs(); 2026 out_free_nvmet_aen_work_queue: 2027 destroy_workqueue(nvmet_aen_wq); 2028 out_free_nvmet_work_queue: 2029 destroy_workqueue(nvmet_wq); 2030 out_free_buffered_work_queue: 2031 destroy_workqueue(buffered_io_wq); 2032 out_free_zbd_work_queue: 2033 destroy_workqueue(zbd_wq); 2034 out_destroy_bvec_cache: 2035 kmem_cache_destroy(nvmet_bvec_cache); 2036 return error; 2037 } 2038 2039 static void __exit nvmet_exit(void) 2040 { 2041 nvmet_exit_configfs(); 2042 nvmet_exit_discovery(); 2043 nvmet_exit_debugfs(); 2044 ida_destroy(&cntlid_ida); 2045 destroy_workqueue(nvmet_aen_wq); 2046 destroy_workqueue(nvmet_wq); 2047 destroy_workqueue(buffered_io_wq); 2048 destroy_workqueue(zbd_wq); 2049 kmem_cache_destroy(nvmet_bvec_cache); 2050 2051 BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_entry) != 1024); 2052 BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_hdr) != 1024); 2053 } 2054 2055 module_init(nvmet_init); 2056 module_exit(nvmet_exit); 2057 2058 MODULE_DESCRIPTION("NVMe target core framework"); 2059 MODULE_LICENSE("GPL v2"); 2060