1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
4 */
5
6 #ifndef _NVMET_H
7 #define _NVMET_H
8
9 #include <linux/dma-mapping.h>
10 #include <linux/types.h>
11 #include <linux/device.h>
12 #include <linux/kref.h>
13 #include <linux/percpu-refcount.h>
14 #include <linux/list.h>
15 #include <linux/mutex.h>
16 #include <linux/uuid.h>
17 #include <linux/nvme.h>
18 #include <linux/configfs.h>
19 #include <linux/rcupdate.h>
20 #include <linux/blkdev.h>
21 #include <linux/radix-tree.h>
22 #include <linux/t10-pi.h>
23 #include <linux/kfifo.h>
24
25 #define NVMET_DEFAULT_VS NVME_VS(2, 1, 0)
26
27 #define NVMET_NS_ENABLED XA_MARK_1
28 #define NVMET_ASYNC_EVENTS 4
29 #define NVMET_ERROR_LOG_SLOTS 128
30 #define NVMET_NO_ERROR_LOC ((u16)-1)
31 #define NVMET_DEFAULT_CTRL_MODEL "Linux"
32 #define NVMET_MN_MAX_SIZE 40
33 #define NVMET_SN_MAX_SIZE 20
34 #define NVMET_FR_MAX_SIZE 8
35 #define NVMET_PR_LOG_QUEUE_SIZE 64
36
37 #define nvmet_for_each_ns(xa, index, entry) \
38 xa_for_each(xa, index, entry)
39
40 #define nvmet_for_each_enabled_ns(xa, index, entry) \
41 xa_for_each_marked(xa, index, entry, NVMET_NS_ENABLED)
42
43 /*
44 * Supported optional AENs:
45 */
46 #define NVMET_AEN_CFG_OPTIONAL \
47 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_ANA_CHANGE)
48 #define NVMET_DISC_AEN_CFG_OPTIONAL \
49 (NVME_AEN_CFG_DISC_CHANGE)
50
51 /*
52 * Plus mandatory SMART AENs (we'll never send them, but allow enabling them):
53 */
54 #define NVMET_AEN_CFG_ALL \
55 (NVME_SMART_CRIT_SPARE | NVME_SMART_CRIT_TEMPERATURE | \
56 NVME_SMART_CRIT_RELIABILITY | NVME_SMART_CRIT_MEDIA | \
57 NVME_SMART_CRIT_VOLATILE_MEMORY | NVMET_AEN_CFG_OPTIONAL)
58
59 /* Helper Macros when NVMe error is NVME_SC_CONNECT_INVALID_PARAM
60 * The 16 bit shift is to set IATTR bit to 1, which means offending
61 * offset starts in the data section of connect()
62 */
63 #define IPO_IATTR_CONNECT_DATA(x) \
64 (cpu_to_le32((1 << 16) | (offsetof(struct nvmf_connect_data, x))))
65 #define IPO_IATTR_CONNECT_SQE(x) \
66 (cpu_to_le32(offsetof(struct nvmf_connect_command, x)))
67
68 struct nvmet_pr_registrant {
69 u64 rkey;
70 uuid_t hostid;
71 enum nvme_pr_type rtype;
72 struct list_head entry;
73 struct rcu_head rcu;
74 };
75
76 struct nvmet_pr {
77 bool enable;
78 unsigned long notify_mask;
79 atomic_t generation;
80 struct nvmet_pr_registrant __rcu *holder;
81 /*
82 * During the execution of the reservation command, mutual
83 * exclusion is required throughout the process. However,
84 * while waiting asynchronously for the 'per controller
85 * percpu_ref' to complete before the 'preempt and abort'
86 * command finishes, a semaphore is needed to ensure mutual
87 * exclusion instead of a mutex.
88 */
89 struct semaphore pr_sem;
90 struct list_head registrant_list;
91 };
92
93 struct nvmet_pr_per_ctrl_ref {
94 struct percpu_ref ref;
95 struct completion free_done;
96 struct completion confirm_done;
97 uuid_t hostid;
98 };
99
100 struct nvmet_ns {
101 struct percpu_ref ref;
102 struct file *bdev_file;
103 struct block_device *bdev;
104 struct file *file;
105 bool readonly;
106 u32 nsid;
107 u32 blksize_shift;
108 loff_t size;
109 u8 nguid[16];
110 uuid_t uuid;
111 u32 anagrpid;
112
113 bool buffered_io;
114 bool enabled;
115 struct nvmet_subsys *subsys;
116 const char *device_path;
117
118 struct config_group device_group;
119 struct config_group group;
120
121 struct completion disable_done;
122 mempool_t *bvec_pool;
123
124 struct pci_dev *p2p_dev;
125 int use_p2pmem;
126 int pi_type;
127 int metadata_size;
128 u8 csi;
129 struct nvmet_pr pr;
130 struct xarray pr_per_ctrl_refs;
131 };
132
to_nvmet_ns(struct config_item * item)133 static inline struct nvmet_ns *to_nvmet_ns(struct config_item *item)
134 {
135 return container_of(to_config_group(item), struct nvmet_ns, group);
136 }
137
nvmet_ns_dev(struct nvmet_ns * ns)138 static inline struct device *nvmet_ns_dev(struct nvmet_ns *ns)
139 {
140 return ns->bdev ? disk_to_dev(ns->bdev->bd_disk) : NULL;
141 }
142
143 struct nvmet_cq {
144 u16 qid;
145 u16 size;
146 };
147
148 struct nvmet_sq {
149 struct nvmet_ctrl *ctrl;
150 struct percpu_ref ref;
151 u16 qid;
152 u16 size;
153 u32 sqhd;
154 bool sqhd_disabled;
155 #ifdef CONFIG_NVME_TARGET_AUTH
156 bool authenticated;
157 struct delayed_work auth_expired_work;
158 u16 dhchap_tid;
159 u8 dhchap_status;
160 u8 dhchap_step;
161 u8 *dhchap_c1;
162 u8 *dhchap_c2;
163 u32 dhchap_s1;
164 u32 dhchap_s2;
165 u8 *dhchap_skey;
166 int dhchap_skey_len;
167 #endif
168 struct completion free_done;
169 struct completion confirm_done;
170 };
171
172 struct nvmet_ana_group {
173 struct config_group group;
174 struct nvmet_port *port;
175 u32 grpid;
176 };
177
to_ana_group(struct config_item * item)178 static inline struct nvmet_ana_group *to_ana_group(struct config_item *item)
179 {
180 return container_of(to_config_group(item), struct nvmet_ana_group,
181 group);
182 }
183
184 /**
185 * struct nvmet_port - Common structure to keep port
186 * information for the target.
187 * @entry: Entry into referrals or transport list.
188 * @disc_addr: Address information is stored in a format defined
189 * for a discovery log page entry.
190 * @group: ConfigFS group for this element's folder.
191 * @priv: Private data for the transport.
192 */
193 struct nvmet_port {
194 struct list_head entry;
195 struct nvmf_disc_rsp_page_entry disc_addr;
196 struct config_group group;
197 struct config_group subsys_group;
198 struct list_head subsystems;
199 struct config_group referrals_group;
200 struct list_head referrals;
201 struct list_head global_entry;
202 struct config_group ana_groups_group;
203 struct nvmet_ana_group ana_default_group;
204 enum nvme_ana_state *ana_state;
205 struct key *keyring;
206 void *priv;
207 bool enabled;
208 int inline_data_size;
209 int max_queue_size;
210 const struct nvmet_fabrics_ops *tr_ops;
211 bool pi_enable;
212 };
213
to_nvmet_port(struct config_item * item)214 static inline struct nvmet_port *to_nvmet_port(struct config_item *item)
215 {
216 return container_of(to_config_group(item), struct nvmet_port,
217 group);
218 }
219
ana_groups_to_port(struct config_item * item)220 static inline struct nvmet_port *ana_groups_to_port(
221 struct config_item *item)
222 {
223 return container_of(to_config_group(item), struct nvmet_port,
224 ana_groups_group);
225 }
226
nvmet_port_disc_addr_treq_secure_channel(struct nvmet_port * port)227 static inline u8 nvmet_port_disc_addr_treq_secure_channel(struct nvmet_port *port)
228 {
229 return (port->disc_addr.treq & NVME_TREQ_SECURE_CHANNEL_MASK);
230 }
231
nvmet_port_secure_channel_required(struct nvmet_port * port)232 static inline bool nvmet_port_secure_channel_required(struct nvmet_port *port)
233 {
234 return nvmet_port_disc_addr_treq_secure_channel(port) == NVMF_TREQ_REQUIRED;
235 }
236
237 struct nvmet_pr_log_mgr {
238 struct mutex lock;
239 u64 lost_count;
240 u64 counter;
241 DECLARE_KFIFO(log_queue, struct nvme_pr_log, NVMET_PR_LOG_QUEUE_SIZE);
242 };
243
244 struct nvmet_ctrl {
245 struct nvmet_subsys *subsys;
246 struct nvmet_sq **sqs;
247
248 void *drvdata;
249
250 bool reset_tbkas;
251
252 struct mutex lock;
253 u64 cap;
254 u32 cc;
255 u32 csts;
256
257 uuid_t hostid;
258 u16 cntlid;
259 u32 kato;
260
261 struct nvmet_port *port;
262
263 u32 aen_enabled;
264 unsigned long aen_masked;
265 struct nvmet_req *async_event_cmds[NVMET_ASYNC_EVENTS];
266 unsigned int nr_async_event_cmds;
267 struct list_head async_events;
268 struct work_struct async_event_work;
269
270 struct list_head subsys_entry;
271 struct kref ref;
272 struct delayed_work ka_work;
273 struct work_struct fatal_err_work;
274
275 const struct nvmet_fabrics_ops *ops;
276
277 __le32 *changed_ns_list;
278 u32 nr_changed_ns;
279
280 char subsysnqn[NVMF_NQN_FIELD_LEN];
281 char hostnqn[NVMF_NQN_FIELD_LEN];
282
283 struct device *p2p_client;
284 struct radix_tree_root p2p_ns_map;
285 #ifdef CONFIG_NVME_TARGET_DEBUGFS
286 struct dentry *debugfs_dir;
287 #endif
288 spinlock_t error_lock;
289 u64 err_counter;
290 struct nvme_error_slot slots[NVMET_ERROR_LOG_SLOTS];
291 bool pi_support;
292 #ifdef CONFIG_NVME_TARGET_AUTH
293 struct nvme_dhchap_key *host_key;
294 struct nvme_dhchap_key *ctrl_key;
295 u8 shash_id;
296 struct crypto_kpp *dh_tfm;
297 u8 dh_gid;
298 u8 *dh_key;
299 size_t dh_keysize;
300 #endif
301 struct nvmet_pr_log_mgr pr_log_mgr;
302 };
303
304 struct nvmet_subsys {
305 enum nvme_subsys_type type;
306
307 struct mutex lock;
308 struct kref ref;
309
310 struct xarray namespaces;
311 unsigned int nr_namespaces;
312 u32 max_nsid;
313 u16 cntlid_min;
314 u16 cntlid_max;
315
316 struct list_head ctrls;
317
318 struct list_head hosts;
319 bool allow_any_host;
320 #ifdef CONFIG_NVME_TARGET_DEBUGFS
321 struct dentry *debugfs_dir;
322 #endif
323 u16 max_qid;
324
325 u64 ver;
326 char serial[NVMET_SN_MAX_SIZE];
327 bool subsys_discovered;
328 char *subsysnqn;
329 bool pi_support;
330
331 struct config_group group;
332
333 struct config_group namespaces_group;
334 struct config_group allowed_hosts_group;
335
336 u16 vendor_id;
337 u16 subsys_vendor_id;
338 char *model_number;
339 u32 ieee_oui;
340 char *firmware_rev;
341
342 #ifdef CONFIG_NVME_TARGET_PASSTHRU
343 struct nvme_ctrl *passthru_ctrl;
344 char *passthru_ctrl_path;
345 struct config_group passthru_group;
346 unsigned int admin_timeout;
347 unsigned int io_timeout;
348 unsigned int clear_ids;
349 #endif /* CONFIG_NVME_TARGET_PASSTHRU */
350
351 #ifdef CONFIG_BLK_DEV_ZONED
352 u8 zasl;
353 #endif /* CONFIG_BLK_DEV_ZONED */
354 };
355
to_subsys(struct config_item * item)356 static inline struct nvmet_subsys *to_subsys(struct config_item *item)
357 {
358 return container_of(to_config_group(item), struct nvmet_subsys, group);
359 }
360
namespaces_to_subsys(struct config_item * item)361 static inline struct nvmet_subsys *namespaces_to_subsys(
362 struct config_item *item)
363 {
364 return container_of(to_config_group(item), struct nvmet_subsys,
365 namespaces_group);
366 }
367
368 struct nvmet_host {
369 struct config_group group;
370 u8 *dhchap_secret;
371 u8 *dhchap_ctrl_secret;
372 u8 dhchap_key_hash;
373 u8 dhchap_ctrl_key_hash;
374 u8 dhchap_hash_id;
375 u8 dhchap_dhgroup_id;
376 };
377
to_host(struct config_item * item)378 static inline struct nvmet_host *to_host(struct config_item *item)
379 {
380 return container_of(to_config_group(item), struct nvmet_host, group);
381 }
382
nvmet_host_name(struct nvmet_host * host)383 static inline char *nvmet_host_name(struct nvmet_host *host)
384 {
385 return config_item_name(&host->group.cg_item);
386 }
387
388 struct nvmet_host_link {
389 struct list_head entry;
390 struct nvmet_host *host;
391 };
392
393 struct nvmet_subsys_link {
394 struct list_head entry;
395 struct nvmet_subsys *subsys;
396 };
397
398 struct nvmet_req;
399 struct nvmet_fabrics_ops {
400 struct module *owner;
401 unsigned int type;
402 unsigned int msdbd;
403 unsigned int flags;
404 #define NVMF_KEYED_SGLS (1 << 0)
405 #define NVMF_METADATA_SUPPORTED (1 << 1)
406 void (*queue_response)(struct nvmet_req *req);
407 int (*add_port)(struct nvmet_port *port);
408 void (*remove_port)(struct nvmet_port *port);
409 void (*delete_ctrl)(struct nvmet_ctrl *ctrl);
410 void (*disc_traddr)(struct nvmet_req *req,
411 struct nvmet_port *port, char *traddr);
412 ssize_t (*host_traddr)(struct nvmet_ctrl *ctrl,
413 char *traddr, size_t traddr_len);
414 u16 (*install_queue)(struct nvmet_sq *nvme_sq);
415 void (*discovery_chg)(struct nvmet_port *port);
416 u8 (*get_mdts)(const struct nvmet_ctrl *ctrl);
417 u16 (*get_max_queue_size)(const struct nvmet_ctrl *ctrl);
418
419 /* Operations mandatory for PCI target controllers */
420 u16 (*create_sq)(struct nvmet_ctrl *ctrl, u16 sqid, u16 flags,
421 u16 qsize, u64 prp1);
422 u16 (*delete_sq)(struct nvmet_ctrl *ctrl, u16 sqid);
423 u16 (*create_cq)(struct nvmet_ctrl *ctrl, u16 cqid, u16 flags,
424 u16 qsize, u64 prp1, u16 irq_vector);
425 u16 (*delete_cq)(struct nvmet_ctrl *ctrl, u16 cqid);
426 u16 (*set_feature)(const struct nvmet_ctrl *ctrl, u8 feat,
427 void *feat_data);
428 u16 (*get_feature)(const struct nvmet_ctrl *ctrl, u8 feat,
429 void *feat_data);
430 };
431
432 #define NVMET_MAX_INLINE_BIOVEC 8
433 #define NVMET_MAX_INLINE_DATA_LEN NVMET_MAX_INLINE_BIOVEC * PAGE_SIZE
434
435 struct nvmet_req {
436 struct nvme_command *cmd;
437 struct nvme_completion *cqe;
438 struct nvmet_sq *sq;
439 struct nvmet_cq *cq;
440 struct nvmet_ns *ns;
441 struct scatterlist *sg;
442 struct scatterlist *metadata_sg;
443 struct bio_vec inline_bvec[NVMET_MAX_INLINE_BIOVEC];
444 union {
445 struct {
446 struct bio inline_bio;
447 } b;
448 struct {
449 bool mpool_alloc;
450 struct kiocb iocb;
451 struct bio_vec *bvec;
452 struct work_struct work;
453 } f;
454 struct {
455 struct bio inline_bio;
456 struct request *rq;
457 struct work_struct work;
458 bool use_workqueue;
459 } p;
460 #ifdef CONFIG_BLK_DEV_ZONED
461 struct {
462 struct bio inline_bio;
463 struct work_struct zmgmt_work;
464 } z;
465 #endif /* CONFIG_BLK_DEV_ZONED */
466 struct {
467 struct work_struct abort_work;
468 } r;
469 };
470 int sg_cnt;
471 int metadata_sg_cnt;
472 /* data length as parsed from the SGL descriptor: */
473 size_t transfer_len;
474 size_t metadata_len;
475
476 struct nvmet_port *port;
477
478 void (*execute)(struct nvmet_req *req);
479 const struct nvmet_fabrics_ops *ops;
480
481 struct pci_dev *p2p_dev;
482 struct device *p2p_client;
483 u16 error_loc;
484 u64 error_slba;
485 struct nvmet_pr_per_ctrl_ref *pc_ref;
486 };
487
488 #define NVMET_MAX_MPOOL_BVEC 16
489 extern struct kmem_cache *nvmet_bvec_cache;
490 extern struct workqueue_struct *buffered_io_wq;
491 extern struct workqueue_struct *zbd_wq;
492 extern struct workqueue_struct *nvmet_wq;
493
nvmet_set_result(struct nvmet_req * req,u32 result)494 static inline void nvmet_set_result(struct nvmet_req *req, u32 result)
495 {
496 req->cqe->result.u32 = cpu_to_le32(result);
497 }
498
499 /*
500 * NVMe command writes actually are DMA reads for us on the target side.
501 */
502 static inline enum dma_data_direction
nvmet_data_dir(struct nvmet_req * req)503 nvmet_data_dir(struct nvmet_req *req)
504 {
505 return nvme_is_write(req->cmd) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
506 }
507
508 struct nvmet_async_event {
509 struct list_head entry;
510 u8 event_type;
511 u8 event_info;
512 u8 log_page;
513 };
514
nvmet_clear_aen_bit(struct nvmet_req * req,u32 bn)515 static inline void nvmet_clear_aen_bit(struct nvmet_req *req, u32 bn)
516 {
517 int rae = le32_to_cpu(req->cmd->common.cdw10) & 1 << 15;
518
519 if (!rae)
520 clear_bit(bn, &req->sq->ctrl->aen_masked);
521 }
522
nvmet_aen_bit_disabled(struct nvmet_ctrl * ctrl,u32 bn)523 static inline bool nvmet_aen_bit_disabled(struct nvmet_ctrl *ctrl, u32 bn)
524 {
525 if (!(READ_ONCE(ctrl->aen_enabled) & (1 << bn)))
526 return true;
527 return test_and_set_bit(bn, &ctrl->aen_masked);
528 }
529
530 void nvmet_get_feat_kato(struct nvmet_req *req);
531 void nvmet_get_feat_async_event(struct nvmet_req *req);
532 u16 nvmet_set_feat_kato(struct nvmet_req *req);
533 u16 nvmet_set_feat_async_event(struct nvmet_req *req, u32 mask);
534 void nvmet_execute_async_event(struct nvmet_req *req);
535 void nvmet_start_keep_alive_timer(struct nvmet_ctrl *ctrl);
536 void nvmet_stop_keep_alive_timer(struct nvmet_ctrl *ctrl);
537
538 u16 nvmet_parse_connect_cmd(struct nvmet_req *req);
539 u32 nvmet_connect_cmd_data_len(struct nvmet_req *req);
540 void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id);
541 u16 nvmet_bdev_parse_io_cmd(struct nvmet_req *req);
542 u16 nvmet_file_parse_io_cmd(struct nvmet_req *req);
543 u16 nvmet_bdev_zns_parse_io_cmd(struct nvmet_req *req);
544 u32 nvmet_admin_cmd_data_len(struct nvmet_req *req);
545 u16 nvmet_parse_admin_cmd(struct nvmet_req *req);
546 u32 nvmet_discovery_cmd_data_len(struct nvmet_req *req);
547 u16 nvmet_parse_discovery_cmd(struct nvmet_req *req);
548 u16 nvmet_parse_fabrics_admin_cmd(struct nvmet_req *req);
549 u32 nvmet_fabrics_admin_cmd_data_len(struct nvmet_req *req);
550 u16 nvmet_parse_fabrics_io_cmd(struct nvmet_req *req);
551 u32 nvmet_fabrics_io_cmd_data_len(struct nvmet_req *req);
552
553 bool nvmet_req_init(struct nvmet_req *req, struct nvmet_cq *cq,
554 struct nvmet_sq *sq, const struct nvmet_fabrics_ops *ops);
555 void nvmet_req_uninit(struct nvmet_req *req);
556 size_t nvmet_req_transfer_len(struct nvmet_req *req);
557 bool nvmet_check_transfer_len(struct nvmet_req *req, size_t len);
558 bool nvmet_check_data_len_lte(struct nvmet_req *req, size_t data_len);
559 void nvmet_req_complete(struct nvmet_req *req, u16 status);
560 int nvmet_req_alloc_sgls(struct nvmet_req *req);
561 void nvmet_req_free_sgls(struct nvmet_req *req);
562
563 void nvmet_execute_set_features(struct nvmet_req *req);
564 void nvmet_execute_get_features(struct nvmet_req *req);
565 void nvmet_execute_keep_alive(struct nvmet_req *req);
566
567 u16 nvmet_check_cqid(struct nvmet_ctrl *ctrl, u16 cqid);
568 void nvmet_cq_setup(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, u16 qid,
569 u16 size);
570 u16 nvmet_cq_create(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, u16 qid,
571 u16 size);
572 u16 nvmet_check_sqid(struct nvmet_ctrl *ctrl, u16 sqid, bool create);
573 void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, u16 qid,
574 u16 size);
575 u16 nvmet_sq_create(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, u16 qid,
576 u16 size);
577 void nvmet_sq_destroy(struct nvmet_sq *sq);
578 int nvmet_sq_init(struct nvmet_sq *sq);
579
580 void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl);
581
582 void nvmet_update_cc(struct nvmet_ctrl *ctrl, u32 new);
583
584 struct nvmet_alloc_ctrl_args {
585 struct nvmet_port *port;
586 char *subsysnqn;
587 char *hostnqn;
588 uuid_t *hostid;
589 const struct nvmet_fabrics_ops *ops;
590 struct device *p2p_client;
591 u32 kato;
592 __le32 result;
593 u16 error_loc;
594 u16 status;
595 };
596
597 struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args);
598 struct nvmet_ctrl *nvmet_ctrl_find_get(const char *subsysnqn,
599 const char *hostnqn, u16 cntlid,
600 struct nvmet_req *req);
601 void nvmet_ctrl_put(struct nvmet_ctrl *ctrl);
602 u16 nvmet_check_ctrl_status(struct nvmet_req *req);
603 ssize_t nvmet_ctrl_host_traddr(struct nvmet_ctrl *ctrl,
604 char *traddr, size_t traddr_len);
605
606 struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn,
607 enum nvme_subsys_type type);
608 void nvmet_subsys_put(struct nvmet_subsys *subsys);
609 void nvmet_subsys_del_ctrls(struct nvmet_subsys *subsys);
610
611 u16 nvmet_req_find_ns(struct nvmet_req *req);
612 void nvmet_put_namespace(struct nvmet_ns *ns);
613 int nvmet_ns_enable(struct nvmet_ns *ns);
614 void nvmet_ns_disable(struct nvmet_ns *ns);
615 struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid);
616 void nvmet_ns_free(struct nvmet_ns *ns);
617
618 void nvmet_send_ana_event(struct nvmet_subsys *subsys,
619 struct nvmet_port *port);
620 void nvmet_port_send_ana_event(struct nvmet_port *port);
621
622 int nvmet_register_transport(const struct nvmet_fabrics_ops *ops);
623 void nvmet_unregister_transport(const struct nvmet_fabrics_ops *ops);
624
625 void nvmet_port_del_ctrls(struct nvmet_port *port,
626 struct nvmet_subsys *subsys);
627
628 int nvmet_enable_port(struct nvmet_port *port);
629 void nvmet_disable_port(struct nvmet_port *port);
630
631 void nvmet_referral_enable(struct nvmet_port *parent, struct nvmet_port *port);
632 void nvmet_referral_disable(struct nvmet_port *parent, struct nvmet_port *port);
633
634 u16 nvmet_copy_to_sgl(struct nvmet_req *req, off_t off, const void *buf,
635 size_t len);
636 u16 nvmet_copy_from_sgl(struct nvmet_req *req, off_t off, void *buf,
637 size_t len);
638 u16 nvmet_zero_sgl(struct nvmet_req *req, off_t off, size_t len);
639
640 u32 nvmet_get_log_page_len(struct nvme_command *cmd);
641 u64 nvmet_get_log_page_offset(struct nvme_command *cmd);
642
643 extern struct list_head *nvmet_ports;
644 void nvmet_port_disc_changed(struct nvmet_port *port,
645 struct nvmet_subsys *subsys);
646 void nvmet_subsys_disc_changed(struct nvmet_subsys *subsys,
647 struct nvmet_host *host);
648 void nvmet_add_async_event(struct nvmet_ctrl *ctrl, u8 event_type,
649 u8 event_info, u8 log_page);
650
651 #define NVMET_MIN_QUEUE_SIZE 16
652 #define NVMET_MAX_QUEUE_SIZE 1024
653 #define NVMET_NR_QUEUES 128
654 #define NVMET_MAX_CMD(ctrl) (NVME_CAP_MQES(ctrl->cap) + 1)
655
656 /*
657 * Nice round number that makes a list of nsids fit into a page.
658 * Should become tunable at some point in the future.
659 */
660 #define NVMET_MAX_NAMESPACES 1024
661
662 /*
663 * 0 is not a valid ANA group ID, so we start numbering at 1.
664 *
665 * ANA Group 1 exists without manual intervention, has namespaces assigned to it
666 * by default, and is available in an optimized state through all ports.
667 */
668 #define NVMET_MAX_ANAGRPS 128
669 #define NVMET_DEFAULT_ANA_GRPID 1
670
671 #define NVMET_KAS 10
672 #define NVMET_DISC_KATO_MS 120000
673
674 int __init nvmet_init_configfs(void);
675 void __exit nvmet_exit_configfs(void);
676
677 int __init nvmet_init_discovery(void);
678 void nvmet_exit_discovery(void);
679
680 extern struct nvmet_subsys *nvmet_disc_subsys;
681 extern struct rw_semaphore nvmet_config_sem;
682
683 extern u32 nvmet_ana_group_enabled[NVMET_MAX_ANAGRPS + 1];
684 extern u64 nvmet_ana_chgcnt;
685 extern struct rw_semaphore nvmet_ana_sem;
686
687 bool nvmet_host_allowed(struct nvmet_subsys *subsys, const char *hostnqn);
688
689 int nvmet_bdev_ns_enable(struct nvmet_ns *ns);
690 int nvmet_file_ns_enable(struct nvmet_ns *ns);
691 void nvmet_bdev_ns_disable(struct nvmet_ns *ns);
692 void nvmet_file_ns_disable(struct nvmet_ns *ns);
693 u16 nvmet_bdev_flush(struct nvmet_req *req);
694 u16 nvmet_file_flush(struct nvmet_req *req);
695 void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid);
696 void nvmet_bdev_ns_revalidate(struct nvmet_ns *ns);
697 void nvmet_file_ns_revalidate(struct nvmet_ns *ns);
698 bool nvmet_ns_revalidate(struct nvmet_ns *ns);
699 u16 blk_to_nvme_status(struct nvmet_req *req, blk_status_t blk_sts);
700
701 bool nvmet_bdev_zns_enable(struct nvmet_ns *ns);
702 void nvmet_execute_identify_ctrl_zns(struct nvmet_req *req);
703 void nvmet_execute_identify_ns_zns(struct nvmet_req *req);
704 void nvmet_bdev_execute_zone_mgmt_recv(struct nvmet_req *req);
705 void nvmet_bdev_execute_zone_mgmt_send(struct nvmet_req *req);
706 void nvmet_bdev_execute_zone_append(struct nvmet_req *req);
707
nvmet_rw_data_len(struct nvmet_req * req)708 static inline u32 nvmet_rw_data_len(struct nvmet_req *req)
709 {
710 return ((u32)le16_to_cpu(req->cmd->rw.length) + 1) <<
711 req->ns->blksize_shift;
712 }
713
nvmet_rw_metadata_len(struct nvmet_req * req)714 static inline u32 nvmet_rw_metadata_len(struct nvmet_req *req)
715 {
716 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY))
717 return 0;
718 return ((u32)le16_to_cpu(req->cmd->rw.length) + 1) *
719 req->ns->metadata_size;
720 }
721
nvmet_dsm_len(struct nvmet_req * req)722 static inline u32 nvmet_dsm_len(struct nvmet_req *req)
723 {
724 return (le32_to_cpu(req->cmd->dsm.nr) + 1) *
725 sizeof(struct nvme_dsm_range);
726 }
727
nvmet_req_subsys(struct nvmet_req * req)728 static inline struct nvmet_subsys *nvmet_req_subsys(struct nvmet_req *req)
729 {
730 return req->sq->ctrl->subsys;
731 }
732
nvmet_is_disc_subsys(struct nvmet_subsys * subsys)733 static inline bool nvmet_is_disc_subsys(struct nvmet_subsys *subsys)
734 {
735 return subsys->type != NVME_NQN_NVME;
736 }
737
nvmet_is_pci_ctrl(struct nvmet_ctrl * ctrl)738 static inline bool nvmet_is_pci_ctrl(struct nvmet_ctrl *ctrl)
739 {
740 return ctrl->port->disc_addr.trtype == NVMF_TRTYPE_PCI;
741 }
742
743 #ifdef CONFIG_NVME_TARGET_PASSTHRU
744 void nvmet_passthru_subsys_free(struct nvmet_subsys *subsys);
745 int nvmet_passthru_ctrl_enable(struct nvmet_subsys *subsys);
746 void nvmet_passthru_ctrl_disable(struct nvmet_subsys *subsys);
747 u16 nvmet_parse_passthru_admin_cmd(struct nvmet_req *req);
748 u16 nvmet_parse_passthru_io_cmd(struct nvmet_req *req);
nvmet_is_passthru_subsys(struct nvmet_subsys * subsys)749 static inline bool nvmet_is_passthru_subsys(struct nvmet_subsys *subsys)
750 {
751 return subsys->passthru_ctrl;
752 }
753 #else /* CONFIG_NVME_TARGET_PASSTHRU */
nvmet_passthru_subsys_free(struct nvmet_subsys * subsys)754 static inline void nvmet_passthru_subsys_free(struct nvmet_subsys *subsys)
755 {
756 }
nvmet_passthru_ctrl_disable(struct nvmet_subsys * subsys)757 static inline void nvmet_passthru_ctrl_disable(struct nvmet_subsys *subsys)
758 {
759 }
nvmet_parse_passthru_admin_cmd(struct nvmet_req * req)760 static inline u16 nvmet_parse_passthru_admin_cmd(struct nvmet_req *req)
761 {
762 return 0;
763 }
nvmet_parse_passthru_io_cmd(struct nvmet_req * req)764 static inline u16 nvmet_parse_passthru_io_cmd(struct nvmet_req *req)
765 {
766 return 0;
767 }
nvmet_is_passthru_subsys(struct nvmet_subsys * subsys)768 static inline bool nvmet_is_passthru_subsys(struct nvmet_subsys *subsys)
769 {
770 return NULL;
771 }
772 #endif /* CONFIG_NVME_TARGET_PASSTHRU */
773
nvmet_is_passthru_req(struct nvmet_req * req)774 static inline bool nvmet_is_passthru_req(struct nvmet_req *req)
775 {
776 return nvmet_is_passthru_subsys(nvmet_req_subsys(req));
777 }
778
779 void nvmet_passthrough_override_cap(struct nvmet_ctrl *ctrl);
780
781 u16 errno_to_nvme_status(struct nvmet_req *req, int errno);
782 u16 nvmet_report_invalid_opcode(struct nvmet_req *req);
783
nvmet_cc_en(u32 cc)784 static inline bool nvmet_cc_en(u32 cc)
785 {
786 return (cc & NVME_CC_ENABLE) >> NVME_CC_EN_SHIFT;
787 }
788
nvmet_cc_css(u32 cc)789 static inline u8 nvmet_cc_css(u32 cc)
790 {
791 return (cc & NVME_CC_CSS_MASK) >> NVME_CC_CSS_SHIFT;
792 }
793
nvmet_cc_mps(u32 cc)794 static inline u8 nvmet_cc_mps(u32 cc)
795 {
796 return (cc & NVME_CC_MPS_MASK) >> NVME_CC_MPS_SHIFT;
797 }
798
nvmet_cc_ams(u32 cc)799 static inline u8 nvmet_cc_ams(u32 cc)
800 {
801 return (cc & NVME_CC_AMS_MASK) >> NVME_CC_AMS_SHIFT;
802 }
803
nvmet_cc_shn(u32 cc)804 static inline u8 nvmet_cc_shn(u32 cc)
805 {
806 return (cc & NVME_CC_SHN_MASK) >> NVME_CC_SHN_SHIFT;
807 }
808
nvmet_cc_iosqes(u32 cc)809 static inline u8 nvmet_cc_iosqes(u32 cc)
810 {
811 return (cc & NVME_CC_IOSQES_MASK) >> NVME_CC_IOSQES_SHIFT;
812 }
813
nvmet_cc_iocqes(u32 cc)814 static inline u8 nvmet_cc_iocqes(u32 cc)
815 {
816 return (cc & NVME_CC_IOCQES_MASK) >> NVME_CC_IOCQES_SHIFT;
817 }
818
819 /* Convert a 32-bit number to a 16-bit 0's based number */
to0based(u32 a)820 static inline __le16 to0based(u32 a)
821 {
822 return cpu_to_le16(max(1U, min(1U << 16, a)) - 1);
823 }
824
nvmet_ns_has_pi(struct nvmet_ns * ns)825 static inline bool nvmet_ns_has_pi(struct nvmet_ns *ns)
826 {
827 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY))
828 return false;
829 return ns->pi_type && ns->metadata_size == sizeof(struct t10_pi_tuple);
830 }
831
nvmet_sect_to_lba(struct nvmet_ns * ns,sector_t sect)832 static inline __le64 nvmet_sect_to_lba(struct nvmet_ns *ns, sector_t sect)
833 {
834 return cpu_to_le64(sect >> (ns->blksize_shift - SECTOR_SHIFT));
835 }
836
nvmet_lba_to_sect(struct nvmet_ns * ns,__le64 lba)837 static inline sector_t nvmet_lba_to_sect(struct nvmet_ns *ns, __le64 lba)
838 {
839 return le64_to_cpu(lba) << (ns->blksize_shift - SECTOR_SHIFT);
840 }
841
nvmet_use_inline_bvec(struct nvmet_req * req)842 static inline bool nvmet_use_inline_bvec(struct nvmet_req *req)
843 {
844 return req->transfer_len <= NVMET_MAX_INLINE_DATA_LEN &&
845 req->sg_cnt <= NVMET_MAX_INLINE_BIOVEC;
846 }
847
nvmet_req_bio_put(struct nvmet_req * req,struct bio * bio)848 static inline void nvmet_req_bio_put(struct nvmet_req *req, struct bio *bio)
849 {
850 if (bio != &req->b.inline_bio)
851 bio_put(bio);
852 }
853
854 #ifdef CONFIG_NVME_TARGET_AUTH
855 u32 nvmet_auth_send_data_len(struct nvmet_req *req);
856 void nvmet_execute_auth_send(struct nvmet_req *req);
857 u32 nvmet_auth_receive_data_len(struct nvmet_req *req);
858 void nvmet_execute_auth_receive(struct nvmet_req *req);
859 int nvmet_auth_set_key(struct nvmet_host *host, const char *secret,
860 bool set_ctrl);
861 int nvmet_auth_set_host_hash(struct nvmet_host *host, const char *hash);
862 u8 nvmet_setup_auth(struct nvmet_ctrl *ctrl);
863 void nvmet_auth_sq_init(struct nvmet_sq *sq);
864 void nvmet_destroy_auth(struct nvmet_ctrl *ctrl);
865 void nvmet_auth_sq_free(struct nvmet_sq *sq);
866 int nvmet_setup_dhgroup(struct nvmet_ctrl *ctrl, u8 dhgroup_id);
867 bool nvmet_check_auth_status(struct nvmet_req *req);
868 int nvmet_auth_host_hash(struct nvmet_req *req, u8 *response,
869 unsigned int hash_len);
870 int nvmet_auth_ctrl_hash(struct nvmet_req *req, u8 *response,
871 unsigned int hash_len);
nvmet_has_auth(struct nvmet_ctrl * ctrl)872 static inline bool nvmet_has_auth(struct nvmet_ctrl *ctrl)
873 {
874 return ctrl->host_key != NULL;
875 }
876 int nvmet_auth_ctrl_exponential(struct nvmet_req *req,
877 u8 *buf, int buf_size);
878 int nvmet_auth_ctrl_sesskey(struct nvmet_req *req,
879 u8 *buf, int buf_size);
880 #else
nvmet_setup_auth(struct nvmet_ctrl * ctrl)881 static inline u8 nvmet_setup_auth(struct nvmet_ctrl *ctrl)
882 {
883 return 0;
884 }
nvmet_auth_sq_init(struct nvmet_sq * sq)885 static inline void nvmet_auth_sq_init(struct nvmet_sq *sq)
886 {
887 }
nvmet_destroy_auth(struct nvmet_ctrl * ctrl)888 static inline void nvmet_destroy_auth(struct nvmet_ctrl *ctrl) {};
nvmet_auth_sq_free(struct nvmet_sq * sq)889 static inline void nvmet_auth_sq_free(struct nvmet_sq *sq) {};
nvmet_check_auth_status(struct nvmet_req * req)890 static inline bool nvmet_check_auth_status(struct nvmet_req *req)
891 {
892 return true;
893 }
nvmet_has_auth(struct nvmet_ctrl * ctrl)894 static inline bool nvmet_has_auth(struct nvmet_ctrl *ctrl)
895 {
896 return false;
897 }
nvmet_dhchap_dhgroup_name(u8 dhgid)898 static inline const char *nvmet_dhchap_dhgroup_name(u8 dhgid) { return NULL; }
899 #endif
900
901 int nvmet_pr_init_ns(struct nvmet_ns *ns);
902 u16 nvmet_parse_pr_cmd(struct nvmet_req *req);
903 u16 nvmet_pr_check_cmd_access(struct nvmet_req *req);
904 int nvmet_ctrl_init_pr(struct nvmet_ctrl *ctrl);
905 void nvmet_ctrl_destroy_pr(struct nvmet_ctrl *ctrl);
906 void nvmet_pr_exit_ns(struct nvmet_ns *ns);
907 void nvmet_execute_get_log_page_resv(struct nvmet_req *req);
908 u16 nvmet_set_feat_resv_notif_mask(struct nvmet_req *req, u32 mask);
909 u16 nvmet_get_feat_resv_notif_mask(struct nvmet_req *req);
910 u16 nvmet_pr_get_ns_pc_ref(struct nvmet_req *req);
nvmet_pr_put_ns_pc_ref(struct nvmet_pr_per_ctrl_ref * pc_ref)911 static inline void nvmet_pr_put_ns_pc_ref(struct nvmet_pr_per_ctrl_ref *pc_ref)
912 {
913 percpu_ref_put(&pc_ref->ref);
914 }
915
916 /*
917 * Data for the get_feature() and set_feature() operations of PCI target
918 * controllers.
919 */
920 struct nvmet_feat_irq_coalesce {
921 u8 thr;
922 u8 time;
923 };
924
925 struct nvmet_feat_irq_config {
926 u16 iv;
927 bool cd;
928 };
929
930 struct nvmet_feat_arbitration {
931 u8 hpw;
932 u8 mpw;
933 u8 lpw;
934 u8 ab;
935 };
936
937 #endif /* _NVMET_H */
938