1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 #include <linux/ratelimit_types.h> 20 21 #include <trace/events/block.h> 22 23 extern const struct pr_ops nvme_pr_ops; 24 25 extern unsigned int nvme_io_timeout; 26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 27 28 extern unsigned int admin_timeout; 29 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 30 31 #define NVME_DEFAULT_KATO 5 32 33 #ifdef CONFIG_ARCH_NO_SG_CHAIN 34 #define NVME_INLINE_SG_CNT 0 35 #define NVME_INLINE_METADATA_SG_CNT 0 36 #else 37 #define NVME_INLINE_SG_CNT 2 38 #define NVME_INLINE_METADATA_SG_CNT 1 39 #endif 40 41 /* 42 * Default to a 4K page size, with the intention to update this 43 * path in the future to accommodate architectures with differing 44 * kernel and IO page sizes. 45 */ 46 #define NVME_CTRL_PAGE_SHIFT 12 47 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 48 49 extern struct workqueue_struct *nvme_wq; 50 extern struct workqueue_struct *nvme_reset_wq; 51 extern struct workqueue_struct *nvme_delete_wq; 52 extern struct mutex nvme_subsystems_lock; 53 54 /* 55 * List of workarounds for devices that required behavior not specified in 56 * the standard. 57 */ 58 enum nvme_quirks { 59 /* 60 * Prefers I/O aligned to a stripe size specified in a vendor 61 * specific Identify field. 62 */ 63 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 64 65 /* 66 * The controller doesn't handle Identify value others than 0 or 1 67 * correctly. 68 */ 69 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 70 71 /* 72 * The controller deterministically returns 0's on reads to 73 * logical blocks that deallocate was called on. 74 */ 75 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 76 77 /* 78 * The controller needs a delay before starts checking the device 79 * readiness, which is done by reading the NVME_CSTS_RDY bit. 80 */ 81 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 82 83 /* 84 * APST should not be used. 85 */ 86 NVME_QUIRK_NO_APST = (1 << 4), 87 88 /* 89 * The deepest sleep state should not be used. 90 */ 91 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 92 93 /* 94 * Problems seen with concurrent commands 95 */ 96 NVME_QUIRK_QDEPTH_ONE = (1 << 6), 97 98 /* 99 * Set MEDIUM priority on SQ creation 100 */ 101 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 102 103 /* 104 * Ignore device provided subnqn. 105 */ 106 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 107 108 /* 109 * Broken Write Zeroes. 110 */ 111 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 112 113 /* 114 * Force simple suspend/resume path. 115 */ 116 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 117 118 /* 119 * Use only one interrupt vector for all queues 120 */ 121 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 122 123 /* 124 * Use non-standard 128 bytes SQEs. 125 */ 126 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 127 128 /* 129 * Prevent tag overlap between queues 130 */ 131 NVME_QUIRK_SHARED_TAGS = (1 << 13), 132 133 /* 134 * Don't change the value of the temperature threshold feature 135 */ 136 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 137 138 /* 139 * The controller doesn't handle the Identify Namespace 140 * Identification Descriptor list subcommand despite claiming 141 * NVMe 1.3 compliance. 142 */ 143 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 144 145 /* 146 * The controller does not properly handle DMA addresses over 147 * 48 bits. 148 */ 149 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 150 151 /* 152 * The controller requires the command_id value be limited, so skip 153 * encoding the generation sequence number. 154 */ 155 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 156 157 /* 158 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 159 */ 160 NVME_QUIRK_BOGUS_NID = (1 << 18), 161 162 /* 163 * No temperature thresholds for channels other than 0 (Composite). 164 */ 165 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 166 167 /* 168 * Disables simple suspend/resume path. 169 */ 170 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 171 172 /* 173 * MSI (but not MSI-X) interrupts are broken and never fire. 174 */ 175 NVME_QUIRK_BROKEN_MSI = (1 << 21), 176 177 /* 178 * Align dma pool segment size to 512 bytes 179 */ 180 NVME_QUIRK_DMAPOOL_ALIGN_512 = (1 << 22), 181 182 /* 183 * Admin queue DMA buffers must be page aligned 184 */ 185 NVME_QUIRK_ADMIN_PAGE_ALIGN = (1 << 23), 186 }; 187 188 static inline char *nvme_quirk_name(enum nvme_quirks q) 189 { 190 switch (q) { 191 case NVME_QUIRK_STRIPE_SIZE: 192 return "stripe_size"; 193 case NVME_QUIRK_IDENTIFY_CNS: 194 return "identify_cns"; 195 case NVME_QUIRK_DEALLOCATE_ZEROES: 196 return "deallocate_zeroes"; 197 case NVME_QUIRK_DELAY_BEFORE_CHK_RDY: 198 return "delay_before_chk_rdy"; 199 case NVME_QUIRK_NO_APST: 200 return "no_apst"; 201 case NVME_QUIRK_NO_DEEPEST_PS: 202 return "no_deepest_ps"; 203 case NVME_QUIRK_QDEPTH_ONE: 204 return "qdepth_one"; 205 case NVME_QUIRK_MEDIUM_PRIO_SQ: 206 return "medium_prio_sq"; 207 case NVME_QUIRK_IGNORE_DEV_SUBNQN: 208 return "ignore_dev_subnqn"; 209 case NVME_QUIRK_DISABLE_WRITE_ZEROES: 210 return "disable_write_zeroes"; 211 case NVME_QUIRK_SIMPLE_SUSPEND: 212 return "simple_suspend"; 213 case NVME_QUIRK_SINGLE_VECTOR: 214 return "single_vector"; 215 case NVME_QUIRK_128_BYTES_SQES: 216 return "128_bytes_sqes"; 217 case NVME_QUIRK_SHARED_TAGS: 218 return "shared_tags"; 219 case NVME_QUIRK_NO_TEMP_THRESH_CHANGE: 220 return "no_temp_thresh_change"; 221 case NVME_QUIRK_NO_NS_DESC_LIST: 222 return "no_ns_desc_list"; 223 case NVME_QUIRK_DMA_ADDRESS_BITS_48: 224 return "dma_address_bits_48"; 225 case NVME_QUIRK_SKIP_CID_GEN: 226 return "skip_cid_gen"; 227 case NVME_QUIRK_BOGUS_NID: 228 return "bogus_nid"; 229 case NVME_QUIRK_NO_SECONDARY_TEMP_THRESH: 230 return "no_secondary_temp_thresh"; 231 case NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND: 232 return "force_no_simple_suspend"; 233 case NVME_QUIRK_BROKEN_MSI: 234 return "broken_msi"; 235 case NVME_QUIRK_DMAPOOL_ALIGN_512: 236 return "dmapool_align_512"; 237 case NVME_QUIRK_ADMIN_PAGE_ALIGN: 238 return "admin_page_align"; 239 } 240 241 return "unknown"; 242 } 243 244 /* 245 * Common request structure for NVMe passthrough. All drivers must have 246 * this structure as the first member of their request-private data. 247 */ 248 struct nvme_request { 249 struct nvme_command *cmd; 250 union nvme_result result; 251 u8 genctr; 252 u8 retries; 253 u8 flags; 254 u16 status; 255 #ifdef CONFIG_NVME_MULTIPATH 256 unsigned long start_time; 257 #endif 258 struct nvme_ctrl *ctrl; 259 }; 260 261 /* 262 * Mark a bio as coming in through the mpath node. 263 */ 264 #define REQ_NVME_MPATH REQ_DRV 265 266 enum { 267 NVME_REQ_CANCELLED = (1 << 0), 268 NVME_REQ_USERCMD = (1 << 1), 269 NVME_MPATH_IO_STATS = (1 << 2), 270 NVME_MPATH_CNT_ACTIVE = (1 << 3), 271 }; 272 273 static inline struct nvme_request *nvme_req(struct request *req) 274 { 275 return blk_mq_rq_to_pdu(req); 276 } 277 278 static inline u16 nvme_req_qid(struct request *req) 279 { 280 if (!req->q->queuedata) 281 return 0; 282 283 return req->mq_hctx->queue_num + 1; 284 } 285 286 /* The below value is the specific amount of delay needed before checking 287 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 288 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 289 * found empirically. 290 */ 291 #define NVME_QUIRK_DELAY_AMOUNT 2300 292 293 /* 294 * enum nvme_ctrl_state: Controller state 295 * 296 * @NVME_CTRL_NEW: New controller just allocated, initial state 297 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 298 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 299 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 300 * transport 301 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 302 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 303 * disabled/failed immediately. This state comes 304 * after all async event processing took place and 305 * before ns removal and the controller deletion 306 * progress 307 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 308 * shutdown or removal. In this case we forcibly 309 * kill all inflight I/O as they have no chance to 310 * complete 311 */ 312 enum nvme_ctrl_state { 313 NVME_CTRL_NEW, 314 NVME_CTRL_LIVE, 315 NVME_CTRL_RESETTING, 316 NVME_CTRL_CONNECTING, 317 NVME_CTRL_DELETING, 318 NVME_CTRL_DELETING_NOIO, 319 NVME_CTRL_DEAD, 320 }; 321 322 struct nvme_fault_inject { 323 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 324 struct fault_attr attr; 325 struct dentry *parent; 326 u16 opcode; 327 bool dont_retry; /* DNR, do not retry */ 328 u16 status; /* status code */ 329 #endif 330 }; 331 332 enum nvme_ctrl_flags { 333 NVME_CTRL_FAILFAST_EXPIRED = 0, 334 NVME_CTRL_ADMIN_Q_STOPPED = 1, 335 NVME_CTRL_STARTED_ONCE = 2, 336 NVME_CTRL_STOPPED = 3, 337 NVME_CTRL_SKIP_ID_CNS_CS = 4, 338 NVME_CTRL_DIRTY_CAPABILITY = 5, 339 NVME_CTRL_FROZEN = 6, 340 }; 341 342 struct nvme_ctrl { 343 bool comp_seen; 344 bool identified; 345 bool passthru_err_log_enabled; 346 enum nvme_ctrl_state state; 347 spinlock_t lock; 348 struct mutex scan_lock; 349 const struct nvme_ctrl_ops *ops; 350 struct request_queue *admin_q; 351 struct request_queue *connect_q; 352 struct request_queue *fabrics_q; 353 struct device *dev; 354 int instance; 355 int numa_node; 356 struct blk_mq_tag_set *tagset; 357 struct blk_mq_tag_set *admin_tagset; 358 struct list_head namespaces; 359 struct mutex namespaces_lock; 360 struct srcu_struct srcu; 361 struct device ctrl_device; 362 struct device *device; /* char device */ 363 #ifdef CONFIG_NVME_HWMON 364 struct device *hwmon_device; 365 #endif 366 struct cdev cdev; 367 struct work_struct reset_work; 368 struct work_struct delete_work; 369 wait_queue_head_t state_wq; 370 371 struct nvme_subsystem *subsys; 372 struct list_head subsys_entry 373 __guarded_by(&nvme_subsystems_lock); 374 375 struct opal_dev *opal_dev; 376 377 u16 cntlid; 378 379 u16 mtfa; 380 u32 ctrl_config; 381 u32 queue_count; 382 u32 admin_timeout; 383 u32 io_timeout; 384 385 u64 cap; 386 u32 max_hw_sectors; 387 u32 max_segments; 388 u32 max_integrity_segments; 389 u32 max_zeroes_sectors; 390 #ifdef CONFIG_BLK_DEV_ZONED 391 u32 max_zone_append; 392 #endif 393 u16 crdt[3]; 394 u16 oncs; 395 u8 dmrl; 396 u32 dmrsl; 397 u16 oacs; 398 u16 sqsize; 399 u32 max_namespaces; 400 atomic_t abort_limit; 401 u8 vwc; 402 u32 vs; 403 u32 sgls; 404 u16 kas; 405 u8 npss; 406 u8 apsta; 407 u16 wctemp; 408 u16 cctemp; 409 u32 oaes; 410 u32 aen_result; 411 u32 ctratt; 412 unsigned int shutdown_timeout; 413 unsigned int kato; 414 bool subsystem; 415 unsigned long quirks; 416 struct nvme_id_power_state psd[32]; 417 struct nvme_effects_log *effects; 418 struct work_struct scan_work; 419 struct work_struct async_event_work; 420 struct delayed_work ka_work; 421 struct delayed_work failfast_work; 422 struct nvme_command ka_cmd; 423 unsigned long ka_last_check_time; 424 struct work_struct fw_act_work; 425 unsigned long events; 426 atomic_long_t errors; 427 atomic_long_t nr_reset; 428 429 #ifdef CONFIG_NVME_MULTIPATH 430 /* asymmetric namespace access: */ 431 u8 anacap; 432 u8 anatt; 433 u32 anagrpmax; 434 u32 nanagrpid; 435 struct mutex ana_lock; 436 struct nvme_ana_rsp_hdr *ana_log_buf; 437 size_t ana_log_size; 438 struct timer_list anatt_timer; 439 struct work_struct ana_work; 440 atomic_t nr_active; 441 #endif 442 443 #ifdef CONFIG_NVME_HOST_AUTH 444 struct work_struct dhchap_auth_work; 445 struct mutex dhchap_auth_mutex; 446 struct nvme_dhchap_queue_context *dhchap_ctxs; 447 struct nvme_dhchap_key *host_key; 448 struct nvme_dhchap_key *ctrl_key; 449 u16 transaction; 450 #endif 451 key_serial_t tls_pskid; 452 453 /* Power saving configuration */ 454 u64 ps_max_latency_us; 455 bool apst_enabled; 456 457 /* PCIe only: */ 458 u16 hmmaxd; 459 u32 hmpre; 460 u32 hmmin; 461 u32 hmminds; 462 463 /* Fabrics only */ 464 u32 ioccsz; 465 u32 iorcsz; 466 u16 icdoff; 467 u16 maxcmd; 468 int nr_reconnects; 469 /* accumulate reconenct attempts, as nr_reconnects can reset to zero */ 470 atomic_long_t acc_reconnects; 471 unsigned long flags; 472 struct nvmf_ctrl_options *opts; 473 474 struct page *discard_page; 475 unsigned long discard_page_busy; 476 477 struct nvme_fault_inject fault_inject; 478 479 enum nvme_ctrl_type cntrltype; 480 enum nvme_dctype dctype; 481 482 u16 awupf; /* 0's based value. */ 483 }; 484 485 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 486 { 487 return READ_ONCE(ctrl->state); 488 } 489 490 enum nvme_iopolicy { 491 NVME_IOPOLICY_NUMA, 492 NVME_IOPOLICY_RR, 493 NVME_IOPOLICY_QD, 494 }; 495 496 struct nvme_subsystem { 497 int instance; 498 struct device dev; 499 /* 500 * Because we unregister the device on the last put we need 501 * a separate refcount. 502 */ 503 struct kref ref; 504 struct list_head entry 505 __guarded_by(&nvme_subsystems_lock); 506 struct mutex lock; 507 struct list_head ctrls 508 __guarded_by(&nvme_subsystems_lock); 509 struct list_head nsheads 510 __guarded_by(&lock); 511 /* Command effects logs, indexed by CSI and protected by lock. */ 512 struct xarray cels; 513 char subnqn[NVMF_NQN_SIZE]; 514 char serial[20]; 515 char model[40]; 516 char firmware_rev[8]; 517 u8 cmic; 518 enum nvme_subsys_type subtype; 519 u16 vendor_id; 520 struct ida ns_ida; 521 #ifdef CONFIG_NVME_MULTIPATH 522 enum nvme_iopolicy iopolicy; 523 #endif 524 }; 525 526 /* 527 * Container structure for uniqueue namespace identifiers. 528 */ 529 struct nvme_ns_ids { 530 u8 eui64[8]; 531 u8 nguid[16]; 532 uuid_t uuid; 533 u8 csi; 534 }; 535 536 /* 537 * Anchor structure for namespaces. There is one for each namespace in a 538 * NVMe subsystem that any of our controllers can see, and the namespace 539 * structure for each controller is chained of it. For private namespaces 540 * there is a 1:1 relation to our namespace structures, that is ->list 541 * only ever has a single entry for private namespaces. 542 */ 543 struct nvme_ns_head { 544 struct list_head list; 545 struct srcu_struct srcu; 546 struct nvme_subsystem *subsys; 547 struct nvme_ns_ids ids; 548 u8 lba_shift; 549 u16 ms; 550 u16 pi_size; 551 u8 pi_type; 552 u8 guard_type; 553 struct list_head entry; 554 struct kref ref; 555 bool shared; 556 bool rotational; 557 bool passthru_err_log_enabled; 558 struct nvme_effects_log *effects; 559 u64 nuse; 560 unsigned ns_id; 561 int instance; 562 #ifdef CONFIG_BLK_DEV_ZONED 563 u64 zsze; 564 #endif 565 unsigned long features; 566 567 struct ratelimit_state rs_nuse; 568 569 struct cdev cdev; 570 struct device cdev_device; 571 572 struct gendisk *disk; 573 574 u16 nr_plids; 575 u16 *plids; 576 u32 write_stream_granularity; 577 #ifdef CONFIG_NVME_MULTIPATH 578 struct bio_list requeue_list 579 __guarded_by(&requeue_lock); 580 spinlock_t requeue_lock; 581 struct work_struct requeue_work; 582 struct work_struct partition_scan_work; 583 struct mutex lock; 584 unsigned long flags; 585 struct delayed_work remove_work; 586 unsigned int delayed_removal_secs 587 __guarded_by(&subsys->lock); 588 atomic_long_t io_requeue_no_usable_path_count; 589 atomic_long_t io_fail_no_available_path_count; 590 #define NVME_NSHEAD_DISK_LIVE 0 591 #define NVME_NSHEAD_QUEUE_IF_NO_PATH 1 592 #define NVME_NSHEAD_CDEV_LIVE 2 593 struct nvme_ns __rcu_guarded *current_path[]; 594 #endif 595 }; 596 597 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 598 { 599 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 600 } 601 602 enum nvme_ns_features { 603 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 604 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 605 NVME_NS_DEAC = 1 << 2, /* DEAC bit in Write Zeroes supported */ 606 }; 607 608 struct nvme_ns { 609 struct list_head list; 610 611 struct nvme_ctrl *ctrl; 612 struct request_queue *queue; 613 struct gendisk *disk; 614 #ifdef CONFIG_NVME_MULTIPATH 615 enum nvme_ana_state ana_state; 616 u32 ana_grpid; 617 atomic_long_t failover; 618 #endif 619 atomic_long_t retries; 620 atomic_long_t errors; 621 struct list_head siblings; 622 struct kref kref; 623 struct nvme_ns_head *head; 624 625 unsigned long flags; 626 #define NVME_NS_REMOVING 0 627 #define NVME_NS_ANA_PENDING 2 628 #define NVME_NS_FORCE_RO 3 629 #define NVME_NS_READY 4 630 #define NVME_NS_SYSFS_ATTR_LINK 5 631 #define NVME_NS_CDEV_LIVE 6 632 633 struct cdev cdev; 634 struct device cdev_device; 635 636 struct nvme_fault_inject fault_inject; 637 }; 638 639 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 640 static inline bool nvme_ns_has_pi(struct nvme_ns_head *head) 641 { 642 return head->pi_type && head->ms == head->pi_size; 643 } 644 645 static inline unsigned long nvme_get_virt_boundary(struct nvme_ctrl *ctrl, 646 bool is_admin) 647 { 648 return NVME_CTRL_PAGE_SIZE - 1; 649 } 650 651 struct nvme_ctrl_ops { 652 const char *name; 653 struct module *module; 654 unsigned int flags; 655 #define NVME_F_FABRICS (1 << 0) 656 #define NVME_F_METADATA_SUPPORTED (1 << 1) 657 #define NVME_F_BLOCKING (1 << 2) 658 659 const struct attribute_group **dev_attr_groups; 660 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 661 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 662 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 663 void (*free_ctrl)(struct nvme_ctrl *ctrl); 664 void (*submit_async_event)(struct nvme_ctrl *ctrl); 665 int (*subsystem_reset)(struct nvme_ctrl *ctrl); 666 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 667 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 668 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 669 void (*print_device_info)(struct nvme_ctrl *ctrl); 670 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 671 unsigned long (*get_virt_boundary)(struct nvme_ctrl *ctrl, bool is_admin); 672 }; 673 674 /* 675 * nvme command_id is constructed as such: 676 * | xxxx | xxxxxxxxxxxx | 677 * gen request tag 678 */ 679 #define nvme_genctr_mask(gen) (gen & 0xf) 680 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 681 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 682 #define nvme_tag_from_cid(cid) (cid & 0xfff) 683 684 static inline u16 nvme_cid(struct request *rq) 685 { 686 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 687 } 688 689 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 690 u16 command_id) 691 { 692 u8 genctr = nvme_genctr_from_cid(command_id); 693 u16 tag = nvme_tag_from_cid(command_id); 694 struct request *rq; 695 696 rq = blk_mq_tag_to_rq(tags, tag); 697 if (unlikely(!rq)) { 698 pr_err_ratelimited("could not locate request for tag %#x\n", 699 tag); 700 return NULL; 701 } 702 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 703 dev_err_ratelimited(nvme_req(rq)->ctrl->device, 704 "request %#x genctr mismatch (got %#x expected %#x)\n", 705 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 706 return NULL; 707 } 708 return rq; 709 } 710 711 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 712 u16 command_id) 713 { 714 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 715 } 716 717 /* 718 * Return the length of the string without the space padding 719 */ 720 static inline int nvme_strlen(char *s, int len) 721 { 722 while (s[len - 1] == ' ') 723 len--; 724 return len; 725 } 726 727 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 728 { 729 struct nvme_subsystem *subsys = ctrl->subsys; 730 731 if (ctrl->ops->print_device_info) { 732 ctrl->ops->print_device_info(ctrl); 733 return; 734 } 735 736 dev_err(ctrl->device, 737 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 738 nvme_strlen(subsys->model, sizeof(subsys->model)), 739 subsys->model, nvme_strlen(subsys->firmware_rev, 740 sizeof(subsys->firmware_rev)), 741 subsys->firmware_rev); 742 } 743 744 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 745 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 746 const char *dev_name); 747 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 748 void nvme_should_fail(struct request *req); 749 #else 750 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 751 const char *dev_name) 752 { 753 } 754 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 755 { 756 } 757 static inline void nvme_should_fail(struct request *req) {} 758 #endif 759 760 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 761 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 762 763 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 764 { 765 if (!ctrl->subsystem || !ctrl->ops->subsystem_reset) 766 return -ENOTTY; 767 return ctrl->ops->subsystem_reset(ctrl); 768 } 769 770 /* 771 * Convert a 512B sector number to a device logical block number. 772 */ 773 static inline u64 nvme_sect_to_lba(struct nvme_ns_head *head, sector_t sector) 774 { 775 return sector >> (head->lba_shift - SECTOR_SHIFT); 776 } 777 778 /* 779 * Convert a device logical block number to a 512B sector number. 780 */ 781 static inline sector_t nvme_lba_to_sect(struct nvme_ns_head *head, u64 lba) 782 { 783 return lba << (head->lba_shift - SECTOR_SHIFT); 784 } 785 786 /* 787 * Convert byte length to nvme's 0-based num dwords 788 */ 789 static inline u32 nvme_bytes_to_numd(size_t len) 790 { 791 return (len >> 2) - 1; 792 } 793 794 /* Decode a 2-byte "0's based"/"0-based" field */ 795 static inline u32 from0based(__le16 value) 796 { 797 return (u32)le16_to_cpu(value) + 1; 798 } 799 800 static inline bool nvme_is_ana_error(u16 status) 801 { 802 switch (status & NVME_SCT_SC_MASK) { 803 case NVME_SC_ANA_TRANSITION: 804 case NVME_SC_ANA_INACCESSIBLE: 805 case NVME_SC_ANA_PERSISTENT_LOSS: 806 return true; 807 default: 808 return false; 809 } 810 } 811 812 static inline bool nvme_is_path_error(u16 status) 813 { 814 /* check for a status code type of 'path related status' */ 815 return (status & NVME_SCT_MASK) == NVME_SCT_PATH; 816 } 817 818 /* 819 * Fill in the status and result information from the CQE, and then figure out 820 * if blk-mq will need to use IPI magic to complete the request, and if yes do 821 * so. If not let the caller complete the request without an indirect function 822 * call. 823 */ 824 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 825 union nvme_result result) 826 { 827 struct nvme_request *rq = nvme_req(req); 828 struct nvme_ctrl *ctrl = rq->ctrl; 829 830 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 831 rq->genctr++; 832 833 rq->status = le16_to_cpu(status) >> 1; 834 rq->result = result; 835 /* inject error when permitted by fault injection framework */ 836 nvme_should_fail(req); 837 if (unlikely(blk_should_fake_timeout(req->q))) 838 return true; 839 return blk_mq_complete_request_remote(req); 840 } 841 842 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 843 { 844 get_device(ctrl->device); 845 } 846 847 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 848 { 849 put_device(ctrl->device); 850 } 851 852 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 853 { 854 return !qid && 855 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 856 } 857 858 /* 859 * Returns true for sink states that can't ever transition back to live. 860 */ 861 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl) 862 { 863 switch (nvme_ctrl_state(ctrl)) { 864 case NVME_CTRL_NEW: 865 case NVME_CTRL_LIVE: 866 case NVME_CTRL_RESETTING: 867 case NVME_CTRL_CONNECTING: 868 return false; 869 case NVME_CTRL_DELETING: 870 case NVME_CTRL_DELETING_NOIO: 871 case NVME_CTRL_DEAD: 872 return true; 873 default: 874 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 875 return true; 876 } 877 } 878 879 void nvme_end_req(struct request *req); 880 void nvme_complete_rq(struct request *req); 881 void nvme_complete_batch_req(struct request *req); 882 883 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 884 void (*fn)(struct request *rq)) 885 { 886 struct request *req; 887 888 rq_list_for_each(&iob->req_list, req) { 889 fn(req); 890 nvme_complete_batch_req(req); 891 } 892 blk_mq_end_request_batch(iob); 893 } 894 895 blk_status_t nvme_host_path_error(struct request *req); 896 bool nvme_cancel_request(struct request *req, void *data); 897 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 898 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 899 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 900 enum nvme_ctrl_state new_state); 901 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 902 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 903 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 904 const struct nvme_ctrl_ops *ops, unsigned long quirks); 905 int nvme_add_ctrl(struct nvme_ctrl *ctrl); 906 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 907 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 908 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 909 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 910 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 911 const struct blk_mq_ops *ops, unsigned int cmd_size); 912 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 913 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 914 const struct blk_mq_ops *ops, unsigned int nr_maps, 915 unsigned int cmd_size); 916 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 917 918 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 919 920 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 921 volatile union nvme_result *res); 922 923 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 924 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 925 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 926 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 927 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 928 void nvme_sync_queues(struct nvme_ctrl *ctrl); 929 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 930 void nvme_unfreeze(struct nvme_ctrl *ctrl); 931 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 932 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl); 933 void nvme_start_freeze(struct nvme_ctrl *ctrl); 934 935 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 936 { 937 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 938 } 939 940 #define NVME_QID_ANY -1 941 void nvme_init_request(struct request *req, struct nvme_command *cmd); 942 void nvme_cleanup_cmd(struct request *req); 943 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 944 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 945 struct request *req); 946 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 947 bool queue_live, enum nvme_ctrl_state state); 948 949 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 950 bool queue_live) 951 { 952 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 953 954 if (likely(state == NVME_CTRL_LIVE)) 955 return true; 956 if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING) 957 return queue_live; 958 return __nvme_check_ready(ctrl, rq, queue_live, state); 959 } 960 961 /* 962 * NSID shall be unique for all shared namespaces, or if at least one of the 963 * following conditions is met: 964 * 1. Namespace Management is supported by the controller 965 * 2. ANA is supported by the controller 966 * 3. NVM Set are supported by the controller 967 * 968 * In other case, private namespace are not required to report a unique NSID. 969 */ 970 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 971 struct nvme_ns_head *head) 972 { 973 return head->shared || 974 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 975 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 976 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 977 } 978 979 /* 980 * Flags for __nvme_submit_sync_cmd() 981 */ 982 typedef __u32 __bitwise nvme_submit_flags_t; 983 984 enum { 985 /* Insert request at the head of the queue */ 986 NVME_SUBMIT_AT_HEAD = (__force nvme_submit_flags_t)(1 << 0), 987 /* Set BLK_MQ_REQ_NOWAIT when allocating request */ 988 NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1), 989 /* Set BLK_MQ_REQ_RESERVED when allocating request */ 990 NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2), 991 /* Retry command when NVME_STATUS_DNR is not set in the result */ 992 NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3), 993 }; 994 995 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 996 void *buf, unsigned bufflen); 997 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 998 union nvme_result *result, void *buffer, unsigned bufflen, 999 int qid, nvme_submit_flags_t flags); 1000 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1001 unsigned int dword11, void *buffer, size_t buflen, 1002 void *result); 1003 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1004 unsigned int dword11, void *buffer, size_t buflen, 1005 void *result); 1006 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 1007 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 1008 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 1009 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 1010 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 1011 void nvme_queue_scan(struct nvme_ctrl *ctrl); 1012 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 1013 void *log, size_t size, u64 offset); 1014 void nvme_get_ns_head(struct nvme_ns_head *head); 1015 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 1016 void nvme_put_ns_head(struct nvme_ns_head *head); 1017 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 1018 const struct file_operations *fops, struct module *owner, 1019 int ctrl, int head); 1020 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 1021 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 1022 unsigned int cmd, unsigned long arg); 1023 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 1024 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 1025 unsigned int cmd, unsigned long arg); 1026 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 1027 unsigned long arg); 1028 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 1029 unsigned long arg); 1030 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 1031 struct io_comp_batch *iob, unsigned int poll_flags); 1032 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 1033 unsigned int issue_flags); 1034 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 1035 unsigned int issue_flags); 1036 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1037 struct nvme_id_ns **id); 1038 int nvme_getgeo(struct gendisk *disk, struct hd_geometry *geo); 1039 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 1040 1041 extern const struct attribute_group *nvme_ns_attr_groups[]; 1042 extern const struct attribute_group nvme_ns_mpath_attr_group; 1043 extern const struct pr_ops nvme_pr_ops; 1044 extern const struct block_device_operations nvme_ns_head_ops; 1045 extern const struct attribute_group nvme_dev_attrs_group; 1046 extern const struct attribute_group nvme_dev_diag_attrs_group; 1047 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 1048 extern const struct attribute_group *nvme_dev_attr_groups[]; 1049 extern const struct block_device_operations nvme_bdev_ops; 1050 1051 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 1052 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head) 1053 __must_hold_shared(&head->srcu); 1054 #ifdef CONFIG_NVME_MULTIPATH 1055 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 1056 { 1057 return ctrl->ana_log_buf != NULL; 1058 } 1059 1060 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1061 __must_hold(&subsys->lock); 1062 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1063 __must_hold(&subsys->lock); 1064 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1065 __must_hold(&subsys->lock); 1066 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 1067 void nvme_failover_req(struct request *req); 1068 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 1069 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 1070 void nvme_mpath_add_sysfs_link(struct nvme_ns_head *ns); 1071 void nvme_mpath_remove_sysfs_link(struct nvme_ns *ns); 1072 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 1073 void nvme_mpath_put_disk(struct nvme_ns_head *head); 1074 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 1075 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 1076 void nvme_mpath_update(struct nvme_ctrl *ctrl); 1077 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 1078 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 1079 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 1080 void nvme_mpath_revalidate_paths(struct nvme_ns_head *head); 1081 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 1082 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 1083 void nvme_mpath_start_request(struct request *rq); 1084 void nvme_mpath_end_request(struct request *rq); 1085 1086 static inline void nvme_trace_bio_complete(struct request *req) 1087 { 1088 struct nvme_ns *ns = req->q->queuedata; 1089 1090 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 1091 trace_block_bio_complete(ns->head->disk->queue, req->bio); 1092 } 1093 1094 extern bool multipath; 1095 extern struct device_attribute dev_attr_ana_grpid; 1096 extern struct device_attribute dev_attr_ana_state; 1097 extern struct device_attribute dev_attr_queue_depth; 1098 extern struct device_attribute dev_attr_numa_nodes; 1099 extern struct device_attribute dev_attr_delayed_removal_secs; 1100 extern struct device_attribute dev_attr_multipath_failover_count; 1101 extern struct device_attribute dev_attr_io_requeue_no_usable_path_count; 1102 extern struct device_attribute dev_attr_io_fail_no_available_path_count; 1103 extern struct device_attribute subsys_attr_iopolicy; 1104 1105 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 1106 { 1107 return disk->fops == &nvme_ns_head_ops; 1108 } 1109 static inline bool nvme_mpath_queue_if_no_path(struct nvme_ns_head *head) 1110 { 1111 if (test_bit(NVME_NSHEAD_QUEUE_IF_NO_PATH, &head->flags)) 1112 return true; 1113 return false; 1114 } 1115 #else 1116 #define multipath false 1117 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 1118 { 1119 return false; 1120 } 1121 static inline void nvme_failover_req(struct request *req) 1122 { 1123 } 1124 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 1125 { 1126 } 1127 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 1128 struct nvme_ns_head *head) 1129 { 1130 return 0; 1131 } 1132 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 1133 { 1134 } 1135 static inline void nvme_mpath_put_disk(struct nvme_ns_head *head) 1136 { 1137 } 1138 static inline void nvme_mpath_add_sysfs_link(struct nvme_ns *ns) 1139 { 1140 } 1141 static inline void nvme_mpath_remove_sysfs_link(struct nvme_ns *ns) 1142 { 1143 } 1144 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 1145 { 1146 return false; 1147 } 1148 static inline void nvme_mpath_revalidate_paths(struct nvme_ns_head *head) 1149 { 1150 } 1151 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 1152 { 1153 } 1154 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 1155 { 1156 } 1157 static inline void nvme_trace_bio_complete(struct request *req) 1158 { 1159 } 1160 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 1161 { 1162 } 1163 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 1164 struct nvme_id_ctrl *id) 1165 { 1166 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 1167 dev_warn(ctrl->device, 1168 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 1169 return 0; 1170 } 1171 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 1172 { 1173 } 1174 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 1175 { 1176 } 1177 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 1178 { 1179 } 1180 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1181 { 1182 } 1183 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1184 { 1185 } 1186 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1187 { 1188 } 1189 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 1190 { 1191 } 1192 static inline void nvme_mpath_start_request(struct request *rq) 1193 { 1194 } 1195 static inline void nvme_mpath_end_request(struct request *rq) 1196 { 1197 } 1198 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 1199 { 1200 return false; 1201 } 1202 static inline bool nvme_mpath_queue_if_no_path(struct nvme_ns_head *head) 1203 { 1204 return false; 1205 } 1206 #endif /* CONFIG_NVME_MULTIPATH */ 1207 1208 #if defined(CONFIG_NVME_MULTIPATH) && defined(CONFIG_BLK_DEV_ZONED) 1209 int nvme_mpath_revalidate_zones(struct nvme_ns_head *head); 1210 #else 1211 static inline int nvme_mpath_revalidate_zones(struct nvme_ns_head *head) 1212 { 1213 return 0; 1214 } 1215 #endif 1216 1217 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16], 1218 enum blk_unique_id type); 1219 1220 struct nvme_zone_info { 1221 u64 zone_size; 1222 unsigned int max_open_zones; 1223 unsigned int max_active_zones; 1224 }; 1225 1226 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1227 unsigned int nr_zones, struct blk_report_zones_args *args); 1228 int nvme_query_zone_info(struct nvme_ns *ns, unsigned lbaf, 1229 struct nvme_zone_info *zi); 1230 void nvme_update_zone_info(struct nvme_ns *ns, struct queue_limits *lim, 1231 struct nvme_zone_info *zi); 1232 #ifdef CONFIG_BLK_DEV_ZONED 1233 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1234 struct nvme_command *cmnd, 1235 enum nvme_zone_mgmt_action action); 1236 #else 1237 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1238 struct request *req, struct nvme_command *cmnd, 1239 enum nvme_zone_mgmt_action action) 1240 { 1241 return BLK_STS_NOTSUPP; 1242 } 1243 #endif 1244 1245 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1246 { 1247 struct gendisk *disk = dev_to_disk(dev); 1248 1249 WARN_ON(nvme_disk_is_ns_head(disk)); 1250 return disk->private_data; 1251 } 1252 1253 #ifdef CONFIG_NVME_HWMON 1254 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1255 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1256 #else 1257 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1258 { 1259 return 0; 1260 } 1261 1262 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1263 { 1264 } 1265 #endif 1266 1267 static inline void nvme_start_request(struct request *rq) 1268 { 1269 if (rq->cmd_flags & REQ_NVME_MPATH) 1270 nvme_mpath_start_request(rq); 1271 blk_mq_start_request(rq); 1272 } 1273 1274 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1275 { 1276 return ctrl->sgls & (NVME_CTRL_SGLS_BYTE_ALIGNED | 1277 NVME_CTRL_SGLS_DWORD_ALIGNED); 1278 } 1279 1280 static inline bool nvme_ctrl_meta_sgl_supported(struct nvme_ctrl *ctrl) 1281 { 1282 if (ctrl->ops->flags & NVME_F_FABRICS) 1283 return true; 1284 return ctrl->sgls & NVME_CTRL_SGLS_MSDS; 1285 } 1286 1287 #ifdef CONFIG_NVME_HOST_AUTH 1288 int __init nvme_init_auth(void); 1289 void __exit nvme_exit_auth(void); 1290 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1291 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1292 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1293 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1294 void nvme_auth_free(struct nvme_ctrl *ctrl); 1295 void nvme_auth_revoke_tls_key(struct nvme_ctrl *ctrl); 1296 #else 1297 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1298 { 1299 return 0; 1300 } 1301 static inline int __init nvme_init_auth(void) 1302 { 1303 return 0; 1304 } 1305 static inline void __exit nvme_exit_auth(void) 1306 { 1307 } 1308 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1309 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1310 { 1311 return -EPROTONOSUPPORT; 1312 } 1313 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1314 { 1315 return -EPROTONOSUPPORT; 1316 } 1317 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1318 static inline void nvme_auth_revoke_tls_key(struct nvme_ctrl *ctrl) {}; 1319 #endif 1320 1321 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1322 u8 opcode); 1323 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1324 __cond_acquires(nonzero, &ctrl->subsys->lock) 1325 __cond_acquires(nonzero, &ctrl->scan_lock); 1326 1327 int nvme_execute_rq(struct request *rq, bool at_head); 1328 u32 nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1329 struct nvme_command *cmd, int status) 1330 __cond_releases(nonzero, &ctrl->scan_lock) 1331 __cond_releases(nonzero, &ctrl->subsys->lock); 1332 1333 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1334 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1335 bool nvme_get_ns(struct nvme_ns *ns); 1336 void nvme_put_ns(struct nvme_ns *ns); 1337 1338 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1339 { 1340 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1341 } 1342 1343 #endif /* _NVME_H */ 1344