1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/async.h> 8 #include <linux/blkdev.h> 9 #include <linux/blk-mq.h> 10 #include <linux/blk-integrity.h> 11 #include <linux/compat.h> 12 #include <linux/delay.h> 13 #include <linux/errno.h> 14 #include <linux/hdreg.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/backing-dev.h> 18 #include <linux/slab.h> 19 #include <linux/types.h> 20 #include <linux/pr.h> 21 #include <linux/ptrace.h> 22 #include <linux/nvme_ioctl.h> 23 #include <linux/pm_qos.h> 24 #include <linux/ratelimit.h> 25 #include <linux/unaligned.h> 26 27 #include "nvme.h" 28 #include "fabrics.h" 29 #include <linux/nvme-auth.h> 30 31 #define CREATE_TRACE_POINTS 32 #include "trace.h" 33 34 #define NVME_MINORS (1U << MINORBITS) 35 36 struct nvme_ns_info { 37 struct nvme_ns_ids ids; 38 u32 nsid; 39 __le32 anagrpid; 40 u8 pi_offset; 41 u16 endgid; 42 u64 runs; 43 bool is_shared; 44 bool is_readonly; 45 bool is_ready; 46 bool is_removed; 47 bool is_rotational; 48 bool no_vwc; 49 }; 50 51 unsigned int admin_timeout = 60; 52 module_param(admin_timeout, uint, 0644); 53 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 54 EXPORT_SYMBOL_GPL(admin_timeout); 55 56 unsigned int nvme_io_timeout = 30; 57 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 58 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 59 EXPORT_SYMBOL_GPL(nvme_io_timeout); 60 61 static unsigned char shutdown_timeout = 5; 62 module_param(shutdown_timeout, byte, 0644); 63 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 64 65 static u8 nvme_max_retries = 5; 66 module_param_named(max_retries, nvme_max_retries, byte, 0644); 67 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 68 69 static unsigned long default_ps_max_latency_us = 100000; 70 module_param(default_ps_max_latency_us, ulong, 0644); 71 MODULE_PARM_DESC(default_ps_max_latency_us, 72 "max power saving latency for new devices; use PM QOS to change per device"); 73 74 static bool force_apst; 75 module_param(force_apst, bool, 0644); 76 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 77 78 static unsigned long apst_primary_timeout_ms = 100; 79 module_param(apst_primary_timeout_ms, ulong, 0644); 80 MODULE_PARM_DESC(apst_primary_timeout_ms, 81 "primary APST timeout in ms"); 82 83 static unsigned long apst_secondary_timeout_ms = 2000; 84 module_param(apst_secondary_timeout_ms, ulong, 0644); 85 MODULE_PARM_DESC(apst_secondary_timeout_ms, 86 "secondary APST timeout in ms"); 87 88 static unsigned long apst_primary_latency_tol_us = 15000; 89 module_param(apst_primary_latency_tol_us, ulong, 0644); 90 MODULE_PARM_DESC(apst_primary_latency_tol_us, 91 "primary APST latency tolerance in us"); 92 93 static unsigned long apst_secondary_latency_tol_us = 100000; 94 module_param(apst_secondary_latency_tol_us, ulong, 0644); 95 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 96 "secondary APST latency tolerance in us"); 97 98 /* 99 * Older kernels didn't enable protection information if it was at an offset. 100 * Newer kernels do, so it breaks reads on the upgrade if such formats were 101 * used in prior kernels since the metadata written did not contain a valid 102 * checksum. 103 */ 104 static bool disable_pi_offsets = false; 105 module_param(disable_pi_offsets, bool, 0444); 106 MODULE_PARM_DESC(disable_pi_offsets, 107 "disable protection information if it has an offset"); 108 109 /* 110 * nvme_wq - hosts nvme related works that are not reset or delete 111 * nvme_reset_wq - hosts nvme reset works 112 * nvme_delete_wq - hosts nvme delete works 113 * 114 * nvme_wq will host works such as scan, aen handling, fw activation, 115 * keep-alive, periodic reconnects etc. nvme_reset_wq 116 * runs reset works which also flush works hosted on nvme_wq for 117 * serialization purposes. nvme_delete_wq host controller deletion 118 * works which flush reset works for serialization. 119 */ 120 struct workqueue_struct *nvme_wq; 121 EXPORT_SYMBOL_GPL(nvme_wq); 122 123 struct workqueue_struct *nvme_reset_wq; 124 EXPORT_SYMBOL_GPL(nvme_reset_wq); 125 126 struct workqueue_struct *nvme_delete_wq; 127 EXPORT_SYMBOL_GPL(nvme_delete_wq); 128 129 static LIST_HEAD(nvme_subsystems); 130 DEFINE_MUTEX(nvme_subsystems_lock); 131 132 static DEFINE_IDA(nvme_instance_ida); 133 static dev_t nvme_ctrl_base_chr_devt; 134 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env); 135 static const struct class nvme_class = { 136 .name = "nvme", 137 .dev_uevent = nvme_class_uevent, 138 }; 139 140 static const struct class nvme_subsys_class = { 141 .name = "nvme-subsystem", 142 }; 143 144 static DEFINE_IDA(nvme_ns_chr_minor_ida); 145 static dev_t nvme_ns_chr_devt; 146 static const struct class nvme_ns_chr_class = { 147 .name = "nvme-generic", 148 }; 149 150 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 151 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 152 unsigned nsid); 153 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 154 struct nvme_command *cmd); 155 static int nvme_get_log_lsi(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, 156 u8 lsp, u8 csi, void *log, size_t size, u64 offset, u16 lsi); 157 158 void nvme_queue_scan(struct nvme_ctrl *ctrl) 159 { 160 /* 161 * Only new queue scan work when admin and IO queues are both alive 162 */ 163 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 164 queue_work(nvme_wq, &ctrl->scan_work); 165 } 166 167 /* 168 * Use this function to proceed with scheduling reset_work for a controller 169 * that had previously been set to the resetting state. This is intended for 170 * code paths that can't be interrupted by other reset attempts. A hot removal 171 * may prevent this from succeeding. 172 */ 173 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 174 { 175 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 176 return -EBUSY; 177 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 178 return -EBUSY; 179 return 0; 180 } 181 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 182 183 static void nvme_failfast_work(struct work_struct *work) 184 { 185 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 186 struct nvme_ctrl, failfast_work); 187 188 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 189 return; 190 191 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 192 dev_info(ctrl->device, "failfast expired\n"); 193 nvme_kick_requeue_lists(ctrl); 194 } 195 196 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 197 { 198 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 199 return; 200 201 schedule_delayed_work(&ctrl->failfast_work, 202 ctrl->opts->fast_io_fail_tmo * HZ); 203 } 204 205 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 206 { 207 if (!ctrl->opts) 208 return; 209 210 cancel_delayed_work_sync(&ctrl->failfast_work); 211 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 212 } 213 214 215 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 216 { 217 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 218 return -EBUSY; 219 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 220 return -EBUSY; 221 return 0; 222 } 223 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 224 225 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 226 { 227 int ret; 228 229 ret = nvme_reset_ctrl(ctrl); 230 if (!ret) { 231 flush_work(&ctrl->reset_work); 232 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 233 ret = -ENETRESET; 234 } 235 236 return ret; 237 } 238 239 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 240 { 241 dev_info(ctrl->device, 242 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 243 244 flush_work(&ctrl->reset_work); 245 nvme_stop_ctrl(ctrl); 246 nvme_remove_namespaces(ctrl); 247 ctrl->ops->delete_ctrl(ctrl); 248 nvme_uninit_ctrl(ctrl); 249 } 250 251 static void nvme_delete_ctrl_work(struct work_struct *work) 252 { 253 struct nvme_ctrl *ctrl = 254 container_of(work, struct nvme_ctrl, delete_work); 255 256 nvme_do_delete_ctrl(ctrl); 257 } 258 259 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 260 { 261 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 262 return -EBUSY; 263 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 264 return -EBUSY; 265 return 0; 266 } 267 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 268 269 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 270 { 271 /* 272 * Keep a reference until nvme_do_delete_ctrl() complete, 273 * since ->delete_ctrl can free the controller. 274 */ 275 nvme_get_ctrl(ctrl); 276 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 277 nvme_do_delete_ctrl(ctrl); 278 nvme_put_ctrl(ctrl); 279 } 280 281 static blk_status_t nvme_error_status(u16 status) 282 { 283 switch (status & NVME_SCT_SC_MASK) { 284 case NVME_SC_SUCCESS: 285 return BLK_STS_OK; 286 case NVME_SC_CAP_EXCEEDED: 287 return BLK_STS_NOSPC; 288 case NVME_SC_LBA_RANGE: 289 case NVME_SC_CMD_INTERRUPTED: 290 case NVME_SC_NS_NOT_READY: 291 return BLK_STS_TARGET; 292 case NVME_SC_BAD_ATTRIBUTES: 293 case NVME_SC_INVALID_OPCODE: 294 case NVME_SC_INVALID_FIELD: 295 case NVME_SC_INVALID_NS: 296 return BLK_STS_NOTSUPP; 297 case NVME_SC_WRITE_FAULT: 298 case NVME_SC_READ_ERROR: 299 case NVME_SC_UNWRITTEN_BLOCK: 300 case NVME_SC_ACCESS_DENIED: 301 case NVME_SC_READ_ONLY: 302 case NVME_SC_COMPARE_FAILED: 303 return BLK_STS_MEDIUM; 304 case NVME_SC_GUARD_CHECK: 305 case NVME_SC_APPTAG_CHECK: 306 case NVME_SC_REFTAG_CHECK: 307 case NVME_SC_INVALID_PI: 308 return BLK_STS_PROTECTION; 309 case NVME_SC_RESERVATION_CONFLICT: 310 return BLK_STS_RESV_CONFLICT; 311 case NVME_SC_HOST_PATH_ERROR: 312 return BLK_STS_TRANSPORT; 313 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 314 return BLK_STS_ZONE_ACTIVE_RESOURCE; 315 case NVME_SC_ZONE_TOO_MANY_OPEN: 316 return BLK_STS_ZONE_OPEN_RESOURCE; 317 default: 318 return BLK_STS_IOERR; 319 } 320 } 321 322 static void nvme_retry_req(struct request *req) 323 { 324 unsigned long delay = 0; 325 u16 crd; 326 327 /* The mask and shift result must be <= 3 */ 328 crd = (nvme_req(req)->status & NVME_STATUS_CRD) >> 11; 329 if (crd) 330 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 331 332 nvme_req(req)->retries++; 333 blk_mq_requeue_request(req, false); 334 blk_mq_delay_kick_requeue_list(req->q, delay); 335 } 336 337 static void nvme_log_error(struct request *req) 338 { 339 struct nvme_ns *ns = req->q->queuedata; 340 struct nvme_request *nr = nvme_req(req); 341 342 if (ns) { 343 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 344 ns->disk ? ns->disk->disk_name : "?", 345 nvme_get_opcode_str(nr->cmd->common.opcode), 346 nr->cmd->common.opcode, 347 nvme_sect_to_lba(ns->head, blk_rq_pos(req)), 348 blk_rq_bytes(req) >> ns->head->lba_shift, 349 nvme_get_error_status_str(nr->status), 350 NVME_SCT(nr->status), /* Status Code Type */ 351 nr->status & NVME_SC_MASK, /* Status Code */ 352 nr->status & NVME_STATUS_MORE ? "MORE " : "", 353 nr->status & NVME_STATUS_DNR ? "DNR " : ""); 354 return; 355 } 356 357 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 358 dev_name(nr->ctrl->device), 359 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 360 nr->cmd->common.opcode, 361 nvme_get_error_status_str(nr->status), 362 NVME_SCT(nr->status), /* Status Code Type */ 363 nr->status & NVME_SC_MASK, /* Status Code */ 364 nr->status & NVME_STATUS_MORE ? "MORE " : "", 365 nr->status & NVME_STATUS_DNR ? "DNR " : ""); 366 } 367 368 static void nvme_log_err_passthru(struct request *req) 369 { 370 struct nvme_ns *ns = req->q->queuedata; 371 struct nvme_request *nr = nvme_req(req); 372 373 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s" 374 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n", 375 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device), 376 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) : 377 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 378 nr->cmd->common.opcode, 379 nvme_get_error_status_str(nr->status), 380 NVME_SCT(nr->status), /* Status Code Type */ 381 nr->status & NVME_SC_MASK, /* Status Code */ 382 nr->status & NVME_STATUS_MORE ? "MORE " : "", 383 nr->status & NVME_STATUS_DNR ? "DNR " : "", 384 le32_to_cpu(nr->cmd->common.cdw10), 385 le32_to_cpu(nr->cmd->common.cdw11), 386 le32_to_cpu(nr->cmd->common.cdw12), 387 le32_to_cpu(nr->cmd->common.cdw13), 388 le32_to_cpu(nr->cmd->common.cdw14), 389 le32_to_cpu(nr->cmd->common.cdw15)); 390 } 391 392 enum nvme_disposition { 393 COMPLETE, 394 RETRY, 395 FAILOVER, 396 AUTHENTICATE, 397 }; 398 399 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 400 { 401 if (likely(nvme_req(req)->status == 0)) 402 return COMPLETE; 403 404 if (blk_noretry_request(req) || 405 (nvme_req(req)->status & NVME_STATUS_DNR) || 406 nvme_req(req)->retries >= nvme_max_retries) 407 return COMPLETE; 408 409 if ((nvme_req(req)->status & NVME_SCT_SC_MASK) == NVME_SC_AUTH_REQUIRED) 410 return AUTHENTICATE; 411 412 if (req->cmd_flags & REQ_NVME_MPATH) { 413 if (nvme_is_path_error(nvme_req(req)->status) || 414 blk_queue_dying(req->q)) 415 return FAILOVER; 416 } else { 417 if (blk_queue_dying(req->q)) 418 return COMPLETE; 419 } 420 421 return RETRY; 422 } 423 424 static inline void nvme_end_req_zoned(struct request *req) 425 { 426 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 427 req_op(req) == REQ_OP_ZONE_APPEND) { 428 struct nvme_ns *ns = req->q->queuedata; 429 430 req->__sector = nvme_lba_to_sect(ns->head, 431 le64_to_cpu(nvme_req(req)->result.u64)); 432 } 433 } 434 435 static inline void __nvme_end_req(struct request *req) 436 { 437 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) { 438 if (blk_rq_is_passthrough(req)) 439 nvme_log_err_passthru(req); 440 else 441 nvme_log_error(req); 442 } 443 nvme_end_req_zoned(req); 444 nvme_trace_bio_complete(req); 445 if (req->cmd_flags & REQ_NVME_MPATH) 446 nvme_mpath_end_request(req); 447 } 448 449 void nvme_end_req(struct request *req) 450 { 451 blk_status_t status = nvme_error_status(nvme_req(req)->status); 452 453 __nvme_end_req(req); 454 blk_mq_end_request(req, status); 455 } 456 457 void nvme_complete_rq(struct request *req) 458 { 459 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 460 461 trace_nvme_complete_rq(req); 462 nvme_cleanup_cmd(req); 463 464 /* 465 * Completions of long-running commands should not be able to 466 * defer sending of periodic keep alives, since the controller 467 * may have completed processing such commands a long time ago 468 * (arbitrarily close to command submission time). 469 * req->deadline - req->timeout is the command submission time 470 * in jiffies. 471 */ 472 if (ctrl->kas && 473 req->deadline - req->timeout >= ctrl->ka_last_check_time) 474 ctrl->comp_seen = true; 475 476 switch (nvme_decide_disposition(req)) { 477 case COMPLETE: 478 nvme_end_req(req); 479 return; 480 case RETRY: 481 nvme_retry_req(req); 482 return; 483 case FAILOVER: 484 nvme_failover_req(req); 485 return; 486 case AUTHENTICATE: 487 #ifdef CONFIG_NVME_HOST_AUTH 488 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 489 nvme_retry_req(req); 490 #else 491 nvme_end_req(req); 492 #endif 493 return; 494 } 495 } 496 EXPORT_SYMBOL_GPL(nvme_complete_rq); 497 498 void nvme_complete_batch_req(struct request *req) 499 { 500 trace_nvme_complete_rq(req); 501 nvme_cleanup_cmd(req); 502 __nvme_end_req(req); 503 } 504 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 505 506 /* 507 * Called to unwind from ->queue_rq on a failed command submission so that the 508 * multipathing code gets called to potentially failover to another path. 509 * The caller needs to unwind all transport specific resource allocations and 510 * must return propagate the return value. 511 */ 512 blk_status_t nvme_host_path_error(struct request *req) 513 { 514 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 515 blk_mq_set_request_complete(req); 516 nvme_complete_rq(req); 517 return BLK_STS_OK; 518 } 519 EXPORT_SYMBOL_GPL(nvme_host_path_error); 520 521 bool nvme_cancel_request(struct request *req, void *data) 522 { 523 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 524 "Cancelling I/O %d", req->tag); 525 526 /* don't abort one completed or idle request */ 527 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 528 return true; 529 530 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 531 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 532 blk_mq_complete_request(req); 533 return true; 534 } 535 EXPORT_SYMBOL_GPL(nvme_cancel_request); 536 537 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 538 { 539 if (ctrl->tagset) { 540 blk_mq_tagset_busy_iter(ctrl->tagset, 541 nvme_cancel_request, ctrl); 542 blk_mq_tagset_wait_completed_request(ctrl->tagset); 543 } 544 } 545 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 546 547 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 548 { 549 if (ctrl->admin_tagset) { 550 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 551 nvme_cancel_request, ctrl); 552 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 553 } 554 } 555 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 556 557 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 558 enum nvme_ctrl_state new_state) 559 { 560 enum nvme_ctrl_state old_state; 561 unsigned long flags; 562 bool changed = false; 563 564 spin_lock_irqsave(&ctrl->lock, flags); 565 566 old_state = nvme_ctrl_state(ctrl); 567 switch (new_state) { 568 case NVME_CTRL_LIVE: 569 switch (old_state) { 570 case NVME_CTRL_CONNECTING: 571 changed = true; 572 fallthrough; 573 default: 574 break; 575 } 576 break; 577 case NVME_CTRL_RESETTING: 578 switch (old_state) { 579 case NVME_CTRL_NEW: 580 case NVME_CTRL_LIVE: 581 changed = true; 582 fallthrough; 583 default: 584 break; 585 } 586 break; 587 case NVME_CTRL_CONNECTING: 588 switch (old_state) { 589 case NVME_CTRL_NEW: 590 case NVME_CTRL_RESETTING: 591 changed = true; 592 fallthrough; 593 default: 594 break; 595 } 596 break; 597 case NVME_CTRL_DELETING: 598 switch (old_state) { 599 case NVME_CTRL_LIVE: 600 case NVME_CTRL_RESETTING: 601 case NVME_CTRL_CONNECTING: 602 changed = true; 603 fallthrough; 604 default: 605 break; 606 } 607 break; 608 case NVME_CTRL_DELETING_NOIO: 609 switch (old_state) { 610 case NVME_CTRL_DELETING: 611 case NVME_CTRL_DEAD: 612 changed = true; 613 fallthrough; 614 default: 615 break; 616 } 617 break; 618 case NVME_CTRL_DEAD: 619 switch (old_state) { 620 case NVME_CTRL_DELETING: 621 changed = true; 622 fallthrough; 623 default: 624 break; 625 } 626 break; 627 default: 628 break; 629 } 630 631 if (changed) { 632 WRITE_ONCE(ctrl->state, new_state); 633 wake_up_all(&ctrl->state_wq); 634 } 635 636 spin_unlock_irqrestore(&ctrl->lock, flags); 637 if (!changed) 638 return false; 639 640 if (new_state == NVME_CTRL_LIVE) { 641 if (old_state == NVME_CTRL_CONNECTING) 642 nvme_stop_failfast_work(ctrl); 643 nvme_kick_requeue_lists(ctrl); 644 } else if (new_state == NVME_CTRL_CONNECTING && 645 old_state == NVME_CTRL_RESETTING) { 646 nvme_start_failfast_work(ctrl); 647 } 648 return changed; 649 } 650 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 651 652 /* 653 * Waits for the controller state to be resetting, or returns false if it is 654 * not possible to ever transition to that state. 655 */ 656 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 657 { 658 wait_event(ctrl->state_wq, 659 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 660 nvme_state_terminal(ctrl)); 661 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 662 } 663 EXPORT_SYMBOL_GPL(nvme_wait_reset); 664 665 static void nvme_free_ns_head(struct kref *ref) 666 { 667 struct nvme_ns_head *head = 668 container_of(ref, struct nvme_ns_head, ref); 669 670 nvme_mpath_put_disk(head); 671 ida_free(&head->subsys->ns_ida, head->instance); 672 cleanup_srcu_struct(&head->srcu); 673 nvme_put_subsystem(head->subsys); 674 kfree(head->plids); 675 kfree(head); 676 } 677 678 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 679 { 680 return kref_get_unless_zero(&head->ref); 681 } 682 683 void nvme_put_ns_head(struct nvme_ns_head *head) 684 { 685 kref_put(&head->ref, nvme_free_ns_head); 686 } 687 688 static void nvme_free_ns(struct kref *kref) 689 { 690 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 691 692 put_disk(ns->disk); 693 nvme_put_ns_head(ns->head); 694 nvme_put_ctrl(ns->ctrl); 695 kfree(ns); 696 } 697 698 bool nvme_get_ns(struct nvme_ns *ns) 699 { 700 return kref_get_unless_zero(&ns->kref); 701 } 702 703 void nvme_put_ns(struct nvme_ns *ns) 704 { 705 kref_put(&ns->kref, nvme_free_ns); 706 } 707 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, "NVME_TARGET_PASSTHRU"); 708 709 static inline void nvme_clear_nvme_request(struct request *req) 710 { 711 nvme_req(req)->status = 0; 712 nvme_req(req)->retries = 0; 713 nvme_req(req)->flags = 0; 714 req->rq_flags |= RQF_DONTPREP; 715 } 716 717 /* initialize a passthrough request */ 718 void nvme_init_request(struct request *req, struct nvme_command *cmd) 719 { 720 struct nvme_request *nr = nvme_req(req); 721 bool logging_enabled; 722 723 if (req->q->queuedata) { 724 struct nvme_ns *ns = req->q->disk->private_data; 725 726 logging_enabled = ns->head->passthru_err_log_enabled; 727 req->timeout = NVME_IO_TIMEOUT; 728 } else { /* no queuedata implies admin queue */ 729 logging_enabled = nr->ctrl->passthru_err_log_enabled; 730 req->timeout = NVME_ADMIN_TIMEOUT; 731 } 732 733 if (!logging_enabled) 734 req->rq_flags |= RQF_QUIET; 735 736 /* passthru commands should let the driver set the SGL flags */ 737 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 738 739 req->cmd_flags |= REQ_FAILFAST_DRIVER; 740 if (req->mq_hctx->type == HCTX_TYPE_POLL) 741 req->cmd_flags |= REQ_POLLED; 742 nvme_clear_nvme_request(req); 743 memcpy(nr->cmd, cmd, sizeof(*cmd)); 744 } 745 EXPORT_SYMBOL_GPL(nvme_init_request); 746 747 /* 748 * For something we're not in a state to send to the device the default action 749 * is to busy it and retry it after the controller state is recovered. However, 750 * if the controller is deleting or if anything is marked for failfast or 751 * nvme multipath it is immediately failed. 752 * 753 * Note: commands used to initialize the controller will be marked for failfast. 754 * Note: nvme cli/ioctl commands are marked for failfast. 755 */ 756 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 757 struct request *rq) 758 { 759 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 760 761 if (state != NVME_CTRL_DELETING_NOIO && 762 state != NVME_CTRL_DELETING && 763 state != NVME_CTRL_DEAD && 764 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 765 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 766 return BLK_STS_RESOURCE; 767 768 if (!(rq->rq_flags & RQF_DONTPREP)) 769 nvme_clear_nvme_request(rq); 770 771 return nvme_host_path_error(rq); 772 } 773 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 774 775 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 776 bool queue_live, enum nvme_ctrl_state state) 777 { 778 struct nvme_request *req = nvme_req(rq); 779 780 /* 781 * currently we have a problem sending passthru commands 782 * on the admin_q if the controller is not LIVE because we can't 783 * make sure that they are going out after the admin connect, 784 * controller enable and/or other commands in the initialization 785 * sequence. until the controller will be LIVE, fail with 786 * BLK_STS_RESOURCE so that they will be rescheduled. 787 */ 788 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 789 return false; 790 791 if (ctrl->ops->flags & NVME_F_FABRICS) { 792 /* 793 * Only allow commands on a live queue, except for the connect 794 * command, which is require to set the queue live in the 795 * appropinquate states. 796 */ 797 switch (state) { 798 case NVME_CTRL_CONNECTING: 799 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 800 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 801 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 802 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 803 return true; 804 break; 805 default: 806 break; 807 case NVME_CTRL_DEAD: 808 return false; 809 } 810 } 811 812 return queue_live; 813 } 814 EXPORT_SYMBOL_GPL(__nvme_check_ready); 815 816 static inline void nvme_setup_flush(struct nvme_ns *ns, 817 struct nvme_command *cmnd) 818 { 819 memset(cmnd, 0, sizeof(*cmnd)); 820 cmnd->common.opcode = nvme_cmd_flush; 821 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 822 } 823 824 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 825 struct nvme_command *cmnd) 826 { 827 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 828 struct nvme_dsm_range *range; 829 struct bio *bio; 830 831 /* 832 * Some devices do not consider the DSM 'Number of Ranges' field when 833 * determining how much data to DMA. Always allocate memory for maximum 834 * number of segments to prevent device reading beyond end of buffer. 835 */ 836 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 837 838 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 839 if (!range) { 840 /* 841 * If we fail allocation our range, fallback to the controller 842 * discard page. If that's also busy, it's safe to return 843 * busy, as we know we can make progress once that's freed. 844 */ 845 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 846 return BLK_STS_RESOURCE; 847 848 range = page_address(ns->ctrl->discard_page); 849 } 850 851 if (queue_max_discard_segments(req->q) == 1) { 852 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req)); 853 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9); 854 855 range[0].cattr = cpu_to_le32(0); 856 range[0].nlb = cpu_to_le32(nlb); 857 range[0].slba = cpu_to_le64(slba); 858 n = 1; 859 } else { 860 __rq_for_each_bio(bio, req) { 861 u64 slba = nvme_sect_to_lba(ns->head, 862 bio->bi_iter.bi_sector); 863 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift; 864 865 if (n < segments) { 866 range[n].cattr = cpu_to_le32(0); 867 range[n].nlb = cpu_to_le32(nlb); 868 range[n].slba = cpu_to_le64(slba); 869 } 870 n++; 871 } 872 } 873 874 if (WARN_ON_ONCE(n != segments)) { 875 if (virt_to_page(range) == ns->ctrl->discard_page) 876 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 877 else 878 kfree(range); 879 return BLK_STS_IOERR; 880 } 881 882 memset(cmnd, 0, sizeof(*cmnd)); 883 cmnd->dsm.opcode = nvme_cmd_dsm; 884 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 885 cmnd->dsm.nr = cpu_to_le32(segments - 1); 886 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 887 888 bvec_set_virt(&req->special_vec, range, alloc_size); 889 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 890 891 return BLK_STS_OK; 892 } 893 894 static void nvme_set_app_tag(struct request *req, struct nvme_command *cmnd) 895 { 896 cmnd->rw.lbat = cpu_to_le16(bio_integrity(req->bio)->app_tag); 897 cmnd->rw.lbatm = cpu_to_le16(0xffff); 898 } 899 900 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 901 struct request *req) 902 { 903 u32 upper, lower; 904 u64 ref48; 905 906 /* only type1 and type 2 PI formats have a reftag */ 907 switch (ns->head->pi_type) { 908 case NVME_NS_DPS_PI_TYPE1: 909 case NVME_NS_DPS_PI_TYPE2: 910 break; 911 default: 912 return; 913 } 914 915 /* both rw and write zeroes share the same reftag format */ 916 switch (ns->head->guard_type) { 917 case NVME_NVM_NS_16B_GUARD: 918 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 919 break; 920 case NVME_NVM_NS_64B_GUARD: 921 ref48 = ext_pi_ref_tag(req); 922 lower = lower_32_bits(ref48); 923 upper = upper_32_bits(ref48); 924 925 cmnd->rw.reftag = cpu_to_le32(lower); 926 cmnd->rw.cdw3 = cpu_to_le32(upper); 927 break; 928 default: 929 break; 930 } 931 } 932 933 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 934 struct request *req, struct nvme_command *cmnd) 935 { 936 memset(cmnd, 0, sizeof(*cmnd)); 937 938 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 939 return nvme_setup_discard(ns, req, cmnd); 940 941 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 942 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 943 cmnd->write_zeroes.slba = 944 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 945 cmnd->write_zeroes.length = 946 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 947 948 if (!(req->cmd_flags & REQ_NOUNMAP) && 949 (ns->head->features & NVME_NS_DEAC)) 950 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 951 952 if (nvme_ns_has_pi(ns->head)) { 953 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 954 nvme_set_ref_tag(ns, cmnd, req); 955 } 956 957 return BLK_STS_OK; 958 } 959 960 /* 961 * NVMe does not support a dedicated command to issue an atomic write. A write 962 * which does adhere to the device atomic limits will silently be executed 963 * non-atomically. The request issuer should ensure that the write is within 964 * the queue atomic writes limits, but just validate this in case it is not. 965 */ 966 static bool nvme_valid_atomic_write(struct request *req) 967 { 968 struct request_queue *q = req->q; 969 u32 boundary_bytes = queue_atomic_write_boundary_bytes(q); 970 971 if (blk_rq_bytes(req) > queue_atomic_write_unit_max_bytes(q)) 972 return false; 973 974 if (boundary_bytes) { 975 u64 mask = boundary_bytes - 1, imask = ~mask; 976 u64 start = blk_rq_pos(req) << SECTOR_SHIFT; 977 u64 end = start + blk_rq_bytes(req) - 1; 978 979 /* If greater then must be crossing a boundary */ 980 if (blk_rq_bytes(req) > boundary_bytes) 981 return false; 982 983 if ((start & imask) != (end & imask)) 984 return false; 985 } 986 987 return true; 988 } 989 990 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 991 struct request *req, struct nvme_command *cmnd, 992 enum nvme_opcode op) 993 { 994 u16 control = 0; 995 u32 dsmgmt = 0; 996 997 if (req->cmd_flags & REQ_FUA) 998 control |= NVME_RW_FUA; 999 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 1000 control |= NVME_RW_LR; 1001 1002 if (req->cmd_flags & REQ_RAHEAD) 1003 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 1004 1005 if (op == nvme_cmd_write && ns->head->nr_plids) { 1006 u16 write_stream = req->bio->bi_write_stream; 1007 1008 if (WARN_ON_ONCE(write_stream > ns->head->nr_plids)) 1009 return BLK_STS_INVAL; 1010 1011 if (write_stream) { 1012 dsmgmt |= ns->head->plids[write_stream - 1] << 16; 1013 control |= NVME_RW_DTYPE_DPLCMT; 1014 } 1015 } 1016 1017 if (req->cmd_flags & REQ_ATOMIC && !nvme_valid_atomic_write(req)) 1018 return BLK_STS_INVAL; 1019 1020 cmnd->rw.opcode = op; 1021 cmnd->rw.flags = 0; 1022 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 1023 cmnd->rw.cdw2 = 0; 1024 cmnd->rw.cdw3 = 0; 1025 cmnd->rw.metadata = 0; 1026 cmnd->rw.slba = 1027 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 1028 cmnd->rw.length = 1029 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 1030 cmnd->rw.reftag = 0; 1031 cmnd->rw.lbat = 0; 1032 cmnd->rw.lbatm = 0; 1033 1034 if (ns->head->ms) { 1035 /* 1036 * If formatted with metadata, the block layer always provides a 1037 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 1038 * we enable the PRACT bit for protection information or set the 1039 * namespace capacity to zero to prevent any I/O. 1040 */ 1041 if (!blk_integrity_rq(req)) { 1042 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head))) 1043 return BLK_STS_NOTSUPP; 1044 control |= NVME_RW_PRINFO_PRACT; 1045 nvme_set_ref_tag(ns, cmnd, req); 1046 } 1047 1048 if (bio_integrity_flagged(req->bio, BIP_CHECK_GUARD)) 1049 control |= NVME_RW_PRINFO_PRCHK_GUARD; 1050 if (bio_integrity_flagged(req->bio, BIP_CHECK_REFTAG)) { 1051 control |= NVME_RW_PRINFO_PRCHK_REF; 1052 if (op == nvme_cmd_zone_append) 1053 control |= NVME_RW_APPEND_PIREMAP; 1054 nvme_set_ref_tag(ns, cmnd, req); 1055 } 1056 if (bio_integrity_flagged(req->bio, BIP_CHECK_APPTAG)) { 1057 control |= NVME_RW_PRINFO_PRCHK_APP; 1058 nvme_set_app_tag(req, cmnd); 1059 } 1060 } 1061 1062 cmnd->rw.control = cpu_to_le16(control); 1063 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 1064 return 0; 1065 } 1066 1067 void nvme_cleanup_cmd(struct request *req) 1068 { 1069 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 1070 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 1071 1072 if (req->special_vec.bv_page == ctrl->discard_page) 1073 clear_bit_unlock(0, &ctrl->discard_page_busy); 1074 else 1075 kfree(bvec_virt(&req->special_vec)); 1076 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD; 1077 } 1078 } 1079 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 1080 1081 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 1082 { 1083 struct nvme_command *cmd = nvme_req(req)->cmd; 1084 blk_status_t ret = BLK_STS_OK; 1085 1086 if (!(req->rq_flags & RQF_DONTPREP)) 1087 nvme_clear_nvme_request(req); 1088 1089 switch (req_op(req)) { 1090 case REQ_OP_DRV_IN: 1091 case REQ_OP_DRV_OUT: 1092 /* these are setup prior to execution in nvme_init_request() */ 1093 break; 1094 case REQ_OP_FLUSH: 1095 nvme_setup_flush(ns, cmd); 1096 break; 1097 case REQ_OP_ZONE_RESET_ALL: 1098 case REQ_OP_ZONE_RESET: 1099 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 1100 break; 1101 case REQ_OP_ZONE_OPEN: 1102 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 1103 break; 1104 case REQ_OP_ZONE_CLOSE: 1105 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 1106 break; 1107 case REQ_OP_ZONE_FINISH: 1108 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 1109 break; 1110 case REQ_OP_WRITE_ZEROES: 1111 ret = nvme_setup_write_zeroes(ns, req, cmd); 1112 break; 1113 case REQ_OP_DISCARD: 1114 ret = nvme_setup_discard(ns, req, cmd); 1115 break; 1116 case REQ_OP_READ: 1117 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1118 break; 1119 case REQ_OP_WRITE: 1120 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1121 break; 1122 case REQ_OP_ZONE_APPEND: 1123 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1124 break; 1125 default: 1126 WARN_ON_ONCE(1); 1127 return BLK_STS_IOERR; 1128 } 1129 1130 cmd->common.command_id = nvme_cid(req); 1131 trace_nvme_setup_cmd(req, cmd); 1132 return ret; 1133 } 1134 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1135 1136 /* 1137 * Return values: 1138 * 0: success 1139 * >0: nvme controller's cqe status response 1140 * <0: kernel error in lieu of controller response 1141 */ 1142 int nvme_execute_rq(struct request *rq, bool at_head) 1143 { 1144 blk_status_t status; 1145 1146 status = blk_execute_rq(rq, at_head); 1147 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1148 return -EINTR; 1149 if (nvme_req(rq)->status) 1150 return nvme_req(rq)->status; 1151 return blk_status_to_errno(status); 1152 } 1153 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, "NVME_TARGET_PASSTHRU"); 1154 1155 /* 1156 * Returns 0 on success. If the result is negative, it's a Linux error code; 1157 * if the result is positive, it's an NVM Express status code 1158 */ 1159 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1160 union nvme_result *result, void *buffer, unsigned bufflen, 1161 int qid, nvme_submit_flags_t flags) 1162 { 1163 struct request *req; 1164 int ret; 1165 blk_mq_req_flags_t blk_flags = 0; 1166 1167 if (flags & NVME_SUBMIT_NOWAIT) 1168 blk_flags |= BLK_MQ_REQ_NOWAIT; 1169 if (flags & NVME_SUBMIT_RESERVED) 1170 blk_flags |= BLK_MQ_REQ_RESERVED; 1171 if (qid == NVME_QID_ANY) 1172 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags); 1173 else 1174 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags, 1175 qid - 1); 1176 1177 if (IS_ERR(req)) 1178 return PTR_ERR(req); 1179 nvme_init_request(req, cmd); 1180 if (flags & NVME_SUBMIT_RETRY) 1181 req->cmd_flags &= ~REQ_FAILFAST_DRIVER; 1182 1183 if (buffer && bufflen) { 1184 ret = blk_rq_map_kern(req, buffer, bufflen, GFP_KERNEL); 1185 if (ret) 1186 goto out; 1187 } 1188 1189 ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD); 1190 if (result && ret >= 0) 1191 *result = nvme_req(req)->result; 1192 out: 1193 blk_mq_free_request(req); 1194 return ret; 1195 } 1196 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1197 1198 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1199 void *buffer, unsigned bufflen) 1200 { 1201 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1202 NVME_QID_ANY, 0); 1203 } 1204 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1205 1206 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1207 { 1208 u32 effects = 0; 1209 1210 if (ns) { 1211 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1212 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1213 dev_warn_once(ctrl->device, 1214 "IO command:%02x has unusual effects:%08x\n", 1215 opcode, effects); 1216 1217 /* 1218 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1219 * which would deadlock when done on an I/O command. Note that 1220 * We already warn about an unusual effect above. 1221 */ 1222 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1223 } else { 1224 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1225 1226 /* Ignore execution restrictions if any relaxation bits are set */ 1227 if (effects & NVME_CMD_EFFECTS_CSER_MASK) 1228 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1229 } 1230 1231 return effects; 1232 } 1233 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, "NVME_TARGET_PASSTHRU"); 1234 1235 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1236 { 1237 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1238 1239 /* 1240 * For simplicity, IO to all namespaces is quiesced even if the command 1241 * effects say only one namespace is affected. 1242 */ 1243 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1244 mutex_lock(&ctrl->scan_lock); 1245 mutex_lock(&ctrl->subsys->lock); 1246 nvme_mpath_start_freeze(ctrl->subsys); 1247 nvme_mpath_wait_freeze(ctrl->subsys); 1248 nvme_start_freeze(ctrl); 1249 nvme_wait_freeze(ctrl); 1250 } 1251 return effects; 1252 } 1253 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, "NVME_TARGET_PASSTHRU"); 1254 1255 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1256 struct nvme_command *cmd, int status) 1257 { 1258 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1259 nvme_unfreeze(ctrl); 1260 nvme_mpath_unfreeze(ctrl->subsys); 1261 mutex_unlock(&ctrl->subsys->lock); 1262 mutex_unlock(&ctrl->scan_lock); 1263 } 1264 if (effects & NVME_CMD_EFFECTS_CCC) { 1265 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1266 &ctrl->flags)) { 1267 dev_info(ctrl->device, 1268 "controller capabilities changed, reset may be required to take effect.\n"); 1269 } 1270 } 1271 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1272 nvme_queue_scan(ctrl); 1273 flush_work(&ctrl->scan_work); 1274 } 1275 if (ns) 1276 return; 1277 1278 switch (cmd->common.opcode) { 1279 case nvme_admin_set_features: 1280 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1281 case NVME_FEAT_KATO: 1282 /* 1283 * Keep alive commands interval on the host should be 1284 * updated when KATO is modified by Set Features 1285 * commands. 1286 */ 1287 if (!status) 1288 nvme_update_keep_alive(ctrl, cmd); 1289 break; 1290 default: 1291 break; 1292 } 1293 break; 1294 default: 1295 break; 1296 } 1297 } 1298 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, "NVME_TARGET_PASSTHRU"); 1299 1300 /* 1301 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1302 * 1303 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1304 * accounting for transport roundtrip times [..]. 1305 */ 1306 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1307 { 1308 unsigned long delay = ctrl->kato * HZ / 2; 1309 1310 /* 1311 * When using Traffic Based Keep Alive, we need to run 1312 * nvme_keep_alive_work at twice the normal frequency, as one 1313 * command completion can postpone sending a keep alive command 1314 * by up to twice the delay between runs. 1315 */ 1316 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1317 delay /= 2; 1318 return delay; 1319 } 1320 1321 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1322 { 1323 unsigned long now = jiffies; 1324 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1325 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay; 1326 1327 if (time_after(now, ka_next_check_tm)) 1328 delay = 0; 1329 else 1330 delay = ka_next_check_tm - now; 1331 1332 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1333 } 1334 1335 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1336 blk_status_t status, 1337 const struct io_comp_batch *iob) 1338 { 1339 struct nvme_ctrl *ctrl = rq->end_io_data; 1340 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1341 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1342 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 1343 1344 /* 1345 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1346 * at the desired frequency. 1347 */ 1348 if (rtt <= delay) { 1349 delay -= rtt; 1350 } else { 1351 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1352 jiffies_to_msecs(rtt)); 1353 delay = 0; 1354 } 1355 1356 blk_mq_free_request(rq); 1357 1358 if (status) { 1359 dev_err(ctrl->device, 1360 "failed nvme_keep_alive_end_io error=%d\n", 1361 status); 1362 return RQ_END_IO_NONE; 1363 } 1364 1365 ctrl->ka_last_check_time = jiffies; 1366 ctrl->comp_seen = false; 1367 if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING) 1368 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1369 return RQ_END_IO_NONE; 1370 } 1371 1372 static void nvme_keep_alive_work(struct work_struct *work) 1373 { 1374 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1375 struct nvme_ctrl, ka_work); 1376 bool comp_seen = ctrl->comp_seen; 1377 struct request *rq; 1378 1379 ctrl->ka_last_check_time = jiffies; 1380 1381 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1382 dev_dbg(ctrl->device, 1383 "reschedule traffic based keep-alive timer\n"); 1384 ctrl->comp_seen = false; 1385 nvme_queue_keep_alive_work(ctrl); 1386 return; 1387 } 1388 1389 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1390 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1391 if (IS_ERR(rq)) { 1392 /* allocation failure, reset the controller */ 1393 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1394 nvme_reset_ctrl(ctrl); 1395 return; 1396 } 1397 nvme_init_request(rq, &ctrl->ka_cmd); 1398 1399 rq->timeout = ctrl->kato * HZ; 1400 rq->end_io = nvme_keep_alive_end_io; 1401 rq->end_io_data = ctrl; 1402 blk_execute_rq_nowait(rq, false); 1403 } 1404 1405 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1406 { 1407 if (unlikely(ctrl->kato == 0)) 1408 return; 1409 1410 nvme_queue_keep_alive_work(ctrl); 1411 } 1412 1413 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1414 { 1415 if (unlikely(ctrl->kato == 0)) 1416 return; 1417 1418 cancel_delayed_work_sync(&ctrl->ka_work); 1419 } 1420 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1421 1422 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1423 struct nvme_command *cmd) 1424 { 1425 unsigned int new_kato = 1426 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1427 1428 dev_info(ctrl->device, 1429 "keep alive interval updated from %u ms to %u ms\n", 1430 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1431 1432 nvme_stop_keep_alive(ctrl); 1433 ctrl->kato = new_kato; 1434 nvme_start_keep_alive(ctrl); 1435 } 1436 1437 static bool nvme_id_cns_ok(struct nvme_ctrl *ctrl, u8 cns) 1438 { 1439 /* 1440 * The CNS field occupies a full byte starting with NVMe 1.2 1441 */ 1442 if (ctrl->vs >= NVME_VS(1, 2, 0)) 1443 return true; 1444 1445 /* 1446 * NVMe 1.1 expanded the CNS value to two bits, which means values 1447 * larger than that could get truncated and treated as an incorrect 1448 * value. 1449 * 1450 * Qemu implemented 1.0 behavior for controllers claiming 1.1 1451 * compliance, so they need to be quirked here. 1452 */ 1453 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1454 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) 1455 return cns <= 3; 1456 1457 /* 1458 * NVMe 1.0 used a single bit for the CNS value. 1459 */ 1460 return cns <= 1; 1461 } 1462 1463 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1464 { 1465 struct nvme_command c = { }; 1466 int error; 1467 1468 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1469 c.identify.opcode = nvme_admin_identify; 1470 c.identify.cns = NVME_ID_CNS_CTRL; 1471 1472 *id = kmalloc_obj(struct nvme_id_ctrl); 1473 if (!*id) 1474 return -ENOMEM; 1475 1476 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1477 sizeof(struct nvme_id_ctrl)); 1478 if (error) { 1479 kfree(*id); 1480 *id = NULL; 1481 } 1482 return error; 1483 } 1484 1485 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1486 struct nvme_ns_id_desc *cur, bool *csi_seen) 1487 { 1488 const char *warn_str = "ctrl returned bogus length:"; 1489 void *data = cur; 1490 1491 switch (cur->nidt) { 1492 case NVME_NIDT_EUI64: 1493 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1494 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1495 warn_str, cur->nidl); 1496 return -1; 1497 } 1498 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1499 return NVME_NIDT_EUI64_LEN; 1500 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1501 return NVME_NIDT_EUI64_LEN; 1502 case NVME_NIDT_NGUID: 1503 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1504 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1505 warn_str, cur->nidl); 1506 return -1; 1507 } 1508 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1509 return NVME_NIDT_NGUID_LEN; 1510 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1511 return NVME_NIDT_NGUID_LEN; 1512 case NVME_NIDT_UUID: 1513 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1514 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1515 warn_str, cur->nidl); 1516 return -1; 1517 } 1518 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1519 return NVME_NIDT_UUID_LEN; 1520 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1521 return NVME_NIDT_UUID_LEN; 1522 case NVME_NIDT_CSI: 1523 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1524 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1525 warn_str, cur->nidl); 1526 return -1; 1527 } 1528 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1529 *csi_seen = true; 1530 return NVME_NIDT_CSI_LEN; 1531 default: 1532 /* Skip unknown types */ 1533 return cur->nidl; 1534 } 1535 } 1536 1537 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1538 struct nvme_ns_info *info) 1539 { 1540 struct nvme_command c = { }; 1541 bool csi_seen = false; 1542 int status, pos, len; 1543 void *data; 1544 1545 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1546 return 0; 1547 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1548 return 0; 1549 1550 c.identify.opcode = nvme_admin_identify; 1551 c.identify.nsid = cpu_to_le32(info->nsid); 1552 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1553 1554 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1555 if (!data) 1556 return -ENOMEM; 1557 1558 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1559 NVME_IDENTIFY_DATA_SIZE); 1560 if (status) { 1561 dev_warn(ctrl->device, 1562 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1563 info->nsid, status); 1564 goto free_data; 1565 } 1566 1567 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1568 struct nvme_ns_id_desc *cur = data + pos; 1569 1570 if (cur->nidl == 0) 1571 break; 1572 1573 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1574 if (len < 0) 1575 break; 1576 1577 len += sizeof(*cur); 1578 } 1579 1580 if (nvme_multi_css(ctrl) && !csi_seen) { 1581 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1582 info->nsid); 1583 status = -EINVAL; 1584 } 1585 1586 free_data: 1587 kfree(data); 1588 return status; 1589 } 1590 1591 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1592 struct nvme_id_ns **id) 1593 { 1594 struct nvme_command c = { }; 1595 int error; 1596 1597 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1598 c.identify.opcode = nvme_admin_identify; 1599 c.identify.nsid = cpu_to_le32(nsid); 1600 c.identify.cns = NVME_ID_CNS_NS; 1601 1602 *id = kmalloc_obj(**id); 1603 if (!*id) 1604 return -ENOMEM; 1605 1606 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1607 if (error) { 1608 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1609 kfree(*id); 1610 *id = NULL; 1611 } 1612 return error; 1613 } 1614 1615 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1616 struct nvme_ns_info *info) 1617 { 1618 struct nvme_ns_ids *ids = &info->ids; 1619 struct nvme_id_ns *id; 1620 int ret; 1621 1622 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1623 if (ret) 1624 return ret; 1625 1626 if (id->ncap == 0) { 1627 /* namespace not allocated or attached */ 1628 info->is_removed = true; 1629 ret = -ENODEV; 1630 goto error; 1631 } 1632 1633 info->anagrpid = id->anagrpid; 1634 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1635 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1636 info->is_ready = true; 1637 info->endgid = le16_to_cpu(id->endgid); 1638 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1639 dev_info(ctrl->device, 1640 "Ignoring bogus Namespace Identifiers\n"); 1641 } else { 1642 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1643 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1644 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1645 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1646 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1647 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1648 } 1649 1650 error: 1651 kfree(id); 1652 return ret; 1653 } 1654 1655 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1656 struct nvme_ns_info *info) 1657 { 1658 struct nvme_id_ns_cs_indep *id; 1659 struct nvme_command c = { 1660 .identify.opcode = nvme_admin_identify, 1661 .identify.nsid = cpu_to_le32(info->nsid), 1662 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1663 }; 1664 int ret; 1665 1666 id = kmalloc_obj(*id); 1667 if (!id) 1668 return -ENOMEM; 1669 1670 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1671 if (!ret) { 1672 info->anagrpid = id->anagrpid; 1673 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1674 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1675 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1676 info->is_rotational = id->nsfeat & NVME_NS_ROTATIONAL; 1677 info->no_vwc = id->nsfeat & NVME_NS_VWC_NOT_PRESENT; 1678 info->endgid = le16_to_cpu(id->endgid); 1679 } 1680 kfree(id); 1681 return ret; 1682 } 1683 1684 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1685 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1686 { 1687 union nvme_result res = { 0 }; 1688 struct nvme_command c = { }; 1689 int ret; 1690 1691 c.features.opcode = op; 1692 c.features.fid = cpu_to_le32(fid); 1693 c.features.dword11 = cpu_to_le32(dword11); 1694 1695 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1696 buffer, buflen, NVME_QID_ANY, 0); 1697 if (ret >= 0 && result) 1698 *result = le32_to_cpu(res.u32); 1699 return ret; 1700 } 1701 1702 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1703 unsigned int dword11, void *buffer, size_t buflen, 1704 void *result) 1705 { 1706 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1707 buflen, result); 1708 } 1709 EXPORT_SYMBOL_GPL(nvme_set_features); 1710 1711 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1712 unsigned int dword11, void *buffer, size_t buflen, 1713 void *result) 1714 { 1715 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1716 buflen, result); 1717 } 1718 EXPORT_SYMBOL_GPL(nvme_get_features); 1719 1720 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1721 { 1722 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1723 u32 result; 1724 int status, nr_io_queues; 1725 1726 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1727 &result); 1728 1729 /* 1730 * It's either a kernel error or the host observed a connection 1731 * lost. In either case it's not possible communicate with the 1732 * controller and thus enter the error code path. 1733 */ 1734 if (status < 0 || status == NVME_SC_HOST_PATH_ERROR) 1735 return status; 1736 1737 /* 1738 * Degraded controllers might return an error when setting the queue 1739 * count. We still want to be able to bring them online and offer 1740 * access to the admin queue, as that might be only way to fix them up. 1741 */ 1742 if (status > 0) { 1743 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1744 *count = 0; 1745 } else { 1746 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1747 *count = min(*count, nr_io_queues); 1748 } 1749 1750 return 0; 1751 } 1752 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1753 1754 #define NVME_AEN_SUPPORTED \ 1755 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1756 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1757 1758 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1759 { 1760 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1761 int status; 1762 1763 if (!supported_aens) 1764 return; 1765 1766 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1767 NULL, 0, &result); 1768 if (status) 1769 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1770 supported_aens); 1771 1772 queue_work(nvme_wq, &ctrl->async_event_work); 1773 } 1774 1775 static int nvme_ns_open(struct nvme_ns *ns) 1776 { 1777 1778 /* should never be called due to GENHD_FL_HIDDEN */ 1779 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1780 goto fail; 1781 if (!nvme_get_ns(ns)) 1782 goto fail; 1783 if (!try_module_get(ns->ctrl->ops->module)) 1784 goto fail_put_ns; 1785 1786 return 0; 1787 1788 fail_put_ns: 1789 nvme_put_ns(ns); 1790 fail: 1791 return -ENXIO; 1792 } 1793 1794 static void nvme_ns_release(struct nvme_ns *ns) 1795 { 1796 1797 module_put(ns->ctrl->ops->module); 1798 nvme_put_ns(ns); 1799 } 1800 1801 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1802 { 1803 return nvme_ns_open(disk->private_data); 1804 } 1805 1806 static void nvme_release(struct gendisk *disk) 1807 { 1808 nvme_ns_release(disk->private_data); 1809 } 1810 1811 int nvme_getgeo(struct gendisk *disk, struct hd_geometry *geo) 1812 { 1813 /* some standard values */ 1814 geo->heads = 1 << 6; 1815 geo->sectors = 1 << 5; 1816 geo->cylinders = get_capacity(disk) >> 11; 1817 return 0; 1818 } 1819 1820 static bool nvme_init_integrity(struct nvme_ns_head *head, 1821 struct queue_limits *lim, struct nvme_ns_info *info) 1822 { 1823 struct blk_integrity *bi = &lim->integrity; 1824 1825 memset(bi, 0, sizeof(*bi)); 1826 1827 if (!head->ms) 1828 return true; 1829 1830 /* 1831 * PI can always be supported as we can ask the controller to simply 1832 * insert/strip it, which is not possible for other kinds of metadata. 1833 */ 1834 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) || 1835 !(head->features & NVME_NS_METADATA_SUPPORTED)) 1836 return nvme_ns_has_pi(head); 1837 1838 switch (head->pi_type) { 1839 case NVME_NS_DPS_PI_TYPE3: 1840 switch (head->guard_type) { 1841 case NVME_NVM_NS_16B_GUARD: 1842 bi->csum_type = BLK_INTEGRITY_CSUM_CRC; 1843 bi->tag_size = sizeof(u16) + sizeof(u32); 1844 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1845 break; 1846 case NVME_NVM_NS_64B_GUARD: 1847 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64; 1848 bi->tag_size = sizeof(u16) + 6; 1849 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1850 break; 1851 default: 1852 break; 1853 } 1854 break; 1855 case NVME_NS_DPS_PI_TYPE1: 1856 case NVME_NS_DPS_PI_TYPE2: 1857 switch (head->guard_type) { 1858 case NVME_NVM_NS_16B_GUARD: 1859 bi->csum_type = BLK_INTEGRITY_CSUM_CRC; 1860 bi->tag_size = sizeof(u16); 1861 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE | 1862 BLK_INTEGRITY_REF_TAG; 1863 break; 1864 case NVME_NVM_NS_64B_GUARD: 1865 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64; 1866 bi->tag_size = sizeof(u16); 1867 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE | 1868 BLK_INTEGRITY_REF_TAG; 1869 break; 1870 default: 1871 break; 1872 } 1873 break; 1874 default: 1875 break; 1876 } 1877 1878 bi->metadata_size = head->ms; 1879 if (bi->csum_type) { 1880 bi->pi_tuple_size = head->pi_size; 1881 bi->pi_offset = info->pi_offset; 1882 } 1883 return true; 1884 } 1885 1886 static void nvme_config_discard(struct nvme_ns *ns, struct queue_limits *lim) 1887 { 1888 struct nvme_ctrl *ctrl = ns->ctrl; 1889 1890 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX)) 1891 lim->max_hw_discard_sectors = 1892 nvme_lba_to_sect(ns->head, ctrl->dmrsl); 1893 else if (ctrl->oncs & NVME_CTRL_ONCS_DSM) 1894 lim->max_hw_discard_sectors = UINT_MAX; 1895 else 1896 lim->max_hw_discard_sectors = 0; 1897 1898 lim->discard_granularity = lim->logical_block_size; 1899 1900 if (ctrl->dmrl) 1901 lim->max_discard_segments = ctrl->dmrl; 1902 else 1903 lim->max_discard_segments = NVME_DSM_MAX_RANGES; 1904 } 1905 1906 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1907 { 1908 return uuid_equal(&a->uuid, &b->uuid) && 1909 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1910 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1911 a->csi == b->csi; 1912 } 1913 1914 static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid, 1915 struct nvme_id_ns_nvm **nvmp) 1916 { 1917 struct nvme_command c = { 1918 .identify.opcode = nvme_admin_identify, 1919 .identify.nsid = cpu_to_le32(nsid), 1920 .identify.cns = NVME_ID_CNS_CS_NS, 1921 .identify.csi = NVME_CSI_NVM, 1922 }; 1923 struct nvme_id_ns_nvm *nvm; 1924 int ret; 1925 1926 nvm = kzalloc_obj(*nvm); 1927 if (!nvm) 1928 return -ENOMEM; 1929 1930 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1931 if (ret) 1932 kfree(nvm); 1933 else 1934 *nvmp = nvm; 1935 return ret; 1936 } 1937 1938 static void nvme_configure_pi_elbas(struct nvme_ns_head *head, 1939 struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm) 1940 { 1941 u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]); 1942 u8 guard_type; 1943 1944 /* no support for storage tag formats right now */ 1945 if (nvme_elbaf_sts(elbaf)) 1946 return; 1947 1948 guard_type = nvme_elbaf_guard_type(elbaf); 1949 if ((nvm->pic & NVME_ID_NS_NVM_QPIFS) && 1950 guard_type == NVME_NVM_NS_QTYPE_GUARD) 1951 guard_type = nvme_elbaf_qualified_guard_type(elbaf); 1952 1953 head->guard_type = guard_type; 1954 switch (head->guard_type) { 1955 case NVME_NVM_NS_64B_GUARD: 1956 head->pi_size = sizeof(struct crc64_pi_tuple); 1957 break; 1958 case NVME_NVM_NS_16B_GUARD: 1959 head->pi_size = sizeof(struct t10_pi_tuple); 1960 break; 1961 default: 1962 break; 1963 } 1964 } 1965 1966 static void nvme_configure_metadata(struct nvme_ctrl *ctrl, 1967 struct nvme_ns_head *head, struct nvme_id_ns *id, 1968 struct nvme_id_ns_nvm *nvm, struct nvme_ns_info *info) 1969 { 1970 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1971 head->pi_type = 0; 1972 head->pi_size = 0; 1973 head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms); 1974 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1975 return; 1976 1977 if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1978 nvme_configure_pi_elbas(head, id, nvm); 1979 } else { 1980 head->pi_size = sizeof(struct t10_pi_tuple); 1981 head->guard_type = NVME_NVM_NS_16B_GUARD; 1982 } 1983 1984 if (head->pi_size && head->ms >= head->pi_size) 1985 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1986 if (!(id->dps & NVME_NS_DPS_PI_FIRST)) { 1987 if (disable_pi_offsets) 1988 head->pi_type = 0; 1989 else 1990 info->pi_offset = head->ms - head->pi_size; 1991 } 1992 1993 if (ctrl->ops->flags & NVME_F_FABRICS) { 1994 /* 1995 * The NVMe over Fabrics specification only supports metadata as 1996 * part of the extended data LBA. We rely on HCA/HBA support to 1997 * remap the separate metadata buffer from the block layer. 1998 */ 1999 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 2000 return; 2001 2002 head->features |= NVME_NS_EXT_LBAS; 2003 2004 /* 2005 * The current fabrics transport drivers support namespace 2006 * metadata formats only if nvme_ns_has_pi() returns true. 2007 * Suppress support for all other formats so the namespace will 2008 * have a 0 capacity and not be usable through the block stack. 2009 * 2010 * Note, this check will need to be modified if any drivers 2011 * gain the ability to use other metadata formats. 2012 */ 2013 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head)) 2014 head->features |= NVME_NS_METADATA_SUPPORTED; 2015 } else { 2016 /* 2017 * For PCIe controllers, we can't easily remap the separate 2018 * metadata buffer from the block layer and thus require a 2019 * separate metadata buffer for block layer metadata/PI support. 2020 * We allow extended LBAs for the passthrough interface, though. 2021 */ 2022 if (id->flbas & NVME_NS_FLBAS_META_EXT) 2023 head->features |= NVME_NS_EXT_LBAS; 2024 else 2025 head->features |= NVME_NS_METADATA_SUPPORTED; 2026 } 2027 } 2028 2029 2030 static u32 nvme_configure_atomic_write(struct nvme_ns *ns, 2031 struct nvme_id_ns *id, struct queue_limits *lim, u32 bs) 2032 { 2033 u32 atomic_bs, boundary = 0; 2034 2035 /* 2036 * We do not support an offset for the atomic boundaries. 2037 */ 2038 if (id->nabo) 2039 return bs; 2040 2041 if ((id->nsfeat & NVME_NS_FEAT_ATOMICS) && id->nawupf) { 2042 /* 2043 * Use the per-namespace atomic write unit when available. 2044 */ 2045 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 2046 if (id->nabspf) 2047 boundary = (le16_to_cpu(id->nabspf) + 1) * bs; 2048 } else { 2049 if (ns->ctrl->awupf) 2050 dev_info_once(ns->ctrl->device, 2051 "AWUPF ignored, only NAWUPF accepted\n"); 2052 atomic_bs = bs; 2053 } 2054 2055 lim->atomic_write_hw_max = atomic_bs; 2056 lim->atomic_write_hw_boundary = boundary; 2057 lim->atomic_write_hw_unit_min = bs; 2058 lim->atomic_write_hw_unit_max = rounddown_pow_of_two(atomic_bs); 2059 lim->features |= BLK_FEAT_ATOMIC_WRITES; 2060 return atomic_bs; 2061 } 2062 2063 static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl) 2064 { 2065 return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1; 2066 } 2067 2068 static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl, 2069 struct queue_limits *lim, bool is_admin) 2070 { 2071 lim->max_hw_sectors = ctrl->max_hw_sectors; 2072 lim->max_segments = min_t(u32, USHRT_MAX, 2073 min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments)); 2074 lim->max_integrity_segments = ctrl->max_integrity_segments; 2075 lim->virt_boundary_mask = ctrl->ops->get_virt_boundary(ctrl, is_admin); 2076 lim->max_segment_size = UINT_MAX; 2077 lim->dma_alignment = 3; 2078 } 2079 2080 static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id, 2081 struct queue_limits *lim) 2082 { 2083 struct nvme_ns_head *head = ns->head; 2084 u32 bs = 1U << head->lba_shift; 2085 u32 atomic_bs, phys_bs, io_opt = 0; 2086 bool valid = true; 2087 2088 /* 2089 * The block layer can't support LBA sizes larger than the page size 2090 * or smaller than a sector size yet, so catch this early and don't 2091 * allow block I/O. 2092 */ 2093 if (blk_validate_block_size(bs)) { 2094 bs = (1 << 9); 2095 valid = false; 2096 } 2097 2098 phys_bs = bs; 2099 atomic_bs = nvme_configure_atomic_write(ns, id, lim, bs); 2100 2101 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 2102 /* NPWG = Namespace Preferred Write Granularity */ 2103 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 2104 /* NOWS = Namespace Optimal Write Size */ 2105 if (id->nows) 2106 io_opt = bs * (1 + le16_to_cpu(id->nows)); 2107 } 2108 2109 /* 2110 * Linux filesystems assume writing a single physical block is 2111 * an atomic operation. Hence limit the physical block size to the 2112 * value of the Atomic Write Unit Power Fail parameter. 2113 */ 2114 lim->logical_block_size = bs; 2115 lim->physical_block_size = min(phys_bs, atomic_bs); 2116 lim->io_min = phys_bs; 2117 lim->io_opt = io_opt; 2118 if ((ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) && 2119 (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)) 2120 lim->max_write_zeroes_sectors = UINT_MAX; 2121 else 2122 lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors; 2123 return valid; 2124 } 2125 2126 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 2127 { 2128 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 2129 } 2130 2131 static inline bool nvme_first_scan(struct gendisk *disk) 2132 { 2133 /* nvme_alloc_ns() scans the disk prior to adding it */ 2134 return !disk_live(disk); 2135 } 2136 2137 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id, 2138 struct queue_limits *lim) 2139 { 2140 struct nvme_ctrl *ctrl = ns->ctrl; 2141 u32 iob; 2142 2143 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 2144 is_power_of_2(ctrl->max_hw_sectors)) 2145 iob = ctrl->max_hw_sectors; 2146 else 2147 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob)); 2148 2149 if (!iob) 2150 return; 2151 2152 if (!is_power_of_2(iob)) { 2153 if (nvme_first_scan(ns->disk)) 2154 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 2155 ns->disk->disk_name, iob); 2156 return; 2157 } 2158 2159 if (blk_queue_is_zoned(ns->disk->queue)) { 2160 if (nvme_first_scan(ns->disk)) 2161 pr_warn("%s: ignoring zoned namespace IO boundary\n", 2162 ns->disk->disk_name); 2163 return; 2164 } 2165 2166 lim->chunk_sectors = iob; 2167 } 2168 2169 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 2170 struct nvme_ns_info *info) 2171 { 2172 struct queue_limits lim; 2173 unsigned int memflags; 2174 int ret; 2175 2176 lim = queue_limits_start_update(ns->disk->queue); 2177 nvme_set_ctrl_limits(ns->ctrl, &lim, false); 2178 2179 memflags = blk_mq_freeze_queue(ns->disk->queue); 2180 ret = queue_limits_commit_update(ns->disk->queue, &lim); 2181 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2182 blk_mq_unfreeze_queue(ns->disk->queue, memflags); 2183 2184 /* Hide the block-interface for these devices */ 2185 if (!ret) 2186 ret = -ENODEV; 2187 return ret; 2188 } 2189 2190 static int nvme_query_fdp_granularity(struct nvme_ctrl *ctrl, 2191 struct nvme_ns_info *info, u8 fdp_idx) 2192 { 2193 struct nvme_fdp_config_log hdr, *h; 2194 struct nvme_fdp_config_desc *desc; 2195 size_t size = sizeof(hdr); 2196 void *log, *end; 2197 int i, n, ret; 2198 2199 ret = nvme_get_log_lsi(ctrl, 0, NVME_LOG_FDP_CONFIGS, 0, 2200 NVME_CSI_NVM, &hdr, size, 0, info->endgid); 2201 if (ret) { 2202 dev_warn(ctrl->device, 2203 "FDP configs log header status:0x%x endgid:%d\n", ret, 2204 info->endgid); 2205 return ret; 2206 } 2207 2208 size = le32_to_cpu(hdr.sze); 2209 if (size > PAGE_SIZE * MAX_ORDER_NR_PAGES) { 2210 dev_warn(ctrl->device, "FDP config size too large:%zu\n", 2211 size); 2212 return 0; 2213 } 2214 2215 h = kvmalloc(size, GFP_KERNEL); 2216 if (!h) 2217 return -ENOMEM; 2218 2219 ret = nvme_get_log_lsi(ctrl, 0, NVME_LOG_FDP_CONFIGS, 0, 2220 NVME_CSI_NVM, h, size, 0, info->endgid); 2221 if (ret) { 2222 dev_warn(ctrl->device, 2223 "FDP configs log status:0x%x endgid:%d\n", ret, 2224 info->endgid); 2225 goto out; 2226 } 2227 2228 n = le16_to_cpu(h->numfdpc) + 1; 2229 if (fdp_idx > n) { 2230 dev_warn(ctrl->device, "FDP index:%d out of range:%d\n", 2231 fdp_idx, n); 2232 /* Proceed without registering FDP streams */ 2233 ret = 0; 2234 goto out; 2235 } 2236 2237 log = h + 1; 2238 desc = log; 2239 end = log + size - sizeof(*h); 2240 for (i = 0; i < fdp_idx; i++) { 2241 log += le16_to_cpu(desc->dsze); 2242 desc = log; 2243 if (log >= end) { 2244 dev_warn(ctrl->device, 2245 "FDP invalid config descriptor list\n"); 2246 ret = 0; 2247 goto out; 2248 } 2249 } 2250 2251 if (le32_to_cpu(desc->nrg) > 1) { 2252 dev_warn(ctrl->device, "FDP NRG > 1 not supported\n"); 2253 ret = 0; 2254 goto out; 2255 } 2256 2257 info->runs = le64_to_cpu(desc->runs); 2258 out: 2259 kvfree(h); 2260 return ret; 2261 } 2262 2263 static int nvme_query_fdp_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2264 { 2265 struct nvme_ns_head *head = ns->head; 2266 struct nvme_ctrl *ctrl = ns->ctrl; 2267 struct nvme_fdp_ruh_status *ruhs; 2268 struct nvme_fdp_config fdp; 2269 struct nvme_command c = {}; 2270 size_t size; 2271 int i, ret; 2272 2273 /* 2274 * The FDP configuration is static for the lifetime of the namespace, 2275 * so return immediately if we've already registered this namespace's 2276 * streams. 2277 */ 2278 if (head->nr_plids) 2279 return 0; 2280 2281 ret = nvme_get_features(ctrl, NVME_FEAT_FDP, info->endgid, NULL, 0, 2282 &fdp); 2283 if (ret) { 2284 dev_warn(ctrl->device, "FDP get feature status:0x%x\n", ret); 2285 return ret; 2286 } 2287 2288 if (!(fdp.flags & FDPCFG_FDPE)) 2289 return 0; 2290 2291 ret = nvme_query_fdp_granularity(ctrl, info, fdp.fdpcidx); 2292 if (!info->runs) 2293 return ret; 2294 2295 size = struct_size(ruhs, ruhsd, S8_MAX - 1); 2296 ruhs = kzalloc(size, GFP_KERNEL); 2297 if (!ruhs) 2298 return -ENOMEM; 2299 2300 c.imr.opcode = nvme_cmd_io_mgmt_recv; 2301 c.imr.nsid = cpu_to_le32(head->ns_id); 2302 c.imr.mo = NVME_IO_MGMT_RECV_MO_RUHS; 2303 c.imr.numd = cpu_to_le32(nvme_bytes_to_numd(size)); 2304 ret = nvme_submit_sync_cmd(ns->queue, &c, ruhs, size); 2305 if (ret) { 2306 dev_warn(ctrl->device, "FDP io-mgmt status:0x%x\n", ret); 2307 goto free; 2308 } 2309 2310 head->nr_plids = le16_to_cpu(ruhs->nruhsd); 2311 if (!head->nr_plids) 2312 goto free; 2313 2314 head->plids = kcalloc(head->nr_plids, sizeof(*head->plids), 2315 GFP_KERNEL); 2316 if (!head->plids) { 2317 dev_warn(ctrl->device, 2318 "failed to allocate %u FDP placement IDs\n", 2319 head->nr_plids); 2320 head->nr_plids = 0; 2321 ret = -ENOMEM; 2322 goto free; 2323 } 2324 2325 for (i = 0; i < head->nr_plids; i++) 2326 head->plids[i] = le16_to_cpu(ruhs->ruhsd[i].pid); 2327 free: 2328 kfree(ruhs); 2329 return ret; 2330 } 2331 2332 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2333 struct nvme_ns_info *info) 2334 { 2335 struct queue_limits lim; 2336 struct nvme_id_ns_nvm *nvm = NULL; 2337 struct nvme_zone_info zi = {}; 2338 struct nvme_id_ns *id; 2339 unsigned int memflags; 2340 sector_t capacity; 2341 unsigned lbaf; 2342 int ret; 2343 2344 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2345 if (ret) 2346 return ret; 2347 2348 if (id->ncap == 0) { 2349 /* namespace not allocated or attached */ 2350 info->is_removed = true; 2351 ret = -ENXIO; 2352 goto out; 2353 } 2354 lbaf = nvme_lbaf_index(id->flbas); 2355 2356 if (ns->ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) { 2357 ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm); 2358 if (ret < 0) 2359 goto out; 2360 } 2361 2362 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 2363 ns->head->ids.csi == NVME_CSI_ZNS) { 2364 ret = nvme_query_zone_info(ns, lbaf, &zi); 2365 if (ret < 0) 2366 goto out; 2367 } 2368 2369 if (ns->ctrl->ctratt & NVME_CTRL_ATTR_FDPS) { 2370 ret = nvme_query_fdp_info(ns, info); 2371 if (ret < 0) 2372 goto out; 2373 } 2374 2375 lim = queue_limits_start_update(ns->disk->queue); 2376 2377 memflags = blk_mq_freeze_queue(ns->disk->queue); 2378 ns->head->lba_shift = id->lbaf[lbaf].ds; 2379 ns->head->nuse = le64_to_cpu(id->nuse); 2380 capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze)); 2381 nvme_set_ctrl_limits(ns->ctrl, &lim, false); 2382 nvme_configure_metadata(ns->ctrl, ns->head, id, nvm, info); 2383 nvme_set_chunk_sectors(ns, id, &lim); 2384 if (!nvme_update_disk_info(ns, id, &lim)) 2385 capacity = 0; 2386 2387 nvme_config_discard(ns, &lim); 2388 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 2389 ns->head->ids.csi == NVME_CSI_ZNS) 2390 nvme_update_zone_info(ns, &lim, &zi); 2391 2392 if ((ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT) && !info->no_vwc) 2393 lim.features |= BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA; 2394 else 2395 lim.features &= ~(BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA); 2396 2397 if (info->is_rotational) 2398 lim.features |= BLK_FEAT_ROTATIONAL; 2399 2400 /* 2401 * Register a metadata profile for PI, or the plain non-integrity NVMe 2402 * metadata masquerading as Type 0 if supported, otherwise reject block 2403 * I/O to namespaces with metadata except when the namespace supports 2404 * PI, as it can strip/insert in that case. 2405 */ 2406 if (!nvme_init_integrity(ns->head, &lim, info)) 2407 capacity = 0; 2408 2409 lim.max_write_streams = ns->head->nr_plids; 2410 if (lim.max_write_streams) 2411 lim.write_stream_granularity = min(info->runs, U32_MAX); 2412 else 2413 lim.write_stream_granularity = 0; 2414 2415 /* 2416 * Only set the DEAC bit if the device guarantees that reads from 2417 * deallocated data return zeroes. While the DEAC bit does not 2418 * require that, it must be a no-op if reads from deallocated data 2419 * do not return zeroes. 2420 */ 2421 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) { 2422 ns->head->features |= NVME_NS_DEAC; 2423 lim.max_hw_wzeroes_unmap_sectors = lim.max_write_zeroes_sectors; 2424 } 2425 2426 ret = queue_limits_commit_update(ns->disk->queue, &lim); 2427 if (ret) { 2428 blk_mq_unfreeze_queue(ns->disk->queue, memflags); 2429 goto out; 2430 } 2431 2432 set_capacity_and_notify(ns->disk, capacity); 2433 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2434 set_bit(NVME_NS_READY, &ns->flags); 2435 blk_mq_unfreeze_queue(ns->disk->queue, memflags); 2436 2437 if (blk_queue_is_zoned(ns->queue)) { 2438 ret = blk_revalidate_disk_zones(ns->disk); 2439 if (ret && !nvme_first_scan(ns->disk)) 2440 goto out; 2441 } 2442 2443 ret = 0; 2444 out: 2445 kfree(nvm); 2446 kfree(id); 2447 return ret; 2448 } 2449 2450 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2451 { 2452 bool unsupported = false; 2453 int ret; 2454 2455 switch (info->ids.csi) { 2456 case NVME_CSI_ZNS: 2457 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2458 dev_info(ns->ctrl->device, 2459 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2460 info->nsid); 2461 ret = nvme_update_ns_info_generic(ns, info); 2462 break; 2463 } 2464 ret = nvme_update_ns_info_block(ns, info); 2465 break; 2466 case NVME_CSI_NVM: 2467 ret = nvme_update_ns_info_block(ns, info); 2468 break; 2469 default: 2470 dev_info(ns->ctrl->device, 2471 "block device for nsid %u not supported (csi %u)\n", 2472 info->nsid, info->ids.csi); 2473 ret = nvme_update_ns_info_generic(ns, info); 2474 break; 2475 } 2476 2477 /* 2478 * If probing fails due an unsupported feature, hide the block device, 2479 * but still allow other access. 2480 */ 2481 if (ret == -ENODEV) { 2482 ns->disk->flags |= GENHD_FL_HIDDEN; 2483 set_bit(NVME_NS_READY, &ns->flags); 2484 unsupported = true; 2485 ret = 0; 2486 } 2487 2488 if (!ret && nvme_ns_head_multipath(ns->head)) { 2489 struct queue_limits *ns_lim = &ns->disk->queue->limits; 2490 struct queue_limits lim; 2491 unsigned int memflags; 2492 2493 lim = queue_limits_start_update(ns->head->disk->queue); 2494 memflags = blk_mq_freeze_queue(ns->head->disk->queue); 2495 /* 2496 * queue_limits mixes values that are the hardware limitations 2497 * for bio splitting with what is the device configuration. 2498 * 2499 * For NVMe the device configuration can change after e.g. a 2500 * Format command, and we really want to pick up the new format 2501 * value here. But we must still stack the queue limits to the 2502 * least common denominator for multipathing to split the bios 2503 * properly. 2504 * 2505 * To work around this, we explicitly set the device 2506 * configuration to those that we just queried, but only stack 2507 * the splitting limits in to make sure we still obey possibly 2508 * lower limitations of other controllers. 2509 */ 2510 lim.logical_block_size = ns_lim->logical_block_size; 2511 lim.physical_block_size = ns_lim->physical_block_size; 2512 lim.io_min = ns_lim->io_min; 2513 lim.io_opt = ns_lim->io_opt; 2514 queue_limits_stack_bdev(&lim, ns->disk->part0, 0, 2515 ns->head->disk->disk_name); 2516 if (unsupported) 2517 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2518 else 2519 nvme_init_integrity(ns->head, &lim, info); 2520 lim.max_write_streams = ns_lim->max_write_streams; 2521 lim.write_stream_granularity = ns_lim->write_stream_granularity; 2522 ret = queue_limits_commit_update(ns->head->disk->queue, &lim); 2523 2524 set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk)); 2525 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2526 nvme_mpath_revalidate_paths(ns); 2527 2528 blk_mq_unfreeze_queue(ns->head->disk->queue, memflags); 2529 } 2530 2531 return ret; 2532 } 2533 2534 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16], 2535 enum blk_unique_id type) 2536 { 2537 struct nvme_ns_ids *ids = &ns->head->ids; 2538 2539 if (type != BLK_UID_EUI64) 2540 return -EINVAL; 2541 2542 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) { 2543 memcpy(id, &ids->nguid, sizeof(ids->nguid)); 2544 return sizeof(ids->nguid); 2545 } 2546 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) { 2547 memcpy(id, &ids->eui64, sizeof(ids->eui64)); 2548 return sizeof(ids->eui64); 2549 } 2550 2551 return -EINVAL; 2552 } 2553 2554 static int nvme_get_unique_id(struct gendisk *disk, u8 id[16], 2555 enum blk_unique_id type) 2556 { 2557 return nvme_ns_get_unique_id(disk->private_data, id, type); 2558 } 2559 2560 #ifdef CONFIG_BLK_SED_OPAL 2561 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2562 bool send) 2563 { 2564 struct nvme_ctrl *ctrl = data; 2565 struct nvme_command cmd = { }; 2566 2567 if (send) 2568 cmd.common.opcode = nvme_admin_security_send; 2569 else 2570 cmd.common.opcode = nvme_admin_security_recv; 2571 cmd.common.nsid = 0; 2572 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2573 cmd.common.cdw11 = cpu_to_le32(len); 2574 2575 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2576 NVME_QID_ANY, NVME_SUBMIT_AT_HEAD); 2577 } 2578 2579 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2580 { 2581 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2582 if (!ctrl->opal_dev) 2583 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2584 else if (was_suspended) 2585 opal_unlock_from_suspend(ctrl->opal_dev); 2586 } else { 2587 free_opal_dev(ctrl->opal_dev); 2588 ctrl->opal_dev = NULL; 2589 } 2590 } 2591 #else 2592 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2593 { 2594 } 2595 #endif /* CONFIG_BLK_SED_OPAL */ 2596 2597 #ifdef CONFIG_BLK_DEV_ZONED 2598 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2599 unsigned int nr_zones, struct blk_report_zones_args *args) 2600 { 2601 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, args); 2602 } 2603 #else 2604 #define nvme_report_zones NULL 2605 #endif /* CONFIG_BLK_DEV_ZONED */ 2606 2607 const struct block_device_operations nvme_bdev_ops = { 2608 .owner = THIS_MODULE, 2609 .ioctl = nvme_ioctl, 2610 .compat_ioctl = blkdev_compat_ptr_ioctl, 2611 .open = nvme_open, 2612 .release = nvme_release, 2613 .getgeo = nvme_getgeo, 2614 .get_unique_id = nvme_get_unique_id, 2615 .report_zones = nvme_report_zones, 2616 .pr_ops = &nvme_pr_ops, 2617 }; 2618 2619 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2620 u32 timeout, const char *op) 2621 { 2622 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2623 u32 csts; 2624 int ret; 2625 2626 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2627 if (csts == ~0) 2628 return -ENODEV; 2629 if ((csts & mask) == val) 2630 break; 2631 2632 usleep_range(1000, 2000); 2633 if (fatal_signal_pending(current)) 2634 return -EINTR; 2635 if (time_after(jiffies, timeout_jiffies)) { 2636 dev_err(ctrl->device, 2637 "Device not ready; aborting %s, CSTS=0x%x\n", 2638 op, csts); 2639 return -ENODEV; 2640 } 2641 } 2642 2643 return ret; 2644 } 2645 2646 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2647 { 2648 int ret; 2649 2650 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2651 if (shutdown) 2652 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2653 else 2654 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2655 2656 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2657 if (ret) 2658 return ret; 2659 2660 if (shutdown) { 2661 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2662 NVME_CSTS_SHST_CMPLT, 2663 ctrl->shutdown_timeout, "shutdown"); 2664 } 2665 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2666 msleep(NVME_QUIRK_DELAY_AMOUNT); 2667 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2668 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2669 } 2670 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2671 2672 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2673 { 2674 unsigned dev_page_min; 2675 u32 timeout; 2676 int ret; 2677 2678 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2679 if (ret) { 2680 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2681 return ret; 2682 } 2683 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2684 2685 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2686 dev_err(ctrl->device, 2687 "Minimum device page size %u too large for host (%u)\n", 2688 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2689 return -ENODEV; 2690 } 2691 2692 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2693 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2694 else 2695 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2696 2697 /* 2698 * Setting CRIME results in CSTS.RDY before the media is ready. This 2699 * makes it possible for media related commands to return the error 2700 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is 2701 * restructured to handle retries, disable CC.CRIME. 2702 */ 2703 ctrl->ctrl_config &= ~NVME_CC_CRIME; 2704 2705 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2706 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2707 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2708 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2709 if (ret) 2710 return ret; 2711 2712 /* CAP value may change after initial CC write */ 2713 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2714 if (ret) 2715 return ret; 2716 2717 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2718 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2719 u32 crto, ready_timeout; 2720 2721 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2722 if (ret) { 2723 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2724 ret); 2725 return ret; 2726 } 2727 2728 /* 2729 * CRTO should always be greater or equal to CAP.TO, but some 2730 * devices are known to get this wrong. Use the larger of the 2731 * two values. 2732 */ 2733 ready_timeout = NVME_CRTO_CRWMT(crto); 2734 2735 if (ready_timeout < timeout) 2736 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2737 crto, ctrl->cap); 2738 else 2739 timeout = ready_timeout; 2740 } 2741 2742 ctrl->ctrl_config |= NVME_CC_ENABLE; 2743 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2744 if (ret) 2745 return ret; 2746 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2747 (timeout + 1) / 2, "initialisation"); 2748 } 2749 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2750 2751 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2752 { 2753 __le64 ts; 2754 int ret; 2755 2756 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2757 return 0; 2758 2759 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2760 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2761 NULL); 2762 if (ret) 2763 dev_warn_once(ctrl->device, 2764 "could not set timestamp (%d)\n", ret); 2765 return ret; 2766 } 2767 2768 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2769 { 2770 struct nvme_feat_host_behavior *host; 2771 u8 acre = 0, lbafee = 0; 2772 int ret; 2773 2774 /* Don't bother enabling the feature if retry delay is not reported */ 2775 if (ctrl->crdt[0]) 2776 acre = NVME_ENABLE_ACRE; 2777 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2778 lbafee = NVME_ENABLE_LBAFEE; 2779 2780 if (!acre && !lbafee) 2781 return 0; 2782 2783 host = kzalloc_obj(*host); 2784 if (!host) 2785 return 0; 2786 2787 host->acre = acre; 2788 host->lbafee = lbafee; 2789 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2790 host, sizeof(*host), NULL); 2791 kfree(host); 2792 return ret; 2793 } 2794 2795 /* 2796 * The function checks whether the given total (exlat + enlat) latency of 2797 * a power state allows the latter to be used as an APST transition target. 2798 * It does so by comparing the latency to the primary and secondary latency 2799 * tolerances defined by module params. If there's a match, the corresponding 2800 * timeout value is returned and the matching tolerance index (1 or 2) is 2801 * reported. 2802 */ 2803 static bool nvme_apst_get_transition_time(u64 total_latency, 2804 u64 *transition_time, unsigned *last_index) 2805 { 2806 if (total_latency <= apst_primary_latency_tol_us) { 2807 if (*last_index == 1) 2808 return false; 2809 *last_index = 1; 2810 *transition_time = apst_primary_timeout_ms; 2811 return true; 2812 } 2813 if (apst_secondary_timeout_ms && 2814 total_latency <= apst_secondary_latency_tol_us) { 2815 if (*last_index <= 2) 2816 return false; 2817 *last_index = 2; 2818 *transition_time = apst_secondary_timeout_ms; 2819 return true; 2820 } 2821 return false; 2822 } 2823 2824 /* 2825 * APST (Autonomous Power State Transition) lets us program a table of power 2826 * state transitions that the controller will perform automatically. 2827 * 2828 * Depending on module params, one of the two supported techniques will be used: 2829 * 2830 * - If the parameters provide explicit timeouts and tolerances, they will be 2831 * used to build a table with up to 2 non-operational states to transition to. 2832 * The default parameter values were selected based on the values used by 2833 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2834 * regeneration of the APST table in the event of switching between external 2835 * and battery power, the timeouts and tolerances reflect a compromise 2836 * between values used by Microsoft for AC and battery scenarios. 2837 * - If not, we'll configure the table with a simple heuristic: we are willing 2838 * to spend at most 2% of the time transitioning between power states. 2839 * Therefore, when running in any given state, we will enter the next 2840 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2841 * microseconds, as long as that state's exit latency is under the requested 2842 * maximum latency. 2843 * 2844 * We will not autonomously enter any non-operational state for which the total 2845 * latency exceeds ps_max_latency_us. 2846 * 2847 * Users can set ps_max_latency_us to zero to turn off APST. 2848 */ 2849 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2850 { 2851 struct nvme_feat_auto_pst *table; 2852 unsigned apste = 0; 2853 u64 max_lat_us = 0; 2854 __le64 target = 0; 2855 int max_ps = -1; 2856 int state; 2857 int ret; 2858 unsigned last_lt_index = UINT_MAX; 2859 2860 /* 2861 * If APST isn't supported or if we haven't been initialized yet, 2862 * then don't do anything. 2863 */ 2864 if (!ctrl->apsta) 2865 return 0; 2866 2867 if (ctrl->npss > 31) { 2868 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2869 return 0; 2870 } 2871 2872 table = kzalloc_obj(*table); 2873 if (!table) 2874 return 0; 2875 2876 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2877 /* Turn off APST. */ 2878 dev_dbg(ctrl->device, "APST disabled\n"); 2879 goto done; 2880 } 2881 2882 /* 2883 * Walk through all states from lowest- to highest-power. 2884 * According to the spec, lower-numbered states use more power. NPSS, 2885 * despite the name, is the index of the lowest-power state, not the 2886 * number of states. 2887 */ 2888 for (state = (int)ctrl->npss; state >= 0; state--) { 2889 u64 total_latency_us, exit_latency_us, transition_ms; 2890 2891 if (target) 2892 table->entries[state] = target; 2893 2894 /* 2895 * Don't allow transitions to the deepest state if it's quirked 2896 * off. 2897 */ 2898 if (state == ctrl->npss && 2899 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2900 continue; 2901 2902 /* 2903 * Is this state a useful non-operational state for higher-power 2904 * states to autonomously transition to? 2905 */ 2906 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2907 continue; 2908 2909 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2910 if (exit_latency_us > ctrl->ps_max_latency_us) 2911 continue; 2912 2913 total_latency_us = exit_latency_us + 2914 le32_to_cpu(ctrl->psd[state].entry_lat); 2915 2916 /* 2917 * This state is good. It can be used as the APST idle target 2918 * for higher power states. 2919 */ 2920 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2921 if (!nvme_apst_get_transition_time(total_latency_us, 2922 &transition_ms, &last_lt_index)) 2923 continue; 2924 } else { 2925 transition_ms = total_latency_us + 19; 2926 do_div(transition_ms, 20); 2927 if (transition_ms > (1 << 24) - 1) 2928 transition_ms = (1 << 24) - 1; 2929 } 2930 2931 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2932 if (max_ps == -1) 2933 max_ps = state; 2934 if (total_latency_us > max_lat_us) 2935 max_lat_us = total_latency_us; 2936 } 2937 2938 if (max_ps == -1) 2939 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2940 else 2941 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2942 max_ps, max_lat_us, (int)sizeof(*table), table); 2943 apste = 1; 2944 2945 done: 2946 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2947 table, sizeof(*table), NULL); 2948 if (ret) 2949 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2950 kfree(table); 2951 return ret; 2952 } 2953 2954 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2955 { 2956 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2957 u64 latency; 2958 2959 switch (val) { 2960 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2961 case PM_QOS_LATENCY_ANY: 2962 latency = U64_MAX; 2963 break; 2964 2965 default: 2966 latency = val; 2967 } 2968 2969 if (ctrl->ps_max_latency_us != latency) { 2970 ctrl->ps_max_latency_us = latency; 2971 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2972 nvme_configure_apst(ctrl); 2973 } 2974 } 2975 2976 struct nvme_core_quirk_entry { 2977 /* 2978 * NVMe model and firmware strings are padded with spaces. For 2979 * simplicity, strings in the quirk table are padded with NULLs 2980 * instead. 2981 */ 2982 u16 vid; 2983 const char *mn; 2984 const char *fr; 2985 unsigned long quirks; 2986 }; 2987 2988 static const struct nvme_core_quirk_entry core_quirks[] = { 2989 { 2990 /* 2991 * This Toshiba device seems to die using any APST states. See: 2992 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2993 */ 2994 .vid = 0x1179, 2995 .mn = "THNSF5256GPUK TOSHIBA", 2996 .quirks = NVME_QUIRK_NO_APST, 2997 }, 2998 { 2999 /* 3000 * This LiteON CL1-3D*-Q11 firmware version has a race 3001 * condition associated with actions related to suspend to idle 3002 * LiteON has resolved the problem in future firmware 3003 */ 3004 .vid = 0x14a4, 3005 .fr = "22301111", 3006 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 3007 }, 3008 { 3009 /* 3010 * This Kioxia CD6-V Series / HPE PE8030 device times out and 3011 * aborts I/O during any load, but more easily reproducible 3012 * with discards (fstrim). 3013 * 3014 * The device is left in a state where it is also not possible 3015 * to use "nvme set-feature" to disable APST, but booting with 3016 * nvme_core.default_ps_max_latency=0 works. 3017 */ 3018 .vid = 0x1e0f, 3019 .mn = "KCD6XVUL6T40", 3020 .quirks = NVME_QUIRK_NO_APST, 3021 }, 3022 { 3023 /* 3024 * The external Samsung X5 SSD fails initialization without a 3025 * delay before checking if it is ready and has a whole set of 3026 * other problems. To make this even more interesting, it 3027 * shares the PCI ID with internal Samsung 970 Evo Plus that 3028 * does not need or want these quirks. 3029 */ 3030 .vid = 0x144d, 3031 .mn = "Samsung Portable SSD X5", 3032 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 3033 NVME_QUIRK_NO_DEEPEST_PS | 3034 NVME_QUIRK_IGNORE_DEV_SUBNQN, 3035 } 3036 }; 3037 3038 /* match is null-terminated but idstr is space-padded. */ 3039 static bool string_matches(const char *idstr, const char *match, size_t len) 3040 { 3041 size_t matchlen; 3042 3043 if (!match) 3044 return true; 3045 3046 matchlen = strlen(match); 3047 WARN_ON_ONCE(matchlen > len); 3048 3049 if (memcmp(idstr, match, matchlen)) 3050 return false; 3051 3052 for (; matchlen < len; matchlen++) 3053 if (idstr[matchlen] != ' ') 3054 return false; 3055 3056 return true; 3057 } 3058 3059 static bool quirk_matches(const struct nvme_id_ctrl *id, 3060 const struct nvme_core_quirk_entry *q) 3061 { 3062 return q->vid == le16_to_cpu(id->vid) && 3063 string_matches(id->mn, q->mn, sizeof(id->mn)) && 3064 string_matches(id->fr, q->fr, sizeof(id->fr)); 3065 } 3066 3067 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 3068 struct nvme_id_ctrl *id) 3069 { 3070 size_t nqnlen; 3071 int off; 3072 3073 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 3074 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 3075 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 3076 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 3077 return; 3078 } 3079 3080 if (ctrl->vs >= NVME_VS(1, 2, 1)) 3081 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 3082 } 3083 3084 /* 3085 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 3086 * Base Specification 2.0. It is slightly different from the format 3087 * specified there due to historic reasons, and we can't change it now. 3088 */ 3089 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 3090 "nqn.2014.08.org.nvmexpress:%04x%04x", 3091 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 3092 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 3093 off += sizeof(id->sn); 3094 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 3095 off += sizeof(id->mn); 3096 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 3097 } 3098 3099 static void nvme_release_subsystem(struct device *dev) 3100 { 3101 struct nvme_subsystem *subsys = 3102 container_of(dev, struct nvme_subsystem, dev); 3103 3104 if (subsys->instance >= 0) 3105 ida_free(&nvme_instance_ida, subsys->instance); 3106 kfree(subsys); 3107 } 3108 3109 static void nvme_destroy_subsystem(struct kref *ref) 3110 { 3111 struct nvme_subsystem *subsys = 3112 container_of(ref, struct nvme_subsystem, ref); 3113 3114 mutex_lock(&nvme_subsystems_lock); 3115 list_del(&subsys->entry); 3116 mutex_unlock(&nvme_subsystems_lock); 3117 3118 ida_destroy(&subsys->ns_ida); 3119 device_del(&subsys->dev); 3120 put_device(&subsys->dev); 3121 } 3122 3123 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 3124 { 3125 kref_put(&subsys->ref, nvme_destroy_subsystem); 3126 } 3127 3128 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 3129 { 3130 struct nvme_subsystem *subsys; 3131 3132 lockdep_assert_held(&nvme_subsystems_lock); 3133 3134 /* 3135 * Fail matches for discovery subsystems. This results 3136 * in each discovery controller bound to a unique subsystem. 3137 * This avoids issues with validating controller values 3138 * that can only be true when there is a single unique subsystem. 3139 * There may be multiple and completely independent entities 3140 * that provide discovery controllers. 3141 */ 3142 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 3143 return NULL; 3144 3145 list_for_each_entry(subsys, &nvme_subsystems, entry) { 3146 if (strcmp(subsys->subnqn, subsysnqn)) 3147 continue; 3148 if (!kref_get_unless_zero(&subsys->ref)) 3149 continue; 3150 return subsys; 3151 } 3152 3153 return NULL; 3154 } 3155 3156 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 3157 { 3158 return ctrl->opts && ctrl->opts->discovery_nqn; 3159 } 3160 3161 static inline bool nvme_admin_ctrl(struct nvme_ctrl *ctrl) 3162 { 3163 return ctrl->cntrltype == NVME_CTRL_ADMIN; 3164 } 3165 3166 static inline bool nvme_is_io_ctrl(struct nvme_ctrl *ctrl) 3167 { 3168 return !nvme_discovery_ctrl(ctrl) && !nvme_admin_ctrl(ctrl); 3169 } 3170 3171 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 3172 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3173 { 3174 struct nvme_ctrl *tmp; 3175 3176 lockdep_assert_held(&nvme_subsystems_lock); 3177 3178 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 3179 if (nvme_state_terminal(tmp)) 3180 continue; 3181 3182 if (tmp->cntlid == ctrl->cntlid) { 3183 dev_err(ctrl->device, 3184 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 3185 ctrl->cntlid, dev_name(tmp->device), 3186 subsys->subnqn); 3187 return false; 3188 } 3189 3190 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 3191 nvme_discovery_ctrl(ctrl)) 3192 continue; 3193 3194 dev_err(ctrl->device, 3195 "Subsystem does not support multiple controllers\n"); 3196 return false; 3197 } 3198 3199 return true; 3200 } 3201 3202 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3203 { 3204 struct nvme_subsystem *subsys, *found; 3205 int ret; 3206 3207 subsys = kzalloc_obj(*subsys); 3208 if (!subsys) 3209 return -ENOMEM; 3210 3211 subsys->instance = -1; 3212 mutex_init(&subsys->lock); 3213 kref_init(&subsys->ref); 3214 INIT_LIST_HEAD(&subsys->ctrls); 3215 INIT_LIST_HEAD(&subsys->nsheads); 3216 nvme_init_subnqn(subsys, ctrl, id); 3217 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 3218 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 3219 subsys->vendor_id = le16_to_cpu(id->vid); 3220 subsys->cmic = id->cmic; 3221 3222 /* Versions prior to 1.4 don't necessarily report a valid type */ 3223 if (id->cntrltype == NVME_CTRL_DISC || 3224 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 3225 subsys->subtype = NVME_NQN_DISC; 3226 else 3227 subsys->subtype = NVME_NQN_NVME; 3228 3229 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 3230 dev_err(ctrl->device, 3231 "Subsystem %s is not a discovery controller", 3232 subsys->subnqn); 3233 kfree(subsys); 3234 return -EINVAL; 3235 } 3236 nvme_mpath_default_iopolicy(subsys); 3237 3238 subsys->dev.class = &nvme_subsys_class; 3239 subsys->dev.release = nvme_release_subsystem; 3240 subsys->dev.groups = nvme_subsys_attrs_groups; 3241 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 3242 device_initialize(&subsys->dev); 3243 3244 mutex_lock(&nvme_subsystems_lock); 3245 found = __nvme_find_get_subsystem(subsys->subnqn); 3246 if (found) { 3247 put_device(&subsys->dev); 3248 subsys = found; 3249 3250 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 3251 ret = -EINVAL; 3252 goto out_put_subsystem; 3253 } 3254 } else { 3255 ret = device_add(&subsys->dev); 3256 if (ret) { 3257 dev_err(ctrl->device, 3258 "failed to register subsystem device.\n"); 3259 put_device(&subsys->dev); 3260 goto out_unlock; 3261 } 3262 ida_init(&subsys->ns_ida); 3263 list_add_tail(&subsys->entry, &nvme_subsystems); 3264 } 3265 3266 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 3267 dev_name(ctrl->device)); 3268 if (ret) { 3269 dev_err(ctrl->device, 3270 "failed to create sysfs link from subsystem.\n"); 3271 goto out_put_subsystem; 3272 } 3273 3274 if (!found) 3275 subsys->instance = ctrl->instance; 3276 ctrl->subsys = subsys; 3277 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 3278 mutex_unlock(&nvme_subsystems_lock); 3279 return 0; 3280 3281 out_put_subsystem: 3282 nvme_put_subsystem(subsys); 3283 out_unlock: 3284 mutex_unlock(&nvme_subsystems_lock); 3285 return ret; 3286 } 3287 3288 static int nvme_get_log_lsi(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, 3289 u8 lsp, u8 csi, void *log, size_t size, u64 offset, u16 lsi) 3290 { 3291 struct nvme_command c = { }; 3292 u32 dwlen = nvme_bytes_to_numd(size); 3293 3294 c.get_log_page.opcode = nvme_admin_get_log_page; 3295 c.get_log_page.nsid = cpu_to_le32(nsid); 3296 c.get_log_page.lid = log_page; 3297 c.get_log_page.lsp = lsp; 3298 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 3299 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 3300 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 3301 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 3302 c.get_log_page.csi = csi; 3303 c.get_log_page.lsi = cpu_to_le16(lsi); 3304 3305 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 3306 } 3307 3308 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 3309 void *log, size_t size, u64 offset) 3310 { 3311 return nvme_get_log_lsi(ctrl, nsid, log_page, lsp, csi, log, size, 3312 offset, 0); 3313 } 3314 3315 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 3316 struct nvme_effects_log **log) 3317 { 3318 struct nvme_effects_log *old, *cel = xa_load(&ctrl->cels, csi); 3319 int ret; 3320 3321 if (cel) 3322 goto out; 3323 3324 cel = kzalloc_obj(*cel); 3325 if (!cel) 3326 return -ENOMEM; 3327 3328 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 3329 cel, sizeof(*cel), 0); 3330 if (ret) { 3331 kfree(cel); 3332 return ret; 3333 } 3334 3335 old = xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 3336 if (xa_is_err(old)) { 3337 kfree(cel); 3338 return xa_err(old); 3339 } 3340 out: 3341 *log = cel; 3342 return 0; 3343 } 3344 3345 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 3346 { 3347 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 3348 3349 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 3350 return UINT_MAX; 3351 return val; 3352 } 3353 3354 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 3355 { 3356 struct nvme_command c = { }; 3357 struct nvme_id_ctrl_nvm *id; 3358 int ret; 3359 3360 /* 3361 * Even though NVMe spec explicitly states that MDTS is not applicable 3362 * to the write-zeroes, we are cautious and limit the size to the 3363 * controllers max_hw_sectors value, which is based on the MDTS field 3364 * and possibly other limiting factors. 3365 */ 3366 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 3367 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 3368 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 3369 else 3370 ctrl->max_zeroes_sectors = 0; 3371 3372 if (!nvme_is_io_ctrl(ctrl) || 3373 !nvme_id_cns_ok(ctrl, NVME_ID_CNS_CS_CTRL) || 3374 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 3375 return 0; 3376 3377 id = kzalloc_obj(*id); 3378 if (!id) 3379 return -ENOMEM; 3380 3381 c.identify.opcode = nvme_admin_identify; 3382 c.identify.cns = NVME_ID_CNS_CS_CTRL; 3383 c.identify.csi = NVME_CSI_NVM; 3384 3385 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 3386 if (ret) 3387 goto free_data; 3388 3389 ctrl->dmrl = id->dmrl; 3390 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 3391 if (id->wzsl) 3392 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 3393 3394 free_data: 3395 if (ret > 0) 3396 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 3397 kfree(id); 3398 return ret; 3399 } 3400 3401 static int nvme_init_effects_log(struct nvme_ctrl *ctrl, 3402 u8 csi, struct nvme_effects_log **log) 3403 { 3404 struct nvme_effects_log *effects, *old; 3405 3406 effects = kzalloc_obj(*effects); 3407 if (!effects) 3408 return -ENOMEM; 3409 3410 old = xa_store(&ctrl->cels, csi, effects, GFP_KERNEL); 3411 if (xa_is_err(old)) { 3412 kfree(effects); 3413 return xa_err(old); 3414 } 3415 3416 *log = effects; 3417 return 0; 3418 } 3419 3420 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 3421 { 3422 struct nvme_effects_log *log = ctrl->effects; 3423 3424 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 3425 NVME_CMD_EFFECTS_NCC | 3426 NVME_CMD_EFFECTS_CSE_MASK); 3427 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 3428 NVME_CMD_EFFECTS_CSE_MASK); 3429 3430 /* 3431 * The spec says the result of a security receive command depends on 3432 * the previous security send command. As such, many vendors log this 3433 * command as one to submitted only when no other commands to the same 3434 * namespace are outstanding. The intention is to tell the host to 3435 * prevent mixing security send and receive. 3436 * 3437 * This driver can only enforce such exclusive access against IO 3438 * queues, though. We are not readily able to enforce such a rule for 3439 * two commands to the admin queue, which is the only queue that 3440 * matters for this command. 3441 * 3442 * Rather than blindly freezing the IO queues for this effect that 3443 * doesn't even apply to IO, mask it off. 3444 */ 3445 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 3446 3447 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3448 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3449 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3450 } 3451 3452 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3453 { 3454 int ret = 0; 3455 3456 if (ctrl->effects) 3457 return 0; 3458 3459 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3460 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3461 if (ret < 0) 3462 return ret; 3463 } 3464 3465 if (!ctrl->effects) { 3466 ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3467 if (ret < 0) 3468 return ret; 3469 } 3470 3471 nvme_init_known_nvm_effects(ctrl); 3472 return 0; 3473 } 3474 3475 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3476 { 3477 /* 3478 * In fabrics we need to verify the cntlid matches the 3479 * admin connect 3480 */ 3481 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3482 dev_err(ctrl->device, 3483 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n", 3484 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3485 return -EINVAL; 3486 } 3487 3488 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3489 dev_err(ctrl->device, 3490 "keep-alive support is mandatory for fabrics\n"); 3491 return -EINVAL; 3492 } 3493 3494 if (nvme_is_io_ctrl(ctrl) && ctrl->ioccsz < 4) { 3495 dev_err(ctrl->device, 3496 "I/O queue command capsule supported size %d < 4\n", 3497 ctrl->ioccsz); 3498 return -EINVAL; 3499 } 3500 3501 if (nvme_is_io_ctrl(ctrl) && ctrl->iorcsz < 1) { 3502 dev_err(ctrl->device, 3503 "I/O queue response capsule supported size %d < 1\n", 3504 ctrl->iorcsz); 3505 return -EINVAL; 3506 } 3507 3508 if (!ctrl->maxcmd) { 3509 dev_warn(ctrl->device, 3510 "Firmware bug: maximum outstanding commands is 0\n"); 3511 ctrl->maxcmd = ctrl->sqsize + 1; 3512 } 3513 3514 return 0; 3515 } 3516 3517 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3518 { 3519 struct queue_limits lim; 3520 struct nvme_id_ctrl *id; 3521 u32 max_hw_sectors; 3522 bool prev_apst_enabled; 3523 int ret; 3524 3525 ret = nvme_identify_ctrl(ctrl, &id); 3526 if (ret) { 3527 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3528 return -EIO; 3529 } 3530 3531 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3532 ctrl->cntlid = le16_to_cpu(id->cntlid); 3533 3534 if (!ctrl->identified) { 3535 unsigned int i; 3536 3537 /* 3538 * Check for quirks. Quirk can depend on firmware version, 3539 * so, in principle, the set of quirks present can change 3540 * across a reset. As a possible future enhancement, we 3541 * could re-scan for quirks every time we reinitialize 3542 * the device, but we'd have to make sure that the driver 3543 * behaves intelligently if the quirks change. 3544 */ 3545 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3546 if (quirk_matches(id, &core_quirks[i])) 3547 ctrl->quirks |= core_quirks[i].quirks; 3548 } 3549 3550 ret = nvme_init_subsystem(ctrl, id); 3551 if (ret) 3552 goto out_free; 3553 3554 ret = nvme_init_effects(ctrl, id); 3555 if (ret) 3556 goto out_free; 3557 } 3558 memcpy(ctrl->subsys->firmware_rev, id->fr, 3559 sizeof(ctrl->subsys->firmware_rev)); 3560 3561 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3562 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3563 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3564 } 3565 3566 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3567 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3568 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3569 3570 ctrl->oacs = le16_to_cpu(id->oacs); 3571 ctrl->oncs = le16_to_cpu(id->oncs); 3572 ctrl->mtfa = le16_to_cpu(id->mtfa); 3573 ctrl->oaes = le32_to_cpu(id->oaes); 3574 ctrl->wctemp = le16_to_cpu(id->wctemp); 3575 ctrl->cctemp = le16_to_cpu(id->cctemp); 3576 3577 atomic_set(&ctrl->abort_limit, id->acl + 1); 3578 ctrl->vwc = id->vwc; 3579 if (id->mdts) 3580 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3581 else 3582 max_hw_sectors = UINT_MAX; 3583 ctrl->max_hw_sectors = 3584 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3585 3586 lim = queue_limits_start_update(ctrl->admin_q); 3587 nvme_set_ctrl_limits(ctrl, &lim, true); 3588 ret = queue_limits_commit_update(ctrl->admin_q, &lim); 3589 if (ret) 3590 goto out_free; 3591 3592 ctrl->sgls = le32_to_cpu(id->sgls); 3593 ctrl->kas = le16_to_cpu(id->kas); 3594 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3595 ctrl->ctratt = le32_to_cpu(id->ctratt); 3596 3597 ctrl->cntrltype = id->cntrltype; 3598 ctrl->dctype = id->dctype; 3599 3600 if (id->rtd3e) { 3601 /* us -> s */ 3602 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3603 3604 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3605 shutdown_timeout, 60); 3606 3607 if (ctrl->shutdown_timeout != shutdown_timeout) 3608 dev_info(ctrl->device, 3609 "D3 entry latency set to %u seconds\n", 3610 ctrl->shutdown_timeout); 3611 } else 3612 ctrl->shutdown_timeout = shutdown_timeout; 3613 3614 ctrl->npss = id->npss; 3615 ctrl->apsta = id->apsta; 3616 prev_apst_enabled = ctrl->apst_enabled; 3617 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3618 if (force_apst && id->apsta) { 3619 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3620 ctrl->apst_enabled = true; 3621 } else { 3622 ctrl->apst_enabled = false; 3623 } 3624 } else { 3625 ctrl->apst_enabled = id->apsta; 3626 } 3627 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3628 3629 if (ctrl->ops->flags & NVME_F_FABRICS) { 3630 ctrl->icdoff = le16_to_cpu(id->icdoff); 3631 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3632 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3633 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3634 3635 ret = nvme_check_ctrl_fabric_info(ctrl, id); 3636 if (ret) 3637 goto out_free; 3638 } else { 3639 ctrl->hmpre = le32_to_cpu(id->hmpre); 3640 ctrl->hmmin = le32_to_cpu(id->hmmin); 3641 ctrl->hmminds = le32_to_cpu(id->hmminds); 3642 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3643 } 3644 3645 ret = nvme_mpath_init_identify(ctrl, id); 3646 if (ret < 0) 3647 goto out_free; 3648 3649 if (ctrl->apst_enabled && !prev_apst_enabled) 3650 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3651 else if (!ctrl->apst_enabled && prev_apst_enabled) 3652 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3653 ctrl->awupf = le16_to_cpu(id->awupf); 3654 out_free: 3655 kfree(id); 3656 return ret; 3657 } 3658 3659 /* 3660 * Initialize the cached copies of the Identify data and various controller 3661 * register in our nvme_ctrl structure. This should be called as soon as 3662 * the admin queue is fully up and running. 3663 */ 3664 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3665 { 3666 int ret; 3667 3668 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3669 if (ret) { 3670 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3671 return ret; 3672 } 3673 3674 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3675 3676 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3677 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3678 3679 ret = nvme_init_identify(ctrl); 3680 if (ret) 3681 return ret; 3682 3683 if (nvme_admin_ctrl(ctrl)) { 3684 /* 3685 * An admin controller has one admin queue, but no I/O queues. 3686 * Override queue_count so it only creates an admin queue. 3687 */ 3688 dev_dbg(ctrl->device, 3689 "Subsystem %s is an administrative controller", 3690 ctrl->subsys->subnqn); 3691 ctrl->queue_count = 1; 3692 } 3693 3694 ret = nvme_configure_apst(ctrl); 3695 if (ret < 0) 3696 return ret; 3697 3698 ret = nvme_configure_timestamp(ctrl); 3699 if (ret < 0) 3700 return ret; 3701 3702 ret = nvme_configure_host_options(ctrl); 3703 if (ret < 0) 3704 return ret; 3705 3706 nvme_configure_opal(ctrl, was_suspended); 3707 3708 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3709 /* 3710 * Do not return errors unless we are in a controller reset, 3711 * the controller works perfectly fine without hwmon. 3712 */ 3713 ret = nvme_hwmon_init(ctrl); 3714 if (ret == -EINTR) 3715 return ret; 3716 } 3717 3718 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3719 ctrl->identified = true; 3720 3721 nvme_start_keep_alive(ctrl); 3722 3723 return 0; 3724 } 3725 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3726 3727 static int nvme_dev_open(struct inode *inode, struct file *file) 3728 { 3729 struct nvme_ctrl *ctrl = 3730 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3731 3732 switch (nvme_ctrl_state(ctrl)) { 3733 case NVME_CTRL_LIVE: 3734 break; 3735 default: 3736 return -EWOULDBLOCK; 3737 } 3738 3739 nvme_get_ctrl(ctrl); 3740 if (!try_module_get(ctrl->ops->module)) { 3741 nvme_put_ctrl(ctrl); 3742 return -EINVAL; 3743 } 3744 3745 file->private_data = ctrl; 3746 return 0; 3747 } 3748 3749 static int nvme_dev_release(struct inode *inode, struct file *file) 3750 { 3751 struct nvme_ctrl *ctrl = 3752 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3753 3754 module_put(ctrl->ops->module); 3755 nvme_put_ctrl(ctrl); 3756 return 0; 3757 } 3758 3759 static const struct file_operations nvme_dev_fops = { 3760 .owner = THIS_MODULE, 3761 .open = nvme_dev_open, 3762 .release = nvme_dev_release, 3763 .unlocked_ioctl = nvme_dev_ioctl, 3764 .compat_ioctl = compat_ptr_ioctl, 3765 .uring_cmd = nvme_dev_uring_cmd, 3766 }; 3767 3768 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3769 unsigned nsid) 3770 { 3771 struct nvme_ns_head *h; 3772 3773 lockdep_assert_held(&ctrl->subsys->lock); 3774 3775 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3776 /* 3777 * Private namespaces can share NSIDs under some conditions. 3778 * In that case we can't use the same ns_head for namespaces 3779 * with the same NSID. 3780 */ 3781 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3782 continue; 3783 if (nvme_tryget_ns_head(h)) 3784 return h; 3785 } 3786 3787 return NULL; 3788 } 3789 3790 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3791 struct nvme_ns_ids *ids) 3792 { 3793 bool has_uuid = !uuid_is_null(&ids->uuid); 3794 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3795 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3796 struct nvme_ns_head *h; 3797 3798 lockdep_assert_held(&subsys->lock); 3799 3800 list_for_each_entry(h, &subsys->nsheads, entry) { 3801 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3802 return -EINVAL; 3803 if (has_nguid && 3804 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3805 return -EINVAL; 3806 if (has_eui64 && 3807 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3808 return -EINVAL; 3809 } 3810 3811 return 0; 3812 } 3813 3814 static void nvme_cdev_rel(struct device *dev) 3815 { 3816 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3817 } 3818 3819 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3820 { 3821 cdev_device_del(cdev, cdev_device); 3822 put_device(cdev_device); 3823 } 3824 3825 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3826 const struct file_operations *fops, struct module *owner) 3827 { 3828 int minor, ret; 3829 3830 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3831 if (minor < 0) 3832 return minor; 3833 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3834 cdev_device->class = &nvme_ns_chr_class; 3835 cdev_device->release = nvme_cdev_rel; 3836 device_initialize(cdev_device); 3837 cdev_init(cdev, fops); 3838 cdev->owner = owner; 3839 ret = cdev_device_add(cdev, cdev_device); 3840 if (ret) 3841 put_device(cdev_device); 3842 3843 return ret; 3844 } 3845 3846 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3847 { 3848 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3849 } 3850 3851 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3852 { 3853 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3854 return 0; 3855 } 3856 3857 static const struct file_operations nvme_ns_chr_fops = { 3858 .owner = THIS_MODULE, 3859 .open = nvme_ns_chr_open, 3860 .release = nvme_ns_chr_release, 3861 .unlocked_ioctl = nvme_ns_chr_ioctl, 3862 .compat_ioctl = compat_ptr_ioctl, 3863 .uring_cmd = nvme_ns_chr_uring_cmd, 3864 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3865 }; 3866 3867 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3868 { 3869 int ret; 3870 3871 ns->cdev_device.parent = ns->ctrl->device; 3872 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3873 ns->ctrl->instance, ns->head->instance); 3874 if (ret) 3875 return ret; 3876 3877 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3878 ns->ctrl->ops->module); 3879 } 3880 3881 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3882 struct nvme_ns_info *info) 3883 { 3884 struct nvme_ns_head *head; 3885 size_t size = sizeof(*head); 3886 int ret = -ENOMEM; 3887 3888 #ifdef CONFIG_NVME_MULTIPATH 3889 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3890 #endif 3891 3892 head = kzalloc(size, GFP_KERNEL); 3893 if (!head) 3894 goto out; 3895 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3896 if (ret < 0) 3897 goto out_free_head; 3898 head->instance = ret; 3899 INIT_LIST_HEAD(&head->list); 3900 ret = init_srcu_struct(&head->srcu); 3901 if (ret) 3902 goto out_ida_remove; 3903 head->subsys = ctrl->subsys; 3904 head->ns_id = info->nsid; 3905 head->ids = info->ids; 3906 head->shared = info->is_shared; 3907 head->rotational = info->is_rotational; 3908 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1); 3909 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE); 3910 kref_init(&head->ref); 3911 3912 if (head->ids.csi) { 3913 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3914 if (ret) 3915 goto out_cleanup_srcu; 3916 } else 3917 head->effects = ctrl->effects; 3918 3919 ret = nvme_mpath_alloc_disk(ctrl, head); 3920 if (ret) 3921 goto out_cleanup_srcu; 3922 3923 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3924 3925 kref_get(&ctrl->subsys->ref); 3926 3927 return head; 3928 out_cleanup_srcu: 3929 cleanup_srcu_struct(&head->srcu); 3930 out_ida_remove: 3931 ida_free(&ctrl->subsys->ns_ida, head->instance); 3932 out_free_head: 3933 kfree(head); 3934 out: 3935 if (ret > 0) 3936 ret = blk_status_to_errno(nvme_error_status(ret)); 3937 return ERR_PTR(ret); 3938 } 3939 3940 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3941 struct nvme_ns_ids *ids) 3942 { 3943 struct nvme_subsystem *s; 3944 int ret = 0; 3945 3946 /* 3947 * Note that this check is racy as we try to avoid holding the global 3948 * lock over the whole ns_head creation. But it is only intended as 3949 * a sanity check anyway. 3950 */ 3951 mutex_lock(&nvme_subsystems_lock); 3952 list_for_each_entry(s, &nvme_subsystems, entry) { 3953 if (s == this) 3954 continue; 3955 mutex_lock(&s->lock); 3956 ret = nvme_subsys_check_duplicate_ids(s, ids); 3957 mutex_unlock(&s->lock); 3958 if (ret) 3959 break; 3960 } 3961 mutex_unlock(&nvme_subsystems_lock); 3962 3963 return ret; 3964 } 3965 3966 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3967 { 3968 struct nvme_ctrl *ctrl = ns->ctrl; 3969 struct nvme_ns_head *head = NULL; 3970 int ret; 3971 3972 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3973 if (ret) { 3974 /* 3975 * We've found two different namespaces on two different 3976 * subsystems that report the same ID. This is pretty nasty 3977 * for anything that actually requires unique device 3978 * identification. In the kernel we need this for multipathing, 3979 * and in user space the /dev/disk/by-id/ links rely on it. 3980 * 3981 * If the device also claims to be multi-path capable back off 3982 * here now and refuse the probe the second device as this is a 3983 * recipe for data corruption. If not this is probably a 3984 * cheap consumer device if on the PCIe bus, so let the user 3985 * proceed and use the shiny toy, but warn that with changing 3986 * probing order (which due to our async probing could just be 3987 * device taking longer to startup) the other device could show 3988 * up at any time. 3989 */ 3990 nvme_print_device_info(ctrl); 3991 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3992 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3993 info->is_shared)) { 3994 dev_err(ctrl->device, 3995 "ignoring nsid %d because of duplicate IDs\n", 3996 info->nsid); 3997 return ret; 3998 } 3999 4000 dev_err(ctrl->device, 4001 "clearing duplicate IDs for nsid %d\n", info->nsid); 4002 dev_err(ctrl->device, 4003 "use of /dev/disk/by-id/ may cause data corruption\n"); 4004 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 4005 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 4006 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 4007 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 4008 } 4009 4010 mutex_lock(&ctrl->subsys->lock); 4011 head = nvme_find_ns_head(ctrl, info->nsid); 4012 if (!head) { 4013 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 4014 if (ret) { 4015 dev_err(ctrl->device, 4016 "duplicate IDs in subsystem for nsid %d\n", 4017 info->nsid); 4018 goto out_unlock; 4019 } 4020 head = nvme_alloc_ns_head(ctrl, info); 4021 if (IS_ERR(head)) { 4022 ret = PTR_ERR(head); 4023 goto out_unlock; 4024 } 4025 } else { 4026 ret = -EINVAL; 4027 if ((!info->is_shared || !head->shared) && 4028 !list_empty(&head->list)) { 4029 dev_err(ctrl->device, 4030 "Duplicate unshared namespace %d\n", 4031 info->nsid); 4032 goto out_put_ns_head; 4033 } 4034 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 4035 dev_err(ctrl->device, 4036 "IDs don't match for shared namespace %d\n", 4037 info->nsid); 4038 goto out_put_ns_head; 4039 } 4040 4041 if (!multipath) { 4042 dev_warn(ctrl->device, 4043 "Found shared namespace %d, but multipathing not supported.\n", 4044 info->nsid); 4045 dev_warn_once(ctrl->device, 4046 "Shared namespace support requires core_nvme.multipath=Y.\n"); 4047 } 4048 } 4049 4050 list_add_tail_rcu(&ns->siblings, &head->list); 4051 ns->head = head; 4052 mutex_unlock(&ctrl->subsys->lock); 4053 4054 #ifdef CONFIG_NVME_MULTIPATH 4055 cancel_delayed_work(&head->remove_work); 4056 #endif 4057 return 0; 4058 4059 out_put_ns_head: 4060 nvme_put_ns_head(head); 4061 out_unlock: 4062 mutex_unlock(&ctrl->subsys->lock); 4063 return ret; 4064 } 4065 4066 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4067 { 4068 struct nvme_ns *ns, *ret = NULL; 4069 int srcu_idx; 4070 4071 srcu_idx = srcu_read_lock(&ctrl->srcu); 4072 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4073 srcu_read_lock_held(&ctrl->srcu)) { 4074 if (ns->head->ns_id == nsid) { 4075 if (!nvme_get_ns(ns)) 4076 continue; 4077 ret = ns; 4078 break; 4079 } 4080 if (ns->head->ns_id > nsid) 4081 break; 4082 } 4083 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4084 return ret; 4085 } 4086 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, "NVME_TARGET_PASSTHRU"); 4087 4088 /* 4089 * Add the namespace to the controller list while keeping the list ordered. 4090 */ 4091 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 4092 { 4093 struct nvme_ns *tmp; 4094 4095 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 4096 if (tmp->head->ns_id < ns->head->ns_id) { 4097 list_add_rcu(&ns->list, &tmp->list); 4098 return; 4099 } 4100 } 4101 list_add_rcu(&ns->list, &ns->ctrl->namespaces); 4102 } 4103 4104 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 4105 { 4106 struct queue_limits lim = { }; 4107 struct nvme_ns *ns; 4108 struct gendisk *disk; 4109 int node = ctrl->numa_node; 4110 bool last_path = false; 4111 4112 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 4113 if (!ns) 4114 return; 4115 4116 if (ctrl->opts && ctrl->opts->data_digest) 4117 lim.features |= BLK_FEAT_STABLE_WRITES; 4118 if (ctrl->ops->supports_pci_p2pdma && 4119 ctrl->ops->supports_pci_p2pdma(ctrl)) 4120 lim.features |= BLK_FEAT_PCI_P2PDMA; 4121 4122 disk = blk_mq_alloc_disk(ctrl->tagset, &lim, ns); 4123 if (IS_ERR(disk)) 4124 goto out_free_ns; 4125 disk->fops = &nvme_bdev_ops; 4126 disk->private_data = ns; 4127 4128 ns->disk = disk; 4129 ns->queue = disk->queue; 4130 ns->ctrl = ctrl; 4131 kref_init(&ns->kref); 4132 4133 if (nvme_init_ns_head(ns, info)) 4134 goto out_cleanup_disk; 4135 4136 /* 4137 * If multipathing is enabled, the device name for all disks and not 4138 * just those that represent shared namespaces needs to be based on the 4139 * subsystem instance. Using the controller instance for private 4140 * namespaces could lead to naming collisions between shared and private 4141 * namespaces if they don't use a common numbering scheme. 4142 * 4143 * If multipathing is not enabled, disk names must use the controller 4144 * instance as shared namespaces will show up as multiple block 4145 * devices. 4146 */ 4147 if (nvme_ns_head_multipath(ns->head)) { 4148 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 4149 ctrl->instance, ns->head->instance); 4150 disk->flags |= GENHD_FL_HIDDEN; 4151 } else if (multipath) { 4152 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 4153 ns->head->instance); 4154 } else { 4155 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 4156 ns->head->instance); 4157 } 4158 4159 if (nvme_update_ns_info(ns, info)) 4160 goto out_unlink_ns; 4161 4162 mutex_lock(&ctrl->namespaces_lock); 4163 /* 4164 * Ensure that no namespaces are added to the ctrl list after the queues 4165 * are frozen, thereby avoiding a deadlock between scan and reset. 4166 */ 4167 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 4168 mutex_unlock(&ctrl->namespaces_lock); 4169 goto out_unlink_ns; 4170 } 4171 nvme_ns_add_to_ctrl_list(ns); 4172 mutex_unlock(&ctrl->namespaces_lock); 4173 synchronize_srcu(&ctrl->srcu); 4174 nvme_get_ctrl(ctrl); 4175 4176 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups)) 4177 goto out_cleanup_ns_from_list; 4178 4179 if (!nvme_ns_head_multipath(ns->head)) 4180 nvme_add_ns_cdev(ns); 4181 4182 nvme_mpath_add_disk(ns, info->anagrpid); 4183 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 4184 4185 return; 4186 4187 out_cleanup_ns_from_list: 4188 nvme_put_ctrl(ctrl); 4189 mutex_lock(&ctrl->namespaces_lock); 4190 list_del_rcu(&ns->list); 4191 mutex_unlock(&ctrl->namespaces_lock); 4192 synchronize_srcu(&ctrl->srcu); 4193 out_unlink_ns: 4194 mutex_lock(&ctrl->subsys->lock); 4195 list_del_rcu(&ns->siblings); 4196 if (list_empty(&ns->head->list)) { 4197 list_del_init(&ns->head->entry); 4198 /* 4199 * If multipath is not configured, we still create a namespace 4200 * head (nshead), but head->disk is not initialized in that 4201 * case. As a result, only a single reference to nshead is held 4202 * (via kref_init()) when it is created. Therefore, ensure that 4203 * we do not release the reference to nshead twice if head->disk 4204 * is not present. 4205 */ 4206 if (ns->head->disk) 4207 last_path = true; 4208 } 4209 mutex_unlock(&ctrl->subsys->lock); 4210 if (last_path) 4211 nvme_put_ns_head(ns->head); 4212 nvme_put_ns_head(ns->head); 4213 out_cleanup_disk: 4214 put_disk(disk); 4215 out_free_ns: 4216 kfree(ns); 4217 } 4218 4219 static void nvme_ns_remove(struct nvme_ns *ns) 4220 { 4221 bool last_path = false; 4222 4223 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 4224 return; 4225 4226 clear_bit(NVME_NS_READY, &ns->flags); 4227 set_capacity(ns->disk, 0); 4228 nvme_fault_inject_fini(&ns->fault_inject); 4229 4230 /* 4231 * Ensure that !NVME_NS_READY is seen by other threads to prevent 4232 * this ns going back into current_path. 4233 */ 4234 synchronize_srcu(&ns->head->srcu); 4235 4236 /* wait for concurrent submissions */ 4237 if (nvme_mpath_clear_current_path(ns)) 4238 synchronize_srcu(&ns->head->srcu); 4239 4240 mutex_lock(&ns->ctrl->subsys->lock); 4241 list_del_rcu(&ns->siblings); 4242 if (list_empty(&ns->head->list)) { 4243 if (!nvme_mpath_queue_if_no_path(ns->head)) 4244 list_del_init(&ns->head->entry); 4245 last_path = true; 4246 } 4247 mutex_unlock(&ns->ctrl->subsys->lock); 4248 4249 /* guarantee not available in head->list */ 4250 synchronize_srcu(&ns->head->srcu); 4251 4252 if (!nvme_ns_head_multipath(ns->head)) 4253 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 4254 4255 nvme_mpath_remove_sysfs_link(ns); 4256 4257 del_gendisk(ns->disk); 4258 4259 mutex_lock(&ns->ctrl->namespaces_lock); 4260 list_del_rcu(&ns->list); 4261 mutex_unlock(&ns->ctrl->namespaces_lock); 4262 synchronize_srcu(&ns->ctrl->srcu); 4263 4264 if (last_path) 4265 nvme_mpath_remove_disk(ns->head); 4266 nvme_put_ns(ns); 4267 } 4268 4269 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 4270 { 4271 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 4272 4273 if (ns) { 4274 nvme_ns_remove(ns); 4275 nvme_put_ns(ns); 4276 } 4277 } 4278 4279 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 4280 { 4281 int ret = NVME_SC_INVALID_NS | NVME_STATUS_DNR; 4282 4283 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 4284 dev_err(ns->ctrl->device, 4285 "identifiers changed for nsid %d\n", ns->head->ns_id); 4286 goto out; 4287 } 4288 4289 ret = nvme_update_ns_info(ns, info); 4290 out: 4291 /* 4292 * Only remove the namespace if we got a fatal error back from the 4293 * device, otherwise ignore the error and just move on. 4294 * 4295 * TODO: we should probably schedule a delayed retry here. 4296 */ 4297 if (ret > 0 && (ret & NVME_STATUS_DNR)) 4298 nvme_ns_remove(ns); 4299 } 4300 4301 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4302 { 4303 struct nvme_ns_info info = { .nsid = nsid }; 4304 struct nvme_ns *ns; 4305 int ret = 1; 4306 4307 if (nvme_identify_ns_descs(ctrl, &info)) 4308 return; 4309 4310 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 4311 dev_warn(ctrl->device, 4312 "command set not reported for nsid: %d\n", nsid); 4313 return; 4314 } 4315 4316 /* 4317 * If available try to use the Command Set Independent Identify Namespace 4318 * data structure to find all the generic information that is needed to 4319 * set up a namespace. If not fall back to the legacy version. 4320 */ 4321 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 4322 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS) || 4323 ctrl->vs >= NVME_VS(2, 0, 0)) 4324 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 4325 if (ret > 0) 4326 ret = nvme_ns_info_from_identify(ctrl, &info); 4327 4328 if (info.is_removed) 4329 nvme_ns_remove_by_nsid(ctrl, nsid); 4330 4331 /* 4332 * Ignore the namespace if it is not ready. We will get an AEN once it 4333 * becomes ready and restart the scan. 4334 */ 4335 if (ret || !info.is_ready) 4336 return; 4337 4338 ns = nvme_find_get_ns(ctrl, nsid); 4339 if (ns) { 4340 nvme_validate_ns(ns, &info); 4341 nvme_put_ns(ns); 4342 } else { 4343 nvme_alloc_ns(ctrl, &info); 4344 } 4345 } 4346 4347 /** 4348 * struct async_scan_info - keeps track of controller & NSIDs to scan 4349 * @ctrl: Controller on which namespaces are being scanned 4350 * @next_nsid: Index of next NSID to scan in ns_list 4351 * @ns_list: Pointer to list of NSIDs to scan 4352 * 4353 * Note: There is a single async_scan_info structure shared by all instances 4354 * of nvme_scan_ns_async() scanning a given controller, so the atomic 4355 * operations on next_nsid are critical to ensure each instance scans a unique 4356 * NSID. 4357 */ 4358 struct async_scan_info { 4359 struct nvme_ctrl *ctrl; 4360 atomic_t next_nsid; 4361 __le32 *ns_list; 4362 }; 4363 4364 static void nvme_scan_ns_async(void *data, async_cookie_t cookie) 4365 { 4366 struct async_scan_info *scan_info = data; 4367 int idx; 4368 u32 nsid; 4369 4370 idx = (u32)atomic_fetch_inc(&scan_info->next_nsid); 4371 nsid = le32_to_cpu(scan_info->ns_list[idx]); 4372 4373 nvme_scan_ns(scan_info->ctrl, nsid); 4374 } 4375 4376 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 4377 unsigned nsid) 4378 { 4379 struct nvme_ns *ns, *next; 4380 LIST_HEAD(rm_list); 4381 4382 mutex_lock(&ctrl->namespaces_lock); 4383 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 4384 if (ns->head->ns_id > nsid) { 4385 list_del_rcu(&ns->list); 4386 synchronize_srcu(&ctrl->srcu); 4387 list_add_tail_rcu(&ns->list, &rm_list); 4388 } 4389 } 4390 mutex_unlock(&ctrl->namespaces_lock); 4391 4392 list_for_each_entry_safe(ns, next, &rm_list, list) 4393 nvme_ns_remove(ns); 4394 } 4395 4396 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 4397 { 4398 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 4399 __le32 *ns_list; 4400 u32 prev = 0; 4401 int ret = 0, i; 4402 ASYNC_DOMAIN(domain); 4403 struct async_scan_info scan_info; 4404 4405 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 4406 if (!ns_list) 4407 return -ENOMEM; 4408 4409 scan_info.ctrl = ctrl; 4410 scan_info.ns_list = ns_list; 4411 for (;;) { 4412 struct nvme_command cmd = { 4413 .identify.opcode = nvme_admin_identify, 4414 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 4415 .identify.nsid = cpu_to_le32(prev), 4416 }; 4417 4418 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 4419 NVME_IDENTIFY_DATA_SIZE); 4420 if (ret) { 4421 dev_warn(ctrl->device, 4422 "Identify NS List failed (status=0x%x)\n", ret); 4423 goto free; 4424 } 4425 4426 atomic_set(&scan_info.next_nsid, 0); 4427 for (i = 0; i < nr_entries; i++) { 4428 u32 nsid = le32_to_cpu(ns_list[i]); 4429 4430 if (!nsid) /* end of the list? */ 4431 goto out; 4432 async_schedule_domain(nvme_scan_ns_async, &scan_info, 4433 &domain); 4434 while (++prev < nsid) 4435 nvme_ns_remove_by_nsid(ctrl, prev); 4436 } 4437 async_synchronize_full_domain(&domain); 4438 } 4439 out: 4440 nvme_remove_invalid_namespaces(ctrl, prev); 4441 free: 4442 async_synchronize_full_domain(&domain); 4443 kfree(ns_list); 4444 return ret; 4445 } 4446 4447 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 4448 { 4449 struct nvme_id_ctrl *id; 4450 u32 nn, i; 4451 4452 if (nvme_identify_ctrl(ctrl, &id)) 4453 return; 4454 nn = le32_to_cpu(id->nn); 4455 kfree(id); 4456 4457 for (i = 1; i <= nn; i++) 4458 nvme_scan_ns(ctrl, i); 4459 4460 nvme_remove_invalid_namespaces(ctrl, nn); 4461 } 4462 4463 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 4464 { 4465 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 4466 __le32 *log; 4467 int error; 4468 4469 log = kzalloc(log_size, GFP_KERNEL); 4470 if (!log) 4471 return; 4472 4473 /* 4474 * We need to read the log to clear the AEN, but we don't want to rely 4475 * on it for the changed namespace information as userspace could have 4476 * raced with us in reading the log page, which could cause us to miss 4477 * updates. 4478 */ 4479 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 4480 NVME_CSI_NVM, log, log_size, 0); 4481 if (error) 4482 dev_warn(ctrl->device, 4483 "reading changed ns log failed: %d\n", error); 4484 4485 kfree(log); 4486 } 4487 4488 static void nvme_scan_work(struct work_struct *work) 4489 { 4490 struct nvme_ctrl *ctrl = 4491 container_of(work, struct nvme_ctrl, scan_work); 4492 int ret; 4493 4494 /* No tagset on a live ctrl means IO queues could not created */ 4495 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 4496 return; 4497 4498 /* 4499 * Identify controller limits can change at controller reset due to 4500 * new firmware download, even though it is not common we cannot ignore 4501 * such scenario. Controller's non-mdts limits are reported in the unit 4502 * of logical blocks that is dependent on the format of attached 4503 * namespace. Hence re-read the limits at the time of ns allocation. 4504 */ 4505 ret = nvme_init_non_mdts_limits(ctrl); 4506 if (ret < 0) { 4507 dev_warn(ctrl->device, 4508 "reading non-mdts-limits failed: %d\n", ret); 4509 return; 4510 } 4511 4512 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 4513 dev_info(ctrl->device, "rescanning namespaces.\n"); 4514 nvme_clear_changed_ns_log(ctrl); 4515 } 4516 4517 mutex_lock(&ctrl->scan_lock); 4518 if (!nvme_id_cns_ok(ctrl, NVME_ID_CNS_NS_ACTIVE_LIST)) { 4519 nvme_scan_ns_sequential(ctrl); 4520 } else { 4521 /* 4522 * Fall back to sequential scan if DNR is set to handle broken 4523 * devices which should support Identify NS List (as per the VS 4524 * they report) but don't actually support it. 4525 */ 4526 ret = nvme_scan_ns_list(ctrl); 4527 if (ret > 0 && ret & NVME_STATUS_DNR) 4528 nvme_scan_ns_sequential(ctrl); 4529 } 4530 mutex_unlock(&ctrl->scan_lock); 4531 4532 /* Requeue if we have missed AENs */ 4533 if (test_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) 4534 nvme_queue_scan(ctrl); 4535 #ifdef CONFIG_NVME_MULTIPATH 4536 else if (ctrl->ana_log_buf) 4537 /* Re-read the ANA log page to not miss updates */ 4538 queue_work(nvme_wq, &ctrl->ana_work); 4539 #endif 4540 } 4541 4542 /* 4543 * This function iterates the namespace list unlocked to allow recovery from 4544 * controller failure. It is up to the caller to ensure the namespace list is 4545 * not modified by scan work while this function is executing. 4546 */ 4547 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4548 { 4549 struct nvme_ns *ns, *next; 4550 LIST_HEAD(ns_list); 4551 4552 /* 4553 * make sure to requeue I/O to all namespaces as these 4554 * might result from the scan itself and must complete 4555 * for the scan_work to make progress 4556 */ 4557 nvme_mpath_clear_ctrl_paths(ctrl); 4558 4559 /* 4560 * Unquiesce io queues so any pending IO won't hang, especially 4561 * those submitted from scan work 4562 */ 4563 nvme_unquiesce_io_queues(ctrl); 4564 4565 /* prevent racing with ns scanning */ 4566 flush_work(&ctrl->scan_work); 4567 4568 /* 4569 * The dead states indicates the controller was not gracefully 4570 * disconnected. In that case, we won't be able to flush any data while 4571 * removing the namespaces' disks; fail all the queues now to avoid 4572 * potentially having to clean up the failed sync later. 4573 */ 4574 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 4575 nvme_mark_namespaces_dead(ctrl); 4576 4577 /* this is a no-op when called from the controller reset handler */ 4578 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4579 4580 mutex_lock(&ctrl->namespaces_lock); 4581 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu); 4582 mutex_unlock(&ctrl->namespaces_lock); 4583 synchronize_srcu(&ctrl->srcu); 4584 4585 list_for_each_entry_safe(ns, next, &ns_list, list) 4586 nvme_ns_remove(ns); 4587 } 4588 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4589 4590 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4591 { 4592 const struct nvme_ctrl *ctrl = 4593 container_of(dev, struct nvme_ctrl, ctrl_device); 4594 struct nvmf_ctrl_options *opts = ctrl->opts; 4595 int ret; 4596 4597 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4598 if (ret) 4599 return ret; 4600 4601 if (opts) { 4602 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4603 if (ret) 4604 return ret; 4605 4606 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4607 opts->trsvcid ?: "none"); 4608 if (ret) 4609 return ret; 4610 4611 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4612 opts->host_traddr ?: "none"); 4613 if (ret) 4614 return ret; 4615 4616 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4617 opts->host_iface ?: "none"); 4618 } 4619 return ret; 4620 } 4621 4622 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4623 { 4624 char *envp[2] = { envdata, NULL }; 4625 4626 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4627 } 4628 4629 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4630 { 4631 char *envp[2] = { NULL, NULL }; 4632 u32 aen_result = ctrl->aen_result; 4633 4634 ctrl->aen_result = 0; 4635 if (!aen_result) 4636 return; 4637 4638 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4639 if (!envp[0]) 4640 return; 4641 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4642 kfree(envp[0]); 4643 } 4644 4645 static void nvme_async_event_work(struct work_struct *work) 4646 { 4647 struct nvme_ctrl *ctrl = 4648 container_of(work, struct nvme_ctrl, async_event_work); 4649 4650 nvme_aen_uevent(ctrl); 4651 4652 /* 4653 * The transport drivers must guarantee AER submission here is safe by 4654 * flushing ctrl async_event_work after changing the controller state 4655 * from LIVE and before freeing the admin queue. 4656 */ 4657 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4658 ctrl->ops->submit_async_event(ctrl); 4659 } 4660 4661 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4662 { 4663 4664 u32 csts; 4665 4666 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4667 return false; 4668 4669 if (csts == ~0) 4670 return false; 4671 4672 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4673 } 4674 4675 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4676 { 4677 struct nvme_fw_slot_info_log *log; 4678 u8 next_fw_slot, cur_fw_slot; 4679 4680 log = kmalloc_obj(*log); 4681 if (!log) 4682 return; 4683 4684 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4685 log, sizeof(*log), 0)) { 4686 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4687 goto out_free_log; 4688 } 4689 4690 cur_fw_slot = log->afi & 0x7; 4691 next_fw_slot = (log->afi & 0x70) >> 4; 4692 if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) { 4693 dev_info(ctrl->device, 4694 "Firmware is activated after next Controller Level Reset\n"); 4695 goto out_free_log; 4696 } 4697 4698 memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1], 4699 sizeof(ctrl->subsys->firmware_rev)); 4700 4701 out_free_log: 4702 kfree(log); 4703 } 4704 4705 static void nvme_fw_act_work(struct work_struct *work) 4706 { 4707 struct nvme_ctrl *ctrl = container_of(work, 4708 struct nvme_ctrl, fw_act_work); 4709 unsigned long fw_act_timeout; 4710 4711 nvme_auth_stop(ctrl); 4712 4713 if (ctrl->mtfa) 4714 fw_act_timeout = jiffies + msecs_to_jiffies(ctrl->mtfa * 100); 4715 else 4716 fw_act_timeout = jiffies + secs_to_jiffies(admin_timeout); 4717 4718 nvme_quiesce_io_queues(ctrl); 4719 while (nvme_ctrl_pp_status(ctrl)) { 4720 if (time_after(jiffies, fw_act_timeout)) { 4721 dev_warn(ctrl->device, 4722 "Fw activation timeout, reset controller\n"); 4723 nvme_try_sched_reset(ctrl); 4724 return; 4725 } 4726 msleep(100); 4727 } 4728 4729 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_CONNECTING) || 4730 !nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4731 return; 4732 4733 nvme_unquiesce_io_queues(ctrl); 4734 /* read FW slot information to clear the AER */ 4735 nvme_get_fw_slot_info(ctrl); 4736 4737 queue_work(nvme_wq, &ctrl->async_event_work); 4738 } 4739 4740 static u32 nvme_aer_type(u32 result) 4741 { 4742 return result & 0x7; 4743 } 4744 4745 static u32 nvme_aer_subtype(u32 result) 4746 { 4747 return (result & 0xff00) >> 8; 4748 } 4749 4750 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4751 { 4752 u32 aer_notice_type = nvme_aer_subtype(result); 4753 bool requeue = true; 4754 4755 switch (aer_notice_type) { 4756 case NVME_AER_NOTICE_NS_CHANGED: 4757 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4758 nvme_queue_scan(ctrl); 4759 break; 4760 case NVME_AER_NOTICE_FW_ACT_STARTING: 4761 /* 4762 * We are (ab)using the RESETTING state to prevent subsequent 4763 * recovery actions from interfering with the controller's 4764 * firmware activation. 4765 */ 4766 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4767 requeue = false; 4768 queue_work(nvme_wq, &ctrl->fw_act_work); 4769 } 4770 break; 4771 #ifdef CONFIG_NVME_MULTIPATH 4772 case NVME_AER_NOTICE_ANA: 4773 if (!ctrl->ana_log_buf) 4774 break; 4775 queue_work(nvme_wq, &ctrl->ana_work); 4776 break; 4777 #endif 4778 case NVME_AER_NOTICE_DISC_CHANGED: 4779 ctrl->aen_result = result; 4780 break; 4781 default: 4782 dev_warn(ctrl->device, "async event result %08x\n", result); 4783 } 4784 return requeue; 4785 } 4786 4787 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4788 { 4789 dev_warn(ctrl->device, 4790 "resetting controller due to persistent internal error\n"); 4791 nvme_reset_ctrl(ctrl); 4792 } 4793 4794 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4795 volatile union nvme_result *res) 4796 { 4797 u32 result = le32_to_cpu(res->u32); 4798 u32 aer_type = nvme_aer_type(result); 4799 u32 aer_subtype = nvme_aer_subtype(result); 4800 bool requeue = true; 4801 4802 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4803 return; 4804 4805 trace_nvme_async_event(ctrl, result); 4806 switch (aer_type) { 4807 case NVME_AER_NOTICE: 4808 requeue = nvme_handle_aen_notice(ctrl, result); 4809 break; 4810 case NVME_AER_ERROR: 4811 /* 4812 * For a persistent internal error, don't run async_event_work 4813 * to submit a new AER. The controller reset will do it. 4814 */ 4815 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4816 nvme_handle_aer_persistent_error(ctrl); 4817 return; 4818 } 4819 fallthrough; 4820 case NVME_AER_SMART: 4821 case NVME_AER_CSS: 4822 case NVME_AER_VS: 4823 ctrl->aen_result = result; 4824 break; 4825 default: 4826 break; 4827 } 4828 4829 if (requeue) 4830 queue_work(nvme_wq, &ctrl->async_event_work); 4831 } 4832 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4833 4834 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4835 const struct blk_mq_ops *ops, unsigned int cmd_size) 4836 { 4837 int ret; 4838 4839 memset(set, 0, sizeof(*set)); 4840 set->ops = ops; 4841 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4842 if (ctrl->ops->flags & NVME_F_FABRICS) 4843 /* Reserved for fabric connect and keep alive */ 4844 set->reserved_tags = 2; 4845 set->numa_node = ctrl->numa_node; 4846 if (ctrl->ops->flags & NVME_F_BLOCKING) 4847 set->flags |= BLK_MQ_F_BLOCKING; 4848 set->cmd_size = cmd_size; 4849 set->driver_data = ctrl; 4850 set->nr_hw_queues = 1; 4851 set->timeout = NVME_ADMIN_TIMEOUT; 4852 ret = blk_mq_alloc_tag_set(set); 4853 if (ret) 4854 return ret; 4855 4856 /* 4857 * If a previous admin queue exists (e.g., from before a reset), 4858 * put it now before allocating a new one to avoid orphaning it. 4859 */ 4860 if (ctrl->admin_q) 4861 blk_put_queue(ctrl->admin_q); 4862 4863 ctrl->admin_q = blk_mq_alloc_queue(set, NULL, NULL); 4864 if (IS_ERR(ctrl->admin_q)) { 4865 ret = PTR_ERR(ctrl->admin_q); 4866 goto out_free_tagset; 4867 } 4868 4869 if (ctrl->ops->flags & NVME_F_FABRICS) { 4870 ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL); 4871 if (IS_ERR(ctrl->fabrics_q)) { 4872 ret = PTR_ERR(ctrl->fabrics_q); 4873 goto out_cleanup_admin_q; 4874 } 4875 } 4876 4877 ctrl->admin_tagset = set; 4878 return 0; 4879 4880 out_cleanup_admin_q: 4881 blk_mq_destroy_queue(ctrl->admin_q); 4882 blk_put_queue(ctrl->admin_q); 4883 out_free_tagset: 4884 blk_mq_free_tag_set(set); 4885 ctrl->admin_q = NULL; 4886 ctrl->fabrics_q = NULL; 4887 return ret; 4888 } 4889 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4890 4891 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4892 { 4893 /* 4894 * As we're about to destroy the queue and free tagset 4895 * we can not have keep-alive work running. 4896 */ 4897 nvme_stop_keep_alive(ctrl); 4898 blk_mq_destroy_queue(ctrl->admin_q); 4899 if (ctrl->ops->flags & NVME_F_FABRICS) { 4900 blk_mq_destroy_queue(ctrl->fabrics_q); 4901 blk_put_queue(ctrl->fabrics_q); 4902 } 4903 blk_mq_free_tag_set(ctrl->admin_tagset); 4904 } 4905 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4906 4907 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4908 const struct blk_mq_ops *ops, unsigned int nr_maps, 4909 unsigned int cmd_size) 4910 { 4911 int ret; 4912 4913 memset(set, 0, sizeof(*set)); 4914 set->ops = ops; 4915 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4916 /* 4917 * Some Apple controllers requires tags to be unique across admin and 4918 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4919 */ 4920 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4921 set->reserved_tags = NVME_AQ_DEPTH; 4922 else if (ctrl->ops->flags & NVME_F_FABRICS) 4923 /* Reserved for fabric connect */ 4924 set->reserved_tags = 1; 4925 set->numa_node = ctrl->numa_node; 4926 if (ctrl->ops->flags & NVME_F_BLOCKING) 4927 set->flags |= BLK_MQ_F_BLOCKING; 4928 set->cmd_size = cmd_size; 4929 set->driver_data = ctrl; 4930 set->nr_hw_queues = ctrl->queue_count - 1; 4931 set->timeout = NVME_IO_TIMEOUT; 4932 set->nr_maps = nr_maps; 4933 ret = blk_mq_alloc_tag_set(set); 4934 if (ret) 4935 return ret; 4936 4937 if (ctrl->ops->flags & NVME_F_FABRICS) { 4938 struct queue_limits lim = { 4939 .features = BLK_FEAT_SKIP_TAGSET_QUIESCE, 4940 }; 4941 4942 ctrl->connect_q = blk_mq_alloc_queue(set, &lim, NULL); 4943 if (IS_ERR(ctrl->connect_q)) { 4944 ret = PTR_ERR(ctrl->connect_q); 4945 goto out_free_tag_set; 4946 } 4947 } 4948 4949 ctrl->tagset = set; 4950 return 0; 4951 4952 out_free_tag_set: 4953 blk_mq_free_tag_set(set); 4954 ctrl->connect_q = NULL; 4955 return ret; 4956 } 4957 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4958 4959 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4960 { 4961 if (ctrl->ops->flags & NVME_F_FABRICS) { 4962 blk_mq_destroy_queue(ctrl->connect_q); 4963 blk_put_queue(ctrl->connect_q); 4964 } 4965 blk_mq_free_tag_set(ctrl->tagset); 4966 } 4967 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4968 4969 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4970 { 4971 nvme_mpath_stop(ctrl); 4972 nvme_auth_stop(ctrl); 4973 nvme_stop_failfast_work(ctrl); 4974 flush_work(&ctrl->async_event_work); 4975 cancel_work_sync(&ctrl->fw_act_work); 4976 if (ctrl->ops->stop_ctrl) 4977 ctrl->ops->stop_ctrl(ctrl); 4978 } 4979 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4980 4981 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4982 { 4983 nvme_enable_aen(ctrl); 4984 4985 /* 4986 * persistent discovery controllers need to send indication to userspace 4987 * to re-read the discovery log page to learn about possible changes 4988 * that were missed. We identify persistent discovery controllers by 4989 * checking that they started once before, hence are reconnecting back. 4990 */ 4991 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4992 nvme_discovery_ctrl(ctrl)) { 4993 if (!ctrl->kato) { 4994 nvme_stop_keep_alive(ctrl); 4995 ctrl->kato = NVME_DEFAULT_KATO; 4996 nvme_start_keep_alive(ctrl); 4997 } 4998 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4999 } 5000 5001 if (ctrl->queue_count > 1) { 5002 nvme_queue_scan(ctrl); 5003 nvme_unquiesce_io_queues(ctrl); 5004 nvme_mpath_update(ctrl); 5005 } 5006 5007 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 5008 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 5009 } 5010 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 5011 5012 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 5013 { 5014 nvme_stop_keep_alive(ctrl); 5015 nvme_hwmon_exit(ctrl); 5016 nvme_fault_inject_fini(&ctrl->fault_inject); 5017 dev_pm_qos_hide_latency_tolerance(ctrl->device); 5018 cdev_device_del(&ctrl->cdev, ctrl->device); 5019 nvme_put_ctrl(ctrl); 5020 } 5021 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 5022 5023 static void nvme_free_cels(struct nvme_ctrl *ctrl) 5024 { 5025 struct nvme_effects_log *cel; 5026 unsigned long i; 5027 5028 xa_for_each(&ctrl->cels, i, cel) { 5029 xa_erase(&ctrl->cels, i); 5030 kfree(cel); 5031 } 5032 5033 xa_destroy(&ctrl->cels); 5034 } 5035 5036 static void nvme_free_ctrl(struct device *dev) 5037 { 5038 struct nvme_ctrl *ctrl = 5039 container_of(dev, struct nvme_ctrl, ctrl_device); 5040 struct nvme_subsystem *subsys = ctrl->subsys; 5041 5042 if (ctrl->admin_q) 5043 blk_put_queue(ctrl->admin_q); 5044 if (!subsys || ctrl->instance != subsys->instance) 5045 ida_free(&nvme_instance_ida, ctrl->instance); 5046 nvme_free_cels(ctrl); 5047 nvme_mpath_uninit(ctrl); 5048 cleanup_srcu_struct(&ctrl->srcu); 5049 nvme_auth_stop(ctrl); 5050 nvme_auth_free(ctrl); 5051 __free_page(ctrl->discard_page); 5052 free_opal_dev(ctrl->opal_dev); 5053 5054 if (subsys) { 5055 mutex_lock(&nvme_subsystems_lock); 5056 list_del(&ctrl->subsys_entry); 5057 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 5058 mutex_unlock(&nvme_subsystems_lock); 5059 } 5060 5061 ctrl->ops->free_ctrl(ctrl); 5062 5063 if (subsys) 5064 nvme_put_subsystem(subsys); 5065 } 5066 5067 /* 5068 * Initialize a NVMe controller structures. This needs to be called during 5069 * earliest initialization so that we have the initialized structured around 5070 * during probing. 5071 * 5072 * On success, the caller must use the nvme_put_ctrl() to release this when 5073 * needed, which also invokes the ops->free_ctrl() callback. 5074 */ 5075 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 5076 const struct nvme_ctrl_ops *ops, unsigned long quirks) 5077 { 5078 int ret; 5079 5080 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 5081 ctrl->passthru_err_log_enabled = false; 5082 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 5083 spin_lock_init(&ctrl->lock); 5084 mutex_init(&ctrl->namespaces_lock); 5085 5086 ret = init_srcu_struct(&ctrl->srcu); 5087 if (ret) 5088 return ret; 5089 5090 mutex_init(&ctrl->scan_lock); 5091 INIT_LIST_HEAD(&ctrl->namespaces); 5092 xa_init(&ctrl->cels); 5093 ctrl->dev = dev; 5094 ctrl->ops = ops; 5095 ctrl->quirks = quirks; 5096 ctrl->numa_node = NUMA_NO_NODE; 5097 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 5098 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 5099 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 5100 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 5101 init_waitqueue_head(&ctrl->state_wq); 5102 5103 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 5104 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 5105 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 5106 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 5107 ctrl->ka_last_check_time = jiffies; 5108 5109 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 5110 PAGE_SIZE); 5111 ctrl->discard_page = alloc_page(GFP_KERNEL); 5112 if (!ctrl->discard_page) { 5113 ret = -ENOMEM; 5114 goto out; 5115 } 5116 5117 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 5118 if (ret < 0) 5119 goto out; 5120 ctrl->instance = ret; 5121 5122 ret = nvme_auth_init_ctrl(ctrl); 5123 if (ret) 5124 goto out_release_instance; 5125 5126 nvme_mpath_init_ctrl(ctrl); 5127 5128 device_initialize(&ctrl->ctrl_device); 5129 ctrl->device = &ctrl->ctrl_device; 5130 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 5131 ctrl->instance); 5132 ctrl->device->class = &nvme_class; 5133 ctrl->device->parent = ctrl->dev; 5134 if (ops->dev_attr_groups) 5135 ctrl->device->groups = ops->dev_attr_groups; 5136 else 5137 ctrl->device->groups = nvme_dev_attr_groups; 5138 ctrl->device->release = nvme_free_ctrl; 5139 dev_set_drvdata(ctrl->device, ctrl); 5140 5141 return ret; 5142 5143 out_release_instance: 5144 ida_free(&nvme_instance_ida, ctrl->instance); 5145 out: 5146 if (ctrl->discard_page) 5147 __free_page(ctrl->discard_page); 5148 cleanup_srcu_struct(&ctrl->srcu); 5149 return ret; 5150 } 5151 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 5152 5153 /* 5154 * On success, returns with an elevated controller reference and caller must 5155 * use nvme_uninit_ctrl() to properly free resources associated with the ctrl. 5156 */ 5157 int nvme_add_ctrl(struct nvme_ctrl *ctrl) 5158 { 5159 int ret; 5160 5161 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 5162 if (ret) 5163 return ret; 5164 5165 cdev_init(&ctrl->cdev, &nvme_dev_fops); 5166 ctrl->cdev.owner = ctrl->ops->module; 5167 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 5168 if (ret) 5169 return ret; 5170 5171 /* 5172 * Initialize latency tolerance controls. The sysfs files won't 5173 * be visible to userspace unless the device actually supports APST. 5174 */ 5175 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 5176 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 5177 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 5178 5179 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 5180 nvme_get_ctrl(ctrl); 5181 5182 return 0; 5183 } 5184 EXPORT_SYMBOL_GPL(nvme_add_ctrl); 5185 5186 /* let I/O to all namespaces fail in preparation for surprise removal */ 5187 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 5188 { 5189 struct nvme_ns *ns; 5190 int srcu_idx; 5191 5192 srcu_idx = srcu_read_lock(&ctrl->srcu); 5193 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5194 srcu_read_lock_held(&ctrl->srcu)) 5195 blk_mark_disk_dead(ns->disk); 5196 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5197 } 5198 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 5199 5200 void nvme_unfreeze(struct nvme_ctrl *ctrl) 5201 { 5202 struct nvme_ns *ns; 5203 int srcu_idx; 5204 5205 srcu_idx = srcu_read_lock(&ctrl->srcu); 5206 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5207 srcu_read_lock_held(&ctrl->srcu)) 5208 blk_mq_unfreeze_queue_non_owner(ns->queue); 5209 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5210 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 5211 } 5212 EXPORT_SYMBOL_GPL(nvme_unfreeze); 5213 5214 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 5215 { 5216 struct nvme_ns *ns; 5217 int srcu_idx; 5218 5219 srcu_idx = srcu_read_lock(&ctrl->srcu); 5220 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5221 srcu_read_lock_held(&ctrl->srcu)) { 5222 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 5223 if (timeout <= 0) 5224 break; 5225 } 5226 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5227 return timeout; 5228 } 5229 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 5230 5231 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 5232 { 5233 struct nvme_ns *ns; 5234 int srcu_idx; 5235 5236 srcu_idx = srcu_read_lock(&ctrl->srcu); 5237 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5238 srcu_read_lock_held(&ctrl->srcu)) 5239 blk_mq_freeze_queue_wait(ns->queue); 5240 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5241 } 5242 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 5243 5244 void nvme_start_freeze(struct nvme_ctrl *ctrl) 5245 { 5246 struct nvme_ns *ns; 5247 int srcu_idx; 5248 5249 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 5250 srcu_idx = srcu_read_lock(&ctrl->srcu); 5251 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5252 srcu_read_lock_held(&ctrl->srcu)) 5253 /* 5254 * Typical non_owner use case is from pci driver, in which 5255 * start_freeze is called from timeout work function, but 5256 * unfreeze is done in reset work context 5257 */ 5258 blk_freeze_queue_start_non_owner(ns->queue); 5259 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5260 } 5261 EXPORT_SYMBOL_GPL(nvme_start_freeze); 5262 5263 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 5264 { 5265 if (!ctrl->tagset) 5266 return; 5267 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 5268 blk_mq_quiesce_tagset(ctrl->tagset); 5269 else 5270 blk_mq_wait_quiesce_done(ctrl->tagset); 5271 } 5272 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 5273 5274 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 5275 { 5276 if (!ctrl->tagset) 5277 return; 5278 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 5279 blk_mq_unquiesce_tagset(ctrl->tagset); 5280 } 5281 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 5282 5283 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 5284 { 5285 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5286 blk_mq_quiesce_queue(ctrl->admin_q); 5287 else 5288 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 5289 } 5290 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 5291 5292 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 5293 { 5294 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5295 blk_mq_unquiesce_queue(ctrl->admin_q); 5296 } 5297 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 5298 5299 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 5300 { 5301 struct nvme_ns *ns; 5302 int srcu_idx; 5303 5304 srcu_idx = srcu_read_lock(&ctrl->srcu); 5305 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5306 srcu_read_lock_held(&ctrl->srcu)) 5307 blk_sync_queue(ns->queue); 5308 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5309 } 5310 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 5311 5312 void nvme_sync_queues(struct nvme_ctrl *ctrl) 5313 { 5314 nvme_sync_io_queues(ctrl); 5315 if (ctrl->admin_q) 5316 blk_sync_queue(ctrl->admin_q); 5317 } 5318 EXPORT_SYMBOL_GPL(nvme_sync_queues); 5319 5320 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 5321 { 5322 if (file->f_op != &nvme_dev_fops) 5323 return NULL; 5324 return file->private_data; 5325 } 5326 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, "NVME_TARGET_PASSTHRU"); 5327 5328 /* 5329 * Check we didn't inadvertently grow the command structure sizes: 5330 */ 5331 static inline void _nvme_check_size(void) 5332 { 5333 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 5334 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 5335 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 5336 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 5337 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 5338 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 5339 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 5340 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 5341 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 5342 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 5343 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 5344 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 5345 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 5346 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 5347 NVME_IDENTIFY_DATA_SIZE); 5348 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 5349 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 5350 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 5351 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 5352 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 5353 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 5354 BUILD_BUG_ON(sizeof(struct nvme_endurance_group_log) != 512); 5355 BUILD_BUG_ON(sizeof(struct nvme_rotational_media_log) != 512); 5356 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 5357 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 5358 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 5359 } 5360 5361 5362 static int __init nvme_core_init(void) 5363 { 5364 unsigned int wq_flags = WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS; 5365 int result = -ENOMEM; 5366 5367 _nvme_check_size(); 5368 5369 nvme_wq = alloc_workqueue("nvme-wq", wq_flags, 0); 5370 if (!nvme_wq) 5371 goto out; 5372 5373 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", wq_flags, 0); 5374 if (!nvme_reset_wq) 5375 goto destroy_wq; 5376 5377 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", wq_flags, 0); 5378 if (!nvme_delete_wq) 5379 goto destroy_reset_wq; 5380 5381 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 5382 NVME_MINORS, "nvme"); 5383 if (result < 0) 5384 goto destroy_delete_wq; 5385 5386 result = class_register(&nvme_class); 5387 if (result) 5388 goto unregister_chrdev; 5389 5390 result = class_register(&nvme_subsys_class); 5391 if (result) 5392 goto destroy_class; 5393 5394 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 5395 "nvme-generic"); 5396 if (result < 0) 5397 goto destroy_subsys_class; 5398 5399 result = class_register(&nvme_ns_chr_class); 5400 if (result) 5401 goto unregister_generic_ns; 5402 5403 result = nvme_init_auth(); 5404 if (result) 5405 goto destroy_ns_chr; 5406 return 0; 5407 5408 destroy_ns_chr: 5409 class_unregister(&nvme_ns_chr_class); 5410 unregister_generic_ns: 5411 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5412 destroy_subsys_class: 5413 class_unregister(&nvme_subsys_class); 5414 destroy_class: 5415 class_unregister(&nvme_class); 5416 unregister_chrdev: 5417 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5418 destroy_delete_wq: 5419 destroy_workqueue(nvme_delete_wq); 5420 destroy_reset_wq: 5421 destroy_workqueue(nvme_reset_wq); 5422 destroy_wq: 5423 destroy_workqueue(nvme_wq); 5424 out: 5425 return result; 5426 } 5427 5428 static void __exit nvme_core_exit(void) 5429 { 5430 nvme_exit_auth(); 5431 class_unregister(&nvme_ns_chr_class); 5432 class_unregister(&nvme_subsys_class); 5433 class_unregister(&nvme_class); 5434 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5435 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5436 destroy_workqueue(nvme_delete_wq); 5437 destroy_workqueue(nvme_reset_wq); 5438 destroy_workqueue(nvme_wq); 5439 ida_destroy(&nvme_ns_chr_minor_ida); 5440 ida_destroy(&nvme_instance_ida); 5441 } 5442 5443 MODULE_LICENSE("GPL"); 5444 MODULE_VERSION("1.0"); 5445 MODULE_DESCRIPTION("NVMe host core framework"); 5446 module_init(nvme_core_init); 5447 module_exit(nvme_core_exit); 5448