1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 #include <linux/ratelimit_types.h> 20 21 #include <trace/events/block.h> 22 23 extern const struct pr_ops nvme_pr_ops; 24 25 extern unsigned int nvme_io_timeout; 26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 27 28 extern unsigned int admin_timeout; 29 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 30 31 #define NVME_DEFAULT_KATO 5 32 33 #ifdef CONFIG_ARCH_NO_SG_CHAIN 34 #define NVME_INLINE_SG_CNT 0 35 #define NVME_INLINE_METADATA_SG_CNT 0 36 #else 37 #define NVME_INLINE_SG_CNT 2 38 #define NVME_INLINE_METADATA_SG_CNT 1 39 #endif 40 41 /* 42 * Default to a 4K page size, with the intention to update this 43 * path in the future to accommodate architectures with differing 44 * kernel and IO page sizes. 45 */ 46 #define NVME_CTRL_PAGE_SHIFT 12 47 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 48 49 extern struct workqueue_struct *nvme_wq; 50 extern struct workqueue_struct *nvme_reset_wq; 51 extern struct workqueue_struct *nvme_delete_wq; 52 extern struct mutex nvme_subsystems_lock; 53 54 /* 55 * List of workarounds for devices that required behavior not specified in 56 * the standard. 57 */ 58 enum nvme_quirks { 59 /* 60 * Prefers I/O aligned to a stripe size specified in a vendor 61 * specific Identify field. 62 */ 63 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 64 65 /* 66 * The controller doesn't handle Identify value others than 0 or 1 67 * correctly. 68 */ 69 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 70 71 /* 72 * The controller deterministically returns 0's on reads to 73 * logical blocks that deallocate was called on. 74 */ 75 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 76 77 /* 78 * The controller needs a delay before starts checking the device 79 * readiness, which is done by reading the NVME_CSTS_RDY bit. 80 */ 81 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 82 83 /* 84 * APST should not be used. 85 */ 86 NVME_QUIRK_NO_APST = (1 << 4), 87 88 /* 89 * The deepest sleep state should not be used. 90 */ 91 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 92 93 /* 94 * Problems seen with concurrent commands 95 */ 96 NVME_QUIRK_QDEPTH_ONE = (1 << 6), 97 98 /* 99 * Set MEDIUM priority on SQ creation 100 */ 101 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 102 103 /* 104 * Ignore device provided subnqn. 105 */ 106 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 107 108 /* 109 * Broken Write Zeroes. 110 */ 111 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 112 113 /* 114 * Force simple suspend/resume path. 115 */ 116 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 117 118 /* 119 * Use only one interrupt vector for all queues 120 */ 121 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 122 123 /* 124 * Use non-standard 128 bytes SQEs. 125 */ 126 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 127 128 /* 129 * Prevent tag overlap between queues 130 */ 131 NVME_QUIRK_SHARED_TAGS = (1 << 13), 132 133 /* 134 * Don't change the value of the temperature threshold feature 135 */ 136 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 137 138 /* 139 * The controller doesn't handle the Identify Namespace 140 * Identification Descriptor list subcommand despite claiming 141 * NVMe 1.3 compliance. 142 */ 143 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 144 145 /* 146 * The controller does not properly handle DMA addresses over 147 * 48 bits. 148 */ 149 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 150 151 /* 152 * The controller requires the command_id value be limited, so skip 153 * encoding the generation sequence number. 154 */ 155 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 156 157 /* 158 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 159 */ 160 NVME_QUIRK_BOGUS_NID = (1 << 18), 161 162 /* 163 * No temperature thresholds for channels other than 0 (Composite). 164 */ 165 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 166 167 /* 168 * Disables simple suspend/resume path. 169 */ 170 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 171 172 /* 173 * MSI (but not MSI-X) interrupts are broken and never fire. 174 */ 175 NVME_QUIRK_BROKEN_MSI = (1 << 21), 176 177 /* 178 * Align dma pool segment size to 512 bytes 179 */ 180 NVME_QUIRK_DMAPOOL_ALIGN_512 = (1 << 22), 181 }; 182 183 static inline char *nvme_quirk_name(enum nvme_quirks q) 184 { 185 switch (q) { 186 case NVME_QUIRK_STRIPE_SIZE: 187 return "stripe_size"; 188 case NVME_QUIRK_IDENTIFY_CNS: 189 return "identify_cns"; 190 case NVME_QUIRK_DEALLOCATE_ZEROES: 191 return "deallocate_zeroes"; 192 case NVME_QUIRK_DELAY_BEFORE_CHK_RDY: 193 return "delay_before_chk_rdy"; 194 case NVME_QUIRK_NO_APST: 195 return "no_apst"; 196 case NVME_QUIRK_NO_DEEPEST_PS: 197 return "no_deepest_ps"; 198 case NVME_QUIRK_QDEPTH_ONE: 199 return "qdepth_one"; 200 case NVME_QUIRK_MEDIUM_PRIO_SQ: 201 return "medium_prio_sq"; 202 case NVME_QUIRK_IGNORE_DEV_SUBNQN: 203 return "ignore_dev_subnqn"; 204 case NVME_QUIRK_DISABLE_WRITE_ZEROES: 205 return "disable_write_zeroes"; 206 case NVME_QUIRK_SIMPLE_SUSPEND: 207 return "simple_suspend"; 208 case NVME_QUIRK_SINGLE_VECTOR: 209 return "single_vector"; 210 case NVME_QUIRK_128_BYTES_SQES: 211 return "128_bytes_sqes"; 212 case NVME_QUIRK_SHARED_TAGS: 213 return "shared_tags"; 214 case NVME_QUIRK_NO_TEMP_THRESH_CHANGE: 215 return "no_temp_thresh_change"; 216 case NVME_QUIRK_NO_NS_DESC_LIST: 217 return "no_ns_desc_list"; 218 case NVME_QUIRK_DMA_ADDRESS_BITS_48: 219 return "dma_address_bits_48"; 220 case NVME_QUIRK_SKIP_CID_GEN: 221 return "skip_cid_gen"; 222 case NVME_QUIRK_BOGUS_NID: 223 return "bogus_nid"; 224 case NVME_QUIRK_NO_SECONDARY_TEMP_THRESH: 225 return "no_secondary_temp_thresh"; 226 case NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND: 227 return "force_no_simple_suspend"; 228 case NVME_QUIRK_BROKEN_MSI: 229 return "broken_msi"; 230 case NVME_QUIRK_DMAPOOL_ALIGN_512: 231 return "dmapool_align_512"; 232 } 233 234 return "unknown"; 235 } 236 237 /* 238 * Common request structure for NVMe passthrough. All drivers must have 239 * this structure as the first member of their request-private data. 240 */ 241 struct nvme_request { 242 struct nvme_command *cmd; 243 union nvme_result result; 244 u8 genctr; 245 u8 retries; 246 u8 flags; 247 u16 status; 248 #ifdef CONFIG_NVME_MULTIPATH 249 unsigned long start_time; 250 #endif 251 struct nvme_ctrl *ctrl; 252 }; 253 254 /* 255 * Mark a bio as coming in through the mpath node. 256 */ 257 #define REQ_NVME_MPATH REQ_DRV 258 259 enum { 260 NVME_REQ_CANCELLED = (1 << 0), 261 NVME_REQ_USERCMD = (1 << 1), 262 NVME_MPATH_IO_STATS = (1 << 2), 263 NVME_MPATH_CNT_ACTIVE = (1 << 3), 264 }; 265 266 static inline struct nvme_request *nvme_req(struct request *req) 267 { 268 return blk_mq_rq_to_pdu(req); 269 } 270 271 static inline u16 nvme_req_qid(struct request *req) 272 { 273 if (!req->q->queuedata) 274 return 0; 275 276 return req->mq_hctx->queue_num + 1; 277 } 278 279 /* The below value is the specific amount of delay needed before checking 280 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 281 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 282 * found empirically. 283 */ 284 #define NVME_QUIRK_DELAY_AMOUNT 2300 285 286 /* 287 * enum nvme_ctrl_state: Controller state 288 * 289 * @NVME_CTRL_NEW: New controller just allocated, initial state 290 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 291 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 292 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 293 * transport 294 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 295 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 296 * disabled/failed immediately. This state comes 297 * after all async event processing took place and 298 * before ns removal and the controller deletion 299 * progress 300 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 301 * shutdown or removal. In this case we forcibly 302 * kill all inflight I/O as they have no chance to 303 * complete 304 */ 305 enum nvme_ctrl_state { 306 NVME_CTRL_NEW, 307 NVME_CTRL_LIVE, 308 NVME_CTRL_RESETTING, 309 NVME_CTRL_CONNECTING, 310 NVME_CTRL_DELETING, 311 NVME_CTRL_DELETING_NOIO, 312 NVME_CTRL_DEAD, 313 }; 314 315 struct nvme_fault_inject { 316 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 317 struct fault_attr attr; 318 struct dentry *parent; 319 bool dont_retry; /* DNR, do not retry */ 320 u16 status; /* status code */ 321 #endif 322 }; 323 324 enum nvme_ctrl_flags { 325 NVME_CTRL_FAILFAST_EXPIRED = 0, 326 NVME_CTRL_ADMIN_Q_STOPPED = 1, 327 NVME_CTRL_STARTED_ONCE = 2, 328 NVME_CTRL_STOPPED = 3, 329 NVME_CTRL_SKIP_ID_CNS_CS = 4, 330 NVME_CTRL_DIRTY_CAPABILITY = 5, 331 NVME_CTRL_FROZEN = 6, 332 }; 333 334 struct nvme_ctrl { 335 bool comp_seen; 336 bool identified; 337 bool passthru_err_log_enabled; 338 enum nvme_ctrl_state state; 339 spinlock_t lock; 340 struct mutex scan_lock; 341 const struct nvme_ctrl_ops *ops; 342 struct request_queue *admin_q; 343 struct request_queue *connect_q; 344 struct request_queue *fabrics_q; 345 struct device *dev; 346 int instance; 347 int numa_node; 348 struct blk_mq_tag_set *tagset; 349 struct blk_mq_tag_set *admin_tagset; 350 struct list_head namespaces; 351 struct mutex namespaces_lock; 352 struct srcu_struct srcu; 353 struct device ctrl_device; 354 struct device *device; /* char device */ 355 #ifdef CONFIG_NVME_HWMON 356 struct device *hwmon_device; 357 #endif 358 struct cdev cdev; 359 struct work_struct reset_work; 360 struct work_struct delete_work; 361 wait_queue_head_t state_wq; 362 363 struct nvme_subsystem *subsys; 364 struct list_head subsys_entry; 365 366 struct opal_dev *opal_dev; 367 368 u16 cntlid; 369 370 u16 mtfa; 371 u32 ctrl_config; 372 u32 queue_count; 373 u32 admin_timeout; 374 u32 io_timeout; 375 376 u64 cap; 377 u32 max_hw_sectors; 378 u32 max_segments; 379 u32 max_integrity_segments; 380 u32 max_zeroes_sectors; 381 #ifdef CONFIG_BLK_DEV_ZONED 382 u32 max_zone_append; 383 #endif 384 u16 crdt[3]; 385 u16 oncs; 386 u8 dmrl; 387 u32 dmrsl; 388 u16 oacs; 389 u16 sqsize; 390 u32 max_namespaces; 391 atomic_t abort_limit; 392 u8 vwc; 393 u32 vs; 394 u32 sgls; 395 u16 kas; 396 u8 npss; 397 u8 apsta; 398 u16 wctemp; 399 u16 cctemp; 400 u32 oaes; 401 u32 aen_result; 402 u32 ctratt; 403 unsigned int shutdown_timeout; 404 unsigned int kato; 405 bool subsystem; 406 unsigned long quirks; 407 struct nvme_id_power_state psd[32]; 408 struct nvme_effects_log *effects; 409 struct xarray cels; 410 struct work_struct scan_work; 411 struct work_struct async_event_work; 412 struct delayed_work ka_work; 413 struct delayed_work failfast_work; 414 struct nvme_command ka_cmd; 415 unsigned long ka_last_check_time; 416 struct work_struct fw_act_work; 417 unsigned long events; 418 atomic_long_t errors; 419 atomic_long_t nr_reset; 420 421 #ifdef CONFIG_NVME_MULTIPATH 422 /* asymmetric namespace access: */ 423 u8 anacap; 424 u8 anatt; 425 u32 anagrpmax; 426 u32 nanagrpid; 427 struct mutex ana_lock; 428 struct nvme_ana_rsp_hdr *ana_log_buf; 429 size_t ana_log_size; 430 struct timer_list anatt_timer; 431 struct work_struct ana_work; 432 atomic_t nr_active; 433 #endif 434 435 #ifdef CONFIG_NVME_HOST_AUTH 436 struct work_struct dhchap_auth_work; 437 struct mutex dhchap_auth_mutex; 438 struct nvme_dhchap_queue_context *dhchap_ctxs; 439 struct nvme_dhchap_key *host_key; 440 struct nvme_dhchap_key *ctrl_key; 441 u16 transaction; 442 #endif 443 key_serial_t tls_pskid; 444 445 /* Power saving configuration */ 446 u64 ps_max_latency_us; 447 bool apst_enabled; 448 449 /* PCIe only: */ 450 u16 hmmaxd; 451 u32 hmpre; 452 u32 hmmin; 453 u32 hmminds; 454 455 /* Fabrics only */ 456 u32 ioccsz; 457 u32 iorcsz; 458 u16 icdoff; 459 u16 maxcmd; 460 int nr_reconnects; 461 /* accumulate reconenct attempts, as nr_reconnects can reset to zero */ 462 atomic_long_t acc_reconnects; 463 unsigned long flags; 464 struct nvmf_ctrl_options *opts; 465 466 struct page *discard_page; 467 unsigned long discard_page_busy; 468 469 struct nvme_fault_inject fault_inject; 470 471 enum nvme_ctrl_type cntrltype; 472 enum nvme_dctype dctype; 473 474 u16 awupf; /* 0's based value. */ 475 }; 476 477 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 478 { 479 return READ_ONCE(ctrl->state); 480 } 481 482 enum nvme_iopolicy { 483 NVME_IOPOLICY_NUMA, 484 NVME_IOPOLICY_RR, 485 NVME_IOPOLICY_QD, 486 }; 487 488 struct nvme_subsystem { 489 int instance; 490 struct device dev; 491 /* 492 * Because we unregister the device on the last put we need 493 * a separate refcount. 494 */ 495 struct kref ref; 496 struct list_head entry; 497 struct mutex lock; 498 struct list_head ctrls; 499 struct list_head nsheads; 500 char subnqn[NVMF_NQN_SIZE]; 501 char serial[20]; 502 char model[40]; 503 char firmware_rev[8]; 504 u8 cmic; 505 enum nvme_subsys_type subtype; 506 u16 vendor_id; 507 struct ida ns_ida; 508 #ifdef CONFIG_NVME_MULTIPATH 509 enum nvme_iopolicy iopolicy; 510 #endif 511 }; 512 513 /* 514 * Container structure for uniqueue namespace identifiers. 515 */ 516 struct nvme_ns_ids { 517 u8 eui64[8]; 518 u8 nguid[16]; 519 uuid_t uuid; 520 u8 csi; 521 }; 522 523 /* 524 * Anchor structure for namespaces. There is one for each namespace in a 525 * NVMe subsystem that any of our controllers can see, and the namespace 526 * structure for each controller is chained of it. For private namespaces 527 * there is a 1:1 relation to our namespace structures, that is ->list 528 * only ever has a single entry for private namespaces. 529 */ 530 struct nvme_ns_head { 531 struct list_head list; 532 struct srcu_struct srcu; 533 struct nvme_subsystem *subsys; 534 struct nvme_ns_ids ids; 535 u8 lba_shift; 536 u16 ms; 537 u16 pi_size; 538 u8 pi_type; 539 u8 guard_type; 540 struct list_head entry; 541 struct kref ref; 542 bool shared; 543 bool rotational; 544 bool passthru_err_log_enabled; 545 struct nvme_effects_log *effects; 546 u64 nuse; 547 unsigned ns_id; 548 int instance; 549 #ifdef CONFIG_BLK_DEV_ZONED 550 u64 zsze; 551 #endif 552 unsigned long features; 553 554 struct ratelimit_state rs_nuse; 555 556 struct cdev cdev; 557 struct device cdev_device; 558 559 struct gendisk *disk; 560 561 u16 nr_plids; 562 u16 *plids; 563 #ifdef CONFIG_NVME_MULTIPATH 564 struct bio_list requeue_list; 565 spinlock_t requeue_lock; 566 struct work_struct requeue_work; 567 struct work_struct partition_scan_work; 568 struct mutex lock; 569 unsigned long flags; 570 struct delayed_work remove_work; 571 unsigned int delayed_removal_secs; 572 atomic_long_t io_requeue_no_usable_path_count; 573 atomic_long_t io_fail_no_available_path_count; 574 #define NVME_NSHEAD_DISK_LIVE 0 575 #define NVME_NSHEAD_QUEUE_IF_NO_PATH 1 576 struct nvme_ns __rcu *current_path[]; 577 #endif 578 }; 579 580 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 581 { 582 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 583 } 584 585 enum nvme_ns_features { 586 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 587 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 588 NVME_NS_DEAC = 1 << 2, /* DEAC bit in Write Zeroes supported */ 589 }; 590 591 struct nvme_ns { 592 struct list_head list; 593 594 struct nvme_ctrl *ctrl; 595 struct request_queue *queue; 596 struct gendisk *disk; 597 #ifdef CONFIG_NVME_MULTIPATH 598 enum nvme_ana_state ana_state; 599 u32 ana_grpid; 600 atomic_long_t failover; 601 #endif 602 atomic_long_t retries; 603 atomic_long_t errors; 604 struct list_head siblings; 605 struct kref kref; 606 struct nvme_ns_head *head; 607 608 unsigned long flags; 609 #define NVME_NS_REMOVING 0 610 #define NVME_NS_ANA_PENDING 2 611 #define NVME_NS_FORCE_RO 3 612 #define NVME_NS_READY 4 613 #define NVME_NS_SYSFS_ATTR_LINK 5 614 615 struct cdev cdev; 616 struct device cdev_device; 617 618 struct nvme_fault_inject fault_inject; 619 }; 620 621 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 622 static inline bool nvme_ns_has_pi(struct nvme_ns_head *head) 623 { 624 return head->pi_type && head->ms == head->pi_size; 625 } 626 627 static inline unsigned long nvme_get_virt_boundary(struct nvme_ctrl *ctrl, 628 bool is_admin) 629 { 630 return NVME_CTRL_PAGE_SIZE - 1; 631 } 632 633 struct nvme_ctrl_ops { 634 const char *name; 635 struct module *module; 636 unsigned int flags; 637 #define NVME_F_FABRICS (1 << 0) 638 #define NVME_F_METADATA_SUPPORTED (1 << 1) 639 #define NVME_F_BLOCKING (1 << 2) 640 641 const struct attribute_group **dev_attr_groups; 642 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 643 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 644 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 645 void (*free_ctrl)(struct nvme_ctrl *ctrl); 646 void (*submit_async_event)(struct nvme_ctrl *ctrl); 647 int (*subsystem_reset)(struct nvme_ctrl *ctrl); 648 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 649 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 650 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 651 void (*print_device_info)(struct nvme_ctrl *ctrl); 652 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 653 unsigned long (*get_virt_boundary)(struct nvme_ctrl *ctrl, bool is_admin); 654 }; 655 656 /* 657 * nvme command_id is constructed as such: 658 * | xxxx | xxxxxxxxxxxx | 659 * gen request tag 660 */ 661 #define nvme_genctr_mask(gen) (gen & 0xf) 662 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 663 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 664 #define nvme_tag_from_cid(cid) (cid & 0xfff) 665 666 static inline u16 nvme_cid(struct request *rq) 667 { 668 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 669 } 670 671 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 672 u16 command_id) 673 { 674 u8 genctr = nvme_genctr_from_cid(command_id); 675 u16 tag = nvme_tag_from_cid(command_id); 676 struct request *rq; 677 678 rq = blk_mq_tag_to_rq(tags, tag); 679 if (unlikely(!rq)) { 680 pr_err("could not locate request for tag %#x\n", 681 tag); 682 return NULL; 683 } 684 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 685 dev_err(nvme_req(rq)->ctrl->device, 686 "request %#x genctr mismatch (got %#x expected %#x)\n", 687 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 688 return NULL; 689 } 690 return rq; 691 } 692 693 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 694 u16 command_id) 695 { 696 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 697 } 698 699 /* 700 * Return the length of the string without the space padding 701 */ 702 static inline int nvme_strlen(char *s, int len) 703 { 704 while (s[len - 1] == ' ') 705 len--; 706 return len; 707 } 708 709 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 710 { 711 struct nvme_subsystem *subsys = ctrl->subsys; 712 713 if (ctrl->ops->print_device_info) { 714 ctrl->ops->print_device_info(ctrl); 715 return; 716 } 717 718 dev_err(ctrl->device, 719 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 720 nvme_strlen(subsys->model, sizeof(subsys->model)), 721 subsys->model, nvme_strlen(subsys->firmware_rev, 722 sizeof(subsys->firmware_rev)), 723 subsys->firmware_rev); 724 } 725 726 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 727 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 728 const char *dev_name); 729 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 730 void nvme_should_fail(struct request *req); 731 #else 732 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 733 const char *dev_name) 734 { 735 } 736 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 737 { 738 } 739 static inline void nvme_should_fail(struct request *req) {} 740 #endif 741 742 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 743 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 744 745 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 746 { 747 if (!ctrl->subsystem || !ctrl->ops->subsystem_reset) 748 return -ENOTTY; 749 return ctrl->ops->subsystem_reset(ctrl); 750 } 751 752 /* 753 * Convert a 512B sector number to a device logical block number. 754 */ 755 static inline u64 nvme_sect_to_lba(struct nvme_ns_head *head, sector_t sector) 756 { 757 return sector >> (head->lba_shift - SECTOR_SHIFT); 758 } 759 760 /* 761 * Convert a device logical block number to a 512B sector number. 762 */ 763 static inline sector_t nvme_lba_to_sect(struct nvme_ns_head *head, u64 lba) 764 { 765 return lba << (head->lba_shift - SECTOR_SHIFT); 766 } 767 768 /* 769 * Convert byte length to nvme's 0-based num dwords 770 */ 771 static inline u32 nvme_bytes_to_numd(size_t len) 772 { 773 return (len >> 2) - 1; 774 } 775 776 /* Decode a 2-byte "0's based"/"0-based" field */ 777 static inline u32 from0based(__le16 value) 778 { 779 return (u32)le16_to_cpu(value) + 1; 780 } 781 782 static inline bool nvme_is_ana_error(u16 status) 783 { 784 switch (status & NVME_SCT_SC_MASK) { 785 case NVME_SC_ANA_TRANSITION: 786 case NVME_SC_ANA_INACCESSIBLE: 787 case NVME_SC_ANA_PERSISTENT_LOSS: 788 return true; 789 default: 790 return false; 791 } 792 } 793 794 static inline bool nvme_is_path_error(u16 status) 795 { 796 /* check for a status code type of 'path related status' */ 797 return (status & NVME_SCT_MASK) == NVME_SCT_PATH; 798 } 799 800 /* 801 * Fill in the status and result information from the CQE, and then figure out 802 * if blk-mq will need to use IPI magic to complete the request, and if yes do 803 * so. If not let the caller complete the request without an indirect function 804 * call. 805 */ 806 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 807 union nvme_result result) 808 { 809 struct nvme_request *rq = nvme_req(req); 810 struct nvme_ctrl *ctrl = rq->ctrl; 811 812 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 813 rq->genctr++; 814 815 rq->status = le16_to_cpu(status) >> 1; 816 rq->result = result; 817 /* inject error when permitted by fault injection framework */ 818 nvme_should_fail(req); 819 if (unlikely(blk_should_fake_timeout(req->q))) 820 return true; 821 return blk_mq_complete_request_remote(req); 822 } 823 824 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 825 { 826 get_device(ctrl->device); 827 } 828 829 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 830 { 831 put_device(ctrl->device); 832 } 833 834 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 835 { 836 return !qid && 837 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 838 } 839 840 /* 841 * Returns true for sink states that can't ever transition back to live. 842 */ 843 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl) 844 { 845 switch (nvme_ctrl_state(ctrl)) { 846 case NVME_CTRL_NEW: 847 case NVME_CTRL_LIVE: 848 case NVME_CTRL_RESETTING: 849 case NVME_CTRL_CONNECTING: 850 return false; 851 case NVME_CTRL_DELETING: 852 case NVME_CTRL_DELETING_NOIO: 853 case NVME_CTRL_DEAD: 854 return true; 855 default: 856 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 857 return true; 858 } 859 } 860 861 void nvme_end_req(struct request *req); 862 void nvme_complete_rq(struct request *req); 863 void nvme_complete_batch_req(struct request *req); 864 865 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 866 void (*fn)(struct request *rq)) 867 { 868 struct request *req; 869 870 rq_list_for_each(&iob->req_list, req) { 871 fn(req); 872 nvme_complete_batch_req(req); 873 } 874 blk_mq_end_request_batch(iob); 875 } 876 877 blk_status_t nvme_host_path_error(struct request *req); 878 bool nvme_cancel_request(struct request *req, void *data); 879 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 880 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 881 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 882 enum nvme_ctrl_state new_state); 883 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 884 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 885 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 886 const struct nvme_ctrl_ops *ops, unsigned long quirks); 887 int nvme_add_ctrl(struct nvme_ctrl *ctrl); 888 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 889 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 890 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 891 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 892 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 893 const struct blk_mq_ops *ops, unsigned int cmd_size); 894 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 895 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 896 const struct blk_mq_ops *ops, unsigned int nr_maps, 897 unsigned int cmd_size); 898 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 899 900 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 901 902 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 903 volatile union nvme_result *res); 904 905 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 906 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 907 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 908 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 909 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 910 void nvme_sync_queues(struct nvme_ctrl *ctrl); 911 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 912 void nvme_unfreeze(struct nvme_ctrl *ctrl); 913 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 914 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl); 915 void nvme_start_freeze(struct nvme_ctrl *ctrl); 916 917 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 918 { 919 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 920 } 921 922 #define NVME_QID_ANY -1 923 void nvme_init_request(struct request *req, struct nvme_command *cmd); 924 void nvme_cleanup_cmd(struct request *req); 925 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 926 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 927 struct request *req); 928 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 929 bool queue_live, enum nvme_ctrl_state state); 930 931 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 932 bool queue_live) 933 { 934 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 935 936 if (likely(state == NVME_CTRL_LIVE)) 937 return true; 938 if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING) 939 return queue_live; 940 return __nvme_check_ready(ctrl, rq, queue_live, state); 941 } 942 943 /* 944 * NSID shall be unique for all shared namespaces, or if at least one of the 945 * following conditions is met: 946 * 1. Namespace Management is supported by the controller 947 * 2. ANA is supported by the controller 948 * 3. NVM Set are supported by the controller 949 * 950 * In other case, private namespace are not required to report a unique NSID. 951 */ 952 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 953 struct nvme_ns_head *head) 954 { 955 return head->shared || 956 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 957 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 958 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 959 } 960 961 /* 962 * Flags for __nvme_submit_sync_cmd() 963 */ 964 typedef __u32 __bitwise nvme_submit_flags_t; 965 966 enum { 967 /* Insert request at the head of the queue */ 968 NVME_SUBMIT_AT_HEAD = (__force nvme_submit_flags_t)(1 << 0), 969 /* Set BLK_MQ_REQ_NOWAIT when allocating request */ 970 NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1), 971 /* Set BLK_MQ_REQ_RESERVED when allocating request */ 972 NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2), 973 /* Retry command when NVME_STATUS_DNR is not set in the result */ 974 NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3), 975 }; 976 977 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 978 void *buf, unsigned bufflen); 979 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 980 union nvme_result *result, void *buffer, unsigned bufflen, 981 int qid, nvme_submit_flags_t flags); 982 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 983 unsigned int dword11, void *buffer, size_t buflen, 984 void *result); 985 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 986 unsigned int dword11, void *buffer, size_t buflen, 987 void *result); 988 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 989 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 990 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 991 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 992 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 993 void nvme_queue_scan(struct nvme_ctrl *ctrl); 994 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 995 void *log, size_t size, u64 offset); 996 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 997 void nvme_put_ns_head(struct nvme_ns_head *head); 998 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 999 const struct file_operations *fops, struct module *owner); 1000 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 1001 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 1002 unsigned int cmd, unsigned long arg); 1003 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 1004 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 1005 unsigned int cmd, unsigned long arg); 1006 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 1007 unsigned long arg); 1008 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 1009 unsigned long arg); 1010 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 1011 struct io_comp_batch *iob, unsigned int poll_flags); 1012 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 1013 unsigned int issue_flags); 1014 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 1015 unsigned int issue_flags); 1016 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1017 struct nvme_id_ns **id); 1018 int nvme_getgeo(struct gendisk *disk, struct hd_geometry *geo); 1019 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 1020 1021 extern const struct attribute_group *nvme_ns_attr_groups[]; 1022 extern const struct attribute_group nvme_ns_mpath_attr_group; 1023 extern const struct pr_ops nvme_pr_ops; 1024 extern const struct block_device_operations nvme_ns_head_ops; 1025 extern const struct attribute_group nvme_dev_attrs_group; 1026 extern const struct attribute_group nvme_dev_diag_attrs_group; 1027 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 1028 extern const struct attribute_group *nvme_dev_attr_groups[]; 1029 extern const struct block_device_operations nvme_bdev_ops; 1030 1031 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 1032 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 1033 #ifdef CONFIG_NVME_MULTIPATH 1034 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 1035 { 1036 return ctrl->ana_log_buf != NULL; 1037 } 1038 1039 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 1040 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 1041 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 1042 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 1043 void nvme_failover_req(struct request *req); 1044 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 1045 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 1046 void nvme_mpath_add_sysfs_link(struct nvme_ns_head *ns); 1047 void nvme_mpath_remove_sysfs_link(struct nvme_ns *ns); 1048 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 1049 void nvme_mpath_put_disk(struct nvme_ns_head *head); 1050 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 1051 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 1052 void nvme_mpath_update(struct nvme_ctrl *ctrl); 1053 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 1054 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 1055 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 1056 void nvme_mpath_revalidate_paths(struct nvme_ns_head *head); 1057 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 1058 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 1059 void nvme_mpath_start_request(struct request *rq); 1060 void nvme_mpath_end_request(struct request *rq); 1061 1062 static inline void nvme_trace_bio_complete(struct request *req) 1063 { 1064 struct nvme_ns *ns = req->q->queuedata; 1065 1066 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 1067 trace_block_bio_complete(ns->head->disk->queue, req->bio); 1068 } 1069 1070 extern bool multipath; 1071 extern struct device_attribute dev_attr_ana_grpid; 1072 extern struct device_attribute dev_attr_ana_state; 1073 extern struct device_attribute dev_attr_queue_depth; 1074 extern struct device_attribute dev_attr_numa_nodes; 1075 extern struct device_attribute dev_attr_delayed_removal_secs; 1076 extern struct device_attribute dev_attr_multipath_failover_count; 1077 extern struct device_attribute dev_attr_io_requeue_no_usable_path_count; 1078 extern struct device_attribute dev_attr_io_fail_no_available_path_count; 1079 extern struct device_attribute subsys_attr_iopolicy; 1080 1081 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 1082 { 1083 return disk->fops == &nvme_ns_head_ops; 1084 } 1085 static inline bool nvme_mpath_queue_if_no_path(struct nvme_ns_head *head) 1086 { 1087 if (test_bit(NVME_NSHEAD_QUEUE_IF_NO_PATH, &head->flags)) 1088 return true; 1089 return false; 1090 } 1091 #else 1092 #define multipath false 1093 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 1094 { 1095 return false; 1096 } 1097 static inline void nvme_failover_req(struct request *req) 1098 { 1099 } 1100 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 1101 { 1102 } 1103 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 1104 struct nvme_ns_head *head) 1105 { 1106 return 0; 1107 } 1108 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 1109 { 1110 } 1111 static inline void nvme_mpath_put_disk(struct nvme_ns_head *head) 1112 { 1113 } 1114 static inline void nvme_mpath_add_sysfs_link(struct nvme_ns *ns) 1115 { 1116 } 1117 static inline void nvme_mpath_remove_sysfs_link(struct nvme_ns *ns) 1118 { 1119 } 1120 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 1121 { 1122 return false; 1123 } 1124 static inline void nvme_mpath_revalidate_paths(struct nvme_ns_head *head) 1125 { 1126 } 1127 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 1128 { 1129 } 1130 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 1131 { 1132 } 1133 static inline void nvme_trace_bio_complete(struct request *req) 1134 { 1135 } 1136 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 1137 { 1138 } 1139 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 1140 struct nvme_id_ctrl *id) 1141 { 1142 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 1143 dev_warn(ctrl->device, 1144 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 1145 return 0; 1146 } 1147 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 1148 { 1149 } 1150 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 1151 { 1152 } 1153 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 1154 { 1155 } 1156 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1157 { 1158 } 1159 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1160 { 1161 } 1162 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1163 { 1164 } 1165 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 1166 { 1167 } 1168 static inline void nvme_mpath_start_request(struct request *rq) 1169 { 1170 } 1171 static inline void nvme_mpath_end_request(struct request *rq) 1172 { 1173 } 1174 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 1175 { 1176 return false; 1177 } 1178 static inline bool nvme_mpath_queue_if_no_path(struct nvme_ns_head *head) 1179 { 1180 return false; 1181 } 1182 #endif /* CONFIG_NVME_MULTIPATH */ 1183 1184 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16], 1185 enum blk_unique_id type); 1186 1187 struct nvme_zone_info { 1188 u64 zone_size; 1189 unsigned int max_open_zones; 1190 unsigned int max_active_zones; 1191 }; 1192 1193 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1194 unsigned int nr_zones, struct blk_report_zones_args *args); 1195 int nvme_query_zone_info(struct nvme_ns *ns, unsigned lbaf, 1196 struct nvme_zone_info *zi); 1197 void nvme_update_zone_info(struct nvme_ns *ns, struct queue_limits *lim, 1198 struct nvme_zone_info *zi); 1199 #ifdef CONFIG_BLK_DEV_ZONED 1200 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1201 struct nvme_command *cmnd, 1202 enum nvme_zone_mgmt_action action); 1203 #else 1204 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1205 struct request *req, struct nvme_command *cmnd, 1206 enum nvme_zone_mgmt_action action) 1207 { 1208 return BLK_STS_NOTSUPP; 1209 } 1210 #endif 1211 1212 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1213 { 1214 struct gendisk *disk = dev_to_disk(dev); 1215 1216 WARN_ON(nvme_disk_is_ns_head(disk)); 1217 return disk->private_data; 1218 } 1219 1220 #ifdef CONFIG_NVME_HWMON 1221 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1222 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1223 #else 1224 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1225 { 1226 return 0; 1227 } 1228 1229 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1230 { 1231 } 1232 #endif 1233 1234 static inline void nvme_start_request(struct request *rq) 1235 { 1236 if (rq->cmd_flags & REQ_NVME_MPATH) 1237 nvme_mpath_start_request(rq); 1238 blk_mq_start_request(rq); 1239 } 1240 1241 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1242 { 1243 return ctrl->sgls & (NVME_CTRL_SGLS_BYTE_ALIGNED | 1244 NVME_CTRL_SGLS_DWORD_ALIGNED); 1245 } 1246 1247 static inline bool nvme_ctrl_meta_sgl_supported(struct nvme_ctrl *ctrl) 1248 { 1249 if (ctrl->ops->flags & NVME_F_FABRICS) 1250 return true; 1251 return ctrl->sgls & NVME_CTRL_SGLS_MSDS; 1252 } 1253 1254 #ifdef CONFIG_NVME_HOST_AUTH 1255 int __init nvme_init_auth(void); 1256 void __exit nvme_exit_auth(void); 1257 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1258 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1259 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1260 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1261 void nvme_auth_free(struct nvme_ctrl *ctrl); 1262 void nvme_auth_revoke_tls_key(struct nvme_ctrl *ctrl); 1263 #else 1264 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1265 { 1266 return 0; 1267 } 1268 static inline int __init nvme_init_auth(void) 1269 { 1270 return 0; 1271 } 1272 static inline void __exit nvme_exit_auth(void) 1273 { 1274 } 1275 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1276 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1277 { 1278 return -EPROTONOSUPPORT; 1279 } 1280 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1281 { 1282 return -EPROTONOSUPPORT; 1283 } 1284 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1285 static inline void nvme_auth_revoke_tls_key(struct nvme_ctrl *ctrl) {}; 1286 #endif 1287 1288 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1289 u8 opcode); 1290 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1291 int nvme_execute_rq(struct request *rq, bool at_head); 1292 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1293 struct nvme_command *cmd, int status); 1294 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1295 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1296 bool nvme_get_ns(struct nvme_ns *ns); 1297 void nvme_put_ns(struct nvme_ns *ns); 1298 1299 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1300 { 1301 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1302 } 1303 1304 #endif /* _NVME_H */ 1305