1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012,2013 - ARM Ltd
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 *
6 * Derived from arch/arm/kvm/handle_exit.c:
7 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
8 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
9 */
10
11 #include <linux/kvm.h>
12 #include <linux/kvm_host.h>
13
14 #include <asm/esr.h>
15 #include <asm/exception.h>
16 #include <asm/kvm_asm.h>
17 #include <asm/kvm_emulate.h>
18 #include <asm/kvm_mmu.h>
19 #include <asm/kvm_nested.h>
20 #include <asm/debug-monitors.h>
21 #include <asm/stacktrace/nvhe.h>
22 #include <asm/traps.h>
23
24 #include <kvm/arm_hypercalls.h>
25
26 #define CREATE_TRACE_POINTS
27 #include "trace_handle_exit.h"
28
29 typedef int (*exit_handle_fn)(struct kvm_vcpu *);
30
kvm_handle_guest_serror(struct kvm_vcpu * vcpu,u64 esr)31 static void kvm_handle_guest_serror(struct kvm_vcpu *vcpu, u64 esr)
32 {
33 if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(NULL, esr))
34 kvm_inject_vabt(vcpu);
35 }
36
handle_hvc(struct kvm_vcpu * vcpu)37 static int handle_hvc(struct kvm_vcpu *vcpu)
38 {
39 trace_kvm_hvc_arm64(*vcpu_pc(vcpu), vcpu_get_reg(vcpu, 0),
40 kvm_vcpu_hvc_get_imm(vcpu));
41 vcpu->stat.hvc_exit_stat++;
42
43 /* Forward hvc instructions to the virtual EL2 if the guest has EL2. */
44 if (vcpu_has_nv(vcpu)) {
45 if (vcpu_read_sys_reg(vcpu, HCR_EL2) & HCR_HCD)
46 kvm_inject_undefined(vcpu);
47 else
48 kvm_inject_nested_sync(vcpu, kvm_vcpu_get_esr(vcpu));
49
50 return 1;
51 }
52
53 return kvm_smccc_call_handler(vcpu);
54 }
55
handle_smc(struct kvm_vcpu * vcpu)56 static int handle_smc(struct kvm_vcpu *vcpu)
57 {
58 /*
59 * Forward this trapped smc instruction to the virtual EL2 if
60 * the guest has asked for it.
61 */
62 if (forward_smc_trap(vcpu))
63 return 1;
64
65 /*
66 * "If an SMC instruction executed at Non-secure EL1 is
67 * trapped to EL2 because HCR_EL2.TSC is 1, the exception is a
68 * Trap exception, not a Secure Monitor Call exception [...]"
69 *
70 * We need to advance the PC after the trap, as it would
71 * otherwise return to the same address. Furthermore, pre-incrementing
72 * the PC before potentially exiting to userspace maintains the same
73 * abstraction for both SMCs and HVCs.
74 */
75 kvm_incr_pc(vcpu);
76
77 /*
78 * SMCs with a nonzero immediate are reserved according to DEN0028E 2.9
79 * "SMC and HVC immediate value".
80 */
81 if (kvm_vcpu_hvc_get_imm(vcpu)) {
82 vcpu_set_reg(vcpu, 0, ~0UL);
83 return 1;
84 }
85
86 /*
87 * If imm is zero then it is likely an SMCCC call.
88 *
89 * Note that on ARMv8.3, even if EL3 is not implemented, SMC executed
90 * at Non-secure EL1 is trapped to EL2 if HCR_EL2.TSC==1, rather than
91 * being treated as UNDEFINED.
92 */
93 return kvm_smccc_call_handler(vcpu);
94 }
95
96 /*
97 * This handles the cases where the system does not support FP/ASIMD or when
98 * we are running nested virtualization and the guest hypervisor is trapping
99 * FP/ASIMD accesses by its guest guest.
100 *
101 * All other handling of guest vs. host FP/ASIMD register state is handled in
102 * fixup_guest_exit().
103 */
kvm_handle_fpasimd(struct kvm_vcpu * vcpu)104 static int kvm_handle_fpasimd(struct kvm_vcpu *vcpu)
105 {
106 if (guest_hyp_fpsimd_traps_enabled(vcpu))
107 return kvm_inject_nested_sync(vcpu, kvm_vcpu_get_esr(vcpu));
108
109 /* This is the case when the system doesn't support FP/ASIMD. */
110 kvm_inject_undefined(vcpu);
111 return 1;
112 }
113
114 /**
115 * kvm_handle_wfx - handle a wait-for-interrupts or wait-for-event
116 * instruction executed by a guest
117 *
118 * @vcpu: the vcpu pointer
119 *
120 * WFE[T]: Yield the CPU and come back to this vcpu when the scheduler
121 * decides to.
122 * WFI: Simply call kvm_vcpu_halt(), which will halt execution of
123 * world-switches and schedule other host processes until there is an
124 * incoming IRQ or FIQ to the VM.
125 * WFIT: Same as WFI, with a timed wakeup implemented as a background timer
126 *
127 * WF{I,E}T can immediately return if the deadline has already expired.
128 */
kvm_handle_wfx(struct kvm_vcpu * vcpu)129 static int kvm_handle_wfx(struct kvm_vcpu *vcpu)
130 {
131 u64 esr = kvm_vcpu_get_esr(vcpu);
132
133 if (esr & ESR_ELx_WFx_ISS_WFE) {
134 trace_kvm_wfx_arm64(*vcpu_pc(vcpu), true);
135 vcpu->stat.wfe_exit_stat++;
136 } else {
137 trace_kvm_wfx_arm64(*vcpu_pc(vcpu), false);
138 vcpu->stat.wfi_exit_stat++;
139 }
140
141 if (esr & ESR_ELx_WFx_ISS_WFxT) {
142 if (esr & ESR_ELx_WFx_ISS_RV) {
143 u64 val, now;
144
145 now = kvm_arm_timer_get_reg(vcpu, KVM_REG_ARM_TIMER_CNT);
146 val = vcpu_get_reg(vcpu, kvm_vcpu_sys_get_rt(vcpu));
147
148 if (now >= val)
149 goto out;
150 } else {
151 /* Treat WFxT as WFx if RN is invalid */
152 esr &= ~ESR_ELx_WFx_ISS_WFxT;
153 }
154 }
155
156 if (esr & ESR_ELx_WFx_ISS_WFE) {
157 kvm_vcpu_on_spin(vcpu, vcpu_mode_priv(vcpu));
158 } else {
159 if (esr & ESR_ELx_WFx_ISS_WFxT)
160 vcpu_set_flag(vcpu, IN_WFIT);
161
162 kvm_vcpu_wfi(vcpu);
163 }
164 out:
165 kvm_incr_pc(vcpu);
166
167 return 1;
168 }
169
170 /**
171 * kvm_handle_guest_debug - handle a debug exception instruction
172 *
173 * @vcpu: the vcpu pointer
174 *
175 * We route all debug exceptions through the same handler. If both the
176 * guest and host are using the same debug facilities it will be up to
177 * userspace to re-inject the correct exception for guest delivery.
178 *
179 * @return: 0 (while setting vcpu->run->exit_reason)
180 */
kvm_handle_guest_debug(struct kvm_vcpu * vcpu)181 static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu)
182 {
183 struct kvm_run *run = vcpu->run;
184 u64 esr = kvm_vcpu_get_esr(vcpu);
185
186 run->exit_reason = KVM_EXIT_DEBUG;
187 run->debug.arch.hsr = lower_32_bits(esr);
188 run->debug.arch.hsr_high = upper_32_bits(esr);
189 run->flags = KVM_DEBUG_ARCH_HSR_HIGH_VALID;
190
191 switch (ESR_ELx_EC(esr)) {
192 case ESR_ELx_EC_WATCHPT_LOW:
193 run->debug.arch.far = vcpu->arch.fault.far_el2;
194 break;
195 case ESR_ELx_EC_SOFTSTP_LOW:
196 vcpu_clear_flag(vcpu, DBG_SS_ACTIVE_PENDING);
197 break;
198 }
199
200 return 0;
201 }
202
kvm_handle_unknown_ec(struct kvm_vcpu * vcpu)203 static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu)
204 {
205 u64 esr = kvm_vcpu_get_esr(vcpu);
206
207 kvm_pr_unimpl("Unknown exception class: esr: %#016llx -- %s\n",
208 esr, esr_get_class_string(esr));
209
210 kvm_inject_undefined(vcpu);
211 return 1;
212 }
213
214 /*
215 * Guest access to SVE registers should be routed to this handler only
216 * when the system doesn't support SVE.
217 */
handle_sve(struct kvm_vcpu * vcpu)218 static int handle_sve(struct kvm_vcpu *vcpu)
219 {
220 if (guest_hyp_sve_traps_enabled(vcpu))
221 return kvm_inject_nested_sync(vcpu, kvm_vcpu_get_esr(vcpu));
222
223 kvm_inject_undefined(vcpu);
224 return 1;
225 }
226
227 /*
228 * Two possibilities to handle a trapping ptrauth instruction:
229 *
230 * - Guest usage of a ptrauth instruction (which the guest EL1 did not
231 * turn into a NOP). If we get here, it is because we didn't enable
232 * ptrauth for the guest. This results in an UNDEF, as it isn't
233 * supposed to use ptrauth without being told it could.
234 *
235 * - Running an L2 NV guest while L1 has left HCR_EL2.API==0, and for
236 * which we reinject the exception into L1.
237 *
238 * Anything else is an emulation bug (hence the WARN_ON + UNDEF).
239 */
kvm_handle_ptrauth(struct kvm_vcpu * vcpu)240 static int kvm_handle_ptrauth(struct kvm_vcpu *vcpu)
241 {
242 if (!vcpu_has_ptrauth(vcpu)) {
243 kvm_inject_undefined(vcpu);
244 return 1;
245 }
246
247 if (vcpu_has_nv(vcpu) && !is_hyp_ctxt(vcpu)) {
248 kvm_inject_nested_sync(vcpu, kvm_vcpu_get_esr(vcpu));
249 return 1;
250 }
251
252 /* Really shouldn't be here! */
253 WARN_ON_ONCE(1);
254 kvm_inject_undefined(vcpu);
255 return 1;
256 }
257
kvm_handle_eret(struct kvm_vcpu * vcpu)258 static int kvm_handle_eret(struct kvm_vcpu *vcpu)
259 {
260 if (esr_iss_is_eretax(kvm_vcpu_get_esr(vcpu)) &&
261 !vcpu_has_ptrauth(vcpu))
262 return kvm_handle_ptrauth(vcpu);
263
264 /*
265 * If we got here, two possibilities:
266 *
267 * - the guest is in EL2, and we need to fully emulate ERET
268 *
269 * - the guest is in EL1, and we need to reinject the
270 * exception into the L1 hypervisor.
271 *
272 * If KVM ever traps ERET for its own use, we'll have to
273 * revisit this.
274 */
275 if (is_hyp_ctxt(vcpu))
276 kvm_emulate_nested_eret(vcpu);
277 else
278 kvm_inject_nested_sync(vcpu, kvm_vcpu_get_esr(vcpu));
279
280 return 1;
281 }
282
handle_svc(struct kvm_vcpu * vcpu)283 static int handle_svc(struct kvm_vcpu *vcpu)
284 {
285 /*
286 * So far, SVC traps only for NV via HFGITR_EL2. A SVC from a
287 * 32bit guest would be caught by vpcu_mode_is_bad_32bit(), so
288 * we should only have to deal with a 64 bit exception.
289 */
290 kvm_inject_nested_sync(vcpu, kvm_vcpu_get_esr(vcpu));
291 return 1;
292 }
293
294 static exit_handle_fn arm_exit_handlers[] = {
295 [0 ... ESR_ELx_EC_MAX] = kvm_handle_unknown_ec,
296 [ESR_ELx_EC_WFx] = kvm_handle_wfx,
297 [ESR_ELx_EC_CP15_32] = kvm_handle_cp15_32,
298 [ESR_ELx_EC_CP15_64] = kvm_handle_cp15_64,
299 [ESR_ELx_EC_CP14_MR] = kvm_handle_cp14_32,
300 [ESR_ELx_EC_CP14_LS] = kvm_handle_cp14_load_store,
301 [ESR_ELx_EC_CP10_ID] = kvm_handle_cp10_id,
302 [ESR_ELx_EC_CP14_64] = kvm_handle_cp14_64,
303 [ESR_ELx_EC_HVC32] = handle_hvc,
304 [ESR_ELx_EC_SMC32] = handle_smc,
305 [ESR_ELx_EC_HVC64] = handle_hvc,
306 [ESR_ELx_EC_SMC64] = handle_smc,
307 [ESR_ELx_EC_SVC64] = handle_svc,
308 [ESR_ELx_EC_SYS64] = kvm_handle_sys_reg,
309 [ESR_ELx_EC_SVE] = handle_sve,
310 [ESR_ELx_EC_ERET] = kvm_handle_eret,
311 [ESR_ELx_EC_IABT_LOW] = kvm_handle_guest_abort,
312 [ESR_ELx_EC_DABT_LOW] = kvm_handle_guest_abort,
313 [ESR_ELx_EC_SOFTSTP_LOW]= kvm_handle_guest_debug,
314 [ESR_ELx_EC_WATCHPT_LOW]= kvm_handle_guest_debug,
315 [ESR_ELx_EC_BREAKPT_LOW]= kvm_handle_guest_debug,
316 [ESR_ELx_EC_BKPT32] = kvm_handle_guest_debug,
317 [ESR_ELx_EC_BRK64] = kvm_handle_guest_debug,
318 [ESR_ELx_EC_FP_ASIMD] = kvm_handle_fpasimd,
319 [ESR_ELx_EC_PAC] = kvm_handle_ptrauth,
320 };
321
kvm_get_exit_handler(struct kvm_vcpu * vcpu)322 static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
323 {
324 u64 esr = kvm_vcpu_get_esr(vcpu);
325 u8 esr_ec = ESR_ELx_EC(esr);
326
327 return arm_exit_handlers[esr_ec];
328 }
329
330 /*
331 * We may be single-stepping an emulated instruction. If the emulation
332 * has been completed in the kernel, we can return to userspace with a
333 * KVM_EXIT_DEBUG, otherwise userspace needs to complete its
334 * emulation first.
335 */
handle_trap_exceptions(struct kvm_vcpu * vcpu)336 static int handle_trap_exceptions(struct kvm_vcpu *vcpu)
337 {
338 int handled;
339
340 /*
341 * See ARM ARM B1.14.1: "Hyp traps on instructions
342 * that fail their condition code check"
343 */
344 if (!kvm_condition_valid(vcpu)) {
345 kvm_incr_pc(vcpu);
346 handled = 1;
347 } else {
348 exit_handle_fn exit_handler;
349
350 exit_handler = kvm_get_exit_handler(vcpu);
351 handled = exit_handler(vcpu);
352 }
353
354 return handled;
355 }
356
357 /*
358 * Return > 0 to return to guest, < 0 on error, 0 (and set exit_reason) on
359 * proper exit to userspace.
360 */
handle_exit(struct kvm_vcpu * vcpu,int exception_index)361 int handle_exit(struct kvm_vcpu *vcpu, int exception_index)
362 {
363 struct kvm_run *run = vcpu->run;
364
365 if (ARM_SERROR_PENDING(exception_index)) {
366 /*
367 * The SError is handled by handle_exit_early(). If the guest
368 * survives it will re-execute the original instruction.
369 */
370 return 1;
371 }
372
373 exception_index = ARM_EXCEPTION_CODE(exception_index);
374
375 switch (exception_index) {
376 case ARM_EXCEPTION_IRQ:
377 return 1;
378 case ARM_EXCEPTION_EL1_SERROR:
379 return 1;
380 case ARM_EXCEPTION_TRAP:
381 return handle_trap_exceptions(vcpu);
382 case ARM_EXCEPTION_HYP_GONE:
383 /*
384 * EL2 has been reset to the hyp-stub. This happens when a guest
385 * is pre-emptied by kvm_reboot()'s shutdown call.
386 */
387 run->exit_reason = KVM_EXIT_FAIL_ENTRY;
388 return 0;
389 case ARM_EXCEPTION_IL:
390 /*
391 * We attempted an illegal exception return. Guest state must
392 * have been corrupted somehow. Give up.
393 */
394 run->exit_reason = KVM_EXIT_FAIL_ENTRY;
395 return -EINVAL;
396 default:
397 kvm_pr_unimpl("Unsupported exception type: %d",
398 exception_index);
399 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
400 return 0;
401 }
402 }
403
404 /* For exit types that need handling before we can be preempted */
handle_exit_early(struct kvm_vcpu * vcpu,int exception_index)405 void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index)
406 {
407 if (ARM_SERROR_PENDING(exception_index)) {
408 if (this_cpu_has_cap(ARM64_HAS_RAS_EXTN)) {
409 u64 disr = kvm_vcpu_get_disr(vcpu);
410
411 kvm_handle_guest_serror(vcpu, disr_to_esr(disr));
412 } else {
413 kvm_inject_vabt(vcpu);
414 }
415
416 return;
417 }
418
419 exception_index = ARM_EXCEPTION_CODE(exception_index);
420
421 if (exception_index == ARM_EXCEPTION_EL1_SERROR)
422 kvm_handle_guest_serror(vcpu, kvm_vcpu_get_esr(vcpu));
423 }
424
print_nvhe_hyp_panic(const char * name,u64 panic_addr)425 static void print_nvhe_hyp_panic(const char *name, u64 panic_addr)
426 {
427 kvm_err("nVHE hyp %s at: [<%016llx>] %pB!\n", name, panic_addr,
428 (void *)(panic_addr + kaslr_offset()));
429 }
430
kvm_nvhe_report_cfi_failure(u64 panic_addr)431 static void kvm_nvhe_report_cfi_failure(u64 panic_addr)
432 {
433 print_nvhe_hyp_panic("CFI failure", panic_addr);
434
435 if (IS_ENABLED(CONFIG_CFI_PERMISSIVE))
436 kvm_err(" (CONFIG_CFI_PERMISSIVE ignored for hyp failures)\n");
437 }
438
nvhe_hyp_panic_handler(u64 esr,u64 spsr,u64 elr_virt,u64 elr_phys,u64 par,uintptr_t vcpu,u64 far,u64 hpfar)439 void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr,
440 u64 elr_virt, u64 elr_phys,
441 u64 par, uintptr_t vcpu,
442 u64 far, u64 hpfar) {
443 u64 elr_in_kimg = __phys_to_kimg(elr_phys);
444 u64 hyp_offset = elr_in_kimg - kaslr_offset() - elr_virt;
445 u64 mode = spsr & PSR_MODE_MASK;
446 u64 panic_addr = elr_virt + hyp_offset;
447
448 if (mode != PSR_MODE_EL2t && mode != PSR_MODE_EL2h) {
449 kvm_err("Invalid host exception to nVHE hyp!\n");
450 } else if (ESR_ELx_EC(esr) == ESR_ELx_EC_BRK64 &&
451 esr_brk_comment(esr) == BUG_BRK_IMM) {
452 const char *file = NULL;
453 unsigned int line = 0;
454
455 /* All hyp bugs, including warnings, are treated as fatal. */
456 if (!is_protected_kvm_enabled() ||
457 IS_ENABLED(CONFIG_NVHE_EL2_DEBUG)) {
458 struct bug_entry *bug = find_bug(elr_in_kimg);
459
460 if (bug)
461 bug_get_file_line(bug, &file, &line);
462 }
463
464 if (file)
465 kvm_err("nVHE hyp BUG at: %s:%u!\n", file, line);
466 else
467 print_nvhe_hyp_panic("BUG", panic_addr);
468 } else if (IS_ENABLED(CONFIG_CFI_CLANG) && esr_is_cfi_brk(esr)) {
469 kvm_nvhe_report_cfi_failure(panic_addr);
470 } else {
471 print_nvhe_hyp_panic("panic", panic_addr);
472 }
473
474 /* Dump the nVHE hypervisor backtrace */
475 kvm_nvhe_dump_backtrace(hyp_offset);
476
477 /*
478 * Hyp has panicked and we're going to handle that by panicking the
479 * kernel. The kernel offset will be revealed in the panic so we're
480 * also safe to reveal the hyp offset as a debugging aid for translating
481 * hyp VAs to vmlinux addresses.
482 */
483 kvm_err("Hyp Offset: 0x%llx\n", hyp_offset);
484
485 panic("HYP panic:\nPS:%08llx PC:%016llx ESR:%016llx\nFAR:%016llx HPFAR:%016llx PAR:%016llx\nVCPU:%016lx\n",
486 spsr, elr_virt, esr, far, hpfar, par, vcpu);
487 }
488