1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Nvidia HDMI codec support
4 */
5
6 #include <linux/init.h>
7 #include <linux/slab.h>
8 #include <linux/module.h>
9 #include <sound/core.h>
10 #include <sound/tlv.h>
11 #include <sound/hdaudio.h>
12 #include <sound/hda_codec.h>
13 #include "hda_local.h"
14 #include "hdmi_local.h"
15
16 enum {
17 MODEL_GENERIC,
18 MODEL_LEGACY,
19 };
20
21 /*
22 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
23 * - 0x10de0015
24 * - 0x10de0040
25 */
nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap * chmap,struct hdac_cea_channel_speaker_allocation * cap,int channels)26 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
27 struct hdac_cea_channel_speaker_allocation *cap, int channels)
28 {
29 if (cap->ca_index == 0x00 && channels == 2)
30 return SNDRV_CTL_TLVT_CHMAP_FIXED;
31
32 /* If the speaker allocation matches the channel count, it is OK. */
33 if (cap->channels != channels)
34 return -1;
35
36 /* all channels are remappable freely */
37 return SNDRV_CTL_TLVT_CHMAP_VAR;
38 }
39
nvhdmi_chmap_validate(struct hdac_chmap * chmap,int ca,int chs,unsigned char * map)40 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
41 int ca, int chs, unsigned char *map)
42 {
43 if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
44 return -EINVAL;
45
46 return 0;
47 }
48
49 /* map from pin NID to port; port is 0-based */
50 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
nvhdmi_pin2port(void * audio_ptr,int pin_nid)51 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
52 {
53 return pin_nid - 4;
54 }
55
56 /* reverse-map from port to pin NID: see above */
nvhdmi_port2pin(struct hda_codec * codec,int port)57 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
58 {
59 return port + 4;
60 }
61
62 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
63 .pin2port = nvhdmi_pin2port,
64 .pin_eld_notify = snd_hda_hdmi_acomp_pin_eld_notify,
65 .master_bind = snd_hda_hdmi_acomp_master_bind,
66 .master_unbind = snd_hda_hdmi_acomp_master_unbind,
67 };
68
probe_generic(struct hda_codec * codec)69 static int probe_generic(struct hda_codec *codec)
70 {
71 struct hdmi_spec *spec;
72 int err;
73
74 err = snd_hda_hdmi_generic_alloc(codec);
75 if (err < 0)
76 return err;
77 codec->dp_mst = true;
78
79 spec = codec->spec;
80
81 err = snd_hda_hdmi_parse_codec(codec);
82 if (err < 0) {
83 snd_hda_hdmi_generic_spec_free(codec);
84 return err;
85 }
86
87 snd_hda_hdmi_generic_init_per_pins(codec);
88
89 spec->dyn_pin_out = true;
90
91 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
92 nvhdmi_chmap_cea_alloc_validate_get_type;
93 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
94 spec->nv_dp_workaround = true;
95
96 codec->link_down_at_suspend = 1;
97
98 snd_hda_hdmi_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
99
100 return 0;
101 }
102
probe_legacy(struct hda_codec * codec)103 static int probe_legacy(struct hda_codec *codec)
104 {
105 struct hdmi_spec *spec;
106 int err;
107
108 err = snd_hda_hdmi_generic_probe(codec);
109 if (err)
110 return err;
111
112 spec = codec->spec;
113 spec->dyn_pin_out = true;
114
115 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
116 nvhdmi_chmap_cea_alloc_validate_get_type;
117 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
118 spec->nv_dp_workaround = true;
119
120 codec->link_down_at_suspend = 1;
121
122 return 0;
123 }
124
nvhdmi_probe(struct hda_codec * codec,const struct hda_device_id * id)125 static int nvhdmi_probe(struct hda_codec *codec, const struct hda_device_id *id)
126 {
127 if (id->driver_data == MODEL_LEGACY)
128 return probe_legacy(codec);
129 else
130 return probe_generic(codec);
131 }
132
133 static const struct hda_codec_ops nvhdmi_codec_ops = {
134 .probe = nvhdmi_probe,
135 .remove = snd_hda_hdmi_generic_remove,
136 .init = snd_hda_hdmi_generic_init,
137 .build_pcms = snd_hda_hdmi_generic_build_pcms,
138 .build_controls = snd_hda_hdmi_generic_build_controls,
139 .unsol_event = snd_hda_hdmi_generic_unsol_event,
140 .suspend = snd_hda_hdmi_generic_suspend,
141 .resume = snd_hda_hdmi_generic_resume,
142 };
143
144 static const struct hda_device_id snd_hda_id_nvhdmi[] = {
145 HDA_CODEC_ID_MODEL(0x10de0008, "GPU 08 HDMI/DP", MODEL_LEGACY),
146 HDA_CODEC_ID_MODEL(0x10de0009, "GPU 09 HDMI/DP", MODEL_LEGACY),
147 HDA_CODEC_ID_MODEL(0x10de000a, "GPU 0a HDMI/DP", MODEL_LEGACY),
148 HDA_CODEC_ID_MODEL(0x10de000b, "GPU 0b HDMI/DP", MODEL_LEGACY),
149 HDA_CODEC_ID_MODEL(0x10de000c, "MCP89 HDMI", MODEL_LEGACY),
150 HDA_CODEC_ID_MODEL(0x10de000d, "GPU 0d HDMI/DP", MODEL_LEGACY),
151 HDA_CODEC_ID_MODEL(0x10de0010, "GPU 10 HDMI/DP", MODEL_LEGACY),
152 HDA_CODEC_ID_MODEL(0x10de0011, "GPU 11 HDMI/DP", MODEL_LEGACY),
153 HDA_CODEC_ID_MODEL(0x10de0012, "GPU 12 HDMI/DP", MODEL_LEGACY),
154 HDA_CODEC_ID_MODEL(0x10de0013, "GPU 13 HDMI/DP", MODEL_LEGACY),
155 HDA_CODEC_ID_MODEL(0x10de0014, "GPU 14 HDMI/DP", MODEL_LEGACY),
156 HDA_CODEC_ID_MODEL(0x10de0015, "GPU 15 HDMI/DP", MODEL_LEGACY),
157 HDA_CODEC_ID_MODEL(0x10de0016, "GPU 16 HDMI/DP", MODEL_LEGACY),
158 /* 17 is known to be absent */
159 HDA_CODEC_ID_MODEL(0x10de0018, "GPU 18 HDMI/DP", MODEL_LEGACY),
160 HDA_CODEC_ID_MODEL(0x10de0019, "GPU 19 HDMI/DP", MODEL_LEGACY),
161 HDA_CODEC_ID_MODEL(0x10de001a, "GPU 1a HDMI/DP", MODEL_LEGACY),
162 HDA_CODEC_ID_MODEL(0x10de001b, "GPU 1b HDMI/DP", MODEL_LEGACY),
163 HDA_CODEC_ID_MODEL(0x10de001c, "GPU 1c HDMI/DP", MODEL_LEGACY),
164 HDA_CODEC_ID_MODEL(0x10de0040, "GPU 40 HDMI/DP", MODEL_GENERIC),
165 HDA_CODEC_ID_MODEL(0x10de0041, "GPU 41 HDMI/DP", MODEL_GENERIC),
166 HDA_CODEC_ID_MODEL(0x10de0042, "GPU 42 HDMI/DP", MODEL_GENERIC),
167 HDA_CODEC_ID_MODEL(0x10de0043, "GPU 43 HDMI/DP", MODEL_GENERIC),
168 HDA_CODEC_ID_MODEL(0x10de0044, "GPU 44 HDMI/DP", MODEL_GENERIC),
169 HDA_CODEC_ID_MODEL(0x10de0045, "GPU 45 HDMI/DP", MODEL_GENERIC),
170 HDA_CODEC_ID_MODEL(0x10de0050, "GPU 50 HDMI/DP", MODEL_GENERIC),
171 HDA_CODEC_ID_MODEL(0x10de0051, "GPU 51 HDMI/DP", MODEL_GENERIC),
172 HDA_CODEC_ID_MODEL(0x10de0052, "GPU 52 HDMI/DP", MODEL_GENERIC),
173 HDA_CODEC_ID_MODEL(0x10de0060, "GPU 60 HDMI/DP", MODEL_GENERIC),
174 HDA_CODEC_ID_MODEL(0x10de0061, "GPU 61 HDMI/DP", MODEL_GENERIC),
175 HDA_CODEC_ID_MODEL(0x10de0062, "GPU 62 HDMI/DP", MODEL_GENERIC),
176 HDA_CODEC_ID_MODEL(0x10de0070, "GPU 70 HDMI/DP", MODEL_GENERIC),
177 HDA_CODEC_ID_MODEL(0x10de0071, "GPU 71 HDMI/DP", MODEL_GENERIC),
178 HDA_CODEC_ID_MODEL(0x10de0072, "GPU 72 HDMI/DP", MODEL_GENERIC),
179 HDA_CODEC_ID_MODEL(0x10de0073, "GPU 73 HDMI/DP", MODEL_GENERIC),
180 HDA_CODEC_ID_MODEL(0x10de0074, "GPU 74 HDMI/DP", MODEL_GENERIC),
181 HDA_CODEC_ID_MODEL(0x10de0076, "GPU 76 HDMI/DP", MODEL_GENERIC),
182 HDA_CODEC_ID_MODEL(0x10de007b, "GPU 7b HDMI/DP", MODEL_GENERIC),
183 HDA_CODEC_ID_MODEL(0x10de007c, "GPU 7c HDMI/DP", MODEL_GENERIC),
184 HDA_CODEC_ID_MODEL(0x10de007d, "GPU 7d HDMI/DP", MODEL_GENERIC),
185 HDA_CODEC_ID_MODEL(0x10de007e, "GPU 7e HDMI/DP", MODEL_GENERIC),
186 HDA_CODEC_ID_MODEL(0x10de0080, "GPU 80 HDMI/DP", MODEL_GENERIC),
187 HDA_CODEC_ID_MODEL(0x10de0081, "GPU 81 HDMI/DP", MODEL_GENERIC),
188 HDA_CODEC_ID_MODEL(0x10de0082, "GPU 82 HDMI/DP", MODEL_GENERIC),
189 HDA_CODEC_ID_MODEL(0x10de0083, "GPU 83 HDMI/DP", MODEL_GENERIC),
190 HDA_CODEC_ID_MODEL(0x10de0084, "GPU 84 HDMI/DP", MODEL_GENERIC),
191 HDA_CODEC_ID_MODEL(0x10de0090, "GPU 90 HDMI/DP", MODEL_GENERIC),
192 HDA_CODEC_ID_MODEL(0x10de0091, "GPU 91 HDMI/DP", MODEL_GENERIC),
193 HDA_CODEC_ID_MODEL(0x10de0092, "GPU 92 HDMI/DP", MODEL_GENERIC),
194 HDA_CODEC_ID_MODEL(0x10de0093, "GPU 93 HDMI/DP", MODEL_GENERIC),
195 HDA_CODEC_ID_MODEL(0x10de0094, "GPU 94 HDMI/DP", MODEL_GENERIC),
196 HDA_CODEC_ID_MODEL(0x10de0095, "GPU 95 HDMI/DP", MODEL_GENERIC),
197 HDA_CODEC_ID_MODEL(0x10de0097, "GPU 97 HDMI/DP", MODEL_GENERIC),
198 HDA_CODEC_ID_MODEL(0x10de0098, "GPU 98 HDMI/DP", MODEL_GENERIC),
199 HDA_CODEC_ID_MODEL(0x10de0099, "GPU 99 HDMI/DP", MODEL_GENERIC),
200 HDA_CODEC_ID_MODEL(0x10de009a, "GPU 9a HDMI/DP", MODEL_GENERIC),
201 HDA_CODEC_ID_MODEL(0x10de009d, "GPU 9d HDMI/DP", MODEL_GENERIC),
202 HDA_CODEC_ID_MODEL(0x10de009e, "GPU 9e HDMI/DP", MODEL_GENERIC),
203 HDA_CODEC_ID_MODEL(0x10de009f, "GPU 9f HDMI/DP", MODEL_GENERIC),
204 HDA_CODEC_ID_MODEL(0x10de00a0, "GPU a0 HDMI/DP", MODEL_GENERIC),
205 HDA_CODEC_ID_MODEL(0x10de00a3, "GPU a3 HDMI/DP", MODEL_GENERIC),
206 HDA_CODEC_ID_MODEL(0x10de00a4, "GPU a4 HDMI/DP", MODEL_GENERIC),
207 HDA_CODEC_ID_MODEL(0x10de00a5, "GPU a5 HDMI/DP", MODEL_GENERIC),
208 HDA_CODEC_ID_MODEL(0x10de00a6, "GPU a6 HDMI/DP", MODEL_GENERIC),
209 HDA_CODEC_ID_MODEL(0x10de00a7, "GPU a7 HDMI/DP", MODEL_GENERIC),
210 {} /* terminator */
211 };
212 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_nvhdmi);
213
214 MODULE_LICENSE("GPL");
215 MODULE_DESCRIPTION("Nvidia HDMI HD-audio codec");
216 MODULE_IMPORT_NS("SND_HDA_CODEC_HDMI");
217
218 static struct hda_codec_driver nvhdmi_driver = {
219 .id = snd_hda_id_nvhdmi,
220 .ops = &nvhdmi_codec_ops,
221 };
222
223 module_hda_codec_driver(nvhdmi_driver);
224