xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/pcir.c (revision e5451c8f8330e03ad3cfa16048b4daf961af434f)
1 /*
2  * Copyright 2014 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include <subdev/bios.h>
25 #include <subdev/bios/pcir.h>
26 
27 u32
nvbios_pcirTe(struct nvkm_bios * bios,u32 base,u8 * ver,u16 * hdr)28 nvbios_pcirTe(struct nvkm_bios *bios, u32 base, u8 *ver, u16 *hdr)
29 {
30 	u32 data = nvbios_rd16(bios, base + 0x18);
31 	if (data) {
32 		data += base;
33 		switch (nvbios_rd32(bios, data + 0x00)) {
34 		case 0x52494350: /* PCIR */
35 		case 0x53494752: /* RGIS */
36 		case 0x5344504e: /* NPDS */
37 			*hdr = nvbios_rd16(bios, data + 0x0a);
38 			*ver = nvbios_rd08(bios, data + 0x0c);
39 			break;
40 		default:
41 			nvkm_debug(&bios->subdev,
42 				   "%08x: PCIR signature (%08x) unknown\n",
43 				   data, nvbios_rd32(bios, data + 0x00));
44 			data = 0;
45 			break;
46 		}
47 	}
48 	return data;
49 }
50 
51 u32
nvbios_pcirTp(struct nvkm_bios * bios,u32 base,u8 * ver,u16 * hdr,struct nvbios_pcirT * info)52 nvbios_pcirTp(struct nvkm_bios *bios, u32 base, u8 *ver, u16 *hdr,
53 	      struct nvbios_pcirT *info)
54 {
55 	u32 data = nvbios_pcirTe(bios, base, ver, hdr);
56 	memset(info, 0x00, sizeof(*info));
57 	if (data) {
58 		info->vendor_id = nvbios_rd16(bios, data + 0x04);
59 		info->device_id = nvbios_rd16(bios, data + 0x06);
60 		info->class_code[0] = nvbios_rd08(bios, data + 0x0d);
61 		info->class_code[1] = nvbios_rd08(bios, data + 0x0e);
62 		info->class_code[2] = nvbios_rd08(bios, data + 0x0f);
63 		info->image_size = nvbios_rd16(bios, data + 0x10) * 512;
64 		info->image_rev = nvbios_rd16(bios, data + 0x12);
65 		info->image_type = nvbios_rd08(bios, data + 0x14);
66 		info->last = nvbios_rd08(bios, data + 0x15) & 0x80;
67 	}
68 	return data;
69 }
70