xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.c (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1 /*
2  * Copyright 2012 Nouveau Community
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Martin Peres <martin.peres@labri.fr>
23  *          Ben Skeggs
24  */
25 #include "priv.h"
26 
27 #include <subdev/therm.h>
28 #include <subdev/timer.h>
29 
30 static int
nv50_bus_hwsq_exec(struct nvkm_bus * bus,u32 * data,u32 size)31 nv50_bus_hwsq_exec(struct nvkm_bus *bus, u32 *data, u32 size)
32 {
33 	struct nvkm_device *device = bus->subdev.device;
34 	int i;
35 
36 	nvkm_mask(device, 0x001098, 0x00000008, 0x00000000);
37 	nvkm_wr32(device, 0x001304, 0x00000000);
38 	for (i = 0; i < size; i++)
39 		nvkm_wr32(device, 0x001400 + (i * 4), data[i]);
40 	nvkm_mask(device, 0x001098, 0x00000018, 0x00000018);
41 	nvkm_wr32(device, 0x00130c, 0x00000003);
42 
43 	if (nvkm_msec(device, 2000,
44 		if (!(nvkm_rd32(device, 0x001308) & 0x00000100))
45 			break;
46 	) < 0)
47 		return -ETIMEDOUT;
48 
49 	return 0;
50 }
51 
52 void
nv50_bus_intr(struct nvkm_bus * bus)53 nv50_bus_intr(struct nvkm_bus *bus)
54 {
55 	struct nvkm_subdev *subdev = &bus->subdev;
56 	struct nvkm_device *device = subdev->device;
57 	u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140);
58 
59 	if (stat & 0x00000008) {
60 		u32 addr = nvkm_rd32(device, 0x009084);
61 		u32 data = nvkm_rd32(device, 0x009088);
62 
63 		nvkm_error_ratelimited(subdev, "MMIO %s of %08x FAULT at %06x\n",
64 				       (addr & 0x00000002) ? "write" : "read", data,
65 				       (addr & 0x00fffffc));
66 
67 		stat &= ~0x00000008;
68 		nvkm_wr32(device, 0x001100, 0x00000008);
69 	}
70 
71 	if (stat & 0x00010000) {
72 		struct nvkm_therm *therm = device->therm;
73 		if (therm)
74 			nvkm_subdev_intr(&therm->subdev);
75 		stat &= ~0x00010000;
76 		nvkm_wr32(device, 0x001100, 0x00010000);
77 	}
78 
79 	if (stat) {
80 		nvkm_error(subdev, "intr %08x\n", stat);
81 		nvkm_mask(device, 0x001140, stat, 0);
82 	}
83 }
84 
85 void
nv50_bus_init(struct nvkm_bus * bus)86 nv50_bus_init(struct nvkm_bus *bus)
87 {
88 	struct nvkm_device *device = bus->subdev.device;
89 	nvkm_wr32(device, 0x001100, 0xffffffff);
90 	nvkm_wr32(device, 0x001140, 0x00010008);
91 }
92 
93 static const struct nvkm_bus_func
94 nv50_bus = {
95 	.init = nv50_bus_init,
96 	.intr = nv50_bus_intr,
97 	.hwsq_exec = nv50_bus_hwsq_exec,
98 	.hwsq_size = 64,
99 };
100 
101 int
nv50_bus_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_bus ** pbus)102 nv50_bus_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
103 	     struct nvkm_bus **pbus)
104 {
105 	return nvkm_bus_new_(&nv50_bus, device, type, inst, pbus);
106 }
107