xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv30.c (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1 /*
2  * Copyright (C) 2010 Francisco Jerez.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial
15  * portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  *
25  */
26 #include "priv.h"
27 #include "ram.h"
28 
29 void
nv30_fb_tile_init(struct nvkm_fb * fb,int i,u32 addr,u32 size,u32 pitch,u32 flags,struct nvkm_fb_tile * tile)30 nv30_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch,
31 		  u32 flags, struct nvkm_fb_tile *tile)
32 {
33 	/* for performance, select alternate bank offset for zeta */
34 	if (!(flags & 4)) {
35 		tile->addr = (0 << 4);
36 	} else {
37 		if (fb->func->tile.comp) /* z compression */
38 			fb->func->tile.comp(fb, i, size, flags, tile);
39 		tile->addr = (1 << 4);
40 	}
41 
42 	tile->addr |= 0x00000001; /* enable */
43 	tile->addr |= addr;
44 	tile->limit = max(1u, addr + size) - 1;
45 	tile->pitch = pitch;
46 }
47 
48 static void
nv30_fb_tile_comp(struct nvkm_fb * fb,int i,u32 size,u32 flags,struct nvkm_fb_tile * tile)49 nv30_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags,
50 		  struct nvkm_fb_tile *tile)
51 {
52 	u32 tiles = DIV_ROUND_UP(size, 0x40);
53 	u32 tags  = round_up(tiles / fb->ram->parts, 0x40);
54 	if (!nvkm_mm_head(&fb->tags.mm, 0, 1, tags, tags, 1, &tile->tag)) {
55 		if (flags & 2) tile->zcomp |= 0x01000000; /* Z16 */
56 		else           tile->zcomp |= 0x02000000; /* Z24S8 */
57 		tile->zcomp |= ((tile->tag->offset           ) >> 6);
58 		tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 12;
59 #ifdef __BIG_ENDIAN
60 		tile->zcomp |= 0x10000000;
61 #endif
62 	}
63 }
64 
65 static int
calc_bias(struct nvkm_fb * fb,int k,int i,int j)66 calc_bias(struct nvkm_fb *fb, int k, int i, int j)
67 {
68 	struct nvkm_device *device = fb->subdev.device;
69 	int b = (device->chipset > 0x30 ?
70 		 nvkm_rd32(device, 0x122c + 0x10 * k + 0x4 * j) >>
71 			(4 * (i ^ 1)) :
72 		 0) & 0xf;
73 
74 	return 2 * (b & 0x8 ? b - 0x10 : b);
75 }
76 
77 static int
calc_ref(struct nvkm_fb * fb,int l,int k,int i)78 calc_ref(struct nvkm_fb *fb, int l, int k, int i)
79 {
80 	int j, x = 0;
81 
82 	for (j = 0; j < 4; j++) {
83 		int m = (l >> (8 * i) & 0xff) + calc_bias(fb, k, i, j);
84 
85 		x |= (0x80 | clamp(m, 0, 0x1f)) << (8 * j);
86 	}
87 
88 	return x;
89 }
90 
91 void
nv30_fb_init(struct nvkm_fb * fb)92 nv30_fb_init(struct nvkm_fb *fb)
93 {
94 	struct nvkm_device *device = fb->subdev.device;
95 	int i, j;
96 
97 	/* Init the memory timing regs at 0x10037c/0x1003ac */
98 	if (device->chipset == 0x30 ||
99 	    device->chipset == 0x31 ||
100 	    device->chipset == 0x35) {
101 		/* Related to ROP count */
102 		int n = (device->chipset == 0x31 ? 2 : 4);
103 		int l = nvkm_rd32(device, 0x1003d0);
104 
105 		for (i = 0; i < n; i++) {
106 			for (j = 0; j < 3; j++)
107 				nvkm_wr32(device, 0x10037c + 0xc * i + 0x4 * j,
108 					  calc_ref(fb, l, 0, j));
109 
110 			for (j = 0; j < 2; j++)
111 				nvkm_wr32(device, 0x1003ac + 0x8 * i + 0x4 * j,
112 					  calc_ref(fb, l, 1, j));
113 		}
114 	}
115 }
116 
117 static const struct nvkm_fb_func
118 nv30_fb = {
119 	.tags = nv20_fb_tags,
120 	.init = nv30_fb_init,
121 	.tile.regions = 8,
122 	.tile.init = nv30_fb_tile_init,
123 	.tile.comp = nv30_fb_tile_comp,
124 	.tile.fini = nv20_fb_tile_fini,
125 	.tile.prog = nv20_fb_tile_prog,
126 	.ram_new = nv20_ram_new,
127 };
128 
129 int
nv30_fb_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_fb ** pfb)130 nv30_fb_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_fb **pfb)
131 {
132 	return nvkm_fb_new_(&nv30_fb, device, type, inst, pfb);
133 }
134