xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 const struct nvkm_mc_map
27 nv04_mc_reset[] = {
28 	{ 0x00001000, NVKM_ENGINE_GR },
29 	{ 0x00000100, NVKM_ENGINE_FIFO },
30 	{}
31 };
32 
33 static void
nv04_mc_device_disable(struct nvkm_mc * mc,u32 mask)34 nv04_mc_device_disable(struct nvkm_mc *mc, u32 mask)
35 {
36 	nvkm_mask(mc->subdev.device, 0x000200, mask, 0x00000000);
37 }
38 
39 static void
nv04_mc_device_enable(struct nvkm_mc * mc,u32 mask)40 nv04_mc_device_enable(struct nvkm_mc *mc, u32 mask)
41 {
42 	struct nvkm_device *device = mc->subdev.device;
43 
44 	nvkm_mask(device, 0x000200, mask, mask);
45 	nvkm_rd32(device, 0x000200);
46 }
47 
48 static bool
nv04_mc_device_enabled(struct nvkm_mc * mc,u32 mask)49 nv04_mc_device_enabled(struct nvkm_mc *mc, u32 mask)
50 {
51 	return (nvkm_rd32(mc->subdev.device, 0x000200) & mask) == mask;
52 }
53 
54 const struct nvkm_mc_device_func
55 nv04_mc_device = {
56 	.enabled = nv04_mc_device_enabled,
57 	.enable = nv04_mc_device_enable,
58 	.disable = nv04_mc_device_disable,
59 };
60 
61 static const struct nvkm_intr_data
62 nv04_mc_intrs[] = {
63 	{ NVKM_ENGINE_DISP , 0, 0, 0x01010000, true },
64 	{ NVKM_ENGINE_GR   , 0, 0, 0x00001000, true },
65 	{ NVKM_ENGINE_FIFO , 0, 0, 0x00000100 },
66 	{ NVKM_SUBDEV_BUS  , 0, 0, 0x10000000, true },
67 	{ NVKM_SUBDEV_TIMER, 0, 0, 0x00100000, true },
68 	{}
69 };
70 
71 void
nv04_mc_intr_rearm(struct nvkm_intr * intr)72 nv04_mc_intr_rearm(struct nvkm_intr *intr)
73 {
74 	struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
75 	int leaf;
76 
77 	for (leaf = 0; leaf < intr->leaves; leaf++)
78 		nvkm_wr32(mc->subdev.device, 0x000140 + (leaf * 4), 0x00000001);
79 }
80 
81 void
nv04_mc_intr_unarm(struct nvkm_intr * intr)82 nv04_mc_intr_unarm(struct nvkm_intr *intr)
83 {
84 	struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
85 	int leaf;
86 
87 	for (leaf = 0; leaf < intr->leaves; leaf++)
88 		nvkm_wr32(mc->subdev.device, 0x000140 + (leaf * 4), 0x00000000);
89 
90 	nvkm_rd32(mc->subdev.device, 0x000140);
91 }
92 
93 bool
nv04_mc_intr_pending(struct nvkm_intr * intr)94 nv04_mc_intr_pending(struct nvkm_intr *intr)
95 {
96 	struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
97 	bool pending = false;
98 	int leaf;
99 
100 	for (leaf = 0; leaf < intr->leaves; leaf++) {
101 		intr->stat[leaf] = nvkm_rd32(mc->subdev.device, 0x000100 + (leaf * 4));
102 		if (intr->stat[leaf])
103 			pending = true;
104 	}
105 
106 	return pending;
107 }
108 
109 const struct nvkm_intr_func
110 nv04_mc_intr = {
111 	.pending = nv04_mc_intr_pending,
112 	.unarm = nv04_mc_intr_unarm,
113 	.rearm = nv04_mc_intr_rearm,
114 };
115 
116 void
nv04_mc_init(struct nvkm_mc * mc)117 nv04_mc_init(struct nvkm_mc *mc)
118 {
119 	struct nvkm_device *device = mc->subdev.device;
120 	nvkm_wr32(device, 0x000200, 0xffffffff); /* everything enabled */
121 	nvkm_wr32(device, 0x001850, 0x00000001); /* disable rom access */
122 }
123 
124 static const struct nvkm_mc_func
125 nv04_mc = {
126 	.init = nv04_mc_init,
127 	.intr = &nv04_mc_intr,
128 	.intrs = nv04_mc_intrs,
129 	.device = &nv04_mc_device,
130 	.reset = nv04_mc_reset,
131 };
132 
133 int
nv04_mc_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_mc ** pmc)134 nv04_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
135 {
136 	return nvkm_mc_new_(&nv04_mc, device, type, inst, pmc);
137 }
138